| @@ -4,7 +4,9 @@ · 3 unmodified lines |
| 4 | | 4 | |
| 5 | #include <linux/errno.h> | 5 | #include <linux/errno.h> |
| 6 | #include <linux/types.h> | 6 | #include <linux/types.h> |
| 7 | #include <linux/dmi.h> | 7 | |
| | 8 | #define ASUS_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" |
| | 9 | #define ASUS_ACPI_UID_ASUSWMI "ASUSWMI" |
| 8 | | 10 | |
| 9 | /* WMI Methods */ | 11 | /* WMI Methods */ |
| 10 | #define ASUS_WMI_METHODID_SPEC 0x43455053 /* BIOS SPECification */ | 12 | #define ASUS_WMI_METHODID_SPEC 0x43455053 /* BIOS SPECification */ |
| @@ -74,12 +76,14 @@ · 63 unmodified lines |
| 74 | #define ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY_VIVO 0x00110019 | 76 | #define ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY_VIVO 0x00110019 |
| 75 | | 77 | |
| 76 | /* Misc */ | 78 | /* Misc */ |
| | 79 | #define ASUS_WMI_DEVID_PANEL_HD 0x0005001C |
| 77 | #define ASUS_WMI_DEVID_PANEL_OD 0x00050019 | 80 | #define ASUS_WMI_DEVID_PANEL_OD 0x00050019 |
| 78 | #define ASUS_WMI_DEVID_CAMERA 0x00060013 | 81 | #define ASUS_WMI_DEVID_CAMERA 0x00060013 |
| 79 | #define ASUS_WMI_DEVID_LID_FLIP 0x00060062 | 82 | #define ASUS_WMI_DEVID_LID_FLIP 0x00060062 |
| 80 | #define ASUS_WMI_DEVID_LID_FLIP_ROG 0x00060077 | 83 | #define ASUS_WMI_DEVID_LID_FLIP_ROG 0x00060077 |
| 81 | #define ASUS_WMI_DEVID_MINI_LED_MODE 0x0005001E | 84 | #define ASUS_WMI_DEVID_MINI_LED_MODE 0x0005001E |
| 82 | #define ASUS_WMI_DEVID_MINI_LED_MODE2 0x0005002E | 85 | #define ASUS_WMI_DEVID_MINI_LED_MODE2 0x0005002E |
| | 86 | #define ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS 0x0005002A |
| 83 | | 87 | |
| 84 | /* Storage */ | 88 | /* Storage */ |
| 85 | #define ASUS_WMI_DEVID_CARDREADER 0x00080013 | 89 | #define ASUS_WMI_DEVID_CARDREADER 0x00080013 |
| @@ -104,7 +108,7 @@ · 18 unmodified lines |
| 104 | #define ASUS_WMI_DEVID_PPT_PL1_SPL 0x001200A3 | 108 | #define ASUS_WMI_DEVID_PPT_PL1_SPL 0x001200A3 |
| 105 | #define ASUS_WMI_DEVID_PPT_APU_SPPT 0x001200B0 | 109 | #define ASUS_WMI_DEVID_PPT_APU_SPPT 0x001200B0 |
| 106 | #define ASUS_WMI_DEVID_PPT_PLAT_SPPT 0x001200B1 | 110 | #define ASUS_WMI_DEVID_PPT_PLAT_SPPT 0x001200B1 |
| 107 | #define ASUS_WMI_DEVID_PPT_FPPT 0x001200C1 | 111 | #define ASUS_WMI_DEVID_PPT_PL3_FPPT 0x001200C1 |
| 108 | #define ASUS_WMI_DEVID_NV_DYN_BOOST 0x001200C0 | 112 | #define ASUS_WMI_DEVID_NV_DYN_BOOST 0x001200C0 |
| 109 | #define ASUS_WMI_DEVID_NV_THERM_TARGET 0x001200C2 | 113 | #define ASUS_WMI_DEVID_NV_THERM_TARGET 0x001200C2 |
| 110 | | 114 | |
| @@ -134,6 +138,11 @@ · 23 unmodified lines |
| 134 | /* dgpu on/off */ | 138 | /* dgpu on/off */ |
| 135 | #define ASUS_WMI_DEVID_DGPU 0x00090020 | 139 | #define ASUS_WMI_DEVID_DGPU 0x00090020 |
| 136 | | 140 | |
| | 141 | #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 |
| | 142 | |
| | 143 | #define ASUS_WMI_DEVID_DGPU_BASE_TGP 0x00120099 |
| | 144 | #define ASUS_WMI_DEVID_DGPU_SET_TGP 0x00120098 |
| | 145 | |
| 137 | /* gpu mux switch, 0 = dGPU, 1 = Optimus */ | 146 | /* gpu mux switch, 0 = dGPU, 1 = Optimus */ |
| 138 | #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 | 147 | #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 |
| 139 | #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 | 148 | #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 |
| @@ -167,6 +176,7 @@ enum asus_ally_mcu_hack { · 27 unmodified lines |
| 167 | #if IS_REACHABLE(CONFIG_ASUS_WMI) | 176 | #if IS_REACHABLE(CONFIG_ASUS_WMI) |
| 168 | void set_ally_mcu_hack(enum asus_ally_mcu_hack status); | 177 | void set_ally_mcu_hack(enum asus_ally_mcu_hack status); |
| 169 | void set_ally_mcu_powersave(bool enabled); | 178 | void set_ally_mcu_powersave(bool enabled); |
| | 179 | int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval); |
| 170 | int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval); | 180 | int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval); |
| 171 | int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retval); | 181 | int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retval); |
| 172 | #else | 182 | #else |
| @@ -180,6 +190,10 @@ static inline int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval) · 7 unmodified lines |
| 180 | { | 190 | { |
| 181 | return -ENODEV; | 191 | return -ENODEV; |
| 182 | } | 192 | } |
| | 193 | static inline int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) |
| | 194 | { |
| | 195 | return -ENODEV; |
| | 196 | } |
| 183 | static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, | 197 | static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, |
| 184 | u32 *retval) | 198 | u32 *retval) |
| 185 | { | 199 | { |
| @@ -187,44 +201,4 @@ static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, · 1 unmodified line |
| 187 | } | 201 | } |
| 188 | #endif | 202 | #endif |
| 189 | | 203 | |
| 190 | /* To be used by both hid-asus and asus-wmi to determine which controls kbd_brightness */ | | |
| 191 | static const struct dmi_system_id asus_use_hid_led_dmi_ids[] = { | | |
| 192 | { | | |
| 193 | .matches = { | | |
| 194 | DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Zephyrus"), | | |
| 195 | }, | | |
| 196 | }, | | |
| 197 | { | | |
| 198 | .matches = { | | |
| 199 | DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Strix"), | | |
| 200 | }, | | |
| 201 | }, | | |
| 202 | { | | |
| 203 | .matches = { | | |
| 204 | DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Flow"), | | |
| 205 | }, | | |
| 206 | }, | | |
| 207 | { | | |
| 208 | .matches = { | | |
| 209 | DMI_MATCH(DMI_PRODUCT_FAMILY, "ProArt P16"), | | |
| 210 | }, | | |
| 211 | }, | | |
| 212 | { | | |
| 213 | .matches = { | | |
| 214 | DMI_MATCH(DMI_BOARD_NAME, "GA403U"), | | |
| 215 | }, | | |
| 216 | }, | | |
| 217 | { | | |
| 218 | .matches = { | | |
| 219 | DMI_MATCH(DMI_BOARD_NAME, "GU605M"), | | |
| 220 | }, | | |
| 221 | }, | | |
| 222 | { | | |
| 223 | .matches = { | | |
| 224 | DMI_MATCH(DMI_BOARD_NAME, "RC71L"), | | |
| 225 | }, | | |
| 226 | }, | | |
| 227 | { }, | | |
| 228 | }; | | |
| 229 | | | |
| 230 | #endif /* __PLATFORM_DATA_X86_ASUS_WMI_H */ | 204 | #endif /* __PLATFORM_DATA_X86_ASUS_WMI_H */ |