A small batch of MIPS fixes for 5.1: - An interrupt masking fix for Loongson-based Lemote 2F systems (fixing a regression from v3.19). - A relocation fix for configurations in which the devicetree is stored in an ELF section (fixing a regression from v4.7). - Fix jump labels for MIPSr6 kernels where they previously could inadvertently place a control transfer instruction in a forbidden slot & take unexpected exceptions (fixing MIPSr6 support added in v4.0). - Extend an existing USB power workaround for the Netgear WNDR3400 to v2 boards in addition to the v3 ones that already used it. - Remove the custom MIPS32 definition of __kernel_fsid_t to make it consistent with MIPS64 & every other architecture, in particular resolving issues for code which tries to print the val field whose type previously differed (though had identical memory layout). Merged into mips-next to gain the MIPSr6 jump label fix before enabling jump labels by default for generic kernel builds.
Unified · Split
| @@ -24,6 +24,7 @@ void __init bcm47xx_workarounds(void) · 23 unmodified lines | ||
| 24 | 24 | case BCM47XX_BOARD_NETGEAR_WNR3500L: |
| 25 | 25 | bcm47xx_workarounds_enable_usb_power(12); |
| 26 | 26 | break; |
| 27 | + case BCM47XX_BOARD_NETGEAR_WNDR3400V2: | |
| 27 | 28 | case BCM47XX_BOARD_NETGEAR_WNDR3400_V3: |
| 28 | 29 | bcm47xx_workarounds_enable_usb_power(21); |
| 29 | 30 | break; |
| @@ -21,15 +21,15 @@ · 20 unmodified lines | ||
| 21 | 21 | #endif |
| 22 | 22 | |
| 23 | 23 | #ifdef CONFIG_CPU_MICROMIPS |
| 24 | −#define NOP_INSN "nop32" | |
| 24 | +#define B_INSN "b32" | |
| 25 | 25 | #else |
| 26 | −#define NOP_INSN "nop" | |
| 26 | +#define B_INSN "b" | |
| 27 | 27 | #endif |
| 28 | 28 | |
| 29 | 29 | static __always_inline bool arch_static_branch(struct static_key *key, bool branch) |
| 30 | 30 | { |
| 31 | − asm_volatile_goto("1:\t" NOP_INSN "\n\t" | |
| 32 | − "nop\n\t" | |
| 31 | + asm_volatile_goto("1:\t" B_INSN " 2f\n\t" | |
| 32 | + "2:\tnop\n\t" | |
| 33 | 33 | ".pushsection __jump_table, \"aw\"\n\t" |
| 34 | 34 | WORD_INSN " 1b, %l[l_yes], %0\n\t" |
| 35 | 35 | ".popsection\n\t" |
| @@ -21,13 +21,6 @@ · 20 unmodified lines | ||
| 21 | 21 | typedef long __kernel_daddr_t; |
| 22 | 22 | #define __kernel_daddr_t __kernel_daddr_t |
| 23 | 23 | |
| 24 | −#if (_MIPS_SZLONG == 32) | |
| 25 | −typedef struct { | |
| 26 | − long val[2]; | |
| 27 | −} __kernel_fsid_t; | |
| 28 | −#define __kernel_fsid_t __kernel_fsid_t | |
| 29 | −#endif | |
| 30 | − | |
| 31 | 24 | #include <asm-generic/posix_types.h> |
| 32 | 25 | |
| 33 | 26 | #endif /* _ASM_POSIX_TYPES_H */ |
| @@ -140,6 +140,13 @@ SECTIONS · 139 unmodified lines | ||
| 140 | 140 | PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
| 141 | 141 | #endif |
| 142 | 142 | |
| 143 | +#ifdef CONFIG_MIPS_ELF_APPENDED_DTB | |
| 144 | + .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { | |
| 145 | + *(.appended_dtb) | |
| 146 | + KEEP(*(.appended_dtb)) | |
| 147 | + } | |
| 148 | +#endif | |
| 149 | + | |
| 143 | 150 | #ifdef CONFIG_RELOCATABLE |
| 144 | 151 | . = ALIGN(4); |
| 145 | 152 | |
| @@ -164,11 +171,6 @@ SECTIONS · 18 unmodified lines | ||
| 164 | 171 | __appended_dtb = .; |
| 165 | 172 | /* leave space for appended DTB */ |
| 166 | 173 | . += 0x100000; |
| 167 | −#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB) | |
| 168 | − .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { | |
| 169 | − *(.appended_dtb) | |
| 170 | − KEEP(*(.appended_dtb)) | |
| 171 | − } | |
| 172 | 174 | #endif |
| 173 | 175 | /* |
| 174 | 176 | * Align to 64K in attempt to eliminate holes before the |
| @@ -103,7 +103,7 @@ static struct irqaction ip6_irqaction = { · 102 unmodified lines | ||
| 103 | 103 | static struct irqaction cascade_irqaction = { |
| 104 | 104 | .handler = no_action, |
| 105 | 105 | .name = "cascade", |
| 106 | − .flags = IRQF_NO_THREAD, | |
| 106 | + .flags = IRQF_NO_THREAD | IRQF_NO_SUSPEND, | |
| 107 | 107 | }; |
| 108 | 108 | |
| 109 | 109 | void __init mach_init_irq(void) |