The IOMMU_SYS_CACHE_ONLY flag was never exposed via the DMA API and has no in-tree users. Remove it.
Unified · Split
| @@ -438,9 +438,6 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data, · 437 unmodified lines | ||
| 438 | 438 | else if (prot & IOMMU_CACHE) |
| 439 | 439 | pte |= (ARM_LPAE_MAIR_ATTR_IDX_CACHE |
| 440 | 440 | << ARM_LPAE_PTE_ATTRINDX_SHIFT); |
| 441 | − else if (prot & IOMMU_SYS_CACHE_ONLY) | |
| 442 | − pte |= (ARM_LPAE_MAIR_ATTR_IDX_INC_OCACHE | |
| 443 | − << ARM_LPAE_PTE_ATTRINDX_SHIFT); | |
| 444 | 441 | } |
| 445 | 442 | |
| 446 | 443 | if (prot & IOMMU_CACHE) |
| @@ -31,12 +31,6 @@ · 30 unmodified lines | ||
| 31 | 31 | * if the IOMMU page table format is equivalent. |
| 32 | 32 | */ |
| 33 | 33 | #define IOMMU_PRIV (1 << 5) |
| 34 | −/* | |
| 35 | − * Non-coherent masters can use this page protection flag to set cacheable | |
| 36 | − * memory attributes for only a transparent outer level of cache, also known as | |
| 37 | − * the last-level or system cache. | |
| 38 | − */ | |
| 39 | −#define IOMMU_SYS_CACHE_ONLY (1 << 6) | |
| 40 | 34 | |
| 41 | 35 | struct iommu_ops; |
| 42 | 36 | struct iommu_group; |