Depending on the compiler version, ARM GCC calls the mcount function either __gnu_mcount_nc or mcount.
Unified · Split
| @@ -23,6 +23,7 @@ config ARM · 22 unmodified lines | |||
| 23 | select PERF_USE_VMALLOC | 23 | select PERF_USE_VMALLOC |
| 24 | select HAVE_REGS_AND_STACK_ACCESS_API | 24 | select HAVE_REGS_AND_STACK_ACCESS_API |
| 25 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) | 25 | select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7)) |
| 26 | select HAVE_C_RECORDMCOUNT | ||
| 26 | help | 27 | help |
| 27 | The ARM series is a line of low-power-consumption RISC chip designs | 28 | The ARM series is a line of low-power-consumption RISC chip designs |
| 28 | licensed by ARM Ltd and targeted at embedded applications and | 29 | licensed by ARM Ltd and targeted at embedded applications and |
| @@ -38,6 +38,7 @@ static void *ehdr_curr; /* current ElfXX_Ehdr * for resource cleanup */ · 37 unmodified lines | |||
| 38 | static char gpfx; /* prefix for global symbol name (sometimes '_') */ | 38 | static char gpfx; /* prefix for global symbol name (sometimes '_') */ |
| 39 | static struct stat sb; /* Remember .st_size, etc. */ | 39 | static struct stat sb; /* Remember .st_size, etc. */ |
| 40 | static jmp_buf jmpenv; /* setjmp/longjmp per-file error escape */ | 40 | static jmp_buf jmpenv; /* setjmp/longjmp per-file error escape */ |
| 41 | static const char *altmcount; /* alternate mcount symbol name */ | ||
| 41 | 42 | ||
| 42 | /* setjmp() return values */ | 43 | /* setjmp() return values */ |
| 43 | enum { | 44 | enum { |
| @@ -299,7 +300,9 @@ do_file(char const *const fname) · 255 unmodified lines | |||
| 299 | fail_file(); | 300 | fail_file(); |
| 300 | } break; | 301 | } break; |
| 301 | case EM_386: reltype = R_386_32; break; | 302 | case EM_386: reltype = R_386_32; break; |
| 302 | case EM_ARM: reltype = R_ARM_ABS32; break; | 303 | case EM_ARM: reltype = R_ARM_ABS32; |
| 304 | altmcount = "__gnu_mcount_nc"; | ||
| 305 | break; | ||
| 303 | case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break; | 306 | case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break; |
| 304 | case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break; | 307 | case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break; |
| 305 | case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break; | 308 | case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break; |
| @@ -275,11 +275,12 @@ static uint_t *sift_rel_mcount(uint_t *mlocp, · 274 unmodified lines | |||
| 275 | Elf_Sym const *const symp = | 275 | Elf_Sym const *const symp = |
| 276 | &sym0[Elf_r_sym(relp)]; | 276 | &sym0[Elf_r_sym(relp)]; |
| 277 | char const *symname = &str0[w(symp->st_name)]; | 277 | char const *symname = &str0[w(symp->st_name)]; |
| 278 | char const *mcount = '_' == gpfx ? "_mcount" : "mcount"; | ||
| 278 | 279 | ||
| 279 | if ('.' == symname[0]) | 280 | if ('.' == symname[0]) |
| 280 | ++symname; /* ppc64 hack */ | 281 | ++symname; /* ppc64 hack */ |
| 281 | if (0 == strcmp((('_' == gpfx) ? "_mcount" : "mcount"), | 282 | if (0 == strcmp(mcount, symname) || |
| 282 | symname)) | 283 | (altmcount && 0 == strcmp(altmcount, symname))) |
| 283 | mcountsym = Elf_r_sym(relp); | 284 | mcountsym = Elf_r_sym(relp); |
| 284 | } | 285 | } |
| 285 | 286 | ||