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drm/virtgpu api: blob resources

This makes blob resources available to guest userspace. They are needed for GL4.5, Vulkan and zero-copy virtio-gpu. For Mesa, blob resources have been tested with Piglit's ARB_buffer_storage tests and apitraces. Apitraces of GL4.5 games show we're between 70% to 80% of host performance on Iris, based on a apitrace of a 2013 GL4.5 game: 11.204 FPS (guest) 15.947 FPS (host) This is still better than the status quo, when said game was unplayable with Virgl due to an inefficient GL4.3 fallback. But there's still room for improvement if we want to match HW-assisted virtualization. For Vulkan, blob resources have been tested with dEQP.vk.memory* and running Vulkan applications in production with the "Cuttlefish" virtual Android device. This has been done with Lingfeng Yang's "gfxstream" Vulkan implementation, which virtualizes Vulkan across many Google products.

Gurchetan Singh committed 6 years ago

Commit eda3e101 parent e5cd6cb1 file · +36 −1Browse files

Showing the changes to include/uapi (1 of 1 file). Show all

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include/uapi/drm/virtgpu_drm.h+36−1
@@ -46,6 +46,7 @@ extern "C" { · 45 unmodified lines
46#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x0746#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
47#define DRM_VIRTGPU_WAIT 0x0847#define DRM_VIRTGPU_WAIT 0x08
48#define DRM_VIRTGPU_GET_CAPS 0x0948#define DRM_VIRTGPU_GET_CAPS 0x09
49#define DRM_VIRTGPU_RESOURCE_CREATE_BLOB 0x0a
49 50
50#define VIRTGPU_EXECBUF_FENCE_FD_IN 0x0151#define VIRTGPU_EXECBUF_FENCE_FD_IN 0x01
51#define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x0252#define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x02
@@ -71,6 +72,7 @@ struct drm_virtgpu_execbuffer { · 19 unmodified lines
71 72
72#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */73#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
73#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */74#define VIRTGPU_PARAM_CAPSET_QUERY_FIX 2 /* do we have the capset fix */
75#define VIRTGPU_PARAM_RESOURCE_BLOB 3 /* DRM_VIRTGPU_RESOURCE_CREATE_BLOB */
74 76
75struct drm_virtgpu_getparam {77struct drm_virtgpu_getparam {
76 __u64 param;78 __u64 param;
@@ -100,7 +102,7 @@ struct drm_virtgpu_resource_info { · 23 unmodified lines
100 __u32 bo_handle;102 __u32 bo_handle;
101 __u32 res_handle;103 __u32 res_handle;
102 __u32 size;104 __u32 size;
103 __u32 stride;105 __u32 blob_mem;
104};106};
105 107
106struct drm_virtgpu_3d_box {108struct drm_virtgpu_3d_box {
@@ -117,6 +119,8 @@ struct drm_virtgpu_3d_transfer_to_host { · 10 unmodified lines
117 struct drm_virtgpu_3d_box box;119 struct drm_virtgpu_3d_box box;
118 __u32 level;120 __u32 level;
119 __u32 offset;121 __u32 offset;
122 __u32 stride;
123 __u32 layer_stride;
120};124};
121 125
122struct drm_virtgpu_3d_transfer_from_host {126struct drm_virtgpu_3d_transfer_from_host {
@@ -124,6 +128,8 @@ struct drm_virtgpu_3d_transfer_from_host { · 1 unmodified line
124 struct drm_virtgpu_3d_box box;128 struct drm_virtgpu_3d_box box;
125 __u32 level;129 __u32 level;
126 __u32 offset;130 __u32 offset;
131 __u32 stride;
132 __u32 layer_stride;
127};133};
128 134
129#define VIRTGPU_WAIT_NOWAIT 1 /* like it */135#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
@@ -140,6 +146,31 @@ struct drm_virtgpu_get_caps { · 10 unmodified lines
140 __u32 pad;146 __u32 pad;
141};147};
142 148
149struct drm_virtgpu_resource_create_blob {
150#define VIRTGPU_BLOB_MEM_GUEST 0x0001
151#define VIRTGPU_BLOB_MEM_HOST3D 0x0002
152#define VIRTGPU_BLOB_MEM_HOST3D_GUEST 0x0003
153
154#define VIRTGPU_BLOB_FLAG_USE_MAPPABLE 0x0001
155#define VIRTGPU_BLOB_FLAG_USE_SHAREABLE 0x0002
156#define VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE 0x0004
157 /* zero is invalid blob_mem */
158 __u32 blob_mem;
159 __u32 blob_flags;
160 __u32 bo_handle;
161 __u32 res_handle;
162 __u64 size;
163
164 /*
165 * for 3D contexts with VIRTGPU_BLOB_MEM_HOST3D_GUEST and
166 * VIRTGPU_BLOB_MEM_HOST3D otherwise, must be zero.
167 */
168 __u32 pad;
169 __u32 cmd_size;
170 __u64 cmd;
171 __u64 blob_id;
172};
173
143#define DRM_IOCTL_VIRTGPU_MAP \174#define DRM_IOCTL_VIRTGPU_MAP \
144 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)175 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
145 176
@@ -175,6 +206,10 @@ struct drm_virtgpu_get_caps { · 29 unmodified lines
175 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \206 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
176 struct drm_virtgpu_get_caps)207 struct drm_virtgpu_get_caps)
177 208
209#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB \
210 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE_BLOB, \
211 struct drm_virtgpu_resource_create_blob)
212
178#if defined(__cplusplus)213#if defined(__cplusplus)
179}214}
180#endif215#endif