Pull sound updates from Takashi Iwai: "There are no too intrusive changes in this update batch. The biggest LOC is found in the new DICE driver, and other small changes are scattered over the whole sound subtree (which is a common pattern). Below are highlights: - ALSA core: * Memory allocation support with genpool * Fix blocking in drain ioctl of compress_offload - HD-audio: * Improved AMD HDMI supports * Intel HDMI detection improvements * thinkpad_acpi mute-key integration * New PCI ID, New ALC255,285,293 codecs, CX20952 - USB-audio: * New buffer size management * Clean up endpoint handling codes - ASoC: * Further work on the dmaengine helpers, including support for configuring the parameters for DMA by reading the capabilities of the DMA controller which removes some guesswork and magic numbers from drivers. * A refresh of the documentation. * Conversions of many drivers to direct regmap API usage in order to allow the ASoC level register I/O code to be removed, this will hopefully be completed by v3.14. * Support for using async register I/O in DAPM, reducing the time taken to implement power transitions on systems that support it. - Firewire: DICE driver - Lots of small fixes for bugs reported by Coverity" * tag 'sound-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (382 commits) ALSA: hda/realtek - Add new codec ALC255/ALC3234 UAJ supported ALSA: hda - Apply MacBook fixups for CS4208 correctly ASoC: fsl: imx-wm8962: remove an unneeded check ASoC: fsl: imx-pcm-fiq: Remove unused 'runtime' variable ALSA: hda/realtek - Make fixup regs persist after resume ALSA: hda_intel: ratelimit "spurious response" message ASoC: generic-dmaengine-pcm: Use SNDRV_DMA_TYPE_DEV_IRAM as default ASoC: dapm: Use WARN_ON() instead of BUG_ON() ASoC: wm_adsp: Fix BUG_ON() and WARN_ON() usages ASoC: Replace BUG() with WARN() ASoC: wm_hubs: Replace BUG() with WARN() ASoC: wm8996: Replace BUG() with WARN() ASoC: wm8962: Replace BUG() with WARN() ASoC: wm8958: Replace BUG() with WARN() ASoC: wm8904: Replace BUG() with WARN() ASoC: wm8900: Replace BUG() with WARN() ASoC: wm8350: Replace BUG() with WARN() ASoC: txx9: Use WARN_ON() instead of BUG_ON() ASoC: sh: Use WARN_ON() instead of BUG_ON() ASoC: rcar: Use WARN_ON() instead of BUG_ON() ...
Unified · Split
| @@ -0,0 +1,22 @@ | ||
| 1 | +CS42L73 audio CODEC | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | + | |
| 5 | + - compatible : "cirrus,cs42l73" | |
| 6 | + | |
| 7 | + - reg : the I2C address of the device for I2C | |
| 8 | + | |
| 9 | +Optional properties: | |
| 10 | + | |
| 11 | + - reset_gpio : a GPIO spec for the reset pin. | |
| 12 | + - chgfreq : Charge Pump Frequency values 0x00-0x0F | |
| 13 | + | |
| 14 | + | |
| 15 | +Example: | |
| 16 | + | |
| 17 | +codec: cs42l73@4a { | |
| 18 | + compatible = "cirrus,cs42l73"; | |
| 19 | + reg = <0x4a>; | |
| 20 | + reset_gpio = <&gpio 10 0>; | |
| 21 | + chgfreq = <0x05>; | |
| 22 | +}; | |
| @@ -0,0 +1,42 @@ | ||
| 1 | +* Texas Instruments SoC audio setups with TLV320AIC3X Codec | |
| 2 | + | |
| 3 | +Required properties: | |
| 4 | +- compatible : "ti,da830-evm-audio" : forDM365/DA8xx/OMAPL1x/AM33xx | |
| 5 | +- ti,model : The user-visible name of this sound complex. | |
| 6 | +- ti,audio-codec : The phandle of the TLV320AIC3x audio codec | |
| 7 | +- ti,mcasp-controller : The phandle of the McASP controller | |
| 8 | +- ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec | |
| 9 | +- ti,audio-routing : A list of the connections between audio components. | |
| 10 | + Each entry is a pair of strings, the first being the connection's sink, | |
| 11 | + the second being the connection's source. Valid names for sources and | |
| 12 | + sinks are the codec's pins, and the jacks on the board: | |
| 13 | + | |
| 14 | + Board connectors: | |
| 15 | + | |
| 16 | + * Headphone Jack | |
| 17 | + * Line Out | |
| 18 | + * Mic Jack | |
| 19 | + * Line In | |
| 20 | + | |
| 21 | + | |
| 22 | +Example: | |
| 23 | + | |
| 24 | +sound { | |
| 25 | + compatible = "ti,da830-evm-audio"; | |
| 26 | + ti,model = "DA830 EVM"; | |
| 27 | + ti,audio-codec = <&tlv320aic3x>; | |
| 28 | + ti,mcasp-controller = <&mcasp1>; | |
| 29 | + ti,codec-clock-rate = <12000000>; | |
| 30 | + ti,audio-routing = | |
| 31 | + "Headphone Jack", "HPLOUT", | |
| 32 | + "Headphone Jack", "HPROUT", | |
| 33 | + "Line Out", "LLOUT", | |
| 34 | + "Line Out", "RLOUT", | |
| 35 | + "MIC3L", "Mic Bias 2V", | |
| 36 | + "MIC3R", "Mic Bias 2V", | |
| 37 | + "Mic Bias 2V", "Mic Jack", | |
| 38 | + "LINE1L", "Line In", | |
| 39 | + "LINE2L", "Line In", | |
| 40 | + "LINE1R", "Line In", | |
| 41 | + "LINE2R", "Line In"; | |
| 42 | +}; | |
| @@ -4,17 +4,25 @@ Required properties: · 3 unmodified lines | ||
| 4 | 4 | - compatible : |
| 5 | 5 | "ti,dm646x-mcasp-audio" : for DM646x platforms |
| 6 | 6 | "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms |
| 7 | − "ti,omap2-mcasp-audio" : for OMAP2 platforms (TI81xx, AM33xx) | |
| 8 | − | |
| 9 | −- reg : Should contain McASP registers offset and length | |
| 10 | −- interrupts : Interrupt number for McASP | |
| 11 | −- op-mode : I2S/DIT ops mode. | |
| 12 | −- tdm-slots : Slots for TDM operation. | |
| 13 | −- num-serializer : Serializers used by McASP. | |
| 14 | −- serial-dir : A list of serializer pin mode. The list number should be equal | |
| 15 | − to "num-serializer" parameter. Each entry is a number indication | |
| 16 | − serializer pin direction. (0 - INACTIVE, 1 - TX, 2 - RX) | |
| 7 | + "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, TI81xx) | |
| 17 | 8 | |
| 9 | +- reg : Should contain reg specifiers for the entries in the reg-names property. | |
| 10 | +- reg-names : Should contain: | |
| 11 | + * "mpu" for the main registers (required). For compatibility with | |
| 12 | + existing software, it is recommended this is the first entry. | |
| 13 | + * "dat" for separate data port register access (optional). | |
| 14 | +- op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF, | |
| 15 | + IEC60958-1, and AES-3 formats. | |
| 16 | +- tdm-slots : Slots for TDM operation. Indicates number of channels transmitted | |
| 17 | + or received over one serializer. | |
| 18 | +- serial-dir : A list of serializer configuration. Each entry is a number | |
| 19 | + indication for serializer pin direction. | |
| 20 | + (0 - INACTIVE, 1 - TX, 2 - RX) | |
| 21 | +- dmas: two element list of DMA controller phandles and DMA request line | |
| 22 | + ordered pairs. | |
| 23 | +- dma-names: identifier string for each DMA request line in the dmas property. | |
| 24 | + These strings correspond 1:1 with the ordered pairs in dmas. The dma | |
| 25 | + identifiers must be "rx" and "tx". | |
| 18 | 26 | |
| 19 | 27 | Optional properties: |
| 20 | 28 | |
| @@ -23,18 +31,23 @@ Optional properties: · 2 unmodified lines | ||
| 23 | 31 | - rx-num-evt : FIFO levels. |
| 24 | 32 | - sram-size-playback : size of sram to be allocated during playback |
| 25 | 33 | - sram-size-capture : size of sram to be allocated during capture |
| 34 | +- interrupts : Interrupt numbers for McASP, currently not used by the driver | |
| 35 | +- interrupt-names : Known interrupt names are "tx" and "rx" | |
| 36 | +- pinctrl-0: Should specify pin control group used for this controller. | |
| 37 | +- pinctrl-names: Should contain only one value - "default", for more details | |
| 38 | + please refer to pinctrl-bindings.txt | |
| 39 | + | |
| 26 | 40 | |
| 27 | 41 | Example: |
| 28 | 42 | |
| 29 | 43 | mcasp0: mcasp0@1d00000 { |
| 30 | 44 | compatible = "ti,da830-mcasp-audio"; |
| 31 | − #address-cells = <1>; | |
| 32 | − #size-cells = <0>; | |
| 33 | 45 | reg = <0x100000 0x3000>; |
| 34 | − interrupts = <82 83>; | |
| 46 | + reg-names "mpu"; | |
| 47 | + interrupts = <82>, <83>; | |
| 48 | + interrupts-names = "tx", "rx"; | |
| 35 | 49 | op-mode = <0>; /* MCASP_IIS_MODE */ |
| 36 | 50 | tdm-slots = <2>; |
| 37 | − num-serializer = <16>; | |
| 38 | 51 | serial-dir = < |
| 39 | 52 | 0 0 0 0 /* 0: INACTIVE, 1: TX, 2: RX */ |
| 40 | 53 | 0 0 0 0 |
| @@ -24,10 +24,36 @@ Optional properties: · 23 unmodified lines | ||
| 24 | 24 | 3 - MICBIAS output is connected to AVDD, |
| 25 | 25 | If this node is not mentioned or if the value is incorrect, then MicBias |
| 26 | 26 | is powered down. |
| 27 | +- AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the | |
| 28 | + device as covered in Documentation/devicetree/bindings/regulator/regulator.txt | |
| 29 | + | |
| 30 | +CODEC output pins: | |
| 31 | + * LLOUT | |
| 32 | + * RLOUT | |
| 33 | + * MONO_LOUT | |
| 34 | + * HPLOUT | |
| 35 | + * HPROUT | |
| 36 | + * HPLCOM | |
| 37 | + * HPRCOM | |
| 38 | + | |
| 39 | +CODEC input pins: | |
| 40 | + * MIC3L | |
| 41 | + * MIC3R | |
| 42 | + * LINE1L | |
| 43 | + * LINE2L | |
| 44 | + * LINE1R | |
| 45 | + * LINE2R | |
| 46 | + | |
| 47 | +The pins can be used in referring sound node's audio-routing property. | |
| 27 | 48 | |
| 28 | 49 | Example: |
| 29 | 50 | |
| 30 | 51 | tlv320aic3x: tlv320aic3x@1b { |
| 31 | 52 | compatible = "ti,tlv320aic3x"; |
| 32 | 53 | reg = <0x1b>; |
| 54 | + | |
| 55 | + AVDD-supply = <®ulator>; | |
| 56 | + IOVDD-supply = <®ulator>; | |
| 57 | + DRVDD-supply = <®ulator>; | |
| 58 | + DVDD-supply = <®ulator>; | |
| 33 | 59 | }; |
| @@ -0,0 +1,27 @@ | ||
| 1 | +Texas Instruments - tpa6130a2 Codec module | |
| 2 | + | |
| 3 | +The tpa6130a2 serial control bus communicates through I2C protocols | |
| 4 | + | |
| 5 | +Required properties: | |
| 6 | + | |
| 7 | +- compatible - "string" - One of: | |
| 8 | + "ti,tpa6130a2" - TPA6130A2 | |
| 9 | + "ti,tpa6140a2" - TPA6140A2 | |
| 10 | + | |
| 11 | + | |
| 12 | +- reg - <int> - I2C slave address | |
| 13 | + | |
| 14 | +- Vdd-supply - <phandle> - power supply regulator | |
| 15 | + | |
| 16 | +Optional properties: | |
| 17 | + | |
| 18 | +- power-gpio - gpio pin to power the device | |
| 19 | + | |
| 20 | +Example: | |
| 21 | + | |
| 22 | +tpa6130a2: tpa6130a2@60 { | |
| 23 | + compatible = "ti,tpa6130a2"; | |
| 24 | + reg = <0x60>; | |
| 25 | + Vdd-supply = <&vmmc2>; | |
| 26 | + power-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>; | |
| 27 | +}; | |
| @@ -138,6 +138,7 @@ Code Seq#(hex) Include File Comments · 137 unmodified lines | ||
| 138 | 138 | 'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict! |
| 139 | 139 | 'H' C0-DF net/bluetooth/bnep/bnep.h conflict! |
| 140 | 140 | 'H' F1 linux/hid-roccat.h <mailto:erazor_de@users.sourceforge.net> |
| 141 | +'H' F8-FA sound/firewire.h | |
| 141 | 142 | 'I' all linux/isdn.h conflict! |
| 142 | 143 | 'I' 00-0F drivers/isdn/divert/isdn_divert.h conflict! |
| 143 | 144 | 'I' 40-4F linux/mISDNif.h conflict! |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | ThinkPad ACPI Extras Driver |
| 2 | 2 | |
| 3 | − Version 0.24 | |
| 4 | − December 11th, 2009 | |
| 3 | + Version 0.25 | |
| 4 | + October 16th, 2013 | |
| 5 | 5 | |
| 6 | 6 | Borislav Deianov <borislav@users.sf.net> |
| 7 | 7 | Henrique de Moraes Holschuh <hmh@hmh.eng.br> |
| @@ -741,6 +741,9 @@ compiled with the CONFIG_THINKPAD_ACPI_UNSAFE_LEDS option enabled. · 733 unmodified lines | ||
| 741 | 741 | Distributions must never enable this option. Individual users that |
| 742 | 742 | are aware of the consequences are welcome to enabling it. |
| 743 | 743 | |
| 744 | +Audio mute and microphone mute LEDs are supported, but currently not | |
| 745 | +visible to userspace. They are used by the snd-hda-intel audio driver. | |
| 746 | + | |
| 744 | 747 | procfs notes: |
| 745 | 748 | |
| 746 | 749 | The available commands are: |
| @@ -616,7 +616,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 615 unmodified lines | ||
| 616 | 616 | |
| 617 | 617 | As default, snd-dummy drivers doesn't allocate the real buffers |
| 618 | 618 | but either ignores read/write or mmap a single dummy page to all |
| 619 | − buffer pages, in order to save the resouces. If your apps need | |
| 619 | + buffer pages, in order to save the resources. If your apps need | |
| 620 | 620 | the read/ written buffer data to be consistent, pass fake_buffer=0 |
| 621 | 621 | option. |
| 622 | 622 | |
| @@ -232,7 +232,7 @@ The parameter can be given: · 231 unmodified lines | ||
| 232 | 232 | # modprobe snd-usb-audio index=1 device_setup=0x09 |
| 233 | 233 | |
| 234 | 234 | * Or while configuring the modules options in your modules configuration file |
| 235 | − (tipically a .conf file in /etc/modprobe.d/ directory: | |
| 235 | + (typically a .conf file in /etc/modprobe.d/ directory: | |
| 236 | 236 | alias snd-card-1 snd-usb-audio |
| 237 | 237 | options snd-usb-audio index=1 device_setup=0x09 |
| 238 | 238 | |
| @@ -87,7 +87,7 @@ with 4 channels, · 86 unmodified lines | ||
| 87 | 87 | |
| 88 | 88 | and use the interleaved 4 channel data. |
| 89 | 89 | |
| 90 | −There are some control switchs affecting to the speaker connections: | |
| 90 | +There are some control switches affecting to the speaker connections: | |
| 91 | 91 | |
| 92 | 92 | "Line-In Mode" - an enum control to change the behavior of line-in |
| 93 | 93 | jack. Either "Line-In", "Rear Output" or "Bass Output" can |
| @@ -217,12 +217,12 @@ Not supported: · 216 unmodified lines | ||
| 217 | 217 | would be enabled with ALSA kcontrols. |
| 218 | 218 | |
| 219 | 219 | - Audio policy/resource management. This API does not provide any |
| 220 | − hooks to query the utilization of the audio DSP, nor any premption | |
| 220 | + hooks to query the utilization of the audio DSP, nor any preemption | |
| 221 | 221 | mechanisms. |
| 222 | 222 | |
| 223 | −- No notion of underun/overrun. Since the bytes written are compressed | |
| 223 | +- No notion of underrun/overrun. Since the bytes written are compressed | |
| 224 | 224 | in nature and data written/read doesn't translate directly to |
| 225 | − rendered output in time, this does not deal with underrun/overun and | |
| 225 | + rendered output in time, this does not deal with underrun/overrun and | |
| 226 | 226 | maybe dealt in user-library |
| 227 | 227 | |
| 228 | 228 | Credits: |
| @@ -0,0 +1,380 @@ | ||
| 1 | +Dynamic PCM | |
| 2 | +=========== | |
| 3 | + | |
| 4 | +1. Description | |
| 5 | +============== | |
| 6 | + | |
| 7 | +Dynamic PCM allows an ALSA PCM device to digitally route its PCM audio to | |
| 8 | +various digital endpoints during the PCM stream runtime. e.g. PCM0 can route | |
| 9 | +digital audio to I2S DAI0, I2S DAI1 or PDM DAI2. This is useful for on SoC DSP | |
| 10 | +drivers that expose several ALSA PCMs and can route to multiple DAIs. | |
| 11 | + | |
| 12 | +The DPCM runtime routing is determined by the ALSA mixer settings in the same | |
| 13 | +way as the analog signal is routed in an ASoC codec driver. DPCM uses a DAPM | |
| 14 | +graph representing the DSP internal audio paths and uses the mixer settings to | |
| 15 | +determine the patch used by each ALSA PCM. | |
| 16 | + | |
| 17 | +DPCM re-uses all the existing component codec, platform and DAI drivers without | |
| 18 | +any modifications. | |
| 19 | + | |
| 20 | + | |
| 21 | +Phone Audio System with SoC based DSP | |
| 22 | +------------------------------------- | |
| 23 | + | |
| 24 | +Consider the following phone audio subsystem. This will be used in this | |
| 25 | +document for all examples :- | |
| 26 | + | |
| 27 | +| Front End PCMs | SoC DSP | Back End DAIs | Audio devices | | |
| 28 | + | |
| 29 | + ************* | |
| 30 | +PCM0 <------------> * * <----DAI0-----> Codec Headset | |
| 31 | + * * | |
| 32 | +PCM1 <------------> * * <----DAI1-----> Codec Speakers | |
| 33 | + * DSP * | |
| 34 | +PCM2 <------------> * * <----DAI2-----> MODEM | |
| 35 | + * * | |
| 36 | +PCM3 <------------> * * <----DAI3-----> BT | |
| 37 | + * * | |
| 38 | + * * <----DAI4-----> DMIC | |
| 39 | + * * | |
| 40 | + * * <----DAI5-----> FM | |
| 41 | + ************* | |
| 42 | + | |
| 43 | +This diagram shows a simple smart phone audio subsystem. It supports Bluetooth, | |
| 44 | +FM digital radio, Speakers, Headset Jack, digital microphones and cellular | |
| 45 | +modem. This sound card exposes 4 DSP front end (FE) ALSA PCM devices and | |
| 46 | +supports 6 back end (BE) DAIs. Each FE PCM can digitally route audio data to any | |
| 47 | +of the BE DAIs. The FE PCM devices can also route audio to more than 1 BE DAI. | |
| 48 | + | |
| 49 | + | |
| 50 | + | |
| 51 | +Example - DPCM Switching playback from DAI0 to DAI1 | |
| 52 | +--------------------------------------------------- | |
| 53 | + | |
| 54 | +Audio is being played to the Headset. After a while the user removes the headset | |
| 55 | +and audio continues playing on the speakers. | |
| 56 | + | |
| 57 | +Playback on PCM0 to Headset would look like :- | |
| 58 | + | |
| 59 | + ************* | |
| 60 | +PCM0 <============> * * <====DAI0=====> Codec Headset | |
| 61 | + * * | |
| 62 | +PCM1 <------------> * * <----DAI1-----> Codec Speakers | |
| 63 | + * DSP * | |
| 64 | +PCM2 <------------> * * <----DAI2-----> MODEM | |
| 65 | + * * | |
| 66 | +PCM3 <------------> * * <----DAI3-----> BT | |
| 67 | + * * | |
| 68 | + * * <----DAI4-----> DMIC | |
| 69 | + * * | |
| 70 | + * * <----DAI5-----> FM | |
| 71 | + ************* | |
| 72 | + | |
| 73 | +The headset is removed from the jack by user so the speakers must now be used :- | |
| 74 | + | |
| 75 | + ************* | |
| 76 | +PCM0 <============> * * <----DAI0-----> Codec Headset | |
| 77 | + * * | |
| 78 | +PCM1 <------------> * * <====DAI1=====> Codec Speakers | |
| 79 | + * DSP * | |
| 80 | +PCM2 <------------> * * <----DAI2-----> MODEM | |
| 81 | + * * | |
| 82 | +PCM3 <------------> * * <----DAI3-----> BT | |
| 83 | + * * | |
| 84 | + * * <----DAI4-----> DMIC | |
| 85 | + * * | |
| 86 | + * * <----DAI5-----> FM | |
| 87 | + ************* | |
| 88 | + | |
| 89 | +The audio driver processes this as follows :- | |
| 90 | + | |
| 91 | + 1) Machine driver receives Jack removal event. | |
| 92 | + | |
| 93 | + 2) Machine driver OR audio HAL disables the Headset path. | |
| 94 | + | |
| 95 | + 3) DPCM runs the PCM trigger(stop), hw_free(), shutdown() operations on DAI0 | |
| 96 | + for headset since the path is now disabled. | |
| 97 | + | |
| 98 | + 4) Machine driver or audio HAL enables the speaker path. | |
| 99 | + | |
| 100 | + 5) DPCM runs the PCM ops for startup(), hw_params(), prepapre() and | |
| 101 | + trigger(start) for DAI1 Speakers since the path is enabled. | |
| 102 | + | |
| 103 | +In this example, the machine driver or userspace audio HAL can alter the routing | |
| 104 | +and then DPCM will take care of managing the DAI PCM operations to either bring | |
| 105 | +the link up or down. Audio playback does not stop during this transition. | |
| 106 | + | |
| 107 | + | |
| 108 | + | |
| 109 | +DPCM machine driver | |
| 110 | +=================== | |
| 111 | + | |
| 112 | +The DPCM enabled ASoC machine driver is similar to normal machine drivers | |
| 113 | +except that we also have to :- | |
| 114 | + | |
| 115 | + 1) Define the FE and BE DAI links. | |
| 116 | + | |
| 117 | + 2) Define any FE/BE PCM operations. | |
| 118 | + | |
| 119 | + 3) Define widget graph connections. | |
| 120 | + | |
| 121 | + | |
| 122 | +1 FE and BE DAI links | |
| 123 | +--------------------- | |
| 124 | + | |
| 125 | +| Front End PCMs | SoC DSP | Back End DAIs | Audio devices | | |
| 126 | + | |
| 127 | + ************* | |
| 128 | +PCM0 <------------> * * <----DAI0-----> Codec Headset | |
| 129 | + * * | |
| 130 | +PCM1 <------------> * * <----DAI1-----> Codec Speakers | |
| 131 | + * DSP * | |
| 132 | +PCM2 <------------> * * <----DAI2-----> MODEM | |
| 133 | + * * | |
| 134 | +PCM3 <------------> * * <----DAI3-----> BT | |
| 135 | + * * | |
| 136 | + * * <----DAI4-----> DMIC | |
| 137 | + * * | |
| 138 | + * * <----DAI5-----> FM | |
| 139 | + ************* | |
| 140 | + | |
| 141 | +For the example above we have to define 4 FE DAI links and 6 BE DAI links. The | |
| 142 | +FE DAI links are defined as follows :- | |
| 143 | + | |
| 144 | +static struct snd_soc_dai_link machine_dais[] = { | |
| 145 | + { | |
| 146 | + .name = "PCM0 System", | |
| 147 | + .stream_name = "System Playback", | |
| 148 | + .cpu_dai_name = "System Pin", | |
| 149 | + .platform_name = "dsp-audio", | |
| 150 | + .codec_name = "snd-soc-dummy", | |
| 151 | + .codec_dai_name = "snd-soc-dummy-dai", | |
| 152 | + .dynamic = 1, | |
| 153 | + .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | |
| 154 | + .dpcm_playback = 1, | |
| 155 | + }, | |
| 156 | + .....< other FE and BE DAI links here > | |
| 157 | +}; | |
| 158 | + | |
| 159 | +This FE DAI link is pretty similar to a regular DAI link except that we also | |
| 160 | +set the DAI link to a DPCM FE with the "dynamic = 1". The supported FE stream | |
| 161 | +directions should also be set with the "dpcm_playback" and "dpcm_capture" | |
| 162 | +flags. There is also an option to specify the ordering of the trigger call for | |
| 163 | +each FE. This allows the ASoC core to trigger the DSP before or after the other | |
| 164 | +components (as some DSPs have strong requirements for the ordering DAI/DSP | |
| 165 | +start and stop sequences). | |
| 166 | + | |
| 167 | +The FE DAI above sets the codec and code DAIs to dummy devices since the BE is | |
| 168 | +dynamic and will change depending on runtime config. | |
| 169 | + | |
| 170 | +The BE DAIs are configured as follows :- | |
| 171 | + | |
| 172 | +static struct snd_soc_dai_link machine_dais[] = { | |
| 173 | + .....< FE DAI links here > | |
| 174 | + { | |
| 175 | + .name = "Codec Headset", | |
| 176 | + .cpu_dai_name = "ssp-dai.0", | |
| 177 | + .platform_name = "snd-soc-dummy", | |
| 178 | + .no_pcm = 1, | |
| 179 | + .codec_name = "rt5640.0-001c", | |
| 180 | + .codec_dai_name = "rt5640-aif1", | |
| 181 | + .ignore_suspend = 1, | |
| 182 | + .ignore_pmdown_time = 1, | |
| 183 | + .be_hw_params_fixup = hswult_ssp0_fixup, | |
| 184 | + .ops = &haswell_ops, | |
| 185 | + .dpcm_playback = 1, | |
| 186 | + .dpcm_capture = 1, | |
| 187 | + }, | |
| 188 | + .....< other BE DAI links here > | |
| 189 | +}; | |
| 190 | + | |
| 191 | +This BE DAI link connects DAI0 to the codec (in this case RT5460 AIF1). It sets | |
| 192 | +the "no_pcm" flag to mark it has a BE and sets flags for supported stream | |
| 193 | +directions using "dpcm_playback" and "dpcm_capture" above. | |
| 194 | + | |
| 195 | +The BE has also flags set for ignoring suspend and PM down time. This allows | |
| 196 | +the BE to work in a hostless mode where the host CPU is not transferring data | |
| 197 | +like a BT phone call :- | |
| 198 | + | |
| 199 | + ************* | |
| 200 | +PCM0 <------------> * * <----DAI0-----> Codec Headset | |
| 201 | + * * | |
| 202 | +PCM1 <------------> * * <----DAI1-----> Codec Speakers | |
| 203 | + * DSP * | |
| 204 | +PCM2 <------------> * * <====DAI2=====> MODEM | |
| 205 | + * * | |
| 206 | +PCM3 <------------> * * <====DAI3=====> BT | |
| 207 | + * * | |
| 208 | + * * <----DAI4-----> DMIC | |
| 209 | + * * | |
| 210 | + * * <----DAI5-----> FM | |
| 211 | + ************* | |
| 212 | + | |
| 213 | +This allows the host CPU to sleep whilst the DSP, MODEM DAI and the BT DAI are | |
| 214 | +still in operation. | |
| 215 | + | |
| 216 | +A BE DAI link can also set the codec to a dummy device if the code is a device | |
| 217 | +that is managed externally. | |
| 218 | + | |
| 219 | +Likewise a BE DAI can also set a dummy cpu DAI if the CPU DAI is managed by the | |
| 220 | +DSP firmware. | |
| 221 | + | |
| 222 | + | |
| 223 | +2 FE/BE PCM operations | |
| 224 | +---------------------- | |
| 225 | + | |
| 226 | +The BE above also exports some PCM operations and a "fixup" callback. The fixup | |
| 227 | +callback is used by the machine driver to (re)configure the DAI based upon the | |
| 228 | +FE hw params. i.e. the DSP may perform SRC or ASRC from the FE to BE. | |
| 229 | + | |
| 230 | +e.g. DSP converts all FE hw params to run at fixed rate of 48k, 16bit, stereo for | |
| 231 | +DAI0. This means all FE hw_params have to be fixed in the machine driver for | |
| 232 | +DAI0 so that the DAI is running at desired configuration regardless of the FE | |
| 233 | +configuration. | |
| 234 | + | |
| 235 | +static int dai0_fixup(struct snd_soc_pcm_runtime *rtd, | |
| 236 | + struct snd_pcm_hw_params *params) | |
| 237 | +{ | |
| 238 | + struct snd_interval *rate = hw_param_interval(params, | |
| 239 | + SNDRV_PCM_HW_PARAM_RATE); | |
| 240 | + struct snd_interval *channels = hw_param_interval(params, | |
| 241 | + SNDRV_PCM_HW_PARAM_CHANNELS); | |
| 242 | + | |
| 243 | + /* The DSP will covert the FE rate to 48k, stereo */ | |
| 244 | + rate->min = rate->max = 48000; | |
| 245 | + channels->min = channels->max = 2; | |
| 246 | + | |
| 247 | + /* set DAI0 to 16 bit */ | |
| 248 | + snd_mask_set(¶ms->masks[SNDRV_PCM_HW_PARAM_FORMAT - | |
| 249 | + SNDRV_PCM_HW_PARAM_FIRST_MASK], | |
| 250 | + SNDRV_PCM_FORMAT_S16_LE); | |
| 251 | + return 0; | |
| 252 | +} | |
| 253 | + | |
| 254 | +The other PCM operation are the same as for regular DAI links. Use as necessary. | |
| 255 | + | |
| 256 | + | |
| 257 | +3 Widget graph connections | |
| 258 | +-------------------------- | |
| 259 | + | |
| 260 | +The BE DAI links will normally be connected to the graph at initialisation time | |
| 261 | +by the ASoC DAPM core. However, if the BE codec or BE DAI is a dummy then this | |
| 262 | +has to be set explicitly in the driver :- | |
| 263 | + | |
| 264 | +/* BE for codec Headset - DAI0 is dummy and managed by DSP FW */ | |
| 265 | +{"DAI0 CODEC IN", NULL, "AIF1 Capture"}, | |
| 266 | +{"AIF1 Playback", NULL, "DAI0 CODEC OUT"}, | |
| 267 | + | |
| 268 | + | |
| 269 | +Writing a DPCM DSP driver | |
| 270 | +========================= | |
| 271 | + | |
| 272 | +The DPCM DSP driver looks much like a standard platform class ASoC driver | |
| 273 | +combined with elements from a codec class driver. A DSP platform driver must | |
| 274 | +implement :- | |
| 275 | + | |
| 276 | + 1) Front End PCM DAIs - i.e. struct snd_soc_dai_driver. | |
| 277 | + | |
| 278 | + 2) DAPM graph showing DSP audio routing from FE DAIs to BEs. | |
| 279 | + | |
| 280 | + 3) DAPM widgets from DSP graph. | |
| 281 | + | |
| 282 | + 4) Mixers for gains, routing, etc. | |
| 283 | + | |
| 284 | + 5) DMA configuration. | |
| 285 | + | |
| 286 | + 6) BE AIF widgets. | |
| 287 | + | |
| 288 | +Items 6 is important for routing the audio outside of the DSP. AIF need to be | |
| 289 | +defined for each BE and each stream direction. e.g for BE DAI0 above we would | |
| 290 | +have :- | |
| 291 | + | |
| 292 | +SND_SOC_DAPM_AIF_IN("DAI0 RX", NULL, 0, SND_SOC_NOPM, 0, 0), | |
| 293 | +SND_SOC_DAPM_AIF_OUT("DAI0 TX", NULL, 0, SND_SOC_NOPM, 0, 0), | |
| 294 | + | |
| 295 | +The BE AIF are used to connect the DSP graph to the graphs for the other | |
| 296 | +component drivers (e.g. codec graph). | |
| 297 | + | |
| 298 | + | |
| 299 | +Hostless PCM streams | |
| 300 | +==================== | |
| 301 | + | |
| 302 | +A hostless PCM stream is a stream that is not routed through the host CPU. An | |
| 303 | +example of this would be a phone call from handset to modem. | |
| 304 | + | |
| 305 | + | |
| 306 | + ************* | |
| 307 | +PCM0 <------------> * * <----DAI0-----> Codec Headset | |
| 308 | + * * | |
| 309 | +PCM1 <------------> * * <====DAI1=====> Codec Speakers/Mic | |
| 310 | + * DSP * | |
| 311 | +PCM2 <------------> * * <====DAI2=====> MODEM | |
| 312 | + * * | |
| 313 | +PCM3 <------------> * * <----DAI3-----> BT | |
| 314 | + * * | |
| 315 | + * * <----DAI4-----> DMIC | |
| 316 | + * * | |
| 317 | + * * <----DAI5-----> FM | |
| 318 | + ************* | |
| 319 | + | |
| 320 | +In this case the PCM data is routed via the DSP. The host CPU in this use case | |
| 321 | +is only used for control and can sleep during the runtime of the stream. | |
| 322 | + | |
| 323 | +The host can control the hostless link either by :- | |
| 324 | + | |
| 325 | + 1) Configuring the link as a CODEC <-> CODEC style link. In this case the link | |
| 326 | + is enabled or disabled by the state of the DAPM graph. This usually means | |
| 327 | + there is a mixer control that can be used to connect or disconnect the path | |
| 328 | + between both DAIs. | |
| 329 | + | |
| 330 | + 2) Hostless FE. This FE has a virtual connection to the BE DAI links on the DAPM | |
| 331 | + graph. Control is then carried out by the FE as regular PCM operations. | |
| 332 | + This method gives more control over the DAI links, but requires much more | |
| 333 | + userspace code to control the link. Its recommended to use CODEC<->CODEC | |
| 334 | + unless your HW needs more fine grained sequencing of the PCM ops. | |
| 335 | + | |
| 336 | + | |
| 337 | +CODEC <-> CODEC link | |
| 338 | +-------------------- | |
| 339 | + | |
| 340 | +This DAI link is enabled when DAPM detects a valid path within the DAPM graph. | |
| 341 | +The machine driver sets some additional parameters to the DAI link i.e. | |
| 342 | + | |
| 343 | +static const struct snd_soc_pcm_stream dai_params = { | |
| 344 | + .formats = SNDRV_PCM_FMTBIT_S32_LE, | |
| 345 | + .rate_min = 8000, | |
| 346 | + .rate_max = 8000, | |
| 347 | + .channels_min = 2, | |
| 348 | + .channels_max = 2, | |
| 349 | +}; | |
| 350 | + | |
| 351 | +static struct snd_soc_dai_link dais[] = { | |
| 352 | + < ... more DAI links above ... > | |
| 353 | + { | |
| 354 | + .name = "MODEM", | |
| 355 | + .stream_name = "MODEM", | |
| 356 | + .cpu_dai_name = "dai2", | |
| 357 | + .codec_dai_name = "modem-aif1", | |
| 358 | + .codec_name = "modem", | |
| 359 | + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | |
| 360 | + | SND_SOC_DAIFMT_CBM_CFM, | |
| 361 | + .params = &dai_params, | |
| 362 | + } | |
| 363 | + < ... more DAI links here ... > | |
| 364 | + | |
| 365 | +These parameters are used to configure the DAI hw_params() when DAPM detects a | |
| 366 | +valid path and then calls the PCM operations to start the link. DAPM will also | |
| 367 | +call the appropriate PCM operations to disable the DAI when the path is no | |
| 368 | +longer valid. | |
| 369 | + | |
| 370 | + | |
| 371 | +Hostless FE | |
| 372 | +----------- | |
| 373 | + | |
| 374 | +The DAI link(s) are enabled by a FE that does not read or write any PCM data. | |
| 375 | +This means creating a new FE that is connected with a virtual path to both | |
| 376 | +DAI links. The DAI links will be started when the FE PCM is started and stopped | |
| 377 | +when the FE PCM is stopped. Note that the FE PCM cannot read or write data in | |
| 378 | +this configuration. | |
| 379 | + | |
| 380 | + | |
| @@ -1,22 +1,23 @@ | ||
| 1 | −ASoC Codec Driver | |
| 2 | −================= | |
| 1 | +ASoC Codec Class Driver | |
| 2 | +======================= | |
| 3 | 3 | |
| 4 | −The codec driver is generic and hardware independent code that configures the | |
| 5 | −codec to provide audio capture and playback. It should contain no code that is | |
| 6 | −specific to the target platform or machine. All platform and machine specific | |
| 7 | −code should be added to the platform and machine drivers respectively. | |
| 4 | +The codec class driver is generic and hardware independent code that configures | |
| 5 | +the codec, FM, MODEM, BT or external DSP to provide audio capture and playback. | |
| 6 | +It should contain no code that is specific to the target platform or machine. | |
| 7 | +All platform and machine specific code should be added to the platform and | |
| 8 | +machine drivers respectively. | |
| 8 | 9 | |
| 9 | −Each codec driver *must* provide the following features:- | |
| 10 | +Each codec class driver *must* provide the following features:- | |
| 10 | 11 | |
| 11 | 12 | 1) Codec DAI and PCM configuration |
| 12 | − 2) Codec control IO - using I2C, 3 Wire(SPI) or both APIs | |
| 13 | + 2) Codec control IO - using RegMap API | |
| 13 | 14 | 3) Mixers and audio controls |
| 14 | 15 | 4) Codec audio operations |
| 16 | + 5) DAPM description. | |
| 17 | + 6) DAPM event handler. | |
| 15 | 18 | |
| 16 | 19 | Optionally, codec drivers can also provide:- |
| 17 | 20 | |
| 18 | − 5) DAPM description. | |
| 19 | − 6) DAPM event handler. | |
| 20 | 21 | 7) DAC Digital mute control. |
| 21 | 22 | |
| 22 | 23 | Its probably best to use this guide in conjunction with the existing codec |
| @@ -64,26 +65,9 @@ struct snd_soc_dai_driver wm8731_dai = { · 41 unmodified lines | ||
| 64 | 65 | 2 - Codec control IO |
| 65 | 66 | -------------------- |
| 66 | 67 | The codec can usually be controlled via an I2C or SPI style interface |
| 67 | −(AC97 combines control with data in the DAI). The codec drivers provide | |
| 68 | −functions to read and write the codec registers along with supplying a | |
| 69 | −register cache:- | |
| 70 | − | |
| 71 | − /* IO control data and register cache */ | |
| 72 | − void *control_data; /* codec control (i2c/3wire) data */ | |
| 73 | − void *reg_cache; | |
| 74 | − | |
| 75 | −Codec read/write should do any data formatting and call the hardware | |
| 76 | −read write below to perform the IO. These functions are called by the | |
| 77 | −core and ALSA when performing DAPM or changing the mixer:- | |
| 78 | − | |
| 79 | − unsigned int (*read)(struct snd_soc_codec *, unsigned int); | |
| 80 | − int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
| 81 | − | |
| 82 | −Codec hardware IO functions - usually points to either the I2C, SPI or AC97 | |
| 83 | −read/write:- | |
| 84 | − | |
| 85 | − hw_write_t hw_write; | |
| 86 | − hw_read_t hw_read; | |
| 68 | +(AC97 combines control with data in the DAI). The codec driver should use the | |
| 69 | +Regmap API for all codec IO. Please see include/linux/regmap.h and existing | |
| 70 | +codec drivers for example regmap usage. | |
| 87 | 71 | |
| 88 | 72 | |
| 89 | 73 | 3 - Mixers and audio controls |
| @@ -127,7 +111,7 @@ Defines a stereo enumerated control · 37 unmodified lines | ||
| 127 | 111 | |
| 128 | 112 | 4 - Codec Audio Operations |
| 129 | 113 | -------------------------- |
| 130 | −The codec driver also supports the following ALSA operations:- | |
| 114 | +The codec driver also supports the following ALSA PCM operations:- | |
| 131 | 115 | |
| 132 | 116 | /* SoC audio ops */ |
| 133 | 117 | struct snd_soc_ops { |
| @@ -21,7 +21,7 @@ level power systems. · 20 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | There are 4 power domains within DAPM |
| 23 | 23 | |
| 24 | − 1. Codec domain - VREF, VMID (core codec and audio power) | |
| 24 | + 1. Codec bias domain - VREF, VMID (core codec and audio power) | |
| 25 | 25 | Usually controlled at codec probe/remove and suspend/resume, although |
| 26 | 26 | can be set at stream time if power is not needed for sidetone, etc. |
| 27 | 27 | |
| @@ -30,7 +30,7 @@ There are 4 power domains within DAPM · 2 unmodified lines | ||
| 30 | 30 | machine driver and responds to asynchronous events e.g when HP |
| 31 | 31 | are inserted |
| 32 | 32 | |
| 33 | − 3. Path domain - audio susbsystem signal paths | |
| 33 | + 3. Path domain - audio subsystem signal paths | |
| 34 | 34 | Automatically set when mixer and mux settings are changed by the user. |
| 35 | 35 | e.g. alsamixer, amixer. |
| 36 | 36 | |
| @@ -63,14 +63,22 @@ Audio DAPM widgets fall into a number of types:- · 26 unmodified lines | ||
| 63 | 63 | o Line - Line Input/Output (and optional Jack) |
| 64 | 64 | o Speaker - Speaker |
| 65 | 65 | o Supply - Power or clock supply widget used by other widgets. |
| 66 | + o Regulator - External regulator that supplies power to audio components. | |
| 67 | + o Clock - External clock that supplies clock to audio components. | |
| 68 | + o AIF IN - Audio Interface Input (with TDM slot mask). | |
| 69 | + o AIF OUT - Audio Interface Output (with TDM slot mask). | |
| 70 | + o Siggen - Signal Generator. | |
| 71 | + o DAI IN - Digital Audio Interface Input. | |
| 72 | + o DAI OUT - Digital Audio Interface Output. | |
| 73 | + o DAI Link - DAI Link between two DAI structures */ | |
| 66 | 74 | o Pre - Special PRE widget (exec before all others) |
| 67 | 75 | o Post - Special POST widget (exec after all others) |
| 68 | 76 | |
| 69 | 77 | (Widgets are defined in include/sound/soc-dapm.h) |
| 70 | 78 | |
| 71 | −Widgets are usually added in the codec driver and the machine driver. There are | |
| 72 | −convenience macros defined in soc-dapm.h that can be used to quickly build a | |
| 73 | −list of widgets of the codecs and machines DAPM widgets. | |
| 79 | +Widgets can be added to the sound card by any of the component driver types. | |
| 80 | +There are convenience macros defined in soc-dapm.h that can be used to quickly | |
| 81 | +build a list of widgets of the codecs and machines DAPM widgets. | |
| 74 | 82 | |
| 75 | 83 | Most widgets have a name, register, shift and invert. Some widgets have extra |
| 76 | 84 | parameters for stream name and kcontrols. |
| @@ -80,11 +88,13 @@ parameters for stream name and kcontrols. · 3 unmodified lines | ||
| 80 | 88 | ------------------------- |
| 81 | 89 | |
| 82 | 90 | Stream Widgets relate to the stream power domain and only consist of ADCs |
| 83 | −(analog to digital converters) and DACs (digital to analog converters). | |
| 91 | +(analog to digital converters), DACs (digital to analog converters), | |
| 92 | +AIF IN and AIF OUT. | |
| 84 | 93 | |
| 85 | 94 | Stream widgets have the following format:- |
| 86 | 95 | |
| 87 | 96 | SND_SOC_DAPM_DAC(name, stream name, reg, shift, invert), |
| 97 | +SND_SOC_DAPM_AIF_IN(name, stream, slot, reg, shift, invert) | |
| 88 | 98 | |
| 89 | 99 | NOTE: the stream name must match the corresponding stream name in your codec |
| 90 | 100 | snd_soc_codec_dai. |
| @@ -94,6 +104,11 @@ e.g. stream widgets for HiFi playback and capture · 3 unmodified lines | ||
| 94 | 104 | SND_SOC_DAPM_DAC("HiFi DAC", "HiFi Playback", REG, 3, 1), |
| 95 | 105 | SND_SOC_DAPM_ADC("HiFi ADC", "HiFi Capture", REG, 2, 1), |
| 96 | 106 | |
| 107 | +e.g. stream widgets for AIF | |
| 108 | + | |
| 109 | +SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), | |
| 110 | +SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), | |
| 111 | + | |
| 97 | 112 | |
| 98 | 113 | 2.2 Path Domain Widgets |
| 99 | 114 | ----------------------- |
| @@ -121,12 +136,14 @@ If you dont want the mixer elements prefixed with the name of the mixer widget, · 21 unmodified lines | ||
| 121 | 136 | you can use SND_SOC_DAPM_MIXER_NAMED_CTL instead. the parameters are the same |
| 122 | 137 | as for SND_SOC_DAPM_MIXER. |
| 123 | 138 | |
| 124 | −2.3 Platform/Machine domain Widgets | |
| 125 | −----------------------------------- | |
| 139 | + | |
| 140 | +2.3 Machine domain Widgets | |
| 141 | +-------------------------- | |
| 126 | 142 | |
| 127 | 143 | Machine widgets are different from codec widgets in that they don't have a |
| 128 | 144 | codec register bit associated with them. A machine widget is assigned to each |
| 129 | −machine audio component (non codec) that can be independently powered. e.g. | |
| 145 | +machine audio component (non codec or DSP) that can be independently | |
| 146 | +powered. e.g. | |
| 130 | 147 | |
| 131 | 148 | o Speaker Amp |
| 132 | 149 | o Microphone Bias |
| @@ -146,12 +163,12 @@ static int spitz_mic_bias(struct snd_soc_dapm_widget* w, int event) · 13 unmodified lines | ||
| 146 | 163 | SND_SOC_DAPM_MIC("Mic Jack", spitz_mic_bias), |
| 147 | 164 | |
| 148 | 165 | |
| 149 | −2.4 Codec Domain | |
| 150 | −---------------- | |
| 166 | +2.4 Codec (BIAS) Domain | |
| 167 | +----------------------- | |
| 151 | 168 | |
| 152 | −The codec power domain has no widgets and is handled by the codecs DAPM event | |
| 153 | −handler. This handler is called when the codec powerstate is changed wrt to any | |
| 154 | −stream event or by kernel PM events. | |
| 169 | +The codec bias power domain has no widgets and is handled by the codecs DAPM | |
| 170 | +event handler. This handler is called when the codec powerstate is changed wrt | |
| 171 | +to any stream event or by kernel PM events. | |
| 155 | 172 | |
| 156 | 173 | |
| 157 | 174 | 2.5 Virtual Widgets |
| @@ -169,15 +186,16 @@ After all the widgets have been defined, they can then be added to the DAPM · 11 unmodified lines | ||
| 169 | 186 | subsystem individually with a call to snd_soc_dapm_new_control(). |
| 170 | 187 | |
| 171 | 188 | |
| 172 | −3. Codec Widget Interconnections | |
| 173 | −================================ | |
| 189 | +3. Codec/DSP Widget Interconnections | |
| 190 | +==================================== | |
| 174 | 191 | |
| 175 | −Widgets are connected to each other within the codec and machine by audio paths | |
| 176 | −(called interconnections). Each interconnection must be defined in order to | |
| 177 | −create a map of all audio paths between widgets. | |
| 192 | +Widgets are connected to each other within the codec, platform and machine by | |
| 193 | +audio paths (called interconnections). Each interconnection must be defined in | |
| 194 | +order to create a map of all audio paths between widgets. | |
| 178 | 195 | |
| 179 | −This is easiest with a diagram of the codec (and schematic of the machine audio | |
| 180 | −system), as it requires joining widgets together via their audio signal paths. | |
| 196 | +This is easiest with a diagram of the codec or DSP (and schematic of the machine | |
| 197 | +audio system), as it requires joining widgets together via their audio signal | |
| 198 | +paths. | |
| 181 | 199 | |
| 182 | 200 | e.g., from the WM8731 output mixer (wm8731.c) |
| 183 | 201 | |
| @@ -247,16 +265,9 @@ machine and includes the codec. e.g. · 63 unmodified lines | ||
| 247 | 265 | o Mic Jack |
| 248 | 266 | o Codec Pins |
| 249 | 267 | |
| 250 | −When a codec pin is NC it can be marked as not used with a call to | |
| 251 | − | |
| 252 | −snd_soc_dapm_set_endpoint(codec, "Widget Name", 0); | |
| 253 | − | |
| 254 | −The last argument is 0 for inactive and 1 for active. This way the pin and its | |
| 255 | −input widget will never be powered up and consume power. | |
| 256 | − | |
| 257 | −This also applies to machine widgets. e.g. if a headphone is connected to a | |
| 258 | −jack then the jack can be marked active. If the headphone is removed, then | |
| 259 | −the headphone jack can be marked inactive. | |
| 268 | +Endpoints are added to the DAPM graph so that their usage can be determined in | |
| 269 | +order to save power. e.g. NC codecs pins will be switched OFF, unconnected | |
| 270 | +jacks can also be switched OFF. | |
| 260 | 271 | |
| 261 | 272 | |
| 262 | 273 | 5 DAPM Widget Events |
| @@ -1,8 +1,10 @@ | ||
| 1 | 1 | ASoC Machine Driver |
| 2 | 2 | =================== |
| 3 | 3 | |
| 4 | −The ASoC machine (or board) driver is the code that glues together the platform | |
| 5 | −and codec drivers. | |
| 4 | +The ASoC machine (or board) driver is the code that glues together all the | |
| 5 | +component drivers (e.g. codecs, platforms and DAIs). It also describes the | |
| 6 | +relationships between each componnent which include audio paths, GPIOs, | |
| 7 | +interrupts, clocking, jacks and voltage regulators. | |
| 6 | 8 | |
| 7 | 9 | The machine driver can contain codec and platform specific code. It registers |
| 8 | 10 | the audio subsystem with the kernel as a platform device and is represented by |
| @@ -1,9 +1,9 @@ | ||
| 1 | 1 | ASoC Platform Driver |
| 2 | 2 | ==================== |
| 3 | 3 | |
| 4 | −An ASoC platform driver can be divided into audio DMA and SoC DAI configuration | |
| 5 | −and control. The platform drivers only target the SoC CPU and must have no board | |
| 6 | −specific code. | |
| 4 | +An ASoC platform driver class can be divided into audio DMA drivers, SoC DAI | |
| 5 | +drivers and DSP drivers. The platform drivers only target the SoC CPU and must | |
| 6 | +have no board specific code. | |
| 7 | 7 | |
| 8 | 8 | Audio DMA |
| 9 | 9 | ========= |
| @@ -64,3 +64,16 @@ Each SoC DAI driver must provide the following features:- · 54 unmodified lines | ||
| 64 | 64 | 5) Suspend and resume (optional) |
| 65 | 65 | |
| 66 | 66 | Please see codec.txt for a description of items 1 - 4. |
| 67 | + | |
| 68 | + | |
| 69 | +SoC DSP Drivers | |
| 70 | +=============== | |
| 71 | + | |
| 72 | +Each SoC DSP driver usually supplies the following features :- | |
| 73 | + | |
| 74 | + 1) DAPM graph | |
| 75 | + 2) Mixer controls | |
| 76 | + 3) DMA IO to/from DSP buffers (if applicable) | |
| 77 | + 4) Definition of DSP front end (FE) PCM devices. | |
| 78 | + | |
| 79 | +Please see DPCM.txt for a description of item 4. | |
| @@ -158,8 +158,6 @@ int mc13xxx_reg_read(struct mc13xxx *mc13xxx, unsigned int offset, u32 *val) · 157 unmodified lines | ||
| 158 | 158 | { |
| 159 | 159 | int ret; |
| 160 | 160 | |
| 161 | − BUG_ON(!mutex_is_locked(&mc13xxx->lock)); | |
| 162 | − | |
| 163 | 161 | if (offset > MC13XXX_NUMREGS) |
| 164 | 162 | return -EINVAL; |
| 165 | 163 | |
| @@ -172,8 +170,6 @@ EXPORT_SYMBOL(mc13xxx_reg_read); · 6 unmodified lines | ||
| 172 | 170 | |
| 173 | 171 | int mc13xxx_reg_write(struct mc13xxx *mc13xxx, unsigned int offset, u32 val) |
| 174 | 172 | { |
| 175 | − BUG_ON(!mutex_is_locked(&mc13xxx->lock)); | |
| 176 | − | |
| 177 | 173 | dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x\n", offset, val); |
| 178 | 174 | |
| 179 | 175 | if (offset > MC13XXX_NUMREGS || val > 0xffffff) |
| @@ -186,7 +182,6 @@ EXPORT_SYMBOL(mc13xxx_reg_write); · 6 unmodified lines | ||
| 186 | 182 | int mc13xxx_reg_rmw(struct mc13xxx *mc13xxx, unsigned int offset, |
| 187 | 183 | u32 mask, u32 val) |
| 188 | 184 | { |
| 189 | − BUG_ON(!mutex_is_locked(&mc13xxx->lock)); | |
| 190 | 185 | BUG_ON(val & ~mask); |
| 191 | 186 | dev_vdbg(mc13xxx->dev, "[0x%02x] <- 0x%06x (mask: 0x%06x)\n", |
| 192 | 187 | offset, val, mask); |
| @@ -94,10 +94,15 @@ static int mc13xxx_spi_write(void *context, const void *data, size_t count) · 93 unmodified lines | ||
| 94 | 94 | { |
| 95 | 95 | struct device *dev = context; |
| 96 | 96 | struct spi_device *spi = to_spi_device(dev); |
| 97 | + const char *reg = data; | |
| 97 | 98 | |
| 98 | 99 | if (count != 4) |
| 99 | 100 | return -ENOTSUPP; |
| 100 | 101 | |
| 102 | + /* include errata fix for spi audio problems */ | |
| 103 | + if (*reg == MC13783_AUDIO_CODEC || *reg == MC13783_AUDIO_DAC) | |
| 104 | + spi_write(spi, data, count); | |
| 105 | + | |
| 101 | 106 | return spi_write(spi, data, count); |
| 102 | 107 | } |
| 103 | 108 | |
| @@ -23,7 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | |
| 24 | 24 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 25 | 25 | |
| 26 | −#define TPACPI_VERSION "0.24" | |
| 26 | +#define TPACPI_VERSION "0.25" | |
| 27 | 27 | #define TPACPI_SYSFS_VERSION 0x020700 |
| 28 | 28 | |
| 29 | 29 | /* |
| @@ -88,6 +88,7 @@ · 58 unmodified lines | ||
| 88 | 88 | |
| 89 | 89 | #include <linux/pci_ids.h> |
| 90 | 90 | |
| 91 | +#include <linux/thinkpad_acpi.h> | |
| 91 | 92 | |
| 92 | 93 | /* ThinkPad CMOS commands */ |
| 93 | 94 | #define TP_CMOS_VOLUME_DOWN 0 |
| @@ -8350,6 +8351,91 @@ static struct ibm_struct fan_driver_data = { · 8256 unmodified lines | ||
| 8350 | 8351 | .resume = fan_resume, |
| 8351 | 8352 | }; |
| 8352 | 8353 | |
| 8354 | +/************************************************************************* | |
| 8355 | + * Mute LED subdriver | |
| 8356 | + */ | |
| 8357 | + | |
| 8358 | + | |
| 8359 | +struct tp_led_table { | |
| 8360 | + acpi_string name; | |
| 8361 | + int on_value; | |
| 8362 | + int off_value; | |
| 8363 | + int state; | |
| 8364 | +}; | |
| 8365 | + | |
| 8366 | +static struct tp_led_table led_tables[] = { | |
| 8367 | + [TPACPI_LED_MUTE] = { | |
| 8368 | + .name = "SSMS", | |
| 8369 | + .on_value = 1, | |
| 8370 | + .off_value = 0, | |
| 8371 | + }, | |
| 8372 | + [TPACPI_LED_MICMUTE] = { | |
| 8373 | + .name = "MMTS", | |
| 8374 | + .on_value = 2, | |
| 8375 | + .off_value = 0, | |
| 8376 | + }, | |
| 8377 | +}; | |
| 8378 | + | |
| 8379 | +static int mute_led_on_off(struct tp_led_table *t, bool state) | |
| 8380 | +{ | |
| 8381 | + acpi_handle temp; | |
| 8382 | + int output; | |
| 8383 | + | |
| 8384 | + if (!ACPI_SUCCESS(acpi_get_handle(hkey_handle, t->name, &temp))) { | |
| 8385 | + pr_warn("Thinkpad ACPI has no %s interface.\n", t->name); | |
| 8386 | + return -EIO; | |
| 8387 | + } | |
| 8388 | + | |
| 8389 | + if (!acpi_evalf(hkey_handle, &output, t->name, "dd", | |
| 8390 | + state ? t->on_value : t->off_value)) | |
| 8391 | + return -EIO; | |
| 8392 | + | |
| 8393 | + t->state = state; | |
| 8394 | + return state; | |
| 8395 | +} | |
| 8396 | + | |
| 8397 | +int tpacpi_led_set(int whichled, bool on) | |
| 8398 | +{ | |
| 8399 | + struct tp_led_table *t; | |
| 8400 | + | |
| 8401 | + if (whichled < 0 || whichled >= TPACPI_LED_MAX) | |
| 8402 | + return -EINVAL; | |
| 8403 | + | |
| 8404 | + t = &led_tables[whichled]; | |
| 8405 | + if (t->state < 0 || t->state == on) | |
| 8406 | + return t->state; | |
| 8407 | + return mute_led_on_off(t, on); | |
| 8408 | +} | |
| 8409 | +EXPORT_SYMBOL_GPL(tpacpi_led_set); | |
| 8410 | + | |
| 8411 | +static int mute_led_init(struct ibm_init_struct *iibm) | |
| 8412 | +{ | |
| 8413 | + acpi_handle temp; | |
| 8414 | + int i; | |
| 8415 | + | |
| 8416 | + for (i = 0; i < TPACPI_LED_MAX; i++) { | |
| 8417 | + struct tp_led_table *t = &led_tables[i]; | |
| 8418 | + if (ACPI_SUCCESS(acpi_get_handle(hkey_handle, t->name, &temp))) | |
| 8419 | + mute_led_on_off(t, false); | |
| 8420 | + else | |
| 8421 | + t->state = -ENODEV; | |
| 8422 | + } | |
| 8423 | + return 0; | |
| 8424 | +} | |
| 8425 | + | |
| 8426 | +static void mute_led_exit(void) | |
| 8427 | +{ | |
| 8428 | + int i; | |
| 8429 | + | |
| 8430 | + for (i = 0; i < TPACPI_LED_MAX; i++) | |
| 8431 | + tpacpi_led_set(i, false); | |
| 8432 | +} | |
| 8433 | + | |
| 8434 | +static struct ibm_struct mute_led_driver_data = { | |
| 8435 | + .name = "mute_led", | |
| 8436 | + .exit = mute_led_exit, | |
| 8437 | +}; | |
| 8438 | + | |
| 8353 | 8439 | /**************************************************************************** |
| 8354 | 8440 | **************************************************************************** |
| 8355 | 8441 | * |
| @@ -8768,6 +8854,10 @@ static struct ibm_init_struct ibms_init[] __initdata = { · 412 unmodified lines | ||
| 8768 | 8854 | .init = fan_init, |
| 8769 | 8855 | .data = &fan_driver_data, |
| 8770 | 8856 | }, |
| 8857 | + { | |
| 8858 | + .init = mute_led_init, | |
| 8859 | + .data = &mute_led_driver_data, | |
| 8860 | + }, | |
| 8771 | 8861 | }; |
| 8772 | 8862 | |
| 8773 | 8863 | static int __init set_ibm_param(const char *val, struct kernel_param *kp) |
| @@ -41,6 +41,13 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, · 40 unmodified lines | ||
| 41 | 41 | unsigned int mode, unsigned int channel, |
| 42 | 42 | u8 ato, bool atox, unsigned int *sample); |
| 43 | 43 | |
| 44 | +#define MC13783_AUDIO_RX0 36 | |
| 45 | +#define MC13783_AUDIO_RX1 37 | |
| 46 | +#define MC13783_AUDIO_TX 38 | |
| 47 | +#define MC13783_SSI_NETWORK 39 | |
| 48 | +#define MC13783_AUDIO_CODEC 40 | |
| 49 | +#define MC13783_AUDIO_DAC 41 | |
| 50 | + | |
| 44 | 51 | #define MC13XXX_IRQ_ADCDONE 0 |
| 45 | 52 | #define MC13XXX_IRQ_ADCBISDONE 1 |
| 46 | 53 | #define MC13XXX_IRQ_TS 2 |
| @@ -84,6 +84,8 @@ struct snd_platform_data { · 83 unmodified lines | ||
| 84 | 84 | u8 version; |
| 85 | 85 | u8 txnumevt; |
| 86 | 86 | u8 rxnumevt; |
| 87 | + int tx_dma_channel; | |
| 88 | + int rx_dma_channel; | |
| 87 | 89 | }; |
| 88 | 90 | |
| 89 | 91 | enum { |
| @@ -0,0 +1,15 @@ | ||
| 1 | +#ifndef __THINKPAD_ACPI_H__ | |
| 2 | +#define __THINKPAD_ACPI_H__ | |
| 3 | + | |
| 4 | +/* These two functions return 0 if success, or negative error code | |
| 5 | + (e g -ENODEV if no led present) */ | |
| 6 | + | |
| 7 | +enum { | |
| 8 | + TPACPI_LED_MUTE, | |
| 9 | + TPACPI_LED_MICMUTE, | |
| 10 | + TPACPI_LED_MAX, | |
| 11 | +}; | |
| 12 | + | |
| 13 | +int tpacpi_led_set(int whichled, bool on); | |
| 14 | + | |
| 15 | +#endif | |
| @@ -170,7 +170,7 @@ struct ak4114 { · 169 unmodified lines | ||
| 170 | 170 | void * private_data; |
| 171 | 171 | unsigned int init: 1; |
| 172 | 172 | spinlock_t lock; |
| 173 | − unsigned char regmap[7]; | |
| 173 | + unsigned char regmap[6]; | |
| 174 | 174 | unsigned char txcsb[5]; |
| 175 | 175 | struct snd_kcontrol *kctls[AK4114_CONTROLS]; |
| 176 | 176 | struct snd_pcm_substream *playback_substream; |
| @@ -189,7 +189,7 @@ struct ak4114 { · 12 unmodified lines | ||
| 189 | 189 | |
| 190 | 190 | int snd_ak4114_create(struct snd_card *card, |
| 191 | 191 | ak4114_read_t *read, ak4114_write_t *write, |
| 192 | − const unsigned char pgm[7], const unsigned char txcsb[5], | |
| 192 | + const unsigned char pgm[6], const unsigned char txcsb[5], | |
| 193 | 193 | void *private_data, struct ak4114 **r_ak4114); |
| 194 | 194 | void snd_ak4114_reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char mask, unsigned char val); |
| 195 | 195 | void snd_ak4114_reinit(struct ak4114 *ak4114); |
| @@ -171,4 +171,13 @@ static inline void snd_compr_fragment_elapsed(struct snd_compr_stream *stream) · 170 unmodified lines | ||
| 171 | 171 | wake_up(&stream->runtime->sleep); |
| 172 | 172 | } |
| 173 | 173 | |
| 174 | +static inline void snd_compr_drain_notify(struct snd_compr_stream *stream) | |
| 175 | +{ | |
| 176 | + if (snd_BUG_ON(!stream)) | |
| 177 | + return; | |
| 178 | + | |
| 179 | + stream->runtime->state = SNDRV_PCM_STATE_SETUP; | |
| 180 | + wake_up(&stream->runtime->sleep); | |
| 181 | +} | |
| 182 | + | |
| 174 | 183 | #endif |
| @@ -31,6 +31,8 @@ struct cs42l52_platform_data { · 30 unmodified lines | ||
| 31 | 31 | /* Charge Pump Freq. Check datasheet Pg73 */ |
| 32 | 32 | unsigned int chgfreq; |
| 33 | 33 | |
| 34 | + /* Reset GPIO */ | |
| 35 | + unsigned int reset_gpio; | |
| 34 | 36 | }; |
| 35 | 37 | |
| 36 | 38 | #endif /* __CS42L52_H */ |
| @@ -0,0 +1,22 @@ | ||
| 1 | +/* | |
| 2 | + * linux/sound/cs42l73.h -- Platform data for CS42L73 | |
| 3 | + * | |
| 4 | + * Copyright (c) 2012 Cirrus Logic Inc. | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +#ifndef __CS42L73_H | |
| 12 | +#define __CS42L73_H | |
| 13 | + | |
| 14 | +struct cs42l73_platform_data { | |
| 15 | + /* RST GPIO */ | |
| 16 | + unsigned int reset_gpio; | |
| 17 | + unsigned int chgfreq; | |
| 18 | + int jack_detection; | |
| 19 | + unsigned int mclk_freq; | |
| 20 | +}; | |
| 21 | + | |
| 22 | +#endif /* __CS42L73_H */ | |
| @@ -61,6 +61,8 @@ struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream) · 60 unmodified lines | ||
| 61 | 61 | * @slave_id: Slave requester id for the DMA channel. |
| 62 | 62 | * @filter_data: Custom DMA channel filter data, this will usually be used when |
| 63 | 63 | * requesting the DMA channel. |
| 64 | + * @chan_name: Custom channel name to use when requesting DMA channel. | |
| 65 | + * @fifo_size: FIFO size of the DAI controller in bytes | |
| 64 | 66 | */ |
| 65 | 67 | struct snd_dmaengine_dai_dma_data { |
| 66 | 68 | dma_addr_t addr; |
| @@ -68,6 +70,8 @@ struct snd_dmaengine_dai_dma_data { · 1 unmodified line | ||
| 68 | 70 | u32 maxburst; |
| 69 | 71 | unsigned int slave_id; |
| 70 | 72 | void *filter_data; |
| 73 | + const char *chan_name; | |
| 74 | + unsigned int fifo_size; | |
| 71 | 75 | }; |
| 72 | 76 | |
| 73 | 77 | void snd_dmaengine_pcm_set_config_from_dai_data( |
| @@ -96,6 +100,10 @@ void snd_dmaengine_pcm_set_config_from_dai_data( · 22 unmodified lines | ||
| 96 | 100 | * playback. |
| 97 | 101 | */ |
| 98 | 102 | #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3) |
| 103 | +/* | |
| 104 | + * The PCM streams have custom channel names specified. | |
| 105 | + */ | |
| 106 | +#define SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME BIT(4) | |
| 99 | 107 | |
| 100 | 108 | /** |
| 101 | 109 | * struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM |
| @@ -52,6 +52,11 @@ struct snd_dma_device { · 51 unmodified lines | ||
| 52 | 52 | #else |
| 53 | 53 | #define SNDRV_DMA_TYPE_DEV_SG SNDRV_DMA_TYPE_DEV /* no SG-buf support */ |
| 54 | 54 | #endif |
| 55 | +#ifdef CONFIG_GENERIC_ALLOCATOR | |
| 56 | +#define SNDRV_DMA_TYPE_DEV_IRAM 4 /* generic device iram-buffer */ | |
| 57 | +#else | |
| 58 | +#define SNDRV_DMA_TYPE_DEV_IRAM SNDRV_DMA_TYPE_DEV | |
| 59 | +#endif | |
| 55 | 60 | |
| 56 | 61 | /* |
| 57 | 62 | * info for buffer allocation |
| @@ -36,7 +36,6 @@ · 35 unmodified lines | ||
| 36 | 36 | #define RSND_SSI_CLK_PIN_SHARE (1 << 31) |
| 37 | 37 | #define RSND_SSI_CLK_FROM_ADG (1 << 30) /* clock parent is master */ |
| 38 | 38 | #define RSND_SSI_SYNC (1 << 29) /* SSI34_sync etc */ |
| 39 | −#define RSND_SSI_DEPENDENT (1 << 28) /* SSI needs SRU/SCU */ | |
| 40 | 39 | |
| 41 | 40 | #define RSND_SSI_PLAY (1 << 24) |
| 42 | 41 | |
| @@ -105,6 +105,8 @@ int snd_soc_dai_set_clkdiv(struct snd_soc_dai *dai, · 104 unmodified lines | ||
| 105 | 105 | int snd_soc_dai_set_pll(struct snd_soc_dai *dai, |
| 106 | 106 | int pll_id, int source, unsigned int freq_in, unsigned int freq_out); |
| 107 | 107 | |
| 108 | +int snd_soc_dai_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio); | |
| 109 | + | |
| 108 | 110 | /* Digital Audio interface formatting */ |
| 109 | 111 | int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); |
| 110 | 112 | |
| @@ -131,6 +133,7 @@ struct snd_soc_dai_ops { · 20 unmodified lines | ||
| 131 | 133 | int (*set_pll)(struct snd_soc_dai *dai, int pll_id, int source, |
| 132 | 134 | unsigned int freq_in, unsigned int freq_out); |
| 133 | 135 | int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div); |
| 136 | + int (*set_bclk_ratio)(struct snd_soc_dai *dai, unsigned int ratio); | |
| 134 | 137 | |
| 135 | 138 | /* |
| 136 | 139 | * DAI format configuration |
| @@ -166,6 +169,13 @@ struct snd_soc_dai_ops { · 29 unmodified lines | ||
| 166 | 169 | struct snd_soc_dai *); |
| 167 | 170 | int (*prepare)(struct snd_pcm_substream *, |
| 168 | 171 | struct snd_soc_dai *); |
| 172 | + /* | |
| 173 | + * NOTE: Commands passed to the trigger function are not necessarily | |
| 174 | + * compatible with the current state of the dai. For example this | |
| 175 | + * sequence of commands is possible: START STOP STOP. | |
| 176 | + * So do not unconditionally use refcounting functions in the trigger | |
| 177 | + * function, e.g. clk_enable/disable. | |
| 178 | + */ | |
| 169 | 179 | int (*trigger)(struct snd_pcm_substream *, int, |
| 170 | 180 | struct snd_soc_dai *); |
| 171 | 181 | int (*bespoke_trigger)(struct snd_pcm_substream *, int, |
| @@ -276,6 +286,13 @@ static inline void snd_soc_dai_set_dma_data(struct snd_soc_dai *dai, · 104 unmodified lines | ||
| 276 | 286 | dai->capture_dma_data = data; |
| 277 | 287 | } |
| 278 | 288 | |
| 289 | +static inline void snd_soc_dai_init_dma_data(struct snd_soc_dai *dai, | |
| 290 | + void *playback, void *capture) | |
| 291 | +{ | |
| 292 | + dai->playback_dma_data = playback; | |
| 293 | + dai->capture_dma_data = capture; | |
| 294 | +} | |
| 295 | + | |
| 279 | 296 | static inline void snd_soc_dai_set_drvdata(struct snd_soc_dai *dai, |
| 280 | 297 | void *data) |
| 281 | 298 | { |
| @@ -286,6 +286,8 @@ struct device; · 285 unmodified lines | ||
| 286 | 286 | .info = snd_soc_info_volsw, \ |
| 287 | 287 | .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \ |
| 288 | 288 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 1) } |
| 289 | +#define SOC_DAPM_SINGLE_VIRT(xname, max) \ | |
| 290 | + SOC_DAPM_SINGLE(xname, SND_SOC_NOPM, 0, max, 0) | |
| 289 | 291 | #define SOC_DAPM_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ |
| 290 | 292 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 291 | 293 | .info = snd_soc_info_volsw, \ |
| @@ -300,6 +302,8 @@ struct device; · 8 unmodified lines | ||
| 300 | 302 | .tlv.p = (tlv_array), \ |
| 301 | 303 | .get = snd_soc_dapm_get_volsw, .put = snd_soc_dapm_put_volsw, \ |
| 302 | 304 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert, 0) } |
| 305 | +#define SOC_DAPM_SINGLE_TLV_VIRT(xname, max, tlv_array) \ | |
| 306 | + SOC_DAPM_SINGLE(xname, SND_SOC_NOPM, 0, max, 0, tlv_array) | |
| 303 | 307 | #define SOC_DAPM_ENUM(xname, xenum) \ |
| 304 | 308 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
| 305 | 309 | .info = snd_soc_info_enum_double, \ |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | #ifndef __LINUX_SND_SOC_H |
| 14 | 14 | #define __LINUX_SND_SOC_H |
| 15 | 15 | |
| 16 | +#include <linux/of.h> | |
| 16 | 17 | #include <linux/platform_device.h> |
| 17 | 18 | #include <linux/types.h> |
| 18 | 19 | #include <linux/notifier.h> |
| @@ -330,7 +331,6 @@ struct soc_enum; · 311 unmodified lines | ||
| 330 | 331 | struct snd_soc_jack; |
| 331 | 332 | struct snd_soc_jack_zone; |
| 332 | 333 | struct snd_soc_jack_pin; |
| 333 | −struct snd_soc_cache_ops; | |
| 334 | 334 | #include <sound/soc-dapm.h> |
| 335 | 335 | #include <sound/soc-dpcm.h> |
| 336 | 336 | |
| @@ -348,10 +348,6 @@ enum snd_soc_control_type { · 11 unmodified lines | ||
| 348 | 348 | SND_SOC_REGMAP, |
| 349 | 349 | }; |
| 350 | 350 | |
| 351 | −enum snd_soc_compress_type { | |
| 352 | − SND_SOC_FLAT_COMPRESSION = 1, | |
| 353 | −}; | |
| 354 | − | |
| 355 | 351 | enum snd_soc_pcm_subclass { |
| 356 | 352 | SND_SOC_PCM_CLASS_PCM = 0, |
| 357 | 353 | SND_SOC_PCM_CLASS_BE = 1, |
| @@ -369,6 +365,7 @@ int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source, · 11 unmodified lines | ||
| 369 | 365 | |
| 370 | 366 | int snd_soc_register_card(struct snd_soc_card *card); |
| 371 | 367 | int snd_soc_unregister_card(struct snd_soc_card *card); |
| 368 | +int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card); | |
| 372 | 369 | int snd_soc_suspend(struct device *dev); |
| 373 | 370 | int snd_soc_resume(struct device *dev); |
| 374 | 371 | int snd_soc_poweroff(struct device *dev); |
| @@ -386,6 +383,9 @@ void snd_soc_unregister_codec(struct device *dev); · 11 unmodified lines | ||
| 386 | 383 | int snd_soc_register_component(struct device *dev, |
| 387 | 384 | const struct snd_soc_component_driver *cmpnt_drv, |
| 388 | 385 | struct snd_soc_dai_driver *dai_drv, int num_dai); |
| 386 | +int devm_snd_soc_register_component(struct device *dev, | |
| 387 | + const struct snd_soc_component_driver *cmpnt_drv, | |
| 388 | + struct snd_soc_dai_driver *dai_drv, int num_dai); | |
| 389 | 389 | void snd_soc_unregister_component(struct device *dev); |
| 390 | 390 | int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, |
| 391 | 391 | unsigned int reg); |
| @@ -403,12 +403,6 @@ int snd_soc_cache_write(struct snd_soc_codec *codec, · 11 unmodified lines | ||
| 403 | 403 | unsigned int reg, unsigned int value); |
| 404 | 404 | int snd_soc_cache_read(struct snd_soc_codec *codec, |
| 405 | 405 | unsigned int reg, unsigned int *value); |
| 406 | −int snd_soc_default_volatile_register(struct snd_soc_codec *codec, | |
| 407 | − unsigned int reg); | |
| 408 | −int snd_soc_default_readable_register(struct snd_soc_codec *codec, | |
| 409 | − unsigned int reg); | |
| 410 | −int snd_soc_default_writable_register(struct snd_soc_codec *codec, | |
| 411 | − unsigned int reg); | |
| 412 | 406 | int snd_soc_platform_read(struct snd_soc_platform *platform, |
| 413 | 407 | unsigned int reg); |
| 414 | 408 | int snd_soc_platform_write(struct snd_soc_platform *platform, |
| @@ -541,22 +535,6 @@ int snd_soc_get_strobe(struct snd_kcontrol *kcontrol, · 126 unmodified lines | ||
| 541 | 535 | int snd_soc_put_strobe(struct snd_kcontrol *kcontrol, |
| 542 | 536 | struct snd_ctl_elem_value *ucontrol); |
| 543 | 537 | |
| 544 | −/** | |
| 545 | − * struct snd_soc_reg_access - Describes whether a given register is | |
| 546 | − * readable, writable or volatile. | |
| 547 | − * | |
| 548 | − * @reg: the register number | |
| 549 | − * @read: whether this register is readable | |
| 550 | − * @write: whether this register is writable | |
| 551 | − * @vol: whether this register is volatile | |
| 552 | − */ | |
| 553 | −struct snd_soc_reg_access { | |
| 554 | − u16 reg; | |
| 555 | − u16 read; | |
| 556 | − u16 write; | |
| 557 | − u16 vol; | |
| 558 | −}; | |
| 559 | − | |
| 560 | 538 | /** |
| 561 | 539 | * struct snd_soc_jack_pin - Describes a pin to update based on jack detection |
| 562 | 540 | * |
| @@ -657,17 +635,26 @@ struct snd_soc_compr_ops { · 94 unmodified lines | ||
| 657 | 635 | int (*trigger)(struct snd_compr_stream *); |
| 658 | 636 | }; |
| 659 | 637 | |
| 660 | −/* SoC cache ops */ | |
| 661 | −struct snd_soc_cache_ops { | |
| 638 | +/* component interface */ | |
| 639 | +struct snd_soc_component_driver { | |
| 640 | + const char *name; | |
| 641 | + | |
| 642 | + /* DT */ | |
| 643 | + int (*of_xlate_dai_name)(struct snd_soc_component *component, | |
| 644 | + struct of_phandle_args *args, | |
| 645 | + const char **dai_name); | |
| 646 | +}; | |
| 647 | + | |
| 648 | +struct snd_soc_component { | |
| 662 | 649 | const char *name; |
| 663 | − enum snd_soc_compress_type id; | |
| 664 | − int (*init)(struct snd_soc_codec *codec); | |
| 665 | − int (*exit)(struct snd_soc_codec *codec); | |
| 666 | − int (*read)(struct snd_soc_codec *codec, unsigned int reg, | |
| 667 | − unsigned int *value); | |
| 668 | − int (*write)(struct snd_soc_codec *codec, unsigned int reg, | |
| 669 | − unsigned int value); | |
| 670 | − int (*sync)(struct snd_soc_codec *codec); | |
| 650 | + int id; | |
| 651 | + struct device *dev; | |
| 652 | + struct list_head list; | |
| 653 | + | |
| 654 | + struct snd_soc_dai_driver *dai_drv; | |
| 655 | + int num_dai; | |
| 656 | + | |
| 657 | + const struct snd_soc_component_driver *driver; | |
| 671 | 658 | }; |
| 672 | 659 | |
| 673 | 660 | /* SoC Audio Codec device */ |
| @@ -683,8 +670,6 @@ struct snd_soc_codec { · 9 unmodified lines | ||
| 683 | 670 | struct list_head list; |
| 684 | 671 | struct list_head card_list; |
| 685 | 672 | int num_dai; |
| 686 | − enum snd_soc_compress_type compress_type; | |
| 687 | − size_t reg_size; /* reg_cache_size * reg_word_size */ | |
| 688 | 673 | int (*volatile_register)(struct snd_soc_codec *, unsigned int); |
| 689 | 674 | int (*readable_register)(struct snd_soc_codec *, unsigned int); |
| 690 | 675 | int (*writable_register)(struct snd_soc_codec *, unsigned int); |
| @@ -708,13 +693,13 @@ struct snd_soc_codec { · 17 unmodified lines | ||
| 708 | 693 | unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int); |
| 709 | 694 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); |
| 710 | 695 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); |
| 711 | − int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t); | |
| 712 | 696 | void *reg_cache; |
| 713 | − const void *reg_def_copy; | |
| 714 | − const struct snd_soc_cache_ops *cache_ops; | |
| 715 | 697 | struct mutex cache_rw_mutex; |
| 716 | 698 | int val_bytes; |
| 717 | 699 | |
| 700 | + /* component */ | |
| 701 | + struct snd_soc_component component; | |
| 702 | + | |
| 718 | 703 | /* dapm */ |
| 719 | 704 | struct snd_soc_dapm_context dapm; |
| 720 | 705 | unsigned int ignore_pmdown_time:1; /* pmdown_time is ignored at stop */ |
| @@ -733,6 +718,7 @@ struct snd_soc_codec_driver { · 12 unmodified lines | ||
| 733 | 718 | int (*remove)(struct snd_soc_codec *); |
| 734 | 719 | int (*suspend)(struct snd_soc_codec *); |
| 735 | 720 | int (*resume)(struct snd_soc_codec *); |
| 721 | + struct snd_soc_component_driver component_driver; | |
| 736 | 722 | |
| 737 | 723 | /* Default control and setup, added after probe() is run */ |
| 738 | 724 | const struct snd_kcontrol_new *controls; |
| @@ -760,9 +746,6 @@ struct snd_soc_codec_driver { · 21 unmodified lines | ||
| 760 | 746 | short reg_cache_step; |
| 761 | 747 | short reg_word_size; |
| 762 | 748 | const void *reg_cache_default; |
| 763 | − short reg_access_size; | |
| 764 | − const struct snd_soc_reg_access *reg_access_default; | |
| 765 | − enum snd_soc_compress_type compress_type; | |
| 766 | 749 | |
| 767 | 750 | /* codec bias level */ |
| 768 | 751 | int (*set_bias_level)(struct snd_soc_codec *, |
| @@ -849,20 +832,6 @@ struct snd_soc_platform { · 80 unmodified lines | ||
| 849 | 832 | #endif |
| 850 | 833 | }; |
| 851 | 834 | |
| 852 | −struct snd_soc_component_driver { | |
| 853 | − const char *name; | |
| 854 | −}; | |
| 855 | − | |
| 856 | −struct snd_soc_component { | |
| 857 | − const char *name; | |
| 858 | − int id; | |
| 859 | − int num_dai; | |
| 860 | − struct device *dev; | |
| 861 | − struct list_head list; | |
| 862 | − | |
| 863 | − const struct snd_soc_component_driver *driver; | |
| 864 | −}; | |
| 865 | − | |
| 866 | 835 | struct snd_soc_dai_link { |
| 867 | 836 | /* config - must be set by machine driver */ |
| 868 | 837 | const char *name; /* Codec name */ |
| @@ -944,12 +913,6 @@ struct snd_soc_codec_conf { · 75 unmodified lines | ||
| 944 | 913 | * associated per device |
| 945 | 914 | */ |
| 946 | 915 | const char *name_prefix; |
| 947 | − | |
| 948 | − /* | |
| 949 | − * set this to the desired compression type if you want to | |
| 950 | − * override the one supplied in codec->driver->compress_type | |
| 951 | − */ | |
| 952 | − enum snd_soc_compress_type compress_type; | |
| 953 | 916 | }; |
| 954 | 917 | |
| 955 | 918 | struct snd_soc_aux_dev { |
| @@ -1088,7 +1051,8 @@ struct snd_soc_pcm_runtime { · 132 unmodified lines | ||
| 1088 | 1051 | /* mixer control */ |
| 1089 | 1052 | struct soc_mixer_control { |
| 1090 | 1053 | int min, max, platform_max; |
| 1091 | − unsigned int reg, rreg, shift, rshift; | |
| 1054 | + int reg, rreg; | |
| 1055 | + unsigned int shift, rshift; | |
| 1092 | 1056 | unsigned int invert:1; |
| 1093 | 1057 | unsigned int autodisable:1; |
| 1094 | 1058 | }; |
| @@ -1121,8 +1085,6 @@ struct soc_enum { · 26 unmodified lines | ||
| 1121 | 1085 | unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg); |
| 1122 | 1086 | unsigned int snd_soc_write(struct snd_soc_codec *codec, |
| 1123 | 1087 | unsigned int reg, unsigned int val); |
| 1124 | −unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec, | |
| 1125 | − unsigned int reg, const void *data, size_t len); | |
| 1126 | 1088 | |
| 1127 | 1089 | /* device driver data */ |
| 1128 | 1090 | |
| @@ -1201,6 +1163,8 @@ int snd_soc_of_parse_audio_routing(struct snd_soc_card *card, · 72 unmodified lines | ||
| 1201 | 1163 | const char *propname); |
| 1202 | 1164 | unsigned int snd_soc_of_parse_daifmt(struct device_node *np, |
| 1203 | 1165 | const char *prefix); |
| 1166 | +int snd_soc_of_get_dai_name(struct device_node *of_node, | |
| 1167 | + const char **dai_name); | |
| 1204 | 1168 | |
| 1205 | 1169 | #include <sound/soc-dai.h> |
| 1206 | 1170 | |
| @@ -14,6 +14,7 @@ struct snd_soc_codec; · 13 unmodified lines | ||
| 14 | 14 | struct snd_soc_platform; |
| 15 | 15 | struct snd_soc_card; |
| 16 | 16 | struct snd_soc_dapm_widget; |
| 17 | +struct snd_soc_dapm_path; | |
| 17 | 18 | |
| 18 | 19 | /* |
| 19 | 20 | * Log register events |
| @@ -5,6 +5,7 @@ header-y += asound_fm.h · 4 unmodified lines | ||
| 5 | 5 | header-y += compress_offload.h |
| 6 | 6 | header-y += compress_params.h |
| 7 | 7 | header-y += emu10k1.h |
| 8 | +header-y += firewire.h | |
| 8 | 9 | header-y += hdsp.h |
| 9 | 10 | header-y += hdspm.h |
| 10 | 11 | header-y += sb16_csp.h |
| @@ -93,9 +93,10 @@ enum { · 92 unmodified lines | ||
| 93 | 93 | SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */ |
| 94 | 94 | SNDRV_HWDEP_IFACE_HDA, /* HD-audio */ |
| 95 | 95 | SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */ |
| 96 | + SNDRV_HWDEP_IFACE_FW_DICE, /* TC DICE FireWire device */ | |
| 96 | 97 | |
| 97 | 98 | /* Don't forget to change the following: */ |
| 98 | − SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM | |
| 99 | + SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_DICE | |
| 99 | 100 | }; |
| 100 | 101 | |
| 101 | 102 | struct snd_hwdep_info { |
| @@ -0,0 +1,51 @@ | ||
| 1 | +#ifndef _UAPI_SOUND_FIREWIRE_H_INCLUDED | |
| 2 | +#define _UAPI_SOUND_FIREWIRE_H_INCLUDED | |
| 3 | + | |
| 4 | +#include <linux/ioctl.h> | |
| 5 | + | |
| 6 | +/* events can be read() from the hwdep device */ | |
| 7 | + | |
| 8 | +#define SNDRV_FIREWIRE_EVENT_LOCK_STATUS 0x000010cc | |
| 9 | +#define SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION 0xd1ce004e | |
| 10 | + | |
| 11 | +struct snd_firewire_event_common { | |
| 12 | + unsigned int type; /* SNDRV_FIREWIRE_EVENT_xxx */ | |
| 13 | +}; | |
| 14 | + | |
| 15 | +struct snd_firewire_event_lock_status { | |
| 16 | + unsigned int type; | |
| 17 | + unsigned int status; /* 0/1 = unlocked/locked */ | |
| 18 | +}; | |
| 19 | + | |
| 20 | +struct snd_firewire_event_dice_notification { | |
| 21 | + unsigned int type; | |
| 22 | + unsigned int notification; /* DICE-specific bits */ | |
| 23 | +}; | |
| 24 | + | |
| 25 | +union snd_firewire_event { | |
| 26 | + struct snd_firewire_event_common common; | |
| 27 | + struct snd_firewire_event_lock_status lock_status; | |
| 28 | + struct snd_firewire_event_dice_notification dice_notification; | |
| 29 | +}; | |
| 30 | + | |
| 31 | + | |
| 32 | +#define SNDRV_FIREWIRE_IOCTL_GET_INFO _IOR('H', 0xf8, struct snd_firewire_get_info) | |
| 33 | +#define SNDRV_FIREWIRE_IOCTL_LOCK _IO('H', 0xf9) | |
| 34 | +#define SNDRV_FIREWIRE_IOCTL_UNLOCK _IO('H', 0xfa) | |
| 35 | + | |
| 36 | +#define SNDRV_FIREWIRE_TYPE_DICE 1 | |
| 37 | +/* Fireworks, AV/C, RME, MOTU, ... */ | |
| 38 | + | |
| 39 | +struct snd_firewire_get_info { | |
| 40 | + unsigned int type; /* SNDRV_FIREWIRE_TYPE_xxx */ | |
| 41 | + unsigned int card; /* same as fw_cdev_get_info.card */ | |
| 42 | + unsigned char guid[8]; | |
| 43 | + char device_name[16]; /* device node in /dev */ | |
| 44 | +}; | |
| 45 | + | |
| 46 | +/* | |
| 47 | + * SNDRV_FIREWIRE_IOCTL_LOCK prevents the driver from streaming. | |
| 48 | + * Returns -EBUSY if the driver is already streaming. | |
| 49 | + */ | |
| 50 | + | |
| 51 | +#endif /* _UAPI_SOUND_FIREWIRE_H_INCLUDED */ | |
| @@ -117,8 +117,7 @@ static inline void pxa_ac97_warm_pxa25x(void) · 116 unmodified lines | ||
| 117 | 117 | { |
| 118 | 118 | gsr_bits = 0; |
| 119 | 119 | |
| 120 | − GCR |= GCR_WARM_RST | GCR_PRIRDY_IEN | GCR_SECRDY_IEN; | |
| 121 | − wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); | |
| 120 | + GCR |= GCR_WARM_RST; | |
| 122 | 121 | } |
| 123 | 122 | |
| 124 | 123 | static inline void pxa_ac97_cold_pxa25x(void) |
| @@ -129,8 +128,6 @@ static inline void pxa_ac97_cold_pxa25x(void) · 4 unmodified lines | ||
| 129 | 128 | gsr_bits = 0; |
| 130 | 129 | |
| 131 | 130 | GCR = GCR_COLD_RST; |
| 132 | − GCR |= GCR_CDONE_IE|GCR_SDONE_IE; | |
| 133 | − wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); | |
| 134 | 131 | } |
| 135 | 132 | #endif |
| 136 | 133 | |
| @@ -149,8 +146,6 @@ static inline void pxa_ac97_warm_pxa27x(void) · 12 unmodified lines | ||
| 149 | 146 | |
| 150 | 147 | static inline void pxa_ac97_cold_pxa27x(void) |
| 151 | 148 | { |
| 152 | − unsigned int timeout; | |
| 153 | − | |
| 154 | 149 | GCR &= GCR_COLD_RST; /* clear everything but nCRST */ |
| 155 | 150 | GCR &= ~GCR_COLD_RST; /* then assert nCRST */ |
| 156 | 151 | |
| @@ -161,29 +156,20 @@ static inline void pxa_ac97_cold_pxa27x(void) · 4 unmodified lines | ||
| 161 | 156 | udelay(5); |
| 162 | 157 | clk_disable(ac97conf_clk); |
| 163 | 158 | GCR = GCR_COLD_RST | GCR_WARM_RST; |
| 164 | − timeout = 100; /* wait for the codec-ready bit to be set */ | |
| 165 | − while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | |
| 166 | − mdelay(1); | |
| 167 | 159 | } |
| 168 | 160 | #endif |
| 169 | 161 | |
| 170 | 162 | #ifdef CONFIG_PXA3xx |
| 171 | 163 | static inline void pxa_ac97_warm_pxa3xx(void) |
| 172 | 164 | { |
| 173 | − int timeout = 100; | |
| 174 | − | |
| 175 | 165 | gsr_bits = 0; |
| 176 | 166 | |
| 177 | 167 | /* Can't use interrupts */ |
| 178 | 168 | GCR |= GCR_WARM_RST; |
| 179 | − while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | |
| 180 | − mdelay(1); | |
| 181 | 169 | } |
| 182 | 170 | |
| 183 | 171 | static inline void pxa_ac97_cold_pxa3xx(void) |
| 184 | 172 | { |
| 185 | − int timeout = 1000; | |
| 186 | − | |
| 187 | 173 | /* Hold CLKBPB for 100us */ |
| 188 | 174 | GCR = 0; |
| 189 | 175 | GCR = GCR_CLKBPB; |
| @@ -199,14 +185,13 @@ static inline void pxa_ac97_cold_pxa3xx(void) · 9 unmodified lines | ||
| 199 | 185 | GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN); |
| 200 | 186 | |
| 201 | 187 | GCR = GCR_WARM_RST | GCR_COLD_RST; |
| 202 | − while (!(GSR & (GSR_PCR | GSR_SCR)) && timeout--) | |
| 203 | − mdelay(10); | |
| 204 | 188 | } |
| 205 | 189 | #endif |
| 206 | 190 | |
| 207 | 191 | bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97) |
| 208 | 192 | { |
| 209 | 193 | unsigned long gsr; |
| 194 | + unsigned int timeout = 100; | |
| 210 | 195 | |
| 211 | 196 | #ifdef CONFIG_PXA25x |
| 212 | 197 | if (cpu_is_pxa25x()) |
| @@ -223,7 +208,11 @@ bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97) · 10 unmodified lines | ||
| 223 | 208 | pxa_ac97_warm_pxa3xx(); |
| 224 | 209 | else |
| 225 | 210 | #endif |
| 226 | − BUG(); | |
| 211 | + snd_BUG(); | |
| 212 | + | |
| 213 | + while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | |
| 214 | + mdelay(1); | |
| 215 | + | |
| 227 | 216 | gsr = GSR | gsr_bits; |
| 228 | 217 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
| 229 | 218 | printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n", |
| @@ -239,6 +228,7 @@ EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_warm_reset); · 9 unmodified lines | ||
| 239 | 228 | bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97) |
| 240 | 229 | { |
| 241 | 230 | unsigned long gsr; |
| 231 | + unsigned int timeout = 1000; | |
| 242 | 232 | |
| 243 | 233 | #ifdef CONFIG_PXA25x |
| 244 | 234 | if (cpu_is_pxa25x()) |
| @@ -255,7 +245,10 @@ bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97) · 10 unmodified lines | ||
| 255 | 245 | pxa_ac97_cold_pxa3xx(); |
| 256 | 246 | else |
| 257 | 247 | #endif |
| 258 | − BUG(); | |
| 248 | + snd_BUG(); | |
| 249 | + | |
| 250 | + while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--) | |
| 251 | + mdelay(1); | |
| 259 | 252 | |
| 260 | 253 | gsr = GSR | gsr_bits; |
| 261 | 254 | if (!(gsr & (GSR_PCR | GSR_SCR))) { |
| @@ -185,7 +185,7 @@ static int pxa2xx_ac97_probe(struct platform_device *dev) · 184 unmodified lines | ||
| 185 | 185 | goto err; |
| 186 | 186 | |
| 187 | 187 | card->dev = &dev->dev; |
| 188 | − strncpy(card->driver, dev->dev.driver->name, sizeof(card->driver)); | |
| 188 | + strlcpy(card->driver, dev->dev.driver->name, sizeof(card->driver)); | |
| 189 | 189 | |
| 190 | 190 | ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm); |
| 191 | 191 | if (ret) |
| @@ -34,7 +34,6 @@ · 33 unmodified lines | ||
| 34 | 34 | #include <linux/dw_dmac.h> |
| 35 | 35 | |
| 36 | 36 | #include <mach/cpu.h> |
| 37 | −#include <mach/gpio.h> | |
| 38 | 37 | |
| 39 | 38 | #ifdef CONFIG_ARCH_AT91 |
| 40 | 39 | #include <mach/hardware.h> |
| @@ -680,14 +680,48 @@ static int snd_compr_stop(struct snd_compr_stream *stream) · 679 unmodified lines | ||
| 680 | 680 | return -EPERM; |
| 681 | 681 | retval = stream->ops->trigger(stream, SNDRV_PCM_TRIGGER_STOP); |
| 682 | 682 | if (!retval) { |
| 683 | − stream->runtime->state = SNDRV_PCM_STATE_SETUP; | |
| 684 | − wake_up(&stream->runtime->sleep); | |
| 683 | + snd_compr_drain_notify(stream); | |
| 685 | 684 | stream->runtime->total_bytes_available = 0; |
| 686 | 685 | stream->runtime->total_bytes_transferred = 0; |
| 687 | 686 | } |
| 688 | 687 | return retval; |
| 689 | 688 | } |
| 690 | 689 | |
| 690 | +static int snd_compress_wait_for_drain(struct snd_compr_stream *stream) | |
| 691 | +{ | |
| 692 | + int ret; | |
| 693 | + | |
| 694 | + /* | |
| 695 | + * We are called with lock held. So drop the lock while we wait for | |
| 696 | + * drain complete notfication from the driver | |
| 697 | + * | |
| 698 | + * It is expected that driver will notify the drain completion and then | |
| 699 | + * stream will be moved to SETUP state, even if draining resulted in an | |
| 700 | + * error. We can trigger next track after this. | |
| 701 | + */ | |
| 702 | + stream->runtime->state = SNDRV_PCM_STATE_DRAINING; | |
| 703 | + mutex_unlock(&stream->device->lock); | |
| 704 | + | |
| 705 | + /* we wait for drain to complete here, drain can return when | |
| 706 | + * interruption occurred, wait returned error or success. | |
| 707 | + * For the first two cases we don't do anything different here and | |
| 708 | + * return after waking up | |
| 709 | + */ | |
| 710 | + | |
| 711 | + ret = wait_event_interruptible(stream->runtime->sleep, | |
| 712 | + (stream->runtime->state != SNDRV_PCM_STATE_DRAINING)); | |
| 713 | + if (ret == -ERESTARTSYS) | |
| 714 | + pr_debug("wait aborted by a signal"); | |
| 715 | + else if (ret) | |
| 716 | + pr_debug("wait for drain failed with %d\n", ret); | |
| 717 | + | |
| 718 | + | |
| 719 | + wake_up(&stream->runtime->sleep); | |
| 720 | + mutex_lock(&stream->device->lock); | |
| 721 | + | |
| 722 | + return ret; | |
| 723 | +} | |
| 724 | + | |
| 691 | 725 | static int snd_compr_drain(struct snd_compr_stream *stream) |
| 692 | 726 | { |
| 693 | 727 | int retval; |
| @@ -695,12 +729,15 @@ static int snd_compr_drain(struct snd_compr_stream *stream) · 1 unmodified line | ||
| 695 | 729 | if (stream->runtime->state == SNDRV_PCM_STATE_PREPARED || |
| 696 | 730 | stream->runtime->state == SNDRV_PCM_STATE_SETUP) |
| 697 | 731 | return -EPERM; |
| 732 | + | |
| 698 | 733 | retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_DRAIN); |
| 699 | − if (!retval) { | |
| 700 | − stream->runtime->state = SNDRV_PCM_STATE_DRAINING; | |
| 734 | + if (retval) { | |
| 735 | + pr_debug("SND_COMPR_TRIGGER_DRAIN failed %d\n", retval); | |
| 701 | 736 | wake_up(&stream->runtime->sleep); |
| 737 | + return retval; | |
| 702 | 738 | } |
| 703 | − return retval; | |
| 739 | + | |
| 740 | + return snd_compress_wait_for_drain(stream); | |
| 704 | 741 | } |
| 705 | 742 | |
| 706 | 743 | static int snd_compr_next_track(struct snd_compr_stream *stream) |
| @@ -736,9 +773,14 @@ static int snd_compr_partial_drain(struct snd_compr_stream *stream) · 29 unmodified lines | ||
| 736 | 773 | return -EPERM; |
| 737 | 774 | |
| 738 | 775 | retval = stream->ops->trigger(stream, SND_COMPR_TRIGGER_PARTIAL_DRAIN); |
| 776 | + if (retval) { | |
| 777 | + pr_debug("Partial drain returned failure\n"); | |
| 778 | + wake_up(&stream->runtime->sleep); | |
| 779 | + return retval; | |
| 780 | + } | |
| 739 | 781 | |
| 740 | 782 | stream->next_track = false; |
| 741 | − return retval; | |
| 783 | + return snd_compress_wait_for_drain(stream); | |
| 742 | 784 | } |
| 743 | 785 | |
| 744 | 786 | static long snd_compr_ioctl(struct file *f, unsigned int cmd, unsigned long arg) |
| @@ -66,7 +66,7 @@ static int module_slot_match(struct module *module, int idx) · 65 unmodified lines | ||
| 66 | 66 | #ifdef MODULE |
| 67 | 67 | const char *s1, *s2; |
| 68 | 68 | |
| 69 | − if (!module || !module->name || !slots[idx]) | |
| 69 | + if (!module || !*module->name || !slots[idx]) | |
| 70 | 70 | return 0; |
| 71 | 71 | |
| 72 | 72 | s1 = module->name; |
| @@ -597,7 +597,7 @@ static void snd_card_set_id_no_lock(struct snd_card *card, const char *src, · 524 unmodified lines | ||
| 597 | 597 | /* last resort... */ |
| 598 | 598 | snd_printk(KERN_ERR "unable to set card id (%s)\n", id); |
| 599 | 599 | if (card->proc_root->name) |
| 600 | − strcpy(card->id, card->proc_root->name); | |
| 600 | + strlcpy(card->id, card->proc_root->name, sizeof(card->id)); | |
| 601 | 601 | } |
| 602 | 602 | |
| 603 | 603 | /** |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/seq_file.h> |
| 31 | 31 | #include <asm/uaccess.h> |
| 32 | 32 | #include <linux/dma-mapping.h> |
| 33 | +#include <linux/genalloc.h> | |
| 33 | 34 | #include <linux/moduleparam.h> |
| 34 | 35 | #include <linux/mutex.h> |
| 35 | 36 | #include <sound/memalloc.h> |
| @@ -157,6 +158,51 @@ static void snd_free_dev_pages(struct device *dev, size_t size, void *ptr, · 121 unmodified lines | ||
| 157 | 158 | dec_snd_pages(pg); |
| 158 | 159 | dma_free_coherent(dev, PAGE_SIZE << pg, ptr, dma); |
| 159 | 160 | } |
| 161 | + | |
| 162 | +#ifdef CONFIG_GENERIC_ALLOCATOR | |
| 163 | +/** | |
| 164 | + * snd_malloc_dev_iram - allocate memory from on-chip internal ram | |
| 165 | + * @dmab: buffer allocation record to store the allocated data | |
| 166 | + * @size: number of bytes to allocate from the iram | |
| 167 | + * | |
| 168 | + * This function requires iram phandle provided via of_node | |
| 169 | + */ | |
| 170 | +static void snd_malloc_dev_iram(struct snd_dma_buffer *dmab, size_t size) | |
| 171 | +{ | |
| 172 | + struct device *dev = dmab->dev.dev; | |
| 173 | + struct gen_pool *pool = NULL; | |
| 174 | + | |
| 175 | + dmab->area = NULL; | |
| 176 | + dmab->addr = 0; | |
| 177 | + | |
| 178 | + if (dev->of_node) | |
| 179 | + pool = of_get_named_gen_pool(dev->of_node, "iram", 0); | |
| 180 | + | |
| 181 | + if (!pool) | |
| 182 | + return; | |
| 183 | + | |
| 184 | + /* Assign the pool into private_data field */ | |
| 185 | + dmab->private_data = pool; | |
| 186 | + | |
| 187 | + dmab->area = (void *)gen_pool_alloc(pool, size); | |
| 188 | + if (!dmab->area) | |
| 189 | + return; | |
| 190 | + | |
| 191 | + dmab->addr = gen_pool_virt_to_phys(pool, (unsigned long)dmab->area); | |
| 192 | +} | |
| 193 | + | |
| 194 | +/** | |
| 195 | + * snd_free_dev_iram - free allocated specific memory from on-chip internal ram | |
| 196 | + * @dmab: buffer allocation record to store the allocated data | |
| 197 | + */ | |
| 198 | +static void snd_free_dev_iram(struct snd_dma_buffer *dmab) | |
| 199 | +{ | |
| 200 | + struct gen_pool *pool = dmab->private_data; | |
| 201 | + | |
| 202 | + if (pool && dmab->area) | |
| 203 | + gen_pool_free(pool, (unsigned long)dmab->area, dmab->bytes); | |
| 204 | +} | |
| 205 | +#endif /* CONFIG_GENERIC_ALLOCATOR */ | |
| 160 | 206 | #endif /* CONFIG_HAS_DMA */ |
| 161 | 207 | |
| 162 | 208 | /* |
| @@ -197,6 +243,16 @@ int snd_dma_alloc_pages(int type, struct device *device, size_t size, · 34 unmodified lines | ||
| 197 | 243 | dmab->addr = 0; |
| 198 | 244 | break; |
| 199 | 245 | #ifdef CONFIG_HAS_DMA |
| 246 | +#ifdef CONFIG_GENERIC_ALLOCATOR | |
| 247 | + case SNDRV_DMA_TYPE_DEV_IRAM: | |
| 248 | + snd_malloc_dev_iram(dmab, size); | |
| 249 | + if (dmab->area) | |
| 250 | + break; | |
| 251 | + /* Internal memory might have limited size and no enough space, | |
| 252 | + * so if we fail to malloc, try to fetch memory traditionally. | |
| 253 | + */ | |
| 254 | + dmab->dev.type = SNDRV_DMA_TYPE_DEV; | |
| 255 | +#endif /* CONFIG_GENERIC_ALLOCATOR */ | |
| 200 | 256 | case SNDRV_DMA_TYPE_DEV: |
| 201 | 257 | dmab->area = snd_malloc_dev_pages(device, size, &dmab->addr); |
| 202 | 258 | break; |
| @@ -269,6 +325,11 @@ void snd_dma_free_pages(struct snd_dma_buffer *dmab) · 66 unmodified lines | ||
| 269 | 325 | snd_free_pages(dmab->area, dmab->bytes); |
| 270 | 326 | break; |
| 271 | 327 | #ifdef CONFIG_HAS_DMA |
| 328 | +#ifdef CONFIG_GENERIC_ALLOCATOR | |
| 329 | + case SNDRV_DMA_TYPE_DEV_IRAM: | |
| 330 | + snd_free_dev_iram(dmab); | |
| 331 | + break; | |
| 332 | +#endif /* CONFIG_GENERIC_ALLOCATOR */ | |
| 272 | 333 | case SNDRV_DMA_TYPE_DEV: |
| 273 | 334 | snd_free_dev_pages(dmab->dev.dev, dmab->bytes, dmab->area, dmab->addr); |
| 274 | 335 | break; |
| @@ -63,23 +63,19 @@ int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream, · 62 unmodified lines | ||
| 63 | 63 | struct dma_slave_config *slave_config) |
| 64 | 64 | { |
| 65 | 65 | enum dma_slave_buswidth buswidth; |
| 66 | + int bits; | |
| 66 | 67 | |
| 67 | − switch (params_format(params)) { | |
| 68 | − case SNDRV_PCM_FORMAT_S8: | |
| 68 | + bits = snd_pcm_format_physical_width(params_format(params)); | |
| 69 | + if (bits < 8 || bits > 64) | |
| 70 | + return -EINVAL; | |
| 71 | + else if (bits == 8) | |
| 69 | 72 | buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE; |
| 70 | − break; | |
| 71 | − case SNDRV_PCM_FORMAT_S16_LE: | |
| 73 | + else if (bits == 16) | |
| 72 | 74 | buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; |
| 73 | − break; | |
| 74 | − case SNDRV_PCM_FORMAT_S18_3LE: | |
| 75 | − case SNDRV_PCM_FORMAT_S20_3LE: | |
| 76 | − case SNDRV_PCM_FORMAT_S24_LE: | |
| 77 | − case SNDRV_PCM_FORMAT_S32_LE: | |
| 75 | + else if (bits <= 32) | |
| 78 | 76 | buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 79 | − break; | |
| 80 | − default: | |
| 81 | − return -EINVAL; | |
| 82 | − } | |
| 77 | + else | |
| 78 | + buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES; | |
| 83 | 79 | |
| 84 | 80 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 85 | 81 | slave_config->direction = DMA_MEM_TO_DEV; |
| @@ -2428,6 +2428,7 @@ static int snd_pcm_hwsync(struct snd_pcm_substream *substream) · 2427 unmodified lines | ||
| 2428 | 2428 | case SNDRV_PCM_STATE_DRAINING: |
| 2429 | 2429 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) |
| 2430 | 2430 | goto __badfd; |
| 2431 | + /* Fall through */ | |
| 2431 | 2432 | case SNDRV_PCM_STATE_RUNNING: |
| 2432 | 2433 | if ((err = snd_pcm_update_hw_ptr(substream)) < 0) |
| 2433 | 2434 | break; |
| @@ -2460,6 +2461,7 @@ static int snd_pcm_delay(struct snd_pcm_substream *substream, · 26 unmodified lines | ||
| 2460 | 2461 | case SNDRV_PCM_STATE_DRAINING: |
| 2461 | 2462 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) |
| 2462 | 2463 | goto __badfd; |
| 2464 | + /* Fall through */ | |
| 2463 | 2465 | case SNDRV_PCM_STATE_RUNNING: |
| 2464 | 2466 | if ((err = snd_pcm_update_hw_ptr(substream)) < 0) |
| 2465 | 2467 | break; |
| @@ -3199,6 +3201,14 @@ int snd_pcm_lib_default_mmap(struct snd_pcm_substream *substream, · 733 unmodified lines | ||
| 3199 | 3201 | struct vm_area_struct *area) |
| 3200 | 3202 | { |
| 3201 | 3203 | area->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; |
| 3204 | +#ifdef CONFIG_GENERIC_ALLOCATOR | |
| 3205 | + if (substream->dma_buffer.dev.type == SNDRV_DMA_TYPE_DEV_IRAM) { | |
| 3206 | + area->vm_page_prot = pgprot_writecombine(area->vm_page_prot); | |
| 3207 | + return remap_pfn_range(area, area->vm_start, | |
| 3208 | + substream->dma_buffer.addr >> PAGE_SHIFT, | |
| 3209 | + area->vm_end - area->vm_start, area->vm_page_prot); | |
| 3210 | + } | |
| 3211 | +#endif /* CONFIG_GENERIC_ALLOCATOR */ | |
| 3202 | 3212 | #ifdef ARCH_HAS_DMA_MMAP_COHERENT |
| 3203 | 3213 | if (!substream->ops->page && |
| 3204 | 3214 | substream->dma_buffer.dev.type == SNDRV_DMA_TYPE_DEV) |
| @@ -390,6 +390,11 @@ void snd_opl3_note_on(void *p, int note, int vel, struct snd_midi_channel *chan) · 389 unmodified lines | ||
| 390 | 390 | voice = snd_opl3_oss_map[chan->number]; |
| 391 | 391 | } |
| 392 | 392 | |
| 393 | + if (voice < 0) { | |
| 394 | + spin_unlock_irqrestore(&opl3->voice_lock, flags); | |
| 395 | + return; | |
| 396 | + } | |
| 397 | + | |
| 393 | 398 | if (voice < MAX_OPL2_VOICES) { |
| 394 | 399 | /* Left register block for voices 0 .. 8 */ |
| 395 | 400 | reg_side = OPL3_LEFT; |
| @@ -46,8 +46,9 @@ static int snd_pcsp_create(struct snd_card *card) · 45 unmodified lines | ||
| 46 | 46 | int err; |
| 47 | 47 | int div, min_div, order; |
| 48 | 48 | |
| 49 | + hrtimer_get_res(CLOCK_MONOTONIC, &tp); | |
| 50 | + | |
| 49 | 51 | if (!nopcm) { |
| 50 | − hrtimer_get_res(CLOCK_MONOTONIC, &tp); | |
| 51 | 52 | if (tp.tv_sec || tp.tv_nsec > PCSP_MAX_PERIOD_NS) { |
| 52 | 53 | printk(KERN_ERR "PCSP: Timer resolution is not sufficient " |
| 53 | 54 | "(%linS)\n", tp.tv_nsec); |
| @@ -11,6 +11,21 @@ config SND_FIREWIRE_LIB · 10 unmodified lines | ||
| 11 | 11 | tristate |
| 12 | 12 | depends on SND_PCM |
| 13 | 13 | |
| 14 | +config SND_DICE | |
| 15 | + tristate "DICE-based DACs (EXPERIMENTAL)" | |
| 16 | + select SND_HWDEP | |
| 17 | + select SND_PCM | |
| 18 | + select SND_FIREWIRE_LIB | |
| 19 | + help | |
| 20 | + Say Y here to include support for many DACs based on the DICE | |
| 21 | + chip family (DICE-II/Jr/Mini) from TC Applied Technologies. | |
| 22 | + | |
| 23 | + At the moment, this driver supports playback only. If you | |
| 24 | + want to use devices that support capturing, use FFADO instead. | |
| 25 | + | |
| 26 | + To compile this driver as a module, choose M here: the module | |
| 27 | + will be called snd-dice. | |
| 28 | + | |
| 14 | 29 | config SND_FIREWIRE_SPEAKERS |
| 15 | 30 | tristate "FireWire speakers" |
| 16 | 31 | select SND_PCM |
| @@ -1,10 +1,12 @@ | ||
| 1 | 1 | snd-firewire-lib-objs := lib.o iso-resources.o packets-buffer.o \ |
| 2 | 2 | fcp.o cmp.o amdtp.o |
| 3 | +snd-dice-objs := dice.o | |
| 3 | 4 | snd-firewire-speakers-objs := speakers.o |
| 4 | 5 | snd-isight-objs := isight.o |
| 5 | 6 | snd-scs1x-objs := scs1x.o |
| 6 | 7 | |
| 7 | 8 | obj-$(CONFIG_SND_FIREWIRE_LIB) += snd-firewire-lib.o |
| 9 | +obj-$(CONFIG_SND_DICE) += snd-dice.o | |
| 8 | 10 | obj-$(CONFIG_SND_FIREWIRE_SPEAKERS) += snd-firewire-speakers.o |
| 9 | 11 | obj-$(CONFIG_SND_ISIGHT) += snd-isight.o |
| 10 | 12 | obj-$(CONFIG_SND_SCS1X) += snd-scs1x.o |
| @@ -42,9 +42,6 @@ static void pcm_period_tasklet(unsigned long data); · 41 unmodified lines | ||
| 42 | 42 | int amdtp_out_stream_init(struct amdtp_out_stream *s, struct fw_unit *unit, |
| 43 | 43 | enum cip_out_flags flags) |
| 44 | 44 | { |
| 45 | − if (flags != CIP_NONBLOCKING) | |
| 46 | − return -EINVAL; | |
| 47 | − | |
| 48 | 45 | s->unit = fw_unit_get(unit); |
| 49 | 46 | s->flags = flags; |
| 50 | 47 | s->context = ERR_PTR(-1); |
| @@ -62,73 +59,91 @@ EXPORT_SYMBOL(amdtp_out_stream_init); · 11 unmodified lines | ||
| 62 | 59 | */ |
| 63 | 60 | void amdtp_out_stream_destroy(struct amdtp_out_stream *s) |
| 64 | 61 | { |
| 65 | − WARN_ON(!IS_ERR(s->context)); | |
| 62 | + WARN_ON(amdtp_out_stream_running(s)); | |
| 66 | 63 | mutex_destroy(&s->mutex); |
| 67 | 64 | fw_unit_put(s->unit); |
| 68 | 65 | } |
| 69 | 66 | EXPORT_SYMBOL(amdtp_out_stream_destroy); |
| 70 | 67 | |
| 68 | +const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT] = { | |
| 69 | + [CIP_SFC_32000] = 8, | |
| 70 | + [CIP_SFC_44100] = 8, | |
| 71 | + [CIP_SFC_48000] = 8, | |
| 72 | + [CIP_SFC_88200] = 16, | |
| 73 | + [CIP_SFC_96000] = 16, | |
| 74 | + [CIP_SFC_176400] = 32, | |
| 75 | + [CIP_SFC_192000] = 32, | |
| 76 | +}; | |
| 77 | +EXPORT_SYMBOL(amdtp_syt_intervals); | |
| 78 | + | |
| 71 | 79 | /** |
| 72 | − * amdtp_out_stream_set_rate - set the sample rate | |
| 80 | + * amdtp_out_stream_set_parameters - set stream parameters | |
| 73 | 81 | * @s: the AMDTP output stream to configure |
| 74 | 82 | * @rate: the sample rate |
| 83 | + * @pcm_channels: the number of PCM samples in each data block, to be encoded | |
| 84 | + * as AM824 multi-bit linear audio | |
| 85 | + * @midi_ports: the number of MIDI ports (i.e., MPX-MIDI Data Channels) | |
| 75 | 86 | * |
| 76 | − * The sample rate must be set before the stream is started, and must not be | |
| 87 | + * The parameters must be set before the stream is started, and must not be | |
| 77 | 88 | * changed while the stream is running. |
| 78 | 89 | */ |
| 79 | −void amdtp_out_stream_set_rate(struct amdtp_out_stream *s, unsigned int rate) | |
| 90 | +void amdtp_out_stream_set_parameters(struct amdtp_out_stream *s, | |
| 91 | + unsigned int rate, | |
| 92 | + unsigned int pcm_channels, | |
| 93 | + unsigned int midi_ports) | |
| 80 | 94 | { |
| 81 | − static const struct { | |
| 82 | − unsigned int rate; | |
| 83 | − unsigned int syt_interval; | |
| 84 | − } rate_info[] = { | |
| 85 | − [CIP_SFC_32000] = { 32000, 8, }, | |
| 86 | − [CIP_SFC_44100] = { 44100, 8, }, | |
| 87 | − [CIP_SFC_48000] = { 48000, 8, }, | |
| 88 | − [CIP_SFC_88200] = { 88200, 16, }, | |
| 89 | − [CIP_SFC_96000] = { 96000, 16, }, | |
| 90 | − [CIP_SFC_176400] = { 176400, 32, }, | |
| 91 | − [CIP_SFC_192000] = { 192000, 32, }, | |
| 95 | + static const unsigned int rates[] = { | |
| 96 | + [CIP_SFC_32000] = 32000, | |
| 97 | + [CIP_SFC_44100] = 44100, | |
| 98 | + [CIP_SFC_48000] = 48000, | |
| 99 | + [CIP_SFC_88200] = 88200, | |
| 100 | + [CIP_SFC_96000] = 96000, | |
| 101 | + [CIP_SFC_176400] = 176400, | |
| 102 | + [CIP_SFC_192000] = 192000, | |
| 92 | 103 | }; |
| 93 | 104 | unsigned int sfc; |
| 94 | 105 | |
| 95 | − if (WARN_ON(!IS_ERR(s->context))) | |
| 106 | + if (WARN_ON(amdtp_out_stream_running(s))) | |
| 96 | 107 | return; |
| 97 | 108 | |
| 98 | − for (sfc = 0; sfc < ARRAY_SIZE(rate_info); ++sfc) | |
| 99 | − if (rate_info[sfc].rate == rate) { | |
| 100 | − s->sfc = sfc; | |
| 101 | − s->syt_interval = rate_info[sfc].syt_interval; | |
| 102 | − return; | |
| 103 | − } | |
| 109 | + for (sfc = 0; sfc < CIP_SFC_COUNT; ++sfc) | |
| 110 | + if (rates[sfc] == rate) | |
| 111 | + goto sfc_found; | |
| 104 | 112 | WARN_ON(1); |
| 113 | + return; | |
| 114 | + | |
| 115 | +sfc_found: | |
| 116 | + s->dual_wire = (s->flags & CIP_HI_DUALWIRE) && sfc > CIP_SFC_96000; | |
| 117 | + if (s->dual_wire) { | |
| 118 | + sfc -= 2; | |
| 119 | + rate /= 2; | |
| 120 | + pcm_channels *= 2; | |
| 121 | + } | |
| 122 | + s->sfc = sfc; | |
| 123 | + s->data_block_quadlets = pcm_channels + DIV_ROUND_UP(midi_ports, 8); | |
| 124 | + s->pcm_channels = pcm_channels; | |
| 125 | + s->midi_ports = midi_ports; | |
| 126 | + | |
| 127 | + s->syt_interval = amdtp_syt_intervals[sfc]; | |
| 128 | + | |
| 129 | + /* default buffering in the device */ | |
| 130 | + s->transfer_delay = TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE; | |
| 131 | + if (s->flags & CIP_BLOCKING) | |
| 132 | + /* additional buffering needed to adjust for no-data packets */ | |
| 133 | + s->transfer_delay += TICKS_PER_SECOND * s->syt_interval / rate; | |
| 105 | 134 | } |
| 106 | −EXPORT_SYMBOL(amdtp_out_stream_set_rate); | |
| 135 | +EXPORT_SYMBOL(amdtp_out_stream_set_parameters); | |
| 107 | 136 | |
| 108 | 137 | /** |
| 109 | 138 | * amdtp_out_stream_get_max_payload - get the stream's packet size |
| 110 | 139 | * @s: the AMDTP output stream |
| 111 | 140 | * |
| 112 | 141 | * This function must not be called before the stream has been configured |
| 113 | − * with amdtp_out_stream_set_hw_params(), amdtp_out_stream_set_pcm(), and | |
| 114 | − * amdtp_out_stream_set_midi(). | |
| 142 | + * with amdtp_out_stream_set_parameters(). | |
| 115 | 143 | */ |
| 116 | 144 | unsigned int amdtp_out_stream_get_max_payload(struct amdtp_out_stream *s) |
| 117 | 145 | { |
| 118 | − static const unsigned int max_data_blocks[] = { | |
| 119 | − [CIP_SFC_32000] = 4, | |
| 120 | − [CIP_SFC_44100] = 6, | |
| 121 | − [CIP_SFC_48000] = 6, | |
| 122 | − [CIP_SFC_88200] = 12, | |
| 123 | − [CIP_SFC_96000] = 12, | |
| 124 | − [CIP_SFC_176400] = 23, | |
| 125 | − [CIP_SFC_192000] = 24, | |
| 126 | − }; | |
| 127 | − | |
| 128 | − s->data_block_quadlets = s->pcm_channels; | |
| 129 | − s->data_block_quadlets += DIV_ROUND_UP(s->midi_ports, 8); | |
| 130 | − | |
| 131 | − return 8 + max_data_blocks[s->sfc] * 4 * s->data_block_quadlets; | |
| 146 | + return 8 + s->syt_interval * s->data_block_quadlets * 4; | |
| 132 | 147 | } |
| 133 | 148 | EXPORT_SYMBOL(amdtp_out_stream_get_max_payload); |
| 134 | 149 | |
| @@ -138,19 +153,26 @@ static void amdtp_write_s16(struct amdtp_out_stream *s, · 3 unmodified lines | ||
| 138 | 153 | static void amdtp_write_s32(struct amdtp_out_stream *s, |
| 139 | 154 | struct snd_pcm_substream *pcm, |
| 140 | 155 | __be32 *buffer, unsigned int frames); |
| 156 | +static void amdtp_write_s16_dualwire(struct amdtp_out_stream *s, | |
| 157 | + struct snd_pcm_substream *pcm, | |
| 158 | + __be32 *buffer, unsigned int frames); | |
| 159 | +static void amdtp_write_s32_dualwire(struct amdtp_out_stream *s, | |
| 160 | + struct snd_pcm_substream *pcm, | |
| 161 | + __be32 *buffer, unsigned int frames); | |
| 141 | 162 | |
| 142 | 163 | /** |
| 143 | 164 | * amdtp_out_stream_set_pcm_format - set the PCM format |
| 144 | 165 | * @s: the AMDTP output stream to configure |
| 145 | 166 | * @format: the format of the ALSA PCM device |
| 146 | 167 | * |
| 147 | − * The sample format must be set before the stream is started, and must not be | |
| 148 | − * changed while the stream is running. | |
| 168 | + * The sample format must be set after the other paramters (rate/PCM channels/ | |
| 169 | + * MIDI) and before the stream is started, and must not be changed while the | |
| 170 | + * stream is running. | |
| 149 | 171 | */ |
| 150 | 172 | void amdtp_out_stream_set_pcm_format(struct amdtp_out_stream *s, |
| 151 | 173 | snd_pcm_format_t format) |
| 152 | 174 | { |
| 153 | − if (WARN_ON(!IS_ERR(s->context))) | |
| 175 | + if (WARN_ON(amdtp_out_stream_running(s))) | |
| 154 | 176 | return; |
| 155 | 177 | |
| 156 | 178 | switch (format) { |
| @@ -158,10 +180,16 @@ void amdtp_out_stream_set_pcm_format(struct amdtp_out_stream *s, · 1 unmodified line | ||
| 158 | 180 | WARN_ON(1); |
| 159 | 181 | /* fall through */ |
| 160 | 182 | case SNDRV_PCM_FORMAT_S16: |
| 161 | − s->transfer_samples = amdtp_write_s16; | |
| 183 | + if (s->dual_wire) | |
| 184 | + s->transfer_samples = amdtp_write_s16_dualwire; | |
| 185 | + else | |
| 186 | + s->transfer_samples = amdtp_write_s16; | |
| 162 | 187 | break; |
| 163 | 188 | case SNDRV_PCM_FORMAT_S32: |
| 164 | − s->transfer_samples = amdtp_write_s32; | |
| 189 | + if (s->dual_wire) | |
| 190 | + s->transfer_samples = amdtp_write_s32_dualwire; | |
| 191 | + else | |
| 192 | + s->transfer_samples = amdtp_write_s32; | |
| 165 | 193 | break; |
| 166 | 194 | } |
| 167 | 195 | } |
| @@ -248,7 +276,7 @@ static unsigned int calculate_syt(struct amdtp_out_stream *s, · 80 unmodified lines | ||
| 248 | 276 | s->last_syt_offset = syt_offset; |
| 249 | 277 | |
| 250 | 278 | if (syt_offset < TICKS_PER_CYCLE) { |
| 251 | − syt_offset += TRANSFER_DELAY_TICKS - TICKS_PER_CYCLE; | |
| 279 | + syt_offset += s->transfer_delay; | |
| 252 | 280 | syt = (cycle + syt_offset / TICKS_PER_CYCLE) << 12; |
| 253 | 281 | syt += syt_offset % TICKS_PER_CYCLE; |
| 254 | 282 | |
| @@ -268,7 +296,7 @@ static void amdtp_write_s32(struct amdtp_out_stream *s, · 13 unmodified lines | ||
| 268 | 296 | |
| 269 | 297 | channels = s->pcm_channels; |
| 270 | 298 | src = (void *)runtime->dma_area + |
| 271 | − s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
| 299 | + frames_to_bytes(runtime, s->pcm_buffer_pointer); | |
| 272 | 300 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; |
| 273 | 301 | frame_step = s->data_block_quadlets - channels; |
| 274 | 302 | |
| @@ -294,7 +322,7 @@ static void amdtp_write_s16(struct amdtp_out_stream *s, · 19 unmodified lines | ||
| 294 | 322 | |
| 295 | 323 | channels = s->pcm_channels; |
| 296 | 324 | src = (void *)runtime->dma_area + |
| 297 | − s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
| 325 | + frames_to_bytes(runtime, s->pcm_buffer_pointer); | |
| 298 | 326 | remaining_frames = runtime->buffer_size - s->pcm_buffer_pointer; |
| 299 | 327 | frame_step = s->data_block_quadlets - channels; |
| 300 | 328 | |
| @@ -310,6 +338,68 @@ static void amdtp_write_s16(struct amdtp_out_stream *s, · 9 unmodified lines | ||
| 310 | 338 | } |
| 311 | 339 | } |
| 312 | 340 | |
| 341 | +static void amdtp_write_s32_dualwire(struct amdtp_out_stream *s, | |
| 342 | + struct snd_pcm_substream *pcm, | |
| 343 | + __be32 *buffer, unsigned int frames) | |
| 344 | +{ | |
| 345 | + struct snd_pcm_runtime *runtime = pcm->runtime; | |
| 346 | + unsigned int channels, frame_adjust_1, frame_adjust_2, i, c; | |
| 347 | + const u32 *src; | |
| 348 | + | |
| 349 | + channels = s->pcm_channels; | |
| 350 | + src = (void *)runtime->dma_area + | |
| 351 | + s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
| 352 | + frame_adjust_1 = channels - 1; | |
| 353 | + frame_adjust_2 = 1 - (s->data_block_quadlets - channels); | |
| 354 | + | |
| 355 | + channels /= 2; | |
| 356 | + for (i = 0; i < frames; ++i) { | |
| 357 | + for (c = 0; c < channels; ++c) { | |
| 358 | + *buffer = cpu_to_be32((*src >> 8) | 0x40000000); | |
| 359 | + src++; | |
| 360 | + buffer += 2; | |
| 361 | + } | |
| 362 | + buffer -= frame_adjust_1; | |
| 363 | + for (c = 0; c < channels; ++c) { | |
| 364 | + *buffer = cpu_to_be32((*src >> 8) | 0x40000000); | |
| 365 | + src++; | |
| 366 | + buffer += 2; | |
| 367 | + } | |
| 368 | + buffer -= frame_adjust_2; | |
| 369 | + } | |
| 370 | +} | |
| 371 | + | |
| 372 | +static void amdtp_write_s16_dualwire(struct amdtp_out_stream *s, | |
| 373 | + struct snd_pcm_substream *pcm, | |
| 374 | + __be32 *buffer, unsigned int frames) | |
| 375 | +{ | |
| 376 | + struct snd_pcm_runtime *runtime = pcm->runtime; | |
| 377 | + unsigned int channels, frame_adjust_1, frame_adjust_2, i, c; | |
| 378 | + const u16 *src; | |
| 379 | + | |
| 380 | + channels = s->pcm_channels; | |
| 381 | + src = (void *)runtime->dma_area + | |
| 382 | + s->pcm_buffer_pointer * (runtime->frame_bits / 8); | |
| 383 | + frame_adjust_1 = channels - 1; | |
| 384 | + frame_adjust_2 = 1 - (s->data_block_quadlets - channels); | |
| 385 | + | |
| 386 | + channels /= 2; | |
| 387 | + for (i = 0; i < frames; ++i) { | |
| 388 | + for (c = 0; c < channels; ++c) { | |
| 389 | + *buffer = cpu_to_be32((*src << 8) | 0x40000000); | |
| 390 | + src++; | |
| 391 | + buffer += 2; | |
| 392 | + } | |
| 393 | + buffer -= frame_adjust_1; | |
| 394 | + for (c = 0; c < channels; ++c) { | |
| 395 | + *buffer = cpu_to_be32((*src << 8) | 0x40000000); | |
| 396 | + src++; | |
| 397 | + buffer += 2; | |
| 398 | + } | |
| 399 | + buffer -= frame_adjust_2; | |
| 400 | + } | |
| 401 | +} | |
| 402 | + | |
| 313 | 403 | static void amdtp_fill_pcm_silence(struct amdtp_out_stream *s, |
| 314 | 404 | __be32 *buffer, unsigned int frames) |
| 315 | 405 | { |
| @@ -344,8 +434,17 @@ static void queue_out_packet(struct amdtp_out_stream *s, unsigned int cycle) · 28 unmodified lines | ||
| 344 | 434 | return; |
| 345 | 435 | index = s->packet_index; |
| 346 | 436 | |
| 347 | − data_blocks = calculate_data_blocks(s); | |
| 348 | 437 | syt = calculate_syt(s, cycle); |
| 438 | + if (!(s->flags & CIP_BLOCKING)) { | |
| 439 | + data_blocks = calculate_data_blocks(s); | |
| 440 | + } else { | |
| 441 | + if (syt != 0xffff) { | |
| 442 | + data_blocks = s->syt_interval; | |
| 443 | + } else { | |
| 444 | + data_blocks = 0; | |
| 445 | + syt = 0xffffff; | |
| 446 | + } | |
| 447 | + } | |
| 349 | 448 | |
| 350 | 449 | buffer = s->buffer.packets[index].buffer; |
| 351 | 450 | buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) | |
| @@ -386,6 +485,9 @@ static void queue_out_packet(struct amdtp_out_stream *s, unsigned int cycle) · 34 unmodified lines | ||
| 386 | 485 | s->packet_index = index; |
| 387 | 486 | |
| 388 | 487 | if (pcm) { |
| 488 | + if (s->dual_wire) | |
| 489 | + data_blocks *= 2; | |
| 490 | + | |
| 389 | 491 | ptr = s->pcm_buffer_pointer + data_blocks; |
| 390 | 492 | if (ptr >= pcm->runtime->buffer_size) |
| 391 | 493 | ptr -= pcm->runtime->buffer_size; |
| @@ -455,9 +557,8 @@ static int queue_initial_skip_packets(struct amdtp_out_stream *s) · 63 unmodified lines | ||
| 455 | 557 | * @speed: firewire speed code |
| 456 | 558 | * |
| 457 | 559 | * The stream cannot be started until it has been configured with |
| 458 | − * amdtp_out_stream_set_hw_params(), amdtp_out_stream_set_pcm(), and | |
| 459 | − * amdtp_out_stream_set_midi(); and it must be started before any | |
| 460 | − * PCM or MIDI device can be started. | |
| 560 | + * amdtp_out_stream_set_parameters() and amdtp_out_stream_set_pcm_format(), | |
| 561 | + * and it must be started before any PCM or MIDI device can be started. | |
| 461 | 562 | */ |
| 462 | 563 | int amdtp_out_stream_start(struct amdtp_out_stream *s, int channel, int speed) |
| 463 | 564 | { |
| @@ -477,7 +578,7 @@ int amdtp_out_stream_start(struct amdtp_out_stream *s, int channel, int speed) · 13 unmodified lines | ||
| 477 | 578 | |
| 478 | 579 | mutex_lock(&s->mutex); |
| 479 | 580 | |
| 480 | − if (WARN_ON(!IS_ERR(s->context) || | |
| 581 | + if (WARN_ON(amdtp_out_stream_running(s) || | |
| 481 | 582 | (!s->pcm_channels && !s->midi_ports))) { |
| 482 | 583 | err = -EBADFD; |
| 483 | 584 | goto err_unlock; |
| @@ -573,7 +674,7 @@ void amdtp_out_stream_stop(struct amdtp_out_stream *s) · 89 unmodified lines | ||
| 573 | 674 | { |
| 574 | 675 | mutex_lock(&s->mutex); |
| 575 | 676 | |
| 576 | − if (IS_ERR(s->context)) { | |
| 677 | + if (!amdtp_out_stream_running(s)) { | |
| 577 | 678 | mutex_unlock(&s->mutex); |
| 578 | 679 | return; |
| 579 | 680 | } |
| @@ -1,6 +1,7 @@ | ||
| 1 | 1 | #ifndef SOUND_FIREWIRE_AMDTP_H_INCLUDED |
| 2 | 2 | #define SOUND_FIREWIRE_AMDTP_H_INCLUDED |
| 3 | 3 | |
| 4 | +#include <linux/err.h> | |
| 4 | 5 | #include <linux/interrupt.h> |
| 5 | 6 | #include <linux/mutex.h> |
| 6 | 7 | #include "packets-buffer.h" |
| @@ -11,9 +12,18 @@ · 4 unmodified lines | ||
| 11 | 12 | * sample_rate/8000 samples, with rounding up or down to adjust |
| 12 | 13 | * for clock skew and left-over fractional samples. This should |
| 13 | 14 | * be used if supported by the device. |
| 15 | + * @CIP_BLOCKING: In blocking mode, each packet contains either zero or | |
| 16 | + * SYT_INTERVAL samples, with these two types alternating so that | |
| 17 | + * the overall sample rate comes out right. | |
| 18 | + * @CIP_HI_DUALWIRE: At rates above 96 kHz, pretend that the stream runs | |
| 19 | + * at half the actual sample rate with twice the number of channels; | |
| 20 | + * two samples of a channel are stored consecutively in the packet. | |
| 21 | + * Requires blocking mode and SYT_INTERVAL-aligned PCM buffer size. | |
| 14 | 22 | */ |
| 15 | 23 | enum cip_out_flags { |
| 16 | − CIP_NONBLOCKING = 0, | |
| 24 | + CIP_NONBLOCKING = 0x00, | |
| 25 | + CIP_BLOCKING = 0x01, | |
| 26 | + CIP_HI_DUALWIRE = 0x02, | |
| 17 | 27 | }; |
| 18 | 28 | |
| 19 | 29 | /** |
| @@ -27,6 +37,7 @@ enum cip_sfc { · 7 unmodified lines | ||
| 27 | 37 | CIP_SFC_96000 = 4, |
| 28 | 38 | CIP_SFC_176400 = 5, |
| 29 | 39 | CIP_SFC_192000 = 6, |
| 40 | + CIP_SFC_COUNT | |
| 30 | 41 | }; |
| 31 | 42 | |
| 32 | 43 | #define AMDTP_OUT_PCM_FORMAT_BITS (SNDRV_PCM_FMTBIT_S16 | \ |
| @@ -43,6 +54,7 @@ struct amdtp_out_stream { · 10 unmodified lines | ||
| 43 | 54 | struct mutex mutex; |
| 44 | 55 | |
| 45 | 56 | enum cip_sfc sfc; |
| 57 | + bool dual_wire; | |
| 46 | 58 | unsigned int data_block_quadlets; |
| 47 | 59 | unsigned int pcm_channels; |
| 48 | 60 | unsigned int midi_ports; |
| @@ -51,6 +63,7 @@ struct amdtp_out_stream { · 2 unmodified lines | ||
| 51 | 63 | __be32 *buffer, unsigned int frames); |
| 52 | 64 | |
| 53 | 65 | unsigned int syt_interval; |
| 66 | + unsigned int transfer_delay; | |
| 54 | 67 | unsigned int source_node_id_field; |
| 55 | 68 | struct iso_packets_buffer buffer; |
| 56 | 69 | |
| @@ -74,7 +87,10 @@ int amdtp_out_stream_init(struct amdtp_out_stream *s, struct fw_unit *unit, · 17 unmodified lines | ||
| 74 | 87 | enum cip_out_flags flags); |
| 75 | 88 | void amdtp_out_stream_destroy(struct amdtp_out_stream *s); |
| 76 | 89 | |
| 77 | −void amdtp_out_stream_set_rate(struct amdtp_out_stream *s, unsigned int rate); | |
| 90 | +void amdtp_out_stream_set_parameters(struct amdtp_out_stream *s, | |
| 91 | + unsigned int rate, | |
| 92 | + unsigned int pcm_channels, | |
| 93 | + unsigned int midi_ports); | |
| 78 | 94 | unsigned int amdtp_out_stream_get_max_payload(struct amdtp_out_stream *s); |
| 79 | 95 | |
| 80 | 96 | int amdtp_out_stream_start(struct amdtp_out_stream *s, int channel, int speed); |
| @@ -87,31 +103,11 @@ void amdtp_out_stream_pcm_prepare(struct amdtp_out_stream *s); · 6 unmodified lines | ||
| 87 | 103 | unsigned long amdtp_out_stream_pcm_pointer(struct amdtp_out_stream *s); |
| 88 | 104 | void amdtp_out_stream_pcm_abort(struct amdtp_out_stream *s); |
| 89 | 105 | |
| 90 | −/** | |
| 91 | − * amdtp_out_stream_set_pcm - configure format of PCM samples | |
| 92 | − * @s: the AMDTP output stream to be configured | |
| 93 | − * @pcm_channels: the number of PCM samples in each data block, to be encoded | |
| 94 | − * as AM824 multi-bit linear audio | |
| 95 | − * | |
| 96 | − * This function must not be called while the stream is running. | |
| 97 | − */ | |
| 98 | −static inline void amdtp_out_stream_set_pcm(struct amdtp_out_stream *s, | |
| 99 | − unsigned int pcm_channels) | |
| 100 | −{ | |
| 101 | − s->pcm_channels = pcm_channels; | |
| 102 | −} | |
| 106 | +extern const unsigned int amdtp_syt_intervals[CIP_SFC_COUNT]; | |
| 103 | 107 | |
| 104 | −/** | |
| 105 | − * amdtp_out_stream_set_midi - configure format of MIDI data | |
| 106 | − * @s: the AMDTP output stream to be configured | |
| 107 | − * @midi_ports: the number of MIDI ports (i.e., MPX-MIDI Data Channels) | |
| 108 | − * | |
| 109 | − * This function must not be called while the stream is running. | |
| 110 | − */ | |
| 111 | −static inline void amdtp_out_stream_set_midi(struct amdtp_out_stream *s, | |
| 112 | − unsigned int midi_ports) | |
| 108 | +static inline bool amdtp_out_stream_running(struct amdtp_out_stream *s) | |
| 113 | 109 | { |
| 114 | − s->midi_ports = midi_ports; | |
| 110 | + return !IS_ERR(s->context); | |
| 115 | 111 | } |
| 116 | 112 | |
| 117 | 113 | /** |
| @@ -48,9 +48,6 @@ static int pcr_modify(struct cmp_connection *c, · 47 unmodified lines | ||
| 48 | 48 | int (*check)(struct cmp_connection *c, __be32 pcr), |
| 49 | 49 | enum bus_reset_handling bus_reset_handling) |
| 50 | 50 | { |
| 51 | − struct fw_device *device = fw_parent_device(c->resources.unit); | |
| 52 | − int generation = c->resources.generation; | |
| 53 | − int rcode, errors = 0; | |
| 54 | 51 | __be32 old_arg, buffer[2]; |
| 55 | 52 | int err; |
| 56 | 53 | |
| @@ -59,36 +56,31 @@ static int pcr_modify(struct cmp_connection *c, · 2 unmodified lines | ||
| 59 | 56 | old_arg = buffer[0]; |
| 60 | 57 | buffer[1] = modify(c, buffer[0]); |
| 61 | 58 | |
| 62 | − rcode = fw_run_transaction( | |
| 63 | − device->card, TCODE_LOCK_COMPARE_SWAP, | |
| 64 | − device->node_id, generation, device->max_speed, | |
| 59 | + err = snd_fw_transaction( | |
| 60 | + c->resources.unit, TCODE_LOCK_COMPARE_SWAP, | |
| 65 | 61 | CSR_REGISTER_BASE + CSR_IPCR(c->pcr_index), |
| 66 | − buffer, 8); | |
| 67 | − | |
| 68 | − if (rcode == RCODE_COMPLETE) { | |
| 69 | − if (buffer[0] == old_arg) /* success? */ | |
| 70 | − break; | |
| 71 | − | |
| 72 | − if (check) { | |
| 73 | − err = check(c, buffer[0]); | |
| 74 | − if (err < 0) | |
| 75 | − return err; | |
| 76 | − } | |
| 77 | − } else if (rcode == RCODE_GENERATION) | |
| 78 | − goto bus_reset; | |
| 79 | − else if (rcode_is_permanent_error(rcode) || ++errors >= 3) | |
| 80 | − goto io_error; | |
| 62 | + buffer, 8, | |
| 63 | + FW_FIXED_GENERATION | c->resources.generation); | |
| 64 | + | |
| 65 | + if (err < 0) { | |
| 66 | + if (err == -EAGAIN && | |
| 67 | + bus_reset_handling == SUCCEED_ON_BUS_RESET) | |
| 68 | + err = 0; | |
| 69 | + return err; | |
| 70 | + } | |
| 71 | + | |
| 72 | + if (buffer[0] == old_arg) /* success? */ | |
| 73 | + break; | |
| 74 | + | |
| 75 | + if (check) { | |
| 76 | + err = check(c, buffer[0]); | |
| 77 | + if (err < 0) | |
| 78 | + return err; | |
| 79 | + } | |
| 81 | 80 | } |
| 82 | 81 | c->last_pcr_value = buffer[1]; |
| 83 | 82 | |
| 84 | 83 | return 0; |
| 85 | − | |
| 86 | −io_error: | |
| 87 | − cmp_error(c, "transaction failed: %s\n", fw_rcode_string(rcode)); | |
| 88 | − return -EIO; | |
| 89 | − | |
| 90 | −bus_reset: | |
| 91 | − return bus_reset_handling == ABORT_ON_BUS_RESET ? -EAGAIN : 0; | |
| 92 | 84 | } |
| 93 | 85 | |
| 94 | 86 | |
| @@ -108,7 +100,7 @@ int cmp_connection_init(struct cmp_connection *c, · 13 unmodified lines | ||
| 108 | 100 | |
| 109 | 101 | err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST, |
| 110 | 102 | CSR_REGISTER_BASE + CSR_IMPR, |
| 111 | − &impr_be, 4); | |
| 103 | + &impr_be, 4, 0); | |
| 112 | 104 | if (err < 0) |
| 113 | 105 | return err; |
| 114 | 106 | impr = be32_to_cpu(impr_be); |
| @@ -0,0 +1,371 @@ | ||
| 1 | +#ifndef SOUND_FIREWIRE_DICE_INTERFACE_H_INCLUDED | |
| 2 | +#define SOUND_FIREWIRE_DICE_INTERFACE_H_INCLUDED | |
| 3 | + | |
| 4 | +/* | |
| 5 | + * DICE device interface definitions | |
| 6 | + */ | |
| 7 | + | |
| 8 | +/* | |
| 9 | + * Generally, all registers can be read like memory, i.e., with quadlet read or | |
| 10 | + * block read transactions with at least quadlet-aligned offset and length. | |
| 11 | + * Writes are not allowed except where noted; quadlet-sized registers must be | |
| 12 | + * written with a quadlet write transaction. | |
| 13 | + * | |
| 14 | + * All values are in big endian. The DICE firmware runs on a little-endian CPU | |
| 15 | + * and just byte-swaps _all_ quadlets on the bus, so values without endianness | |
| 16 | + * (e.g. strings) get scrambled and must be byte-swapped again by the driver. | |
| 17 | + */ | |
| 18 | + | |
| 19 | +/* | |
| 20 | + * Streaming is handled by the "DICE driver" interface. Its registers are | |
| 21 | + * located in this private address space. | |
| 22 | + */ | |
| 23 | +#define DICE_PRIVATE_SPACE 0xffffe0000000uLL | |
| 24 | + | |
| 25 | +/* | |
| 26 | + * The registers are organized in several sections, which are organized | |
| 27 | + * separately to allow them to be extended individually. Whether a register is | |
| 28 | + * supported can be detected by checking its offset against its section's size. | |
| 29 | + * | |
| 30 | + * The section offset values are relative to DICE_PRIVATE_SPACE; the offset/ | |
| 31 | + * size values are measured in quadlets. Read-only. | |
| 32 | + */ | |
| 33 | +#define DICE_GLOBAL_OFFSET 0x00 | |
| 34 | +#define DICE_GLOBAL_SIZE 0x04 | |
| 35 | +#define DICE_TX_OFFSET 0x08 | |
| 36 | +#define DICE_TX_SIZE 0x0c | |
| 37 | +#define DICE_RX_OFFSET 0x10 | |
| 38 | +#define DICE_RX_SIZE 0x14 | |
| 39 | +#define DICE_EXT_SYNC_OFFSET 0x18 | |
| 40 | +#define DICE_EXT_SYNC_SIZE 0x1c | |
| 41 | +#define DICE_UNUSED2_OFFSET 0x20 | |
| 42 | +#define DICE_UNUSED2_SIZE 0x24 | |
| 43 | + | |
| 44 | +/* | |
| 45 | + * Global settings. | |
| 46 | + */ | |
| 47 | + | |
| 48 | +/* | |
| 49 | + * Stores the full 64-bit address (node ID and offset in the node's address | |
| 50 | + * space) where the device will send notifications. Must be changed with | |
| 51 | + * a compare/swap transaction by the owner. This register is automatically | |
| 52 | + * cleared on a bus reset. | |
| 53 | + */ | |
| 54 | +#define GLOBAL_OWNER 0x000 | |
| 55 | +#define OWNER_NO_OWNER 0xffff000000000000uLL | |
| 56 | +#define OWNER_NODE_SHIFT 48 | |
| 57 | + | |
| 58 | +/* | |
| 59 | + * A bitmask with asynchronous events; read-only. When any event(s) happen, | |
| 60 | + * the bits of previous events are cleared, and the value of this register is | |
| 61 | + * also written to the address stored in the owner register. | |
| 62 | + */ | |
| 63 | +#define GLOBAL_NOTIFICATION 0x008 | |
| 64 | +/* Some registers in the Rx/Tx sections may have changed. */ | |
| 65 | +#define NOTIFY_RX_CFG_CHG 0x00000001 | |
| 66 | +#define NOTIFY_TX_CFG_CHG 0x00000002 | |
| 67 | +/* Lock status of the current clock source may have changed. */ | |
| 68 | +#define NOTIFY_LOCK_CHG 0x00000010 | |
| 69 | +/* Write to the clock select register has been finished. */ | |
| 70 | +#define NOTIFY_CLOCK_ACCEPTED 0x00000020 | |
| 71 | +/* Lock status of some clock source has changed. */ | |
| 72 | +#define NOTIFY_EXT_STATUS 0x00000040 | |
| 73 | +/* Other bits may be used for device-specific events. */ | |
| 74 | + | |
| 75 | +/* | |
| 76 | + * A name that can be customized for each device; read/write. Padded with zero | |
| 77 | + * bytes. Quadlets are byte-swapped. The encoding is whatever the host driver | |
| 78 | + * happens to be using. | |
| 79 | + */ | |
| 80 | +#define GLOBAL_NICK_NAME 0x00c | |
| 81 | +#define NICK_NAME_SIZE 64 | |
| 82 | + | |
| 83 | +/* | |
| 84 | + * The current sample rate and clock source; read/write. Whether a clock | |
| 85 | + * source or sample rate is supported is device-specific; the internal clock | |
| 86 | + * source is always available. Low/mid/high = up to 48/96/192 kHz. This | |
| 87 | + * register can be changed even while streams are running. | |
| 88 | + */ | |
| 89 | +#define GLOBAL_CLOCK_SELECT 0x04c | |
| 90 | +#define CLOCK_SOURCE_MASK 0x000000ff | |
| 91 | +#define CLOCK_SOURCE_AES1 0x00000000 | |
| 92 | +#define CLOCK_SOURCE_AES2 0x00000001 | |
| 93 | +#define CLOCK_SOURCE_AES3 0x00000002 | |
| 94 | +#define CLOCK_SOURCE_AES4 0x00000003 | |
| 95 | +#define CLOCK_SOURCE_AES_ANY 0x00000004 | |
| 96 | +#define CLOCK_SOURCE_ADAT 0x00000005 | |
| 97 | +#define CLOCK_SOURCE_TDIF 0x00000006 | |
| 98 | +#define CLOCK_SOURCE_WC 0x00000007 | |
| 99 | +#define CLOCK_SOURCE_ARX1 0x00000008 | |
| 100 | +#define CLOCK_SOURCE_ARX2 0x00000009 | |
| 101 | +#define CLOCK_SOURCE_ARX3 0x0000000a | |
| 102 | +#define CLOCK_SOURCE_ARX4 0x0000000b | |
| 103 | +#define CLOCK_SOURCE_INTERNAL 0x0000000c | |
| 104 | +#define CLOCK_RATE_MASK 0x0000ff00 | |
| 105 | +#define CLOCK_RATE_32000 0x00000000 | |
| 106 | +#define CLOCK_RATE_44100 0x00000100 | |
| 107 | +#define CLOCK_RATE_48000 0x00000200 | |
| 108 | +#define CLOCK_RATE_88200 0x00000300 | |
| 109 | +#define CLOCK_RATE_96000 0x00000400 | |
| 110 | +#define CLOCK_RATE_176400 0x00000500 | |
| 111 | +#define CLOCK_RATE_192000 0x00000600 | |
| 112 | +#define CLOCK_RATE_ANY_LOW 0x00000700 | |
| 113 | +#define CLOCK_RATE_ANY_MID 0x00000800 | |
| 114 | +#define CLOCK_RATE_ANY_HIGH 0x00000900 | |
| 115 | +#define CLOCK_RATE_NONE 0x00000a00 | |
| 116 | +#define CLOCK_RATE_SHIFT 8 | |
| 117 | + | |
| 118 | +/* | |
| 119 | + * Enable streaming; read/write. Writing a non-zero value (re)starts all | |
| 120 | + * streams that have a valid iso channel set; zero stops all streams. The | |
| 121 | + * streams' parameters must be configured before starting. This register is | |
| 122 | + * automatically cleared on a bus reset. | |
| 123 | + */ | |
| 124 | +#define GLOBAL_ENABLE 0x050 | |
| 125 | + | |
| 126 | +/* | |
| 127 | + * Status of the sample clock; read-only. | |
| 128 | + */ | |
| 129 | +#define GLOBAL_STATUS 0x054 | |
| 130 | +/* The current clock source is locked. */ | |
| 131 | +#define STATUS_SOURCE_LOCKED 0x00000001 | |
| 132 | +/* The actual sample rate; CLOCK_RATE_32000-_192000 or _NONE. */ | |
| 133 | +#define STATUS_NOMINAL_RATE_MASK 0x0000ff00 | |
| 134 | + | |
| 135 | +/* | |
| 136 | + * Status of all clock sources; read-only. | |
| 137 | + */ | |
| 138 | +#define GLOBAL_EXTENDED_STATUS 0x058 | |
| 139 | +/* | |
| 140 | + * The _LOCKED bits always show the current status; any change generates | |
| 141 | + * a notification. | |
| 142 | + */ | |
| 143 | +#define EXT_STATUS_AES1_LOCKED 0x00000001 | |
| 144 | +#define EXT_STATUS_AES2_LOCKED 0x00000002 | |
| 145 | +#define EXT_STATUS_AES3_LOCKED 0x00000004 | |
| 146 | +#define EXT_STATUS_AES4_LOCKED 0x00000008 | |
| 147 | +#define EXT_STATUS_ADAT_LOCKED 0x00000010 | |
| 148 | +#define EXT_STATUS_TDIF_LOCKED 0x00000020 | |
| 149 | +#define EXT_STATUS_ARX1_LOCKED 0x00000040 | |
| 150 | +#define EXT_STATUS_ARX2_LOCKED 0x00000080 | |
| 151 | +#define EXT_STATUS_ARX3_LOCKED 0x00000100 | |
| 152 | +#define EXT_STATUS_ARX4_LOCKED 0x00000200 | |
| 153 | +#define EXT_STATUS_WC_LOCKED 0x00000400 | |
| 154 | +/* | |
| 155 | + * The _SLIP bits do not generate notifications; a set bit indicates that an | |
| 156 | + * error occurred since the last time when this register was read with | |
| 157 | + * a quadlet read transaction. | |
| 158 | + */ | |
| 159 | +#define EXT_STATUS_AES1_SLIP 0x00010000 | |
| 160 | +#define EXT_STATUS_AES2_SLIP 0x00020000 | |
| 161 | +#define EXT_STATUS_AES3_SLIP 0x00040000 | |
| 162 | +#define EXT_STATUS_AES4_SLIP 0x00080000 | |
| 163 | +#define EXT_STATUS_ADAT_SLIP 0x00100000 | |
| 164 | +#define EXT_STATUS_TDIF_SLIP 0x00200000 | |
| 165 | +#define EXT_STATUS_ARX1_SLIP 0x00400000 | |
| 166 | +#define EXT_STATUS_ARX2_SLIP 0x00800000 | |
| 167 | +#define EXT_STATUS_ARX3_SLIP 0x01000000 | |
| 168 | +#define EXT_STATUS_ARX4_SLIP 0x02000000 | |
| 169 | +#define EXT_STATUS_WC_SLIP 0x04000000 | |
| 170 | + | |
| 171 | +/* | |
| 172 | + * The measured rate of the current clock source, in Hz; read-only. | |
| 173 | + */ | |
| 174 | +#define GLOBAL_SAMPLE_RATE 0x05c | |
| 175 | + | |
| 176 | +/* | |
| 177 | + * The version of the DICE driver specification that this device conforms to; | |
| 178 | + * read-only. | |
| 179 | + */ | |
| 180 | +#define GLOBAL_VERSION 0x060 | |
| 181 | + | |
| 182 | +/* Some old firmware versions do not have the following global registers: */ | |
| 183 | + | |
| 184 | +/* | |
| 185 | + * Supported sample rates and clock sources; read-only. | |
| 186 | + */ | |
| 187 | +#define GLOBAL_CLOCK_CAPABILITIES 0x064 | |
| 188 | +#define CLOCK_CAP_RATE_32000 0x00000001 | |
| 189 | +#define CLOCK_CAP_RATE_44100 0x00000002 | |
| 190 | +#define CLOCK_CAP_RATE_48000 0x00000004 | |
| 191 | +#define CLOCK_CAP_RATE_88200 0x00000008 | |
| 192 | +#define CLOCK_CAP_RATE_96000 0x00000010 | |
| 193 | +#define CLOCK_CAP_RATE_176400 0x00000020 | |
| 194 | +#define CLOCK_CAP_RATE_192000 0x00000040 | |
| 195 | +#define CLOCK_CAP_SOURCE_AES1 0x00010000 | |
| 196 | +#define CLOCK_CAP_SOURCE_AES2 0x00020000 | |
| 197 | +#define CLOCK_CAP_SOURCE_AES3 0x00040000 | |
| 198 | +#define CLOCK_CAP_SOURCE_AES4 0x00080000 | |
| 199 | +#define CLOCK_CAP_SOURCE_AES_ANY 0x00100000 | |
| 200 | +#define CLOCK_CAP_SOURCE_ADAT 0x00200000 | |
| 201 | +#define CLOCK_CAP_SOURCE_TDIF 0x00400000 | |
| 202 | +#define CLOCK_CAP_SOURCE_WC 0x00800000 | |
| 203 | +#define CLOCK_CAP_SOURCE_ARX1 0x01000000 | |
| 204 | +#define CLOCK_CAP_SOURCE_ARX2 0x02000000 | |
| 205 | +#define CLOCK_CAP_SOURCE_ARX3 0x04000000 | |
| 206 | +#define CLOCK_CAP_SOURCE_ARX4 0x08000000 | |
| 207 | +#define CLOCK_CAP_SOURCE_INTERNAL 0x10000000 | |
| 208 | + | |
| 209 | +/* | |
| 210 | + * Names of all clock sources; read-only. Quadlets are byte-swapped. Names | |
| 211 | + * are separated with one backslash, the list is terminated with two | |
| 212 | + * backslashes. Unused clock sources are included. | |
| 213 | + */ | |
| 214 | +#define GLOBAL_CLOCK_SOURCE_NAMES 0x068 | |
| 215 | +#define CLOCK_SOURCE_NAMES_SIZE 256 | |
| 216 | + | |
| 217 | +/* | |
| 218 | + * Capture stream settings. This section includes the number/size registers | |
| 219 | + * and the registers of all streams. | |
| 220 | + */ | |
| 221 | + | |
| 222 | +/* | |
| 223 | + * The number of supported capture streams; read-only. | |
| 224 | + */ | |
| 225 | +#define TX_NUMBER 0x000 | |
| 226 | + | |
| 227 | +/* | |
| 228 | + * The size of one stream's register block, in quadlets; read-only. The | |
| 229 | + * registers of the first stream follow immediately afterwards; the registers | |
| 230 | + * of the following streams are offset by this register's value. | |
| 231 | + */ | |
| 232 | +#define TX_SIZE 0x004 | |
| 233 | + | |
| 234 | +/* | |
| 235 | + * The isochronous channel number on which packets are sent, or -1 if the | |
| 236 | + * stream is not to be used; read/write. | |
| 237 | + */ | |
| 238 | +#define TX_ISOCHRONOUS 0x008 | |
| 239 | + | |
| 240 | +/* | |
| 241 | + * The number of audio channels; read-only. There will be one quadlet per | |
| 242 | + * channel; the first channel is the first quadlet in a data block. | |
| 243 | + */ | |
| 244 | +#define TX_NUMBER_AUDIO 0x00c | |
| 245 | + | |
| 246 | +/* | |
| 247 | + * The number of MIDI ports, 0-8; read-only. If > 0, there will be one | |
| 248 | + * additional quadlet in each data block, following the audio quadlets. | |
| 249 | + */ | |
| 250 | +#define TX_NUMBER_MIDI 0x010 | |
| 251 | + | |
| 252 | +/* | |
| 253 | + * The speed at which the packets are sent, SCODE_100-_400; read/write. | |
| 254 | + */ | |
| 255 | +#define TX_SPEED 0x014 | |
| 256 | + | |
| 257 | +/* | |
| 258 | + * Names of all audio channels; read-only. Quadlets are byte-swapped. Names | |
| 259 | + * are separated with one backslash, the list is terminated with two | |
| 260 | + * backslashes. | |
| 261 | + */ | |
| 262 | +#define TX_NAMES 0x018 | |
| 263 | +#define TX_NAMES_SIZE 256 | |
| 264 | + | |
| 265 | +/* | |
| 266 | + * Audio IEC60958 capabilities; read-only. Bitmask with one bit per audio | |
| 267 | + * channel. | |
| 268 | + */ | |
| 269 | +#define TX_AC3_CAPABILITIES 0x118 | |
| 270 | + | |
| 271 | +/* | |
| 272 | + * Send audio data with IEC60958 label; read/write. Bitmask with one bit per | |
| 273 | + * audio channel. This register can be changed even while the stream is | |
| 274 | + * running. | |
| 275 | + */ | |
| 276 | +#define TX_AC3_ENABLE 0x11c | |
| 277 | + | |
| 278 | +/* | |
| 279 | + * Playback stream settings. This section includes the number/size registers | |
| 280 | + * and the registers of all streams. | |
| 281 | + */ | |
| 282 | + | |
| 283 | +/* | |
| 284 | + * The number of supported playback streams; read-only. | |
| 285 | + */ | |
| 286 | +#define RX_NUMBER 0x000 | |
| 287 | + | |
| 288 | +/* | |
| 289 | + * The size of one stream's register block, in quadlets; read-only. The | |
| 290 | + * registers of the first stream follow immediately afterwards; the registers | |
| 291 | + * of the following streams are offset by this register's value. | |
| 292 | + */ | |
| 293 | +#define RX_SIZE 0x004 | |
| 294 | + | |
| 295 | +/* | |
| 296 | + * The isochronous channel number on which packets are received, or -1 if the | |
| 297 | + * stream is not to be used; read/write. | |
| 298 | + */ | |
| 299 | +#define RX_ISOCHRONOUS 0x008 | |
| 300 | + | |
| 301 | +/* | |
| 302 | + * Index of first quadlet to be interpreted; read/write. If > 0, that many | |
| 303 | + * quadlets at the beginning of each data block will be ignored, and all the | |
| 304 | + * audio and MIDI quadlets will follow. | |
| 305 | + */ | |
| 306 | +#define RX_SEQ_START 0x00c | |
| 307 | + | |
| 308 | +/* | |
| 309 | + * The number of audio channels; read-only. There will be one quadlet per | |
| 310 | + * channel. | |
| 311 | + */ | |
| 312 | +#define RX_NUMBER_AUDIO 0x010 | |
| 313 | + | |
| 314 | +/* | |
| 315 | + * The number of MIDI ports, 0-8; read-only. If > 0, there will be one | |
| 316 | + * additional quadlet in each data block, following the audio quadlets. | |
| 317 | + */ | |
| 318 | +#define RX_NUMBER_MIDI 0x014 | |
| 319 | + | |
| 320 | +/* | |
| 321 | + * Names of all audio channels; read-only. Quadlets are byte-swapped. Names | |
| 322 | + * are separated with one backslash, the list is terminated with two | |
| 323 | + * backslashes. | |
| 324 | + */ | |
| 325 | +#define RX_NAMES 0x018 | |
| 326 | +#define RX_NAMES_SIZE 256 | |
| 327 | + | |
| 328 | +/* | |
| 329 | + * Audio IEC60958 capabilities; read-only. Bitmask with one bit per audio | |
| 330 | + * channel. | |
| 331 | + */ | |
| 332 | +#define RX_AC3_CAPABILITIES 0x118 | |
| 333 | + | |
| 334 | +/* | |
| 335 | + * Receive audio data with IEC60958 label; read/write. Bitmask with one bit | |
| 336 | + * per audio channel. This register can be changed even while the stream is | |
| 337 | + * running. | |
| 338 | + */ | |
| 339 | +#define RX_AC3_ENABLE 0x11c | |
| 340 | + | |
| 341 | +/* | |
| 342 | + * Extended synchronization information. | |
| 343 | + * This section can be read completely with a block read request. | |
| 344 | + */ | |
| 345 | + | |
| 346 | +/* | |
| 347 | + * Current clock source; read-only. | |
| 348 | + */ | |
| 349 | +#define EXT_SYNC_CLOCK_SOURCE 0x000 | |
| 350 | + | |
| 351 | +/* | |
| 352 | + * Clock source is locked (boolean); read-only. | |
| 353 | + */ | |
| 354 | +#define EXT_SYNC_LOCKED 0x004 | |
| 355 | + | |
| 356 | +/* | |
| 357 | + * Current sample rate (CLOCK_RATE_* >> CLOCK_RATE_SHIFT), _32000-_192000 or | |
| 358 | + * _NONE; read-only. | |
| 359 | + */ | |
| 360 | +#define EXT_SYNC_RATE 0x008 | |
| 361 | + | |
| 362 | +/* | |
| 363 | + * ADAT user data bits; read-only. | |
| 364 | + */ | |
| 365 | +#define EXT_SYNC_ADAT_USER_DATA 0x00c | |
| 366 | +/* The data bits, if available. */ | |
| 367 | +#define ADAT_USER_DATA_MASK 0x0f | |
| 368 | +/* The data bits are not available. */ | |
| 369 | +#define ADAT_USER_DATA_NO_DATA 0x10 | |
| 370 | + | |
| 371 | +#endif | |
| @@ -0,0 +1,1494 @@ | ||
| 1 | +/* | |
| 2 | + * TC Applied Technologies Digital Interface Communications Engine driver | |
| 3 | + * | |
| 4 | + * Copyright (c) Clemens Ladisch <clemens@ladisch.de> | |
| 5 | + * Licensed under the terms of the GNU General Public License, version 2. | |
| 6 | + */ | |
| 7 | + | |
| 8 | +#include <linux/compat.h> | |
| 9 | +#include <linux/completion.h> | |
| 10 | +#include <linux/delay.h> | |
| 11 | +#include <linux/device.h> | |
| 12 | +#include <linux/firewire.h> | |
| 13 | +#include <linux/firewire-constants.h> | |
| 14 | +#include <linux/jiffies.h> | |
| 15 | +#include <linux/module.h> | |
| 16 | +#include <linux/mod_devicetable.h> | |
| 17 | +#include <linux/mutex.h> | |
| 18 | +#include <linux/slab.h> | |
| 19 | +#include <linux/spinlock.h> | |
| 20 | +#include <linux/wait.h> | |
| 21 | +#include <sound/control.h> | |
| 22 | +#include <sound/core.h> | |
| 23 | +#include <sound/firewire.h> | |
| 24 | +#include <sound/hwdep.h> | |
| 25 | +#include <sound/info.h> | |
| 26 | +#include <sound/initval.h> | |
| 27 | +#include <sound/pcm.h> | |
| 28 | +#include <sound/pcm_params.h> | |
| 29 | +#include "amdtp.h" | |
| 30 | +#include "iso-resources.h" | |
| 31 | +#include "lib.h" | |
| 32 | +#include "dice-interface.h" | |
| 33 | + | |
| 34 | + | |
| 35 | +struct dice { | |
| 36 | + struct snd_card *card; | |
| 37 | + struct fw_unit *unit; | |
| 38 | + spinlock_t lock; | |
| 39 | + struct mutex mutex; | |
| 40 | + unsigned int global_offset; | |
| 41 | + unsigned int rx_offset; | |
| 42 | + unsigned int clock_caps; | |
| 43 | + unsigned int rx_channels[3]; | |
| 44 | + unsigned int rx_midi_ports[3]; | |
| 45 | + struct fw_address_handler notification_handler; | |
| 46 | + int owner_generation; | |
| 47 | + int dev_lock_count; /* > 0 driver, < 0 userspace */ | |
| 48 | + bool dev_lock_changed; | |
| 49 | + bool global_enabled; | |
| 50 | + struct completion clock_accepted; | |
| 51 | + wait_queue_head_t hwdep_wait; | |
| 52 | + u32 notification_bits; | |
| 53 | + struct fw_iso_resources resources; | |
| 54 | + struct amdtp_out_stream stream; | |
| 55 | +}; | |
| 56 | + | |
| 57 | +MODULE_DESCRIPTION("DICE driver"); | |
| 58 | +MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | |
| 59 | +MODULE_LICENSE("GPL v2"); | |
| 60 | + | |
| 61 | +static const unsigned int dice_rates[] = { | |
| 62 | + /* mode 0 */ | |
| 63 | + [0] = 32000, | |
| 64 | + [1] = 44100, | |
| 65 | + [2] = 48000, | |
| 66 | + /* mode 1 */ | |
| 67 | + [3] = 88200, | |
| 68 | + [4] = 96000, | |
| 69 | + /* mode 2 */ | |
| 70 | + [5] = 176400, | |
| 71 | + [6] = 192000, | |
| 72 | +}; | |
| 73 | + | |
| 74 | +static unsigned int rate_to_index(unsigned int rate) | |
| 75 | +{ | |
| 76 | + unsigned int i; | |
| 77 | + | |
| 78 | + for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) | |
| 79 | + if (dice_rates[i] == rate) | |
| 80 | + return i; | |
| 81 | + | |
| 82 | + return 0; | |
| 83 | +} | |
| 84 | + | |
| 85 | +static unsigned int rate_index_to_mode(unsigned int rate_index) | |
| 86 | +{ | |
| 87 | + return ((int)rate_index - 1) / 2; | |
| 88 | +} | |
| 89 | + | |
| 90 | +static void dice_lock_changed(struct dice *dice) | |
| 91 | +{ | |
| 92 | + dice->dev_lock_changed = true; | |
| 93 | + wake_up(&dice->hwdep_wait); | |
| 94 | +} | |
| 95 | + | |
| 96 | +static int dice_try_lock(struct dice *dice) | |
| 97 | +{ | |
| 98 | + int err; | |
| 99 | + | |
| 100 | + spin_lock_irq(&dice->lock); | |
| 101 | + | |
| 102 | + if (dice->dev_lock_count < 0) { | |
| 103 | + err = -EBUSY; | |
| 104 | + goto out; | |
| 105 | + } | |
| 106 | + | |
| 107 | + if (dice->dev_lock_count++ == 0) | |
| 108 | + dice_lock_changed(dice); | |
| 109 | + err = 0; | |
| 110 | + | |
| 111 | +out: | |
| 112 | + spin_unlock_irq(&dice->lock); | |
| 113 | + | |
| 114 | + return err; | |
| 115 | +} | |
| 116 | + | |
| 117 | +static void dice_unlock(struct dice *dice) | |
| 118 | +{ | |
| 119 | + spin_lock_irq(&dice->lock); | |
| 120 | + | |
| 121 | + if (WARN_ON(dice->dev_lock_count <= 0)) | |
| 122 | + goto out; | |
| 123 | + | |
| 124 | + if (--dice->dev_lock_count == 0) | |
| 125 | + dice_lock_changed(dice); | |
| 126 | + | |
| 127 | +out: | |
| 128 | + spin_unlock_irq(&dice->lock); | |
| 129 | +} | |
| 130 | + | |
| 131 | +static inline u64 global_address(struct dice *dice, unsigned int offset) | |
| 132 | +{ | |
| 133 | + return DICE_PRIVATE_SPACE + dice->global_offset + offset; | |
| 134 | +} | |
| 135 | + | |
| 136 | +// TODO: rx index | |
| 137 | +static inline u64 rx_address(struct dice *dice, unsigned int offset) | |
| 138 | +{ | |
| 139 | + return DICE_PRIVATE_SPACE + dice->rx_offset + offset; | |
| 140 | +} | |
| 141 | + | |
| 142 | +static int dice_owner_set(struct dice *dice) | |
| 143 | +{ | |
| 144 | + struct fw_device *device = fw_parent_device(dice->unit); | |
| 145 | + __be64 *buffer; | |
| 146 | + int err, errors = 0; | |
| 147 | + | |
| 148 | + buffer = kmalloc(2 * 8, GFP_KERNEL); | |
| 149 | + if (!buffer) | |
| 150 | + return -ENOMEM; | |
| 151 | + | |
| 152 | + for (;;) { | |
| 153 | + buffer[0] = cpu_to_be64(OWNER_NO_OWNER); | |
| 154 | + buffer[1] = cpu_to_be64( | |
| 155 | + ((u64)device->card->node_id << OWNER_NODE_SHIFT) | | |
| 156 | + dice->notification_handler.offset); | |
| 157 | + | |
| 158 | + dice->owner_generation = device->generation; | |
| 159 | + smp_rmb(); /* node_id vs. generation */ | |
| 160 | + err = snd_fw_transaction(dice->unit, | |
| 161 | + TCODE_LOCK_COMPARE_SWAP, | |
| 162 | + global_address(dice, GLOBAL_OWNER), | |
| 163 | + buffer, 2 * 8, | |
| 164 | + FW_FIXED_GENERATION | | |
| 165 | + dice->owner_generation); | |
| 166 | + | |
| 167 | + if (err == 0) { | |
| 168 | + if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) { | |
| 169 | + dev_err(&dice->unit->device, | |
| 170 | + "device is already in use\n"); | |
| 171 | + err = -EBUSY; | |
| 172 | + } | |
| 173 | + break; | |
| 174 | + } | |
| 175 | + if (err != -EAGAIN || ++errors >= 3) | |
| 176 | + break; | |
| 177 | + | |
| 178 | + msleep(20); | |
| 179 | + } | |
| 180 | + | |
| 181 | + kfree(buffer); | |
| 182 | + | |
| 183 | + return err; | |
| 184 | +} | |
| 185 | + | |
| 186 | +static int dice_owner_update(struct dice *dice) | |
| 187 | +{ | |
| 188 | + struct fw_device *device = fw_parent_device(dice->unit); | |
| 189 | + __be64 *buffer; | |
| 190 | + int err; | |
| 191 | + | |
| 192 | + if (dice->owner_generation == -1) | |
| 193 | + return 0; | |
| 194 | + | |
| 195 | + buffer = kmalloc(2 * 8, GFP_KERNEL); | |
| 196 | + if (!buffer) | |
| 197 | + return -ENOMEM; | |
| 198 | + | |
| 199 | + buffer[0] = cpu_to_be64(OWNER_NO_OWNER); | |
| 200 | + buffer[1] = cpu_to_be64( | |
| 201 | + ((u64)device->card->node_id << OWNER_NODE_SHIFT) | | |
| 202 | + dice->notification_handler.offset); | |
| 203 | + | |
| 204 | + dice->owner_generation = device->generation; | |
| 205 | + smp_rmb(); /* node_id vs. generation */ | |
| 206 | + err = snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP, | |
| 207 | + global_address(dice, GLOBAL_OWNER), | |
| 208 | + buffer, 2 * 8, | |
| 209 | + FW_FIXED_GENERATION | dice->owner_generation); | |
| 210 | + | |
| 211 | + if (err == 0) { | |
| 212 | + if (buffer[0] != cpu_to_be64(OWNER_NO_OWNER)) { | |
| 213 | + dev_err(&dice->unit->device, | |
| 214 | + "device is already in use\n"); | |
| 215 | + err = -EBUSY; | |
| 216 | + } | |
| 217 | + } else if (err == -EAGAIN) { | |
| 218 | + err = 0; /* try again later */ | |
| 219 | + } | |
| 220 | + | |
| 221 | + kfree(buffer); | |
| 222 | + | |
| 223 | + if (err < 0) | |
| 224 | + dice->owner_generation = -1; | |
| 225 | + | |
| 226 | + return err; | |
| 227 | +} | |
| 228 | + | |
| 229 | +static void dice_owner_clear(struct dice *dice) | |
| 230 | +{ | |
| 231 | + struct fw_device *device = fw_parent_device(dice->unit); | |
| 232 | + __be64 *buffer; | |
| 233 | + | |
| 234 | + buffer = kmalloc(2 * 8, GFP_KERNEL); | |
| 235 | + if (!buffer) | |
| 236 | + return; | |
| 237 | + | |
| 238 | + buffer[0] = cpu_to_be64( | |
| 239 | + ((u64)device->card->node_id << OWNER_NODE_SHIFT) | | |
| 240 | + dice->notification_handler.offset); | |
| 241 | + buffer[1] = cpu_to_be64(OWNER_NO_OWNER); | |
| 242 | + snd_fw_transaction(dice->unit, TCODE_LOCK_COMPARE_SWAP, | |
| 243 | + global_address(dice, GLOBAL_OWNER), | |
| 244 | + buffer, 2 * 8, FW_QUIET | | |
| 245 | + FW_FIXED_GENERATION | dice->owner_generation); | |
| 246 | + | |
| 247 | + kfree(buffer); | |
| 248 | + | |
| 249 | + dice->owner_generation = -1; | |
| 250 | +} | |
| 251 | + | |
| 252 | +static int dice_enable_set(struct dice *dice) | |
| 253 | +{ | |
| 254 | + __be32 value; | |
| 255 | + int err; | |
| 256 | + | |
| 257 | + value = cpu_to_be32(1); | |
| 258 | + err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 259 | + global_address(dice, GLOBAL_ENABLE), | |
| 260 | + &value, 4, | |
| 261 | + FW_FIXED_GENERATION | dice->owner_generation); | |
| 262 | + if (err < 0) | |
| 263 | + return err; | |
| 264 | + | |
| 265 | + dice->global_enabled = true; | |
| 266 | + | |
| 267 | + return 0; | |
| 268 | +} | |
| 269 | + | |
| 270 | +static void dice_enable_clear(struct dice *dice) | |
| 271 | +{ | |
| 272 | + __be32 value; | |
| 273 | + | |
| 274 | + if (!dice->global_enabled) | |
| 275 | + return; | |
| 276 | + | |
| 277 | + value = 0; | |
| 278 | + snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 279 | + global_address(dice, GLOBAL_ENABLE), | |
| 280 | + &value, 4, FW_QUIET | | |
| 281 | + FW_FIXED_GENERATION | dice->owner_generation); | |
| 282 | + | |
| 283 | + dice->global_enabled = false; | |
| 284 | +} | |
| 285 | + | |
| 286 | +static void dice_notification(struct fw_card *card, struct fw_request *request, | |
| 287 | + int tcode, int destination, int source, | |
| 288 | + int generation, unsigned long long offset, | |
| 289 | + void *data, size_t length, void *callback_data) | |
| 290 | +{ | |
| 291 | + struct dice *dice = callback_data; | |
| 292 | + u32 bits; | |
| 293 | + unsigned long flags; | |
| 294 | + | |
| 295 | + if (tcode != TCODE_WRITE_QUADLET_REQUEST) { | |
| 296 | + fw_send_response(card, request, RCODE_TYPE_ERROR); | |
| 297 | + return; | |
| 298 | + } | |
| 299 | + if ((offset & 3) != 0) { | |
| 300 | + fw_send_response(card, request, RCODE_ADDRESS_ERROR); | |
| 301 | + return; | |
| 302 | + } | |
| 303 | + | |
| 304 | + bits = be32_to_cpup(data); | |
| 305 | + | |
| 306 | + spin_lock_irqsave(&dice->lock, flags); | |
| 307 | + dice->notification_bits |= bits; | |
| 308 | + spin_unlock_irqrestore(&dice->lock, flags); | |
| 309 | + | |
| 310 | + fw_send_response(card, request, RCODE_COMPLETE); | |
| 311 | + | |
| 312 | + if (bits & NOTIFY_CLOCK_ACCEPTED) | |
| 313 | + complete(&dice->clock_accepted); | |
| 314 | + wake_up(&dice->hwdep_wait); | |
| 315 | +} | |
| 316 | + | |
| 317 | +static int dice_rate_constraint(struct snd_pcm_hw_params *params, | |
| 318 | + struct snd_pcm_hw_rule *rule) | |
| 319 | +{ | |
| 320 | + struct dice *dice = rule->private; | |
| 321 | + const struct snd_interval *channels = | |
| 322 | + hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
| 323 | + struct snd_interval *rate = | |
| 324 | + hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); | |
| 325 | + struct snd_interval allowed_rates = { | |
| 326 | + .min = UINT_MAX, .max = 0, .integer = 1 | |
| 327 | + }; | |
| 328 | + unsigned int i, mode; | |
| 329 | + | |
| 330 | + for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) { | |
| 331 | + mode = rate_index_to_mode(i); | |
| 332 | + if ((dice->clock_caps & (1 << i)) && | |
| 333 | + snd_interval_test(channels, dice->rx_channels[mode])) { | |
| 334 | + allowed_rates.min = min(allowed_rates.min, | |
| 335 | + dice_rates[i]); | |
| 336 | + allowed_rates.max = max(allowed_rates.max, | |
| 337 | + dice_rates[i]); | |
| 338 | + } | |
| 339 | + } | |
| 340 | + | |
| 341 | + return snd_interval_refine(rate, &allowed_rates); | |
| 342 | +} | |
| 343 | + | |
| 344 | +static int dice_channels_constraint(struct snd_pcm_hw_params *params, | |
| 345 | + struct snd_pcm_hw_rule *rule) | |
| 346 | +{ | |
| 347 | + struct dice *dice = rule->private; | |
| 348 | + const struct snd_interval *rate = | |
| 349 | + hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE); | |
| 350 | + struct snd_interval *channels = | |
| 351 | + hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); | |
| 352 | + struct snd_interval allowed_channels = { | |
| 353 | + .min = UINT_MAX, .max = 0, .integer = 1 | |
| 354 | + }; | |
| 355 | + unsigned int i, mode; | |
| 356 | + | |
| 357 | + for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) | |
| 358 | + if ((dice->clock_caps & (1 << i)) && | |
| 359 | + snd_interval_test(rate, dice_rates[i])) { | |
| 360 | + mode = rate_index_to_mode(i); | |
| 361 | + allowed_channels.min = min(allowed_channels.min, | |
| 362 | + dice->rx_channels[mode]); | |
| 363 | + allowed_channels.max = max(allowed_channels.max, | |
| 364 | + dice->rx_channels[mode]); | |
| 365 | + } | |
| 366 | + | |
| 367 | + return snd_interval_refine(channels, &allowed_channels); | |
| 368 | +} | |
| 369 | + | |
| 370 | +static int dice_open(struct snd_pcm_substream *substream) | |
| 371 | +{ | |
| 372 | + static const struct snd_pcm_hardware hardware = { | |
| 373 | + .info = SNDRV_PCM_INFO_MMAP | | |
| 374 | + SNDRV_PCM_INFO_MMAP_VALID | | |
| 375 | + SNDRV_PCM_INFO_BATCH | | |
| 376 | + SNDRV_PCM_INFO_INTERLEAVED | | |
| 377 | + SNDRV_PCM_INFO_BLOCK_TRANSFER, | |
| 378 | + .formats = AMDTP_OUT_PCM_FORMAT_BITS, | |
| 379 | + .channels_min = UINT_MAX, | |
| 380 | + .channels_max = 0, | |
| 381 | + .buffer_bytes_max = 16 * 1024 * 1024, | |
| 382 | + .period_bytes_min = 1, | |
| 383 | + .period_bytes_max = UINT_MAX, | |
| 384 | + .periods_min = 1, | |
| 385 | + .periods_max = UINT_MAX, | |
| 386 | + }; | |
| 387 | + struct dice *dice = substream->private_data; | |
| 388 | + struct snd_pcm_runtime *runtime = substream->runtime; | |
| 389 | + unsigned int i; | |
| 390 | + int err; | |
| 391 | + | |
| 392 | + err = dice_try_lock(dice); | |
| 393 | + if (err < 0) | |
| 394 | + goto error; | |
| 395 | + | |
| 396 | + runtime->hw = hardware; | |
| 397 | + | |
| 398 | + for (i = 0; i < ARRAY_SIZE(dice_rates); ++i) | |
| 399 | + if (dice->clock_caps & (1 << i)) | |
| 400 | + runtime->hw.rates |= | |
| 401 | + snd_pcm_rate_to_rate_bit(dice_rates[i]); | |
| 402 | + snd_pcm_limit_hw_rates(runtime); | |
| 403 | + | |
| 404 | + for (i = 0; i < 3; ++i) | |
| 405 | + if (dice->rx_channels[i]) { | |
| 406 | + runtime->hw.channels_min = min(runtime->hw.channels_min, | |
| 407 | + dice->rx_channels[i]); | |
| 408 | + runtime->hw.channels_max = max(runtime->hw.channels_max, | |
| 409 | + dice->rx_channels[i]); | |
| 410 | + } | |
| 411 | + | |
| 412 | + err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
| 413 | + dice_rate_constraint, dice, | |
| 414 | + SNDRV_PCM_HW_PARAM_CHANNELS, -1); | |
| 415 | + if (err < 0) | |
| 416 | + goto err_lock; | |
| 417 | + err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, | |
| 418 | + dice_channels_constraint, dice, | |
| 419 | + SNDRV_PCM_HW_PARAM_RATE, -1); | |
| 420 | + if (err < 0) | |
| 421 | + goto err_lock; | |
| 422 | + | |
| 423 | + err = snd_pcm_hw_constraint_step(runtime, 0, | |
| 424 | + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32); | |
| 425 | + if (err < 0) | |
| 426 | + goto err_lock; | |
| 427 | + err = snd_pcm_hw_constraint_step(runtime, 0, | |
| 428 | + SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32); | |
| 429 | + if (err < 0) | |
| 430 | + goto err_lock; | |
| 431 | + | |
| 432 | + err = snd_pcm_hw_constraint_minmax(runtime, | |
| 433 | + SNDRV_PCM_HW_PARAM_PERIOD_TIME, | |
| 434 | + 5000, UINT_MAX); | |
| 435 | + if (err < 0) | |
| 436 | + goto err_lock; | |
| 437 | + | |
| 438 | + err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); | |
| 439 | + if (err < 0) | |
| 440 | + goto err_lock; | |
| 441 | + | |
| 442 | + return 0; | |
| 443 | + | |
| 444 | +err_lock: | |
| 445 | + dice_unlock(dice); | |
| 446 | +error: | |
| 447 | + return err; | |
| 448 | +} | |
| 449 | + | |
| 450 | +static int dice_close(struct snd_pcm_substream *substream) | |
| 451 | +{ | |
| 452 | + struct dice *dice = substream->private_data; | |
| 453 | + | |
| 454 | + dice_unlock(dice); | |
| 455 | + | |
| 456 | + return 0; | |
| 457 | +} | |
| 458 | + | |
| 459 | +static int dice_stream_start_packets(struct dice *dice) | |
| 460 | +{ | |
| 461 | + int err; | |
| 462 | + | |
| 463 | + if (amdtp_out_stream_running(&dice->stream)) | |
| 464 | + return 0; | |
| 465 | + | |
| 466 | + err = amdtp_out_stream_start(&dice->stream, dice->resources.channel, | |
| 467 | + fw_parent_device(dice->unit)->max_speed); | |
| 468 | + if (err < 0) | |
| 469 | + return err; | |
| 470 | + | |
| 471 | + err = dice_enable_set(dice); | |
| 472 | + if (err < 0) { | |
| 473 | + amdtp_out_stream_stop(&dice->stream); | |
| 474 | + return err; | |
| 475 | + } | |
| 476 | + | |
| 477 | + return 0; | |
| 478 | +} | |
| 479 | + | |
| 480 | +static int dice_stream_start(struct dice *dice) | |
| 481 | +{ | |
| 482 | + __be32 channel; | |
| 483 | + int err; | |
| 484 | + | |
| 485 | + if (!dice->resources.allocated) { | |
| 486 | + err = fw_iso_resources_allocate(&dice->resources, | |
| 487 | + amdtp_out_stream_get_max_payload(&dice->stream), | |
| 488 | + fw_parent_device(dice->unit)->max_speed); | |
| 489 | + if (err < 0) | |
| 490 | + goto error; | |
| 491 | + | |
| 492 | + channel = cpu_to_be32(dice->resources.channel); | |
| 493 | + err = snd_fw_transaction(dice->unit, | |
| 494 | + TCODE_WRITE_QUADLET_REQUEST, | |
| 495 | + rx_address(dice, RX_ISOCHRONOUS), | |
| 496 | + &channel, 4, 0); | |
| 497 | + if (err < 0) | |
| 498 | + goto err_resources; | |
| 499 | + } | |
| 500 | + | |
| 501 | + err = dice_stream_start_packets(dice); | |
| 502 | + if (err < 0) | |
| 503 | + goto err_rx_channel; | |
| 504 | + | |
| 505 | + return 0; | |
| 506 | + | |
| 507 | +err_rx_channel: | |
| 508 | + channel = cpu_to_be32((u32)-1); | |
| 509 | + snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 510 | + rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0); | |
| 511 | +err_resources: | |
| 512 | + fw_iso_resources_free(&dice->resources); | |
| 513 | +error: | |
| 514 | + return err; | |
| 515 | +} | |
| 516 | + | |
| 517 | +static void dice_stream_stop_packets(struct dice *dice) | |
| 518 | +{ | |
| 519 | + if (amdtp_out_stream_running(&dice->stream)) { | |
| 520 | + dice_enable_clear(dice); | |
| 521 | + amdtp_out_stream_stop(&dice->stream); | |
| 522 | + } | |
| 523 | +} | |
| 524 | + | |
| 525 | +static void dice_stream_stop(struct dice *dice) | |
| 526 | +{ | |
| 527 | + __be32 channel; | |
| 528 | + | |
| 529 | + dice_stream_stop_packets(dice); | |
| 530 | + | |
| 531 | + if (!dice->resources.allocated) | |
| 532 | + return; | |
| 533 | + | |
| 534 | + channel = cpu_to_be32((u32)-1); | |
| 535 | + snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 536 | + rx_address(dice, RX_ISOCHRONOUS), &channel, 4, 0); | |
| 537 | + | |
| 538 | + fw_iso_resources_free(&dice->resources); | |
| 539 | +} | |
| 540 | + | |
| 541 | +static int dice_change_rate(struct dice *dice, unsigned int clock_rate) | |
| 542 | +{ | |
| 543 | + __be32 value; | |
| 544 | + int err; | |
| 545 | + | |
| 546 | + INIT_COMPLETION(dice->clock_accepted); | |
| 547 | + | |
| 548 | + value = cpu_to_be32(clock_rate | CLOCK_SOURCE_ARX1); | |
| 549 | + err = snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 550 | + global_address(dice, GLOBAL_CLOCK_SELECT), | |
| 551 | + &value, 4, 0); | |
| 552 | + if (err < 0) | |
| 553 | + return err; | |
| 554 | + | |
| 555 | + if (!wait_for_completion_timeout(&dice->clock_accepted, | |
| 556 | + msecs_to_jiffies(100))) | |
| 557 | + dev_warn(&dice->unit->device, "clock change timed out\n"); | |
| 558 | + | |
| 559 | + return 0; | |
| 560 | +} | |
| 561 | + | |
| 562 | +static int dice_hw_params(struct snd_pcm_substream *substream, | |
| 563 | + struct snd_pcm_hw_params *hw_params) | |
| 564 | +{ | |
| 565 | + struct dice *dice = substream->private_data; | |
| 566 | + unsigned int rate_index, mode; | |
| 567 | + int err; | |
| 568 | + | |
| 569 | + mutex_lock(&dice->mutex); | |
| 570 | + dice_stream_stop(dice); | |
| 571 | + mutex_unlock(&dice->mutex); | |
| 572 | + | |
| 573 | + err = snd_pcm_lib_alloc_vmalloc_buffer(substream, | |
| 574 | + params_buffer_bytes(hw_params)); | |
| 575 | + if (err < 0) | |
| 576 | + return err; | |
| 577 | + | |
| 578 | + rate_index = rate_to_index(params_rate(hw_params)); | |
| 579 | + err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT); | |
| 580 | + if (err < 0) | |
| 581 | + return err; | |
| 582 | + | |
| 583 | + mode = rate_index_to_mode(rate_index); | |
| 584 | + amdtp_out_stream_set_parameters(&dice->stream, | |
| 585 | + params_rate(hw_params), | |
| 586 | + params_channels(hw_params), | |
| 587 | + dice->rx_midi_ports[mode]); | |
| 588 | + amdtp_out_stream_set_pcm_format(&dice->stream, | |
| 589 | + params_format(hw_params)); | |
| 590 | + | |
| 591 | + return 0; | |
| 592 | +} | |
| 593 | + | |
| 594 | +static int dice_hw_free(struct snd_pcm_substream *substream) | |
| 595 | +{ | |
| 596 | + struct dice *dice = substream->private_data; | |
| 597 | + | |
| 598 | + mutex_lock(&dice->mutex); | |
| 599 | + dice_stream_stop(dice); | |
| 600 | + mutex_unlock(&dice->mutex); | |
| 601 | + | |
| 602 | + return snd_pcm_lib_free_vmalloc_buffer(substream); | |
| 603 | +} | |
| 604 | + | |
| 605 | +static int dice_prepare(struct snd_pcm_substream *substream) | |
| 606 | +{ | |
| 607 | + struct dice *dice = substream->private_data; | |
| 608 | + int err; | |
| 609 | + | |
| 610 | + mutex_lock(&dice->mutex); | |
| 611 | + | |
| 612 | + if (amdtp_out_streaming_error(&dice->stream)) | |
| 613 | + dice_stream_stop_packets(dice); | |
| 614 | + | |
| 615 | + err = dice_stream_start(dice); | |
| 616 | + if (err < 0) { | |
| 617 | + mutex_unlock(&dice->mutex); | |
| 618 | + return err; | |
| 619 | + } | |
| 620 | + | |
| 621 | + mutex_unlock(&dice->mutex); | |
| 622 | + | |
| 623 | + amdtp_out_stream_pcm_prepare(&dice->stream); | |
| 624 | + | |
| 625 | + return 0; | |
| 626 | +} | |
| 627 | + | |
| 628 | +static int dice_trigger(struct snd_pcm_substream *substream, int cmd) | |
| 629 | +{ | |
| 630 | + struct dice *dice = substream->private_data; | |
| 631 | + struct snd_pcm_substream *pcm; | |
| 632 | + | |
| 633 | + switch (cmd) { | |
| 634 | + case SNDRV_PCM_TRIGGER_START: | |
| 635 | + pcm = substream; | |
| 636 | + break; | |
| 637 | + case SNDRV_PCM_TRIGGER_STOP: | |
| 638 | + pcm = NULL; | |
| 639 | + break; | |
| 640 | + default: | |
| 641 | + return -EINVAL; | |
| 642 | + } | |
| 643 | + amdtp_out_stream_pcm_trigger(&dice->stream, pcm); | |
| 644 | + | |
| 645 | + return 0; | |
| 646 | +} | |
| 647 | + | |
| 648 | +static snd_pcm_uframes_t dice_pointer(struct snd_pcm_substream *substream) | |
| 649 | +{ | |
| 650 | + struct dice *dice = substream->private_data; | |
| 651 | + | |
| 652 | + return amdtp_out_stream_pcm_pointer(&dice->stream); | |
| 653 | +} | |
| 654 | + | |
| 655 | +static int dice_create_pcm(struct dice *dice) | |
| 656 | +{ | |
| 657 | + static struct snd_pcm_ops ops = { | |
| 658 | + .open = dice_open, | |
| 659 | + .close = dice_close, | |
| 660 | + .ioctl = snd_pcm_lib_ioctl, | |
| 661 | + .hw_params = dice_hw_params, | |
| 662 | + .hw_free = dice_hw_free, | |
| 663 | + .prepare = dice_prepare, | |
| 664 | + .trigger = dice_trigger, | |
| 665 | + .pointer = dice_pointer, | |
| 666 | + .page = snd_pcm_lib_get_vmalloc_page, | |
| 667 | + .mmap = snd_pcm_lib_mmap_vmalloc, | |
| 668 | + }; | |
| 669 | + struct snd_pcm *pcm; | |
| 670 | + int err; | |
| 671 | + | |
| 672 | + err = snd_pcm_new(dice->card, "DICE", 0, 1, 0, &pcm); | |
| 673 | + if (err < 0) | |
| 674 | + return err; | |
| 675 | + pcm->private_data = dice; | |
| 676 | + strcpy(pcm->name, dice->card->shortname); | |
| 677 | + pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->ops = &ops; | |
| 678 | + | |
| 679 | + return 0; | |
| 680 | +} | |
| 681 | + | |
| 682 | +static long dice_hwdep_read(struct snd_hwdep *hwdep, char __user *buf, | |
| 683 | + long count, loff_t *offset) | |
| 684 | +{ | |
| 685 | + struct dice *dice = hwdep->private_data; | |
| 686 | + DEFINE_WAIT(wait); | |
| 687 | + union snd_firewire_event event; | |
| 688 | + | |
| 689 | + spin_lock_irq(&dice->lock); | |
| 690 | + | |
| 691 | + while (!dice->dev_lock_changed && dice->notification_bits == 0) { | |
| 692 | + prepare_to_wait(&dice->hwdep_wait, &wait, TASK_INTERRUPTIBLE); | |
| 693 | + spin_unlock_irq(&dice->lock); | |
| 694 | + schedule(); | |
| 695 | + finish_wait(&dice->hwdep_wait, &wait); | |
| 696 | + if (signal_pending(current)) | |
| 697 | + return -ERESTARTSYS; | |
| 698 | + spin_lock_irq(&dice->lock); | |
| 699 | + } | |
| 700 | + | |
| 701 | + memset(&event, 0, sizeof(event)); | |
| 702 | + if (dice->dev_lock_changed) { | |
| 703 | + event.lock_status.type = SNDRV_FIREWIRE_EVENT_LOCK_STATUS; | |
| 704 | + event.lock_status.status = dice->dev_lock_count > 0; | |
| 705 | + dice->dev_lock_changed = false; | |
| 706 | + | |
| 707 | + count = min(count, (long)sizeof(event.lock_status)); | |
| 708 | + } else { | |
| 709 | + event.dice_notification.type = SNDRV_FIREWIRE_EVENT_DICE_NOTIFICATION; | |
| 710 | + event.dice_notification.notification = dice->notification_bits; | |
| 711 | + dice->notification_bits = 0; | |
| 712 | + | |
| 713 | + count = min(count, (long)sizeof(event.dice_notification)); | |
| 714 | + } | |
| 715 | + | |
| 716 | + spin_unlock_irq(&dice->lock); | |
| 717 | + | |
| 718 | + if (copy_to_user(buf, &event, count)) | |
| 719 | + return -EFAULT; | |
| 720 | + | |
| 721 | + return count; | |
| 722 | +} | |
| 723 | + | |
| 724 | +static unsigned int dice_hwdep_poll(struct snd_hwdep *hwdep, struct file *file, | |
| 725 | + poll_table *wait) | |
| 726 | +{ | |
| 727 | + struct dice *dice = hwdep->private_data; | |
| 728 | + unsigned int events; | |
| 729 | + | |
| 730 | + poll_wait(file, &dice->hwdep_wait, wait); | |
| 731 | + | |
| 732 | + spin_lock_irq(&dice->lock); | |
| 733 | + if (dice->dev_lock_changed || dice->notification_bits != 0) | |
| 734 | + events = POLLIN | POLLRDNORM; | |
| 735 | + else | |
| 736 | + events = 0; | |
| 737 | + spin_unlock_irq(&dice->lock); | |
| 738 | + | |
| 739 | + return events; | |
| 740 | +} | |
| 741 | + | |
| 742 | +static int dice_hwdep_get_info(struct dice *dice, void __user *arg) | |
| 743 | +{ | |
| 744 | + struct fw_device *dev = fw_parent_device(dice->unit); | |
| 745 | + struct snd_firewire_get_info info; | |
| 746 | + | |
| 747 | + memset(&info, 0, sizeof(info)); | |
| 748 | + info.type = SNDRV_FIREWIRE_TYPE_DICE; | |
| 749 | + info.card = dev->card->index; | |
| 750 | + *(__be32 *)&info.guid[0] = cpu_to_be32(dev->config_rom[3]); | |
| 751 | + *(__be32 *)&info.guid[4] = cpu_to_be32(dev->config_rom[4]); | |
| 752 | + strlcpy(info.device_name, dev_name(&dev->device), | |
| 753 | + sizeof(info.device_name)); | |
| 754 | + | |
| 755 | + if (copy_to_user(arg, &info, sizeof(info))) | |
| 756 | + return -EFAULT; | |
| 757 | + | |
| 758 | + return 0; | |
| 759 | +} | |
| 760 | + | |
| 761 | +static int dice_hwdep_lock(struct dice *dice) | |
| 762 | +{ | |
| 763 | + int err; | |
| 764 | + | |
| 765 | + spin_lock_irq(&dice->lock); | |
| 766 | + | |
| 767 | + if (dice->dev_lock_count == 0) { | |
| 768 | + dice->dev_lock_count = -1; | |
| 769 | + err = 0; | |
| 770 | + } else { | |
| 771 | + err = -EBUSY; | |
| 772 | + } | |
| 773 | + | |
| 774 | + spin_unlock_irq(&dice->lock); | |
| 775 | + | |
| 776 | + return err; | |
| 777 | +} | |
| 778 | + | |
| 779 | +static int dice_hwdep_unlock(struct dice *dice) | |
| 780 | +{ | |
| 781 | + int err; | |
| 782 | + | |
| 783 | + spin_lock_irq(&dice->lock); | |
| 784 | + | |
| 785 | + if (dice->dev_lock_count == -1) { | |
| 786 | + dice->dev_lock_count = 0; | |
| 787 | + err = 0; | |
| 788 | + } else { | |
| 789 | + err = -EBADFD; | |
| 790 | + } | |
| 791 | + | |
| 792 | + spin_unlock_irq(&dice->lock); | |
| 793 | + | |
| 794 | + return err; | |
| 795 | +} | |
| 796 | + | |
| 797 | +static int dice_hwdep_release(struct snd_hwdep *hwdep, struct file *file) | |
| 798 | +{ | |
| 799 | + struct dice *dice = hwdep->private_data; | |
| 800 | + | |
| 801 | + spin_lock_irq(&dice->lock); | |
| 802 | + if (dice->dev_lock_count == -1) | |
| 803 | + dice->dev_lock_count = 0; | |
| 804 | + spin_unlock_irq(&dice->lock); | |
| 805 | + | |
| 806 | + return 0; | |
| 807 | +} | |
| 808 | + | |
| 809 | +static int dice_hwdep_ioctl(struct snd_hwdep *hwdep, struct file *file, | |
| 810 | + unsigned int cmd, unsigned long arg) | |
| 811 | +{ | |
| 812 | + struct dice *dice = hwdep->private_data; | |
| 813 | + | |
| 814 | + switch (cmd) { | |
| 815 | + case SNDRV_FIREWIRE_IOCTL_GET_INFO: | |
| 816 | + return dice_hwdep_get_info(dice, (void __user *)arg); | |
| 817 | + case SNDRV_FIREWIRE_IOCTL_LOCK: | |
| 818 | + return dice_hwdep_lock(dice); | |
| 819 | + case SNDRV_FIREWIRE_IOCTL_UNLOCK: | |
| 820 | + return dice_hwdep_unlock(dice); | |
| 821 | + default: | |
| 822 | + return -ENOIOCTLCMD; | |
| 823 | + } | |
| 824 | +} | |
| 825 | + | |
| 826 | +#ifdef CONFIG_COMPAT | |
| 827 | +static int dice_hwdep_compat_ioctl(struct snd_hwdep *hwdep, struct file *file, | |
| 828 | + unsigned int cmd, unsigned long arg) | |
| 829 | +{ | |
| 830 | + return dice_hwdep_ioctl(hwdep, file, cmd, | |
| 831 | + (unsigned long)compat_ptr(arg)); | |
| 832 | +} | |
| 833 | +#else | |
| 834 | +#define dice_hwdep_compat_ioctl NULL | |
| 835 | +#endif | |
| 836 | + | |
| 837 | +static int dice_create_hwdep(struct dice *dice) | |
| 838 | +{ | |
| 839 | + static const struct snd_hwdep_ops ops = { | |
| 840 | + .read = dice_hwdep_read, | |
| 841 | + .release = dice_hwdep_release, | |
| 842 | + .poll = dice_hwdep_poll, | |
| 843 | + .ioctl = dice_hwdep_ioctl, | |
| 844 | + .ioctl_compat = dice_hwdep_compat_ioctl, | |
| 845 | + }; | |
| 846 | + struct snd_hwdep *hwdep; | |
| 847 | + int err; | |
| 848 | + | |
| 849 | + err = snd_hwdep_new(dice->card, "DICE", 0, &hwdep); | |
| 850 | + if (err < 0) | |
| 851 | + return err; | |
| 852 | + strcpy(hwdep->name, "DICE"); | |
| 853 | + hwdep->iface = SNDRV_HWDEP_IFACE_FW_DICE; | |
| 854 | + hwdep->ops = ops; | |
| 855 | + hwdep->private_data = dice; | |
| 856 | + hwdep->exclusive = true; | |
| 857 | + | |
| 858 | + return 0; | |
| 859 | +} | |
| 860 | + | |
| 861 | +static int dice_proc_read_mem(struct dice *dice, void *buffer, | |
| 862 | + unsigned int offset_q, unsigned int quadlets) | |
| 863 | +{ | |
| 864 | + unsigned int i; | |
| 865 | + int err; | |
| 866 | + | |
| 867 | + err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, | |
| 868 | + DICE_PRIVATE_SPACE + 4 * offset_q, | |
| 869 | + buffer, 4 * quadlets, 0); | |
| 870 | + if (err < 0) | |
| 871 | + return err; | |
| 872 | + | |
| 873 | + for (i = 0; i < quadlets; ++i) | |
| 874 | + be32_to_cpus(&((u32 *)buffer)[i]); | |
| 875 | + | |
| 876 | + return 0; | |
| 877 | +} | |
| 878 | + | |
| 879 | +static const char *str_from_array(const char *const strs[], unsigned int count, | |
| 880 | + unsigned int i) | |
| 881 | +{ | |
| 882 | + if (i < count) | |
| 883 | + return strs[i]; | |
| 884 | + else | |
| 885 | + return "(unknown)"; | |
| 886 | +} | |
| 887 | + | |
| 888 | +static void dice_proc_fixup_string(char *s, unsigned int size) | |
| 889 | +{ | |
| 890 | + unsigned int i; | |
| 891 | + | |
| 892 | + for (i = 0; i < size; i += 4) | |
| 893 | + cpu_to_le32s((u32 *)(s + i)); | |
| 894 | + | |
| 895 | + for (i = 0; i < size - 2; ++i) { | |
| 896 | + if (s[i] == '\0') | |
| 897 | + return; | |
| 898 | + if (s[i] == '\\' && s[i + 1] == '\\') { | |
| 899 | + s[i + 2] = '\0'; | |
| 900 | + return; | |
| 901 | + } | |
| 902 | + } | |
| 903 | + s[size - 1] = '\0'; | |
| 904 | +} | |
| 905 | + | |
| 906 | +static void dice_proc_read(struct snd_info_entry *entry, | |
| 907 | + struct snd_info_buffer *buffer) | |
| 908 | +{ | |
| 909 | + static const char *const section_names[5] = { | |
| 910 | + "global", "tx", "rx", "ext_sync", "unused2" | |
| 911 | + }; | |
| 912 | + static const char *const clock_sources[] = { | |
| 913 | + "aes1", "aes2", "aes3", "aes4", "aes", "adat", "tdif", | |
| 914 | + "wc", "arx1", "arx2", "arx3", "arx4", "internal" | |
| 915 | + }; | |
| 916 | + static const char *const rates[] = { | |
| 917 | + "32000", "44100", "48000", "88200", "96000", "176400", "192000", | |
| 918 | + "any low", "any mid", "any high", "none" | |
| 919 | + }; | |
| 920 | + struct dice *dice = entry->private_data; | |
| 921 | + u32 sections[ARRAY_SIZE(section_names) * 2]; | |
| 922 | + struct { | |
| 923 | + u32 number; | |
| 924 | + u32 size; | |
| 925 | + } tx_rx_header; | |
| 926 | + union { | |
| 927 | + struct { | |
| 928 | + u32 owner_hi, owner_lo; | |
| 929 | + u32 notification; | |
| 930 | + char nick_name[NICK_NAME_SIZE]; | |
| 931 | + u32 clock_select; | |
| 932 | + u32 enable; | |
| 933 | + u32 status; | |
| 934 | + u32 extended_status; | |
| 935 | + u32 sample_rate; | |
| 936 | + u32 version; | |
| 937 | + u32 clock_caps; | |
| 938 | + char clock_source_names[CLOCK_SOURCE_NAMES_SIZE]; | |
| 939 | + } global; | |
| 940 | + struct { | |
| 941 | + u32 iso; | |
| 942 | + u32 number_audio; | |
| 943 | + u32 number_midi; | |
| 944 | + u32 speed; | |
| 945 | + char names[TX_NAMES_SIZE]; | |
| 946 | + u32 ac3_caps; | |
| 947 | + u32 ac3_enable; | |
| 948 | + } tx; | |
| 949 | + struct { | |
| 950 | + u32 iso; | |
| 951 | + u32 seq_start; | |
| 952 | + u32 number_audio; | |
| 953 | + u32 number_midi; | |
| 954 | + char names[RX_NAMES_SIZE]; | |
| 955 | + u32 ac3_caps; | |
| 956 | + u32 ac3_enable; | |
| 957 | + } rx; | |
| 958 | + struct { | |
| 959 | + u32 clock_source; | |
| 960 | + u32 locked; | |
| 961 | + u32 rate; | |
| 962 | + u32 adat_user_data; | |
| 963 | + } ext_sync; | |
| 964 | + } buf; | |
| 965 | + unsigned int quadlets, stream, i; | |
| 966 | + | |
| 967 | + if (dice_proc_read_mem(dice, sections, 0, ARRAY_SIZE(sections)) < 0) | |
| 968 | + return; | |
| 969 | + snd_iprintf(buffer, "sections:\n"); | |
| 970 | + for (i = 0; i < ARRAY_SIZE(section_names); ++i) | |
| 971 | + snd_iprintf(buffer, " %s: offset %u, size %u\n", | |
| 972 | + section_names[i], | |
| 973 | + sections[i * 2], sections[i * 2 + 1]); | |
| 974 | + | |
| 975 | + quadlets = min_t(u32, sections[1], sizeof(buf.global) / 4); | |
| 976 | + if (dice_proc_read_mem(dice, &buf.global, sections[0], quadlets) < 0) | |
| 977 | + return; | |
| 978 | + snd_iprintf(buffer, "global:\n"); | |
| 979 | + snd_iprintf(buffer, " owner: %04x:%04x%08x\n", | |
| 980 | + buf.global.owner_hi >> 16, | |
| 981 | + buf.global.owner_hi & 0xffff, buf.global.owner_lo); | |
| 982 | + snd_iprintf(buffer, " notification: %08x\n", buf.global.notification); | |
| 983 | + dice_proc_fixup_string(buf.global.nick_name, NICK_NAME_SIZE); | |
| 984 | + snd_iprintf(buffer, " nick name: %s\n", buf.global.nick_name); | |
| 985 | + snd_iprintf(buffer, " clock select: %s %s\n", | |
| 986 | + str_from_array(clock_sources, ARRAY_SIZE(clock_sources), | |
| 987 | + buf.global.clock_select & CLOCK_SOURCE_MASK), | |
| 988 | + str_from_array(rates, ARRAY_SIZE(rates), | |
| 989 | + (buf.global.clock_select & CLOCK_RATE_MASK) | |
| 990 | + >> CLOCK_RATE_SHIFT)); | |
| 991 | + snd_iprintf(buffer, " enable: %u\n", buf.global.enable); | |
| 992 | + snd_iprintf(buffer, " status: %slocked %s\n", | |
| 993 | + buf.global.status & STATUS_SOURCE_LOCKED ? "" : "un", | |
| 994 | + str_from_array(rates, ARRAY_SIZE(rates), | |
| 995 | + (buf.global.status & | |
| 996 | + STATUS_NOMINAL_RATE_MASK) | |
| 997 | + >> CLOCK_RATE_SHIFT)); | |
| 998 | + snd_iprintf(buffer, " ext status: %08x\n", buf.global.extended_status); | |
| 999 | + snd_iprintf(buffer, " sample rate: %u\n", buf.global.sample_rate); | |
| 1000 | + snd_iprintf(buffer, " version: %u.%u.%u.%u\n", | |
| 1001 | + (buf.global.version >> 24) & 0xff, | |
| 1002 | + (buf.global.version >> 16) & 0xff, | |
| 1003 | + (buf.global.version >> 8) & 0xff, | |
| 1004 | + (buf.global.version >> 0) & 0xff); | |
| 1005 | + if (quadlets >= 90) { | |
| 1006 | + snd_iprintf(buffer, " clock caps:"); | |
| 1007 | + for (i = 0; i <= 6; ++i) | |
| 1008 | + if (buf.global.clock_caps & (1 << i)) | |
| 1009 | + snd_iprintf(buffer, " %s", rates[i]); | |
| 1010 | + for (i = 0; i <= 12; ++i) | |
| 1011 | + if (buf.global.clock_caps & (1 << (16 + i))) | |
| 1012 | + snd_iprintf(buffer, " %s", clock_sources[i]); | |
| 1013 | + snd_iprintf(buffer, "\n"); | |
| 1014 | + dice_proc_fixup_string(buf.global.clock_source_names, | |
| 1015 | + CLOCK_SOURCE_NAMES_SIZE); | |
| 1016 | + snd_iprintf(buffer, " clock source names: %s\n", | |
| 1017 | + buf.global.clock_source_names); | |
| 1018 | + } | |
| 1019 | + | |
| 1020 | + if (dice_proc_read_mem(dice, &tx_rx_header, sections[2], 2) < 0) | |
| 1021 | + return; | |
| 1022 | + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.tx)); | |
| 1023 | + for (stream = 0; stream < tx_rx_header.number; ++stream) { | |
| 1024 | + if (dice_proc_read_mem(dice, &buf.tx, sections[2] + 2 + | |
| 1025 | + stream * tx_rx_header.size, | |
| 1026 | + quadlets) < 0) | |
| 1027 | + break; | |
| 1028 | + snd_iprintf(buffer, "tx %u:\n", stream); | |
| 1029 | + snd_iprintf(buffer, " iso channel: %d\n", (int)buf.tx.iso); | |
| 1030 | + snd_iprintf(buffer, " audio channels: %u\n", | |
| 1031 | + buf.tx.number_audio); | |
| 1032 | + snd_iprintf(buffer, " midi ports: %u\n", buf.tx.number_midi); | |
| 1033 | + snd_iprintf(buffer, " speed: S%u\n", 100u << buf.tx.speed); | |
| 1034 | + if (quadlets >= 68) { | |
| 1035 | + dice_proc_fixup_string(buf.tx.names, TX_NAMES_SIZE); | |
| 1036 | + snd_iprintf(buffer, " names: %s\n", buf.tx.names); | |
| 1037 | + } | |
| 1038 | + if (quadlets >= 70) { | |
| 1039 | + snd_iprintf(buffer, " ac3 caps: %08x\n", | |
| 1040 | + buf.tx.ac3_caps); | |
| 1041 | + snd_iprintf(buffer, " ac3 enable: %08x\n", | |
| 1042 | + buf.tx.ac3_enable); | |
| 1043 | + } | |
| 1044 | + } | |
| 1045 | + | |
| 1046 | + if (dice_proc_read_mem(dice, &tx_rx_header, sections[4], 2) < 0) | |
| 1047 | + return; | |
| 1048 | + quadlets = min_t(u32, tx_rx_header.size, sizeof(buf.rx)); | |
| 1049 | + for (stream = 0; stream < tx_rx_header.number; ++stream) { | |
| 1050 | + if (dice_proc_read_mem(dice, &buf.rx, sections[4] + 2 + | |
| 1051 | + stream * tx_rx_header.size, | |
| 1052 | + quadlets) < 0) | |
| 1053 | + break; | |
| 1054 | + snd_iprintf(buffer, "rx %u:\n", stream); | |
| 1055 | + snd_iprintf(buffer, " iso channel: %d\n", (int)buf.rx.iso); | |
| 1056 | + snd_iprintf(buffer, " sequence start: %u\n", buf.rx.seq_start); | |
| 1057 | + snd_iprintf(buffer, " audio channels: %u\n", | |
| 1058 | + buf.rx.number_audio); | |
| 1059 | + snd_iprintf(buffer, " midi ports: %u\n", buf.rx.number_midi); | |
| 1060 | + if (quadlets >= 68) { | |
| 1061 | + dice_proc_fixup_string(buf.rx.names, RX_NAMES_SIZE); | |
| 1062 | + snd_iprintf(buffer, " names: %s\n", buf.rx.names); | |
| 1063 | + } | |
| 1064 | + if (quadlets >= 70) { | |
| 1065 | + snd_iprintf(buffer, " ac3 caps: %08x\n", | |
| 1066 | + buf.rx.ac3_caps); | |
| 1067 | + snd_iprintf(buffer, " ac3 enable: %08x\n", | |
| 1068 | + buf.rx.ac3_enable); | |
| 1069 | + } | |
| 1070 | + } | |
| 1071 | + | |
| 1072 | + quadlets = min_t(u32, sections[7], sizeof(buf.ext_sync) / 4); | |
| 1073 | + if (quadlets >= 4) { | |
| 1074 | + if (dice_proc_read_mem(dice, &buf.ext_sync, | |
| 1075 | + sections[6], 4) < 0) | |
| 1076 | + return; | |
| 1077 | + snd_iprintf(buffer, "ext status:\n"); | |
| 1078 | + snd_iprintf(buffer, " clock source: %s\n", | |
| 1079 | + str_from_array(clock_sources, | |
| 1080 | + ARRAY_SIZE(clock_sources), | |
| 1081 | + buf.ext_sync.clock_source)); | |
| 1082 | + snd_iprintf(buffer, " locked: %u\n", buf.ext_sync.locked); | |
| 1083 | + snd_iprintf(buffer, " rate: %s\n", | |
| 1084 | + str_from_array(rates, ARRAY_SIZE(rates), | |
| 1085 | + buf.ext_sync.rate)); | |
| 1086 | + snd_iprintf(buffer, " adat user data: "); | |
| 1087 | + if (buf.ext_sync.adat_user_data & ADAT_USER_DATA_NO_DATA) | |
| 1088 | + snd_iprintf(buffer, "-\n"); | |
| 1089 | + else | |
| 1090 | + snd_iprintf(buffer, "%x\n", | |
| 1091 | + buf.ext_sync.adat_user_data); | |
| 1092 | + } | |
| 1093 | +} | |
| 1094 | + | |
| 1095 | +static void dice_create_proc(struct dice *dice) | |
| 1096 | +{ | |
| 1097 | + struct snd_info_entry *entry; | |
| 1098 | + | |
| 1099 | + if (!snd_card_proc_new(dice->card, "dice", &entry)) | |
| 1100 | + snd_info_set_text_ops(entry, dice, dice_proc_read); | |
| 1101 | +} | |
| 1102 | + | |
| 1103 | +static void dice_card_free(struct snd_card *card) | |
| 1104 | +{ | |
| 1105 | + struct dice *dice = card->private_data; | |
| 1106 | + | |
| 1107 | + amdtp_out_stream_destroy(&dice->stream); | |
| 1108 | + fw_core_remove_address_handler(&dice->notification_handler); | |
| 1109 | + mutex_destroy(&dice->mutex); | |
| 1110 | +} | |
| 1111 | + | |
| 1112 | +#define OUI_WEISS 0x001c6a | |
| 1113 | + | |
| 1114 | +#define DICE_CATEGORY_ID 0x04 | |
| 1115 | +#define WEISS_CATEGORY_ID 0x00 | |
| 1116 | + | |
| 1117 | +static int dice_interface_check(struct fw_unit *unit) | |
| 1118 | +{ | |
| 1119 | + static const int min_values[10] = { | |
| 1120 | + 10, 0x64 / 4, | |
| 1121 | + 10, 0x18 / 4, | |
| 1122 | + 10, 0x18 / 4, | |
| 1123 | + 0, 0, | |
| 1124 | + 0, 0, | |
| 1125 | + }; | |
| 1126 | + struct fw_device *device = fw_parent_device(unit); | |
| 1127 | + struct fw_csr_iterator it; | |
| 1128 | + int key, value, vendor = -1, model = -1, err; | |
| 1129 | + unsigned int category, i; | |
| 1130 | + __be32 pointers[ARRAY_SIZE(min_values)]; | |
| 1131 | + __be32 tx_data[4]; | |
| 1132 | + __be32 version; | |
| 1133 | + | |
| 1134 | + /* | |
| 1135 | + * Check that GUID and unit directory are constructed according to DICE | |
| 1136 | + * rules, i.e., that the specifier ID is the GUID's OUI, and that the | |
| 1137 | + * GUID chip ID consists of the 8-bit category ID, the 10-bit product | |
| 1138 | + * ID, and a 22-bit serial number. | |
| 1139 | + */ | |
| 1140 | + fw_csr_iterator_init(&it, unit->directory); | |
| 1141 | + while (fw_csr_iterator_next(&it, &key, &value)) { | |
| 1142 | + switch (key) { | |
| 1143 | + case CSR_SPECIFIER_ID: | |
| 1144 | + vendor = value; | |
| 1145 | + break; | |
| 1146 | + case CSR_MODEL: | |
| 1147 | + model = value; | |
| 1148 | + break; | |
| 1149 | + } | |
| 1150 | + } | |
| 1151 | + if (vendor == OUI_WEISS) | |
| 1152 | + category = WEISS_CATEGORY_ID; | |
| 1153 | + else | |
| 1154 | + category = DICE_CATEGORY_ID; | |
| 1155 | + if (device->config_rom[3] != ((vendor << 8) | category) || | |
| 1156 | + device->config_rom[4] >> 22 != model) | |
| 1157 | + return -ENODEV; | |
| 1158 | + | |
| 1159 | + /* | |
| 1160 | + * Check that the sub address spaces exist and are located inside the | |
| 1161 | + * private address space. The minimum values are chosen so that all | |
| 1162 | + * minimally required registers are included. | |
| 1163 | + */ | |
| 1164 | + err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST, | |
| 1165 | + DICE_PRIVATE_SPACE, | |
| 1166 | + pointers, sizeof(pointers), 0); | |
| 1167 | + if (err < 0) | |
| 1168 | + return -ENODEV; | |
| 1169 | + for (i = 0; i < ARRAY_SIZE(pointers); ++i) { | |
| 1170 | + value = be32_to_cpu(pointers[i]); | |
| 1171 | + if (value < min_values[i] || value >= 0x40000) | |
| 1172 | + return -ENODEV; | |
| 1173 | + } | |
| 1174 | + | |
| 1175 | + /* We support playback only. Let capture devices be handled by FFADO. */ | |
| 1176 | + err = snd_fw_transaction(unit, TCODE_READ_BLOCK_REQUEST, | |
| 1177 | + DICE_PRIVATE_SPACE + | |
| 1178 | + be32_to_cpu(pointers[2]) * 4, | |
| 1179 | + tx_data, sizeof(tx_data), 0); | |
| 1180 | + if (err < 0 || (tx_data[0] && tx_data[3])) | |
| 1181 | + return -ENODEV; | |
| 1182 | + | |
| 1183 | + /* | |
| 1184 | + * Check that the implemented DICE driver specification major version | |
| 1185 | + * number matches. | |
| 1186 | + */ | |
| 1187 | + err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST, | |
| 1188 | + DICE_PRIVATE_SPACE + | |
| 1189 | + be32_to_cpu(pointers[0]) * 4 + GLOBAL_VERSION, | |
| 1190 | + &version, 4, 0); | |
| 1191 | + if (err < 0) | |
| 1192 | + return -ENODEV; | |
| 1193 | + if ((version & cpu_to_be32(0xff000000)) != cpu_to_be32(0x01000000)) { | |
| 1194 | + dev_err(&unit->device, | |
| 1195 | + "unknown DICE version: 0x%08x\n", be32_to_cpu(version)); | |
| 1196 | + return -ENODEV; | |
| 1197 | + } | |
| 1198 | + | |
| 1199 | + return 0; | |
| 1200 | +} | |
| 1201 | + | |
| 1202 | +static int highest_supported_mode_rate(struct dice *dice, unsigned int mode) | |
| 1203 | +{ | |
| 1204 | + int i; | |
| 1205 | + | |
| 1206 | + for (i = ARRAY_SIZE(dice_rates) - 1; i >= 0; --i) | |
| 1207 | + if ((dice->clock_caps & (1 << i)) && | |
| 1208 | + rate_index_to_mode(i) == mode) | |
| 1209 | + return i; | |
| 1210 | + | |
| 1211 | + return -1; | |
| 1212 | +} | |
| 1213 | + | |
| 1214 | +static int dice_read_mode_params(struct dice *dice, unsigned int mode) | |
| 1215 | +{ | |
| 1216 | + __be32 values[2]; | |
| 1217 | + int rate_index, err; | |
| 1218 | + | |
| 1219 | + rate_index = highest_supported_mode_rate(dice, mode); | |
| 1220 | + if (rate_index < 0) { | |
| 1221 | + dice->rx_channels[mode] = 0; | |
| 1222 | + dice->rx_midi_ports[mode] = 0; | |
| 1223 | + return 0; | |
| 1224 | + } | |
| 1225 | + | |
| 1226 | + err = dice_change_rate(dice, rate_index << CLOCK_RATE_SHIFT); | |
| 1227 | + if (err < 0) | |
| 1228 | + return err; | |
| 1229 | + | |
| 1230 | + err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, | |
| 1231 | + rx_address(dice, RX_NUMBER_AUDIO), | |
| 1232 | + values, 2 * 4, 0); | |
| 1233 | + if (err < 0) | |
| 1234 | + return err; | |
| 1235 | + | |
| 1236 | + dice->rx_channels[mode] = be32_to_cpu(values[0]); | |
| 1237 | + dice->rx_midi_ports[mode] = be32_to_cpu(values[1]); | |
| 1238 | + | |
| 1239 | + return 0; | |
| 1240 | +} | |
| 1241 | + | |
| 1242 | +static int dice_read_params(struct dice *dice) | |
| 1243 | +{ | |
| 1244 | + __be32 pointers[6]; | |
| 1245 | + __be32 value; | |
| 1246 | + int mode, err; | |
| 1247 | + | |
| 1248 | + err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, | |
| 1249 | + DICE_PRIVATE_SPACE, | |
| 1250 | + pointers, sizeof(pointers), 0); | |
| 1251 | + if (err < 0) | |
| 1252 | + return err; | |
| 1253 | + | |
| 1254 | + dice->global_offset = be32_to_cpu(pointers[0]) * 4; | |
| 1255 | + dice->rx_offset = be32_to_cpu(pointers[4]) * 4; | |
| 1256 | + | |
| 1257 | + /* some very old firmwares don't tell about their clock support */ | |
| 1258 | + if (be32_to_cpu(pointers[1]) * 4 >= GLOBAL_CLOCK_CAPABILITIES + 4) { | |
| 1259 | + err = snd_fw_transaction( | |
| 1260 | + dice->unit, TCODE_READ_QUADLET_REQUEST, | |
| 1261 | + global_address(dice, GLOBAL_CLOCK_CAPABILITIES), | |
| 1262 | + &value, 4, 0); | |
| 1263 | + if (err < 0) | |
| 1264 | + return err; | |
| 1265 | + dice->clock_caps = be32_to_cpu(value); | |
| 1266 | + } else { | |
| 1267 | + /* this should be supported by any device */ | |
| 1268 | + dice->clock_caps = CLOCK_CAP_RATE_44100 | | |
| 1269 | + CLOCK_CAP_RATE_48000 | | |
| 1270 | + CLOCK_CAP_SOURCE_ARX1 | | |
| 1271 | + CLOCK_CAP_SOURCE_INTERNAL; | |
| 1272 | + } | |
| 1273 | + | |
| 1274 | + for (mode = 2; mode >= 0; --mode) { | |
| 1275 | + err = dice_read_mode_params(dice, mode); | |
| 1276 | + if (err < 0) | |
| 1277 | + return err; | |
| 1278 | + } | |
| 1279 | + | |
| 1280 | + return 0; | |
| 1281 | +} | |
| 1282 | + | |
| 1283 | +static void dice_card_strings(struct dice *dice) | |
| 1284 | +{ | |
| 1285 | + struct snd_card *card = dice->card; | |
| 1286 | + struct fw_device *dev = fw_parent_device(dice->unit); | |
| 1287 | + char vendor[32], model[32]; | |
| 1288 | + unsigned int i; | |
| 1289 | + int err; | |
| 1290 | + | |
| 1291 | + strcpy(card->driver, "DICE"); | |
| 1292 | + | |
| 1293 | + strcpy(card->shortname, "DICE"); | |
| 1294 | + BUILD_BUG_ON(NICK_NAME_SIZE < sizeof(card->shortname)); | |
| 1295 | + err = snd_fw_transaction(dice->unit, TCODE_READ_BLOCK_REQUEST, | |
| 1296 | + global_address(dice, GLOBAL_NICK_NAME), | |
| 1297 | + card->shortname, sizeof(card->shortname), 0); | |
| 1298 | + if (err >= 0) { | |
| 1299 | + /* DICE strings are returned in "always-wrong" endianness */ | |
| 1300 | + BUILD_BUG_ON(sizeof(card->shortname) % 4 != 0); | |
| 1301 | + for (i = 0; i < sizeof(card->shortname); i += 4) | |
| 1302 | + swab32s((u32 *)&card->shortname[i]); | |
| 1303 | + card->shortname[sizeof(card->shortname) - 1] = '\0'; | |
| 1304 | + } | |
| 1305 | + | |
| 1306 | + strcpy(vendor, "?"); | |
| 1307 | + fw_csr_string(dev->config_rom + 5, CSR_VENDOR, vendor, sizeof(vendor)); | |
| 1308 | + strcpy(model, "?"); | |
| 1309 | + fw_csr_string(dice->unit->directory, CSR_MODEL, model, sizeof(model)); | |
| 1310 | + snprintf(card->longname, sizeof(card->longname), | |
| 1311 | + "%s %s (serial %u) at %s, S%d", | |
| 1312 | + vendor, model, dev->config_rom[4] & 0x3fffff, | |
| 1313 | + dev_name(&dice->unit->device), 100 << dev->max_speed); | |
| 1314 | + | |
| 1315 | + strcpy(card->mixername, "DICE"); | |
| 1316 | +} | |
| 1317 | + | |
| 1318 | +static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id) | |
| 1319 | +{ | |
| 1320 | + struct snd_card *card; | |
| 1321 | + struct dice *dice; | |
| 1322 | + __be32 clock_sel; | |
| 1323 | + int err; | |
| 1324 | + | |
| 1325 | + err = dice_interface_check(unit); | |
| 1326 | + if (err < 0) | |
| 1327 | + return err; | |
| 1328 | + | |
| 1329 | + err = snd_card_create(-1, NULL, THIS_MODULE, sizeof(*dice), &card); | |
| 1330 | + if (err < 0) | |
| 1331 | + return err; | |
| 1332 | + snd_card_set_dev(card, &unit->device); | |
| 1333 | + | |
| 1334 | + dice = card->private_data; | |
| 1335 | + dice->card = card; | |
| 1336 | + spin_lock_init(&dice->lock); | |
| 1337 | + mutex_init(&dice->mutex); | |
| 1338 | + dice->unit = unit; | |
| 1339 | + init_completion(&dice->clock_accepted); | |
| 1340 | + init_waitqueue_head(&dice->hwdep_wait); | |
| 1341 | + | |
| 1342 | + dice->notification_handler.length = 4; | |
| 1343 | + dice->notification_handler.address_callback = dice_notification; | |
| 1344 | + dice->notification_handler.callback_data = dice; | |
| 1345 | + err = fw_core_add_address_handler(&dice->notification_handler, | |
| 1346 | + &fw_high_memory_region); | |
| 1347 | + if (err < 0) | |
| 1348 | + goto err_mutex; | |
| 1349 | + | |
| 1350 | + err = dice_owner_set(dice); | |
| 1351 | + if (err < 0) | |
| 1352 | + goto err_notification_handler; | |
| 1353 | + | |
| 1354 | + err = dice_read_params(dice); | |
| 1355 | + if (err < 0) | |
| 1356 | + goto err_owner; | |
| 1357 | + | |
| 1358 | + err = fw_iso_resources_init(&dice->resources, unit); | |
| 1359 | + if (err < 0) | |
| 1360 | + goto err_owner; | |
| 1361 | + dice->resources.channels_mask = 0x00000000ffffffffuLL; | |
| 1362 | + | |
| 1363 | + err = amdtp_out_stream_init(&dice->stream, unit, | |
| 1364 | + CIP_BLOCKING | CIP_HI_DUALWIRE); | |
| 1365 | + if (err < 0) | |
| 1366 | + goto err_resources; | |
| 1367 | + | |
| 1368 | + card->private_free = dice_card_free; | |
| 1369 | + | |
| 1370 | + dice_card_strings(dice); | |
| 1371 | + | |
| 1372 | + err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST, | |
| 1373 | + global_address(dice, GLOBAL_CLOCK_SELECT), | |
| 1374 | + &clock_sel, 4, 0); | |
| 1375 | + if (err < 0) | |
| 1376 | + goto error; | |
| 1377 | + clock_sel &= cpu_to_be32(~CLOCK_SOURCE_MASK); | |
| 1378 | + clock_sel |= cpu_to_be32(CLOCK_SOURCE_ARX1); | |
| 1379 | + err = snd_fw_transaction(unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 1380 | + global_address(dice, GLOBAL_CLOCK_SELECT), | |
| 1381 | + &clock_sel, 4, 0); | |
| 1382 | + if (err < 0) | |
| 1383 | + goto error; | |
| 1384 | + | |
| 1385 | + err = dice_create_pcm(dice); | |
| 1386 | + if (err < 0) | |
| 1387 | + goto error; | |
| 1388 | + | |
| 1389 | + err = dice_create_hwdep(dice); | |
| 1390 | + if (err < 0) | |
| 1391 | + goto error; | |
| 1392 | + | |
| 1393 | + dice_create_proc(dice); | |
| 1394 | + | |
| 1395 | + err = snd_card_register(card); | |
| 1396 | + if (err < 0) | |
| 1397 | + goto error; | |
| 1398 | + | |
| 1399 | + dev_set_drvdata(&unit->device, dice); | |
| 1400 | + | |
| 1401 | + return 0; | |
| 1402 | + | |
| 1403 | +err_resources: | |
| 1404 | + fw_iso_resources_destroy(&dice->resources); | |
| 1405 | +err_owner: | |
| 1406 | + dice_owner_clear(dice); | |
| 1407 | +err_notification_handler: | |
| 1408 | + fw_core_remove_address_handler(&dice->notification_handler); | |
| 1409 | +err_mutex: | |
| 1410 | + mutex_destroy(&dice->mutex); | |
| 1411 | +error: | |
| 1412 | + snd_card_free(card); | |
| 1413 | + return err; | |
| 1414 | +} | |
| 1415 | + | |
| 1416 | +static void dice_remove(struct fw_unit *unit) | |
| 1417 | +{ | |
| 1418 | + struct dice *dice = dev_get_drvdata(&unit->device); | |
| 1419 | + | |
| 1420 | + amdtp_out_stream_pcm_abort(&dice->stream); | |
| 1421 | + | |
| 1422 | + snd_card_disconnect(dice->card); | |
| 1423 | + | |
| 1424 | + mutex_lock(&dice->mutex); | |
| 1425 | + | |
| 1426 | + dice_stream_stop(dice); | |
| 1427 | + dice_owner_clear(dice); | |
| 1428 | + | |
| 1429 | + mutex_unlock(&dice->mutex); | |
| 1430 | + | |
| 1431 | + snd_card_free_when_closed(dice->card); | |
| 1432 | +} | |
| 1433 | + | |
| 1434 | +static void dice_bus_reset(struct fw_unit *unit) | |
| 1435 | +{ | |
| 1436 | + struct dice *dice = dev_get_drvdata(&unit->device); | |
| 1437 | + | |
| 1438 | + /* | |
| 1439 | + * On a bus reset, the DICE firmware disables streaming and then goes | |
| 1440 | + * off contemplating its own navel for hundreds of milliseconds before | |
| 1441 | + * it can react to any of our attempts to reenable streaming. This | |
| 1442 | + * means that we lose synchronization anyway, so we force our streams | |
| 1443 | + * to stop so that the application can restart them in an orderly | |
| 1444 | + * manner. | |
| 1445 | + */ | |
| 1446 | + amdtp_out_stream_pcm_abort(&dice->stream); | |
| 1447 | + | |
| 1448 | + mutex_lock(&dice->mutex); | |
| 1449 | + | |
| 1450 | + dice->global_enabled = false; | |
| 1451 | + dice_stream_stop_packets(dice); | |
| 1452 | + | |
| 1453 | + dice_owner_update(dice); | |
| 1454 | + | |
| 1455 | + fw_iso_resources_update(&dice->resources); | |
| 1456 | + | |
| 1457 | + mutex_unlock(&dice->mutex); | |
| 1458 | +} | |
| 1459 | + | |
| 1460 | +#define DICE_INTERFACE 0x000001 | |
| 1461 | + | |
| 1462 | +static const struct ieee1394_device_id dice_id_table[] = { | |
| 1463 | + { | |
| 1464 | + .match_flags = IEEE1394_MATCH_VERSION, | |
| 1465 | + .version = DICE_INTERFACE, | |
| 1466 | + }, | |
| 1467 | + { } | |
| 1468 | +}; | |
| 1469 | +MODULE_DEVICE_TABLE(ieee1394, dice_id_table); | |
| 1470 | + | |
| 1471 | +static struct fw_driver dice_driver = { | |
| 1472 | + .driver = { | |
| 1473 | + .owner = THIS_MODULE, | |
| 1474 | + .name = KBUILD_MODNAME, | |
| 1475 | + .bus = &fw_bus_type, | |
| 1476 | + }, | |
| 1477 | + .probe = dice_probe, | |
| 1478 | + .update = dice_bus_reset, | |
| 1479 | + .remove = dice_remove, | |
| 1480 | + .id_table = dice_id_table, | |
| 1481 | +}; | |
| 1482 | + | |
| 1483 | +static int __init alsa_dice_init(void) | |
| 1484 | +{ | |
| 1485 | + return driver_register(&dice_driver.driver); | |
| 1486 | +} | |
| 1487 | + | |
| 1488 | +static void __exit alsa_dice_exit(void) | |
| 1489 | +{ | |
| 1490 | + driver_unregister(&dice_driver.driver); | |
| 1491 | +} | |
| 1492 | + | |
| 1493 | +module_init(alsa_dice_init); | |
| 1494 | +module_exit(alsa_dice_exit); | |
| @@ -90,7 +90,7 @@ int fcp_avc_transaction(struct fw_unit *unit, · 89 unmodified lines | ||
| 90 | 90 | : TCODE_WRITE_BLOCK_REQUEST; |
| 91 | 91 | ret = snd_fw_transaction(t.unit, tcode, |
| 92 | 92 | CSR_REGISTER_BASE + CSR_FCP_COMMAND, |
| 93 | − (void *)command, command_size); | |
| 93 | + (void *)command, command_size, 0); | |
| 94 | 94 | if (ret < 0) |
| 95 | 95 | break; |
| 96 | 96 | |
| @@ -217,7 +217,7 @@ static void isight_packet(struct fw_iso_context *context, u32 cycle, · 216 unmodified lines | ||
| 217 | 217 | |
| 218 | 218 | static int isight_connect(struct isight *isight) |
| 219 | 219 | { |
| 220 | − int ch, err, rcode, errors = 0; | |
| 220 | + int ch, err; | |
| 221 | 221 | __be32 value; |
| 222 | 222 | |
| 223 | 223 | retry_after_bus_reset: |
| @@ -230,27 +230,19 @@ retry_after_bus_reset: · 6 unmodified lines | ||
| 230 | 230 | } |
| 231 | 231 | |
| 232 | 232 | value = cpu_to_be32(ch | (isight->device->max_speed << SPEED_SHIFT)); |
| 233 | − for (;;) { | |
| 234 | − rcode = fw_run_transaction( | |
| 235 | − isight->device->card, | |
| 236 | − TCODE_WRITE_QUADLET_REQUEST, | |
| 237 | − isight->device->node_id, | |
| 238 | − isight->resources.generation, | |
| 239 | − isight->device->max_speed, | |
| 240 | − isight->audio_base + REG_ISO_TX_CONFIG, | |
| 241 | − &value, 4); | |
| 242 | − if (rcode == RCODE_COMPLETE) { | |
| 243 | − return 0; | |
| 244 | − } else if (rcode == RCODE_GENERATION) { | |
| 245 | − fw_iso_resources_free(&isight->resources); | |
| 246 | − goto retry_after_bus_reset; | |
| 247 | − } else if (rcode_is_permanent_error(rcode) || ++errors >= 3) { | |
| 248 | − err = -EIO; | |
| 249 | − goto err_resources; | |
| 250 | − } | |
| 251 | − msleep(5); | |
| 233 | + err = snd_fw_transaction(isight->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 234 | + isight->audio_base + REG_ISO_TX_CONFIG, | |
| 235 | + &value, 4, FW_FIXED_GENERATION | | |
| 236 | + isight->resources.generation); | |
| 237 | + if (err == -EAGAIN) { | |
| 238 | + fw_iso_resources_free(&isight->resources); | |
| 239 | + goto retry_after_bus_reset; | |
| 240 | + } else if (err < 0) { | |
| 241 | + goto err_resources; | |
| 252 | 242 | } |
| 253 | 243 | |
| 244 | + return 0; | |
| 245 | + | |
| 254 | 246 | err_resources: |
| 255 | 247 | fw_iso_resources_free(&isight->resources); |
| 256 | 248 | error: |
| @@ -315,17 +307,19 @@ static int isight_hw_params(struct snd_pcm_substream *substream, · 58 unmodified lines | ||
| 315 | 307 | static int reg_read(struct isight *isight, int offset, __be32 *value) |
| 316 | 308 | { |
| 317 | 309 | return snd_fw_transaction(isight->unit, TCODE_READ_QUADLET_REQUEST, |
| 318 | − isight->audio_base + offset, value, 4); | |
| 310 | + isight->audio_base + offset, value, 4, 0); | |
| 319 | 311 | } |
| 320 | 312 | |
| 321 | 313 | static int reg_write(struct isight *isight, int offset, __be32 value) |
| 322 | 314 | { |
| 323 | 315 | return snd_fw_transaction(isight->unit, TCODE_WRITE_QUADLET_REQUEST, |
| 324 | − isight->audio_base + offset, &value, 4); | |
| 316 | + isight->audio_base + offset, &value, 4, 0); | |
| 325 | 317 | } |
| 326 | 318 | |
| 327 | 319 | static void isight_stop_streaming(struct isight *isight) |
| 328 | 320 | { |
| 321 | + __be32 value; | |
| 322 | + | |
| 329 | 323 | if (!isight->context) |
| 330 | 324 | return; |
| 331 | 325 | |
| @@ -333,7 +327,10 @@ static void isight_stop_streaming(struct isight *isight) · 1 unmodified line | ||
| 333 | 327 | fw_iso_context_destroy(isight->context); |
| 334 | 328 | isight->context = NULL; |
| 335 | 329 | fw_iso_resources_free(&isight->resources); |
| 336 | − reg_write(isight, REG_AUDIO_ENABLE, 0); | |
| 330 | + value = 0; | |
| 331 | + snd_fw_transaction(isight->unit, TCODE_WRITE_QUADLET_REQUEST, | |
| 332 | + isight->audio_base + REG_AUDIO_ENABLE, | |
| 333 | + &value, 4, FW_QUIET); | |
| 337 | 334 | } |
| 338 | 335 | |
| 339 | 336 | static int isight_hw_free(struct snd_pcm_substream *substream) |
| @@ -11,7 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <linux/module.h> |
| 12 | 12 | #include "lib.h" |
| 13 | 13 | |
| 14 | −#define ERROR_RETRY_DELAY_MS 5 | |
| 14 | +#define ERROR_RETRY_DELAY_MS 20 | |
| 15 | 15 | |
| 16 | 16 | /** |
| 17 | 17 | * snd_fw_transaction - send a request and wait for its completion |
| @@ -20,6 +20,9 @@ · 2 unmodified lines | ||
| 20 | 20 | * @offset: the address in the target's address space |
| 21 | 21 | * @buffer: input/output data |
| 22 | 22 | * @length: length of @buffer |
| 23 | + * @flags: use %FW_FIXED_GENERATION and add the generation value to attempt the | |
| 24 | + * request only in that generation; use %FW_QUIET to suppress error | |
| 25 | + * messages | |
| 23 | 26 | * |
| 24 | 27 | * Submits an asynchronous request to the target device, and waits for the |
| 25 | 28 | * response. The node ID and the current generation are derived from @unit. |
| @@ -27,14 +30,18 @@ · 1 unmodified line | ||
| 27 | 30 | * Returns zero on success, or a negative error code. |
| 28 | 31 | */ |
| 29 | 32 | int snd_fw_transaction(struct fw_unit *unit, int tcode, |
| 30 | − u64 offset, void *buffer, size_t length) | |
| 33 | + u64 offset, void *buffer, size_t length, | |
| 34 | + unsigned int flags) | |
| 31 | 35 | { |
| 32 | 36 | struct fw_device *device = fw_parent_device(unit); |
| 33 | 37 | int generation, rcode, tries = 0; |
| 34 | 38 | |
| 39 | + generation = flags & FW_GENERATION_MASK; | |
| 35 | 40 | for (;;) { |
| 36 | − generation = device->generation; | |
| 37 | − smp_rmb(); /* node_id vs. generation */ | |
| 41 | + if (!(flags & FW_FIXED_GENERATION)) { | |
| 42 | + generation = device->generation; | |
| 43 | + smp_rmb(); /* node_id vs. generation */ | |
| 44 | + } | |
| 38 | 45 | rcode = fw_run_transaction(device->card, tcode, |
| 39 | 46 | device->node_id, generation, |
| 40 | 47 | device->max_speed, offset, |
| @@ -43,9 +50,14 @@ int snd_fw_transaction(struct fw_unit *unit, int tcode, · 2 unmodified lines | ||
| 43 | 50 | if (rcode == RCODE_COMPLETE) |
| 44 | 51 | return 0; |
| 45 | 52 | |
| 53 | + if (rcode == RCODE_GENERATION && (flags & FW_FIXED_GENERATION)) | |
| 54 | + return -EAGAIN; | |
| 55 | + | |
| 46 | 56 | if (rcode_is_permanent_error(rcode) || ++tries >= 3) { |
| 47 | − dev_err(&unit->device, "transaction failed: %s\n", | |
| 48 | − fw_rcode_string(rcode)); | |
| 57 | + if (!(flags & FW_QUIET)) | |
| 58 | + dev_err(&unit->device, | |
| 59 | + "transaction failed: %s\n", | |
| 60 | + fw_rcode_string(rcode)); | |
| 49 | 61 | return -EIO; |
| 50 | 62 | } |
| 51 | 63 | |
| @@ -6,8 +6,13 @@ · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | struct fw_unit; |
| 8 | 8 | |
| 9 | +#define FW_GENERATION_MASK 0x00ff | |
| 10 | +#define FW_FIXED_GENERATION 0x0100 | |
| 11 | +#define FW_QUIET 0x0200 | |
| 12 | + | |
| 9 | 13 | int snd_fw_transaction(struct fw_unit *unit, int tcode, |
| 10 | − u64 offset, void *buffer, size_t length); | |
| 14 | + u64 offset, void *buffer, size_t length, | |
| 15 | + unsigned int flags); | |
| 11 | 16 | |
| 12 | 17 | /* returns true if retrying the transaction would not make sense */ |
| 13 | 18 | static inline bool rcode_is_permanent_error(int rcode) |
| @@ -369,7 +369,7 @@ static int scs_init_hss_address(struct scs *scs) · 368 unmodified lines | ||
| 369 | 369 | data = cpu_to_be64(((u64)HSS1394_TAG_CHANGE_ADDRESS << 56) | |
| 370 | 370 | scs->hss_handler.offset); |
| 371 | 371 | err = snd_fw_transaction(scs->unit, TCODE_WRITE_BLOCK_REQUEST, |
| 372 | − HSS1394_ADDRESS, &data, 8); | |
| 372 | + HSS1394_ADDRESS, &data, 8, 0); | |
| 373 | 373 | if (err < 0) |
| 374 | 374 | dev_err(&scs->unit->device, "HSS1394 communication failed\n"); |
| 375 | 375 | |
| @@ -455,12 +455,16 @@ err_card: · 79 unmodified lines | ||
| 455 | 455 | static void scs_update(struct fw_unit *unit) |
| 456 | 456 | { |
| 457 | 457 | struct scs *scs = dev_get_drvdata(&unit->device); |
| 458 | + int generation; | |
| 458 | 459 | __be64 data; |
| 459 | 460 | |
| 460 | 461 | data = cpu_to_be64(((u64)HSS1394_TAG_CHANGE_ADDRESS << 56) | |
| 461 | 462 | scs->hss_handler.offset); |
| 463 | + generation = fw_parent_device(unit)->generation; | |
| 464 | + smp_rmb(); /* node_id vs. generation */ | |
| 462 | 465 | snd_fw_transaction(scs->unit, TCODE_WRITE_BLOCK_REQUEST, |
| 463 | − HSS1394_ADDRESS, &data, 8); | |
| 466 | + HSS1394_ADDRESS, &data, 8, | |
| 467 | + FW_FIXED_GENERATION | generation); | |
| 464 | 468 | } |
| 465 | 469 | |
| 466 | 470 | static void scs_remove(struct fw_unit *unit) |
| @@ -52,7 +52,6 @@ struct fwspk { · 51 unmodified lines | ||
| 52 | 52 | struct mutex mutex; |
| 53 | 53 | struct cmp_connection connection; |
| 54 | 54 | struct amdtp_out_stream stream; |
| 55 | − bool stream_running; | |
| 56 | 55 | bool mute; |
| 57 | 56 | s16 volume[6]; |
| 58 | 57 | s16 volume_min; |
| @@ -188,10 +187,9 @@ static int fwspk_close(struct snd_pcm_substream *substream) · 129 unmodified lines | ||
| 188 | 187 | |
| 189 | 188 | static void fwspk_stop_stream(struct fwspk *fwspk) |
| 190 | 189 | { |
| 191 | − if (fwspk->stream_running) { | |
| 190 | + if (amdtp_out_stream_running(&fwspk->stream)) { | |
| 192 | 191 | amdtp_out_stream_stop(&fwspk->stream); |
| 193 | 192 | cmp_connection_break(&fwspk->connection); |
| 194 | − fwspk->stream_running = false; | |
| 195 | 193 | } |
| 196 | 194 | } |
| 197 | 195 | |
| @@ -246,8 +244,10 @@ static int fwspk_hw_params(struct snd_pcm_substream *substream, · 48 unmodified lines | ||
| 246 | 244 | if (err < 0) |
| 247 | 245 | goto error; |
| 248 | 246 | |
| 249 | − amdtp_out_stream_set_rate(&fwspk->stream, params_rate(hw_params)); | |
| 250 | − amdtp_out_stream_set_pcm(&fwspk->stream, params_channels(hw_params)); | |
| 247 | + amdtp_out_stream_set_parameters(&fwspk->stream, | |
| 248 | + params_rate(hw_params), | |
| 249 | + params_channels(hw_params), | |
| 250 | + 0); | |
| 251 | 251 | |
| 252 | 252 | amdtp_out_stream_set_pcm_format(&fwspk->stream, |
| 253 | 253 | params_format(hw_params)); |
| @@ -285,7 +285,7 @@ static int fwspk_prepare(struct snd_pcm_substream *substream) · 31 unmodified lines | ||
| 285 | 285 | if (amdtp_out_streaming_error(&fwspk->stream)) |
| 286 | 286 | fwspk_stop_stream(fwspk); |
| 287 | 287 | |
| 288 | − if (!fwspk->stream_running) { | |
| 288 | + if (!amdtp_out_stream_running(&fwspk->stream)) { | |
| 289 | 289 | err = cmp_connection_establish(&fwspk->connection, |
| 290 | 290 | amdtp_out_stream_get_max_payload(&fwspk->stream)); |
| 291 | 291 | if (err < 0) |
| @@ -296,8 +296,6 @@ static int fwspk_prepare(struct snd_pcm_substream *substream) · 4 unmodified lines | ||
| 296 | 296 | fwspk->connection.speed); |
| 297 | 297 | if (err < 0) |
| 298 | 298 | goto err_connection; |
| 299 | − | |
| 300 | − fwspk->stream_running = true; | |
| 301 | 299 | } |
| 302 | 300 | |
| 303 | 301 | mutex_unlock(&fwspk->mutex); |
| @@ -647,7 +645,7 @@ static u32 fwspk_read_firmware_version(struct fw_unit *unit) · 343 unmodified lines | ||
| 647 | 645 | int err; |
| 648 | 646 | |
| 649 | 647 | err = snd_fw_transaction(unit, TCODE_READ_QUADLET_REQUEST, |
| 650 | − OXFORD_FIRMWARE_ID_ADDRESS, &data, 4); | |
| 648 | + OXFORD_FIRMWARE_ID_ADDRESS, &data, 4, 0); | |
| 651 | 649 | return err >= 0 ? be32_to_cpu(data) : 0; |
| 652 | 650 | } |
| 653 | 651 | |
| @@ -60,7 +60,7 @@ static void reg_dump(struct ak4114 *ak4114) · 59 unmodified lines | ||
| 60 | 60 | |
| 61 | 61 | printk(KERN_DEBUG "AK4114 REG DUMP:\n"); |
| 62 | 62 | for (i = 0; i < 0x20; i++) |
| 63 | − printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < sizeof(ak4114->regmap) ? ak4114->regmap[i] : 0); | |
| 63 | + printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0); | |
| 64 | 64 | } |
| 65 | 65 | #endif |
| 66 | 66 | |
| @@ -81,7 +81,7 @@ static int snd_ak4114_dev_free(struct snd_device *device) · 14 unmodified lines | ||
| 81 | 81 | |
| 82 | 82 | int snd_ak4114_create(struct snd_card *card, |
| 83 | 83 | ak4114_read_t *read, ak4114_write_t *write, |
| 84 | − const unsigned char pgm[7], const unsigned char txcsb[5], | |
| 84 | + const unsigned char pgm[6], const unsigned char txcsb[5], | |
| 85 | 85 | void *private_data, struct ak4114 **r_ak4114) |
| 86 | 86 | { |
| 87 | 87 | struct ak4114 *chip; |
| @@ -101,7 +101,7 @@ int snd_ak4114_create(struct snd_card *card, · 13 unmodified lines | ||
| 101 | 101 | chip->private_data = private_data; |
| 102 | 102 | INIT_DELAYED_WORK(&chip->work, ak4114_stats); |
| 103 | 103 | |
| 104 | − for (reg = 0; reg < 7; reg++) | |
| 104 | + for (reg = 0; reg < 6; reg++) | |
| 105 | 105 | chip->regmap[reg] = pgm[reg]; |
| 106 | 106 | for (reg = 0; reg < 5; reg++) |
| 107 | 107 | chip->txcsb[reg] = txcsb[reg]; |
| @@ -142,7 +142,7 @@ static void ak4114_init_regs(struct ak4114 *chip) · 34 unmodified lines | ||
| 142 | 142 | /* release reset, but leave powerdown */ |
| 143 | 143 | reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN); |
| 144 | 144 | udelay(200); |
| 145 | − for (reg = 1; reg < 7; reg++) | |
| 145 | + for (reg = 1; reg < 6; reg++) | |
| 146 | 146 | reg_write(chip, reg, chip->regmap[reg]); |
| 147 | 147 | for (reg = 0; reg < 5; reg++) |
| 148 | 148 | reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]); |
| @@ -583,7 +583,7 @@ static int ak4xxx_capture_source_info(struct snd_kcontrol *kcontrol, · 582 unmodified lines | ||
| 583 | 583 | if (idx >= num_names) |
| 584 | 584 | return -EINVAL; |
| 585 | 585 | input_names = ak->adc_info[mixer_ch].input_names; |
| 586 | − strncpy(uinfo->value.enumerated.name, input_names[idx], | |
| 586 | + strlcpy(uinfo->value.enumerated.name, input_names[idx], | |
| 587 | 587 | sizeof(uinfo->value.enumerated.name)); |
| 588 | 588 | return 0; |
| 589 | 589 | } |
| @@ -126,6 +126,7 @@ static void snd_cmi8328_cfg_write(u16 port, u8 reg, u8 val) · 125 unmodified lines | ||
| 126 | 126 | outb(val, port + 3); /* yes, value goes to the same port as index */ |
| 127 | 127 | } |
| 128 | 128 | |
| 129 | +#ifdef CONFIG_PM | |
| 129 | 130 | static void snd_cmi8328_cfg_save(u16 port, u8 cfg[]) |
| 130 | 131 | { |
| 131 | 132 | cfg[0] = snd_cmi8328_cfg_read(port, CFG1); |
| @@ -139,6 +140,7 @@ static void snd_cmi8328_cfg_restore(u16 port, u8 cfg[]) · 7 unmodified lines | ||
| 139 | 140 | snd_cmi8328_cfg_write(port, CFG2, cfg[1]); |
| 140 | 141 | snd_cmi8328_cfg_write(port, CFG3, cfg[2]); |
| 141 | 142 | } |
| 143 | +#endif /* CONFIG_PM */ | |
| 142 | 144 | |
| 143 | 145 | static int snd_cmi8328_mixer(struct snd_wss *chip) |
| 144 | 146 | { |
| @@ -208,6 +208,7 @@ static int snd_sb_csp_ioctl(struct snd_hwdep * hw, struct file *file, unsigned i · 207 unmodified lines | ||
| 208 | 208 | switch (cmd) { |
| 209 | 209 | /* get information */ |
| 210 | 210 | case SNDRV_SB_CSP_IOCTL_INFO: |
| 211 | + memset(&info, 0, sizeof(info)); | |
| 211 | 212 | *info.codec_name = *p->codec_name; |
| 212 | 213 | info.func_nr = p->func_nr; |
| 213 | 214 | info.acc_format = p->acc_format; |
| @@ -276,7 +276,7 @@ static void ad1843_write_multi(struct snd_ad1843 *ad1843, int argcount, ...) · 275 unmodified lines | ||
| 276 | 276 | if (reg == -1) |
| 277 | 277 | reg = fp->reg; |
| 278 | 278 | else |
| 279 | − BUG_ON(reg != fp->reg); | |
| 279 | + WARN_ON(reg != fp->reg); | |
| 280 | 280 | m = ((1 << fp->nbits) - 1) << fp->lo_bit; |
| 281 | 281 | mask |= m; |
| 282 | 282 | bits |= (value << fp->lo_bit) & m; |
| @@ -1544,7 +1544,7 @@ static int ess_has_rec_mixer (int submodel) · 1543 unmodified lines | ||
| 1544 | 1544 | return 1; |
| 1545 | 1545 | default: |
| 1546 | 1546 | return 0; |
| 1547 | − }; | |
| 1547 | + } | |
| 1548 | 1548 | }; |
| 1549 | 1549 | |
| 1550 | 1550 | #ifdef FKS_LOGGING |
| @@ -739,7 +739,7 @@ snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffe · 738 unmodified lines | ||
| 739 | 739 | reg = ad1889_readw(chip, AD_DS_WADA); |
| 740 | 740 | snd_iprintf(buffer, "Right: %s, -%d dB\n", |
| 741 | 741 | (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute", |
| 742 | − ((reg & AD_DS_WADA_RWAA) >> 8) * 3); | |
| 742 | + (reg & AD_DS_WADA_RWAA) * 3); | |
| 743 | 743 | |
| 744 | 744 | reg = ad1889_readw(chip, AD_DS_WAS); |
| 745 | 745 | snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg); |
| @@ -855,7 +855,6 @@ static void snd_ali_disable_spdif_out(struct snd_ali *codec) · 854 unmodified lines | ||
| 855 | 855 | static void snd_ali_update_ptr(struct snd_ali *codec, int channel) |
| 856 | 856 | { |
| 857 | 857 | struct snd_ali_voice *pvoice; |
| 858 | − struct snd_pcm_runtime *runtime; | |
| 859 | 858 | struct snd_ali_channel_control *pchregs; |
| 860 | 859 | unsigned int old, mask; |
| 861 | 860 | #ifdef ALI_DEBUG |
| @@ -872,7 +871,6 @@ static void snd_ali_update_ptr(struct snd_ali *codec, int channel) · 10 unmodified lines | ||
| 872 | 871 | return; |
| 873 | 872 | |
| 874 | 873 | pvoice = &codec->synth.voices[channel]; |
| 875 | − runtime = pvoice->substream->runtime; | |
| 876 | 874 | |
| 877 | 875 | udelay(100); |
| 878 | 876 | spin_lock(&codec->reg_lock); |
| @@ -1913,6 +1913,7 @@ static int snd_asihpi_tuner_band_put(struct snd_kcontrol *kcontrol, · 1912 unmodified lines | ||
| 1913 | 1913 | struct snd_card_asihpi *asihpi = snd_kcontrol_chip(kcontrol); |
| 1914 | 1914 | */ |
| 1915 | 1915 | u32 h_control = kcontrol->private_value; |
| 1916 | + unsigned int idx; | |
| 1916 | 1917 | u16 band; |
| 1917 | 1918 | u16 tuner_bands[HPI_TUNER_BAND_LAST]; |
| 1918 | 1919 | u32 num_bands = 0; |
| @@ -1920,7 +1921,10 @@ static int snd_asihpi_tuner_band_put(struct snd_kcontrol *kcontrol, · 1 unmodified line | ||
| 1920 | 1921 | num_bands = asihpi_tuner_band_query(kcontrol, tuner_bands, |
| 1921 | 1922 | HPI_TUNER_BAND_LAST); |
| 1922 | 1923 | |
| 1923 | − band = tuner_bands[ucontrol->value.enumerated.item[0]]; | |
| 1924 | + idx = ucontrol->value.enumerated.item[0]; | |
| 1925 | + if (idx >= ARRAY_SIZE(tuner_bands)) | |
| 1926 | + idx = ARRAY_SIZE(tuner_bands) - 1; | |
| 1927 | + band = tuner_bands[idx]; | |
| 1924 | 1928 | hpi_handle_error(hpi_tuner_set_band(h_control, band)); |
| 1925 | 1929 | |
| 1926 | 1930 | return 1; |
| @@ -2383,7 +2387,8 @@ static int snd_asihpi_clksrc_put(struct snd_kcontrol *kcontrol, · 456 unmodified lines | ||
| 2383 | 2387 | struct snd_card_asihpi *asihpi = |
| 2384 | 2388 | (struct snd_card_asihpi *)(kcontrol->private_data); |
| 2385 | 2389 | struct clk_cache *clkcache = &asihpi->cc; |
| 2386 | − int change, item; | |
| 2390 | + unsigned int item; | |
| 2391 | + int change; | |
| 2387 | 2392 | u32 h_control = kcontrol->private_value; |
| 2388 | 2393 | |
| 2389 | 2394 | change = 1; |
| @@ -671,7 +671,7 @@ static int snd_vortex_new_pcm(vortex_t *chip, int idx, int nr) · 670 unmodified lines | ||
| 671 | 671 | return err; |
| 672 | 672 | break; |
| 673 | 673 | #endif |
| 674 | − }; | |
| 674 | + } | |
| 675 | 675 | |
| 676 | 676 | if (VORTEX_PCM_TYPE(pcm) == VORTEX_PCM_SPDIF) { |
| 677 | 677 | for (i = 0; i < ARRAY_SIZE(snd_vortex_mixer_spdif); i++) { |
| @@ -219,7 +219,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 218 unmodified lines | ||
| 219 | 219 | */ |
| 220 | 220 | hwwrite(vortex->mmio, WT_RUN(wt), val); |
| 221 | 221 | return 0xc; |
| 222 | − break; | |
| 223 | 222 | case 1: /* param 0 */ |
| 224 | 223 | /* |
| 225 | 224 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", |
| @@ -227,7 +226,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 1 unmodified line | ||
| 227 | 226 | */ |
| 228 | 227 | hwwrite(vortex->mmio, WT_PARM(wt, 0), val); |
| 229 | 228 | return 0xc; |
| 230 | − break; | |
| 231 | 229 | case 2: /* param 1 */ |
| 232 | 230 | /* |
| 233 | 231 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", |
| @@ -235,7 +233,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 1 unmodified line | ||
| 235 | 233 | */ |
| 236 | 234 | hwwrite(vortex->mmio, WT_PARM(wt, 1), val); |
| 237 | 235 | return 0xc; |
| 238 | − break; | |
| 239 | 236 | case 3: /* param 2 */ |
| 240 | 237 | /* |
| 241 | 238 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", |
| @@ -243,7 +240,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 1 unmodified line | ||
| 243 | 240 | */ |
| 244 | 241 | hwwrite(vortex->mmio, WT_PARM(wt, 2), val); |
| 245 | 242 | return 0xc; |
| 246 | − break; | |
| 247 | 243 | case 4: /* param 3 */ |
| 248 | 244 | /* |
| 249 | 245 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", |
| @@ -251,7 +247,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 1 unmodified line | ||
| 251 | 247 | */ |
| 252 | 248 | hwwrite(vortex->mmio, WT_PARM(wt, 3), val); |
| 253 | 249 | return 0xc; |
| 254 | − break; | |
| 255 | 250 | case 6: /* mute */ |
| 256 | 251 | /* |
| 257 | 252 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", |
| @@ -259,20 +254,17 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 1 unmodified line | ||
| 259 | 254 | */ |
| 260 | 255 | hwwrite(vortex->mmio, WT_MUTE(wt), val); |
| 261 | 256 | return 0xc; |
| 262 | − break; | |
| 263 | 257 | case 0xb: |
| 264 | − { /* delay */ | |
| 265 | − /* | |
| 266 | − printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", | |
| 267 | − WT_DELAY(wt,0), (int)val); | |
| 268 | − */ | |
| 269 | − hwwrite(vortex->mmio, WT_DELAY(wt, 3), val); | |
| 270 | − hwwrite(vortex->mmio, WT_DELAY(wt, 2), val); | |
| 271 | − hwwrite(vortex->mmio, WT_DELAY(wt, 1), val); | |
| 272 | − hwwrite(vortex->mmio, WT_DELAY(wt, 0), val); | |
| 273 | − return 0xc; | |
| 274 | − } | |
| 275 | − break; | |
| 258 | + /* delay */ | |
| 259 | + /* | |
| 260 | + printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", | |
| 261 | + WT_DELAY(wt,0), (int)val); | |
| 262 | + */ | |
| 263 | + hwwrite(vortex->mmio, WT_DELAY(wt, 3), val); | |
| 264 | + hwwrite(vortex->mmio, WT_DELAY(wt, 2), val); | |
| 265 | + hwwrite(vortex->mmio, WT_DELAY(wt, 1), val); | |
| 266 | + hwwrite(vortex->mmio, WT_DELAY(wt, 0), val); | |
| 267 | + return 0xc; | |
| 276 | 268 | /* Global WT block parameters */ |
| 277 | 269 | case 5: /* sramp */ |
| 278 | 270 | ecx = WT_SRAMP(wt); |
| @@ -291,7 +283,6 @@ vortex_wt_SetReg(vortex_t * vortex, unsigned char reg, int wt, · 12 unmodified lines | ||
| 291 | 283 | break; |
| 292 | 284 | default: |
| 293 | 285 | return 0; |
| 294 | − break; | |
| 295 | 286 | } |
| 296 | 287 | /* |
| 297 | 288 | printk(KERN_DEBUG "vortex: WT SetReg(0x%x) = 0x%08x\n", ecx, (int)val); |
| @@ -715,14 +715,14 @@ snd_azf3328_mixer_ac97_read(struct snd_ac97 *ac97, unsigned short reg_ac97) · 714 unmodified lines | ||
| 715 | 715 | const struct snd_azf3328 *chip = ac97->private_data; |
| 716 | 716 | unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97); |
| 717 | 717 | unsigned short reg_val = 0; |
| 718 | − bool unsupported = 0; | |
| 718 | + bool unsupported = false; | |
| 719 | 719 | |
| 720 | 720 | snd_azf3328_dbgmixer( |
| 721 | 721 | "snd_azf3328_mixer_ac97_read reg_ac97 %u\n", |
| 722 | 722 | reg_ac97 |
| 723 | 723 | ); |
| 724 | 724 | if (reg_azf & AZF_AC97_REG_UNSUPPORTED) |
| 725 | − unsupported = 1; | |
| 725 | + unsupported = true; | |
| 726 | 726 | else { |
| 727 | 727 | if (reg_azf & AZF_AC97_REG_REAL_IO_READ) |
| 728 | 728 | reg_val = snd_azf3328_mixer_inw(chip, |
| @@ -759,7 +759,7 @@ snd_azf3328_mixer_ac97_read(struct snd_ac97 *ac97, unsigned short reg_ac97) · 30 unmodified lines | ||
| 759 | 759 | reg_val = azf_emulated_ac97_vendor_id & 0xffff; |
| 760 | 760 | break; |
| 761 | 761 | default: |
| 762 | − unsupported = 1; | |
| 762 | + unsupported = true; | |
| 763 | 763 | break; |
| 764 | 764 | } |
| 765 | 765 | } |
| @@ -776,14 +776,14 @@ snd_azf3328_mixer_ac97_write(struct snd_ac97 *ac97, · 10 unmodified lines | ||
| 776 | 776 | { |
| 777 | 777 | const struct snd_azf3328 *chip = ac97->private_data; |
| 778 | 778 | unsigned short reg_azf = snd_azf3328_mixer_ac97_map_reg_idx(reg_ac97); |
| 779 | − bool unsupported = 0; | |
| 779 | + bool unsupported = false; | |
| 780 | 780 | |
| 781 | 781 | snd_azf3328_dbgmixer( |
| 782 | 782 | "snd_azf3328_mixer_ac97_write reg_ac97 %u val %u\n", |
| 783 | 783 | reg_ac97, val |
| 784 | 784 | ); |
| 785 | 785 | if (reg_azf & AZF_AC97_REG_UNSUPPORTED) |
| 786 | − unsupported = 1; | |
| 786 | + unsupported = true; | |
| 787 | 787 | else { |
| 788 | 788 | if (reg_azf & AZF_AC97_REG_REAL_IO_WRITE) |
| 789 | 789 | snd_azf3328_mixer_outw( |
| @@ -808,7 +808,7 @@ snd_azf3328_mixer_ac97_write(struct snd_ac97 *ac97, · 18 unmodified lines | ||
| 808 | 808 | */ |
| 809 | 809 | break; |
| 810 | 810 | default: |
| 811 | − unsupported = 1; | |
| 811 | + unsupported = true; | |
| 812 | 812 | break; |
| 813 | 813 | } |
| 814 | 814 | } |
| @@ -1559,7 +1559,7 @@ snd_azf3328_pcm_trigger(struct snd_pcm_substream *substream, int cmd) · 744 unmodified lines | ||
| 1559 | 1559 | struct snd_azf3328_codec_data *codec = runtime->private_data; |
| 1560 | 1560 | int result = 0; |
| 1561 | 1561 | u16 flags1; |
| 1562 | − bool previously_muted = 0; | |
| 1562 | + bool previously_muted = false; | |
| 1563 | 1563 | bool is_main_mixer_playback_codec = (AZF_CODEC_PLAYBACK == codec->type); |
| 1564 | 1564 | |
| 1565 | 1565 | snd_azf3328_dbgcalls("snd_azf3328_pcm_trigger cmd %d\n", cmd); |
| @@ -161,13 +161,13 @@ int olpc_quirks(struct snd_card *card, struct snd_ac97 *ac97) · 160 unmodified lines | ||
| 161 | 161 | /* drop the original AD1888 HPF control */ |
| 162 | 162 | memset(&elem, 0, sizeof(elem)); |
| 163 | 163 | elem.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 164 | − strncpy(elem.name, "High Pass Filter Enable", sizeof(elem.name)); | |
| 164 | + strlcpy(elem.name, "High Pass Filter Enable", sizeof(elem.name)); | |
| 165 | 165 | snd_ctl_remove_id(card, &elem); |
| 166 | 166 | |
| 167 | 167 | /* drop the original V_REFOUT control */ |
| 168 | 168 | memset(&elem, 0, sizeof(elem)); |
| 169 | 169 | elem.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 170 | − strncpy(elem.name, "V_REFOUT Enable", sizeof(elem.name)); | |
| 170 | + strlcpy(elem.name, "V_REFOUT Enable", sizeof(elem.name)); | |
| 171 | 171 | snd_ctl_remove_id(card, &elem); |
| 172 | 172 | |
| 173 | 173 | /* add the OLPC-specific controls */ |
| @@ -33,7 +33,7 @@ struct daio_rsc_idx { · 32 unmodified lines | ||
| 33 | 33 | unsigned short right; |
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | −struct daio_rsc_idx idx_20k1[NUM_DAIOTYP] = { | |
| 36 | +static struct daio_rsc_idx idx_20k1[NUM_DAIOTYP] = { | |
| 37 | 37 | [LINEO1] = {.left = 0x00, .right = 0x01}, |
| 38 | 38 | [LINEO2] = {.left = 0x18, .right = 0x19}, |
| 39 | 39 | [LINEO3] = {.left = 0x08, .right = 0x09}, |
| @@ -44,7 +44,7 @@ struct daio_rsc_idx idx_20k1[NUM_DAIOTYP] = { · 4 unmodified lines | ||
| 44 | 44 | [SPDIFI1] = {.left = 0x95, .right = 0x9d}, |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | −struct daio_rsc_idx idx_20k2[NUM_DAIOTYP] = { | |
| 47 | +static struct daio_rsc_idx idx_20k2[NUM_DAIOTYP] = { | |
| 48 | 48 | [LINEO1] = {.left = 0x40, .right = 0x41}, |
| 49 | 49 | [LINEO2] = {.left = 0x60, .right = 0x61}, |
| 50 | 50 | [LINEO3] = {.left = 0x50, .right = 0x51}, |
| @@ -69,7 +69,8 @@ unsigned int get_field(unsigned int data, unsigned int field) · 68 unmodified lines | ||
| 69 | 69 | { |
| 70 | 70 | int i; |
| 71 | 71 | |
| 72 | − BUG_ON(!field); | |
| 72 | + if (WARN_ON(!field)) | |
| 73 | + return 0; | |
| 73 | 74 | /* @field should always be greater than 0 */ |
| 74 | 75 | for (i = 0; !(field & (1 << i)); ) |
| 75 | 76 | i++; |
| @@ -81,7 +82,8 @@ void set_field(unsigned int *data, unsigned int field, unsigned int value) · 5 unmodified lines | ||
| 81 | 82 | { |
| 82 | 83 | int i; |
| 83 | 84 | |
| 84 | − BUG_ON(!field); | |
| 85 | + if (WARN_ON(!field)) | |
| 86 | + return; | |
| 85 | 87 | /* @field should always be greater than 0 */ |
| 86 | 88 | for (i = 0; !(field & (1 << i)); ) |
| 87 | 89 | i++; |
| @@ -1182,15 +1182,20 @@ static int _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu) · 1181 unmodified lines | ||
| 1182 | 1182 | u32 *gpr_map; |
| 1183 | 1183 | mm_segment_t seg; |
| 1184 | 1184 | |
| 1185 | − if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL || | |
| 1186 | − (icode->gpr_map = (u_int32_t __user *) | |
| 1187 | − kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t), | |
| 1188 | − GFP_KERNEL)) == NULL || | |
| 1189 | − (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, | |
| 1190 | − sizeof(*controls), GFP_KERNEL)) == NULL) { | |
| 1191 | − err = -ENOMEM; | |
| 1192 | − goto __err; | |
| 1193 | − } | |
| 1185 | + err = -ENOMEM; | |
| 1186 | + icode = kzalloc(sizeof(*icode), GFP_KERNEL); | |
| 1187 | + if (!icode) | |
| 1188 | + return err; | |
| 1189 | + | |
| 1190 | + icode->gpr_map = (u_int32_t __user *) kcalloc(512 + 256 + 256 + 2 * 1024, | |
| 1191 | + sizeof(u_int32_t), GFP_KERNEL); | |
| 1192 | + if (!icode->gpr_map) | |
| 1193 | + goto __err_gpr; | |
| 1194 | + controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, | |
| 1195 | + sizeof(*controls), GFP_KERNEL); | |
| 1196 | + if (!controls) | |
| 1197 | + goto __err_ctrls; | |
| 1198 | + | |
| 1194 | 1199 | gpr_map = (u32 __force *)icode->gpr_map; |
| 1195 | 1200 | |
| 1196 | 1201 | icode->tram_data_map = icode->gpr_map + 512; |
| @@ -1741,12 +1746,12 @@ A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input)) · 544 unmodified lines | ||
| 1741 | 1746 | emu->support_tlv = 0; /* clear again */ |
| 1742 | 1747 | snd_leave_user(seg); |
| 1743 | 1748 | |
| 1744 | − __err: | |
| 1749 | +__err: | |
| 1745 | 1750 | kfree(controls); |
| 1746 | − if (icode != NULL) { | |
| 1747 | − kfree((void __force *)icode->gpr_map); | |
| 1748 | − kfree(icode); | |
| 1749 | − } | |
| 1751 | +__err_ctrls: | |
| 1752 | + kfree((void __force *)icode->gpr_map); | |
| 1753 | +__err_gpr: | |
| 1754 | + kfree(icode); | |
| 1750 | 1755 | return err; |
| 1751 | 1756 | } |
| 1752 | 1757 | |
| @@ -1813,18 +1818,26 @@ static int _snd_emu10k1_init_efx(struct snd_emu10k1 *emu) · 60 unmodified lines | ||
| 1813 | 1818 | u32 *gpr_map; |
| 1814 | 1819 | mm_segment_t seg; |
| 1815 | 1820 | |
| 1816 | − if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL) | |
| 1817 | − return -ENOMEM; | |
| 1818 | − if ((icode->gpr_map = (u_int32_t __user *) | |
| 1819 | − kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t), | |
| 1820 | − GFP_KERNEL)) == NULL || | |
| 1821 | − (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, | |
| 1822 | − sizeof(struct snd_emu10k1_fx8010_control_gpr), | |
| 1823 | − GFP_KERNEL)) == NULL || | |
| 1824 | − (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) { | |
| 1825 | − err = -ENOMEM; | |
| 1826 | − goto __err; | |
| 1827 | − } | |
| 1821 | + err = -ENOMEM; | |
| 1822 | + icode = kzalloc(sizeof(*icode), GFP_KERNEL); | |
| 1823 | + if (!icode) | |
| 1824 | + return err; | |
| 1825 | + | |
| 1826 | + icode->gpr_map = (u_int32_t __user *) kcalloc(256 + 160 + 160 + 2 * 512, | |
| 1827 | + sizeof(u_int32_t), GFP_KERNEL); | |
| 1828 | + if (!icode->gpr_map) | |
| 1829 | + goto __err_gpr; | |
| 1830 | + | |
| 1831 | + controls = kcalloc(SND_EMU10K1_GPR_CONTROLS, | |
| 1832 | + sizeof(struct snd_emu10k1_fx8010_control_gpr), | |
| 1833 | + GFP_KERNEL); | |
| 1834 | + if (!controls) | |
| 1835 | + goto __err_ctrls; | |
| 1836 | + | |
| 1837 | + ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL); | |
| 1838 | + if (!ipcm) | |
| 1839 | + goto __err_ipcm; | |
| 1840 | + | |
| 1828 | 1841 | gpr_map = (u32 __force *)icode->gpr_map; |
| 1829 | 1842 | |
| 1830 | 1843 | icode->tram_data_map = icode->gpr_map + 256; |
| @@ -2363,13 +2376,14 @@ static int _snd_emu10k1_init_efx(struct snd_emu10k1 *emu) · 532 unmodified lines | ||
| 2363 | 2376 | snd_leave_user(seg); |
| 2364 | 2377 | if (err >= 0) |
| 2365 | 2378 | err = snd_emu10k1_ipcm_poke(emu, ipcm); |
| 2366 | − __err: | |
| 2379 | +__err: | |
| 2367 | 2380 | kfree(ipcm); |
| 2381 | +__err_ipcm: | |
| 2368 | 2382 | kfree(controls); |
| 2369 | − if (icode != NULL) { | |
| 2370 | − kfree((void __force *)icode->gpr_map); | |
| 2371 | − kfree(icode); | |
| 2372 | − } | |
| 2383 | +__err_ctrls: | |
| 2384 | + kfree((void __force *)icode->gpr_map); | |
| 2385 | +__err_gpr: | |
| 2386 | + kfree(icode); | |
| 2373 | 2387 | return err; |
| 2374 | 2388 | } |
| 2375 | 2389 | |
| @@ -638,7 +638,7 @@ static int fill_audio_out_name(struct hda_codec *codec, hda_nid_t nid, · 637 unmodified lines | ||
| 638 | 638 | /* don't add channel suffix for Headphone controls */ |
| 639 | 639 | int idx = get_hp_label_index(codec, nid, cfg->hp_pins, |
| 640 | 640 | cfg->hp_outs); |
| 641 | − if (idx >= 0) | |
| 641 | + if (idx >= 0 && indexp) | |
| 642 | 642 | *indexp = idx; |
| 643 | 643 | sfx = ""; |
| 644 | 644 | } |
| @@ -110,6 +110,7 @@ static int snd_hda_beep_event(struct input_dev *dev, unsigned int type, · 109 unmodified lines | ||
| 110 | 110 | case SND_BELL: |
| 111 | 111 | if (hz) |
| 112 | 112 | hz = 1000; |
| 113 | + /* fallthru */ | |
| 113 | 114 | case SND_TONE: |
| 114 | 115 | if (beep->linear_tone) |
| 115 | 116 | beep->tone = beep_linear_tone(beep, hz); |
| @@ -151,10 +152,8 @@ static int snd_hda_do_attach(struct hda_beep *beep) · 35 unmodified lines | ||
| 151 | 152 | int err; |
| 152 | 153 | |
| 153 | 154 | input_dev = input_allocate_device(); |
| 154 | − if (!input_dev) { | |
| 155 | − printk(KERN_INFO "hda_beep: unable to allocate input device\n"); | |
| 155 | + if (!input_dev) | |
| 156 | 156 | return -ENOMEM; |
| 157 | − } | |
| 158 | 157 | |
| 159 | 158 | /* setup digital beep device */ |
| 160 | 159 | input_dev->name = "HDA Digital PCBeep"; |
| @@ -565,7 +565,7 @@ int snd_hda_get_raw_connections(struct hda_codec *codec, hda_nid_t nid, · 564 unmodified lines | ||
| 565 | 565 | range_val = !!(parm & (1 << (shift-1))); /* ranges */ |
| 566 | 566 | val = parm & mask; |
| 567 | 567 | if (val == 0 && null_count++) { /* no second chance */ |
| 568 | − snd_printk(KERN_WARNING "hda_codec: " | |
| 568 | + snd_printdd("hda_codec: " | |
| 569 | 569 | "invalid CONNECT_LIST verb %x[%i]:%x\n", |
| 570 | 570 | nid, i, parm); |
| 571 | 571 | return 0; |
| @@ -2634,8 +2634,7 @@ static int map_slaves(struct hda_codec *codec, const char * const *slaves, · 2062 unmodified lines | ||
| 2634 | 2634 | items = codec->mixers.list; |
| 2635 | 2635 | for (i = 0; i < codec->mixers.used; i++) { |
| 2636 | 2636 | struct snd_kcontrol *sctl = items[i].kctl; |
| 2637 | − if (!sctl || !sctl->id.name || | |
| 2638 | − sctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER) | |
| 2637 | + if (!sctl || sctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER) | |
| 2639 | 2638 | continue; |
| 2640 | 2639 | for (s = slaves; *s; s++) { |
| 2641 | 2640 | char tmpname[sizeof(sctl->id.name)]; |
| @@ -2662,7 +2661,7 @@ static int check_slave_present(void *data, struct snd_kcontrol *sctl) · 20 unmodified lines | ||
| 2662 | 2661 | } |
| 2663 | 2662 | |
| 2664 | 2663 | /* guess the value corresponding to 0dB */ |
| 2665 | −static int get_kctl_0dB_offset(struct snd_kcontrol *kctl) | |
| 2664 | +static int get_kctl_0dB_offset(struct snd_kcontrol *kctl, int *step_to_check) | |
| 2666 | 2665 | { |
| 2667 | 2666 | int _tlv[4]; |
| 2668 | 2667 | const int *tlv = NULL; |
| @@ -2677,8 +2676,19 @@ static int get_kctl_0dB_offset(struct snd_kcontrol *kctl) · 8 unmodified lines | ||
| 2677 | 2676 | set_fs(fs); |
| 2678 | 2677 | } else if (kctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_TLV_READ) |
| 2679 | 2678 | tlv = kctl->tlv.p; |
| 2680 | − if (tlv && tlv[0] == SNDRV_CTL_TLVT_DB_SCALE) | |
| 2681 | − val = -tlv[2] / tlv[3]; | |
| 2679 | + if (tlv && tlv[0] == SNDRV_CTL_TLVT_DB_SCALE) { | |
| 2680 | + int step = tlv[3]; | |
| 2681 | + step &= ~TLV_DB_SCALE_MUTE; | |
| 2682 | + if (!step) | |
| 2683 | + return -1; | |
| 2684 | + if (*step_to_check && *step_to_check != step) { | |
| 2685 | + snd_printk(KERN_ERR "hda_codec: Mismatching dB step for vmaster slave (%d!=%d)\n", | |
| 2686 | + *step_to_check, step); | |
| 2687 | + return -1; | |
| 2688 | + } | |
| 2689 | + *step_to_check = step; | |
| 2690 | + val = -tlv[2] / step; | |
| 2691 | + } | |
| 2682 | 2692 | return val; |
| 2683 | 2693 | } |
| 2684 | 2694 | |
| @@ -2699,7 +2709,7 @@ static int put_kctl_with_value(struct snd_kcontrol *kctl, int val) · 14 unmodified lines | ||
| 2699 | 2709 | /* initialize the slave volume with 0dB */ |
| 2700 | 2710 | static int init_slave_0dB(void *data, struct snd_kcontrol *slave) |
| 2701 | 2711 | { |
| 2702 | − int offset = get_kctl_0dB_offset(slave); | |
| 2712 | + int offset = get_kctl_0dB_offset(slave, data); | |
| 2703 | 2713 | if (offset > 0) |
| 2704 | 2714 | put_kctl_with_value(slave, offset); |
| 2705 | 2715 | return 0; |
| @@ -2760,9 +2770,11 @@ int __snd_hda_add_vmaster(struct hda_codec *codec, char *name, · 54 unmodified lines | ||
| 2760 | 2770 | |
| 2761 | 2771 | /* init with master mute & zero volume */ |
| 2762 | 2772 | put_kctl_with_value(kctl, 0); |
| 2763 | − if (init_slave_vol) | |
| 2773 | + if (init_slave_vol) { | |
| 2774 | + int step = 0; | |
| 2764 | 2775 | map_slaves(codec, slaves, suffix, |
| 2765 | − tlv ? init_slave_0dB : init_slave_unmute, kctl); | |
| 2776 | + tlv ? init_slave_0dB : init_slave_unmute, &step); | |
| 2777 | + } | |
| 2766 | 2778 | |
| 2767 | 2779 | if (ctl_ret) |
| 2768 | 2780 | *ctl_ret = kctl; |
| @@ -5395,11 +5407,6 @@ int snd_hda_multi_out_analog_prepare(struct hda_codec *codec, · 2626 unmodified lines | ||
| 5395 | 5407 | snd_hda_codec_setup_stream(codec, |
| 5396 | 5408 | mout->hp_out_nid[i], |
| 5397 | 5409 | stream_tag, 0, format); |
| 5398 | − for (i = 0; i < ARRAY_SIZE(mout->extra_out_nid); i++) | |
| 5399 | − if (!mout->no_share_stream && mout->extra_out_nid[i]) | |
| 5400 | − snd_hda_codec_setup_stream(codec, | |
| 5401 | − mout->extra_out_nid[i], | |
| 5402 | − stream_tag, 0, format); | |
| 5403 | 5410 | |
| 5404 | 5411 | /* surrounds */ |
| 5405 | 5412 | for (i = 1; i < mout->num_dacs; i++) { |
| @@ -5410,6 +5417,20 @@ int snd_hda_multi_out_analog_prepare(struct hda_codec *codec, · 4 unmodified lines | ||
| 5410 | 5417 | snd_hda_codec_setup_stream(codec, nids[i], stream_tag, |
| 5411 | 5418 | 0, format); |
| 5412 | 5419 | } |
| 5420 | + | |
| 5421 | + /* extra surrounds */ | |
| 5422 | + for (i = 0; i < ARRAY_SIZE(mout->extra_out_nid); i++) { | |
| 5423 | + int ch = 0; | |
| 5424 | + if (!mout->extra_out_nid[i]) | |
| 5425 | + break; | |
| 5426 | + if (chs >= (i + 1) * 2) | |
| 5427 | + ch = i * 2; | |
| 5428 | + else if (!mout->no_share_stream) | |
| 5429 | + break; | |
| 5430 | + snd_hda_codec_setup_stream(codec, mout->extra_out_nid[i], | |
| 5431 | + stream_tag, ch, format); | |
| 5432 | + } | |
| 5433 | + | |
| 5413 | 5434 | return 0; |
| 5414 | 5435 | } |
| 5415 | 5436 | EXPORT_SYMBOL_HDA(snd_hda_multi_out_analog_prepare); |
| @@ -698,6 +698,7 @@ struct hda_bus { · 697 unmodified lines | ||
| 698 | 698 | unsigned int in_reset:1; /* during reset operation */ |
| 699 | 699 | unsigned int power_keep_link_on:1; /* don't power off HDA link */ |
| 700 | 700 | unsigned int no_response_fallback:1; /* don't fallback at RIRB error */ |
| 701 | + unsigned int avoid_link_reset:1; /* don't reset link at runtime PM */ | |
| 701 | 702 | |
| 702 | 703 | int primary_dig_out_type; /* primary digital out PCM type */ |
| 703 | 704 | }; |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | * Generic routines and proc interface for ELD(EDID Like Data) information |
| 3 | 3 | * |
| 4 | 4 | * Copyright(c) 2008 Intel Corporation. |
| 5 | + * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi> | |
| 5 | 6 | * |
| 6 | 7 | * Authors: |
| 7 | 8 | * Wu Fengguang <wfg@linux.intel.com> |
| @@ -478,10 +479,9 @@ static void hdmi_print_sad_info(int i, struct cea_sad *a, · 470 unmodified lines | ||
| 478 | 479 | snd_iprintf(buffer, "sad%d_profile\t\t%d\n", i, a->profile); |
| 479 | 480 | } |
| 480 | 481 | |
| 481 | −static void hdmi_print_eld_info(struct snd_info_entry *entry, | |
| 482 | − struct snd_info_buffer *buffer) | |
| 482 | +void snd_hdmi_print_eld_info(struct hdmi_eld *eld, | |
| 483 | + struct snd_info_buffer *buffer) | |
| 483 | 484 | { |
| 484 | − struct hdmi_eld *eld = entry->private_data; | |
| 485 | 485 | struct parsed_hdmi_eld *e = &eld->info; |
| 486 | 486 | char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; |
| 487 | 487 | int i; |
| @@ -500,13 +500,10 @@ static void hdmi_print_eld_info(struct snd_info_entry *entry, · 12 unmodified lines | ||
| 500 | 500 | [4 ... 7] = "reserved" |
| 501 | 501 | }; |
| 502 | 502 | |
| 503 | − mutex_lock(&eld->lock); | |
| 504 | 503 | snd_iprintf(buffer, "monitor_present\t\t%d\n", eld->monitor_present); |
| 505 | 504 | snd_iprintf(buffer, "eld_valid\t\t%d\n", eld->eld_valid); |
| 506 | − if (!eld->eld_valid) { | |
| 507 | − mutex_unlock(&eld->lock); | |
| 505 | + if (!eld->eld_valid) | |
| 508 | 506 | return; |
| 509 | − } | |
| 510 | 507 | snd_iprintf(buffer, "monitor_name\t\t%s\n", e->monitor_name); |
| 511 | 508 | snd_iprintf(buffer, "connection_type\t\t%s\n", |
| 512 | 509 | eld_connection_type_names[e->conn_type]); |
| @@ -528,13 +525,11 @@ static void hdmi_print_eld_info(struct snd_info_entry *entry, · 15 unmodified lines | ||
| 528 | 525 | |
| 529 | 526 | for (i = 0; i < e->sad_count; i++) |
| 530 | 527 | hdmi_print_sad_info(i, e->sad + i, buffer); |
| 531 | − mutex_unlock(&eld->lock); | |
| 532 | 528 | } |
| 533 | 529 | |
| 534 | −static void hdmi_write_eld_info(struct snd_info_entry *entry, | |
| 535 | − struct snd_info_buffer *buffer) | |
| 530 | +void snd_hdmi_write_eld_info(struct hdmi_eld *eld, | |
| 531 | + struct snd_info_buffer *buffer) | |
| 536 | 532 | { |
| 537 | − struct hdmi_eld *eld = entry->private_data; | |
| 538 | 533 | struct parsed_hdmi_eld *e = &eld->info; |
| 539 | 534 | char line[64]; |
| 540 | 535 | char name[64]; |
| @@ -542,7 +537,6 @@ static void hdmi_write_eld_info(struct snd_info_entry *entry, · 1 unmodified line | ||
| 542 | 537 | long long val; |
| 543 | 538 | unsigned int n; |
| 544 | 539 | |
| 545 | − mutex_lock(&eld->lock); | |
| 546 | 540 | while (!snd_info_get_line(buffer, line, sizeof(line))) { |
| 547 | 541 | if (sscanf(line, "%s %llx", name, &val) != 2) |
| 548 | 542 | continue; |
| @@ -594,38 +588,7 @@ static void hdmi_write_eld_info(struct snd_info_entry *entry, · 45 unmodified lines | ||
| 594 | 588 | e->sad_count = n + 1; |
| 595 | 589 | } |
| 596 | 590 | } |
| 597 | − mutex_unlock(&eld->lock); | |
| 598 | −} | |
| 599 | − | |
| 600 | − | |
| 601 | −int snd_hda_eld_proc_new(struct hda_codec *codec, struct hdmi_eld *eld, | |
| 602 | − int index) | |
| 603 | −{ | |
| 604 | − char name[32]; | |
| 605 | − struct snd_info_entry *entry; | |
| 606 | − int err; | |
| 607 | − | |
| 608 | − snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index); | |
| 609 | − err = snd_card_proc_new(codec->bus->card, name, &entry); | |
| 610 | − if (err < 0) | |
| 611 | − return err; | |
| 612 | − | |
| 613 | − snd_info_set_text_ops(entry, eld, hdmi_print_eld_info); | |
| 614 | − entry->c.text.write = hdmi_write_eld_info; | |
| 615 | − entry->mode |= S_IWUSR; | |
| 616 | − eld->proc_entry = entry; | |
| 617 | − | |
| 618 | − return 0; | |
| 619 | −} | |
| 620 | − | |
| 621 | −void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld) | |
| 622 | −{ | |
| 623 | − if (!codec->bus->shutdown && eld->proc_entry) { | |
| 624 | − snd_device_free(codec->bus->card, eld->proc_entry); | |
| 625 | − eld->proc_entry = NULL; | |
| 626 | − } | |
| 627 | 591 | } |
| 628 | − | |
| 629 | 592 | #endif /* CONFIG_PROC_FS */ |
| 630 | 593 | |
| 631 | 594 | /* update PCM info based on ELD */ |
| @@ -671,3 +634,153 @@ void snd_hdmi_eld_update_pcm_info(struct parsed_hdmi_eld *e, · 39 unmodified lines | ||
| 671 | 634 | hinfo->maxbps = min(hinfo->maxbps, maxbps); |
| 672 | 635 | hinfo->channels_max = min(hinfo->channels_max, channels_max); |
| 673 | 636 | } |
| 637 | + | |
| 638 | + | |
| 639 | +/* ATI/AMD specific stuff (ELD emulation) */ | |
| 640 | + | |
| 641 | +#define ATI_VERB_SET_AUDIO_DESCRIPTOR 0x776 | |
| 642 | +#define ATI_VERB_SET_SINK_INFO_INDEX 0x780 | |
| 643 | +#define ATI_VERB_GET_SPEAKER_ALLOCATION 0xf70 | |
| 644 | +#define ATI_VERB_GET_AUDIO_DESCRIPTOR 0xf76 | |
| 645 | +#define ATI_VERB_GET_AUDIO_VIDEO_DELAY 0xf7b | |
| 646 | +#define ATI_VERB_GET_SINK_INFO_INDEX 0xf80 | |
| 647 | +#define ATI_VERB_GET_SINK_INFO_DATA 0xf81 | |
| 648 | + | |
| 649 | +#define ATI_SPKALLOC_SPKALLOC 0x007f | |
| 650 | +#define ATI_SPKALLOC_TYPE_HDMI 0x0100 | |
| 651 | +#define ATI_SPKALLOC_TYPE_DISPLAYPORT 0x0200 | |
| 652 | + | |
| 653 | +/* first three bytes are just standard SAD */ | |
| 654 | +#define ATI_AUDIODESC_CHANNELS 0x00000007 | |
| 655 | +#define ATI_AUDIODESC_RATES 0x0000ff00 | |
| 656 | +#define ATI_AUDIODESC_LPCM_STEREO_RATES 0xff000000 | |
| 657 | + | |
| 658 | +/* in standard HDMI VSDB format */ | |
| 659 | +#define ATI_DELAY_VIDEO_LATENCY 0x000000ff | |
| 660 | +#define ATI_DELAY_AUDIO_LATENCY 0x0000ff00 | |
| 661 | + | |
| 662 | +enum ati_sink_info_idx { | |
| 663 | + ATI_INFO_IDX_MANUFACTURER_ID = 0, | |
| 664 | + ATI_INFO_IDX_PRODUCT_ID = 1, | |
| 665 | + ATI_INFO_IDX_SINK_DESC_LEN = 2, | |
| 666 | + ATI_INFO_IDX_PORT_ID_LOW = 3, | |
| 667 | + ATI_INFO_IDX_PORT_ID_HIGH = 4, | |
| 668 | + ATI_INFO_IDX_SINK_DESC_FIRST = 5, | |
| 669 | + ATI_INFO_IDX_SINK_DESC_LAST = 22, /* max len 18 bytes */ | |
| 670 | +}; | |
| 671 | + | |
| 672 | +int snd_hdmi_get_eld_ati(struct hda_codec *codec, hda_nid_t nid, | |
| 673 | + unsigned char *buf, int *eld_size, bool rev3_or_later) | |
| 674 | +{ | |
| 675 | + int spkalloc, ati_sad, aud_synch; | |
| 676 | + int sink_desc_len = 0; | |
| 677 | + int pos, i; | |
| 678 | + | |
| 679 | + /* ATI/AMD does not have ELD, emulate it */ | |
| 680 | + | |
| 681 | + spkalloc = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SPEAKER_ALLOCATION, 0); | |
| 682 | + | |
| 683 | + if (!spkalloc) { | |
| 684 | + snd_printd(KERN_INFO "HDMI ATI/AMD: no speaker allocation for ELD\n"); | |
| 685 | + return -EINVAL; | |
| 686 | + } | |
| 687 | + | |
| 688 | + memset(buf, 0, ELD_FIXED_BYTES + ELD_MAX_MNL + ELD_MAX_SAD * 3); | |
| 689 | + | |
| 690 | + /* version */ | |
| 691 | + buf[0] = ELD_VER_CEA_861D << 3; | |
| 692 | + | |
| 693 | + /* speaker allocation from EDID */ | |
| 694 | + buf[7] = spkalloc & ATI_SPKALLOC_SPKALLOC; | |
| 695 | + | |
| 696 | + /* is DisplayPort? */ | |
| 697 | + if (spkalloc & ATI_SPKALLOC_TYPE_DISPLAYPORT) | |
| 698 | + buf[5] |= 0x04; | |
| 699 | + | |
| 700 | + pos = ELD_FIXED_BYTES; | |
| 701 | + | |
| 702 | + if (rev3_or_later) { | |
| 703 | + int sink_info; | |
| 704 | + | |
| 705 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PORT_ID_LOW); | |
| 706 | + sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 707 | + put_unaligned_le32(sink_info, buf + 8); | |
| 708 | + | |
| 709 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PORT_ID_HIGH); | |
| 710 | + sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 711 | + put_unaligned_le32(sink_info, buf + 12); | |
| 712 | + | |
| 713 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_MANUFACTURER_ID); | |
| 714 | + sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 715 | + put_unaligned_le16(sink_info, buf + 16); | |
| 716 | + | |
| 717 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_PRODUCT_ID); | |
| 718 | + sink_info = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 719 | + put_unaligned_le16(sink_info, buf + 18); | |
| 720 | + | |
| 721 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_SINK_DESC_LEN); | |
| 722 | + sink_desc_len = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 723 | + | |
| 724 | + if (sink_desc_len > ELD_MAX_MNL) { | |
| 725 | + snd_printd(KERN_INFO "HDMI ATI/AMD: Truncating HDMI sink description with length %d\n", | |
| 726 | + sink_desc_len); | |
| 727 | + sink_desc_len = ELD_MAX_MNL; | |
| 728 | + } | |
| 729 | + | |
| 730 | + buf[4] |= sink_desc_len; | |
| 731 | + | |
| 732 | + for (i = 0; i < sink_desc_len; i++) { | |
| 733 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_SINK_INFO_INDEX, ATI_INFO_IDX_SINK_DESC_FIRST + i); | |
| 734 | + buf[pos++] = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_SINK_INFO_DATA, 0); | |
| 735 | + } | |
| 736 | + } | |
| 737 | + | |
| 738 | + for (i = AUDIO_CODING_TYPE_LPCM; i <= AUDIO_CODING_TYPE_WMAPRO; i++) { | |
| 739 | + if (i == AUDIO_CODING_TYPE_SACD || i == AUDIO_CODING_TYPE_DST) | |
| 740 | + continue; /* not handled by ATI/AMD */ | |
| 741 | + | |
| 742 | + snd_hda_codec_write(codec, nid, 0, ATI_VERB_SET_AUDIO_DESCRIPTOR, i << 3); | |
| 743 | + ati_sad = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_AUDIO_DESCRIPTOR, 0); | |
| 744 | + | |
| 745 | + if (ati_sad & ATI_AUDIODESC_RATES) { | |
| 746 | + /* format is supported, copy SAD as-is */ | |
| 747 | + buf[pos++] = (ati_sad & 0x0000ff) >> 0; | |
| 748 | + buf[pos++] = (ati_sad & 0x00ff00) >> 8; | |
| 749 | + buf[pos++] = (ati_sad & 0xff0000) >> 16; | |
| 750 | + } | |
| 751 | + | |
| 752 | + if (i == AUDIO_CODING_TYPE_LPCM | |
| 753 | + && (ati_sad & ATI_AUDIODESC_LPCM_STEREO_RATES) | |
| 754 | + && (ati_sad & ATI_AUDIODESC_LPCM_STEREO_RATES) >> 16 != (ati_sad & ATI_AUDIODESC_RATES)) { | |
| 755 | + /* for PCM there is a separate stereo rate mask */ | |
| 756 | + buf[pos++] = ((ati_sad & 0x000000ff) & ~ATI_AUDIODESC_CHANNELS) | 0x1; | |
| 757 | + /* rates from the extra byte */ | |
| 758 | + buf[pos++] = (ati_sad & 0xff000000) >> 24; | |
| 759 | + buf[pos++] = (ati_sad & 0x00ff0000) >> 16; | |
| 760 | + } | |
| 761 | + } | |
| 762 | + | |
| 763 | + if (pos == ELD_FIXED_BYTES + sink_desc_len) { | |
| 764 | + snd_printd(KERN_INFO "HDMI ATI/AMD: no audio descriptors for ELD\n"); | |
| 765 | + return -EINVAL; | |
| 766 | + } | |
| 767 | + | |
| 768 | + aud_synch = snd_hda_codec_read(codec, nid, 0, ATI_VERB_GET_AUDIO_VIDEO_DELAY, 0); | |
| 769 | + if ((aud_synch & ATI_DELAY_VIDEO_LATENCY) && (aud_synch & ATI_DELAY_AUDIO_LATENCY)) { | |
| 770 | + int video_latency = (aud_synch & ATI_DELAY_VIDEO_LATENCY) - 1; | |
| 771 | + int audio_latency = ((aud_synch & ATI_DELAY_AUDIO_LATENCY) >> 8) - 1; | |
| 772 | + | |
| 773 | + if (video_latency > audio_latency) | |
| 774 | + buf[6] = min(video_latency - audio_latency, 0xfa); | |
| 775 | + } | |
| 776 | + | |
| 777 | + /* Baseline length */ | |
| 778 | + buf[2] = pos - 4; | |
| 779 | + | |
| 780 | + /* SAD count */ | |
| 781 | + buf[5] |= ((pos - ELD_FIXED_BYTES - sink_desc_len) / 3) << 4; | |
| 782 | + | |
| 783 | + *eld_size = pos; | |
| 784 | + | |
| 785 | + return 0; | |
| 786 | +} | |
| @@ -549,11 +549,15 @@ static hda_nid_t look_for_out_mute_nid(struct hda_codec *codec, · 548 unmodified lines | ||
| 549 | 549 | static hda_nid_t look_for_out_vol_nid(struct hda_codec *codec, |
| 550 | 550 | struct nid_path *path) |
| 551 | 551 | { |
| 552 | + struct hda_gen_spec *spec = codec->spec; | |
| 552 | 553 | int i; |
| 553 | 554 | |
| 554 | 555 | for (i = path->depth - 1; i >= 0; i--) { |
| 555 | − if (nid_has_volume(codec, path->path[i], HDA_OUTPUT)) | |
| 556 | − return path->path[i]; | |
| 556 | + hda_nid_t nid = path->path[i]; | |
| 557 | + if ((spec->out_vol_mask >> nid) & 1) | |
| 558 | + continue; | |
| 559 | + if (nid_has_volume(codec, nid, HDA_OUTPUT)) | |
| 560 | + return nid; | |
| 557 | 561 | } |
| 558 | 562 | return 0; |
| 559 | 563 | } |
| @@ -242,6 +242,9 @@ struct hda_gen_spec { · 241 unmodified lines | ||
| 242 | 242 | /* additional mute flags (only effective with auto_mute_via_amp=1) */ |
| 243 | 243 | u64 mute_bits; |
| 244 | 244 | |
| 245 | + /* bitmask for skipping volume controls */ | |
| 246 | + u64 out_vol_mask; | |
| 247 | + | |
| 245 | 248 | /* badness tables for output path evaluations */ |
| 246 | 249 | const struct badness_table *main_out_badness; |
| 247 | 250 | const struct badness_table *extra_out_badness; |
| @@ -169,6 +169,7 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6}," · 168 unmodified lines | ||
| 169 | 169 | "{Intel, PPT}," |
| 170 | 170 | "{Intel, LPT}," |
| 171 | 171 | "{Intel, LPT_LP}," |
| 172 | + "{Intel, WPT_LP}," | |
| 172 | 173 | "{Intel, HPT}," |
| 173 | 174 | "{Intel, PBG}," |
| 174 | 175 | "{Intel, SCH}," |
| @@ -568,6 +569,7 @@ enum { · 393 unmodified lines | ||
| 568 | 569 | AZX_DRIVER_ICH, |
| 569 | 570 | AZX_DRIVER_PCH, |
| 570 | 571 | AZX_DRIVER_SCH, |
| 572 | + AZX_DRIVER_HDMI, | |
| 571 | 573 | AZX_DRIVER_ATI, |
| 572 | 574 | AZX_DRIVER_ATIHDMI, |
| 573 | 575 | AZX_DRIVER_ATIHDMI_NS, |
| @@ -612,6 +614,11 @@ enum { · 38 unmodified lines | ||
| 612 | 614 | #define AZX_DCAPS_INTEL_PCH \ |
| 613 | 615 | (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME) |
| 614 | 616 | |
| 617 | +#define AZX_DCAPS_INTEL_HASWELL \ | |
| 618 | + (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \ | |
| 619 | + AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \ | |
| 620 | + AZX_DCAPS_I915_POWERWELL) | |
| 621 | + | |
| 615 | 622 | /* quirks for ATI SB / AMD Hudson */ |
| 616 | 623 | #define AZX_DCAPS_PRESET_ATI_SB \ |
| 617 | 624 | (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \ |
| @@ -642,6 +649,7 @@ static char *driver_short_names[] = { · 24 unmodified lines | ||
| 642 | 649 | [AZX_DRIVER_ICH] = "HDA Intel", |
| 643 | 650 | [AZX_DRIVER_PCH] = "HDA Intel PCH", |
| 644 | 651 | [AZX_DRIVER_SCH] = "HDA Intel MID", |
| 652 | + [AZX_DRIVER_HDMI] = "HDA Intel HDMI", | |
| 645 | 653 | [AZX_DRIVER_ATI] = "HDA ATI SB", |
| 646 | 654 | [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI", |
| 647 | 655 | [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI", |
| @@ -906,12 +914,12 @@ static void azx_update_rirb(struct azx *chip) · 258 unmodified lines | ||
| 906 | 914 | chip->rirb.res[addr] = res; |
| 907 | 915 | smp_wmb(); |
| 908 | 916 | chip->rirb.cmds[addr]--; |
| 909 | − } else | |
| 910 | − snd_printk(KERN_ERR SFX "%s: spurious response %#x:%#x, " | |
| 911 | − "last cmd=%#08x\n", | |
| 917 | + } else if (printk_ratelimit()) { | |
| 918 | + snd_printk(KERN_ERR SFX "%s: spurious response %#x:%#x, last cmd=%#08x\n", | |
| 912 | 919 | pci_name(chip->pci), |
| 913 | 920 | res, res_ex, |
| 914 | 921 | chip->last_cmd[addr]); |
| 922 | + } | |
| 915 | 923 | } |
| 916 | 924 | } |
| 917 | 925 | |
| @@ -2986,7 +2994,8 @@ static int azx_runtime_suspend(struct device *dev) · 2068 unmodified lines | ||
| 2986 | 2994 | STATESTS_INT_MASK); |
| 2987 | 2995 | |
| 2988 | 2996 | azx_stop_chip(chip); |
| 2989 | − azx_enter_link_reset(chip); | |
| 2997 | + if (!chip->bus->avoid_link_reset) | |
| 2998 | + azx_enter_link_reset(chip); | |
| 2990 | 2999 | azx_clear_irq_pending(chip); |
| 2991 | 3000 | if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) |
| 2992 | 3001 | hda_display_power(false); |
| @@ -3985,16 +3994,16 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { · 992 unmodified lines | ||
| 3985 | 3994 | /* Lynx Point-LP */ |
| 3986 | 3995 | { PCI_DEVICE(0x8086, 0x9c21), |
| 3987 | 3996 | .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, |
| 3997 | + /* Wildcat Point-LP */ | |
| 3998 | + { PCI_DEVICE(0x8086, 0x9ca0), | |
| 3999 | + .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, | |
| 3988 | 4000 | /* Haswell */ |
| 3989 | 4001 | { PCI_DEVICE(0x8086, 0x0a0c), |
| 3990 | − .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH | | |
| 3991 | − AZX_DCAPS_I915_POWERWELL }, | |
| 4002 | + .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | |
| 3992 | 4003 | { PCI_DEVICE(0x8086, 0x0c0c), |
| 3993 | − .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH | | |
| 3994 | − AZX_DCAPS_I915_POWERWELL }, | |
| 4004 | + .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | |
| 3995 | 4005 | { PCI_DEVICE(0x8086, 0x0d0c), |
| 3996 | − .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH | | |
| 3997 | − AZX_DCAPS_I915_POWERWELL }, | |
| 4006 | + .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL }, | |
| 3998 | 4007 | /* 5 Series/3400 */ |
| 3999 | 4008 | { PCI_DEVICE(0x8086, 0x3b56), |
| 4000 | 4009 | .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM }, |
| @@ -4074,6 +4083,22 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { · 73 unmodified lines | ||
| 4074 | 4083 | .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, |
| 4075 | 4084 | { PCI_DEVICE(0x1002, 0xaa48), |
| 4076 | 4085 | .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, |
| 4086 | + { PCI_DEVICE(0x1002, 0xaa50), | |
| 4087 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4088 | + { PCI_DEVICE(0x1002, 0xaa58), | |
| 4089 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4090 | + { PCI_DEVICE(0x1002, 0xaa60), | |
| 4091 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4092 | + { PCI_DEVICE(0x1002, 0xaa68), | |
| 4093 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4094 | + { PCI_DEVICE(0x1002, 0xaa80), | |
| 4095 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4096 | + { PCI_DEVICE(0x1002, 0xaa88), | |
| 4097 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4098 | + { PCI_DEVICE(0x1002, 0xaa90), | |
| 4099 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4100 | + { PCI_DEVICE(0x1002, 0xaa98), | |
| 4101 | + .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI }, | |
| 4077 | 4102 | { PCI_DEVICE(0x1002, 0x9902), |
| 4078 | 4103 | .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI }, |
| 4079 | 4104 | { PCI_DEVICE(0x1002, 0xaaa0), |
| @@ -286,7 +286,7 @@ void snd_hda_jack_report_sync(struct hda_codec *codec) · 285 unmodified lines | ||
| 286 | 286 | jack = codec->jacktbl.list; |
| 287 | 287 | for (i = 0; i < codec->jacktbl.used; i++, jack++) |
| 288 | 288 | if (jack->nid) { |
| 289 | − if (!jack->kctl) | |
| 289 | + if (!jack->kctl || jack->block_report) | |
| 290 | 290 | continue; |
| 291 | 291 | state = get_jack_plug_state(jack->pin_sense); |
| 292 | 292 | snd_kctl_jack_report(codec->bus->card, jack->kctl, state); |
| @@ -28,6 +28,7 @@ struct hda_jack_tbl { · 27 unmodified lines | ||
| 28 | 28 | unsigned int jack_detect:1; /* capable of jack-detection? */ |
| 29 | 29 | unsigned int jack_dirty:1; /* needs to update? */ |
| 30 | 30 | unsigned int phantom_jack:1; /* a fixed, always present port? */ |
| 31 | + unsigned int block_report:1; /* in a transitional state - do not report to userspace */ | |
| 31 | 32 | hda_nid_t gating_jack; /* valid when gating jack plugged */ |
| 32 | 33 | hda_nid_t gated_jack; /* gated is dependent on this jack */ |
| 33 | 34 | struct snd_kcontrol *kctl; /* assigned kctl for jack-detection */ |
| @@ -428,6 +428,7 @@ enum { · 427 unmodified lines | ||
| 428 | 428 | HDA_FIXUP_ACT_PROBE, |
| 429 | 429 | HDA_FIXUP_ACT_INIT, |
| 430 | 430 | HDA_FIXUP_ACT_BUILD, |
| 431 | + HDA_FIXUP_ACT_FREE, | |
| 431 | 432 | }; |
| 432 | 433 | |
| 433 | 434 | int snd_hda_add_verbs(struct hda_codec *codec, const struct hda_verb *list); |
| @@ -751,10 +752,6 @@ struct hdmi_eld { · 317 unmodified lines | ||
| 751 | 752 | int eld_size; |
| 752 | 753 | char eld_buffer[ELD_MAX_SIZE]; |
| 753 | 754 | struct parsed_hdmi_eld info; |
| 754 | − struct mutex lock; | |
| 755 | −#ifdef CONFIG_PROC_FS | |
| 756 | − struct snd_info_entry *proc_entry; | |
| 757 | −#endif | |
| 758 | 755 | }; |
| 759 | 756 | |
| 760 | 757 | int snd_hdmi_get_eld_size(struct hda_codec *codec, hda_nid_t nid); |
| @@ -766,21 +763,15 @@ void snd_hdmi_show_eld(struct parsed_hdmi_eld *e); · 5 unmodified lines | ||
| 766 | 763 | void snd_hdmi_eld_update_pcm_info(struct parsed_hdmi_eld *e, |
| 767 | 764 | struct hda_pcm_stream *hinfo); |
| 768 | 765 | |
| 766 | +int snd_hdmi_get_eld_ati(struct hda_codec *codec, hda_nid_t nid, | |
| 767 | + unsigned char *buf, int *eld_size, | |
| 768 | + bool rev3_or_later); | |
| 769 | + | |
| 769 | 770 | #ifdef CONFIG_PROC_FS |
| 770 | −int snd_hda_eld_proc_new(struct hda_codec *codec, struct hdmi_eld *eld, | |
| 771 | − int index); | |
| 772 | −void snd_hda_eld_proc_free(struct hda_codec *codec, struct hdmi_eld *eld); | |
| 773 | −#else | |
| 774 | −static inline int snd_hda_eld_proc_new(struct hda_codec *codec, | |
| 775 | − struct hdmi_eld *eld, | |
| 776 | − int index) | |
| 777 | −{ | |
| 778 | − return 0; | |
| 779 | −} | |
| 780 | −static inline void snd_hda_eld_proc_free(struct hda_codec *codec, | |
| 781 | − struct hdmi_eld *eld) | |
| 782 | −{ | |
| 783 | −} | |
| 771 | +void snd_hdmi_print_eld_info(struct hdmi_eld *eld, | |
| 772 | + struct snd_info_buffer *buffer); | |
| 773 | +void snd_hdmi_write_eld_info(struct hdmi_eld *eld, | |
| 774 | + struct snd_info_buffer *buffer); | |
| 784 | 775 | #endif |
| 785 | 776 | |
| 786 | 777 | #define SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE 80 |
| @@ -973,8 +973,11 @@ static void ad1884_fixup_thinkpad(struct hda_codec *codec, · 972 unmodified lines | ||
| 973 | 973 | { |
| 974 | 974 | struct ad198x_spec *spec = codec->spec; |
| 975 | 975 | |
| 976 | − if (action == HDA_FIXUP_ACT_PRE_PROBE) | |
| 976 | + if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
| 977 | 977 | spec->gen.keep_eapd_on = 1; |
| 978 | + spec->gen.vmaster_mute.hook = ad_vmaster_eapd_hook; | |
| 979 | + spec->eapd_nid = 0x12; | |
| 980 | + } | |
| 978 | 981 | } |
| 979 | 982 | |
| 980 | 983 | /* set magic COEFs for dmic */ |
| @@ -759,7 +759,7 @@ struct ca0132_spec { · 758 unmodified lines | ||
| 759 | 759 | /* |
| 760 | 760 | * CA0132 codec access |
| 761 | 761 | */ |
| 762 | −unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, | |
| 762 | +static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, | |
| 763 | 763 | unsigned int verb, unsigned int parm, unsigned int *res) |
| 764 | 764 | { |
| 765 | 765 | unsigned int response; |
| @@ -597,6 +597,7 @@ static int patch_cs420x(struct hda_codec *codec) · 596 unmodified lines | ||
| 597 | 597 | * Its layout is no longer compatible with CS4206/CS4207 |
| 598 | 598 | */ |
| 599 | 599 | enum { |
| 600 | + CS4208_MAC_AUTO, | |
| 600 | 601 | CS4208_MBA6, |
| 601 | 602 | CS4208_GPIO0, |
| 602 | 603 | }; |
| @@ -608,7 +609,12 @@ static const struct hda_model_fixup cs4208_models[] = { · 5 unmodified lines | ||
| 608 | 609 | }; |
| 609 | 610 | |
| 610 | 611 | static const struct snd_pci_quirk cs4208_fixup_tbl[] = { |
| 611 | − /* codec SSID */ | |
| 612 | + SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO), | |
| 613 | + {} /* terminator */ | |
| 614 | +}; | |
| 615 | + | |
| 616 | +/* codec SSID matching */ | |
| 617 | +static const struct snd_pci_quirk cs4208_mac_fixup_tbl[] = { | |
| 612 | 618 | SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6), |
| 613 | 619 | SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6), |
| 614 | 620 | {} /* terminator */ |
| @@ -626,6 +632,20 @@ static void cs4208_fixup_gpio0(struct hda_codec *codec, · 11 unmodified lines | ||
| 626 | 632 | } |
| 627 | 633 | } |
| 628 | 634 | |
| 635 | +static const struct hda_fixup cs4208_fixups[]; | |
| 636 | + | |
| 637 | +/* remap the fixup from codec SSID and apply it */ | |
| 638 | +static void cs4208_fixup_mac(struct hda_codec *codec, | |
| 639 | + const struct hda_fixup *fix, int action) | |
| 640 | +{ | |
| 641 | + if (action != HDA_FIXUP_ACT_PRE_PROBE) | |
| 642 | + return; | |
| 643 | + snd_hda_pick_fixup(codec, NULL, cs4208_mac_fixup_tbl, cs4208_fixups); | |
| 644 | + if (codec->fixup_id < 0 || codec->fixup_id == CS4208_MAC_AUTO) | |
| 645 | + codec->fixup_id = CS4208_GPIO0; /* default fixup */ | |
| 646 | + snd_hda_apply_fixup(codec, action); | |
| 647 | +} | |
| 648 | + | |
| 629 | 649 | static const struct hda_fixup cs4208_fixups[] = { |
| 630 | 650 | [CS4208_MBA6] = { |
| 631 | 651 | .type = HDA_FIXUP_PINS, |
| @@ -637,6 +657,10 @@ static const struct hda_fixup cs4208_fixups[] = { · 5 unmodified lines | ||
| 637 | 657 | .type = HDA_FIXUP_FUNC, |
| 638 | 658 | .v.func = cs4208_fixup_gpio0, |
| 639 | 659 | }, |
| 660 | + [CS4208_MAC_AUTO] = { | |
| 661 | + .type = HDA_FIXUP_FUNC, | |
| 662 | + .v.func = cs4208_fixup_mac, | |
| 663 | + }, | |
| 640 | 664 | }; |
| 641 | 665 | |
| 642 | 666 | /* correct the 0dB offset of input pins */ |
| @@ -660,6 +684,8 @@ static int patch_cs4208(struct hda_codec *codec) · 17 unmodified lines | ||
| 660 | 684 | return -ENOMEM; |
| 661 | 685 | |
| 662 | 686 | spec->gen.automute_hook = cs_automute; |
| 687 | + /* exclude NID 0x10 (HP) from output volumes due to different steps */ | |
| 688 | + spec->gen.out_vol_mask = 1ULL << 0x10; | |
| 663 | 689 | |
| 664 | 690 | snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl, |
| 665 | 691 | cs4208_fixups); |
| @@ -3208,11 +3208,17 @@ static int cx_auto_init(struct hda_codec *codec) · 3207 unmodified lines | ||
| 3208 | 3208 | return 0; |
| 3209 | 3209 | } |
| 3210 | 3210 | |
| 3211 | +static void cx_auto_free(struct hda_codec *codec) | |
| 3212 | +{ | |
| 3213 | + snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_FREE); | |
| 3214 | + snd_hda_gen_free(codec); | |
| 3215 | +} | |
| 3216 | + | |
| 3211 | 3217 | static const struct hda_codec_ops cx_auto_patch_ops = { |
| 3212 | 3218 | .build_controls = cx_auto_build_controls, |
| 3213 | 3219 | .build_pcms = snd_hda_gen_build_pcms, |
| 3214 | 3220 | .init = cx_auto_init, |
| 3215 | − .free = snd_hda_gen_free, | |
| 3221 | + .free = cx_auto_free, | |
| 3216 | 3222 | .unsol_event = snd_hda_jack_unsol_event, |
| 3217 | 3223 | #ifdef CONFIG_PM |
| 3218 | 3224 | .check_power_status = snd_hda_gen_check_power_status, |
| @@ -3232,8 +3238,84 @@ enum { · 13 unmodified lines | ||
| 3232 | 3238 | CXT_FIXUP_HEADPHONE_MIC_PIN, |
| 3233 | 3239 | CXT_FIXUP_HEADPHONE_MIC, |
| 3234 | 3240 | CXT_FIXUP_GPIO1, |
| 3241 | + CXT_FIXUP_THINKPAD_ACPI, | |
| 3235 | 3242 | }; |
| 3236 | 3243 | |
| 3244 | +#if IS_ENABLED(CONFIG_THINKPAD_ACPI) | |
| 3245 | + | |
| 3246 | +#include <linux/thinkpad_acpi.h> | |
| 3247 | + | |
| 3248 | +static int (*led_set_func)(int, bool); | |
| 3249 | + | |
| 3250 | +static void update_tpacpi_mute_led(void *private_data, int enabled) | |
| 3251 | +{ | |
| 3252 | + struct hda_codec *codec = private_data; | |
| 3253 | + struct conexant_spec *spec = codec->spec; | |
| 3254 | + | |
| 3255 | + if (spec->dynamic_eapd) | |
| 3256 | + cx_auto_vmaster_hook(private_data, enabled); | |
| 3257 | + | |
| 3258 | + if (led_set_func) | |
| 3259 | + led_set_func(TPACPI_LED_MUTE, !enabled); | |
| 3260 | +} | |
| 3261 | + | |
| 3262 | +static void update_tpacpi_micmute_led(struct hda_codec *codec, | |
| 3263 | + struct snd_ctl_elem_value *ucontrol) | |
| 3264 | +{ | |
| 3265 | + if (!ucontrol || !led_set_func) | |
| 3266 | + return; | |
| 3267 | + if (strcmp("Capture Switch", ucontrol->id.name) == 0 && ucontrol->id.index == 0) { | |
| 3268 | + /* TODO: How do I verify if it's a mono or stereo here? */ | |
| 3269 | + bool val = ucontrol->value.integer.value[0] || ucontrol->value.integer.value[1]; | |
| 3270 | + led_set_func(TPACPI_LED_MICMUTE, !val); | |
| 3271 | + } | |
| 3272 | +} | |
| 3273 | + | |
| 3274 | +static void cxt_fixup_thinkpad_acpi(struct hda_codec *codec, | |
| 3275 | + const struct hda_fixup *fix, int action) | |
| 3276 | +{ | |
| 3277 | + struct conexant_spec *spec = codec->spec; | |
| 3278 | + | |
| 3279 | + bool removefunc = false; | |
| 3280 | + | |
| 3281 | + if (action == HDA_FIXUP_ACT_PROBE) { | |
| 3282 | + if (!led_set_func) | |
| 3283 | + led_set_func = symbol_request(tpacpi_led_set); | |
| 3284 | + if (!led_set_func) { | |
| 3285 | + snd_printk(KERN_WARNING "Failed to find thinkpad-acpi symbol tpacpi_led_set\n"); | |
| 3286 | + return; | |
| 3287 | + } | |
| 3288 | + | |
| 3289 | + removefunc = true; | |
| 3290 | + if (led_set_func(TPACPI_LED_MUTE, false) >= 0) { | |
| 3291 | + spec->gen.vmaster_mute.hook = update_tpacpi_mute_led; | |
| 3292 | + removefunc = false; | |
| 3293 | + } | |
| 3294 | + if (led_set_func(TPACPI_LED_MICMUTE, false) >= 0) { | |
| 3295 | + if (spec->gen.num_adc_nids > 1) | |
| 3296 | + snd_printdd("Skipping micmute LED control due to several ADCs"); | |
| 3297 | + else { | |
| 3298 | + spec->gen.cap_sync_hook = update_tpacpi_micmute_led; | |
| 3299 | + removefunc = false; | |
| 3300 | + } | |
| 3301 | + } | |
| 3302 | + } | |
| 3303 | + | |
| 3304 | + if (led_set_func && (action == HDA_FIXUP_ACT_FREE || removefunc)) { | |
| 3305 | + symbol_put(tpacpi_led_set); | |
| 3306 | + led_set_func = NULL; | |
| 3307 | + } | |
| 3308 | +} | |
| 3309 | + | |
| 3310 | +#else | |
| 3311 | + | |
| 3312 | +static void cxt_fixup_thinkpad_acpi(struct hda_codec *codec, | |
| 3313 | + const struct hda_fixup *fix, int action) | |
| 3314 | +{ | |
| 3315 | +} | |
| 3316 | + | |
| 3317 | +#endif | |
| 3318 | + | |
| 3237 | 3319 | static void cxt_fixup_stereo_dmic(struct hda_codec *codec, |
| 3238 | 3320 | const struct hda_fixup *fix, int action) |
| 3239 | 3321 | { |
| @@ -3344,6 +3426,8 @@ static const struct hda_fixup cxt_fixups[] = { · 104 unmodified lines | ||
| 3344 | 3426 | [CXT_PINCFG_LENOVO_TP410] = { |
| 3345 | 3427 | .type = HDA_FIXUP_PINS, |
| 3346 | 3428 | .v.pins = cxt_pincfg_lenovo_tp410, |
| 3429 | + .chained = true, | |
| 3430 | + .chain_id = CXT_FIXUP_THINKPAD_ACPI, | |
| 3347 | 3431 | }, |
| 3348 | 3432 | [CXT_PINCFG_LEMOTE_A1004] = { |
| 3349 | 3433 | .type = HDA_FIXUP_PINS, |
| @@ -3385,6 +3469,10 @@ static const struct hda_fixup cxt_fixups[] = { · 35 unmodified lines | ||
| 3385 | 3469 | { } |
| 3386 | 3470 | }, |
| 3387 | 3471 | }, |
| 3472 | + [CXT_FIXUP_THINKPAD_ACPI] = { | |
| 3473 | + .type = HDA_FIXUP_FUNC, | |
| 3474 | + .v.func = cxt_fixup_thinkpad_acpi, | |
| 3475 | + }, | |
| 3388 | 3476 | }; |
| 3389 | 3477 | |
| 3390 | 3478 | static const struct snd_pci_quirk cxt5051_fixups[] = { |
| @@ -3507,7 +3595,7 @@ static int patch_conexant_auto(struct hda_codec *codec) · 116 unmodified lines | ||
| 3507 | 3595 | return 0; |
| 3508 | 3596 | |
| 3509 | 3597 | error: |
| 3510 | − snd_hda_gen_free(codec); | |
| 3598 | + cx_auto_free(codec); | |
| 3511 | 3599 | return err; |
| 3512 | 3600 | } |
| 3513 | 3601 | |
| @@ -3568,6 +3656,8 @@ static const struct hda_codec_preset snd_hda_preset_conexant[] = { · 54 unmodified lines | ||
| 3568 | 3656 | .patch = patch_conexant_auto }, |
| 3569 | 3657 | { .id = 0x14f15115, .name = "CX20757", |
| 3570 | 3658 | .patch = patch_conexant_auto }, |
| 3659 | + { .id = 0x14f151d7, .name = "CX20952", | |
| 3660 | + .patch = patch_conexant_auto }, | |
| 3571 | 3661 | {} /* terminator */ |
| 3572 | 3662 | }; |
| 3573 | 3663 | |
| @@ -3594,6 +3684,7 @@ MODULE_ALIAS("snd-hda-codec-id:14f15111"); · 20 unmodified lines | ||
| 3594 | 3684 | MODULE_ALIAS("snd-hda-codec-id:14f15113"); |
| 3595 | 3685 | MODULE_ALIAS("snd-hda-codec-id:14f15114"); |
| 3596 | 3686 | MODULE_ALIAS("snd-hda-codec-id:14f15115"); |
| 3687 | +MODULE_ALIAS("snd-hda-codec-id:14f151d7"); | |
| 3597 | 3688 | |
| 3598 | 3689 | MODULE_LICENSE("GPL"); |
| 3599 | 3690 | MODULE_DESCRIPTION("Conexant HD-audio codec"); |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | * Copyright (c) 2006 ATI Technologies Inc. |
| 7 | 7 | * Copyright (c) 2008 NVIDIA Corp. All rights reserved. |
| 8 | 8 | * Copyright (c) 2008 Wei Ni <wni@nvidia.com> |
| 9 | + * Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi> | |
| 9 | 10 | * |
| 10 | 11 | * Authors: |
| 11 | 12 | * Wu Fengguang <wfg@linux.intel.com> |
| @@ -45,6 +46,7 @@ module_param(static_hdmi_pcm, bool, 0644); · 33 unmodified lines | ||
| 45 | 46 | MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); |
| 46 | 47 | |
| 47 | 48 | #define is_haswell(codec) ((codec)->vendor_id == 0x80862807) |
| 49 | +#define is_valleyview(codec) ((codec)->vendor_id == 0x80862882) | |
| 48 | 50 | |
| 49 | 51 | struct hdmi_spec_per_cvt { |
| 50 | 52 | hda_nid_t cvt_nid; |
| @@ -63,9 +65,11 @@ struct hdmi_spec_per_pin { · 12 unmodified lines | ||
| 63 | 65 | hda_nid_t pin_nid; |
| 64 | 66 | int num_mux_nids; |
| 65 | 67 | hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; |
| 68 | + hda_nid_t cvt_nid; | |
| 66 | 69 | |
| 67 | 70 | struct hda_codec *codec; |
| 68 | 71 | struct hdmi_eld sink_eld; |
| 72 | + struct mutex lock; | |
| 69 | 73 | struct delayed_work work; |
| 70 | 74 | struct snd_kcontrol *eld_ctl; |
| 71 | 75 | int repoll_count; |
| @@ -75,6 +79,42 @@ struct hdmi_spec_per_pin { · 3 unmodified lines | ||
| 75 | 79 | bool chmap_set; /* channel-map override by ALSA API? */ |
| 76 | 80 | unsigned char chmap[8]; /* ALSA API channel-map */ |
| 77 | 81 | char pcm_name[8]; /* filled in build_pcm callbacks */ |
| 82 | +#ifdef CONFIG_PROC_FS | |
| 83 | + struct snd_info_entry *proc_entry; | |
| 84 | +#endif | |
| 85 | +}; | |
| 86 | + | |
| 87 | +struct cea_channel_speaker_allocation; | |
| 88 | + | |
| 89 | +/* operations used by generic code that can be overridden by patches */ | |
| 90 | +struct hdmi_ops { | |
| 91 | + int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 92 | + unsigned char *buf, int *eld_size); | |
| 93 | + | |
| 94 | + /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */ | |
| 95 | + int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 96 | + int asp_slot); | |
| 97 | + int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 98 | + int asp_slot, int channel); | |
| 99 | + | |
| 100 | + void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 101 | + int ca, int active_channels, int conn_type); | |
| 102 | + | |
| 103 | + /* enable/disable HBR (HD passthrough) */ | |
| 104 | + int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr); | |
| 105 | + | |
| 106 | + int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid, | |
| 107 | + hda_nid_t pin_nid, u32 stream_tag, int format); | |
| 108 | + | |
| 109 | + /* Helpers for producing the channel map TLVs. These can be overridden | |
| 110 | + * for devices that have non-standard mapping requirements. */ | |
| 111 | + int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap, | |
| 112 | + int channels); | |
| 113 | + void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap, | |
| 114 | + unsigned int *chmap, int channels); | |
| 115 | + | |
| 116 | + /* check that the user-given chmap is supported */ | |
| 117 | + int (*chmap_validate)(int ca, int channels, unsigned char *chmap); | |
| 78 | 118 | }; |
| 79 | 119 | |
| 80 | 120 | struct hdmi_spec { |
| @@ -88,8 +128,9 @@ struct hdmi_spec { · 7 unmodified lines | ||
| 88 | 128 | unsigned int channels_max; /* max over all cvts */ |
| 89 | 129 | |
| 90 | 130 | struct hdmi_eld temp_eld; |
| 131 | + struct hdmi_ops ops; | |
| 91 | 132 | /* |
| 92 | − * Non-generic ATI/NVIDIA specific | |
| 133 | + * Non-generic VIA/NVIDIA specific | |
| 93 | 134 | */ |
| 94 | 135 | struct hda_multi_out multiout; |
| 95 | 136 | struct hda_pcm_stream pcm_playback; |
| @@ -348,17 +389,19 @@ static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, · 252 unmodified lines | ||
| 348 | 389 | { |
| 349 | 390 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); |
| 350 | 391 | struct hdmi_spec *spec = codec->spec; |
| 392 | + struct hdmi_spec_per_pin *per_pin; | |
| 351 | 393 | struct hdmi_eld *eld; |
| 352 | 394 | int pin_idx; |
| 353 | 395 | |
| 354 | 396 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; |
| 355 | 397 | |
| 356 | 398 | pin_idx = kcontrol->private_value; |
| 357 | − eld = &get_pin(spec, pin_idx)->sink_eld; | |
| 399 | + per_pin = get_pin(spec, pin_idx); | |
| 400 | + eld = &per_pin->sink_eld; | |
| 358 | 401 | |
| 359 | − mutex_lock(&eld->lock); | |
| 402 | + mutex_lock(&per_pin->lock); | |
| 360 | 403 | uinfo->count = eld->eld_valid ? eld->eld_size : 0; |
| 361 | − mutex_unlock(&eld->lock); | |
| 404 | + mutex_unlock(&per_pin->lock); | |
| 362 | 405 | |
| 363 | 406 | return 0; |
| 364 | 407 | } |
| @@ -368,15 +411,17 @@ static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, · 3 unmodified lines | ||
| 368 | 411 | { |
| 369 | 412 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); |
| 370 | 413 | struct hdmi_spec *spec = codec->spec; |
| 414 | + struct hdmi_spec_per_pin *per_pin; | |
| 371 | 415 | struct hdmi_eld *eld; |
| 372 | 416 | int pin_idx; |
| 373 | 417 | |
| 374 | 418 | pin_idx = kcontrol->private_value; |
| 375 | − eld = &get_pin(spec, pin_idx)->sink_eld; | |
| 419 | + per_pin = get_pin(spec, pin_idx); | |
| 420 | + eld = &per_pin->sink_eld; | |
| 376 | 421 | |
| 377 | − mutex_lock(&eld->lock); | |
| 422 | + mutex_lock(&per_pin->lock); | |
| 378 | 423 | if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) { |
| 379 | − mutex_unlock(&eld->lock); | |
| 424 | + mutex_unlock(&per_pin->lock); | |
| 380 | 425 | snd_BUG(); |
| 381 | 426 | return -EINVAL; |
| 382 | 427 | } |
| @@ -386,7 +431,7 @@ static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, · 3 unmodified lines | ||
| 386 | 431 | if (eld->eld_valid) |
| 387 | 432 | memcpy(ucontrol->value.bytes.data, eld->eld_buffer, |
| 388 | 433 | eld->eld_size); |
| 389 | − mutex_unlock(&eld->lock); | |
| 434 | + mutex_unlock(&per_pin->lock); | |
| 390 | 435 | |
| 391 | 436 | return 0; |
| 392 | 437 | } |
| @@ -477,6 +522,68 @@ static void hdmi_set_channel_count(struct hda_codec *codec, · 84 unmodified lines | ||
| 477 | 522 | AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); |
| 478 | 523 | } |
| 479 | 524 | |
| 525 | +/* | |
| 526 | + * ELD proc files | |
| 527 | + */ | |
| 528 | + | |
| 529 | +#ifdef CONFIG_PROC_FS | |
| 530 | +static void print_eld_info(struct snd_info_entry *entry, | |
| 531 | + struct snd_info_buffer *buffer) | |
| 532 | +{ | |
| 533 | + struct hdmi_spec_per_pin *per_pin = entry->private_data; | |
| 534 | + | |
| 535 | + mutex_lock(&per_pin->lock); | |
| 536 | + snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer); | |
| 537 | + mutex_unlock(&per_pin->lock); | |
| 538 | +} | |
| 539 | + | |
| 540 | +static void write_eld_info(struct snd_info_entry *entry, | |
| 541 | + struct snd_info_buffer *buffer) | |
| 542 | +{ | |
| 543 | + struct hdmi_spec_per_pin *per_pin = entry->private_data; | |
| 544 | + | |
| 545 | + mutex_lock(&per_pin->lock); | |
| 546 | + snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer); | |
| 547 | + mutex_unlock(&per_pin->lock); | |
| 548 | +} | |
| 549 | + | |
| 550 | +static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index) | |
| 551 | +{ | |
| 552 | + char name[32]; | |
| 553 | + struct hda_codec *codec = per_pin->codec; | |
| 554 | + struct snd_info_entry *entry; | |
| 555 | + int err; | |
| 556 | + | |
| 557 | + snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index); | |
| 558 | + err = snd_card_proc_new(codec->bus->card, name, &entry); | |
| 559 | + if (err < 0) | |
| 560 | + return err; | |
| 561 | + | |
| 562 | + snd_info_set_text_ops(entry, per_pin, print_eld_info); | |
| 563 | + entry->c.text.write = write_eld_info; | |
| 564 | + entry->mode |= S_IWUSR; | |
| 565 | + per_pin->proc_entry = entry; | |
| 566 | + | |
| 567 | + return 0; | |
| 568 | +} | |
| 569 | + | |
| 570 | +static void eld_proc_free(struct hdmi_spec_per_pin *per_pin) | |
| 571 | +{ | |
| 572 | + if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) { | |
| 573 | + snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry); | |
| 574 | + per_pin->proc_entry = NULL; | |
| 575 | + } | |
| 576 | +} | |
| 577 | +#else | |
| 578 | +static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin, | |
| 579 | + int index) | |
| 580 | +{ | |
| 581 | + return 0; | |
| 582 | +} | |
| 583 | +static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin) | |
| 584 | +{ | |
| 585 | +} | |
| 586 | +#endif | |
| 480 | 587 | |
| 481 | 588 | /* |
| 482 | 589 | * Channel mapping routines |
| @@ -577,74 +684,91 @@ static void hdmi_debug_channel_mapping(struct hda_codec *codec, · 94 unmodified lines | ||
| 577 | 684 | hda_nid_t pin_nid) |
| 578 | 685 | { |
| 579 | 686 | #ifdef CONFIG_SND_DEBUG_VERBOSE |
| 687 | + struct hdmi_spec *spec = codec->spec; | |
| 580 | 688 | int i; |
| 581 | − int slot; | |
| 689 | + int channel; | |
| 582 | 690 | |
| 583 | 691 | for (i = 0; i < 8; i++) { |
| 584 | − slot = snd_hda_codec_read(codec, pin_nid, 0, | |
| 585 | − AC_VERB_GET_HDMI_CHAN_SLOT, i); | |
| 692 | + channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i); | |
| 586 | 693 | printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", |
| 587 | − slot >> 4, slot & 0xf); | |
| 694 | + channel, i); | |
| 588 | 695 | } |
| 589 | 696 | #endif |
| 590 | 697 | } |
| 591 | 698 | |
| 592 | − | |
| 593 | 699 | static void hdmi_std_setup_channel_mapping(struct hda_codec *codec, |
| 594 | 700 | hda_nid_t pin_nid, |
| 595 | 701 | bool non_pcm, |
| 596 | 702 | int ca) |
| 597 | 703 | { |
| 704 | + struct hdmi_spec *spec = codec->spec; | |
| 705 | + struct cea_channel_speaker_allocation *ch_alloc; | |
| 598 | 706 | int i; |
| 599 | 707 | int err; |
| 600 | 708 | int order; |
| 601 | 709 | int non_pcm_mapping[8]; |
| 602 | 710 | |
| 603 | 711 | order = get_channel_allocation_order(ca); |
| 712 | + ch_alloc = &channel_allocations[order]; | |
| 604 | 713 | |
| 605 | 714 | if (hdmi_channel_mapping[ca][1] == 0) { |
| 606 | − for (i = 0; i < channel_allocations[order].channels; i++) | |
| 607 | − hdmi_channel_mapping[ca][i] = i | (i << 4); | |
| 608 | − for (; i < 8; i++) | |
| 609 | − hdmi_channel_mapping[ca][i] = 0xf | (i << 4); | |
| 715 | + int hdmi_slot = 0; | |
| 716 | + /* fill actual channel mappings in ALSA channel (i) order */ | |
| 717 | + for (i = 0; i < ch_alloc->channels; i++) { | |
| 718 | + while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8)) | |
| 719 | + hdmi_slot++; /* skip zero slots */ | |
| 720 | + | |
| 721 | + hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++; | |
| 722 | + } | |
| 723 | + /* fill the rest of the slots with ALSA channel 0xf */ | |
| 724 | + for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) | |
| 725 | + if (!ch_alloc->speakers[7 - hdmi_slot]) | |
| 726 | + hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot; | |
| 610 | 727 | } |
| 611 | 728 | |
| 612 | 729 | if (non_pcm) { |
| 613 | − for (i = 0; i < channel_allocations[order].channels; i++) | |
| 614 | − non_pcm_mapping[i] = i | (i << 4); | |
| 730 | + for (i = 0; i < ch_alloc->channels; i++) | |
| 731 | + non_pcm_mapping[i] = (i << 4) | i; | |
| 615 | 732 | for (; i < 8; i++) |
| 616 | − non_pcm_mapping[i] = 0xf | (i << 4); | |
| 733 | + non_pcm_mapping[i] = (0xf << 4) | i; | |
| 617 | 734 | } |
| 618 | 735 | |
| 619 | 736 | for (i = 0; i < 8; i++) { |
| 620 | − err = snd_hda_codec_write(codec, pin_nid, 0, | |
| 621 | − AC_VERB_SET_HDMI_CHAN_SLOT, | |
| 622 | − non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]); | |
| 737 | + int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]; | |
| 738 | + int hdmi_slot = slotsetup & 0x0f; | |
| 739 | + int channel = (slotsetup & 0xf0) >> 4; | |
| 740 | + err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel); | |
| 623 | 741 | if (err) { |
| 624 | 742 | snd_printdd(KERN_NOTICE |
| 625 | 743 | "HDMI: channel mapping failed\n"); |
| 626 | 744 | break; |
| 627 | 745 | } |
| 628 | 746 | } |
| 629 | − | |
| 630 | − hdmi_debug_channel_mapping(codec, pin_nid); | |
| 631 | 747 | } |
| 632 | 748 | |
| 633 | 749 | struct channel_map_table { |
| 634 | 750 | unsigned char map; /* ALSA API channel map position */ |
| 635 | − unsigned char cea_slot; /* CEA slot value */ | |
| 636 | 751 | int spk_mask; /* speaker position bit mask */ |
| 637 | 752 | }; |
| 638 | 753 | |
| 639 | 754 | static struct channel_map_table map_tables[] = { |
| 640 | − { SNDRV_CHMAP_FL, 0x00, FL }, | |
| 641 | − { SNDRV_CHMAP_FR, 0x01, FR }, | |
| 642 | − { SNDRV_CHMAP_RL, 0x04, RL }, | |
| 643 | − { SNDRV_CHMAP_RR, 0x05, RR }, | |
| 644 | − { SNDRV_CHMAP_LFE, 0x02, LFE }, | |
| 645 | − { SNDRV_CHMAP_FC, 0x03, FC }, | |
| 646 | − { SNDRV_CHMAP_RLC, 0x06, RLC }, | |
| 647 | − { SNDRV_CHMAP_RRC, 0x07, RRC }, | |
| 755 | + { SNDRV_CHMAP_FL, FL }, | |
| 756 | + { SNDRV_CHMAP_FR, FR }, | |
| 757 | + { SNDRV_CHMAP_RL, RL }, | |
| 758 | + { SNDRV_CHMAP_RR, RR }, | |
| 759 | + { SNDRV_CHMAP_LFE, LFE }, | |
| 760 | + { SNDRV_CHMAP_FC, FC }, | |
| 761 | + { SNDRV_CHMAP_RLC, RLC }, | |
| 762 | + { SNDRV_CHMAP_RRC, RRC }, | |
| 763 | + { SNDRV_CHMAP_RC, RC }, | |
| 764 | + { SNDRV_CHMAP_FLC, FLC }, | |
| 765 | + { SNDRV_CHMAP_FRC, FRC }, | |
| 766 | + { SNDRV_CHMAP_FLH, FLH }, | |
| 767 | + { SNDRV_CHMAP_FRH, FRH }, | |
| 768 | + { SNDRV_CHMAP_FLW, FLW }, | |
| 769 | + { SNDRV_CHMAP_FRW, FRW }, | |
| 770 | + { SNDRV_CHMAP_TC, TC }, | |
| 771 | + { SNDRV_CHMAP_FCH, FCH }, | |
| 648 | 772 | {} /* terminator */ |
| 649 | 773 | }; |
| 650 | 774 | |
| @@ -660,25 +784,19 @@ static int to_spk_mask(unsigned char c) · 9 unmodified lines | ||
| 660 | 784 | } |
| 661 | 785 | |
| 662 | 786 | /* from ALSA API channel position to CEA slot */ |
| 663 | −static int to_cea_slot(unsigned char c) | |
| 787 | +static int to_cea_slot(int ordered_ca, unsigned char pos) | |
| 664 | 788 | { |
| 665 | − struct channel_map_table *t = map_tables; | |
| 666 | − for (; t->map; t++) { | |
| 667 | − if (t->map == c) | |
| 668 | − return t->cea_slot; | |
| 669 | − } | |
| 670 | − return 0x0f; | |
| 671 | −} | |
| 789 | + int mask = to_spk_mask(pos); | |
| 790 | + int i; | |
| 672 | 791 | |
| 673 | −/* from CEA slot to ALSA API channel position */ | |
| 674 | −static int from_cea_slot(unsigned char c) | |
| 675 | −{ | |
| 676 | − struct channel_map_table *t = map_tables; | |
| 677 | − for (; t->map; t++) { | |
| 678 | − if (t->cea_slot == c) | |
| 679 | − return t->map; | |
| 792 | + if (mask) { | |
| 793 | + for (i = 0; i < 8; i++) { | |
| 794 | + if (channel_allocations[ordered_ca].speakers[7 - i] == mask) | |
| 795 | + return i; | |
| 796 | + } | |
| 680 | 797 | } |
| 681 | − return 0; | |
| 798 | + | |
| 799 | + return -1; | |
| 682 | 800 | } |
| 683 | 801 | |
| 684 | 802 | /* from speaker bit mask to ALSA API channel position */ |
| @@ -692,6 +810,14 @@ static int spk_to_chmap(int spk) · 7 unmodified lines | ||
| 692 | 810 | return 0; |
| 693 | 811 | } |
| 694 | 812 | |
| 813 | +/* from CEA slot to ALSA API channel position */ | |
| 814 | +static int from_cea_slot(int ordered_ca, unsigned char slot) | |
| 815 | +{ | |
| 816 | + int mask = channel_allocations[ordered_ca].speakers[7 - slot]; | |
| 817 | + | |
| 818 | + return spk_to_chmap(mask); | |
| 819 | +} | |
| 820 | + | |
| 695 | 821 | /* get the CA index corresponding to the given ALSA API channel map */ |
| 696 | 822 | static int hdmi_manual_channel_allocation(int chs, unsigned char *map) |
| 697 | 823 | { |
| @@ -718,18 +844,29 @@ static int hdmi_manual_channel_allocation(int chs, unsigned char *map) · 20 unmodified lines | ||
| 718 | 844 | /* set up the channel slots for the given ALSA API channel map */ |
| 719 | 845 | static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec, |
| 720 | 846 | hda_nid_t pin_nid, |
| 721 | − int chs, unsigned char *map) | |
| 847 | + int chs, unsigned char *map, | |
| 848 | + int ca) | |
| 722 | 849 | { |
| 723 | − int i; | |
| 724 | − for (i = 0; i < 8; i++) { | |
| 725 | − int val, err; | |
| 726 | − if (i < chs) | |
| 727 | − val = to_cea_slot(map[i]); | |
| 728 | − else | |
| 729 | − val = 0xf; | |
| 730 | − val |= (i << 4); | |
| 731 | − err = snd_hda_codec_write(codec, pin_nid, 0, | |
| 732 | − AC_VERB_SET_HDMI_CHAN_SLOT, val); | |
| 850 | + struct hdmi_spec *spec = codec->spec; | |
| 851 | + int ordered_ca = get_channel_allocation_order(ca); | |
| 852 | + int alsa_pos, hdmi_slot; | |
| 853 | + int assignments[8] = {[0 ... 7] = 0xf}; | |
| 854 | + | |
| 855 | + for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) { | |
| 856 | + | |
| 857 | + hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]); | |
| 858 | + | |
| 859 | + if (hdmi_slot < 0) | |
| 860 | + continue; /* unassigned channel */ | |
| 861 | + | |
| 862 | + assignments[hdmi_slot] = alsa_pos; | |
| 863 | + } | |
| 864 | + | |
| 865 | + for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) { | |
| 866 | + int err; | |
| 867 | + | |
| 868 | + err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, | |
| 869 | + assignments[hdmi_slot]); | |
| 733 | 870 | if (err) |
| 734 | 871 | return -EINVAL; |
| 735 | 872 | } |
| @@ -740,9 +877,10 @@ static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec, · 4 unmodified lines | ||
| 740 | 877 | static void hdmi_setup_fake_chmap(unsigned char *map, int ca) |
| 741 | 878 | { |
| 742 | 879 | int i; |
| 880 | + int ordered_ca = get_channel_allocation_order(ca); | |
| 743 | 881 | for (i = 0; i < 8; i++) { |
| 744 | − if (i < channel_allocations[ca].channels) | |
| 745 | − map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f); | |
| 882 | + if (i < channel_allocations[ordered_ca].channels) | |
| 883 | + map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f); | |
| 746 | 884 | else |
| 747 | 885 | map[i] = 0; |
| 748 | 886 | } |
| @@ -755,11 +893,29 @@ static void hdmi_setup_channel_mapping(struct hda_codec *codec, · 6 unmodified lines | ||
| 755 | 893 | { |
| 756 | 894 | if (!non_pcm && chmap_set) { |
| 757 | 895 | hdmi_manual_setup_channel_mapping(codec, pin_nid, |
| 758 | − channels, map); | |
| 896 | + channels, map, ca); | |
| 759 | 897 | } else { |
| 760 | 898 | hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca); |
| 761 | 899 | hdmi_setup_fake_chmap(map, ca); |
| 762 | 900 | } |
| 901 | + | |
| 902 | + hdmi_debug_channel_mapping(codec, pin_nid); | |
| 903 | +} | |
| 904 | + | |
| 905 | +static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 906 | + int asp_slot, int channel) | |
| 907 | +{ | |
| 908 | + return snd_hda_codec_write(codec, pin_nid, 0, | |
| 909 | + AC_VERB_SET_HDMI_CHAN_SLOT, | |
| 910 | + (channel << 4) | asp_slot); | |
| 911 | +} | |
| 912 | + | |
| 913 | +static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 914 | + int asp_slot) | |
| 915 | +{ | |
| 916 | + return (snd_hda_codec_read(codec, pin_nid, 0, | |
| 917 | + AC_VERB_GET_HDMI_CHAN_SLOT, | |
| 918 | + asp_slot) & 0xf0) >> 4; | |
| 763 | 919 | } |
| 764 | 920 | |
| 765 | 921 | /* |
| @@ -883,15 +1039,64 @@ static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, · 117 unmodified lines | ||
| 883 | 1039 | return true; |
| 884 | 1040 | } |
| 885 | 1041 | |
| 1042 | +static void hdmi_pin_setup_infoframe(struct hda_codec *codec, | |
| 1043 | + hda_nid_t pin_nid, | |
| 1044 | + int ca, int active_channels, | |
| 1045 | + int conn_type) | |
| 1046 | +{ | |
| 1047 | + union audio_infoframe ai; | |
| 1048 | + | |
| 1049 | + if (conn_type == 0) { /* HDMI */ | |
| 1050 | + struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; | |
| 1051 | + | |
| 1052 | + hdmi_ai->type = 0x84; | |
| 1053 | + hdmi_ai->ver = 0x01; | |
| 1054 | + hdmi_ai->len = 0x0a; | |
| 1055 | + hdmi_ai->CC02_CT47 = active_channels - 1; | |
| 1056 | + hdmi_ai->CA = ca; | |
| 1057 | + hdmi_checksum_audio_infoframe(hdmi_ai); | |
| 1058 | + } else if (conn_type == 1) { /* DisplayPort */ | |
| 1059 | + struct dp_audio_infoframe *dp_ai = &ai.dp; | |
| 1060 | + | |
| 1061 | + dp_ai->type = 0x84; | |
| 1062 | + dp_ai->len = 0x1b; | |
| 1063 | + dp_ai->ver = 0x11 << 2; | |
| 1064 | + dp_ai->CC02_CT47 = active_channels - 1; | |
| 1065 | + dp_ai->CA = ca; | |
| 1066 | + } else { | |
| 1067 | + snd_printd("HDMI: unknown connection type at pin %d\n", | |
| 1068 | + pin_nid); | |
| 1069 | + return; | |
| 1070 | + } | |
| 1071 | + | |
| 1072 | + /* | |
| 1073 | + * sizeof(ai) is used instead of sizeof(*hdmi_ai) or | |
| 1074 | + * sizeof(*dp_ai) to avoid partial match/update problems when | |
| 1075 | + * the user switches between HDMI/DP monitors. | |
| 1076 | + */ | |
| 1077 | + if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, | |
| 1078 | + sizeof(ai))) { | |
| 1079 | + snd_printdd("hdmi_pin_setup_infoframe: " | |
| 1080 | + "pin=%d channels=%d ca=0x%02x\n", | |
| 1081 | + pin_nid, | |
| 1082 | + active_channels, ca); | |
| 1083 | + hdmi_stop_infoframe_trans(codec, pin_nid); | |
| 1084 | + hdmi_fill_audio_infoframe(codec, pin_nid, | |
| 1085 | + ai.bytes, sizeof(ai)); | |
| 1086 | + hdmi_start_infoframe_trans(codec, pin_nid); | |
| 1087 | + } | |
| 1088 | +} | |
| 1089 | + | |
| 886 | 1090 | static void hdmi_setup_audio_infoframe(struct hda_codec *codec, |
| 887 | 1091 | struct hdmi_spec_per_pin *per_pin, |
| 888 | 1092 | bool non_pcm) |
| 889 | 1093 | { |
| 1094 | + struct hdmi_spec *spec = codec->spec; | |
| 890 | 1095 | hda_nid_t pin_nid = per_pin->pin_nid; |
| 891 | 1096 | int channels = per_pin->channels; |
| 1097 | + int active_channels; | |
| 892 | 1098 | struct hdmi_eld *eld; |
| 893 | − int ca; | |
| 894 | − union audio_infoframe ai; | |
| 1099 | + int ca, ordered_ca; | |
| 895 | 1100 | |
| 896 | 1101 | if (!channels) |
| 897 | 1102 | return; |
| @@ -912,29 +1117,10 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, · 14 unmodified lines | ||
| 912 | 1117 | if (ca < 0) |
| 913 | 1118 | ca = 0; |
| 914 | 1119 | |
| 915 | − memset(&ai, 0, sizeof(ai)); | |
| 916 | − if (eld->info.conn_type == 0) { /* HDMI */ | |
| 917 | − struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; | |
| 1120 | + ordered_ca = get_channel_allocation_order(ca); | |
| 1121 | + active_channels = channel_allocations[ordered_ca].channels; | |
| 918 | 1122 | |
| 919 | − hdmi_ai->type = 0x84; | |
| 920 | − hdmi_ai->ver = 0x01; | |
| 921 | − hdmi_ai->len = 0x0a; | |
| 922 | − hdmi_ai->CC02_CT47 = channels - 1; | |
| 923 | − hdmi_ai->CA = ca; | |
| 924 | − hdmi_checksum_audio_infoframe(hdmi_ai); | |
| 925 | − } else if (eld->info.conn_type == 1) { /* DisplayPort */ | |
| 926 | − struct dp_audio_infoframe *dp_ai = &ai.dp; | |
| 927 | − | |
| 928 | − dp_ai->type = 0x84; | |
| 929 | − dp_ai->len = 0x1b; | |
| 930 | − dp_ai->ver = 0x11 << 2; | |
| 931 | − dp_ai->CC02_CT47 = channels - 1; | |
| 932 | − dp_ai->CA = ca; | |
| 933 | − } else { | |
| 934 | − snd_printd("HDMI: unknown connection type at pin %d\n", | |
| 935 | − pin_nid); | |
| 936 | − return; | |
| 937 | − } | |
| 1123 | + hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels); | |
| 938 | 1124 | |
| 939 | 1125 | /* |
| 940 | 1126 | * always configure channel mapping, it may have been changed by the |
| @@ -944,32 +1130,17 @@ static void hdmi_setup_audio_infoframe(struct hda_codec *codec, · 3 unmodified lines | ||
| 944 | 1130 | channels, per_pin->chmap, |
| 945 | 1131 | per_pin->chmap_set); |
| 946 | 1132 | |
| 947 | − /* | |
| 948 | − * sizeof(ai) is used instead of sizeof(*hdmi_ai) or | |
| 949 | − * sizeof(*dp_ai) to avoid partial match/update problems when | |
| 950 | − * the user switches between HDMI/DP monitors. | |
| 951 | − */ | |
| 952 | − if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, | |
| 953 | − sizeof(ai))) { | |
| 954 | − snd_printdd("hdmi_setup_audio_infoframe: " | |
| 955 | − "pin=%d channels=%d\n", | |
| 956 | − pin_nid, | |
| 957 | − channels); | |
| 958 | − hdmi_stop_infoframe_trans(codec, pin_nid); | |
| 959 | − hdmi_fill_audio_infoframe(codec, pin_nid, | |
| 960 | − ai.bytes, sizeof(ai)); | |
| 961 | − hdmi_start_infoframe_trans(codec, pin_nid); | |
| 962 | − } | |
| 1133 | + spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels, | |
| 1134 | + eld->info.conn_type); | |
| 963 | 1135 | |
| 964 | 1136 | per_pin->non_pcm = non_pcm; |
| 965 | 1137 | } |
| 966 | 1138 | |
| 967 | − | |
| 968 | 1139 | /* |
| 969 | 1140 | * Unsolicited events |
| 970 | 1141 | */ |
| 971 | 1142 | |
| 972 | −static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); | |
| 1143 | +static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); | |
| 973 | 1144 | |
| 974 | 1145 | static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) |
| 975 | 1146 | { |
| @@ -995,8 +1166,8 @@ static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) · 19 unmodified lines | ||
| 995 | 1166 | if (pin_idx < 0) |
| 996 | 1167 | return; |
| 997 | 1168 | |
| 998 | − hdmi_present_sense(get_pin(spec, pin_idx), 1); | |
| 999 | − snd_hda_jack_report_sync(codec); | |
| 1169 | + if (hdmi_present_sense(get_pin(spec, pin_idx), 1)) | |
| 1170 | + snd_hda_jack_report_sync(codec); | |
| 1000 | 1171 | } |
| 1001 | 1172 | |
| 1002 | 1173 | static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) |
| @@ -1067,26 +1238,22 @@ static void haswell_verify_D0(struct hda_codec *codec, · 64 unmodified lines | ||
| 1067 | 1238 | #define is_hbr_format(format) \ |
| 1068 | 1239 | ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) |
| 1069 | 1240 | |
| 1070 | −static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, | |
| 1071 | − hda_nid_t pin_nid, u32 stream_tag, int format) | |
| 1241 | +static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 1242 | + bool hbr) | |
| 1072 | 1243 | { |
| 1073 | − int pinctl; | |
| 1074 | − int new_pinctl = 0; | |
| 1075 | − | |
| 1076 | − if (is_haswell(codec)) | |
| 1077 | − haswell_verify_D0(codec, cvt_nid, pin_nid); | |
| 1244 | + int pinctl, new_pinctl; | |
| 1078 | 1245 | |
| 1079 | 1246 | if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { |
| 1080 | 1247 | pinctl = snd_hda_codec_read(codec, pin_nid, 0, |
| 1081 | 1248 | AC_VERB_GET_PIN_WIDGET_CONTROL, 0); |
| 1082 | 1249 | |
| 1083 | 1250 | new_pinctl = pinctl & ~AC_PINCTL_EPT; |
| 1084 | − if (is_hbr_format(format)) | |
| 1251 | + if (hbr) | |
| 1085 | 1252 | new_pinctl |= AC_PINCTL_EPT_HBR; |
| 1086 | 1253 | else |
| 1087 | 1254 | new_pinctl |= AC_PINCTL_EPT_NATIVE; |
| 1088 | 1255 | |
| 1089 | − snd_printdd("hdmi_setup_stream: " | |
| 1256 | + snd_printdd("hdmi_pin_hbr_setup: " | |
| 1090 | 1257 | "NID=0x%x, %spinctl=0x%x\n", |
| 1091 | 1258 | pin_nid, |
| 1092 | 1259 | pinctl == new_pinctl ? "" : "new-", |
| @@ -1096,11 +1263,26 @@ static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, · 3 unmodified lines | ||
| 1096 | 1263 | snd_hda_codec_write(codec, pin_nid, 0, |
| 1097 | 1264 | AC_VERB_SET_PIN_WIDGET_CONTROL, |
| 1098 | 1265 | new_pinctl); |
| 1266 | + } else if (hbr) | |
| 1267 | + return -EINVAL; | |
| 1099 | 1268 | |
| 1100 | − } | |
| 1101 | − if (is_hbr_format(format) && !new_pinctl) { | |
| 1269 | + return 0; | |
| 1270 | +} | |
| 1271 | + | |
| 1272 | +static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, | |
| 1273 | + hda_nid_t pin_nid, u32 stream_tag, int format) | |
| 1274 | +{ | |
| 1275 | + struct hdmi_spec *spec = codec->spec; | |
| 1276 | + int err; | |
| 1277 | + | |
| 1278 | + if (is_haswell(codec)) | |
| 1279 | + haswell_verify_D0(codec, cvt_nid, pin_nid); | |
| 1280 | + | |
| 1281 | + err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format)); | |
| 1282 | + | |
| 1283 | + if (err) { | |
| 1102 | 1284 | snd_printdd("hdmi_setup_stream: HBR is not supported\n"); |
| 1103 | − return -EINVAL; | |
| 1285 | + return err; | |
| 1104 | 1286 | } |
| 1105 | 1287 | |
| 1106 | 1288 | snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); |
| @@ -1146,7 +1328,16 @@ static int hdmi_choose_cvt(struct hda_codec *codec, · 39 unmodified lines | ||
| 1146 | 1328 | return 0; |
| 1147 | 1329 | } |
| 1148 | 1330 | |
| 1149 | −static void haswell_config_cvts(struct hda_codec *codec, | |
| 1331 | +/* Intel HDMI workaround to fix audio routing issue: | |
| 1332 | + * For some Intel display codecs, pins share the same connection list. | |
| 1333 | + * So a conveter can be selected by multiple pins and playback on any of these | |
| 1334 | + * pins will generate sound on the external display, because audio flows from | |
| 1335 | + * the same converter to the display pipeline. Also muting one pin may make | |
| 1336 | + * other pins have no sound output. | |
| 1337 | + * So this function assures that an assigned converter for a pin is not selected | |
| 1338 | + * by any other pins. | |
| 1339 | + */ | |
| 1340 | +static void intel_not_share_assigned_cvt(struct hda_codec *codec, | |
| 1150 | 1341 | hda_nid_t pin_nid, int mux_idx) |
| 1151 | 1342 | { |
| 1152 | 1343 | struct hdmi_spec *spec = codec->spec; |
| @@ -1217,6 +1408,7 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, · 64 unmodified lines | ||
| 1217 | 1408 | per_cvt = get_cvt(spec, cvt_idx); |
| 1218 | 1409 | /* Claim converter */ |
| 1219 | 1410 | per_cvt->assigned = 1; |
| 1411 | + per_pin->cvt_nid = per_cvt->cvt_nid; | |
| 1220 | 1412 | hinfo->nid = per_cvt->cvt_nid; |
| 1221 | 1413 | |
| 1222 | 1414 | snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, |
| @@ -1224,8 +1416,8 @@ static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, · 1 unmodified line | ||
| 1224 | 1416 | mux_idx); |
| 1225 | 1417 | |
| 1226 | 1418 | /* configure unused pins to choose other converters */ |
| 1227 | − if (is_haswell(codec)) | |
| 1228 | − haswell_config_cvts(codec, per_pin->pin_nid, mux_idx); | |
| 1419 | + if (is_haswell(codec) || is_valleyview(codec)) | |
| 1420 | + intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx); | |
| 1229 | 1421 | |
| 1230 | 1422 | snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); |
| 1231 | 1423 | |
| @@ -1283,8 +1475,9 @@ static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) · 51 unmodified lines | ||
| 1283 | 1475 | return 0; |
| 1284 | 1476 | } |
| 1285 | 1477 | |
| 1286 | −static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) | |
| 1478 | +static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) | |
| 1287 | 1479 | { |
| 1480 | + struct hda_jack_tbl *jack; | |
| 1288 | 1481 | struct hda_codec *codec = per_pin->codec; |
| 1289 | 1482 | struct hdmi_spec *spec = codec->spec; |
| 1290 | 1483 | struct hdmi_eld *eld = &spec->temp_eld; |
| @@ -1301,7 +1494,9 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) · 10 unmodified lines | ||
| 1301 | 1494 | int present = snd_hda_pin_sense(codec, pin_nid); |
| 1302 | 1495 | bool update_eld = false; |
| 1303 | 1496 | bool eld_changed = false; |
| 1497 | + bool ret; | |
| 1304 | 1498 | |
| 1499 | + mutex_lock(&per_pin->lock); | |
| 1305 | 1500 | pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); |
| 1306 | 1501 | if (pin_eld->monitor_present) |
| 1307 | 1502 | eld->eld_valid = !!(present & AC_PINSENSE_ELDV); |
| @@ -1313,7 +1508,7 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) · 5 unmodified lines | ||
| 1313 | 1508 | codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid); |
| 1314 | 1509 | |
| 1315 | 1510 | if (eld->eld_valid) { |
| 1316 | − if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer, | |
| 1511 | + if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer, | |
| 1317 | 1512 | &eld->eld_size) < 0) |
| 1318 | 1513 | eld->eld_valid = false; |
| 1319 | 1514 | else { |
| @@ -1331,11 +1526,10 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) · 11 unmodified lines | ||
| 1331 | 1526 | queue_delayed_work(codec->bus->workq, |
| 1332 | 1527 | &per_pin->work, |
| 1333 | 1528 | msecs_to_jiffies(300)); |
| 1334 | − return; | |
| 1529 | + goto unlock; | |
| 1335 | 1530 | } |
| 1336 | 1531 | } |
| 1337 | 1532 | |
| 1338 | − mutex_lock(&pin_eld->lock); | |
| 1339 | 1533 | if (pin_eld->eld_valid && !eld->eld_valid) { |
| 1340 | 1534 | update_eld = true; |
| 1341 | 1535 | eld_changed = true; |
| @@ -1352,20 +1546,29 @@ static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) · 10 unmodified lines | ||
| 1352 | 1546 | pin_eld->eld_size = eld->eld_size; |
| 1353 | 1547 | pin_eld->info = eld->info; |
| 1354 | 1548 | |
| 1355 | − /* Haswell-specific workaround: re-setup when the transcoder is | |
| 1356 | − * changed during the stream playback | |
| 1549 | + /* | |
| 1550 | + * Re-setup pin and infoframe. This is needed e.g. when | |
| 1551 | + * - sink is first plugged-in (infoframe is not set up if !monitor_present) | |
| 1552 | + * - transcoder can change during stream playback on Haswell | |
| 1357 | 1553 | */ |
| 1358 | − if (is_haswell(codec) && | |
| 1359 | − eld->eld_valid && !old_eld_valid && per_pin->setup) | |
| 1554 | + if (eld->eld_valid && !old_eld_valid && per_pin->setup) | |
| 1360 | 1555 | hdmi_setup_audio_infoframe(codec, per_pin, |
| 1361 | 1556 | per_pin->non_pcm); |
| 1362 | 1557 | } |
| 1363 | − mutex_unlock(&pin_eld->lock); | |
| 1364 | 1558 | |
| 1365 | 1559 | if (eld_changed) |
| 1366 | 1560 | snd_ctl_notify(codec->bus->card, |
| 1367 | 1561 | SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, |
| 1368 | 1562 | &per_pin->eld_ctl->id); |
| 1563 | + unlock: | |
| 1564 | + ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid; | |
| 1565 | + | |
| 1566 | + jack = snd_hda_jack_tbl_get(codec, pin_nid); | |
| 1567 | + if (jack) | |
| 1568 | + jack->block_report = !ret; | |
| 1569 | + | |
| 1570 | + mutex_unlock(&per_pin->lock); | |
| 1571 | + return ret; | |
| 1369 | 1572 | } |
| 1370 | 1573 | |
| 1371 | 1574 | static void hdmi_repoll_eld(struct work_struct *work) |
| @@ -1376,7 +1579,8 @@ static void hdmi_repoll_eld(struct work_struct *work) · 4 unmodified lines | ||
| 1376 | 1579 | if (per_pin->repoll_count++ > 6) |
| 1377 | 1580 | per_pin->repoll_count = 0; |
| 1378 | 1581 | |
| 1379 | − hdmi_present_sense(per_pin, per_pin->repoll_count); | |
| 1582 | + if (hdmi_present_sense(per_pin, per_pin->repoll_count)) | |
| 1583 | + snd_hda_jack_report_sync(per_pin->codec); | |
| 1380 | 1584 | } |
| 1381 | 1585 | |
| 1382 | 1586 | static void intel_haswell_fixup_connect_list(struct hda_codec *codec, |
| @@ -1536,14 +1740,14 @@ static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, · 153 unmodified lines | ||
| 1536 | 1740 | bool non_pcm; |
| 1537 | 1741 | |
| 1538 | 1742 | non_pcm = check_non_pcm_per_cvt(codec, cvt_nid); |
| 1743 | + mutex_lock(&per_pin->lock); | |
| 1539 | 1744 | per_pin->channels = substream->runtime->channels; |
| 1540 | 1745 | per_pin->setup = true; |
| 1541 | 1746 | |
| 1542 | − hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); | |
| 1543 | − | |
| 1544 | 1747 | hdmi_setup_audio_infoframe(codec, per_pin, non_pcm); |
| 1748 | + mutex_unlock(&per_pin->lock); | |
| 1545 | 1749 | |
| 1546 | − return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); | |
| 1750 | + return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); | |
| 1547 | 1751 | } |
| 1548 | 1752 | |
| 1549 | 1753 | static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, |
| @@ -1579,11 +1783,14 @@ static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, · 29 unmodified lines | ||
| 1579 | 1783 | per_pin = get_pin(spec, pin_idx); |
| 1580 | 1784 | |
| 1581 | 1785 | snd_hda_spdif_ctls_unassign(codec, pin_idx); |
| 1786 | + | |
| 1787 | + mutex_lock(&per_pin->lock); | |
| 1582 | 1788 | per_pin->chmap_set = false; |
| 1583 | 1789 | memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); |
| 1584 | 1790 | |
| 1585 | 1791 | per_pin->setup = false; |
| 1586 | 1792 | per_pin->channels = 0; |
| 1793 | + mutex_unlock(&per_pin->lock); | |
| 1587 | 1794 | } |
| 1588 | 1795 | |
| 1589 | 1796 | return 0; |
| @@ -1612,14 +1819,40 @@ static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol, · 22 unmodified lines | ||
| 1612 | 1819 | return 0; |
| 1613 | 1820 | } |
| 1614 | 1821 | |
| 1822 | +static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap, | |
| 1823 | + int channels) | |
| 1824 | +{ | |
| 1825 | + /* If the speaker allocation matches the channel count, it is OK.*/ | |
| 1826 | + if (cap->channels != channels) | |
| 1827 | + return -1; | |
| 1828 | + | |
| 1829 | + /* all channels are remappable freely */ | |
| 1830 | + return SNDRV_CTL_TLVT_CHMAP_VAR; | |
| 1831 | +} | |
| 1832 | + | |
| 1833 | +static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap, | |
| 1834 | + unsigned int *chmap, int channels) | |
| 1835 | +{ | |
| 1836 | + int count = 0; | |
| 1837 | + int c; | |
| 1838 | + | |
| 1839 | + for (c = 7; c >= 0; c--) { | |
| 1840 | + int spk = cap->speakers[c]; | |
| 1841 | + if (!spk) | |
| 1842 | + continue; | |
| 1843 | + | |
| 1844 | + chmap[count++] = spk_to_chmap(spk); | |
| 1845 | + } | |
| 1846 | + | |
| 1847 | + WARN_ON(count != channels); | |
| 1848 | +} | |
| 1849 | + | |
| 1615 | 1850 | static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag, |
| 1616 | 1851 | unsigned int size, unsigned int __user *tlv) |
| 1617 | 1852 | { |
| 1618 | 1853 | struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); |
| 1619 | 1854 | struct hda_codec *codec = info->private_data; |
| 1620 | 1855 | struct hdmi_spec *spec = codec->spec; |
| 1621 | − const unsigned int valid_mask = | |
| 1622 | − FL | FR | RL | RR | LFE | FC | RLC | RRC; | |
| 1623 | 1856 | unsigned int __user *dst; |
| 1624 | 1857 | int chs, count = 0; |
| 1625 | 1858 | |
| @@ -1630,18 +1863,19 @@ static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag, · 4 unmodified lines | ||
| 1630 | 1863 | size -= 8; |
| 1631 | 1864 | dst = tlv + 2; |
| 1632 | 1865 | for (chs = 2; chs <= spec->channels_max; chs++) { |
| 1633 | − int i, c; | |
| 1866 | + int i; | |
| 1634 | 1867 | struct cea_channel_speaker_allocation *cap; |
| 1635 | 1868 | cap = channel_allocations; |
| 1636 | 1869 | for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) { |
| 1637 | 1870 | int chs_bytes = chs * 4; |
| 1638 | − if (cap->channels != chs) | |
| 1639 | − continue; | |
| 1640 | − if (cap->spk_mask & ~valid_mask) | |
| 1871 | + int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs); | |
| 1872 | + unsigned int tlv_chmap[8]; | |
| 1873 | + | |
| 1874 | + if (type < 0) | |
| 1641 | 1875 | continue; |
| 1642 | 1876 | if (size < 8) |
| 1643 | 1877 | return -ENOMEM; |
| 1644 | − if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) || | |
| 1878 | + if (put_user(type, dst) || | |
| 1645 | 1879 | put_user(chs_bytes, dst + 1)) |
| 1646 | 1880 | return -EFAULT; |
| 1647 | 1881 | dst += 2; |
| @@ -1651,14 +1885,10 @@ static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag, · 3 unmodified lines | ||
| 1651 | 1885 | return -ENOMEM; |
| 1652 | 1886 | size -= chs_bytes; |
| 1653 | 1887 | count += chs_bytes; |
| 1654 | − for (c = 7; c >= 0; c--) { | |
| 1655 | − int spk = cap->speakers[c]; | |
| 1656 | − if (!spk) | |
| 1657 | − continue; | |
| 1658 | − if (put_user(spk_to_chmap(spk), dst)) | |
| 1659 | − return -EFAULT; | |
| 1660 | − dst++; | |
| 1661 | − } | |
| 1888 | + spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs); | |
| 1889 | + if (copy_to_user(dst, tlv_chmap, chs_bytes)) | |
| 1890 | + return -EFAULT; | |
| 1891 | + dst += chs; | |
| 1662 | 1892 | } |
| 1663 | 1893 | } |
| 1664 | 1894 | if (put_user(count, tlv + 1)) |
| @@ -1692,7 +1922,7 @@ static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol, · 27 unmodified lines | ||
| 1692 | 1922 | unsigned int ctl_idx; |
| 1693 | 1923 | struct snd_pcm_substream *substream; |
| 1694 | 1924 | unsigned char chmap[8]; |
| 1695 | − int i, ca, prepared = 0; | |
| 1925 | + int i, err, ca, prepared = 0; | |
| 1696 | 1926 | |
| 1697 | 1927 | ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); |
| 1698 | 1928 | substream = snd_pcm_chmap_substream(info, ctl_idx); |
| @@ -1716,10 +1946,17 @@ static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol, · 17 unmodified lines | ||
| 1716 | 1946 | ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap); |
| 1717 | 1947 | if (ca < 0) |
| 1718 | 1948 | return -EINVAL; |
| 1949 | + if (spec->ops.chmap_validate) { | |
| 1950 | + err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap); | |
| 1951 | + if (err) | |
| 1952 | + return err; | |
| 1953 | + } | |
| 1954 | + mutex_lock(&per_pin->lock); | |
| 1719 | 1955 | per_pin->chmap_set = true; |
| 1720 | 1956 | memcpy(per_pin->chmap, chmap, sizeof(chmap)); |
| 1721 | 1957 | if (prepared) |
| 1722 | 1958 | hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); |
| 1959 | + mutex_unlock(&per_pin->lock); | |
| 1723 | 1960 | |
| 1724 | 1961 | return 0; |
| 1725 | 1962 | } |
| @@ -1836,12 +2073,11 @@ static int generic_hdmi_init_per_pins(struct hda_codec *codec) · 110 unmodified lines | ||
| 1836 | 2073 | |
| 1837 | 2074 | for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { |
| 1838 | 2075 | struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); |
| 1839 | − struct hdmi_eld *eld = &per_pin->sink_eld; | |
| 1840 | 2076 | |
| 1841 | 2077 | per_pin->codec = codec; |
| 1842 | − mutex_init(&eld->lock); | |
| 2078 | + mutex_init(&per_pin->lock); | |
| 1843 | 2079 | INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); |
| 1844 | − snd_hda_eld_proc_new(codec, eld, pin_idx); | |
| 2080 | + eld_proc_new(per_pin, pin_idx); | |
| 1845 | 2081 | } |
| 1846 | 2082 | return 0; |
| 1847 | 2083 | } |
| @@ -1882,10 +2118,9 @@ static void generic_hdmi_free(struct hda_codec *codec) · 34 unmodified lines | ||
| 1882 | 2118 | |
| 1883 | 2119 | for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { |
| 1884 | 2120 | struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); |
| 1885 | − struct hdmi_eld *eld = &per_pin->sink_eld; | |
| 1886 | 2121 | |
| 1887 | 2122 | cancel_delayed_work(&per_pin->work); |
| 1888 | − snd_hda_eld_proc_free(codec, eld); | |
| 2123 | + eld_proc_free(per_pin); | |
| 1889 | 2124 | } |
| 1890 | 2125 | |
| 1891 | 2126 | flush_workqueue(codec->bus->workq); |
| @@ -1922,6 +2157,17 @@ static const struct hda_codec_ops generic_hdmi_patch_ops = { · 30 unmodified lines | ||
| 1922 | 2157 | #endif |
| 1923 | 2158 | }; |
| 1924 | 2159 | |
| 2160 | +static const struct hdmi_ops generic_standard_hdmi_ops = { | |
| 2161 | + .pin_get_eld = snd_hdmi_get_eld, | |
| 2162 | + .pin_get_slot_channel = hdmi_pin_get_slot_channel, | |
| 2163 | + .pin_set_slot_channel = hdmi_pin_set_slot_channel, | |
| 2164 | + .pin_setup_infoframe = hdmi_pin_setup_infoframe, | |
| 2165 | + .pin_hbr_setup = hdmi_pin_hbr_setup, | |
| 2166 | + .setup_stream = hdmi_setup_stream, | |
| 2167 | + .chmap_cea_alloc_validate_get_type = hdmi_chmap_cea_alloc_validate_get_type, | |
| 2168 | + .cea_alloc_to_tlv_chmap = hdmi_cea_alloc_to_tlv_chmap, | |
| 2169 | +}; | |
| 2170 | + | |
| 1925 | 2171 | |
| 1926 | 2172 | static void intel_haswell_fixup_connect_list(struct hda_codec *codec, |
| 1927 | 2173 | hda_nid_t nid) |
| @@ -2004,6 +2250,7 @@ static int patch_generic_hdmi(struct hda_codec *codec) · 76 unmodified lines | ||
| 2004 | 2250 | if (spec == NULL) |
| 2005 | 2251 | return -ENOMEM; |
| 2006 | 2252 | |
| 2253 | + spec->ops = generic_standard_hdmi_ops; | |
| 2007 | 2254 | codec->spec = spec; |
| 2008 | 2255 | hdmi_array_init(spec, 4); |
| 2009 | 2256 | |
| @@ -2559,49 +2806,398 @@ static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) · 549 unmodified lines | ||
| 2559 | 2806 | } |
| 2560 | 2807 | |
| 2561 | 2808 | /* |
| 2562 | − * ATI-specific implementations | |
| 2563 | − * | |
| 2564 | − * FIXME: we may omit the whole this and use the generic code once after | |
| 2565 | − * it's confirmed to work. | |
| 2809 | + * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on: | |
| 2810 | + * - 0x10de0015 | |
| 2811 | + * - 0x10de0040 | |
| 2566 | 2812 | */ |
| 2813 | +static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap, | |
| 2814 | + int channels) | |
| 2815 | +{ | |
| 2816 | + if (cap->ca_index == 0x00 && channels == 2) | |
| 2817 | + return SNDRV_CTL_TLVT_CHMAP_FIXED; | |
| 2818 | + | |
| 2819 | + return hdmi_chmap_cea_alloc_validate_get_type(cap, channels); | |
| 2820 | +} | |
| 2821 | + | |
| 2822 | +static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map) | |
| 2823 | +{ | |
| 2824 | + if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR)) | |
| 2825 | + return -EINVAL; | |
| 2826 | + | |
| 2827 | + return 0; | |
| 2828 | +} | |
| 2829 | + | |
| 2830 | +static int patch_nvhdmi(struct hda_codec *codec) | |
| 2831 | +{ | |
| 2832 | + struct hdmi_spec *spec; | |
| 2833 | + int err; | |
| 2834 | + | |
| 2835 | + err = patch_generic_hdmi(codec); | |
| 2836 | + if (err) | |
| 2837 | + return err; | |
| 2838 | + | |
| 2839 | + spec = codec->spec; | |
| 2840 | + | |
| 2841 | + spec->ops.chmap_cea_alloc_validate_get_type = | |
| 2842 | + nvhdmi_chmap_cea_alloc_validate_get_type; | |
| 2843 | + spec->ops.chmap_validate = nvhdmi_chmap_validate; | |
| 2844 | + | |
| 2845 | + return 0; | |
| 2846 | +} | |
| 2847 | + | |
| 2848 | +/* | |
| 2849 | + * ATI/AMD-specific implementations | |
| 2850 | + */ | |
| 2851 | + | |
| 2852 | +#define is_amdhdmi_rev3_or_later(codec) \ | |
| 2853 | + ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300) | |
| 2854 | +#define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec) | |
| 2855 | + | |
| 2856 | +/* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */ | |
| 2857 | +#define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771 | |
| 2858 | +#define ATI_VERB_SET_DOWNMIX_INFO 0x772 | |
| 2859 | +#define ATI_VERB_SET_MULTICHANNEL_01 0x777 | |
| 2860 | +#define ATI_VERB_SET_MULTICHANNEL_23 0x778 | |
| 2861 | +#define ATI_VERB_SET_MULTICHANNEL_45 0x779 | |
| 2862 | +#define ATI_VERB_SET_MULTICHANNEL_67 0x77a | |
| 2863 | +#define ATI_VERB_SET_HBR_CONTROL 0x77c | |
| 2864 | +#define ATI_VERB_SET_MULTICHANNEL_1 0x785 | |
| 2865 | +#define ATI_VERB_SET_MULTICHANNEL_3 0x786 | |
| 2866 | +#define ATI_VERB_SET_MULTICHANNEL_5 0x787 | |
| 2867 | +#define ATI_VERB_SET_MULTICHANNEL_7 0x788 | |
| 2868 | +#define ATI_VERB_SET_MULTICHANNEL_MODE 0x789 | |
| 2869 | +#define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71 | |
| 2870 | +#define ATI_VERB_GET_DOWNMIX_INFO 0xf72 | |
| 2871 | +#define ATI_VERB_GET_MULTICHANNEL_01 0xf77 | |
| 2872 | +#define ATI_VERB_GET_MULTICHANNEL_23 0xf78 | |
| 2873 | +#define ATI_VERB_GET_MULTICHANNEL_45 0xf79 | |
| 2874 | +#define ATI_VERB_GET_MULTICHANNEL_67 0xf7a | |
| 2875 | +#define ATI_VERB_GET_HBR_CONTROL 0xf7c | |
| 2876 | +#define ATI_VERB_GET_MULTICHANNEL_1 0xf85 | |
| 2877 | +#define ATI_VERB_GET_MULTICHANNEL_3 0xf86 | |
| 2878 | +#define ATI_VERB_GET_MULTICHANNEL_5 0xf87 | |
| 2879 | +#define ATI_VERB_GET_MULTICHANNEL_7 0xf88 | |
| 2880 | +#define ATI_VERB_GET_MULTICHANNEL_MODE 0xf89 | |
| 2881 | + | |
| 2882 | +/* AMD specific HDA cvt verbs */ | |
| 2883 | +#define ATI_VERB_SET_RAMP_RATE 0x770 | |
| 2884 | +#define ATI_VERB_GET_RAMP_RATE 0xf70 | |
| 2885 | + | |
| 2886 | +#define ATI_OUT_ENABLE 0x1 | |
| 2887 | + | |
| 2888 | +#define ATI_MULTICHANNEL_MODE_PAIRED 0 | |
| 2889 | +#define ATI_MULTICHANNEL_MODE_SINGLE 1 | |
| 2890 | + | |
| 2891 | +#define ATI_HBR_CAPABLE 0x01 | |
| 2892 | +#define ATI_HBR_ENABLE 0x10 | |
| 2893 | + | |
| 2894 | +static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid, | |
| 2895 | + unsigned char *buf, int *eld_size) | |
| 2896 | +{ | |
| 2897 | + /* call hda_eld.c ATI/AMD-specific function */ | |
| 2898 | + return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size, | |
| 2899 | + is_amdhdmi_rev3_or_later(codec)); | |
| 2900 | +} | |
| 2901 | + | |
| 2902 | +static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca, | |
| 2903 | + int active_channels, int conn_type) | |
| 2904 | +{ | |
| 2905 | + snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca); | |
| 2906 | +} | |
| 2907 | + | |
| 2908 | +static int atihdmi_paired_swap_fc_lfe(int pos) | |
| 2909 | +{ | |
| 2910 | + /* | |
| 2911 | + * ATI/AMD have automatic FC/LFE swap built-in | |
| 2912 | + * when in pairwise mapping mode. | |
| 2913 | + */ | |
| 2914 | + | |
| 2915 | + switch (pos) { | |
| 2916 | + /* see channel_allocations[].speakers[] */ | |
| 2917 | + case 2: return 3; | |
| 2918 | + case 3: return 2; | |
| 2919 | + default: break; | |
| 2920 | + } | |
| 2921 | + | |
| 2922 | + return pos; | |
| 2923 | +} | |
| 2924 | + | |
| 2925 | +static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map) | |
| 2926 | +{ | |
| 2927 | + struct cea_channel_speaker_allocation *cap; | |
| 2928 | + int i, j; | |
| 2929 | + | |
| 2930 | + /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */ | |
| 2931 | + | |
| 2932 | + cap = &channel_allocations[get_channel_allocation_order(ca)]; | |
| 2933 | + for (i = 0; i < chs; ++i) { | |
| 2934 | + int mask = to_spk_mask(map[i]); | |
| 2935 | + bool ok = false; | |
| 2936 | + bool companion_ok = false; | |
| 2937 | + | |
| 2938 | + if (!mask) | |
| 2939 | + continue; | |
| 2940 | + | |
| 2941 | + for (j = 0 + i % 2; j < 8; j += 2) { | |
| 2942 | + int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j); | |
| 2943 | + if (cap->speakers[chan_idx] == mask) { | |
| 2944 | + /* channel is in a supported position */ | |
| 2945 | + ok = true; | |
| 2946 | + | |
| 2947 | + if (i % 2 == 0 && i + 1 < chs) { | |
| 2948 | + /* even channel, check the odd companion */ | |
| 2949 | + int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1); | |
| 2950 | + int comp_mask_req = to_spk_mask(map[i+1]); | |
| 2951 | + int comp_mask_act = cap->speakers[comp_chan_idx]; | |
| 2952 | + | |
| 2953 | + if (comp_mask_req == comp_mask_act) | |
| 2954 | + companion_ok = true; | |
| 2955 | + else | |
| 2956 | + return -EINVAL; | |
| 2957 | + } | |
| 2958 | + break; | |
| 2959 | + } | |
| 2960 | + } | |
| 2961 | + | |
| 2962 | + if (!ok) | |
| 2963 | + return -EINVAL; | |
| 2964 | + | |
| 2965 | + if (companion_ok) | |
| 2966 | + i++; /* companion channel already checked */ | |
| 2967 | + } | |
| 2968 | + | |
| 2969 | + return 0; | |
| 2970 | +} | |
| 2971 | + | |
| 2972 | +static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 2973 | + int hdmi_slot, int stream_channel) | |
| 2974 | +{ | |
| 2975 | + int verb; | |
| 2976 | + int ati_channel_setup = 0; | |
| 2977 | + | |
| 2978 | + if (hdmi_slot > 7) | |
| 2979 | + return -EINVAL; | |
| 2980 | + | |
| 2981 | + if (!has_amd_full_remap_support(codec)) { | |
| 2982 | + hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot); | |
| 2983 | + | |
| 2984 | + /* In case this is an odd slot but without stream channel, do not | |
| 2985 | + * disable the slot since the corresponding even slot could have a | |
| 2986 | + * channel. In case neither have a channel, the slot pair will be | |
| 2987 | + * disabled when this function is called for the even slot. */ | |
| 2988 | + if (hdmi_slot % 2 != 0 && stream_channel == 0xf) | |
| 2989 | + return 0; | |
| 2990 | + | |
| 2991 | + hdmi_slot -= hdmi_slot % 2; | |
| 2992 | + | |
| 2993 | + if (stream_channel != 0xf) | |
| 2994 | + stream_channel -= stream_channel % 2; | |
| 2995 | + } | |
| 2996 | + | |
| 2997 | + verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e; | |
| 2998 | + | |
| 2999 | + /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */ | |
| 2567 | 3000 | |
| 2568 | −#define ATIHDMI_CVT_NID 0x02 /* audio converter */ | |
| 2569 | −#define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ | |
| 3001 | + if (stream_channel != 0xf) | |
| 3002 | + ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE; | |
| 2570 | 3003 | |
| 2571 | −static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, | |
| 2572 | − struct hda_codec *codec, | |
| 2573 | − unsigned int stream_tag, | |
| 2574 | − unsigned int format, | |
| 2575 | − struct snd_pcm_substream *substream) | |
| 3004 | + return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup); | |
| 3005 | +} | |
| 3006 | + | |
| 3007 | +static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 3008 | + int asp_slot) | |
| 3009 | +{ | |
| 3010 | + bool was_odd = false; | |
| 3011 | + int ati_asp_slot = asp_slot; | |
| 3012 | + int verb; | |
| 3013 | + int ati_channel_setup; | |
| 3014 | + | |
| 3015 | + if (asp_slot > 7) | |
| 3016 | + return -EINVAL; | |
| 3017 | + | |
| 3018 | + if (!has_amd_full_remap_support(codec)) { | |
| 3019 | + ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot); | |
| 3020 | + if (ati_asp_slot % 2 != 0) { | |
| 3021 | + ati_asp_slot -= 1; | |
| 3022 | + was_odd = true; | |
| 3023 | + } | |
| 3024 | + } | |
| 3025 | + | |
| 3026 | + verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e; | |
| 3027 | + | |
| 3028 | + ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0); | |
| 3029 | + | |
| 3030 | + if (!(ati_channel_setup & ATI_OUT_ENABLE)) | |
| 3031 | + return 0xf; | |
| 3032 | + | |
| 3033 | + return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd; | |
| 3034 | +} | |
| 3035 | + | |
| 3036 | +static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap, | |
| 3037 | + int channels) | |
| 3038 | +{ | |
| 3039 | + int c; | |
| 3040 | + | |
| 3041 | + /* | |
| 3042 | + * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so | |
| 3043 | + * we need to take that into account (a single channel may take 2 | |
| 3044 | + * channel slots if we need to carry a silent channel next to it). | |
| 3045 | + * On Rev3+ AMD codecs this function is not used. | |
| 3046 | + */ | |
| 3047 | + int chanpairs = 0; | |
| 3048 | + | |
| 3049 | + /* We only produce even-numbered channel count TLVs */ | |
| 3050 | + if ((channels % 2) != 0) | |
| 3051 | + return -1; | |
| 3052 | + | |
| 3053 | + for (c = 0; c < 7; c += 2) { | |
| 3054 | + if (cap->speakers[c] || cap->speakers[c+1]) | |
| 3055 | + chanpairs++; | |
| 3056 | + } | |
| 3057 | + | |
| 3058 | + if (chanpairs * 2 != channels) | |
| 3059 | + return -1; | |
| 3060 | + | |
| 3061 | + return SNDRV_CTL_TLVT_CHMAP_PAIRED; | |
| 3062 | +} | |
| 3063 | + | |
| 3064 | +static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap, | |
| 3065 | + unsigned int *chmap, int channels) | |
| 3066 | +{ | |
| 3067 | + /* produce paired maps for pre-rev3 ATI/AMD codecs */ | |
| 3068 | + int count = 0; | |
| 3069 | + int c; | |
| 3070 | + | |
| 3071 | + for (c = 7; c >= 0; c--) { | |
| 3072 | + int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c); | |
| 3073 | + int spk = cap->speakers[chan]; | |
| 3074 | + if (!spk) { | |
| 3075 | + /* add N/A channel if the companion channel is occupied */ | |
| 3076 | + if (cap->speakers[chan + (chan % 2 ? -1 : 1)]) | |
| 3077 | + chmap[count++] = SNDRV_CHMAP_NA; | |
| 3078 | + | |
| 3079 | + continue; | |
| 3080 | + } | |
| 3081 | + | |
| 3082 | + chmap[count++] = spk_to_chmap(spk); | |
| 3083 | + } | |
| 3084 | + | |
| 3085 | + WARN_ON(count != channels); | |
| 3086 | +} | |
| 3087 | + | |
| 3088 | +static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid, | |
| 3089 | + bool hbr) | |
| 3090 | +{ | |
| 3091 | + int hbr_ctl, hbr_ctl_new; | |
| 3092 | + | |
| 3093 | + hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0); | |
| 3094 | + if (hbr_ctl & ATI_HBR_CAPABLE) { | |
| 3095 | + if (hbr) | |
| 3096 | + hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE; | |
| 3097 | + else | |
| 3098 | + hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE; | |
| 3099 | + | |
| 3100 | + snd_printdd("atihdmi_pin_hbr_setup: " | |
| 3101 | + "NID=0x%x, %shbr-ctl=0x%x\n", | |
| 3102 | + pin_nid, | |
| 3103 | + hbr_ctl == hbr_ctl_new ? "" : "new-", | |
| 3104 | + hbr_ctl_new); | |
| 3105 | + | |
| 3106 | + if (hbr_ctl != hbr_ctl_new) | |
| 3107 | + snd_hda_codec_write(codec, pin_nid, 0, | |
| 3108 | + ATI_VERB_SET_HBR_CONTROL, | |
| 3109 | + hbr_ctl_new); | |
| 3110 | + | |
| 3111 | + } else if (hbr) | |
| 3112 | + return -EINVAL; | |
| 3113 | + | |
| 3114 | + return 0; | |
| 3115 | +} | |
| 3116 | + | |
| 3117 | +static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, | |
| 3118 | + hda_nid_t pin_nid, u32 stream_tag, int format) | |
| 3119 | +{ | |
| 3120 | + | |
| 3121 | + if (is_amdhdmi_rev3_or_later(codec)) { | |
| 3122 | + int ramp_rate = 180; /* default as per AMD spec */ | |
| 3123 | + /* disable ramp-up/down for non-pcm as per AMD spec */ | |
| 3124 | + if (format & AC_FMT_TYPE_NON_PCM) | |
| 3125 | + ramp_rate = 0; | |
| 3126 | + | |
| 3127 | + snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate); | |
| 3128 | + } | |
| 3129 | + | |
| 3130 | + return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); | |
| 3131 | +} | |
| 3132 | + | |
| 3133 | + | |
| 3134 | +static int atihdmi_init(struct hda_codec *codec) | |
| 2576 | 3135 | { |
| 2577 | 3136 | struct hdmi_spec *spec = codec->spec; |
| 2578 | − struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0); | |
| 2579 | − int chans = substream->runtime->channels; | |
| 2580 | − int i, err; | |
| 3137 | + int pin_idx, err; | |
| 2581 | 3138 | |
| 2582 | − err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, | |
| 2583 | − substream); | |
| 2584 | − if (err < 0) | |
| 3139 | + err = generic_hdmi_init(codec); | |
| 3140 | + | |
| 3141 | + if (err) | |
| 2585 | 3142 | return err; |
| 2586 | − snd_hda_codec_write(codec, per_cvt->cvt_nid, 0, | |
| 2587 | − AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); | |
| 2588 | − /* FIXME: XXX */ | |
| 2589 | − for (i = 0; i < chans; i++) { | |
| 2590 | − snd_hda_codec_write(codec, per_cvt->cvt_nid, 0, | |
| 2591 | − AC_VERB_SET_HDMI_CHAN_SLOT, | |
| 2592 | − (i << 4) | i); | |
| 3143 | + | |
| 3144 | + for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { | |
| 3145 | + struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); | |
| 3146 | + | |
| 3147 | + /* make sure downmix information in infoframe is zero */ | |
| 3148 | + snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0); | |
| 3149 | + | |
| 3150 | + /* enable channel-wise remap mode if supported */ | |
| 3151 | + if (has_amd_full_remap_support(codec)) | |
| 3152 | + snd_hda_codec_write(codec, per_pin->pin_nid, 0, | |
| 3153 | + ATI_VERB_SET_MULTICHANNEL_MODE, | |
| 3154 | + ATI_MULTICHANNEL_MODE_SINGLE); | |
| 2593 | 3155 | } |
| 3156 | + | |
| 2594 | 3157 | return 0; |
| 2595 | 3158 | } |
| 2596 | 3159 | |
| 2597 | 3160 | static int patch_atihdmi(struct hda_codec *codec) |
| 2598 | 3161 | { |
| 2599 | 3162 | struct hdmi_spec *spec; |
| 2600 | − int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID); | |
| 2601 | − if (err < 0) | |
| 3163 | + struct hdmi_spec_per_cvt *per_cvt; | |
| 3164 | + int err, cvt_idx; | |
| 3165 | + | |
| 3166 | + err = patch_generic_hdmi(codec); | |
| 3167 | + | |
| 3168 | + if (err) | |
| 2602 | 3169 | return err; |
| 3170 | + | |
| 3171 | + codec->patch_ops.init = atihdmi_init; | |
| 3172 | + | |
| 2603 | 3173 | spec = codec->spec; |
| 2604 | − spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare; | |
| 3174 | + | |
| 3175 | + spec->ops.pin_get_eld = atihdmi_pin_get_eld; | |
| 3176 | + spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel; | |
| 3177 | + spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel; | |
| 3178 | + spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe; | |
| 3179 | + spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup; | |
| 3180 | + spec->ops.setup_stream = atihdmi_setup_stream; | |
| 3181 | + | |
| 3182 | + if (!has_amd_full_remap_support(codec)) { | |
| 3183 | + /* override to ATI/AMD-specific versions with pairwise mapping */ | |
| 3184 | + spec->ops.chmap_cea_alloc_validate_get_type = | |
| 3185 | + atihdmi_paired_chmap_cea_alloc_validate_get_type; | |
| 3186 | + spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap; | |
| 3187 | + spec->ops.chmap_validate = atihdmi_paired_chmap_validate; | |
| 3188 | + } | |
| 3189 | + | |
| 3190 | + /* ATI/AMD converters do not advertise all of their capabilities */ | |
| 3191 | + for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { | |
| 3192 | + per_cvt = get_cvt(spec, cvt_idx); | |
| 3193 | + per_cvt->channels_max = max(per_cvt->channels_max, 8u); | |
| 3194 | + per_cvt->rates |= SUPPORTED_RATES; | |
| 3195 | + per_cvt->formats |= SUPPORTED_FORMATS; | |
| 3196 | + per_cvt->maxbps = max(per_cvt->maxbps, 24u); | |
| 3197 | + } | |
| 3198 | + | |
| 3199 | + spec->channels_max = max(spec->channels_max, 8u); | |
| 3200 | + | |
| 2605 | 3201 | return 0; |
| 2606 | 3202 | } |
| 2607 | 3203 | |
| @@ -2621,7 +3217,7 @@ static const struct hda_codec_preset snd_hda_preset_hdmi[] = { · 13 unmodified lines | ||
| 2621 | 3217 | { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, |
| 2622 | 3218 | { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, |
| 2623 | 3219 | { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, |
| 2624 | −{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, | |
| 3220 | +{ .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_atihdmi }, | |
| 2625 | 3221 | { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, |
| 2626 | 3222 | { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, |
| 2627 | 3223 | { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, |
| @@ -2630,30 +3226,30 @@ static const struct hda_codec_preset snd_hda_preset_hdmi[] = { · 2 unmodified lines | ||
| 2630 | 3226 | { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, |
| 2631 | 3227 | { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, |
| 2632 | 3228 | { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, |
| 2633 | −{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2634 | −{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2635 | −{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, | |
| 2636 | −{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2637 | −{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2638 | −{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2639 | −{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2640 | −{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2641 | −{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2642 | −{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2643 | −{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 3229 | +{ .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_nvhdmi }, | |
| 3230 | +{ .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_nvhdmi }, | |
| 3231 | +{ .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_nvhdmi }, | |
| 3232 | +{ .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_nvhdmi }, | |
| 3233 | +{ .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3234 | +{ .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3235 | +{ .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3236 | +{ .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3237 | +{ .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3238 | +{ .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3239 | +{ .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_nvhdmi }, | |
| 2644 | 3240 | /* 17 is known to be absent */ |
| 2645 | −{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2646 | −{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2647 | −{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2648 | −{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2649 | −{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2650 | −{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2651 | −{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2652 | −{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2653 | −{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2654 | −{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2655 | −{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 2656 | −{ .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi }, | |
| 3241 | +{ .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3242 | +{ .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3243 | +{ .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_nvhdmi }, | |
| 3244 | +{ .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_nvhdmi }, | |
| 3245 | +{ .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_nvhdmi }, | |
| 3246 | +{ .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3247 | +{ .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3248 | +{ .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3249 | +{ .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3250 | +{ .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3251 | +{ .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_nvhdmi }, | |
| 3252 | +{ .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_nvhdmi }, | |
| 2657 | 3253 | { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, |
| 2658 | 3254 | { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, |
| 2659 | 3255 | { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, |
| @@ -2669,6 +3265,7 @@ static const struct hda_codec_preset snd_hda_preset_hdmi[] = { · 9 unmodified lines | ||
| 2669 | 3265 | { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, |
| 2670 | 3266 | { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, |
| 2671 | 3267 | { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, |
| 3268 | +{ .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi }, | |
| 2672 | 3269 | { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, |
| 2673 | 3270 | {} /* terminator */ |
| 2674 | 3271 | }; |
| @@ -2723,6 +3320,7 @@ MODULE_ALIAS("snd-hda-codec-id:80862805"); · 48 unmodified lines | ||
| 2723 | 3320 | MODULE_ALIAS("snd-hda-codec-id:80862806"); |
| 2724 | 3321 | MODULE_ALIAS("snd-hda-codec-id:80862807"); |
| 2725 | 3322 | MODULE_ALIAS("snd-hda-codec-id:80862880"); |
| 3323 | +MODULE_ALIAS("snd-hda-codec-id:80862882"); | |
| 2726 | 3324 | MODULE_ALIAS("snd-hda-codec-id:808629fb"); |
| 2727 | 3325 | |
| 2728 | 3326 | MODULE_LICENSE("GPL"); |
| @@ -554,8 +554,6 @@ do_sku: · 553 unmodified lines | ||
| 554 | 554 | nid = portd; |
| 555 | 555 | else if (tmp == 3) |
| 556 | 556 | nid = porti; |
| 557 | − else | |
| 558 | − return 1; | |
| 559 | 557 | if (found_in_nid_list(nid, spec->gen.autocfg.line_out_pins, |
| 560 | 558 | spec->gen.autocfg.line_outs)) |
| 561 | 559 | return 1; |
| @@ -579,26 +577,35 @@ static void alc_ssid_check(struct hda_codec *codec, const hda_nid_t *ports) · 17 unmodified lines | ||
| 579 | 577 | /* |
| 580 | 578 | * COEF access helper functions |
| 581 | 579 | */ |
| 582 | −static int alc_read_coef_idx(struct hda_codec *codec, | |
| 583 | − unsigned int coef_idx) | |
| 580 | + | |
| 581 | +static int alc_read_coefex_idx(struct hda_codec *codec, | |
| 582 | + hda_nid_t nid, | |
| 583 | + unsigned int coef_idx) | |
| 584 | 584 | { |
| 585 | 585 | unsigned int val; |
| 586 | − snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, | |
| 586 | + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, | |
| 587 | 587 | coef_idx); |
| 588 | − val = snd_hda_codec_read(codec, 0x20, 0, | |
| 588 | + val = snd_hda_codec_read(codec, nid, 0, | |
| 589 | 589 | AC_VERB_GET_PROC_COEF, 0); |
| 590 | 590 | return val; |
| 591 | 591 | } |
| 592 | 592 | |
| 593 | −static void alc_write_coef_idx(struct hda_codec *codec, unsigned int coef_idx, | |
| 593 | +#define alc_read_coef_idx(codec, coef_idx) \ | |
| 594 | + alc_read_coefex_idx(codec, 0x20, coef_idx) | |
| 595 | + | |
| 596 | +static void alc_write_coefex_idx(struct hda_codec *codec, hda_nid_t nid, | |
| 597 | + unsigned int coef_idx, | |
| 594 | 598 | unsigned int coef_val) |
| 595 | 599 | { |
| 596 | − snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_COEF_INDEX, | |
| 600 | + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, | |
| 597 | 601 | coef_idx); |
| 598 | − snd_hda_codec_write(codec, 0x20, 0, AC_VERB_SET_PROC_COEF, | |
| 602 | + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, | |
| 599 | 603 | coef_val); |
| 600 | 604 | } |
| 601 | 605 | |
| 606 | +#define alc_write_coef_idx(codec, coef_idx, coef_val) \ | |
| 607 | + alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val) | |
| 608 | + | |
| 602 | 609 | /* a special bypass for COEF 0; read the cached value at the second time */ |
| 603 | 610 | static unsigned int alc_get_coef0(struct hda_codec *codec) |
| 604 | 611 | { |
| @@ -831,7 +838,11 @@ static inline void alc_shutup(struct hda_codec *codec) · 226 unmodified lines | ||
| 831 | 838 | snd_hda_shutup_pins(codec); |
| 832 | 839 | } |
| 833 | 840 | |
| 834 | −#define alc_free snd_hda_gen_free | |
| 841 | +static void alc_free(struct hda_codec *codec) | |
| 842 | +{ | |
| 843 | + snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_FREE); | |
| 844 | + snd_hda_gen_free(codec); | |
| 845 | +} | |
| 835 | 846 | |
| 836 | 847 | #ifdef CONFIG_PM |
| 837 | 848 | static void alc_power_eapd(struct hda_codec *codec) |
| @@ -1043,6 +1054,7 @@ enum { · 205 unmodified lines | ||
| 1043 | 1054 | ALC880_FIXUP_UNIWILL, |
| 1044 | 1055 | ALC880_FIXUP_UNIWILL_DIG, |
| 1045 | 1056 | ALC880_FIXUP_Z71V, |
| 1057 | + ALC880_FIXUP_ASUS_W5A, | |
| 1046 | 1058 | ALC880_FIXUP_3ST_BASE, |
| 1047 | 1059 | ALC880_FIXUP_3ST, |
| 1048 | 1060 | ALC880_FIXUP_3ST_DIG, |
| @@ -1213,6 +1225,26 @@ static const struct hda_fixup alc880_fixups[] = { · 164 unmodified lines | ||
| 1213 | 1225 | { } |
| 1214 | 1226 | } |
| 1215 | 1227 | }, |
| 1228 | + [ALC880_FIXUP_ASUS_W5A] = { | |
| 1229 | + .type = HDA_FIXUP_PINS, | |
| 1230 | + .v.pins = (const struct hda_pintbl[]) { | |
| 1231 | + /* set up the whole pins as BIOS is utterly broken */ | |
| 1232 | + { 0x14, 0x0121411f }, /* HP */ | |
| 1233 | + { 0x15, 0x411111f0 }, /* N/A */ | |
| 1234 | + { 0x16, 0x411111f0 }, /* N/A */ | |
| 1235 | + { 0x17, 0x411111f0 }, /* N/A */ | |
| 1236 | + { 0x18, 0x90a60160 }, /* mic */ | |
| 1237 | + { 0x19, 0x411111f0 }, /* N/A */ | |
| 1238 | + { 0x1a, 0x411111f0 }, /* N/A */ | |
| 1239 | + { 0x1b, 0x411111f0 }, /* N/A */ | |
| 1240 | + { 0x1c, 0x411111f0 }, /* N/A */ | |
| 1241 | + { 0x1d, 0x411111f0 }, /* N/A */ | |
| 1242 | + { 0x1e, 0xb743111e }, /* SPDIF out */ | |
| 1243 | + { } | |
| 1244 | + }, | |
| 1245 | + .chained = true, | |
| 1246 | + .chain_id = ALC880_FIXUP_GPIO1, | |
| 1247 | + }, | |
| 1216 | 1248 | [ALC880_FIXUP_3ST_BASE] = { |
| 1217 | 1249 | .type = HDA_FIXUP_PINS, |
| 1218 | 1250 | .v.pins = (const struct hda_pintbl[]) { |
| @@ -1334,6 +1366,7 @@ static const struct hda_fixup alc880_fixups[] = { · 115 unmodified lines | ||
| 1334 | 1366 | |
| 1335 | 1367 | static const struct snd_pci_quirk alc880_fixup_tbl[] = { |
| 1336 | 1368 | SND_PCI_QUIRK(0x1019, 0x0f69, "Coeus G610P", ALC880_FIXUP_W810), |
| 1369 | + SND_PCI_QUIRK(0x1043, 0x10c3, "ASUS W5A", ALC880_FIXUP_ASUS_W5A), | |
| 1337 | 1370 | SND_PCI_QUIRK(0x1043, 0x1964, "ASUS Z71V", ALC880_FIXUP_Z71V), |
| 1338 | 1371 | SND_PCI_QUIRK_VENDOR(0x1043, "ASUS", ALC880_FIXUP_GPIO1), |
| 1339 | 1372 | SND_PCI_QUIRK(0x1558, 0x5401, "Clevo GPIO2", ALC880_FIXUP_GPIO2), |
| @@ -2388,6 +2421,7 @@ static const struct hda_verb alc268_beep_init_verbs[] = { · 1048 unmodified lines | ||
| 2388 | 2421 | enum { |
| 2389 | 2422 | ALC268_FIXUP_INV_DMIC, |
| 2390 | 2423 | ALC268_FIXUP_HP_EAPD, |
| 2424 | + ALC268_FIXUP_SPDIF, | |
| 2391 | 2425 | }; |
| 2392 | 2426 | |
| 2393 | 2427 | static const struct hda_fixup alc268_fixups[] = { |
| @@ -2402,6 +2436,13 @@ static const struct hda_fixup alc268_fixups[] = { · 8 unmodified lines | ||
| 2402 | 2436 | {} |
| 2403 | 2437 | } |
| 2404 | 2438 | }, |
| 2439 | + [ALC268_FIXUP_SPDIF] = { | |
| 2440 | + .type = HDA_FIXUP_PINS, | |
| 2441 | + .v.pins = (const struct hda_pintbl[]) { | |
| 2442 | + { 0x1e, 0x014b1180 }, /* enable SPDIF out */ | |
| 2443 | + {} | |
| 2444 | + } | |
| 2445 | + }, | |
| 2405 | 2446 | }; |
| 2406 | 2447 | |
| 2407 | 2448 | static const struct hda_model_fixup alc268_fixup_models[] = { |
| @@ -2411,6 +2452,7 @@ static const struct hda_model_fixup alc268_fixup_models[] = { · 3 unmodified lines | ||
| 2411 | 2452 | }; |
| 2412 | 2453 | |
| 2413 | 2454 | static const struct snd_pci_quirk alc268_fixup_tbl[] = { |
| 2455 | + SND_PCI_QUIRK(0x1025, 0x0139, "Acer TravelMate 6293", ALC268_FIXUP_SPDIF), | |
| 2414 | 2456 | SND_PCI_QUIRK(0x1025, 0x015b, "Acer AOA 150 (ZG5)", ALC268_FIXUP_INV_DMIC), |
| 2415 | 2457 | /* below is codec SSID since multiple Toshiba laptops have the |
| 2416 | 2458 | * same PCI SSID 1179:ff00 |
| @@ -2539,7 +2581,9 @@ enum { · 122 unmodified lines | ||
| 2539 | 2581 | ALC269_TYPE_ALC282, |
| 2540 | 2582 | ALC269_TYPE_ALC283, |
| 2541 | 2583 | ALC269_TYPE_ALC284, |
| 2584 | + ALC269_TYPE_ALC285, | |
| 2542 | 2585 | ALC269_TYPE_ALC286, |
| 2586 | + ALC269_TYPE_ALC255, | |
| 2543 | 2587 | }; |
| 2544 | 2588 | |
| 2545 | 2589 | /* |
| @@ -2558,6 +2602,7 @@ static int alc269_parse_auto_config(struct hda_codec *codec) · 12 unmodified lines | ||
| 2558 | 2602 | case ALC269_TYPE_ALC269VC: |
| 2559 | 2603 | case ALC269_TYPE_ALC280: |
| 2560 | 2604 | case ALC269_TYPE_ALC284: |
| 2605 | + case ALC269_TYPE_ALC285: | |
| 2561 | 2606 | ssids = alc269va_ssids; |
| 2562 | 2607 | break; |
| 2563 | 2608 | case ALC269_TYPE_ALC269VB: |
| @@ -2565,6 +2610,7 @@ static int alc269_parse_auto_config(struct hda_codec *codec) · 1 unmodified line | ||
| 2565 | 2610 | case ALC269_TYPE_ALC282: |
| 2566 | 2611 | case ALC269_TYPE_ALC283: |
| 2567 | 2612 | case ALC269_TYPE_ALC286: |
| 2613 | + case ALC269_TYPE_ALC255: | |
| 2568 | 2614 | ssids = alc269_ssids; |
| 2569 | 2615 | break; |
| 2570 | 2616 | default: |
| @@ -2652,7 +2698,7 @@ static void alc283_shutup(struct hda_codec *codec) · 81 unmodified lines | ||
| 2652 | 2698 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); |
| 2653 | 2699 | |
| 2654 | 2700 | if (hp_pin_sense) |
| 2655 | − msleep(85); | |
| 2701 | + msleep(100); | |
| 2656 | 2702 | |
| 2657 | 2703 | snd_hda_codec_write(codec, hp_pin, 0, |
| 2658 | 2704 | AC_VERB_SET_PIN_WIDGET_CONTROL, 0x0); |
| @@ -2661,7 +2707,7 @@ static void alc283_shutup(struct hda_codec *codec) · 2 unmodified lines | ||
| 2661 | 2707 | alc_write_coef_idx(codec, 0x46, val | (3 << 12)); |
| 2662 | 2708 | |
| 2663 | 2709 | if (hp_pin_sense) |
| 2664 | − msleep(85); | |
| 2710 | + msleep(100); | |
| 2665 | 2711 | snd_hda_shutup_pins(codec); |
| 2666 | 2712 | alc_write_coef_idx(codec, 0x43, 0x9614); |
| 2667 | 2713 | } |
| @@ -2944,6 +2990,23 @@ static void alc269_fixup_mic_mute_hook(void *private_data, int enabled) · 276 unmodified lines | ||
| 2944 | 2990 | snd_hda_set_pin_ctl_cache(codec, spec->mute_led_nid, pinval); |
| 2945 | 2991 | } |
| 2946 | 2992 | |
| 2993 | +/* Make sure the led works even in runtime suspend */ | |
| 2994 | +static unsigned int led_power_filter(struct hda_codec *codec, | |
| 2995 | + hda_nid_t nid, | |
| 2996 | + unsigned int power_state) | |
| 2997 | +{ | |
| 2998 | + struct alc_spec *spec = codec->spec; | |
| 2999 | + | |
| 3000 | + if (power_state != AC_PWRST_D3 || nid != spec->mute_led_nid) | |
| 3001 | + return power_state; | |
| 3002 | + | |
| 3003 | + /* Set pin ctl again, it might have just been set to 0 */ | |
| 3004 | + snd_hda_set_pin_ctl(codec, nid, | |
| 3005 | + snd_hda_codec_get_pin_target(codec, nid)); | |
| 3006 | + | |
| 3007 | + return AC_PWRST_D0; | |
| 3008 | +} | |
| 3009 | + | |
| 2947 | 3010 | static void alc269_fixup_hp_mute_led(struct hda_codec *codec, |
| 2948 | 3011 | const struct hda_fixup *fix, int action) |
| 2949 | 3012 | { |
| @@ -2963,6 +3026,7 @@ static void alc269_fixup_hp_mute_led(struct hda_codec *codec, · 13 unmodified lines | ||
| 2963 | 3026 | spec->mute_led_nid = pin - 0x0a + 0x18; |
| 2964 | 3027 | spec->gen.vmaster_mute.hook = alc269_fixup_mic_mute_hook; |
| 2965 | 3028 | spec->gen.vmaster_mute_enum = 1; |
| 3029 | + codec->power_filter = led_power_filter; | |
| 2966 | 3030 | snd_printd("Detected mute LED for %x:%d\n", spec->mute_led_nid, |
| 2967 | 3031 | spec->mute_led_polarity); |
| 2968 | 3032 | break; |
| @@ -2978,6 +3042,7 @@ static void alc269_fixup_hp_mute_led_mic1(struct hda_codec *codec, · 9 unmodified lines | ||
| 2978 | 3042 | spec->mute_led_nid = 0x18; |
| 2979 | 3043 | spec->gen.vmaster_mute.hook = alc269_fixup_mic_mute_hook; |
| 2980 | 3044 | spec->gen.vmaster_mute_enum = 1; |
| 3045 | + codec->power_filter = led_power_filter; | |
| 2981 | 3046 | } |
| 2982 | 3047 | } |
| 2983 | 3048 | |
| @@ -2990,6 +3055,7 @@ static void alc269_fixup_hp_mute_led_mic2(struct hda_codec *codec, · 6 unmodified lines | ||
| 2990 | 3055 | spec->mute_led_nid = 0x19; |
| 2991 | 3056 | spec->gen.vmaster_mute.hook = alc269_fixup_mic_mute_hook; |
| 2992 | 3057 | spec->gen.vmaster_mute_enum = 1; |
| 3058 | + codec->power_filter = led_power_filter; | |
| 2993 | 3059 | } |
| 2994 | 3060 | } |
| 2995 | 3061 | |
| @@ -3052,6 +3118,19 @@ static void alc_headset_mode_unplugged(struct hda_codec *codec) · 56 unmodified lines | ||
| 3052 | 3118 | int val; |
| 3053 | 3119 | |
| 3054 | 3120 | switch (codec->vendor_id) { |
| 3121 | + case 0x10ec0255: | |
| 3122 | + /* LDO and MISC control */ | |
| 3123 | + alc_write_coef_idx(codec, 0x1b, 0x0c0b); | |
| 3124 | + /* UAJ function set to menual mode */ | |
| 3125 | + alc_write_coef_idx(codec, 0x45, 0xd089); | |
| 3126 | + /* Direct Drive HP Amp control(Set to verb control)*/ | |
| 3127 | + val = alc_read_coefex_idx(codec, 0x57, 0x05); | |
| 3128 | + alc_write_coefex_idx(codec, 0x57, 0x05, val & ~(1<<14)); | |
| 3129 | + /* Set MIC2 Vref gate with HP */ | |
| 3130 | + alc_write_coef_idx(codec, 0x06, 0x6104); | |
| 3131 | + /* Direct Drive HP Amp control */ | |
| 3132 | + alc_write_coefex_idx(codec, 0x57, 0x03, 0x8aa6); | |
| 3133 | + break; | |
| 3055 | 3134 | case 0x10ec0283: |
| 3056 | 3135 | alc_write_coef_idx(codec, 0x1b, 0x0c0b); |
| 3057 | 3136 | alc_write_coef_idx(codec, 0x45, 0xc429); |
| @@ -3083,6 +3162,14 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, · 25 unmodified lines | ||
| 3083 | 3162 | int val; |
| 3084 | 3163 | |
| 3085 | 3164 | switch (codec->vendor_id) { |
| 3165 | + case 0x10ec0255: | |
| 3166 | + alc_write_coef_idx(codec, 0x45, 0xc489); | |
| 3167 | + snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); | |
| 3168 | + alc_write_coefex_idx(codec, 0x57, 0x03, 0x8aa6); | |
| 3169 | + /* Set MIC2 Vref gate to normal */ | |
| 3170 | + alc_write_coef_idx(codec, 0x06, 0x6100); | |
| 3171 | + snd_hda_set_pin_ctl_cache(codec, mic_pin, PIN_VREF50); | |
| 3172 | + break; | |
| 3086 | 3173 | case 0x10ec0283: |
| 3087 | 3174 | alc_write_coef_idx(codec, 0x45, 0xc429); |
| 3088 | 3175 | snd_hda_set_pin_ctl_cache(codec, hp_pin, 0); |
| @@ -3114,6 +3201,12 @@ static void alc_headset_mode_mic_in(struct hda_codec *codec, hda_nid_t hp_pin, · 25 unmodified lines | ||
| 3114 | 3201 | static void alc_headset_mode_default(struct hda_codec *codec) |
| 3115 | 3202 | { |
| 3116 | 3203 | switch (codec->vendor_id) { |
| 3204 | + case 0x10ec0255: | |
| 3205 | + alc_write_coef_idx(codec, 0x45, 0xc089); | |
| 3206 | + alc_write_coef_idx(codec, 0x45, 0xc489); | |
| 3207 | + alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6); | |
| 3208 | + alc_write_coef_idx(codec, 0x49, 0x0049); | |
| 3209 | + break; | |
| 3117 | 3210 | case 0x10ec0283: |
| 3118 | 3211 | alc_write_coef_idx(codec, 0x06, 0x2100); |
| 3119 | 3212 | alc_write_coef_idx(codec, 0x32, 0x4ea3); |
| @@ -3137,6 +3230,12 @@ static void alc_headset_mode_default(struct hda_codec *codec) · 17 unmodified lines | ||
| 3137 | 3230 | static void alc_headset_mode_ctia(struct hda_codec *codec) |
| 3138 | 3231 | { |
| 3139 | 3232 | switch (codec->vendor_id) { |
| 3233 | + case 0x10ec0255: | |
| 3234 | + /* Set to CTIA type */ | |
| 3235 | + alc_write_coef_idx(codec, 0x45, 0xd489); | |
| 3236 | + alc_write_coef_idx(codec, 0x1b, 0x0c2b); | |
| 3237 | + alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6); | |
| 3238 | + break; | |
| 3140 | 3239 | case 0x10ec0283: |
| 3141 | 3240 | alc_write_coef_idx(codec, 0x45, 0xd429); |
| 3142 | 3241 | alc_write_coef_idx(codec, 0x1b, 0x0c2b); |
| @@ -3159,6 +3258,12 @@ static void alc_headset_mode_ctia(struct hda_codec *codec) · 16 unmodified lines | ||
| 3159 | 3258 | static void alc_headset_mode_omtp(struct hda_codec *codec) |
| 3160 | 3259 | { |
| 3161 | 3260 | switch (codec->vendor_id) { |
| 3261 | + case 0x10ec0255: | |
| 3262 | + /* Set to OMTP Type */ | |
| 3263 | + alc_write_coef_idx(codec, 0x45, 0xe489); | |
| 3264 | + alc_write_coef_idx(codec, 0x1b, 0x0c2b); | |
| 3265 | + alc_write_coefex_idx(codec, 0x57, 0x03, 0x8ea6); | |
| 3266 | + break; | |
| 3162 | 3267 | case 0x10ec0283: |
| 3163 | 3268 | alc_write_coef_idx(codec, 0x45, 0xe429); |
| 3164 | 3269 | alc_write_coef_idx(codec, 0x1b, 0x0c2b); |
| @@ -3184,6 +3289,15 @@ static void alc_determine_headset_type(struct hda_codec *codec) · 19 unmodified lines | ||
| 3184 | 3289 | struct alc_spec *spec = codec->spec; |
| 3185 | 3290 | |
| 3186 | 3291 | switch (codec->vendor_id) { |
| 3292 | + case 0x10ec0255: | |
| 3293 | + /* combo jack auto switch control(Check type)*/ | |
| 3294 | + alc_write_coef_idx(codec, 0x45, 0xd089); | |
| 3295 | + /* combo jack auto switch control(Vref conteol) */ | |
| 3296 | + alc_write_coef_idx(codec, 0x49, 0x0149); | |
| 3297 | + msleep(300); | |
| 3298 | + val = alc_read_coef_idx(codec, 0x46); | |
| 3299 | + is_ctia = (val & 0x0070) == 0x0070; | |
| 3300 | + break; | |
| 3187 | 3301 | case 0x10ec0283: |
| 3188 | 3302 | alc_write_coef_idx(codec, 0x45, 0xd029); |
| 3189 | 3303 | msleep(300); |
| @@ -3330,6 +3444,21 @@ static void alc_fixup_headset_mode_no_hp_mic(struct hda_codec *codec, · 140 unmodified lines | ||
| 3330 | 3444 | alc_fixup_headset_mode(codec, fix, action); |
| 3331 | 3445 | } |
| 3332 | 3446 | |
| 3447 | +static void alc_fixup_headset_mode_alc255(struct hda_codec *codec, | |
| 3448 | + const struct hda_fixup *fix, int action) | |
| 3449 | +{ | |
| 3450 | + if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
| 3451 | + /* Set to iphone type */ | |
| 3452 | + alc_write_coef_idx(codec, 0x1b, 0x880b); | |
| 3453 | + alc_write_coef_idx(codec, 0x45, 0xd089); | |
| 3454 | + alc_write_coef_idx(codec, 0x1b, 0x080b); | |
| 3455 | + alc_write_coef_idx(codec, 0x46, 0x0004); | |
| 3456 | + alc_write_coef_idx(codec, 0x1b, 0x0c0b); | |
| 3457 | + msleep(30); | |
| 3458 | + } | |
| 3459 | + alc_fixup_headset_mode(codec, fix, action); | |
| 3460 | +} | |
| 3461 | + | |
| 3333 | 3462 | static void alc_fixup_headset_mode_alc668(struct hda_codec *codec, |
| 3334 | 3463 | const struct hda_fixup *fix, int action) |
| 3335 | 3464 | { |
| @@ -3443,7 +3572,11 @@ static void alc283_fixup_chromebook(struct hda_codec *codec, · 107 unmodified lines | ||
| 3443 | 3572 | switch (action) { |
| 3444 | 3573 | case HDA_FIXUP_ACT_PRE_PROBE: |
| 3445 | 3574 | alc283_chromebook_caps(codec); |
| 3575 | + /* Disable AA-loopback as it causes white noise */ | |
| 3576 | + spec->gen.mixer_nid = 0; | |
| 3446 | 3577 | spec->gen.hp_automute_hook = alc283_hp_automute_hook; |
| 3578 | + break; | |
| 3579 | + case HDA_FIXUP_ACT_INIT: | |
| 3447 | 3580 | /* MIC2-VREF control */ |
| 3448 | 3581 | /* Set to manual mode */ |
| 3449 | 3582 | val = alc_read_coef_idx(codec, 0x06); |
| @@ -3514,6 +3647,74 @@ static void alc290_fixup_mono_speakers(struct hda_codec *codec, · 64 unmodified lines | ||
| 3514 | 3647 | snd_hda_override_wcaps(codec, 0x03, 0); |
| 3515 | 3648 | } |
| 3516 | 3649 | |
| 3650 | +#if IS_ENABLED(CONFIG_THINKPAD_ACPI) | |
| 3651 | + | |
| 3652 | +#include <linux/thinkpad_acpi.h> | |
| 3653 | + | |
| 3654 | +static int (*led_set_func)(int, bool); | |
| 3655 | + | |
| 3656 | +static void update_tpacpi_mute_led(void *private_data, int enabled) | |
| 3657 | +{ | |
| 3658 | + if (led_set_func) | |
| 3659 | + led_set_func(TPACPI_LED_MUTE, !enabled); | |
| 3660 | +} | |
| 3661 | + | |
| 3662 | +static void update_tpacpi_micmute_led(struct hda_codec *codec, | |
| 3663 | + struct snd_ctl_elem_value *ucontrol) | |
| 3664 | +{ | |
| 3665 | + if (!ucontrol || !led_set_func) | |
| 3666 | + return; | |
| 3667 | + if (strcmp("Capture Switch", ucontrol->id.name) == 0 && ucontrol->id.index == 0) { | |
| 3668 | + /* TODO: How do I verify if it's a mono or stereo here? */ | |
| 3669 | + bool val = ucontrol->value.integer.value[0] || ucontrol->value.integer.value[1]; | |
| 3670 | + led_set_func(TPACPI_LED_MICMUTE, !val); | |
| 3671 | + } | |
| 3672 | +} | |
| 3673 | + | |
| 3674 | +static void alc_fixup_thinkpad_acpi(struct hda_codec *codec, | |
| 3675 | + const struct hda_fixup *fix, int action) | |
| 3676 | +{ | |
| 3677 | + struct alc_spec *spec = codec->spec; | |
| 3678 | + bool removefunc = false; | |
| 3679 | + | |
| 3680 | + if (action == HDA_FIXUP_ACT_PROBE) { | |
| 3681 | + if (!led_set_func) | |
| 3682 | + led_set_func = symbol_request(tpacpi_led_set); | |
| 3683 | + if (!led_set_func) { | |
| 3684 | + snd_printk(KERN_WARNING "Failed to find thinkpad-acpi symbol tpacpi_led_set\n"); | |
| 3685 | + return; | |
| 3686 | + } | |
| 3687 | + | |
| 3688 | + removefunc = true; | |
| 3689 | + if (led_set_func(TPACPI_LED_MUTE, false) >= 0) { | |
| 3690 | + spec->gen.vmaster_mute.hook = update_tpacpi_mute_led; | |
| 3691 | + removefunc = false; | |
| 3692 | + } | |
| 3693 | + if (led_set_func(TPACPI_LED_MICMUTE, false) >= 0) { | |
| 3694 | + if (spec->gen.num_adc_nids > 1) | |
| 3695 | + snd_printdd("Skipping micmute LED control due to several ADCs"); | |
| 3696 | + else { | |
| 3697 | + spec->gen.cap_sync_hook = update_tpacpi_micmute_led; | |
| 3698 | + removefunc = false; | |
| 3699 | + } | |
| 3700 | + } | |
| 3701 | + } | |
| 3702 | + | |
| 3703 | + if (led_set_func && (action == HDA_FIXUP_ACT_FREE || removefunc)) { | |
| 3704 | + symbol_put(tpacpi_led_set); | |
| 3705 | + led_set_func = NULL; | |
| 3706 | + } | |
| 3707 | +} | |
| 3708 | + | |
| 3709 | +#else | |
| 3710 | + | |
| 3711 | +static void alc_fixup_thinkpad_acpi(struct hda_codec *codec, | |
| 3712 | + const struct hda_fixup *fix, int action) | |
| 3713 | +{ | |
| 3714 | +} | |
| 3715 | + | |
| 3716 | +#endif | |
| 3717 | + | |
| 3517 | 3718 | enum { |
| 3518 | 3719 | ALC269_FIXUP_SONY_VAIO, |
| 3519 | 3720 | ALC275_FIXUP_SONY_VAIO_GPIO2, |
| @@ -3552,11 +3753,15 @@ enum { · 32 unmodified lines | ||
| 3552 | 3753 | ALC271_FIXUP_HP_GATE_MIC_JACK, |
| 3553 | 3754 | ALC269_FIXUP_ACER_AC700, |
| 3554 | 3755 | ALC269_FIXUP_LIMIT_INT_MIC_BOOST, |
| 3756 | + ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED, | |
| 3555 | 3757 | ALC269VB_FIXUP_ORDISSIMO_EVE2, |
| 3556 | 3758 | ALC283_FIXUP_CHROME_BOOK, |
| 3557 | 3759 | ALC282_FIXUP_ASUS_TX300, |
| 3558 | 3760 | ALC283_FIXUP_INT_MIC, |
| 3559 | 3761 | ALC290_FIXUP_MONO_SPEAKERS, |
| 3762 | + ALC269_FIXUP_THINKPAD_ACPI, | |
| 3763 | + ALC255_FIXUP_DELL1_MIC_NO_PRESENCE, | |
| 3764 | + ALC255_FIXUP_HEADSET_MODE, | |
| 3560 | 3765 | }; |
| 3561 | 3766 | |
| 3562 | 3767 | static const struct hda_fixup alc269_fixups[] = { |
| @@ -3821,6 +4026,12 @@ static const struct hda_fixup alc269_fixups[] = { · 258 unmodified lines | ||
| 3821 | 4026 | .type = HDA_FIXUP_FUNC, |
| 3822 | 4027 | .v.func = alc269_fixup_limit_int_mic_boost, |
| 3823 | 4028 | }, |
| 4029 | + [ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED] = { | |
| 4030 | + .type = HDA_FIXUP_FUNC, | |
| 4031 | + .v.func = alc269_fixup_limit_int_mic_boost, | |
| 4032 | + .chained = true, | |
| 4033 | + .chain_id = ALC269_FIXUP_HP_MUTE_LED_MIC1, | |
| 4034 | + }, | |
| 3824 | 4035 | [ALC269VB_FIXUP_ORDISSIMO_EVE2] = { |
| 3825 | 4036 | .type = HDA_FIXUP_PINS, |
| 3826 | 4037 | .v.pins = (const struct hda_pintbl[]) { |
| @@ -3854,6 +4065,26 @@ static const struct hda_fixup alc269_fixups[] = { · 27 unmodified lines | ||
| 3854 | 4065 | .chained = true, |
| 3855 | 4066 | .chain_id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, |
| 3856 | 4067 | }, |
| 4068 | + [ALC269_FIXUP_THINKPAD_ACPI] = { | |
| 4069 | + .type = HDA_FIXUP_FUNC, | |
| 4070 | + .v.func = alc_fixup_thinkpad_acpi, | |
| 4071 | + .chained = true, | |
| 4072 | + .chain_id = ALC269_FIXUP_LIMIT_INT_MIC_BOOST | |
| 4073 | + }, | |
| 4074 | + [ALC255_FIXUP_DELL1_MIC_NO_PRESENCE] = { | |
| 4075 | + .type = HDA_FIXUP_PINS, | |
| 4076 | + .v.pins = (const struct hda_pintbl[]) { | |
| 4077 | + { 0x19, 0x01a1913c }, /* use as headset mic, without its own jack detect */ | |
| 4078 | + { 0x1a, 0x01a1913d }, /* use as headphone mic, without its own jack detect */ | |
| 4079 | + { } | |
| 4080 | + }, | |
| 4081 | + .chained = true, | |
| 4082 | + .chain_id = ALC255_FIXUP_HEADSET_MODE | |
| 4083 | + }, | |
| 4084 | + [ALC255_FIXUP_HEADSET_MODE] = { | |
| 4085 | + .type = HDA_FIXUP_FUNC, | |
| 4086 | + .v.func = alc_fixup_headset_mode_alc255, | |
| 4087 | + }, | |
| 3857 | 4088 | }; |
| 3858 | 4089 | |
| 3859 | 4090 | static const struct snd_pci_quirk alc269_fixup_tbl[] = { |
| @@ -3896,12 +4127,15 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 36 unmodified lines | ||
| 3896 | 4127 | SND_PCI_QUIRK(0x1028, 0x0609, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
| 3897 | 4128 | SND_PCI_QUIRK(0x1028, 0x0613, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), |
| 3898 | 4129 | SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_MONO_SPEAKERS), |
| 4130 | + SND_PCI_QUIRK(0x1028, 0x061f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | |
| 4131 | + SND_PCI_QUIRK(0x1028, 0x063f, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE), | |
| 3899 | 4132 | SND_PCI_QUIRK(0x1028, 0x15cc, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
| 3900 | 4133 | SND_PCI_QUIRK(0x1028, 0x15cd, "Dell X5 Precision", ALC269_FIXUP_DELL2_MIC_NO_PRESENCE), |
| 3901 | 4134 | SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), |
| 3902 | 4135 | SND_PCI_QUIRK(0x103c, 0x18e6, "HP", ALC269_FIXUP_HP_GPIO_LED), |
| 3903 | 4136 | SND_PCI_QUIRK(0x103c, 0x1973, "HP Pavilion", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
| 3904 | 4137 | SND_PCI_QUIRK(0x103c, 0x1983, "HP Pavilion", ALC269_FIXUP_HP_MUTE_LED_MIC1), |
| 4138 | + SND_PCI_QUIRK(0x103c, 0x218b, "HP", ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED), | |
| 3905 | 4139 | SND_PCI_QUIRK(0x103c, 0x21ed, "HP Falco Chromebook", ALC283_FIXUP_CHROME_BOOK), |
| 3906 | 4140 | SND_PCI_QUIRK_VENDOR(0x103c, "HP", ALC269_FIXUP_HP_MUTE_LED), |
| 3907 | 4141 | SND_PCI_QUIRK(0x1043, 0x103f, "ASUS TX300", ALC282_FIXUP_ASUS_TX300), |
| @@ -3937,7 +4171,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 29 unmodified lines | ||
| 3937 | 4171 | SND_PCI_QUIRK(0x17aa, 0x2208, "Thinkpad T431s", ALC269_FIXUP_LENOVO_DOCK), |
| 3938 | 4172 | SND_PCI_QUIRK(0x17aa, 0x220c, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
| 3939 | 4173 | SND_PCI_QUIRK(0x17aa, 0x2212, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
| 3940 | − SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), | |
| 4174 | + SND_PCI_QUIRK(0x17aa, 0x2214, "Thinkpad", ALC269_FIXUP_THINKPAD_ACPI), | |
| 3941 | 4175 | SND_PCI_QUIRK(0x17aa, 0x2215, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
| 3942 | 4176 | SND_PCI_QUIRK(0x17aa, 0x5013, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST), |
| 3943 | 4177 | SND_PCI_QUIRK(0x17aa, 0x501a, "Thinkpad", ALC283_FIXUP_INT_MIC), |
| @@ -4125,9 +4359,16 @@ static int patch_alc269(struct hda_codec *codec) · 181 unmodified lines | ||
| 4125 | 4359 | case 0x10ec0292: |
| 4126 | 4360 | spec->codec_variant = ALC269_TYPE_ALC284; |
| 4127 | 4361 | break; |
| 4362 | + case 0x10ec0285: | |
| 4363 | + case 0x10ec0293: | |
| 4364 | + spec->codec_variant = ALC269_TYPE_ALC285; | |
| 4365 | + break; | |
| 4128 | 4366 | case 0x10ec0286: |
| 4129 | 4367 | spec->codec_variant = ALC269_TYPE_ALC286; |
| 4130 | 4368 | break; |
| 4369 | + case 0x10ec0255: | |
| 4370 | + spec->codec_variant = ALC269_TYPE_ALC255; | |
| 4371 | + break; | |
| 4131 | 4372 | } |
| 4132 | 4373 | |
| 4133 | 4374 | if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) { |
| @@ -4415,6 +4656,25 @@ static void alc272_fixup_mario(struct hda_codec *codec, · 281 unmodified lines | ||
| 4415 | 4656 | "hda_codec: failed to override amp caps for NID 0x2\n"); |
| 4416 | 4657 | } |
| 4417 | 4658 | |
| 4659 | +static const struct snd_pcm_chmap_elem asus_pcm_2_1_chmaps[] = { | |
| 4660 | + { .channels = 2, | |
| 4661 | + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR } }, | |
| 4662 | + { .channels = 4, | |
| 4663 | + .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_FR, | |
| 4664 | + SNDRV_CHMAP_NA, SNDRV_CHMAP_LFE } }, /* LFE only on right */ | |
| 4665 | + { } | |
| 4666 | +}; | |
| 4667 | + | |
| 4668 | +/* override the 2.1 chmap */ | |
| 4669 | +static void alc662_fixup_bass_chmap(struct hda_codec *codec, | |
| 4670 | + const struct hda_fixup *fix, int action) | |
| 4671 | +{ | |
| 4672 | + if (action == HDA_FIXUP_ACT_BUILD) { | |
| 4673 | + struct alc_spec *spec = codec->spec; | |
| 4674 | + spec->gen.pcm_rec[0].stream[0].chmap = asus_pcm_2_1_chmaps; | |
| 4675 | + } | |
| 4676 | +} | |
| 4677 | + | |
| 4418 | 4678 | enum { |
| 4419 | 4679 | ALC662_FIXUP_ASPIRE, |
| 4420 | 4680 | ALC662_FIXUP_IDEAPAD, |
| @@ -4435,6 +4695,7 @@ enum { · 14 unmodified lines | ||
| 4435 | 4695 | ALC662_FIXUP_INV_DMIC, |
| 4436 | 4696 | ALC668_FIXUP_DELL_MIC_NO_PRESENCE, |
| 4437 | 4697 | ALC668_FIXUP_HEADSET_MODE, |
| 4698 | + ALC662_FIXUP_BASS_CHMAP, | |
| 4438 | 4699 | }; |
| 4439 | 4700 | |
| 4440 | 4701 | static const struct hda_fixup alc662_fixups[] = { |
| @@ -4609,6 +4870,12 @@ static const struct hda_fixup alc662_fixups[] = { · 168 unmodified lines | ||
| 4609 | 4870 | .type = HDA_FIXUP_FUNC, |
| 4610 | 4871 | .v.func = alc_fixup_headset_mode_alc668, |
| 4611 | 4872 | }, |
| 4873 | + [ALC662_FIXUP_BASS_CHMAP] = { | |
| 4874 | + .type = HDA_FIXUP_FUNC, | |
| 4875 | + .v.func = alc662_fixup_bass_chmap, | |
| 4876 | + .chained = true, | |
| 4877 | + .chain_id = ALC662_FIXUP_ASUS_MODE4 | |
| 4878 | + }, | |
| 4612 | 4879 | }; |
| 4613 | 4880 | |
| 4614 | 4881 | static const struct snd_pci_quirk alc662_fixup_tbl[] = { |
| @@ -4621,9 +4888,10 @@ static const struct snd_pci_quirk alc662_fixup_tbl[] = { · 6 unmodified lines | ||
| 4621 | 4888 | SND_PCI_QUIRK(0x1025, 0x038b, "Acer Aspire 8943G", ALC662_FIXUP_ASPIRE), |
| 4622 | 4889 | SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
| 4623 | 4890 | SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), |
| 4891 | + SND_PCI_QUIRK(0x1028, 0x0626, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), | |
| 4624 | 4892 | SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), |
| 4625 | − SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_ASUS_MODE4), | |
| 4626 | − SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_ASUS_MODE4), | |
| 4893 | + SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_BASS_CHMAP), | |
| 4894 | + SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_BASS_CHMAP), | |
| 4627 | 4895 | SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT), |
| 4628 | 4896 | SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_FIXUP_ASUS_MODE2), |
| 4629 | 4897 | SND_PCI_QUIRK(0x144d, 0xc051, "Samsung R720", ALC662_FIXUP_IDEAPAD), |
| @@ -4842,6 +5110,7 @@ static int patch_alc680(struct hda_codec *codec) · 212 unmodified lines | ||
| 4842 | 5110 | static const struct hda_codec_preset snd_hda_preset_realtek[] = { |
| 4843 | 5111 | { .id = 0x10ec0221, .name = "ALC221", .patch = patch_alc269 }, |
| 4844 | 5112 | { .id = 0x10ec0233, .name = "ALC233", .patch = patch_alc269 }, |
| 5113 | + { .id = 0x10ec0255, .name = "ALC255", .patch = patch_alc269 }, | |
| 4845 | 5114 | { .id = 0x10ec0260, .name = "ALC260", .patch = patch_alc260 }, |
| 4846 | 5115 | { .id = 0x10ec0262, .name = "ALC262", .patch = patch_alc262 }, |
| 4847 | 5116 | { .id = 0x10ec0267, .name = "ALC267", .patch = patch_alc268 }, |
| @@ -4855,9 +5124,11 @@ static const struct hda_codec_preset snd_hda_preset_realtek[] = { · 7 unmodified lines | ||
| 4855 | 5124 | { .id = 0x10ec0282, .name = "ALC282", .patch = patch_alc269 }, |
| 4856 | 5125 | { .id = 0x10ec0283, .name = "ALC283", .patch = patch_alc269 }, |
| 4857 | 5126 | { .id = 0x10ec0284, .name = "ALC284", .patch = patch_alc269 }, |
| 5127 | + { .id = 0x10ec0285, .name = "ALC285", .patch = patch_alc269 }, | |
| 4858 | 5128 | { .id = 0x10ec0286, .name = "ALC286", .patch = patch_alc269 }, |
| 4859 | 5129 | { .id = 0x10ec0290, .name = "ALC290", .patch = patch_alc269 }, |
| 4860 | 5130 | { .id = 0x10ec0292, .name = "ALC292", .patch = patch_alc269 }, |
| 5131 | + { .id = 0x10ec0293, .name = "ALC293", .patch = patch_alc269 }, | |
| 4861 | 5132 | { .id = 0x10ec0861, .rev = 0x100340, .name = "ALC660", |
| 4862 | 5133 | .patch = patch_alc861 }, |
| 4863 | 5134 | { .id = 0x10ec0660, .name = "ALC660-VD", .patch = patch_alc861vd }, |
| @@ -2091,8 +2091,10 @@ static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, · 2090 unmodified lines | ||
| 2091 | 2091 | { |
| 2092 | 2092 | struct sigmatel_spec *spec = codec->spec; |
| 2093 | 2093 | |
| 2094 | − if (action == HDA_FIXUP_ACT_PRE_PROBE) | |
| 2094 | + if (action == HDA_FIXUP_ACT_PRE_PROBE) { | |
| 2095 | 2095 | spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ |
| 2096 | + codec->bus->avoid_link_reset = 1; | |
| 2097 | + } | |
| 2096 | 2098 | } |
| 2097 | 2099 | |
| 2098 | 2100 | static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, |
| @@ -203,12 +203,12 @@ static void psc724_set_jack_state(struct snd_ice1712 *ice, bool hp_connected) · 202 unmodified lines | ||
| 203 | 203 | /* notify about master speaker mute change */ |
| 204 | 204 | memset(&elem_id, 0, sizeof(elem_id)); |
| 205 | 205 | elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 206 | − strncpy(elem_id.name, "Master Speakers Playback Switch", | |
| 206 | + strlcpy(elem_id.name, "Master Speakers Playback Switch", | |
| 207 | 207 | sizeof(elem_id.name)); |
| 208 | 208 | kctl = snd_ctl_find_id(ice->card, &elem_id); |
| 209 | 209 | snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &kctl->id); |
| 210 | 210 | /* and headphone mute change */ |
| 211 | − strncpy(elem_id.name, spec->wm8776.ctl[WM8776_CTL_HP_SW].name, | |
| 211 | + strlcpy(elem_id.name, spec->wm8776.ctl[WM8776_CTL_HP_SW].name, | |
| 212 | 212 | sizeof(elem_id.name)); |
| 213 | 213 | kctl = snd_ctl_find_id(ice->card, &elem_id); |
| 214 | 214 | snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &kctl->id); |
| @@ -203,6 +203,7 @@ static const char * const ext_clock_names[3] = {"IEC958 In", "Word Clock 1xFS", · 202 unmodified lines | ||
| 203 | 203 | #define AK4620_DEEMVOL_REG 0x03 |
| 204 | 204 | #define AK4620_SMUTE (1<<7) |
| 205 | 205 | |
| 206 | +#ifdef CONFIG_PROC_FS | |
| 206 | 207 | /* |
| 207 | 208 | * Conversion from int value to its binary form. Used for debugging. |
| 208 | 209 | * The output buffer must be allocated prior to calling the function. |
| @@ -227,6 +228,7 @@ static char *get_binary(char *buffer, int value) · 18 unmodified lines | ||
| 227 | 228 | buffer[pos] = '\0'; |
| 228 | 229 | return buffer; |
| 229 | 230 | } |
| 231 | +#endif /* CONFIG_PROC_FS */ | |
| 230 | 232 | |
| 231 | 233 | /* |
| 232 | 234 | * Initial setup of the conversion array GPIO <-> rate |
| @@ -253,7 +253,8 @@ static int snd_wm8766_ctl_get(struct snd_kcontrol *kcontrol, · 252 unmodified lines | ||
| 253 | 253 | } |
| 254 | 254 | if (wm->ctl[n].flags & WM8766_FLAG_INVERT) { |
| 255 | 255 | val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min); |
| 256 | − val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); | |
| 256 | + if (wm->ctl[n].flags & WM8766_FLAG_STEREO) | |
| 257 | + val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); | |
| 257 | 258 | } |
| 258 | 259 | ucontrol->value.integer.value[0] = val1; |
| 259 | 260 | if (wm->ctl[n].flags & WM8766_FLAG_STEREO) |
| @@ -52,7 +52,7 @@ static void snd_wm8776_activate_ctl(struct snd_wm8776 *wm, · 51 unmodified lines | ||
| 52 | 52 | unsigned int index_offset; |
| 53 | 53 | |
| 54 | 54 | memset(&elem_id, 0, sizeof(elem_id)); |
| 55 | − strncpy(elem_id.name, ctl_name, sizeof(elem_id.name)); | |
| 55 | + strlcpy(elem_id.name, ctl_name, sizeof(elem_id.name)); | |
| 56 | 56 | elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER; |
| 57 | 57 | kctl = snd_ctl_find_id(card, &elem_id); |
| 58 | 58 | if (!kctl) |
| @@ -526,7 +526,8 @@ static int snd_wm8776_ctl_get(struct snd_kcontrol *kcontrol, · 467 unmodified lines | ||
| 526 | 526 | } |
| 527 | 527 | if (wm->ctl[n].flags & WM8776_FLAG_INVERT) { |
| 528 | 528 | val1 = wm->ctl[n].max - (val1 - wm->ctl[n].min); |
| 529 | − val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); | |
| 529 | + if (wm->ctl[n].flags & WM8776_FLAG_STEREO) | |
| 530 | + val2 = wm->ctl[n].max - (val2 - wm->ctl[n].min); | |
| 530 | 531 | } |
| 531 | 532 | ucontrol->value.integer.value[0] = val1; |
| 532 | 533 | if (wm->ctl[n].flags & WM8776_FLAG_STEREO) |
| @@ -1541,17 +1541,16 @@ static int snd_intel8x0_pcm1(struct intel8x0 *chip, int device, · 1540 unmodified lines | ||
| 1541 | 1541 | snd_dma_pci_data(chip->pci), |
| 1542 | 1542 | rec->prealloc_size, rec->prealloc_max_size); |
| 1543 | 1543 | |
| 1544 | − if (rec->ac97_idx == ICHD_PCMOUT && rec->playback_ops) { | |
| 1544 | + if (rec->playback_ops && | |
| 1545 | + rec->playback_ops->open == snd_intel8x0_playback_open) { | |
| 1545 | 1546 | struct snd_pcm_chmap *chmap; |
| 1546 | 1547 | int chs = 2; |
| 1547 | − if (rec->ac97_idx == ICHD_PCMOUT) { | |
| 1548 | − if (chip->multi8) | |
| 1549 | − chs = 8; | |
| 1550 | − else if (chip->multi6) | |
| 1551 | − chs = 6; | |
| 1552 | − else if (chip->multi4) | |
| 1553 | − chs = 4; | |
| 1554 | − } | |
| 1548 | + if (chip->multi8) | |
| 1549 | + chs = 8; | |
| 1550 | + else if (chip->multi6) | |
| 1551 | + chs = 6; | |
| 1552 | + else if (chip->multi4) | |
| 1553 | + chs = 4; | |
| 1555 | 1554 | err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, |
| 1556 | 1555 | snd_pcm_alt_chmaps, chs, 0, |
| 1557 | 1556 | &chmap); |
| @@ -463,7 +463,7 @@ static int lola_parse_tree(struct lola *chip) · 462 unmodified lines | ||
| 463 | 463 | |
| 464 | 464 | err = lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val); |
| 465 | 465 | if (err < 0) { |
| 466 | − printk(KERN_ERR SFX "Can't read FUNCTION_TYPE for 0x%x\n", nid); | |
| 466 | + printk(KERN_ERR SFX "Can't read FUNCTION_TYPE\n"); | |
| 467 | 467 | return err; |
| 468 | 468 | } |
| 469 | 469 | if (val != 1) { |
| @@ -453,8 +453,8 @@ static void lx_trigger_start(struct lx6464es *chip, struct lx_stream *lx_stream) · 452 unmodified lines | ||
| 453 | 453 | lower_32_bits(buf), upper_32_bits(buf), |
| 454 | 454 | &buffer_index); |
| 455 | 455 | |
| 456 | − snd_printdd(LXP "starting: buffer index %x on %p (%d bytes)\n", | |
| 457 | − buffer_index, (void *)buf, period_bytes); | |
| 456 | + snd_printdd(LXP "starting: buffer index %x on 0x%lx (%d bytes)\n", | |
| 457 | + buffer_index, (unsigned long)buf, period_bytes); | |
| 458 | 458 | buf += period_bytes; |
| 459 | 459 | } |
| 460 | 460 | |
| @@ -1191,8 +1191,8 @@ static int lx_interrupt_request_new_buffer(struct lx6464es *chip, · 1190 unmodified lines | ||
| 1191 | 1191 | unpack_pointer(buf, &buf_lo, &buf_hi); |
| 1192 | 1192 | err = lx_buffer_give(chip, 0, is_capture, period_bytes, buf_lo, buf_hi, |
| 1193 | 1193 | &buffer_index); |
| 1194 | − snd_printdd(LXP "interrupt: gave buffer index %x on %p (%d bytes)\n", | |
| 1195 | − buffer_index, (void *)buf, period_bytes); | |
| 1194 | + snd_printdd(LXP "interrupt: gave buffer index %x on 0x%lx (%d bytes)\n", | |
| 1195 | + buffer_index, (unsigned long)buf, period_bytes); | |
| 1196 | 1196 | |
| 1197 | 1197 | lx_stream->frame_pos = next_pos; |
| 1198 | 1198 | spin_unlock_irqrestore(&chip->lock, flags); |
| @@ -350,9 +350,8 @@ snd_rme96_playback_copy(struct snd_pcm_substream *substream, · 349 unmodified lines | ||
| 350 | 350 | struct rme96 *rme96 = snd_pcm_substream_chip(substream); |
| 351 | 351 | count <<= rme96->playback_frlog; |
| 352 | 352 | pos <<= rme96->playback_frlog; |
| 353 | − copy_from_user_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, src, | |
| 354 | − count); | |
| 355 | − return 0; | |
| 353 | + return copy_from_user_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, src, | |
| 354 | + count); | |
| 356 | 355 | } |
| 357 | 356 | |
| 358 | 357 | static int |
| @@ -365,9 +364,8 @@ snd_rme96_capture_copy(struct snd_pcm_substream *substream, · 6 unmodified lines | ||
| 365 | 364 | struct rme96 *rme96 = snd_pcm_substream_chip(substream); |
| 366 | 365 | count <<= rme96->capture_frlog; |
| 367 | 366 | pos <<= rme96->capture_frlog; |
| 368 | − copy_to_user_fromio(dst, rme96->iobase + RME96_IO_REC_BUFFER + pos, | |
| 369 | − count); | |
| 370 | − return 0; | |
| 367 | + return copy_to_user_fromio(dst, rme96->iobase + RME96_IO_REC_BUFFER + pos, | |
| 368 | + count); | |
| 371 | 369 | } |
| 372 | 370 | |
| 373 | 371 | /* |
| @@ -3996,7 +3996,6 @@ static int hdspm_tco_sync_check(struct hdspm *hdspm) · 3995 unmodified lines | ||
| 3996 | 3996 | return 1; |
| 3997 | 3997 | } |
| 3998 | 3998 | return 0; |
| 3999 | − break; | |
| 4000 | 3999 | case AES32: |
| 4001 | 4000 | status = hdspm_read(hdspm, HDSPM_statusRegister); |
| 4002 | 4001 | if (status & HDSPM_tcoLockAes) { |
| @@ -4006,9 +4005,6 @@ static int hdspm_tco_sync_check(struct hdspm *hdspm) · 3 unmodified lines | ||
| 4006 | 4005 | return 1; |
| 4007 | 4006 | } |
| 4008 | 4007 | return 0; |
| 4009 | − | |
| 4010 | − break; | |
| 4011 | − | |
| 4012 | 4008 | case RayDAT: |
| 4013 | 4009 | case AIO: |
| 4014 | 4010 | status = hdspm_read(hdspm, HDSPM_RD_STATUS_1); |
| @@ -4018,7 +4014,6 @@ static int hdspm_tco_sync_check(struct hdspm *hdspm) · 3 unmodified lines | ||
| 4018 | 4014 | if (status & 0x4000000) |
| 4019 | 4015 | return 1; /* Lock */ |
| 4020 | 4016 | return 0; /* No signal */ |
| 4021 | − break; | |
| 4022 | 4017 | |
| 4023 | 4018 | default: |
| 4024 | 4019 | break; |
| @@ -6405,7 +6400,7 @@ static int snd_hdspm_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, · 2380 unmodified lines | ||
| 6405 | 6400 | memset(&hdspm_version, 0, sizeof(hdspm_version)); |
| 6406 | 6401 | |
| 6407 | 6402 | hdspm_version.card_type = hdspm->io_type; |
| 6408 | − strncpy(hdspm_version.cardname, hdspm->card_name, | |
| 6403 | + strlcpy(hdspm_version.cardname, hdspm->card_name, | |
| 6409 | 6404 | sizeof(hdspm_version.cardname)); |
| 6410 | 6405 | hdspm_version.serial = hdspm->serial; |
| 6411 | 6406 | hdspm_version.firmware_rev = hdspm->firmware_rev; |
| @@ -933,8 +933,10 @@ static int snd_ps3_driver_probe(struct ps3_system_bus_device *dev) · 932 unmodified lines | ||
| 933 | 933 | int i, ret; |
| 934 | 934 | u64 lpar_addr, lpar_size; |
| 935 | 935 | |
| 936 | − BUG_ON(!firmware_has_feature(FW_FEATURE_PS3_LV1)); | |
| 937 | − BUG_ON(dev->match_id != PS3_MATCH_ID_SOUND); | |
| 936 | + if (WARN_ON(!firmware_has_feature(FW_FEATURE_PS3_LV1))) | |
| 937 | + return -ENODEV; | |
| 938 | + if (WARN_ON(dev->match_id != PS3_MATCH_ID_SOUND)) | |
| 939 | + return -ENODEV; | |
| 938 | 940 | |
| 939 | 941 | the_card.ps3_dev = dev; |
| 940 | 942 | |
| @@ -1,5 +1,5 @@ | ||
| 1 | 1 | snd-soc-core-objs := soc-core.o soc-dapm.o soc-jack.o soc-cache.o soc-utils.o |
| 2 | −snd-soc-core-objs += soc-pcm.o soc-compress.o soc-io.o | |
| 2 | +snd-soc-core-objs += soc-pcm.o soc-compress.o soc-io.o soc-devres.o | |
| 3 | 3 | |
| 4 | 4 | ifneq ($(CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM),) |
| 5 | 5 | snd-soc-core-objs += soc-generic-dmaengine-pcm.o |
| @@ -50,7 +50,7 @@ static int atmel_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, · 49 unmodified lines | ||
| 50 | 50 | buf->area = dma_alloc_coherent(pcm->card->dev, size, |
| 51 | 51 | &buf->addr, GFP_KERNEL); |
| 52 | 52 | pr_debug("atmel-pcm: alloc dma buffer: area=%p, addr=%p, size=%zu\n", |
| 53 | − (void *)buf->area, (void *)buf->addr, size); | |
| 53 | + (void *)buf->area, (void *)(long)buf->addr, size); | |
| 54 | 54 | |
| 55 | 55 | if (!buf->area) |
| 56 | 56 | return -ENOMEM; |
| @@ -777,7 +777,7 @@ static int asoc_ssc_init(struct device *dev) · 776 unmodified lines | ||
| 777 | 777 | if (ret) { |
| 778 | 778 | dev_err(dev, "Could not register PCM: %d\n", ret); |
| 779 | 779 | goto err_unregister_dai; |
| 780 | − }; | |
| 780 | + } | |
| 781 | 781 | |
| 782 | 782 | return 0; |
| 783 | 783 | |
| @@ -12,7 +12,6 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/module.h> |
| 13 | 13 | #include <linux/of.h> |
| 14 | 14 | #include <linux/of_device.h> |
| 15 | −#include <linux/pinctrl/consumer.h> | |
| 16 | 15 | |
| 17 | 16 | #include <sound/soc.h> |
| 18 | 17 | |
| @@ -155,15 +154,8 @@ static int atmel_asoc_wm8904_probe(struct platform_device *pdev) · 136 unmodified lines | ||
| 155 | 154 | struct snd_soc_card *card = &atmel_asoc_wm8904_card; |
| 156 | 155 | struct snd_soc_dai_link *dailink = &atmel_asoc_wm8904_dailink; |
| 157 | 156 | struct clk *clk_src; |
| 158 | − struct pinctrl *pinctrl; | |
| 159 | 157 | int id, ret; |
| 160 | 158 | |
| 161 | − pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | |
| 162 | − if (IS_ERR(pinctrl)) { | |
| 163 | − dev_err(&pdev->dev, "failed to request pinctrl\n"); | |
| 164 | − return PTR_ERR(pinctrl); | |
| 165 | − } | |
| 166 | − | |
| 167 | 159 | card->dev = &pdev->dev; |
| 168 | 160 | ret = atmel_asoc_wm8904_dt_init(pdev); |
| 169 | 161 | if (ret) { |
| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #include <linux/interrupt.h> |
| 38 | 38 | #include <linux/platform_device.h> |
| 39 | 39 | #include <linux/i2c.h> |
| 40 | +#include <linux/of.h> | |
| 40 | 41 | |
| 41 | 42 | #include <linux/atmel-ssc.h> |
| 42 | 43 | |
| @@ -179,8 +179,9 @@ static inline int sport_hook_rx_dummy(struct sport_device *sport) · 178 unmodified lines | ||
| 179 | 179 | struct dmasg *desc, temp_desc; |
| 180 | 180 | unsigned long flags; |
| 181 | 181 | |
| 182 | − BUG_ON(sport->dummy_rx_desc == NULL); | |
| 183 | − BUG_ON(sport->curr_rx_desc == sport->dummy_rx_desc); | |
| 182 | + if (WARN_ON(!sport->dummy_rx_desc) || | |
| 183 | + WARN_ON(sport->curr_rx_desc == sport->dummy_rx_desc)) | |
| 184 | + return -EINVAL; | |
| 184 | 185 | |
| 185 | 186 | /* Maybe the dummy buffer descriptor ring is damaged */ |
| 186 | 187 | sport->dummy_rx_desc->next_desc_addr = sport->dummy_rx_desc + 1; |
| @@ -250,8 +251,9 @@ int sport_rx_start(struct sport_device *sport) · 63 unmodified lines | ||
| 250 | 251 | return -EBUSY; |
| 251 | 252 | if (sport->tx_run) { |
| 252 | 253 | /* tx is running, rx is not running */ |
| 253 | − BUG_ON(sport->dma_rx_desc == NULL); | |
| 254 | − BUG_ON(sport->curr_rx_desc != sport->dummy_rx_desc); | |
| 254 | + if (WARN_ON(!sport->dma_rx_desc) || | |
| 255 | + WARN_ON(sport->curr_rx_desc != sport->dummy_rx_desc)) | |
| 256 | + return -EINVAL; | |
| 255 | 257 | local_irq_save(flags); |
| 256 | 258 | while ((get_dma_curr_desc_ptr(sport->dma_rx_chan) - |
| 257 | 259 | sizeof(struct dmasg)) != sport->dummy_rx_desc) |
| @@ -298,8 +300,9 @@ static inline int sport_hook_tx_dummy(struct sport_device *sport) · 40 unmodified lines | ||
| 298 | 300 | struct dmasg *desc, temp_desc; |
| 299 | 301 | unsigned long flags; |
| 300 | 302 | |
| 301 | − BUG_ON(sport->dummy_tx_desc == NULL); | |
| 302 | − BUG_ON(sport->curr_tx_desc == sport->dummy_tx_desc); | |
| 303 | + if (WARN_ON(!sport->dummy_tx_desc) || | |
| 304 | + WARN_ON(sport->curr_tx_desc == sport->dummy_tx_desc)) | |
| 305 | + return -EINVAL; | |
| 303 | 306 | |
| 304 | 307 | sport->dummy_tx_desc->next_desc_addr = sport->dummy_tx_desc + 1; |
| 305 | 308 | |
| @@ -331,8 +334,9 @@ int sport_tx_start(struct sport_device *sport) · 25 unmodified lines | ||
| 331 | 334 | if (sport->tx_run) |
| 332 | 335 | return -EBUSY; |
| 333 | 336 | if (sport->rx_run) { |
| 334 | − BUG_ON(sport->dma_tx_desc == NULL); | |
| 335 | − BUG_ON(sport->curr_tx_desc != sport->dummy_tx_desc); | |
| 337 | + if (WARN_ON(!sport->dma_tx_desc) || | |
| 338 | + WARN_ON(sport->curr_tx_desc != sport->dummy_tx_desc)) | |
| 339 | + return -EINVAL; | |
| 336 | 340 | /* Hook the normal buffer descriptor */ |
| 337 | 341 | local_irq_save(flags); |
| 338 | 342 | while ((get_dma_curr_desc_ptr(sport->dma_tx_chan) - |
| @@ -767,7 +771,8 @@ static irqreturn_t err_handler(int irq, void *dev_id) · 428 unmodified lines | ||
| 767 | 771 | int sport_set_rx_callback(struct sport_device *sport, |
| 768 | 772 | void (*rx_callback)(void *), void *rx_data) |
| 769 | 773 | { |
| 770 | − BUG_ON(rx_callback == NULL); | |
| 774 | + if (WARN_ON(!rx_callback)) | |
| 775 | + return -EINVAL; | |
| 771 | 776 | sport->rx_callback = rx_callback; |
| 772 | 777 | sport->rx_data = rx_data; |
| 773 | 778 | |
| @@ -778,7 +783,8 @@ EXPORT_SYMBOL(sport_set_rx_callback); · 4 unmodified lines | ||
| 778 | 783 | int sport_set_tx_callback(struct sport_device *sport, |
| 779 | 784 | void (*tx_callback)(void *), void *tx_data) |
| 780 | 785 | { |
| 781 | − BUG_ON(tx_callback == NULL); | |
| 786 | + if (WARN_ON(!tx_callback)) | |
| 787 | + return -EINVAL; | |
| 782 | 788 | sport->tx_callback = tx_callback; |
| 783 | 789 | sport->tx_data = tx_data; |
| 784 | 790 | |
| @@ -789,7 +795,8 @@ EXPORT_SYMBOL(sport_set_tx_callback); · 4 unmodified lines | ||
| 789 | 795 | int sport_set_err_callback(struct sport_device *sport, |
| 790 | 796 | void (*err_callback)(void *), void *err_data) |
| 791 | 797 | { |
| 792 | − BUG_ON(err_callback == NULL); | |
| 798 | + if (WARN_ON(!err_callback)) | |
| 799 | + return -EINVAL; | |
| 793 | 800 | sport->err_callback = err_callback; |
| 794 | 801 | sport->err_data = err_data; |
| 795 | 802 | |
| @@ -856,7 +863,8 @@ struct sport_device *sport_init(struct platform_device *pdev, · 60 unmodified lines | ||
| 856 | 863 | |
| 857 | 864 | param.wdsize = wdsize; |
| 858 | 865 | param.dummy_count = dummy_count; |
| 859 | − BUG_ON(param.wdsize == 0 || param.dummy_count == 0); | |
| 866 | + if (WARN_ON(param.wdsize == 0 || param.dummy_count == 0)) | |
| 867 | + return NULL; | |
| 860 | 868 | |
| 861 | 869 | ret = sport_config_pdev(pdev, ¶m); |
| 862 | 870 | if (ret) |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | config SND_EP93XX_SOC |
| 2 | 2 | tristate "SoC Audio support for the Cirrus Logic EP93xx series" |
| 3 | − depends on ARCH_EP93XX && SND_SOC | |
| 3 | + depends on (ARCH_EP93XX || COMPILE_TEST) && SND_SOC | |
| 4 | 4 | select SND_SOC_GENERIC_DMAENGINE_PCM |
| 5 | 5 | help |
| 6 | 6 | Say Y or M if you want to add support for codecs attached to |
| @@ -57,9 +57,22 @@ static bool ep93xx_pcm_dma_filter(struct dma_chan *chan, void *filter_param) · 56 unmodified lines | ||
| 57 | 57 | return false; |
| 58 | 58 | } |
| 59 | 59 | |
| 60 | +static struct dma_chan *ep93xx_compat_request_channel( | |
| 61 | + struct snd_soc_pcm_runtime *rtd, | |
| 62 | + struct snd_pcm_substream *substream) | |
| 63 | +{ | |
| 64 | + struct snd_dmaengine_dai_dma_data *dma_data; | |
| 65 | + | |
| 66 | + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | |
| 67 | + | |
| 68 | + return snd_dmaengine_pcm_request_channel(ep93xx_pcm_dma_filter, | |
| 69 | + dma_data); | |
| 70 | +} | |
| 71 | + | |
| 60 | 72 | static const struct snd_dmaengine_pcm_config ep93xx_dmaengine_pcm_config = { |
| 61 | 73 | .pcm_hardware = &ep93xx_pcm_hardware, |
| 62 | 74 | .compat_filter_fn = ep93xx_pcm_dma_filter, |
| 75 | + .compat_request_channel = ep93xx_compat_request_channel, | |
| 63 | 76 | .prealloc_buffer_size = 131072, |
| 64 | 77 | }; |
| 65 | 78 | |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/mfd/88pm860x.h> |
| 17 | 17 | #include <linux/slab.h> |
| 18 | 18 | #include <linux/delay.h> |
| 19 | +#include <linux/regmap.h> | |
| 19 | 20 | #include <sound/core.h> |
| 20 | 21 | #include <sound/pcm.h> |
| 21 | 22 | #include <sound/pcm_params.h> |
| @@ -140,6 +141,7 @@ struct pm860x_priv { · 118 unmodified lines | ||
| 140 | 141 | unsigned int filter; |
| 141 | 142 | struct snd_soc_codec *codec; |
| 142 | 143 | struct i2c_client *i2c; |
| 144 | + struct regmap *regmap; | |
| 143 | 145 | struct pm860x_chip *chip; |
| 144 | 146 | struct pm860x_det det; |
| 145 | 147 | |
| @@ -269,48 +271,6 @@ static struct st_gain st_table[] = { · 123 unmodified lines | ||
| 269 | 271 | { -86, 29, 0}, { -56, 30, 0}, { -28, 31, 0}, { 0, 0, 0}, |
| 270 | 272 | }; |
| 271 | 273 | |
| 272 | −static int pm860x_volatile(unsigned int reg) | |
| 273 | −{ | |
| 274 | − BUG_ON(reg >= REG_CACHE_SIZE); | |
| 275 | − | |
| 276 | − switch (reg) { | |
| 277 | − case PM860X_AUDIO_SUPPLIES_2: | |
| 278 | − return 1; | |
| 279 | − } | |
| 280 | − | |
| 281 | − return 0; | |
| 282 | −} | |
| 283 | − | |
| 284 | −static unsigned int pm860x_read_reg_cache(struct snd_soc_codec *codec, | |
| 285 | − unsigned int reg) | |
| 286 | −{ | |
| 287 | − unsigned char *cache = codec->reg_cache; | |
| 288 | − | |
| 289 | − BUG_ON(reg >= REG_CACHE_SIZE); | |
| 290 | − | |
| 291 | − if (pm860x_volatile(reg)) | |
| 292 | − return cache[reg]; | |
| 293 | − | |
| 294 | − reg += REG_CACHE_BASE; | |
| 295 | − | |
| 296 | − return pm860x_reg_read(codec->control_data, reg); | |
| 297 | −} | |
| 298 | − | |
| 299 | −static int pm860x_write_reg_cache(struct snd_soc_codec *codec, | |
| 300 | − unsigned int reg, unsigned int value) | |
| 301 | −{ | |
| 302 | − unsigned char *cache = codec->reg_cache; | |
| 303 | − | |
| 304 | − BUG_ON(reg >= REG_CACHE_SIZE); | |
| 305 | − | |
| 306 | − if (!pm860x_volatile(reg)) | |
| 307 | − cache[reg] = (unsigned char)value; | |
| 308 | − | |
| 309 | − reg += REG_CACHE_BASE; | |
| 310 | − | |
| 311 | − return pm860x_reg_write(codec->control_data, reg, value); | |
| 312 | −} | |
| 313 | − | |
| 314 | 274 | static int snd_soc_get_volsw_2r_st(struct snd_kcontrol *kcontrol, |
| 315 | 275 | struct snd_ctl_elem_value *ucontrol) |
| 316 | 276 | { |
| @@ -1169,6 +1129,7 @@ static int pm860x_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai, · 852 unmodified lines | ||
| 1169 | 1129 | static int pm860x_set_bias_level(struct snd_soc_codec *codec, |
| 1170 | 1130 | enum snd_soc_bias_level level) |
| 1171 | 1131 | { |
| 1132 | + struct pm860x_priv *pm860x = snd_soc_codec_get_drvdata(codec); | |
| 1172 | 1133 | int data; |
| 1173 | 1134 | |
| 1174 | 1135 | switch (level) { |
| @@ -1182,17 +1143,17 @@ static int pm860x_set_bias_level(struct snd_soc_codec *codec, · 7 unmodified lines | ||
| 1182 | 1143 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
| 1183 | 1144 | /* Enable Audio PLL & Audio section */ |
| 1184 | 1145 | data = AUDIO_PLL | AUDIO_SECTION_ON; |
| 1185 | − pm860x_reg_write(codec->control_data, REG_MISC2, data); | |
| 1146 | + pm860x_reg_write(pm860x->i2c, REG_MISC2, data); | |
| 1186 | 1147 | udelay(300); |
| 1187 | 1148 | data = AUDIO_PLL | AUDIO_SECTION_RESET |
| 1188 | 1149 | | AUDIO_SECTION_ON; |
| 1189 | − pm860x_reg_write(codec->control_data, REG_MISC2, data); | |
| 1150 | + pm860x_reg_write(pm860x->i2c, REG_MISC2, data); | |
| 1190 | 1151 | } |
| 1191 | 1152 | break; |
| 1192 | 1153 | |
| 1193 | 1154 | case SND_SOC_BIAS_OFF: |
| 1194 | 1155 | data = AUDIO_PLL | AUDIO_SECTION_RESET | AUDIO_SECTION_ON; |
| 1195 | − pm860x_set_bits(codec->control_data, REG_MISC2, data, 0); | |
| 1156 | + pm860x_set_bits(pm860x->i2c, REG_MISC2, data, 0); | |
| 1196 | 1157 | break; |
| 1197 | 1158 | } |
| 1198 | 1159 | codec->dapm.bias_level = level; |
| @@ -1322,17 +1283,17 @@ int pm860x_hs_jack_detect(struct snd_soc_codec *codec, · 123 unmodified lines | ||
| 1322 | 1283 | pm860x->det.lo_shrt = lo_shrt; |
| 1323 | 1284 | |
| 1324 | 1285 | if (det & SND_JACK_HEADPHONE) |
| 1325 | − pm860x_set_bits(codec->control_data, REG_HS_DET, | |
| 1286 | + pm860x_set_bits(pm860x->i2c, REG_HS_DET, | |
| 1326 | 1287 | EN_HS_DET, EN_HS_DET); |
| 1327 | 1288 | /* headset short detect */ |
| 1328 | 1289 | if (hs_shrt) { |
| 1329 | 1290 | data = CLR_SHORT_HS2 | CLR_SHORT_HS1; |
| 1330 | − pm860x_set_bits(codec->control_data, REG_SHORTS, data, data); | |
| 1291 | + pm860x_set_bits(pm860x->i2c, REG_SHORTS, data, data); | |
| 1331 | 1292 | } |
| 1332 | 1293 | /* Lineout short detect */ |
| 1333 | 1294 | if (lo_shrt) { |
| 1334 | 1295 | data = CLR_SHORT_LO2 | CLR_SHORT_LO1; |
| 1335 | − pm860x_set_bits(codec->control_data, REG_SHORTS, data, data); | |
| 1296 | + pm860x_set_bits(pm860x->i2c, REG_SHORTS, data, data); | |
| 1336 | 1297 | } |
| 1337 | 1298 | |
| 1338 | 1299 | /* sync status */ |
| @@ -1350,7 +1311,7 @@ int pm860x_mic_jack_detect(struct snd_soc_codec *codec, · 11 unmodified lines | ||
| 1350 | 1311 | pm860x->det.mic_det = det; |
| 1351 | 1312 | |
| 1352 | 1313 | if (det & SND_JACK_MICROPHONE) |
| 1353 | − pm860x_set_bits(codec->control_data, REG_MIC_DET, | |
| 1314 | + pm860x_set_bits(pm860x->i2c, REG_MIC_DET, | |
| 1354 | 1315 | MICDET_MASK, MICDET_MASK); |
| 1355 | 1316 | |
| 1356 | 1317 | /* sync status */ |
| @@ -1366,7 +1327,7 @@ static int pm860x_probe(struct snd_soc_codec *codec) · 9 unmodified lines | ||
| 1366 | 1327 | |
| 1367 | 1328 | pm860x->codec = codec; |
| 1368 | 1329 | |
| 1369 | − codec->control_data = pm860x->i2c; | |
| 1330 | + codec->control_data = pm860x->regmap; | |
| 1370 | 1331 | |
| 1371 | 1332 | for (i = 0; i < 4; i++) { |
| 1372 | 1333 | ret = request_threaded_irq(pm860x->irq[i], NULL, |
| @@ -1380,14 +1341,6 @@ static int pm860x_probe(struct snd_soc_codec *codec) · 7 unmodified lines | ||
| 1380 | 1341 | |
| 1381 | 1342 | pm860x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1382 | 1343 | |
| 1383 | − ret = pm860x_bulk_read(codec->control_data, REG_CACHE_BASE, | |
| 1384 | − REG_CACHE_SIZE, codec->reg_cache); | |
| 1385 | − if (ret < 0) { | |
| 1386 | − dev_err(codec->dev, "Failed to fill register cache: %d\n", | |
| 1387 | − ret); | |
| 1388 | − goto out; | |
| 1389 | − } | |
| 1390 | − | |
| 1391 | 1344 | return 0; |
| 1392 | 1345 | |
| 1393 | 1346 | out: |
| @@ -1410,10 +1363,6 @@ static int pm860x_remove(struct snd_soc_codec *codec) · 16 unmodified lines | ||
| 1410 | 1363 | static struct snd_soc_codec_driver soc_codec_dev_pm860x = { |
| 1411 | 1364 | .probe = pm860x_probe, |
| 1412 | 1365 | .remove = pm860x_remove, |
| 1413 | − .read = pm860x_read_reg_cache, | |
| 1414 | − .write = pm860x_write_reg_cache, | |
| 1415 | − .reg_cache_size = REG_CACHE_SIZE, | |
| 1416 | − .reg_word_size = sizeof(u8), | |
| 1417 | 1366 | .set_bias_level = pm860x_set_bias_level, |
| 1418 | 1367 | |
| 1419 | 1368 | .controls = pm860x_snd_controls, |
| @@ -1439,6 +1388,8 @@ static int pm860x_codec_probe(struct platform_device *pdev) · 19 unmodified lines | ||
| 1439 | 1388 | pm860x->chip = chip; |
| 1440 | 1389 | pm860x->i2c = (chip->id == CHIP_PM8607) ? chip->client |
| 1441 | 1390 | : chip->companion; |
| 1391 | + pm860x->regmap = (chip->id == CHIP_PM8607) ? chip->regmap | |
| 1392 | + : chip->regmap_companion; | |
| 1442 | 1393 | platform_set_drvdata(pdev, pm860x); |
| 1443 | 1394 | |
| 1444 | 1395 | for (i = 0; i < 4; i++) { |
| @@ -12,67 +12,66 @@ · 11 unmodified lines | ||
| 12 | 12 | #ifndef __88PM860X_H |
| 13 | 13 | #define __88PM860X_H |
| 14 | 14 | |
| 15 | −/* The offset of these registers are 0xb0 */ | |
| 16 | −#define PM860X_PCM_IFACE_1 0x00 | |
| 17 | −#define PM860X_PCM_IFACE_2 0x01 | |
| 18 | −#define PM860X_PCM_IFACE_3 0x02 | |
| 19 | −#define PM860X_PCM_RATE 0x03 | |
| 20 | −#define PM860X_EC_PATH 0x04 | |
| 21 | −#define PM860X_SIDETONE_L_GAIN 0x05 | |
| 22 | −#define PM860X_SIDETONE_R_GAIN 0x06 | |
| 23 | −#define PM860X_SIDETONE_SHIFT 0x07 | |
| 24 | −#define PM860X_ADC_OFFSET_1 0x08 | |
| 25 | −#define PM860X_ADC_OFFSET_2 0x09 | |
| 26 | −#define PM860X_DMIC_DELAY 0x0a | |
| 15 | +#define PM860X_PCM_IFACE_1 0xb0 | |
| 16 | +#define PM860X_PCM_IFACE_2 0xb1 | |
| 17 | +#define PM860X_PCM_IFACE_3 0xb2 | |
| 18 | +#define PM860X_PCM_RATE 0xb3 | |
| 19 | +#define PM860X_EC_PATH 0xb4 | |
| 20 | +#define PM860X_SIDETONE_L_GAIN 0xb5 | |
| 21 | +#define PM860X_SIDETONE_R_GAIN 0xb6 | |
| 22 | +#define PM860X_SIDETONE_SHIFT 0xb7 | |
| 23 | +#define PM860X_ADC_OFFSET_1 0xb8 | |
| 24 | +#define PM860X_ADC_OFFSET_2 0xb9 | |
| 25 | +#define PM860X_DMIC_DELAY 0xba | |
| 27 | 26 | |
| 28 | −#define PM860X_I2S_IFACE_1 0x0b | |
| 29 | −#define PM860X_I2S_IFACE_2 0x0c | |
| 30 | −#define PM860X_I2S_IFACE_3 0x0d | |
| 31 | −#define PM860X_I2S_IFACE_4 0x0e | |
| 32 | −#define PM860X_EQUALIZER_N0_1 0x0f | |
| 33 | −#define PM860X_EQUALIZER_N0_2 0x10 | |
| 34 | −#define PM860X_EQUALIZER_N1_1 0x11 | |
| 35 | −#define PM860X_EQUALIZER_N1_2 0x12 | |
| 36 | −#define PM860X_EQUALIZER_D1_1 0x13 | |
| 37 | −#define PM860X_EQUALIZER_D1_2 0x14 | |
| 38 | −#define PM860X_LOFI_GAIN_LEFT 0x15 | |
| 39 | −#define PM860X_LOFI_GAIN_RIGHT 0x16 | |
| 40 | −#define PM860X_HIFIL_GAIN_LEFT 0x17 | |
| 41 | −#define PM860X_HIFIL_GAIN_RIGHT 0x18 | |
| 42 | −#define PM860X_HIFIR_GAIN_LEFT 0x19 | |
| 43 | −#define PM860X_HIFIR_GAIN_RIGHT 0x1a | |
| 44 | −#define PM860X_DAC_OFFSET 0x1b | |
| 45 | −#define PM860X_OFFSET_LEFT_1 0x1c | |
| 46 | −#define PM860X_OFFSET_LEFT_2 0x1d | |
| 47 | −#define PM860X_OFFSET_RIGHT_1 0x1e | |
| 48 | −#define PM860X_OFFSET_RIGHT_2 0x1f | |
| 49 | −#define PM860X_ADC_ANA_1 0x20 | |
| 50 | −#define PM860X_ADC_ANA_2 0x21 | |
| 51 | −#define PM860X_ADC_ANA_3 0x22 | |
| 52 | −#define PM860X_ADC_ANA_4 0x23 | |
| 53 | −#define PM860X_ANA_TO_ANA 0x24 | |
| 54 | −#define PM860X_HS1_CTRL 0x25 | |
| 55 | −#define PM860X_HS2_CTRL 0x26 | |
| 56 | −#define PM860X_LO1_CTRL 0x27 | |
| 57 | −#define PM860X_LO2_CTRL 0x28 | |
| 58 | −#define PM860X_EAR_CTRL_1 0x29 | |
| 59 | −#define PM860X_EAR_CTRL_2 0x2a | |
| 60 | −#define PM860X_AUDIO_SUPPLIES_1 0x2b | |
| 61 | −#define PM860X_AUDIO_SUPPLIES_2 0x2c | |
| 62 | −#define PM860X_ADC_EN_1 0x2d | |
| 63 | −#define PM860X_ADC_EN_2 0x2e | |
| 64 | −#define PM860X_DAC_EN_1 0x2f | |
| 65 | −#define PM860X_DAC_EN_2 0x31 | |
| 66 | −#define PM860X_AUDIO_CAL_1 0x32 | |
| 67 | −#define PM860X_AUDIO_CAL_2 0x33 | |
| 68 | −#define PM860X_AUDIO_CAL_3 0x34 | |
| 69 | −#define PM860X_AUDIO_CAL_4 0x35 | |
| 70 | −#define PM860X_AUDIO_CAL_5 0x36 | |
| 71 | −#define PM860X_ANA_INPUT_SEL_1 0x37 | |
| 72 | −#define PM860X_ANA_INPUT_SEL_2 0x38 | |
| 27 | +#define PM860X_I2S_IFACE_1 0xbb | |
| 28 | +#define PM860X_I2S_IFACE_2 0xbc | |
| 29 | +#define PM860X_I2S_IFACE_3 0xbd | |
| 30 | +#define PM860X_I2S_IFACE_4 0xbe | |
| 31 | +#define PM860X_EQUALIZER_N0_1 0xbf | |
| 32 | +#define PM860X_EQUALIZER_N0_2 0xc0 | |
| 33 | +#define PM860X_EQUALIZER_N1_1 0xc1 | |
| 34 | +#define PM860X_EQUALIZER_N1_2 0xc2 | |
| 35 | +#define PM860X_EQUALIZER_D1_1 0xc3 | |
| 36 | +#define PM860X_EQUALIZER_D1_2 0xc4 | |
| 37 | +#define PM860X_LOFI_GAIN_LEFT 0xc5 | |
| 38 | +#define PM860X_LOFI_GAIN_RIGHT 0xc6 | |
| 39 | +#define PM860X_HIFIL_GAIN_LEFT 0xc7 | |
| 40 | +#define PM860X_HIFIL_GAIN_RIGHT 0xc8 | |
| 41 | +#define PM860X_HIFIR_GAIN_LEFT 0xc9 | |
| 42 | +#define PM860X_HIFIR_GAIN_RIGHT 0xca | |
| 43 | +#define PM860X_DAC_OFFSET 0xcb | |
| 44 | +#define PM860X_OFFSET_LEFT_1 0xcc | |
| 45 | +#define PM860X_OFFSET_LEFT_2 0xcd | |
| 46 | +#define PM860X_OFFSET_RIGHT_1 0xce | |
| 47 | +#define PM860X_OFFSET_RIGHT_2 0xcf | |
| 48 | +#define PM860X_ADC_ANA_1 0xd0 | |
| 49 | +#define PM860X_ADC_ANA_2 0xd1 | |
| 50 | +#define PM860X_ADC_ANA_3 0xd2 | |
| 51 | +#define PM860X_ADC_ANA_4 0xd3 | |
| 52 | +#define PM860X_ANA_TO_ANA 0xd4 | |
| 53 | +#define PM860X_HS1_CTRL 0xd5 | |
| 54 | +#define PM860X_HS2_CTRL 0xd6 | |
| 55 | +#define PM860X_LO1_CTRL 0xd7 | |
| 56 | +#define PM860X_LO2_CTRL 0xd8 | |
| 57 | +#define PM860X_EAR_CTRL_1 0xd9 | |
| 58 | +#define PM860X_EAR_CTRL_2 0xda | |
| 59 | +#define PM860X_AUDIO_SUPPLIES_1 0xdb | |
| 60 | +#define PM860X_AUDIO_SUPPLIES_2 0xdc | |
| 61 | +#define PM860X_ADC_EN_1 0xdd | |
| 62 | +#define PM860X_ADC_EN_2 0xde | |
| 63 | +#define PM860X_DAC_EN_1 0xdf | |
| 64 | +#define PM860X_DAC_EN_2 0xe1 | |
| 65 | +#define PM860X_AUDIO_CAL_1 0xe2 | |
| 66 | +#define PM860X_AUDIO_CAL_2 0xe3 | |
| 67 | +#define PM860X_AUDIO_CAL_3 0xe4 | |
| 68 | +#define PM860X_AUDIO_CAL_4 0xe5 | |
| 69 | +#define PM860X_AUDIO_CAL_5 0xe6 | |
| 70 | +#define PM860X_ANA_INPUT_SEL_1 0xe7 | |
| 71 | +#define PM860X_ANA_INPUT_SEL_2 0xe8 | |
| 73 | 72 | |
| 74 | −#define PM860X_PCM_IFACE_4 0x39 | |
| 75 | −#define PM860X_I2S_IFACE_5 0x3a | |
| 73 | +#define PM860X_PCM_IFACE_4 0xe9 | |
| 74 | +#define PM860X_I2S_IFACE_5 0xea | |
| 76 | 75 | |
| 77 | 76 | #define PM860X_SHORTS 0x3b |
| 78 | 77 | #define PM860X_PLL_ADJ_1 0x3c |
| @@ -126,6 +126,8 @@ struct ab8500_codec_drvdata_dbg { · 125 unmodified lines | ||
| 126 | 126 | |
| 127 | 127 | /* Private data for AB8500 device-driver */ |
| 128 | 128 | struct ab8500_codec_drvdata { |
| 129 | + struct regmap *regmap; | |
| 130 | + | |
| 129 | 131 | /* Sidetone */ |
| 130 | 132 | long *sid_fir_values; |
| 131 | 133 | enum sid_state sid_status; |
| @@ -166,49 +168,35 @@ static inline const char *amic_type_str(enum amic_type type) · 34 unmodified lines | ||
| 166 | 168 | */ |
| 167 | 169 | |
| 168 | 170 | /* Read a register from the audio-bank of AB8500 */ |
| 169 | −static unsigned int ab8500_codec_read_reg(struct snd_soc_codec *codec, | |
| 170 | − unsigned int reg) | |
| 171 | +static int ab8500_codec_read_reg(void *context, unsigned int reg, | |
| 172 | + unsigned int *value) | |
| 171 | 173 | { |
| 174 | + struct device *dev = context; | |
| 172 | 175 | int status; |
| 173 | − unsigned int value = 0; | |
| 174 | 176 | |
| 175 | 177 | u8 value8; |
| 176 | − status = abx500_get_register_interruptible(codec->dev, AB8500_AUDIO, | |
| 177 | − reg, &value8); | |
| 178 | − if (status < 0) { | |
| 179 | − dev_err(codec->dev, | |
| 180 | − "%s: ERROR: Register (0x%02x:0x%02x) read failed (%d).\n", | |
| 181 | − __func__, (u8)AB8500_AUDIO, (u8)reg, status); | |
| 182 | − } else { | |
| 183 | − dev_dbg(codec->dev, | |
| 184 | − "%s: Read 0x%02x from register 0x%02x:0x%02x\n", | |
| 185 | − __func__, value8, (u8)AB8500_AUDIO, (u8)reg); | |
| 186 | − value = (unsigned int)value8; | |
| 187 | − } | |
| 178 | + status = abx500_get_register_interruptible(dev, AB8500_AUDIO, | |
| 179 | + reg, &value8); | |
| 180 | + *value = (unsigned int)value8; | |
| 188 | 181 | |
| 189 | − return value; | |
| 182 | + return status; | |
| 190 | 183 | } |
| 191 | 184 | |
| 192 | 185 | /* Write to a register in the audio-bank of AB8500 */ |
| 193 | −static int ab8500_codec_write_reg(struct snd_soc_codec *codec, | |
| 194 | − unsigned int reg, unsigned int value) | |
| 186 | +static int ab8500_codec_write_reg(void *context, unsigned int reg, | |
| 187 | + unsigned int value) | |
| 195 | 188 | { |
| 196 | − int status; | |
| 197 | − | |
| 198 | − status = abx500_set_register_interruptible(codec->dev, AB8500_AUDIO, | |
| 199 | − reg, value); | |
| 200 | − if (status < 0) | |
| 201 | − dev_err(codec->dev, | |
| 202 | − "%s: ERROR: Register (%02x:%02x) write failed (%d).\n", | |
| 203 | − __func__, (u8)AB8500_AUDIO, (u8)reg, status); | |
| 204 | − else | |
| 205 | − dev_dbg(codec->dev, | |
| 206 | − "%s: Wrote 0x%02x into register %02x:%02x\n", | |
| 207 | − __func__, (u8)value, (u8)AB8500_AUDIO, (u8)reg); | |
| 189 | + struct device *dev = context; | |
| 208 | 190 | |
| 209 | − return status; | |
| 191 | + return abx500_set_register_interruptible(dev, AB8500_AUDIO, | |
| 192 | + reg, value); | |
| 210 | 193 | } |
| 211 | 194 | |
| 195 | +static const struct regmap_config ab8500_codec_regmap = { | |
| 196 | + .reg_read = ab8500_codec_read_reg, | |
| 197 | + .reg_write = ab8500_codec_write_reg, | |
| 198 | +}; | |
| 199 | + | |
| 212 | 200 | /* |
| 213 | 201 | * Controls - DAPM |
| 214 | 202 | */ |
| @@ -2312,17 +2300,17 @@ static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai, · 2097 unmodified lines | ||
| 2312 | 2300 | case 0: |
| 2313 | 2301 | break; |
| 2314 | 2302 | case 1: |
| 2315 | − slot = find_first_bit((unsigned long *)&tx_mask, 32); | |
| 2303 | + slot = ffs(tx_mask); | |
| 2316 | 2304 | snd_soc_update_bits(codec, AB8500_DASLOTCONF1, mask, slot); |
| 2317 | 2305 | snd_soc_update_bits(codec, AB8500_DASLOTCONF3, mask, slot); |
| 2318 | 2306 | snd_soc_update_bits(codec, AB8500_DASLOTCONF2, mask, slot); |
| 2319 | 2307 | snd_soc_update_bits(codec, AB8500_DASLOTCONF4, mask, slot); |
| 2320 | 2308 | break; |
| 2321 | 2309 | case 2: |
| 2322 | − slot = find_first_bit((unsigned long *)&tx_mask, 32); | |
| 2310 | + slot = ffs(tx_mask); | |
| 2323 | 2311 | snd_soc_update_bits(codec, AB8500_DASLOTCONF1, mask, slot); |
| 2324 | 2312 | snd_soc_update_bits(codec, AB8500_DASLOTCONF3, mask, slot); |
| 2325 | − slot = find_next_bit((unsigned long *)&tx_mask, 32, slot + 1); | |
| 2313 | + slot = fls(tx_mask); | |
| 2326 | 2314 | snd_soc_update_bits(codec, AB8500_DASLOTCONF2, mask, slot); |
| 2327 | 2315 | snd_soc_update_bits(codec, AB8500_DASLOTCONF4, mask, slot); |
| 2328 | 2316 | break; |
| @@ -2353,18 +2341,18 @@ static int ab8500_codec_set_dai_tdm_slot(struct snd_soc_dai *dai, · 24 unmodified lines | ||
| 2353 | 2341 | case 0: |
| 2354 | 2342 | break; |
| 2355 | 2343 | case 1: |
| 2356 | − slot = find_first_bit((unsigned long *)&rx_mask, 32); | |
| 2344 | + slot = ffs(rx_mask); | |
| 2357 | 2345 | snd_soc_update_bits(codec, AB8500_ADSLOTSEL(slot), |
| 2358 | 2346 | AB8500_MASK_SLOT(slot), |
| 2359 | 2347 | AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT3, slot)); |
| 2360 | 2348 | break; |
| 2361 | 2349 | case 2: |
| 2362 | − slot = find_first_bit((unsigned long *)&rx_mask, 32); | |
| 2350 | + slot = ffs(rx_mask); | |
| 2363 | 2351 | snd_soc_update_bits(codec, |
| 2364 | 2352 | AB8500_ADSLOTSEL(slot), |
| 2365 | 2353 | AB8500_MASK_SLOT(slot), |
| 2366 | 2354 | AB8500_ADSLOTSELX_AD_OUT_TO_SLOT(AB8500_AD_OUT3, slot)); |
| 2367 | − slot = find_next_bit((unsigned long *)&rx_mask, 32, slot + 1); | |
| 2355 | + slot = fls(rx_mask); | |
| 2368 | 2356 | snd_soc_update_bits(codec, |
| 2369 | 2357 | AB8500_ADSLOTSEL(slot), |
| 2370 | 2358 | AB8500_MASK_SLOT(slot), |
| @@ -2485,9 +2473,13 @@ static int ab8500_codec_probe(struct snd_soc_codec *codec) · 114 unmodified lines | ||
| 2485 | 2473 | |
| 2486 | 2474 | dev_dbg(dev, "%s: Enter.\n", __func__); |
| 2487 | 2475 | |
| 2476 | + snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); | |
| 2477 | + | |
| 2488 | 2478 | /* Setup AB8500 according to board-settings */ |
| 2489 | 2479 | pdata = dev_get_platdata(dev->parent); |
| 2490 | 2480 | |
| 2481 | + codec->control_data = drvdata->regmap; | |
| 2482 | + | |
| 2491 | 2483 | if (np) { |
| 2492 | 2484 | if (!pdata) |
| 2493 | 2485 | pdata = devm_kzalloc(dev, |
| @@ -2532,12 +2524,10 @@ static int ab8500_codec_probe(struct snd_soc_codec *codec) · 38 unmodified lines | ||
| 2532 | 2524 | } |
| 2533 | 2525 | |
| 2534 | 2526 | /* Override HW-defaults */ |
| 2535 | − ab8500_codec_write_reg(codec, | |
| 2536 | − AB8500_ANACONF5, | |
| 2537 | − BIT(AB8500_ANACONF5_HSAUTOEN)); | |
| 2538 | − ab8500_codec_write_reg(codec, | |
| 2539 | − AB8500_SHORTCIRCONF, | |
| 2540 | − BIT(AB8500_SHORTCIRCONF_HSZCDDIS)); | |
| 2527 | + snd_soc_write(codec, AB8500_ANACONF5, | |
| 2528 | + BIT(AB8500_ANACONF5_HSAUTOEN)); | |
| 2529 | + snd_soc_write(codec, AB8500_SHORTCIRCONF, | |
| 2530 | + BIT(AB8500_SHORTCIRCONF_HSZCDDIS)); | |
| 2541 | 2531 | |
| 2542 | 2532 | /* Add filter controls */ |
| 2543 | 2533 | status = snd_soc_add_codec_controls(codec, ab8500_filter_controls, |
| @@ -2567,9 +2557,6 @@ static int ab8500_codec_probe(struct snd_soc_codec *codec) · 23 unmodified lines | ||
| 2567 | 2557 | |
| 2568 | 2558 | static struct snd_soc_codec_driver ab8500_codec_driver = { |
| 2569 | 2559 | .probe = ab8500_codec_probe, |
| 2570 | − .read = ab8500_codec_read_reg, | |
| 2571 | − .write = ab8500_codec_write_reg, | |
| 2572 | − .reg_word_size = sizeof(u8), | |
| 2573 | 2560 | .controls = ab8500_ctrls, |
| 2574 | 2561 | .num_controls = ARRAY_SIZE(ab8500_ctrls), |
| 2575 | 2562 | .dapm_widgets = ab8500_dapm_widgets, |
| @@ -2588,10 +2575,21 @@ static int ab8500_codec_driver_probe(struct platform_device *pdev) · 12 unmodified lines | ||
| 2588 | 2575 | /* Create driver private-data struct */ |
| 2589 | 2576 | drvdata = devm_kzalloc(&pdev->dev, sizeof(struct ab8500_codec_drvdata), |
| 2590 | 2577 | GFP_KERNEL); |
| 2578 | + if (!drvdata) | |
| 2579 | + return -ENOMEM; | |
| 2591 | 2580 | drvdata->sid_status = SID_UNCONFIGURED; |
| 2592 | 2581 | drvdata->anc_status = ANC_UNCONFIGURED; |
| 2593 | 2582 | dev_set_drvdata(&pdev->dev, drvdata); |
| 2594 | 2583 | |
| 2584 | + drvdata->regmap = devm_regmap_init(&pdev->dev, NULL, &pdev->dev, | |
| 2585 | + &ab8500_codec_regmap); | |
| 2586 | + if (IS_ERR(drvdata->regmap)) { | |
| 2587 | + status = PTR_ERR(drvdata->regmap); | |
| 2588 | + dev_err(&pdev->dev, "%s: Failed to allocate regmap: %d\n", | |
| 2589 | + __func__, status); | |
| 2590 | + return status; | |
| 2591 | + } | |
| 2592 | + | |
| 2595 | 2593 | dev_dbg(&pdev->dev, "%s: Register codec.\n", __func__); |
| 2596 | 2594 | status = snd_soc_register_codec(&pdev->dev, &ab8500_codec_driver, |
| 2597 | 2595 | ab8500_codec_dai, |
| @@ -2606,7 +2604,7 @@ static int ab8500_codec_driver_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 2606 | 2604 | |
| 2607 | 2605 | static int ab8500_codec_driver_remove(struct platform_device *pdev) |
| 2608 | 2606 | { |
| 2609 | − dev_info(&pdev->dev, "%s Enter.\n", __func__); | |
| 2607 | + dev_dbg(&pdev->dev, "%s Enter.\n", __func__); | |
| 2610 | 2608 | |
| 2611 | 2609 | snd_soc_unregister_codec(&pdev->dev); |
| 2612 | 2610 | |
| @@ -32,6 +32,7 @@ struct adau1373_dai { · 31 unmodified lines | ||
| 32 | 32 | }; |
| 33 | 33 | |
| 34 | 34 | struct adau1373 { |
| 35 | + struct regmap *regmap; | |
| 35 | 36 | struct adau1373_dai dais[3]; |
| 36 | 37 | }; |
| 37 | 38 | |
| @@ -73,7 +74,6 @@ struct adau1373 { · 35 unmodified lines | ||
| 73 | 74 | #define ADAU1373_PLL_CTRL4(x) (0x2c + (x) * 7) |
| 74 | 75 | #define ADAU1373_PLL_CTRL5(x) (0x2d + (x) * 7) |
| 75 | 76 | #define ADAU1373_PLL_CTRL6(x) (0x2e + (x) * 7) |
| 76 | −#define ADAU1373_PLL_CTRL7(x) (0x2f + (x) * 7) | |
| 77 | 77 | #define ADAU1373_HEADDECT 0x36 |
| 78 | 78 | #define ADAU1373_ADC_DAC_STATUS 0x37 |
| 79 | 79 | #define ADAU1373_ADC_CTRL 0x3c |
| @@ -152,37 +152,172 @@ struct adau1373 { · 72 unmodified lines | ||
| 152 | 152 | #define ADAU1373_EP_CTRL_MICBIAS1_OFFSET 4 |
| 153 | 153 | #define ADAU1373_EP_CTRL_MICBIAS2_OFFSET 2 |
| 154 | 154 | |
| 155 | −static const uint8_t adau1373_default_regs[] = { | |
| 156 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x00 */ | |
| 157 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 158 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x10 */ | |
| 159 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 160 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x20 */ | |
| 161 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, | |
| 162 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, /* 0x30 */ | |
| 163 | − 0x00, 0x00, 0x00, 0x80, 0x00, 0x01, 0x00, 0x00, | |
| 164 | − 0x00, 0x00, 0x00, 0x00, 0x0a, 0x0a, 0x0a, 0x00, /* 0x40 */ | |
| 165 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 166 | − 0x00, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, /* 0x50 */ | |
| 167 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 168 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x60 */ | |
| 169 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 170 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x70 */ | |
| 171 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 172 | − 0x78, 0x18, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, /* 0x80 */ | |
| 173 | − 0x00, 0xc0, 0x88, 0x7a, 0xdf, 0x20, 0x00, 0x00, | |
| 174 | − 0x78, 0x18, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, /* 0x90 */ | |
| 175 | − 0x00, 0xc0, 0x88, 0x7a, 0xdf, 0x20, 0x00, 0x00, | |
| 176 | − 0x78, 0x18, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, /* 0xa0 */ | |
| 177 | − 0x00, 0xc0, 0x88, 0x7a, 0xdf, 0x20, 0x00, 0x00, | |
| 178 | − 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xb0 */ | |
| 179 | − 0xff, 0xff, 0xff, 0xff, 0xff, 0x1f, 0x00, 0x00, | |
| 180 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xc0 */ | |
| 181 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 182 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xd0 */ | |
| 183 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 184 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, /* 0xe0 */ | |
| 185 | − 0x00, 0x1f, 0x0f, 0x00, 0x00, | |
| 155 | +static const struct reg_default adau1373_reg_defaults[] = { | |
| 156 | + { ADAU1373_INPUT_MODE, 0x00 }, | |
| 157 | + { ADAU1373_AINL_CTRL(0), 0x00 }, | |
| 158 | + { ADAU1373_AINR_CTRL(0), 0x00 }, | |
| 159 | + { ADAU1373_AINL_CTRL(1), 0x00 }, | |
| 160 | + { ADAU1373_AINR_CTRL(1), 0x00 }, | |
| 161 | + { ADAU1373_AINL_CTRL(2), 0x00 }, | |
| 162 | + { ADAU1373_AINR_CTRL(2), 0x00 }, | |
| 163 | + { ADAU1373_AINL_CTRL(3), 0x00 }, | |
| 164 | + { ADAU1373_AINR_CTRL(3), 0x00 }, | |
| 165 | + { ADAU1373_LLINE_OUT(0), 0x00 }, | |
| 166 | + { ADAU1373_RLINE_OUT(0), 0x00 }, | |
| 167 | + { ADAU1373_LLINE_OUT(1), 0x00 }, | |
| 168 | + { ADAU1373_RLINE_OUT(1), 0x00 }, | |
| 169 | + { ADAU1373_LSPK_OUT, 0x00 }, | |
| 170 | + { ADAU1373_RSPK_OUT, 0x00 }, | |
| 171 | + { ADAU1373_LHP_OUT, 0x00 }, | |
| 172 | + { ADAU1373_RHP_OUT, 0x00 }, | |
| 173 | + { ADAU1373_ADC_GAIN, 0x00 }, | |
| 174 | + { ADAU1373_LADC_MIXER, 0x00 }, | |
| 175 | + { ADAU1373_RADC_MIXER, 0x00 }, | |
| 176 | + { ADAU1373_LLINE1_MIX, 0x00 }, | |
| 177 | + { ADAU1373_RLINE1_MIX, 0x00 }, | |
| 178 | + { ADAU1373_LLINE2_MIX, 0x00 }, | |
| 179 | + { ADAU1373_RLINE2_MIX, 0x00 }, | |
| 180 | + { ADAU1373_LSPK_MIX, 0x00 }, | |
| 181 | + { ADAU1373_RSPK_MIX, 0x00 }, | |
| 182 | + { ADAU1373_LHP_MIX, 0x00 }, | |
| 183 | + { ADAU1373_RHP_MIX, 0x00 }, | |
| 184 | + { ADAU1373_EP_MIX, 0x00 }, | |
| 185 | + { ADAU1373_HP_CTRL, 0x00 }, | |
| 186 | + { ADAU1373_HP_CTRL2, 0x00 }, | |
| 187 | + { ADAU1373_LS_CTRL, 0x00 }, | |
| 188 | + { ADAU1373_EP_CTRL, 0x00 }, | |
| 189 | + { ADAU1373_MICBIAS_CTRL1, 0x00 }, | |
| 190 | + { ADAU1373_MICBIAS_CTRL2, 0x00 }, | |
| 191 | + { ADAU1373_OUTPUT_CTRL, 0x00 }, | |
| 192 | + { ADAU1373_PWDN_CTRL1, 0x00 }, | |
| 193 | + { ADAU1373_PWDN_CTRL2, 0x00 }, | |
| 194 | + { ADAU1373_PWDN_CTRL3, 0x00 }, | |
| 195 | + { ADAU1373_DPLL_CTRL(0), 0x00 }, | |
| 196 | + { ADAU1373_PLL_CTRL1(0), 0x00 }, | |
| 197 | + { ADAU1373_PLL_CTRL2(0), 0x00 }, | |
| 198 | + { ADAU1373_PLL_CTRL3(0), 0x00 }, | |
| 199 | + { ADAU1373_PLL_CTRL4(0), 0x00 }, | |
| 200 | + { ADAU1373_PLL_CTRL5(0), 0x00 }, | |
| 201 | + { ADAU1373_PLL_CTRL6(0), 0x02 }, | |
| 202 | + { ADAU1373_DPLL_CTRL(1), 0x00 }, | |
| 203 | + { ADAU1373_PLL_CTRL1(1), 0x00 }, | |
| 204 | + { ADAU1373_PLL_CTRL2(1), 0x00 }, | |
| 205 | + { ADAU1373_PLL_CTRL3(1), 0x00 }, | |
| 206 | + { ADAU1373_PLL_CTRL4(1), 0x00 }, | |
| 207 | + { ADAU1373_PLL_CTRL5(1), 0x00 }, | |
| 208 | + { ADAU1373_PLL_CTRL6(1), 0x02 }, | |
| 209 | + { ADAU1373_HEADDECT, 0x00 }, | |
| 210 | + { ADAU1373_ADC_CTRL, 0x00 }, | |
| 211 | + { ADAU1373_CLK_SRC_DIV(0), 0x00 }, | |
| 212 | + { ADAU1373_CLK_SRC_DIV(1), 0x00 }, | |
| 213 | + { ADAU1373_DAI(0), 0x0a }, | |
| 214 | + { ADAU1373_DAI(1), 0x0a }, | |
| 215 | + { ADAU1373_DAI(2), 0x0a }, | |
| 216 | + { ADAU1373_BCLKDIV(0), 0x00 }, | |
| 217 | + { ADAU1373_BCLKDIV(1), 0x00 }, | |
| 218 | + { ADAU1373_BCLKDIV(2), 0x00 }, | |
| 219 | + { ADAU1373_SRC_RATIOA(0), 0x00 }, | |
| 220 | + { ADAU1373_SRC_RATIOB(0), 0x00 }, | |
| 221 | + { ADAU1373_SRC_RATIOA(1), 0x00 }, | |
| 222 | + { ADAU1373_SRC_RATIOB(1), 0x00 }, | |
| 223 | + { ADAU1373_SRC_RATIOA(2), 0x00 }, | |
| 224 | + { ADAU1373_SRC_RATIOB(2), 0x00 }, | |
| 225 | + { ADAU1373_DEEMP_CTRL, 0x00 }, | |
| 226 | + { ADAU1373_SRC_DAI_CTRL(0), 0x08 }, | |
| 227 | + { ADAU1373_SRC_DAI_CTRL(1), 0x08 }, | |
| 228 | + { ADAU1373_SRC_DAI_CTRL(2), 0x08 }, | |
| 229 | + { ADAU1373_DIN_MIX_CTRL(0), 0x00 }, | |
| 230 | + { ADAU1373_DIN_MIX_CTRL(1), 0x00 }, | |
| 231 | + { ADAU1373_DIN_MIX_CTRL(2), 0x00 }, | |
| 232 | + { ADAU1373_DIN_MIX_CTRL(3), 0x00 }, | |
| 233 | + { ADAU1373_DIN_MIX_CTRL(4), 0x00 }, | |
| 234 | + { ADAU1373_DOUT_MIX_CTRL(0), 0x00 }, | |
| 235 | + { ADAU1373_DOUT_MIX_CTRL(1), 0x00 }, | |
| 236 | + { ADAU1373_DOUT_MIX_CTRL(2), 0x00 }, | |
| 237 | + { ADAU1373_DOUT_MIX_CTRL(3), 0x00 }, | |
| 238 | + { ADAU1373_DOUT_MIX_CTRL(4), 0x00 }, | |
| 239 | + { ADAU1373_DAI_PBL_VOL(0), 0x00 }, | |
| 240 | + { ADAU1373_DAI_PBR_VOL(0), 0x00 }, | |
| 241 | + { ADAU1373_DAI_PBL_VOL(1), 0x00 }, | |
| 242 | + { ADAU1373_DAI_PBR_VOL(1), 0x00 }, | |
| 243 | + { ADAU1373_DAI_PBL_VOL(2), 0x00 }, | |
| 244 | + { ADAU1373_DAI_PBR_VOL(2), 0x00 }, | |
| 245 | + { ADAU1373_DAI_RECL_VOL(0), 0x00 }, | |
| 246 | + { ADAU1373_DAI_RECR_VOL(0), 0x00 }, | |
| 247 | + { ADAU1373_DAI_RECL_VOL(1), 0x00 }, | |
| 248 | + { ADAU1373_DAI_RECR_VOL(1), 0x00 }, | |
| 249 | + { ADAU1373_DAI_RECL_VOL(2), 0x00 }, | |
| 250 | + { ADAU1373_DAI_RECR_VOL(2), 0x00 }, | |
| 251 | + { ADAU1373_DAC1_PBL_VOL, 0x00 }, | |
| 252 | + { ADAU1373_DAC1_PBR_VOL, 0x00 }, | |
| 253 | + { ADAU1373_DAC2_PBL_VOL, 0x00 }, | |
| 254 | + { ADAU1373_DAC2_PBR_VOL, 0x00 }, | |
| 255 | + { ADAU1373_ADC_RECL_VOL, 0x00 }, | |
| 256 | + { ADAU1373_ADC_RECR_VOL, 0x00 }, | |
| 257 | + { ADAU1373_DMIC_RECL_VOL, 0x00 }, | |
| 258 | + { ADAU1373_DMIC_RECR_VOL, 0x00 }, | |
| 259 | + { ADAU1373_VOL_GAIN1, 0x00 }, | |
| 260 | + { ADAU1373_VOL_GAIN2, 0x00 }, | |
| 261 | + { ADAU1373_VOL_GAIN3, 0x00 }, | |
| 262 | + { ADAU1373_HPF_CTRL, 0x00 }, | |
| 263 | + { ADAU1373_BASS1, 0x00 }, | |
| 264 | + { ADAU1373_BASS2, 0x00 }, | |
| 265 | + { ADAU1373_DRC(0) + 0x0, 0x78 }, | |
| 266 | + { ADAU1373_DRC(0) + 0x1, 0x18 }, | |
| 267 | + { ADAU1373_DRC(0) + 0x2, 0x00 }, | |
| 268 | + { ADAU1373_DRC(0) + 0x3, 0x00 }, | |
| 269 | + { ADAU1373_DRC(0) + 0x4, 0x00 }, | |
| 270 | + { ADAU1373_DRC(0) + 0x5, 0xc0 }, | |
| 271 | + { ADAU1373_DRC(0) + 0x6, 0x00 }, | |
| 272 | + { ADAU1373_DRC(0) + 0x7, 0x00 }, | |
| 273 | + { ADAU1373_DRC(0) + 0x8, 0x00 }, | |
| 274 | + { ADAU1373_DRC(0) + 0x9, 0xc0 }, | |
| 275 | + { ADAU1373_DRC(0) + 0xa, 0x88 }, | |
| 276 | + { ADAU1373_DRC(0) + 0xb, 0x7a }, | |
| 277 | + { ADAU1373_DRC(0) + 0xc, 0xdf }, | |
| 278 | + { ADAU1373_DRC(0) + 0xd, 0x20 }, | |
| 279 | + { ADAU1373_DRC(0) + 0xe, 0x00 }, | |
| 280 | + { ADAU1373_DRC(0) + 0xf, 0x00 }, | |
| 281 | + { ADAU1373_DRC(1) + 0x0, 0x78 }, | |
| 282 | + { ADAU1373_DRC(1) + 0x1, 0x18 }, | |
| 283 | + { ADAU1373_DRC(1) + 0x2, 0x00 }, | |
| 284 | + { ADAU1373_DRC(1) + 0x3, 0x00 }, | |
| 285 | + { ADAU1373_DRC(1) + 0x4, 0x00 }, | |
| 286 | + { ADAU1373_DRC(1) + 0x5, 0xc0 }, | |
| 287 | + { ADAU1373_DRC(1) + 0x6, 0x00 }, | |
| 288 | + { ADAU1373_DRC(1) + 0x7, 0x00 }, | |
| 289 | + { ADAU1373_DRC(1) + 0x8, 0x00 }, | |
| 290 | + { ADAU1373_DRC(1) + 0x9, 0xc0 }, | |
| 291 | + { ADAU1373_DRC(1) + 0xa, 0x88 }, | |
| 292 | + { ADAU1373_DRC(1) + 0xb, 0x7a }, | |
| 293 | + { ADAU1373_DRC(1) + 0xc, 0xdf }, | |
| 294 | + { ADAU1373_DRC(1) + 0xd, 0x20 }, | |
| 295 | + { ADAU1373_DRC(1) + 0xe, 0x00 }, | |
| 296 | + { ADAU1373_DRC(1) + 0xf, 0x00 }, | |
| 297 | + { ADAU1373_DRC(2) + 0x0, 0x78 }, | |
| 298 | + { ADAU1373_DRC(2) + 0x1, 0x18 }, | |
| 299 | + { ADAU1373_DRC(2) + 0x2, 0x00 }, | |
| 300 | + { ADAU1373_DRC(2) + 0x3, 0x00 }, | |
| 301 | + { ADAU1373_DRC(2) + 0x4, 0x00 }, | |
| 302 | + { ADAU1373_DRC(2) + 0x5, 0xc0 }, | |
| 303 | + { ADAU1373_DRC(2) + 0x6, 0x00 }, | |
| 304 | + { ADAU1373_DRC(2) + 0x7, 0x00 }, | |
| 305 | + { ADAU1373_DRC(2) + 0x8, 0x00 }, | |
| 306 | + { ADAU1373_DRC(2) + 0x9, 0xc0 }, | |
| 307 | + { ADAU1373_DRC(2) + 0xa, 0x88 }, | |
| 308 | + { ADAU1373_DRC(2) + 0xb, 0x7a }, | |
| 309 | + { ADAU1373_DRC(2) + 0xc, 0xdf }, | |
| 310 | + { ADAU1373_DRC(2) + 0xd, 0x20 }, | |
| 311 | + { ADAU1373_DRC(2) + 0xe, 0x00 }, | |
| 312 | + { ADAU1373_DRC(2) + 0xf, 0x00 }, | |
| 313 | + { ADAU1373_3D_CTRL1, 0x00 }, | |
| 314 | + { ADAU1373_3D_CTRL2, 0x00 }, | |
| 315 | + { ADAU1373_FDSP_SEL1, 0x00 }, | |
| 316 | + { ADAU1373_FDSP_SEL2, 0x00 }, | |
| 317 | + { ADAU1373_FDSP_SEL2, 0x00 }, | |
| 318 | + { ADAU1373_FDSP_SEL4, 0x00 }, | |
| 319 | + { ADAU1373_DIGMICCTRL, 0x00 }, | |
| 320 | + { ADAU1373_DIGEN, 0x00 }, | |
| 186 | 321 | }; |
| 187 | 322 | |
| 188 | 323 | static const unsigned int adau1373_out_tlv[] = { |
| @@ -418,6 +553,7 @@ static int adau1373_pll_event(struct snd_soc_dapm_widget *w, · 229 unmodified lines | ||
| 418 | 553 | struct snd_kcontrol *kcontrol, int event) |
| 419 | 554 | { |
| 420 | 555 | struct snd_soc_codec *codec = w->codec; |
| 556 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 421 | 557 | unsigned int pll_id = w->name[3] - '1'; |
| 422 | 558 | unsigned int val; |
| 423 | 559 | |
| @@ -426,7 +562,7 @@ static int adau1373_pll_event(struct snd_soc_dapm_widget *w, · 2 unmodified lines | ||
| 426 | 562 | else |
| 427 | 563 | val = 0; |
| 428 | 564 | |
| 429 | − snd_soc_update_bits(codec, ADAU1373_PLL_CTRL6(pll_id), | |
| 565 | + regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), | |
| 430 | 566 | ADAU1373_PLL_CTRL6_PLL_EN, val); |
| 431 | 567 | |
| 432 | 568 | if (SND_SOC_DAPM_EVENT_ON(event)) |
| @@ -938,7 +1074,7 @@ static int adau1373_hw_params(struct snd_pcm_substream *substream, · 505 unmodified lines | ||
| 938 | 1074 | |
| 939 | 1075 | adau1373_dai->enable_src = (div != 0); |
| 940 | 1076 | |
| 941 | − snd_soc_update_bits(codec, ADAU1373_BCLKDIV(dai->id), | |
| 1077 | + regmap_update_bits(adau1373->regmap, ADAU1373_BCLKDIV(dai->id), | |
| 942 | 1078 | ADAU1373_BCLKDIV_SR_MASK | ADAU1373_BCLKDIV_BCLK_MASK, |
| 943 | 1079 | (div << 2) | ADAU1373_BCLKDIV_64); |
| 944 | 1080 | |
| @@ -959,7 +1095,7 @@ static int adau1373_hw_params(struct snd_pcm_substream *substream, · 14 unmodified lines | ||
| 959 | 1095 | return -EINVAL; |
| 960 | 1096 | } |
| 961 | 1097 | |
| 962 | − return snd_soc_update_bits(codec, ADAU1373_DAI(dai->id), | |
| 1098 | + return regmap_update_bits(adau1373->regmap, ADAU1373_DAI(dai->id), | |
| 963 | 1099 | ADAU1373_DAI_WLEN_MASK, ctrl); |
| 964 | 1100 | } |
| 965 | 1101 | |
| @@ -1016,7 +1152,7 @@ static int adau1373_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 50 unmodified lines | ||
| 1016 | 1152 | return -EINVAL; |
| 1017 | 1153 | } |
| 1018 | 1154 | |
| 1019 | − snd_soc_update_bits(codec, ADAU1373_DAI(dai->id), | |
| 1155 | + regmap_update_bits(adau1373->regmap, ADAU1373_DAI(dai->id), | |
| 1020 | 1156 | ~ADAU1373_DAI_WLEN_MASK, ctrl); |
| 1021 | 1157 | |
| 1022 | 1158 | return 0; |
| @@ -1039,7 +1175,7 @@ static int adau1373_set_dai_sysclk(struct snd_soc_dai *dai, · 16 unmodified lines | ||
| 1039 | 1175 | adau1373_dai->sysclk = freq; |
| 1040 | 1176 | adau1373_dai->clk_src = clk_id; |
| 1041 | 1177 | |
| 1042 | − snd_soc_update_bits(dai->codec, ADAU1373_BCLKDIV(dai->id), | |
| 1178 | + regmap_update_bits(adau1373->regmap, ADAU1373_BCLKDIV(dai->id), | |
| 1043 | 1179 | ADAU1373_BCLKDIV_SOURCE, clk_id << 5); |
| 1044 | 1180 | |
| 1045 | 1181 | return 0; |
| @@ -1120,6 +1256,7 @@ static struct snd_soc_dai_driver adau1373_dai_driver[] = { · 74 unmodified lines | ||
| 1120 | 1256 | static int adau1373_set_pll(struct snd_soc_codec *codec, int pll_id, |
| 1121 | 1257 | int source, unsigned int freq_in, unsigned int freq_out) |
| 1122 | 1258 | { |
| 1259 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 1123 | 1260 | unsigned int dpll_div = 0; |
| 1124 | 1261 | unsigned int x, r, n, m, i, j, mode; |
| 1125 | 1262 | |
| @@ -1187,36 +1324,36 @@ static int adau1373_set_pll(struct snd_soc_codec *codec, int pll_id, · 61 unmodified lines | ||
| 1187 | 1324 | |
| 1188 | 1325 | if (dpll_div) { |
| 1189 | 1326 | dpll_div = 11 - dpll_div; |
| 1190 | − snd_soc_update_bits(codec, ADAU1373_PLL_CTRL6(pll_id), | |
| 1327 | + regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), | |
| 1191 | 1328 | ADAU1373_PLL_CTRL6_DPLL_BYPASS, 0); |
| 1192 | 1329 | } else { |
| 1193 | − snd_soc_update_bits(codec, ADAU1373_PLL_CTRL6(pll_id), | |
| 1330 | + regmap_update_bits(adau1373->regmap, ADAU1373_PLL_CTRL6(pll_id), | |
| 1194 | 1331 | ADAU1373_PLL_CTRL6_DPLL_BYPASS, |
| 1195 | 1332 | ADAU1373_PLL_CTRL6_DPLL_BYPASS); |
| 1196 | 1333 | } |
| 1197 | 1334 | |
| 1198 | − snd_soc_write(codec, ADAU1373_DPLL_CTRL(pll_id), | |
| 1335 | + regmap_write(adau1373->regmap, ADAU1373_DPLL_CTRL(pll_id), | |
| 1199 | 1336 | (source << 4) | dpll_div); |
| 1200 | − snd_soc_write(codec, ADAU1373_PLL_CTRL1(pll_id), (m >> 8) & 0xff); | |
| 1201 | − snd_soc_write(codec, ADAU1373_PLL_CTRL2(pll_id), m & 0xff); | |
| 1202 | − snd_soc_write(codec, ADAU1373_PLL_CTRL3(pll_id), (n >> 8) & 0xff); | |
| 1203 | − snd_soc_write(codec, ADAU1373_PLL_CTRL4(pll_id), n & 0xff); | |
| 1204 | − snd_soc_write(codec, ADAU1373_PLL_CTRL5(pll_id), | |
| 1337 | + regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL1(pll_id), (m >> 8) & 0xff); | |
| 1338 | + regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL2(pll_id), m & 0xff); | |
| 1339 | + regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL3(pll_id), (n >> 8) & 0xff); | |
| 1340 | + regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL4(pll_id), n & 0xff); | |
| 1341 | + regmap_write(adau1373->regmap, ADAU1373_PLL_CTRL5(pll_id), | |
| 1205 | 1342 | (r << 3) | (x << 1) | mode); |
| 1206 | 1343 | |
| 1207 | 1344 | /* Set sysclk to pll_rate / 4 */ |
| 1208 | − snd_soc_update_bits(codec, ADAU1373_CLK_SRC_DIV(pll_id), 0x3f, 0x09); | |
| 1345 | + regmap_update_bits(adau1373->regmap, ADAU1373_CLK_SRC_DIV(pll_id), 0x3f, 0x09); | |
| 1209 | 1346 | |
| 1210 | 1347 | return 0; |
| 1211 | 1348 | } |
| 1212 | 1349 | |
| 1213 | −static void adau1373_load_drc_settings(struct snd_soc_codec *codec, | |
| 1350 | +static void adau1373_load_drc_settings(struct adau1373 *adau1373, | |
| 1214 | 1351 | unsigned int nr, uint8_t *drc) |
| 1215 | 1352 | { |
| 1216 | 1353 | unsigned int i; |
| 1217 | 1354 | |
| 1218 | 1355 | for (i = 0; i < ADAU1373_DRC_SIZE; ++i) |
| 1219 | − snd_soc_write(codec, ADAU1373_DRC(nr) + i, drc[i]); | |
| 1356 | + regmap_write(adau1373->regmap, ADAU1373_DRC(nr) + i, drc[i]); | |
| 1220 | 1357 | } |
| 1221 | 1358 | |
| 1222 | 1359 | static bool adau1373_valid_micbias(enum adau1373_micbias_voltage micbias) |
| @@ -1235,13 +1372,14 @@ static bool adau1373_valid_micbias(enum adau1373_micbias_voltage micbias) · 12 unmodified lines | ||
| 1235 | 1372 | |
| 1236 | 1373 | static int adau1373_probe(struct snd_soc_codec *codec) |
| 1237 | 1374 | { |
| 1375 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 1238 | 1376 | struct adau1373_platform_data *pdata = codec->dev->platform_data; |
| 1239 | 1377 | bool lineout_differential = false; |
| 1240 | 1378 | unsigned int val; |
| 1241 | 1379 | int ret; |
| 1242 | 1380 | int i; |
| 1243 | 1381 | |
| 1244 | − ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | |
| 1382 | + ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); | |
| 1245 | 1383 | if (ret) { |
| 1246 | 1384 | dev_err(codec->dev, "failed to set cache I/O: %d\n", ret); |
| 1247 | 1385 | return ret; |
| @@ -1256,7 +1394,7 @@ static int adau1373_probe(struct snd_soc_codec *codec) · 8 unmodified lines | ||
| 1256 | 1394 | return -EINVAL; |
| 1257 | 1395 | |
| 1258 | 1396 | for (i = 0; i < pdata->num_drc; ++i) { |
| 1259 | − adau1373_load_drc_settings(codec, i, | |
| 1397 | + adau1373_load_drc_settings(adau1373, i, | |
| 1260 | 1398 | pdata->drc_setting[i]); |
| 1261 | 1399 | } |
| 1262 | 1400 | |
| @@ -1268,18 +1406,18 @@ static int adau1373_probe(struct snd_soc_codec *codec) · 5 unmodified lines | ||
| 1268 | 1406 | if (pdata->input_differential[i]) |
| 1269 | 1407 | val |= BIT(i); |
| 1270 | 1408 | } |
| 1271 | − snd_soc_write(codec, ADAU1373_INPUT_MODE, val); | |
| 1409 | + regmap_write(adau1373->regmap, ADAU1373_INPUT_MODE, val); | |
| 1272 | 1410 | |
| 1273 | 1411 | val = 0; |
| 1274 | 1412 | if (pdata->lineout_differential) |
| 1275 | 1413 | val |= ADAU1373_OUTPUT_CTRL_LDIFF; |
| 1276 | 1414 | if (pdata->lineout_ground_sense) |
| 1277 | 1415 | val |= ADAU1373_OUTPUT_CTRL_LNFBEN; |
| 1278 | − snd_soc_write(codec, ADAU1373_OUTPUT_CTRL, val); | |
| 1416 | + regmap_write(adau1373->regmap, ADAU1373_OUTPUT_CTRL, val); | |
| 1279 | 1417 | |
| 1280 | 1418 | lineout_differential = pdata->lineout_differential; |
| 1281 | 1419 | |
| 1282 | − snd_soc_write(codec, ADAU1373_EP_CTRL, | |
| 1420 | + regmap_write(adau1373->regmap, ADAU1373_EP_CTRL, | |
| 1283 | 1421 | (pdata->micbias1 << ADAU1373_EP_CTRL_MICBIAS1_OFFSET) | |
| 1284 | 1422 | (pdata->micbias2 << ADAU1373_EP_CTRL_MICBIAS2_OFFSET)); |
| 1285 | 1423 | } |
| @@ -1289,7 +1427,7 @@ static int adau1373_probe(struct snd_soc_codec *codec) · 3 unmodified lines | ||
| 1289 | 1427 | ARRAY_SIZE(adau1373_lineout2_controls)); |
| 1290 | 1428 | } |
| 1291 | 1429 | |
| 1292 | − snd_soc_write(codec, ADAU1373_ADC_CTRL, | |
| 1430 | + regmap_write(adau1373->regmap, ADAU1373_ADC_CTRL, | |
| 1293 | 1431 | ADAU1373_ADC_CTRL_RESET_FORCE | ADAU1373_ADC_CTRL_PEAK_DETECT); |
| 1294 | 1432 | |
| 1295 | 1433 | return 0; |
| @@ -1298,17 +1436,19 @@ static int adau1373_probe(struct snd_soc_codec *codec) · 2 unmodified lines | ||
| 1298 | 1436 | static int adau1373_set_bias_level(struct snd_soc_codec *codec, |
| 1299 | 1437 | enum snd_soc_bias_level level) |
| 1300 | 1438 | { |
| 1439 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 1440 | + | |
| 1301 | 1441 | switch (level) { |
| 1302 | 1442 | case SND_SOC_BIAS_ON: |
| 1303 | 1443 | break; |
| 1304 | 1444 | case SND_SOC_BIAS_PREPARE: |
| 1305 | 1445 | break; |
| 1306 | 1446 | case SND_SOC_BIAS_STANDBY: |
| 1307 | − snd_soc_update_bits(codec, ADAU1373_PWDN_CTRL3, | |
| 1447 | + regmap_update_bits(adau1373->regmap, ADAU1373_PWDN_CTRL3, | |
| 1308 | 1448 | ADAU1373_PWDN_CTRL3_PWR_EN, ADAU1373_PWDN_CTRL3_PWR_EN); |
| 1309 | 1449 | break; |
| 1310 | 1450 | case SND_SOC_BIAS_OFF: |
| 1311 | − snd_soc_update_bits(codec, ADAU1373_PWDN_CTRL3, | |
| 1451 | + regmap_update_bits(adau1373->regmap, ADAU1373_PWDN_CTRL3, | |
| 1312 | 1452 | ADAU1373_PWDN_CTRL3_PWR_EN, 0); |
| 1313 | 1453 | break; |
| 1314 | 1454 | } |
| @@ -1324,17 +1464,49 @@ static int adau1373_remove(struct snd_soc_codec *codec) · 9 unmodified lines | ||
| 1324 | 1464 | |
| 1325 | 1465 | static int adau1373_suspend(struct snd_soc_codec *codec) |
| 1326 | 1466 | { |
| 1327 | − return adau1373_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
| 1467 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 1468 | + int ret; | |
| 1469 | + | |
| 1470 | + ret = adau1373_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
| 1471 | + regcache_cache_only(adau1373->regmap, true); | |
| 1472 | + | |
| 1473 | + return ret; | |
| 1328 | 1474 | } |
| 1329 | 1475 | |
| 1330 | 1476 | static int adau1373_resume(struct snd_soc_codec *codec) |
| 1331 | 1477 | { |
| 1478 | + struct adau1373 *adau1373 = snd_soc_codec_get_drvdata(codec); | |
| 1479 | + | |
| 1480 | + regcache_cache_only(adau1373->regmap, false); | |
| 1332 | 1481 | adau1373_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1333 | − snd_soc_cache_sync(codec); | |
| 1482 | + regcache_sync(adau1373->regmap); | |
| 1334 | 1483 | |
| 1335 | 1484 | return 0; |
| 1336 | 1485 | } |
| 1337 | 1486 | |
| 1487 | +static bool adau1373_register_volatile(struct device *dev, unsigned int reg) | |
| 1488 | +{ | |
| 1489 | + switch (reg) { | |
| 1490 | + case ADAU1373_SOFT_RESET: | |
| 1491 | + case ADAU1373_ADC_DAC_STATUS: | |
| 1492 | + return true; | |
| 1493 | + default: | |
| 1494 | + return false; | |
| 1495 | + } | |
| 1496 | +} | |
| 1497 | + | |
| 1498 | +static const struct regmap_config adau1373_regmap_config = { | |
| 1499 | + .val_bits = 8, | |
| 1500 | + .reg_bits = 8, | |
| 1501 | + | |
| 1502 | + .volatile_reg = adau1373_register_volatile, | |
| 1503 | + .max_register = ADAU1373_SOFT_RESET, | |
| 1504 | + | |
| 1505 | + .cache_type = REGCACHE_RBTREE, | |
| 1506 | + .reg_defaults = adau1373_reg_defaults, | |
| 1507 | + .num_reg_defaults = ARRAY_SIZE(adau1373_reg_defaults), | |
| 1508 | +}; | |
| 1509 | + | |
| 1338 | 1510 | static struct snd_soc_codec_driver adau1373_codec_driver = { |
| 1339 | 1511 | .probe = adau1373_probe, |
| 1340 | 1512 | .remove = adau1373_remove, |
| @@ -1342,9 +1514,6 @@ static struct snd_soc_codec_driver adau1373_codec_driver = { · 1 unmodified line | ||
| 1342 | 1514 | .resume = adau1373_resume, |
| 1343 | 1515 | .set_bias_level = adau1373_set_bias_level, |
| 1344 | 1516 | .idle_bias_off = true, |
| 1345 | − .reg_cache_size = ARRAY_SIZE(adau1373_default_regs), | |
| 1346 | − .reg_cache_default = adau1373_default_regs, | |
| 1347 | − .reg_word_size = sizeof(uint8_t), | |
| 1348 | 1517 | |
| 1349 | 1518 | .set_pll = adau1373_set_pll, |
| 1350 | 1519 | |
| @@ -1366,6 +1535,13 @@ static int adau1373_i2c_probe(struct i2c_client *client, · 15 unmodified lines | ||
| 1366 | 1535 | if (!adau1373) |
| 1367 | 1536 | return -ENOMEM; |
| 1368 | 1537 | |
| 1538 | + adau1373->regmap = devm_regmap_init_i2c(client, | |
| 1539 | + &adau1373_regmap_config); | |
| 1540 | + if (IS_ERR(adau1373->regmap)) | |
| 1541 | + return PTR_ERR(adau1373->regmap); | |
| 1542 | + | |
| 1543 | + regmap_write(adau1373->regmap, ADAU1373_SOFT_RESET, 0x00); | |
| 1544 | + | |
| 1369 | 1545 | dev_set_drvdata(&client->dev, adau1373); |
| 1370 | 1546 | |
| 1371 | 1547 | ret = snd_soc_register_codec(&client->dev, &adau1373_codec_driver, |
| @@ -115,22 +115,34 @@ · 114 unmodified lines | ||
| 115 | 115 | |
| 116 | 116 | #define ADAV80X_PLL_OUTE_SYSCLKPD(x) BIT(2 - (x)) |
| 117 | 117 | |
| 118 | −static u8 adav80x_default_regs[] = { | |
| 119 | − 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x02, 0x01, 0x80, 0x26, 0x00, 0x00, | |
| 120 | − 0x02, 0x40, 0x20, 0x00, 0x09, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 121 | − 0x04, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0xd1, 0x92, 0xb1, 0x37, | |
| 122 | − 0x48, 0xd2, 0xfb, 0xca, 0xd2, 0x15, 0xe8, 0x29, 0xb9, 0x6a, 0xda, 0x2b, | |
| 123 | − 0xb7, 0xc0, 0x11, 0x65, 0x5c, 0xf6, 0xff, 0x8d, 0x00, 0x00, 0x00, 0x00, | |
| 124 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | |
| 125 | − 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa5, 0x00, 0x00, | |
| 126 | − 0x00, 0xe8, 0x46, 0xe1, 0x5b, 0xd3, 0x43, 0x77, 0x93, 0xa7, 0x44, 0xee, | |
| 127 | − 0x32, 0x12, 0xc0, 0x11, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x3f, 0x3f, | |
| 128 | − 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x1d, 0x00, 0x00, 0x00, 0x00, | |
| 129 | − 0x00, 0x00, 0x00, 0x00, 0x52, 0x00, | |
| 118 | +static struct reg_default adav80x_reg_defaults[] = { | |
| 119 | + { ADAV80X_PLAYBACK_CTRL, 0x01 }, | |
| 120 | + { ADAV80X_AUX_IN_CTRL, 0x01 }, | |
| 121 | + { ADAV80X_REC_CTRL, 0x02 }, | |
| 122 | + { ADAV80X_AUX_OUT_CTRL, 0x01 }, | |
| 123 | + { ADAV80X_DPATH_CTRL1, 0xc0 }, | |
| 124 | + { ADAV80X_DPATH_CTRL2, 0x11 }, | |
| 125 | + { ADAV80X_DAC_CTRL1, 0x00 }, | |
| 126 | + { ADAV80X_DAC_CTRL2, 0x00 }, | |
| 127 | + { ADAV80X_DAC_CTRL3, 0x00 }, | |
| 128 | + { ADAV80X_DAC_L_VOL, 0xff }, | |
| 129 | + { ADAV80X_DAC_R_VOL, 0xff }, | |
| 130 | + { ADAV80X_PGA_L_VOL, 0x00 }, | |
| 131 | + { ADAV80X_PGA_R_VOL, 0x00 }, | |
| 132 | + { ADAV80X_ADC_CTRL1, 0x00 }, | |
| 133 | + { ADAV80X_ADC_CTRL2, 0x00 }, | |
| 134 | + { ADAV80X_ADC_L_VOL, 0xff }, | |
| 135 | + { ADAV80X_ADC_R_VOL, 0xff }, | |
| 136 | + { ADAV80X_PLL_CTRL1, 0x00 }, | |
| 137 | + { ADAV80X_PLL_CTRL2, 0x00 }, | |
| 138 | + { ADAV80X_ICLK_CTRL1, 0x00 }, | |
| 139 | + { ADAV80X_ICLK_CTRL2, 0x00 }, | |
| 140 | + { ADAV80X_PLL_CLK_SRC, 0x00 }, | |
| 141 | + { ADAV80X_PLL_OUTE, 0x00 }, | |
| 130 | 142 | }; |
| 131 | 143 | |
| 132 | 144 | struct adav80x { |
| 133 | − enum snd_soc_control_type control_type; | |
| 145 | + struct regmap *regmap; | |
| 134 | 146 | |
| 135 | 147 | enum adav80x_clk_src clk_src; |
| 136 | 148 | unsigned int sysclk; |
| @@ -298,7 +310,7 @@ static int adav80x_set_deemph(struct snd_soc_codec *codec) · 161 unmodified lines | ||
| 298 | 310 | val = ADAV80X_DAC_CTRL2_DEEMPH_NONE; |
| 299 | 311 | } |
| 300 | 312 | |
| 301 | − return snd_soc_update_bits(codec, ADAV80X_DAC_CTRL2, | |
| 313 | + return regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL2, | |
| 302 | 314 | ADAV80X_DAC_CTRL2_DEEMPH_MASK, val); |
| 303 | 315 | } |
| 304 | 316 | |
| @@ -394,10 +406,11 @@ static int adav80x_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 89 unmodified lines | ||
| 394 | 406 | return -EINVAL; |
| 395 | 407 | } |
| 396 | 408 | |
| 397 | − snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][0], | |
| 409 | + regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][0], | |
| 398 | 410 | ADAV80X_CAPTURE_MODE_MASK | ADAV80X_CAPTURE_MODE_MASTER, |
| 399 | 411 | capture); |
| 400 | − snd_soc_write(codec, adav80x_port_ctrl_regs[dai->id][1], playback); | |
| 412 | + regmap_write(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][1], | |
| 413 | + playback); | |
| 401 | 414 | |
| 402 | 415 | adav80x->dai_fmt[dai->id] = fmt & SND_SOC_DAIFMT_FORMAT_MASK; |
| 403 | 416 | |
| @@ -407,6 +420,7 @@ static int adav80x_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 3 unmodified lines | ||
| 407 | 420 | static int adav80x_set_adc_clock(struct snd_soc_codec *codec, |
| 408 | 421 | unsigned int sample_rate) |
| 409 | 422 | { |
| 423 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 410 | 424 | unsigned int val; |
| 411 | 425 | |
| 412 | 426 | if (sample_rate <= 48000) |
| @@ -414,7 +428,7 @@ static int adav80x_set_adc_clock(struct snd_soc_codec *codec, · 1 unmodified line | ||
| 414 | 428 | else |
| 415 | 429 | val = ADAV80X_ADC_CTRL1_MODULATOR_64FS; |
| 416 | 430 | |
| 417 | − snd_soc_update_bits(codec, ADAV80X_ADC_CTRL1, | |
| 431 | + regmap_update_bits(adav80x->regmap, ADAV80X_ADC_CTRL1, | |
| 418 | 432 | ADAV80X_ADC_CTRL1_MODULATOR_MASK, val); |
| 419 | 433 | |
| 420 | 434 | return 0; |
| @@ -423,6 +437,7 @@ static int adav80x_set_adc_clock(struct snd_soc_codec *codec, · 2 unmodified lines | ||
| 423 | 437 | static int adav80x_set_dac_clock(struct snd_soc_codec *codec, |
| 424 | 438 | unsigned int sample_rate) |
| 425 | 439 | { |
| 440 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 426 | 441 | unsigned int val; |
| 427 | 442 | |
| 428 | 443 | if (sample_rate <= 48000) |
| @@ -430,7 +445,7 @@ static int adav80x_set_dac_clock(struct snd_soc_codec *codec, · 1 unmodified line | ||
| 430 | 445 | else |
| 431 | 446 | val = ADAV80X_DAC_CTRL2_DIV2 | ADAV80X_DAC_CTRL2_INTERPOL_128FS; |
| 432 | 447 | |
| 433 | − snd_soc_update_bits(codec, ADAV80X_DAC_CTRL2, | |
| 448 | + regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL2, | |
| 434 | 449 | ADAV80X_DAC_CTRL2_DIV_MASK | ADAV80X_DAC_CTRL2_INTERPOL_MASK, |
| 435 | 450 | val); |
| 436 | 451 | |
| @@ -440,6 +455,7 @@ static int adav80x_set_dac_clock(struct snd_soc_codec *codec, · 3 unmodified lines | ||
| 440 | 455 | static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, |
| 441 | 456 | struct snd_soc_dai *dai, snd_pcm_format_t format) |
| 442 | 457 | { |
| 458 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 443 | 459 | unsigned int val; |
| 444 | 460 | |
| 445 | 461 | switch (format) { |
| @@ -459,7 +475,7 @@ static int adav80x_set_capture_pcm_format(struct snd_soc_codec *codec, · 13 unmodified lines | ||
| 459 | 475 | return -EINVAL; |
| 460 | 476 | } |
| 461 | 477 | |
| 462 | − snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][0], | |
| 478 | + regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][0], | |
| 463 | 479 | ADAV80X_CAPTURE_WORD_LEN_MASK, val); |
| 464 | 480 | |
| 465 | 481 | return 0; |
| @@ -491,7 +507,7 @@ static int adav80x_set_playback_pcm_format(struct snd_soc_codec *codec, · 25 unmodified lines | ||
| 491 | 507 | return -EINVAL; |
| 492 | 508 | } |
| 493 | 509 | |
| 494 | − snd_soc_update_bits(codec, adav80x_port_ctrl_regs[dai->id][1], | |
| 510 | + regmap_update_bits(adav80x->regmap, adav80x_port_ctrl_regs[dai->id][1], | |
| 495 | 511 | ADAV80X_PLAYBACK_MODE_MASK, val); |
| 496 | 512 | |
| 497 | 513 | return 0; |
| @@ -554,8 +570,10 @@ static int adav80x_set_sysclk(struct snd_soc_codec *codec, · 56 unmodified lines | ||
| 554 | 570 | ADAV80X_ICLK_CTRL1_ICLK2_SRC(clk_id); |
| 555 | 571 | iclk_ctrl2 = ADAV80X_ICLK_CTRL2_ICLK1_SRC(clk_id); |
| 556 | 572 | |
| 557 | − snd_soc_write(codec, ADAV80X_ICLK_CTRL1, iclk_ctrl1); | |
| 558 | − snd_soc_write(codec, ADAV80X_ICLK_CTRL2, iclk_ctrl2); | |
| 573 | + regmap_write(adav80x->regmap, ADAV80X_ICLK_CTRL1, | |
| 574 | + iclk_ctrl1); | |
| 575 | + regmap_write(adav80x->regmap, ADAV80X_ICLK_CTRL2, | |
| 576 | + iclk_ctrl2); | |
| 559 | 577 | |
| 560 | 578 | snd_soc_dapm_sync(&codec->dapm); |
| 561 | 579 | } |
| @@ -575,10 +593,12 @@ static int adav80x_set_sysclk(struct snd_soc_codec *codec, · 13 unmodified lines | ||
| 575 | 593 | mask = ADAV80X_PLL_OUTE_SYSCLKPD(clk_id); |
| 576 | 594 | |
| 577 | 595 | if (freq == 0) { |
| 578 | − snd_soc_update_bits(codec, ADAV80X_PLL_OUTE, mask, mask); | |
| 596 | + regmap_update_bits(adav80x->regmap, ADAV80X_PLL_OUTE, | |
| 597 | + mask, mask); | |
| 579 | 598 | adav80x->sysclk_pd[clk_id] = true; |
| 580 | 599 | } else { |
| 581 | − snd_soc_update_bits(codec, ADAV80X_PLL_OUTE, mask, 0); | |
| 600 | + regmap_update_bits(adav80x->regmap, ADAV80X_PLL_OUTE, | |
| 601 | + mask, 0); | |
| 582 | 602 | adav80x->sysclk_pd[clk_id] = false; |
| 583 | 603 | } |
| 584 | 604 | |
| @@ -650,9 +670,9 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, · 65 unmodified lines | ||
| 650 | 670 | return -EINVAL; |
| 651 | 671 | } |
| 652 | 672 | |
| 653 | − snd_soc_update_bits(codec, ADAV80X_PLL_CTRL1, ADAV80X_PLL_CTRL1_PLLDIV, | |
| 654 | − pll_ctrl1); | |
| 655 | − snd_soc_update_bits(codec, ADAV80X_PLL_CTRL2, | |
| 673 | + regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CTRL1, | |
| 674 | + ADAV80X_PLL_CTRL1_PLLDIV, pll_ctrl1); | |
| 675 | + regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CTRL2, | |
| 656 | 676 | ADAV80X_PLL_CTRL2_PLL_MASK(pll_id), pll_ctrl2); |
| 657 | 677 | |
| 658 | 678 | if (source != adav80x->pll_src) { |
| @@ -661,7 +681,7 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, · 2 unmodified lines | ||
| 661 | 681 | else |
| 662 | 682 | pll_src = ADAV80X_PLL_CLK_SRC_PLL_XIN(pll_id); |
| 663 | 683 | |
| 664 | − snd_soc_update_bits(codec, ADAV80X_PLL_CLK_SRC, | |
| 684 | + regmap_update_bits(adav80x->regmap, ADAV80X_PLL_CLK_SRC, | |
| 665 | 685 | ADAV80X_PLL_CLK_SRC_PLL_MASK(pll_id), pll_src); |
| 666 | 686 | |
| 667 | 687 | adav80x->pll_src = source; |
| @@ -675,6 +695,7 @@ static int adav80x_set_pll(struct snd_soc_codec *codec, int pll_id, · 7 unmodified lines | ||
| 675 | 695 | static int adav80x_set_bias_level(struct snd_soc_codec *codec, |
| 676 | 696 | enum snd_soc_bias_level level) |
| 677 | 697 | { |
| 698 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 678 | 699 | unsigned int mask = ADAV80X_DAC_CTRL1_PD; |
| 679 | 700 | |
| 680 | 701 | switch (level) { |
| @@ -683,10 +704,12 @@ static int adav80x_set_bias_level(struct snd_soc_codec *codec, · 2 unmodified lines | ||
| 683 | 704 | case SND_SOC_BIAS_PREPARE: |
| 684 | 705 | break; |
| 685 | 706 | case SND_SOC_BIAS_STANDBY: |
| 686 | − snd_soc_update_bits(codec, ADAV80X_DAC_CTRL1, mask, 0x00); | |
| 707 | + regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL1, mask, | |
| 708 | + 0x00); | |
| 687 | 709 | break; |
| 688 | 710 | case SND_SOC_BIAS_OFF: |
| 689 | − snd_soc_update_bits(codec, ADAV80X_DAC_CTRL1, mask, mask); | |
| 711 | + regmap_update_bits(adav80x->regmap, ADAV80X_DAC_CTRL1, mask, | |
| 712 | + mask); | |
| 690 | 713 | break; |
| 691 | 714 | } |
| 692 | 715 | |
| @@ -780,7 +803,7 @@ static int adav80x_probe(struct snd_soc_codec *codec) · 87 unmodified lines | ||
| 780 | 803 | int ret; |
| 781 | 804 | struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); |
| 782 | 805 | |
| 783 | − ret = snd_soc_codec_set_cache_io(codec, 7, 9, adav80x->control_type); | |
| 806 | + ret = snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); | |
| 784 | 807 | if (ret) { |
| 785 | 808 | dev_err(codec->dev, "failed to set cache I/O: %d\n", ret); |
| 786 | 809 | return ret; |
| @@ -791,23 +814,31 @@ static int adav80x_probe(struct snd_soc_codec *codec) · 4 unmodified lines | ||
| 791 | 814 | snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL2"); |
| 792 | 815 | |
| 793 | 816 | /* Power down S/PDIF receiver, since it is currently not supported */ |
| 794 | − snd_soc_write(codec, ADAV80X_PLL_OUTE, 0x20); | |
| 817 | + regmap_write(adav80x->regmap, ADAV80X_PLL_OUTE, 0x20); | |
| 795 | 818 | /* Disable DAC zero flag */ |
| 796 | − snd_soc_write(codec, ADAV80X_DAC_CTRL3, 0x6); | |
| 819 | + regmap_write(adav80x->regmap, ADAV80X_DAC_CTRL3, 0x6); | |
| 797 | 820 | |
| 798 | 821 | return adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 799 | 822 | } |
| 800 | 823 | |
| 801 | 824 | static int adav80x_suspend(struct snd_soc_codec *codec) |
| 802 | 825 | { |
| 803 | − return adav80x_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
| 826 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 827 | + int ret; | |
| 828 | + | |
| 829 | + ret = adav80x_set_bias_level(codec, SND_SOC_BIAS_OFF); | |
| 830 | + regcache_cache_only(adav80x->regmap, true); | |
| 831 | + | |
| 832 | + return ret; | |
| 804 | 833 | } |
| 805 | 834 | |
| 806 | 835 | static int adav80x_resume(struct snd_soc_codec *codec) |
| 807 | 836 | { |
| 837 | + struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); | |
| 838 | + | |
| 839 | + regcache_cache_only(adav80x->regmap, false); | |
| 808 | 840 | adav80x_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 809 | − codec->cache_sync = 1; | |
| 810 | − snd_soc_cache_sync(codec); | |
| 841 | + regcache_sync(adav80x->regmap); | |
| 811 | 842 | |
| 812 | 843 | return 0; |
| 813 | 844 | } |
| @@ -827,10 +858,6 @@ static struct snd_soc_codec_driver adav80x_codec_driver = { · 13 unmodified lines | ||
| 827 | 858 | .set_pll = adav80x_set_pll, |
| 828 | 859 | .set_sysclk = adav80x_set_sysclk, |
| 829 | 860 | |
| 830 | − .reg_word_size = sizeof(u8), | |
| 831 | − .reg_cache_size = ARRAY_SIZE(adav80x_default_regs), | |
| 832 | − .reg_cache_default = adav80x_default_regs, | |
| 833 | − | |
| 834 | 861 | .controls = adav80x_controls, |
| 835 | 862 | .num_controls = ARRAY_SIZE(adav80x_controls), |
| 836 | 863 | .dapm_widgets = adav80x_dapm_widgets, |
| @@ -839,18 +866,21 @@ static struct snd_soc_codec_driver adav80x_codec_driver = { · 2 unmodified lines | ||
| 839 | 866 | .num_dapm_routes = ARRAY_SIZE(adav80x_dapm_routes), |
| 840 | 867 | }; |
| 841 | 868 | |
| 842 | −static int adav80x_bus_probe(struct device *dev, | |
| 843 | − enum snd_soc_control_type control_type) | |
| 869 | +static int adav80x_bus_probe(struct device *dev, struct regmap *regmap) | |
| 844 | 870 | { |
| 845 | 871 | struct adav80x *adav80x; |
| 846 | 872 | int ret; |
| 847 | 873 | |
| 874 | + if (IS_ERR(regmap)) | |
| 875 | + return PTR_ERR(regmap); | |
| 876 | + | |
| 848 | 877 | adav80x = kzalloc(sizeof(*adav80x), GFP_KERNEL); |
| 849 | 878 | if (!adav80x) |
| 850 | 879 | return -ENOMEM; |
| 851 | 880 | |
| 881 | + | |
| 852 | 882 | dev_set_drvdata(dev, adav80x); |
| 853 | − adav80x->control_type = control_type; | |
| 883 | + adav80x->regmap = regmap; | |
| 854 | 884 | |
| 855 | 885 | ret = snd_soc_register_codec(dev, &adav80x_codec_driver, |
| 856 | 886 | adav80x_dais, ARRAY_SIZE(adav80x_dais)); |
| @@ -868,6 +898,19 @@ static int adav80x_bus_remove(struct device *dev) · 11 unmodified lines | ||
| 868 | 898 | } |
| 869 | 899 | |
| 870 | 900 | #if defined(CONFIG_SPI_MASTER) |
| 901 | +static const struct regmap_config adav80x_spi_regmap_config = { | |
| 902 | + .val_bits = 8, | |
| 903 | + .pad_bits = 1, | |
| 904 | + .reg_bits = 7, | |
| 905 | + .read_flag_mask = 0x01, | |
| 906 | + | |
| 907 | + .max_register = ADAV80X_PLL_OUTE, | |
| 908 | + | |
| 909 | + .cache_type = REGCACHE_RBTREE, | |
| 910 | + .reg_defaults = adav80x_reg_defaults, | |
| 911 | + .num_reg_defaults = ARRAY_SIZE(adav80x_reg_defaults), | |
| 912 | +}; | |
| 913 | + | |
| 871 | 914 | static const struct spi_device_id adav80x_spi_id[] = { |
| 872 | 915 | { "adav801", 0 }, |
| 873 | 916 | { } |
| @@ -876,7 +919,8 @@ MODULE_DEVICE_TABLE(spi, adav80x_spi_id); · 2 unmodified lines | ||
| 876 | 919 | |
| 877 | 920 | static int adav80x_spi_probe(struct spi_device *spi) |
| 878 | 921 | { |
| 879 | − return adav80x_bus_probe(&spi->dev, SND_SOC_SPI); | |
| 922 | + return adav80x_bus_probe(&spi->dev, | |
| 923 | + devm_regmap_init_spi(spi, &adav80x_spi_regmap_config)); | |
| 880 | 924 | } |
| 881 | 925 | |
| 882 | 926 | static int adav80x_spi_remove(struct spi_device *spi) |
| @@ -896,6 +940,18 @@ static struct spi_driver adav80x_spi_driver = { · 13 unmodified lines | ||
| 896 | 940 | #endif |
| 897 | 941 | |
| 898 | 942 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) |
| 943 | +static const struct regmap_config adav80x_i2c_regmap_config = { | |
| 944 | + .val_bits = 8, | |
| 945 | + .pad_bits = 1, | |
| 946 | + .reg_bits = 7, | |
| 947 | + | |
| 948 | + .max_register = ADAV80X_PLL_OUTE, | |
| 949 | + | |
| 950 | + .cache_type = REGCACHE_RBTREE, | |
| 951 | + .reg_defaults = adav80x_reg_defaults, | |
| 952 | + .num_reg_defaults = ARRAY_SIZE(adav80x_reg_defaults), | |
| 953 | +}; | |
| 954 | + | |
| 899 | 955 | static const struct i2c_device_id adav80x_i2c_id[] = { |
| 900 | 956 | { "adav803", 0 }, |
| 901 | 957 | { } |
| @@ -905,7 +961,8 @@ MODULE_DEVICE_TABLE(i2c, adav80x_i2c_id); · 3 unmodified lines | ||
| 905 | 961 | static int adav80x_i2c_probe(struct i2c_client *client, |
| 906 | 962 | const struct i2c_device_id *id) |
| 907 | 963 | { |
| 908 | − return adav80x_bus_probe(&client->dev, SND_SOC_I2C); | |
| 964 | + return adav80x_bus_probe(&client->dev, | |
| 965 | + devm_regmap_init_i2c(client, &adav80x_i2c_regmap_config)); | |
| 909 | 966 | } |
| 910 | 967 | |
| 911 | 968 | static int adav80x_i2c_remove(struct i2c_client *client) |
| @@ -45,8 +45,6 @@ · 44 unmodified lines | ||
| 45 | 45 | #define AK4104_TX_TXE (1 << 0) |
| 46 | 46 | #define AK4104_TX_V (1 << 1) |
| 47 | 47 | |
| 48 | −#define DRV_NAME "ak4104-codec" | |
| 49 | − | |
| 50 | 48 | struct ak4104_private { |
| 51 | 49 | struct regmap *regmap; |
| 52 | 50 | }; |
| @@ -291,12 +289,19 @@ static const struct of_device_id ak4104_of_match[] = { · 238 unmodified lines | ||
| 291 | 289 | }; |
| 292 | 290 | MODULE_DEVICE_TABLE(of, ak4104_of_match); |
| 293 | 291 | |
| 292 | +static const struct spi_device_id ak4104_id_table[] = { | |
| 293 | + { "ak4104", 0 }, | |
| 294 | + { } | |
| 295 | +}; | |
| 296 | +MODULE_DEVICE_TABLE(spi, ak4104_id_table); | |
| 297 | + | |
| 294 | 298 | static struct spi_driver ak4104_spi_driver = { |
| 295 | 299 | .driver = { |
| 296 | − .name = DRV_NAME, | |
| 300 | + .name = "ak4104", | |
| 297 | 301 | .owner = THIS_MODULE, |
| 298 | 302 | .of_match_table = ak4104_of_match, |
| 299 | 303 | }, |
| 304 | + .id_table = ak4104_id_table, | |
| 300 | 305 | .probe = ak4104_spi_probe, |
| 301 | 306 | .remove = ak4104_spi_remove, |
| 302 | 307 | }; |
| @@ -328,7 +328,7 @@ static int ak4641_i2s_hw_params(struct snd_pcm_substream *substream, · 327 unmodified lines | ||
| 328 | 328 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 329 | 329 | ak4641->playback_fs = rate; |
| 330 | 330 | ak4641_set_deemph(codec); |
| 331 | − }; | |
| 331 | + } | |
| 332 | 332 | |
| 333 | 333 | return 0; |
| 334 | 334 | } |
| @@ -257,7 +257,7 @@ static int ak4642_dai_startup(struct snd_pcm_substream *substream, · 256 unmodified lines | ||
| 257 | 257 | * This operation came from example code of |
| 258 | 258 | * "ASAHI KASEI AK4642" (japanese) manual p94. |
| 259 | 259 | */ |
| 260 | − snd_soc_write(codec, SG_SL1, PMMP | MGAIN0); | |
| 260 | + snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0); | |
| 261 | 261 | snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3)); |
| 262 | 262 | snd_soc_write(codec, ALC_CTL1, ALC | LMTH0); |
| 263 | 263 | snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL); |
| @@ -352,7 +352,6 @@ static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 88 unmodified lines | ||
| 352 | 352 | */ |
| 353 | 353 | default: |
| 354 | 354 | return -EINVAL; |
| 355 | − break; | |
| 356 | 355 | } |
| 357 | 356 | snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data); |
| 358 | 357 | |
| @@ -405,7 +404,6 @@ static int ak4642_dai_hw_params(struct snd_pcm_substream *substream, · 46 unmodified lines | ||
| 405 | 404 | break; |
| 406 | 405 | default: |
| 407 | 406 | return -EINVAL; |
| 408 | − break; | |
| 409 | 407 | } |
| 410 | 408 | snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate); |
| 411 | 409 | |
| @@ -1477,21 +1477,25 @@ static void arizona_enable_fll(struct arizona_fll *fll, · 1476 unmodified lines | ||
| 1477 | 1477 | { |
| 1478 | 1478 | struct arizona *arizona = fll->arizona; |
| 1479 | 1479 | int ret; |
| 1480 | + bool use_sync = false; | |
| 1480 | 1481 | |
| 1481 | 1482 | /* |
| 1482 | 1483 | * If we have both REFCLK and SYNCCLK then enable both, |
| 1483 | 1484 | * otherwise apply the SYNCCLK settings to REFCLK. |
| 1484 | 1485 | */ |
| 1485 | − if (fll->ref_src >= 0 && fll->ref_src != fll->sync_src) { | |
| 1486 | + if (fll->ref_src >= 0 && fll->ref_freq && | |
| 1487 | + fll->ref_src != fll->sync_src) { | |
| 1486 | 1488 | regmap_update_bits(arizona->regmap, fll->base + 5, |
| 1487 | 1489 | ARIZONA_FLL1_OUTDIV_MASK, |
| 1488 | 1490 | ref->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT); |
| 1489 | 1491 | |
| 1490 | 1492 | arizona_apply_fll(arizona, fll->base, ref, fll->ref_src, |
| 1491 | 1493 | false); |
| 1492 | − if (fll->sync_src >= 0) | |
| 1494 | + if (fll->sync_src >= 0) { | |
| 1493 | 1495 | arizona_apply_fll(arizona, fll->base + 0x10, sync, |
| 1494 | 1496 | fll->sync_src, true); |
| 1497 | + use_sync = true; | |
| 1498 | + } | |
| 1495 | 1499 | } else if (fll->sync_src >= 0) { |
| 1496 | 1500 | regmap_update_bits(arizona->regmap, fll->base + 5, |
| 1497 | 1501 | ARIZONA_FLL1_OUTDIV_MASK, |
| @@ -1511,7 +1515,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, · 13 unmodified lines | ||
| 1511 | 1515 | * Increase the bandwidth if we're not using a low frequency |
| 1512 | 1516 | * sync source. |
| 1513 | 1517 | */ |
| 1514 | − if (fll->sync_src >= 0 && fll->sync_freq > 100000) | |
| 1518 | + if (use_sync && fll->sync_freq > 100000) | |
| 1515 | 1519 | regmap_update_bits(arizona->regmap, fll->base + 0x17, |
| 1516 | 1520 | ARIZONA_FLL1_SYNC_BW, 0); |
| 1517 | 1521 | else |
| @@ -1526,8 +1530,7 @@ static void arizona_enable_fll(struct arizona_fll *fll, · 8 unmodified lines | ||
| 1526 | 1530 | |
| 1527 | 1531 | regmap_update_bits(arizona->regmap, fll->base + 1, |
| 1528 | 1532 | ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA); |
| 1529 | − if (fll->ref_src >= 0 && fll->sync_src >= 0 && | |
| 1530 | − fll->ref_src != fll->sync_src) | |
| 1533 | + if (use_sync) | |
| 1531 | 1534 | regmap_update_bits(arizona->regmap, fll->base + 0x11, |
| 1532 | 1535 | ARIZONA_FLL1_SYNC_ENA, |
| 1533 | 1536 | ARIZONA_FLL1_SYNC_ENA); |
| @@ -1561,10 +1564,12 @@ int arizona_set_fll_refclk(struct arizona_fll *fll, int source, · 27 unmodified lines | ||
| 1561 | 1564 | if (fll->ref_src == source && fll->ref_freq == Fref) |
| 1562 | 1565 | return 0; |
| 1563 | 1566 | |
| 1564 | − if (fll->fout && Fref > 0) { | |
| 1565 | − ret = arizona_calc_fll(fll, &ref, Fref, fll->fout); | |
| 1566 | − if (ret != 0) | |
| 1567 | − return ret; | |
| 1567 | + if (fll->fout) { | |
| 1568 | + if (Fref > 0) { | |
| 1569 | + ret = arizona_calc_fll(fll, &ref, Fref, fll->fout); | |
| 1570 | + if (ret != 0) | |
| 1571 | + return ret; | |
| 1572 | + } | |
| 1568 | 1573 | |
| 1569 | 1574 | if (fll->sync_src >= 0) { |
| 1570 | 1575 | ret = arizona_calc_fll(fll, &sync, fll->sync_freq, |
| @@ -38,24 +38,6 @@ · 37 unmodified lines | ||
| 38 | 38 | #include <sound/soc.h> |
| 39 | 39 | #include <sound/initval.h> |
| 40 | 40 | |
| 41 | −static inline unsigned int cq93vc_read(struct snd_soc_codec *codec, | |
| 42 | − unsigned int reg) | |
| 43 | −{ | |
| 44 | − struct davinci_vc *davinci_vc = codec->control_data; | |
| 45 | − | |
| 46 | − return readl(davinci_vc->base + reg); | |
| 47 | −} | |
| 48 | − | |
| 49 | −static inline int cq93vc_write(struct snd_soc_codec *codec, unsigned int reg, | |
| 50 | − unsigned int value) | |
| 51 | −{ | |
| 52 | − struct davinci_vc *davinci_vc = codec->control_data; | |
| 53 | − | |
| 54 | − writel(value, davinci_vc->base + reg); | |
| 55 | − | |
| 56 | − return 0; | |
| 57 | −} | |
| 58 | − | |
| 59 | 41 | static const struct snd_kcontrol_new cq93vc_snd_controls[] = { |
| 60 | 42 | SOC_SINGLE("PGA Capture Volume", DAVINCI_VC_REG05, 0, 0x03, 0), |
| 61 | 43 | SOC_SINGLE("Mono DAC Playback Volume", DAVINCI_VC_REG09, 0, 0x3f, 0), |
| @@ -64,13 +46,15 @@ static const struct snd_kcontrol_new cq93vc_snd_controls[] = { · 2 unmodified lines | ||
| 64 | 46 | static int cq93vc_mute(struct snd_soc_dai *dai, int mute) |
| 65 | 47 | { |
| 66 | 48 | struct snd_soc_codec *codec = dai->codec; |
| 67 | − u8 reg = cq93vc_read(codec, DAVINCI_VC_REG09) & ~DAVINCI_VC_REG09_MUTE; | |
| 49 | + u8 reg; | |
| 68 | 50 | |
| 69 | 51 | if (mute) |
| 70 | − cq93vc_write(codec, DAVINCI_VC_REG09, | |
| 71 | − reg | DAVINCI_VC_REG09_MUTE); | |
| 52 | + reg = DAVINCI_VC_REG09_MUTE; | |
| 72 | 53 | else |
| 73 | − cq93vc_write(codec, DAVINCI_VC_REG09, reg); | |
| 54 | + reg = 0; | |
| 55 | + | |
| 56 | + snd_soc_update_bits(codec, DAVINCI_VC_REG09, DAVINCI_VC_REG09_MUTE, | |
| 57 | + reg); | |
| 74 | 58 | |
| 75 | 59 | return 0; |
| 76 | 60 | } |
| @@ -79,7 +63,7 @@ static int cq93vc_set_dai_sysclk(struct snd_soc_dai *codec_dai, · 2 unmodified lines | ||
| 79 | 63 | int clk_id, unsigned int freq, int dir) |
| 80 | 64 | { |
| 81 | 65 | struct snd_soc_codec *codec = codec_dai->codec; |
| 82 | − struct davinci_vc *davinci_vc = codec->control_data; | |
| 66 | + struct davinci_vc *davinci_vc = codec->dev->platform_data; | |
| 83 | 67 | |
| 84 | 68 | switch (freq) { |
| 85 | 69 | case 22579200: |
| @@ -97,18 +81,18 @@ static int cq93vc_set_bias_level(struct snd_soc_codec *codec, · 11 unmodified lines | ||
| 97 | 81 | { |
| 98 | 82 | switch (level) { |
| 99 | 83 | case SND_SOC_BIAS_ON: |
| 100 | − cq93vc_write(codec, DAVINCI_VC_REG12, | |
| 84 | + snd_soc_write(codec, DAVINCI_VC_REG12, | |
| 101 | 85 | DAVINCI_VC_REG12_POWER_ALL_ON); |
| 102 | 86 | break; |
| 103 | 87 | case SND_SOC_BIAS_PREPARE: |
| 104 | 88 | break; |
| 105 | 89 | case SND_SOC_BIAS_STANDBY: |
| 106 | − cq93vc_write(codec, DAVINCI_VC_REG12, | |
| 90 | + snd_soc_write(codec, DAVINCI_VC_REG12, | |
| 107 | 91 | DAVINCI_VC_REG12_POWER_ALL_OFF); |
| 108 | 92 | break; |
| 109 | 93 | case SND_SOC_BIAS_OFF: |
| 110 | 94 | /* force all power off */ |
| 111 | − cq93vc_write(codec, DAVINCI_VC_REG12, | |
| 95 | + snd_soc_write(codec, DAVINCI_VC_REG12, | |
| 112 | 96 | DAVINCI_VC_REG12_POWER_ALL_OFF); |
| 113 | 97 | break; |
| 114 | 98 | } |
| @@ -154,11 +138,9 @@ static int cq93vc_probe(struct snd_soc_codec *codec) · 39 unmodified lines | ||
| 154 | 138 | struct davinci_vc *davinci_vc = codec->dev->platform_data; |
| 155 | 139 | |
| 156 | 140 | davinci_vc->cq93vc.codec = codec; |
| 157 | − codec->control_data = davinci_vc; | |
| 141 | + codec->control_data = davinci_vc->regmap; | |
| 158 | 142 | |
| 159 | − /* Set controls */ | |
| 160 | − snd_soc_add_codec_controls(codec, cq93vc_snd_controls, | |
| 161 | − ARRAY_SIZE(cq93vc_snd_controls)); | |
| 143 | + snd_soc_codec_set_cache_io(codec, 32, 32, SND_SOC_REGMAP); | |
| 162 | 144 | |
| 163 | 145 | /* Off, with power on */ |
| 164 | 146 | cq93vc_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| @@ -174,12 +156,12 @@ static int cq93vc_remove(struct snd_soc_codec *codec) · 9 unmodified lines | ||
| 174 | 156 | } |
| 175 | 157 | |
| 176 | 158 | static struct snd_soc_codec_driver soc_codec_dev_cq93vc = { |
| 177 | − .read = cq93vc_read, | |
| 178 | − .write = cq93vc_write, | |
| 179 | 159 | .set_bias_level = cq93vc_set_bias_level, |
| 180 | 160 | .probe = cq93vc_probe, |
| 181 | 161 | .remove = cq93vc_remove, |
| 182 | 162 | .resume = cq93vc_resume, |
| 163 | + .controls = cq93vc_snd_controls, | |
| 164 | + .num_controls = ARRAY_SIZE(cq93vc_snd_controls), | |
| 183 | 165 | }; |
| 184 | 166 | |
| 185 | 167 | static int cq93vc_platform_probe(struct platform_device *pdev) |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <linux/gpio.h> |
| 26 | 26 | #include <linux/i2c.h> |
| 27 | 27 | #include <linux/spi/spi.h> |
| 28 | +#include <linux/of.h> | |
| 28 | 29 | #include <linux/of_device.h> |
| 29 | 30 | #include <linux/of_gpio.h> |
| 30 | 31 | #include <sound/pcm.h> |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <linux/kernel.h> |
| 18 | 18 | #include <linux/init.h> |
| 19 | 19 | #include <linux/delay.h> |
| 20 | +#include <linux/gpio.h> | |
| 20 | 21 | #include <linux/pm.h> |
| 21 | 22 | #include <linux/i2c.h> |
| 22 | 23 | #include <linux/input.h> |
| @@ -1116,40 +1117,6 @@ static int cs42l52_probe(struct snd_soc_codec *codec) · 1093 unmodified lines | ||
| 1116 | 1117 | cs42l52->sysclk = CS42L52_DEFAULT_CLK; |
| 1117 | 1118 | cs42l52->config.format = CS42L52_DEFAULT_FORMAT; |
| 1118 | 1119 | |
| 1119 | − /* Set Platform MICx CFG */ | |
| 1120 | − snd_soc_update_bits(codec, CS42L52_MICA_CTL, | |
| 1121 | − CS42L52_MIC_CTL_TYPE_MASK, | |
| 1122 | − cs42l52->pdata.mica_cfg << | |
| 1123 | − CS42L52_MIC_CTL_TYPE_SHIFT); | |
| 1124 | − | |
| 1125 | − snd_soc_update_bits(codec, CS42L52_MICB_CTL, | |
| 1126 | − CS42L52_MIC_CTL_TYPE_MASK, | |
| 1127 | − cs42l52->pdata.micb_cfg << | |
| 1128 | − CS42L52_MIC_CTL_TYPE_SHIFT); | |
| 1129 | − | |
| 1130 | − /* if Single Ended, Get Mic_Select */ | |
| 1131 | − if (cs42l52->pdata.mica_cfg) | |
| 1132 | − snd_soc_update_bits(codec, CS42L52_MICA_CTL, | |
| 1133 | − CS42L52_MIC_CTL_MIC_SEL_MASK, | |
| 1134 | − cs42l52->pdata.mica_sel << | |
| 1135 | − CS42L52_MIC_CTL_MIC_SEL_SHIFT); | |
| 1136 | − if (cs42l52->pdata.micb_cfg) | |
| 1137 | − snd_soc_update_bits(codec, CS42L52_MICB_CTL, | |
| 1138 | − CS42L52_MIC_CTL_MIC_SEL_MASK, | |
| 1139 | − cs42l52->pdata.micb_sel << | |
| 1140 | − CS42L52_MIC_CTL_MIC_SEL_SHIFT); | |
| 1141 | − | |
| 1142 | − /* Set Platform Charge Pump Freq */ | |
| 1143 | − snd_soc_update_bits(codec, CS42L52_CHARGE_PUMP, | |
| 1144 | − CS42L52_CHARGE_PUMP_MASK, | |
| 1145 | − cs42l52->pdata.chgfreq << | |
| 1146 | − CS42L52_CHARGE_PUMP_SHIFT); | |
| 1147 | − | |
| 1148 | − /* Set Platform Bias Level */ | |
| 1149 | − snd_soc_update_bits(codec, CS42L52_IFACE_CTL2, | |
| 1150 | − CS42L52_IFACE_CTL2_BIAS_LVL, | |
| 1151 | − cs42l52->pdata.micbias_lvl); | |
| 1152 | − | |
| 1153 | 1120 | return ret; |
| 1154 | 1121 | } |
| 1155 | 1122 | |
| @@ -1205,6 +1172,7 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, · 49 unmodified lines | ||
| 1205 | 1172 | const struct i2c_device_id *id) |
| 1206 | 1173 | { |
| 1207 | 1174 | struct cs42l52_private *cs42l52; |
| 1175 | + struct cs42l52_platform_data *pdata = dev_get_platdata(&i2c_client->dev); | |
| 1208 | 1176 | int ret; |
| 1209 | 1177 | unsigned int devid = 0; |
| 1210 | 1178 | unsigned int reg; |
| @@ -1222,11 +1190,22 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, · 11 unmodified lines | ||
| 1222 | 1190 | return ret; |
| 1223 | 1191 | } |
| 1224 | 1192 | |
| 1225 | − i2c_set_clientdata(i2c_client, cs42l52); | |
| 1193 | + if (pdata) | |
| 1194 | + cs42l52->pdata = *pdata; | |
| 1195 | + | |
| 1196 | + if (cs42l52->pdata.reset_gpio) { | |
| 1197 | + ret = gpio_request_one(cs42l52->pdata.reset_gpio, | |
| 1198 | + GPIOF_OUT_INIT_HIGH, "CS42L52 /RST"); | |
| 1199 | + if (ret < 0) { | |
| 1200 | + dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", | |
| 1201 | + cs42l52->pdata.reset_gpio, ret); | |
| 1202 | + return ret; | |
| 1203 | + } | |
| 1204 | + gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 0); | |
| 1205 | + gpio_set_value_cansleep(cs42l52->pdata.reset_gpio, 1); | |
| 1206 | + } | |
| 1226 | 1207 | |
| 1227 | − if (dev_get_platdata(&i2c_client->dev)) | |
| 1228 | − memcpy(&cs42l52->pdata, dev_get_platdata(&i2c_client->dev), | |
| 1229 | − sizeof(cs42l52->pdata)); | |
| 1208 | + i2c_set_clientdata(i2c_client, cs42l52); | |
| 1230 | 1209 | |
| 1231 | 1210 | ret = regmap_register_patch(cs42l52->regmap, cs42l52_threshold_patch, |
| 1232 | 1211 | ARRAY_SIZE(cs42l52_threshold_patch)); |
| @@ -1244,7 +1223,43 @@ static int cs42l52_i2c_probe(struct i2c_client *i2c_client, · 11 unmodified lines | ||
| 1244 | 1223 | return ret; |
| 1245 | 1224 | } |
| 1246 | 1225 | |
| 1247 | − regcache_cache_only(cs42l52->regmap, true); | |
| 1226 | + dev_info(&i2c_client->dev, "Cirrus Logic CS42L52, Revision: %02X\n", | |
| 1227 | + reg & 0xFF); | |
| 1228 | + | |
| 1229 | + /* Set Platform Data */ | |
| 1230 | + if (cs42l52->pdata.mica_cfg) | |
| 1231 | + regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, | |
| 1232 | + CS42L52_MIC_CTL_TYPE_MASK, | |
| 1233 | + cs42l52->pdata.mica_cfg << | |
| 1234 | + CS42L52_MIC_CTL_TYPE_SHIFT); | |
| 1235 | + | |
| 1236 | + if (cs42l52->pdata.micb_cfg) | |
| 1237 | + regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, | |
| 1238 | + CS42L52_MIC_CTL_TYPE_MASK, | |
| 1239 | + cs42l52->pdata.micb_cfg << | |
| 1240 | + CS42L52_MIC_CTL_TYPE_SHIFT); | |
| 1241 | + | |
| 1242 | + if (cs42l52->pdata.mica_sel) | |
| 1243 | + regmap_update_bits(cs42l52->regmap, CS42L52_MICA_CTL, | |
| 1244 | + CS42L52_MIC_CTL_MIC_SEL_MASK, | |
| 1245 | + cs42l52->pdata.mica_sel << | |
| 1246 | + CS42L52_MIC_CTL_MIC_SEL_SHIFT); | |
| 1247 | + if (cs42l52->pdata.micb_sel) | |
| 1248 | + regmap_update_bits(cs42l52->regmap, CS42L52_MICB_CTL, | |
| 1249 | + CS42L52_MIC_CTL_MIC_SEL_MASK, | |
| 1250 | + cs42l52->pdata.micb_sel << | |
| 1251 | + CS42L52_MIC_CTL_MIC_SEL_SHIFT); | |
| 1252 | + | |
| 1253 | + if (cs42l52->pdata.chgfreq) | |
| 1254 | + regmap_update_bits(cs42l52->regmap, CS42L52_CHARGE_PUMP, | |
| 1255 | + CS42L52_CHARGE_PUMP_MASK, | |
| 1256 | + cs42l52->pdata.chgfreq << | |
| 1257 | + CS42L52_CHARGE_PUMP_SHIFT); | |
| 1258 | + | |
| 1259 | + if (cs42l52->pdata.micbias_lvl) | |
| 1260 | + regmap_update_bits(cs42l52->regmap, CS42L52_IFACE_CTL2, | |
| 1261 | + CS42L52_IFACE_CTL2_BIAS_LVL, | |
| 1262 | + cs42l52->pdata.micbias_lvl); | |
| 1248 | 1263 | |
| 1249 | 1264 | ret = snd_soc_register_codec(&i2c_client->dev, |
| 1250 | 1265 | &soc_codec_dev_cs42l52, &cs42l52_dai, 1); |
| @@ -269,6 +269,6 @@ · 268 unmodified lines | ||
| 269 | 269 | #define CS42L52_FIX_BITS1 0x3E |
| 270 | 270 | #define CS42L52_FIX_BITS2 0x47 |
| 271 | 271 | |
| 272 | −#define CS42L52_MAX_REGISTER 0x34 | |
| 272 | +#define CS42L52_MAX_REGISTER 0x47 | |
| 273 | 273 | |
| 274 | 274 | #endif |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <linux/kernel.h> |
| 18 | 18 | #include <linux/init.h> |
| 19 | 19 | #include <linux/delay.h> |
| 20 | +#include <linux/of_gpio.h> | |
| 20 | 21 | #include <linux/pm.h> |
| 21 | 22 | #include <linux/i2c.h> |
| 22 | 23 | #include <linux/regmap.h> |
| @@ -28,6 +29,7 @@ · 5 unmodified lines | ||
| 28 | 29 | #include <sound/soc-dapm.h> |
| 29 | 30 | #include <sound/initval.h> |
| 30 | 31 | #include <sound/tlv.h> |
| 32 | +#include <sound/cs42l73.h> | |
| 31 | 33 | #include "cs42l73.h" |
| 32 | 34 | |
| 33 | 35 | struct sp_config { |
| @@ -35,6 +37,7 @@ struct sp_config { · 1 unmodified line | ||
| 35 | 37 | u32 srate; |
| 36 | 38 | }; |
| 37 | 39 | struct cs42l73_private { |
| 40 | + struct cs42l73_platform_data pdata; | |
| 38 | 41 | struct sp_config config[3]; |
| 39 | 42 | struct regmap *regmap; |
| 40 | 43 | u32 sysclk; |
| @@ -310,15 +313,6 @@ static const struct soc_enum ng_delay_enum = · 269 unmodified lines | ||
| 310 | 313 | SOC_ENUM_SINGLE(CS42L73_NGCAB, 0, |
| 311 | 314 | ARRAY_SIZE(cs42l73_ng_delay_text), cs42l73_ng_delay_text); |
| 312 | 315 | |
| 313 | −static const char * const charge_pump_freq_text[] = { | |
| 314 | − "0", "1", "2", "3", "4", | |
| 315 | − "5", "6", "7", "8", "9", | |
| 316 | − "10", "11", "12", "13", "14", "15" }; | |
| 317 | − | |
| 318 | −static const struct soc_enum charge_pump_enum = | |
| 319 | − SOC_ENUM_SINGLE(CS42L73_CPFCHC, 4, | |
| 320 | − ARRAY_SIZE(charge_pump_freq_text), charge_pump_freq_text); | |
| 321 | − | |
| 322 | 316 | static const char * const cs42l73_mono_mix_texts[] = { |
| 323 | 317 | "Left", "Right", "Mono Mix"}; |
| 324 | 318 | |
| @@ -511,8 +505,6 @@ static const struct snd_kcontrol_new cs42l73_snd_controls[] = { · 186 unmodified lines | ||
| 511 | 505 | SOC_SINGLE("NG Threshold", CS42L73_NGCAB, 2, 7, 0), |
| 512 | 506 | SOC_ENUM("NG Delay", ng_delay_enum), |
| 513 | 507 | |
| 514 | − SOC_ENUM("Charge Pump Frequency", charge_pump_enum), | |
| 515 | − | |
| 516 | 508 | SOC_DOUBLE_R_TLV("XSP-IP Volume", |
| 517 | 509 | CS42L73_XSPAIPAA, CS42L73_XSPBIPBA, 0, 0x3F, 1, |
| 518 | 510 | attn_tlv), |
| @@ -1055,11 +1047,11 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) · 536 unmodified lines | ||
| 1055 | 1047 | |
| 1056 | 1048 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 1057 | 1049 | case SND_SOC_DAIFMT_CBM_CFM: |
| 1058 | − mmcc |= MS_MASTER; | |
| 1050 | + mmcc |= CS42L73_MS_MASTER; | |
| 1059 | 1051 | break; |
| 1060 | 1052 | |
| 1061 | 1053 | case SND_SOC_DAIFMT_CBS_CFS: |
| 1062 | − mmcc &= ~MS_MASTER; | |
| 1054 | + mmcc &= ~CS42L73_MS_MASTER; | |
| 1063 | 1055 | break; |
| 1064 | 1056 | |
| 1065 | 1057 | default: |
| @@ -1071,11 +1063,11 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) · 5 unmodified lines | ||
| 1071 | 1063 | |
| 1072 | 1064 | switch (format) { |
| 1073 | 1065 | case SND_SOC_DAIFMT_I2S: |
| 1074 | − spc &= ~SPDIF_PCM; | |
| 1066 | + spc &= ~CS42L73_SPDIF_PCM; | |
| 1075 | 1067 | break; |
| 1076 | 1068 | case SND_SOC_DAIFMT_DSP_A: |
| 1077 | 1069 | case SND_SOC_DAIFMT_DSP_B: |
| 1078 | − if (mmcc & MS_MASTER) { | |
| 1070 | + if (mmcc & CS42L73_MS_MASTER) { | |
| 1079 | 1071 | dev_err(codec->dev, |
| 1080 | 1072 | "PCM format in slave mode only\n"); |
| 1081 | 1073 | return -EINVAL; |
| @@ -1085,25 +1077,25 @@ static int cs42l73_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) · 3 unmodified lines | ||
| 1085 | 1077 | "PCM format is not supported on ASP port\n"); |
| 1086 | 1078 | return -EINVAL; |
| 1087 | 1079 | } |
| 1088 | − spc |= SPDIF_PCM; | |
| 1080 | + spc |= CS42L73_SPDIF_PCM; | |
| 1089 | 1081 | break; |
| 1090 | 1082 | default: |
| 1091 | 1083 | return -EINVAL; |
| 1092 | 1084 | } |
| 1093 | 1085 | |
| 1094 | − if (spc & SPDIF_PCM) { | |
| 1086 | + if (spc & CS42L73_SPDIF_PCM) { | |
| 1095 | 1087 | /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */ |
| 1096 | − spc &= ~(PCM_MODE_MASK | PCM_BIT_ORDER); | |
| 1088 | + spc &= ~(CS42L73_PCM_MODE_MASK | CS42L73_PCM_BIT_ORDER); | |
| 1097 | 1089 | switch (format) { |
| 1098 | 1090 | case SND_SOC_DAIFMT_DSP_B: |
| 1099 | 1091 | if (inv == SND_SOC_DAIFMT_IB_IF) |
| 1100 | − spc |= PCM_MODE0; | |
| 1092 | + spc |= CS42L73_PCM_MODE0; | |
| 1101 | 1093 | if (inv == SND_SOC_DAIFMT_IB_NF) |
| 1102 | − spc |= PCM_MODE1; | |
| 1094 | + spc |= CS42L73_PCM_MODE1; | |
| 1103 | 1095 | break; |
| 1104 | 1096 | case SND_SOC_DAIFMT_DSP_A: |
| 1105 | 1097 | if (inv == SND_SOC_DAIFMT_IB_IF) |
| 1106 | − spc |= PCM_MODE1; | |
| 1098 | + spc |= CS42L73_PCM_MODE1; | |
| 1107 | 1099 | break; |
| 1108 | 1100 | default: |
| 1109 | 1101 | return -EINVAL; |
| @@ -1163,7 +1155,7 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream, · 53 unmodified lines | ||
| 1163 | 1155 | int mclk_coeff; |
| 1164 | 1156 | int srate = params_rate(params); |
| 1165 | 1157 | |
| 1166 | − if (priv->config[id].mmcc & MS_MASTER) { | |
| 1158 | + if (priv->config[id].mmcc & CS42L73_MS_MASTER) { | |
| 1167 | 1159 | /* CS42L73 Master */ |
| 1168 | 1160 | /* MCLK -> srate */ |
| 1169 | 1161 | mclk_coeff = |
| @@ -1182,13 +1174,13 @@ static int cs42l73_pcm_hw_params(struct snd_pcm_substream *substream, · 12 unmodified lines | ||
| 1182 | 1174 | priv->config[id].spc &= 0xFC; |
| 1183 | 1175 | /* Use SCLK=64*Fs if internal MCLK >= 6.4MHz */ |
| 1184 | 1176 | if (priv->mclk >= 6400000) |
| 1185 | − priv->config[id].spc |= MCK_SCLK_64FS; | |
| 1177 | + priv->config[id].spc |= CS42L73_MCK_SCLK_64FS; | |
| 1186 | 1178 | else |
| 1187 | − priv->config[id].spc |= MCK_SCLK_MCLK; | |
| 1179 | + priv->config[id].spc |= CS42L73_MCK_SCLK_MCLK; | |
| 1188 | 1180 | } else { |
| 1189 | 1181 | /* CS42L73 Slave */ |
| 1190 | 1182 | priv->config[id].spc &= 0xFC; |
| 1191 | − priv->config[id].spc |= MCK_SCLK_64FS; | |
| 1183 | + priv->config[id].spc |= CS42L73_MCK_SCLK_64FS; | |
| 1192 | 1184 | } |
| 1193 | 1185 | /* Update ASRCs */ |
| 1194 | 1186 | priv->config[id].srate = srate; |
| @@ -1208,8 +1200,8 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec, · 13 unmodified lines | ||
| 1208 | 1200 | |
| 1209 | 1201 | switch (level) { |
| 1210 | 1202 | case SND_SOC_BIAS_ON: |
| 1211 | − snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 0); | |
| 1212 | − snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 0); | |
| 1203 | + snd_soc_update_bits(codec, CS42L73_DMMCC, CS42L73_MCLKDIS, 0); | |
| 1204 | + snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 0); | |
| 1213 | 1205 | break; |
| 1214 | 1206 | |
| 1215 | 1207 | case SND_SOC_BIAS_PREPARE: |
| @@ -1220,11 +1212,11 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec, · 4 unmodified lines | ||
| 1220 | 1212 | regcache_cache_only(cs42l73->regmap, false); |
| 1221 | 1213 | regcache_sync(cs42l73->regmap); |
| 1222 | 1214 | } |
| 1223 | − snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); | |
| 1215 | + snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 1); | |
| 1224 | 1216 | break; |
| 1225 | 1217 | |
| 1226 | 1218 | case SND_SOC_BIAS_OFF: |
| 1227 | − snd_soc_update_bits(codec, CS42L73_PWRCTL1, PDN, 1); | |
| 1219 | + snd_soc_update_bits(codec, CS42L73_PWRCTL1, CS42L73_PDN, 1); | |
| 1228 | 1220 | if (cs42l73->shutdwn_delay > 0) { |
| 1229 | 1221 | mdelay(cs42l73->shutdwn_delay); |
| 1230 | 1222 | cs42l73->shutdwn_delay = 0; |
| @@ -1233,7 +1225,7 @@ static int cs42l73_set_bias_level(struct snd_soc_codec *codec, · 2 unmodified lines | ||
| 1233 | 1225 | * down. |
| 1234 | 1226 | */ |
| 1235 | 1227 | } |
| 1236 | − snd_soc_update_bits(codec, CS42L73_DMMCC, MCLKDIS, 1); | |
| 1228 | + snd_soc_update_bits(codec, CS42L73_DMMCC, CS42L73_MCLKDIS, 1); | |
| 1237 | 1229 | break; |
| 1238 | 1230 | } |
| 1239 | 1231 | codec->dapm.bias_level = level; |
| @@ -1367,11 +1359,16 @@ static int cs42l73_probe(struct snd_soc_codec *codec) · 127 unmodified lines | ||
| 1367 | 1359 | return ret; |
| 1368 | 1360 | } |
| 1369 | 1361 | |
| 1370 | − regcache_cache_only(cs42l73->regmap, true); | |
| 1371 | − | |
| 1372 | 1362 | cs42l73_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 1373 | 1363 | |
| 1374 | − cs42l73->mclksel = CS42L73_CLKID_MCLK1; /* MCLK1 as master clk */ | |
| 1364 | + /* Set Charge Pump Frequency */ | |
| 1365 | + if (cs42l73->pdata.chgfreq) | |
| 1366 | + snd_soc_update_bits(codec, CS42L73_CPFCHC, | |
| 1367 | + CS42L73_CHARGEPUMP_MASK, | |
| 1368 | + cs42l73->pdata.chgfreq << 4); | |
| 1369 | + | |
| 1370 | + /* MCLK1 as master clk */ | |
| 1371 | + cs42l73->mclksel = CS42L73_CLKID_MCLK1; | |
| 1375 | 1372 | cs42l73->mclk = 0; |
| 1376 | 1373 | |
| 1377 | 1374 | return ret; |
| @@ -1415,9 +1412,11 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, · 37 unmodified lines | ||
| 1415 | 1412 | const struct i2c_device_id *id) |
| 1416 | 1413 | { |
| 1417 | 1414 | struct cs42l73_private *cs42l73; |
| 1415 | + struct cs42l73_platform_data *pdata = dev_get_platdata(&i2c_client->dev); | |
| 1418 | 1416 | int ret; |
| 1419 | 1417 | unsigned int devid = 0; |
| 1420 | 1418 | unsigned int reg; |
| 1419 | + u32 val32; | |
| 1421 | 1420 | |
| 1422 | 1421 | cs42l73 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs42l73_private), |
| 1423 | 1422 | GFP_KERNEL); |
| @@ -1426,14 +1425,49 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, · 2 unmodified lines | ||
| 1426 | 1425 | return -ENOMEM; |
| 1427 | 1426 | } |
| 1428 | 1427 | |
| 1429 | − i2c_set_clientdata(i2c_client, cs42l73); | |
| 1430 | − | |
| 1431 | 1428 | cs42l73->regmap = devm_regmap_init_i2c(i2c_client, &cs42l73_regmap); |
| 1432 | 1429 | if (IS_ERR(cs42l73->regmap)) { |
| 1433 | 1430 | ret = PTR_ERR(cs42l73->regmap); |
| 1434 | 1431 | dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); |
| 1435 | 1432 | return ret; |
| 1436 | 1433 | } |
| 1434 | + | |
| 1435 | + if (pdata) { | |
| 1436 | + cs42l73->pdata = *pdata; | |
| 1437 | + } else { | |
| 1438 | + pdata = devm_kzalloc(&i2c_client->dev, | |
| 1439 | + sizeof(struct cs42l73_platform_data), | |
| 1440 | + GFP_KERNEL); | |
| 1441 | + if (!pdata) { | |
| 1442 | + dev_err(&i2c_client->dev, "could not allocate pdata\n"); | |
| 1443 | + return -ENOMEM; | |
| 1444 | + } | |
| 1445 | + if (i2c_client->dev.of_node) { | |
| 1446 | + if (of_property_read_u32(i2c_client->dev.of_node, | |
| 1447 | + "chgfreq", &val32) >= 0) | |
| 1448 | + pdata->chgfreq = val32; | |
| 1449 | + } | |
| 1450 | + pdata->reset_gpio = of_get_named_gpio(i2c_client->dev.of_node, | |
| 1451 | + "reset-gpio", 0); | |
| 1452 | + cs42l73->pdata = *pdata; | |
| 1453 | + } | |
| 1454 | + | |
| 1455 | + i2c_set_clientdata(i2c_client, cs42l73); | |
| 1456 | + | |
| 1457 | + if (cs42l73->pdata.reset_gpio) { | |
| 1458 | + ret = gpio_request_one(cs42l73->pdata.reset_gpio, | |
| 1459 | + GPIOF_OUT_INIT_HIGH, "CS42L73 /RST"); | |
| 1460 | + if (ret < 0) { | |
| 1461 | + dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", | |
| 1462 | + cs42l73->pdata.reset_gpio, ret); | |
| 1463 | + return ret; | |
| 1464 | + } | |
| 1465 | + gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 0); | |
| 1466 | + gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 1); | |
| 1467 | + } | |
| 1468 | + | |
| 1469 | + regcache_cache_bypass(cs42l73->regmap, true); | |
| 1470 | + | |
| 1437 | 1471 | /* initialize codec */ |
| 1438 | 1472 | ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_AB, ®); |
| 1439 | 1473 | devid = (reg & 0xFF) << 12; |
| @@ -1444,7 +1478,6 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, · 4 unmodified lines | ||
| 1444 | 1478 | ret = regmap_read(cs42l73->regmap, CS42L73_DEVID_E, ®); |
| 1445 | 1479 | devid |= (reg & 0xF0) >> 4; |
| 1446 | 1480 | |
| 1447 | − | |
| 1448 | 1481 | if (devid != CS42L73_DEVID) { |
| 1449 | 1482 | ret = -ENODEV; |
| 1450 | 1483 | dev_err(&i2c_client->dev, |
| @@ -1462,7 +1495,7 @@ static int cs42l73_i2c_probe(struct i2c_client *i2c_client, · 11 unmodified lines | ||
| 1462 | 1495 | dev_info(&i2c_client->dev, |
| 1463 | 1496 | "Cirrus Logic CS42L73, Revision: %02X\n", reg & 0xFF); |
| 1464 | 1497 | |
| 1465 | − regcache_cache_only(cs42l73->regmap, true); | |
| 1498 | + regcache_cache_bypass(cs42l73->regmap, false); | |
| 1466 | 1499 | |
| 1467 | 1500 | ret = snd_soc_register_codec(&i2c_client->dev, |
| 1468 | 1501 | &soc_codec_dev_cs42l73, cs42l73_dai, |
| @@ -1478,6 +1511,12 @@ static int cs42l73_i2c_remove(struct i2c_client *client) · 9 unmodified lines | ||
| 1478 | 1511 | return 0; |
| 1479 | 1512 | } |
| 1480 | 1513 | |
| 1514 | +static const struct of_device_id cs42l73_of_match[] = { | |
| 1515 | + { .compatible = "cirrus,cs42l73", }, | |
| 1516 | + {}, | |
| 1517 | +}; | |
| 1518 | +MODULE_DEVICE_TABLE(of, cs42l73_of_match); | |
| 1519 | + | |
| 1481 | 1520 | static const struct i2c_device_id cs42l73_id[] = { |
| 1482 | 1521 | {"cs42l73", 0}, |
| 1483 | 1522 | {} |
| @@ -1489,6 +1528,7 @@ static struct i2c_driver cs42l73_i2c_driver = { · 5 unmodified lines | ||
| 1489 | 1528 | .driver = { |
| 1490 | 1529 | .name = "cs42l73", |
| 1491 | 1530 | .owner = THIS_MODULE, |
| 1531 | + .of_match_table = cs42l73_of_match, | |
| 1492 | 1532 | }, |
| 1493 | 1533 | .id_table = cs42l73_id, |
| 1494 | 1534 | .probe = cs42l73_i2c_probe, |
| @@ -128,59 +128,60 @@ · 127 unmodified lines | ||
| 128 | 128 | /* Bitfield Definitions */ |
| 129 | 129 | |
| 130 | 130 | /* CS42L73_PWRCTL1 */ |
| 131 | −#define PDN_ADCB (1 << 7) | |
| 132 | −#define PDN_DMICB (1 << 6) | |
| 133 | −#define PDN_ADCA (1 << 5) | |
| 134 | −#define PDN_DMICA (1 << 4) | |
| 135 | −#define PDN_LDO (1 << 2) | |
| 136 | −#define DISCHG_FILT (1 << 1) | |
| 137 | −#define PDN (1 << 0) | |
| 131 | +#define CS42L73_PDN_ADCB (1 << 7) | |
| 132 | +#define CS42L73_PDN_DMICB (1 << 6) | |
| 133 | +#define CS42L73_PDN_ADCA (1 << 5) | |
| 134 | +#define CS42L73_PDN_DMICA (1 << 4) | |
| 135 | +#define CS42L73_PDN_LDO (1 << 2) | |
| 136 | +#define CS42L73_DISCHG_FILT (1 << 1) | |
| 137 | +#define CS42L73_PDN (1 << 0) | |
| 138 | 138 | |
| 139 | 139 | /* CS42L73_PWRCTL2 */ |
| 140 | −#define PDN_MIC2_BIAS (1 << 7) | |
| 141 | −#define PDN_MIC1_BIAS (1 << 6) | |
| 142 | −#define PDN_VSP (1 << 4) | |
| 143 | −#define PDN_ASP_SDOUT (1 << 3) | |
| 144 | −#define PDN_ASP_SDIN (1 << 2) | |
| 145 | −#define PDN_XSP_SDOUT (1 << 1) | |
| 146 | −#define PDN_XSP_SDIN (1 << 0) | |
| 140 | +#define CS42L73_PDN_MIC2_BIAS (1 << 7) | |
| 141 | +#define CS42L73_PDN_MIC1_BIAS (1 << 6) | |
| 142 | +#define CS42L73_PDN_VSP (1 << 4) | |
| 143 | +#define CS42L73_PDN_ASP_SDOUT (1 << 3) | |
| 144 | +#define CS42L73_PDN_ASP_SDIN (1 << 2) | |
| 145 | +#define CS42L73_PDN_XSP_SDOUT (1 << 1) | |
| 146 | +#define CS42L73_PDN_XSP_SDIN (1 << 0) | |
| 147 | 147 | |
| 148 | 148 | /* CS42L73_PWRCTL3 */ |
| 149 | −#define PDN_THMS (1 << 5) | |
| 150 | −#define PDN_SPKLO (1 << 4) | |
| 151 | −#define PDN_EAR (1 << 3) | |
| 152 | −#define PDN_SPK (1 << 2) | |
| 153 | −#define PDN_LO (1 << 1) | |
| 154 | −#define PDN_HP (1 << 0) | |
| 149 | +#define CS42L73_PDN_THMS (1 << 5) | |
| 150 | +#define CS42L73_PDN_SPKLO (1 << 4) | |
| 151 | +#define CS42L73_PDN_EAR (1 << 3) | |
| 152 | +#define CS42L73_PDN_SPK (1 << 2) | |
| 153 | +#define CS42L73_PDN_LO (1 << 1) | |
| 154 | +#define CS42L73_PDN_HP (1 << 0) | |
| 155 | 155 | |
| 156 | 156 | /* Thermal Overload Detect. Requires interrupt ... */ |
| 157 | −#define THMOVLD_150C 0 | |
| 158 | −#define THMOVLD_132C 1 | |
| 159 | −#define THMOVLD_115C 2 | |
| 160 | −#define THMOVLD_098C 3 | |
| 157 | +#define CS42L73_THMOVLD_150C 0 | |
| 158 | +#define CS42L73_THMOVLD_132C 1 | |
| 159 | +#define CS42L73_THMOVLD_115C 2 | |
| 160 | +#define CS42L73_THMOVLD_098C 3 | |
| 161 | 161 | |
| 162 | +#define CS42L73_CHARGEPUMP_MASK (0xF0) | |
| 162 | 163 | |
| 163 | 164 | /* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */ |
| 164 | −#define SP_3ST (1 << 7) | |
| 165 | −#define SPDIF_I2S (0 << 6) | |
| 166 | −#define SPDIF_PCM (1 << 6) | |
| 167 | −#define PCM_MODE0 (0 << 4) | |
| 168 | −#define PCM_MODE1 (1 << 4) | |
| 169 | −#define PCM_MODE2 (2 << 4) | |
| 170 | −#define PCM_MODE_MASK (3 << 4) | |
| 171 | −#define PCM_BIT_ORDER (1 << 3) | |
| 172 | −#define MCK_SCLK_64FS (0 << 0) | |
| 173 | −#define MCK_SCLK_MCLK (2 << 0) | |
| 174 | −#define MCK_SCLK_PREMCLK (3 << 0) | |
| 165 | +#define CS42L73_SP_3ST (1 << 7) | |
| 166 | +#define CS42L73_SPDIF_I2S (0 << 6) | |
| 167 | +#define CS42L73_SPDIF_PCM (1 << 6) | |
| 168 | +#define CS42L73_PCM_MODE0 (0 << 4) | |
| 169 | +#define CS42L73_PCM_MODE1 (1 << 4) | |
| 170 | +#define CS42L73_PCM_MODE2 (2 << 4) | |
| 171 | +#define CS42L73_PCM_MODE_MASK (3 << 4) | |
| 172 | +#define CS42L73_PCM_BIT_ORDER (1 << 3) | |
| 173 | +#define CS42L73_MCK_SCLK_64FS (0 << 0) | |
| 174 | +#define CS42L73_MCK_SCLK_MCLK (2 << 0) | |
| 175 | +#define CS42L73_MCK_SCLK_PREMCLK (3 << 0) | |
| 175 | 176 | |
| 176 | 177 | /* CS42L73_xSPMMCC */ |
| 177 | −#define MS_MASTER (1 << 7) | |
| 178 | +#define CS42L73_MS_MASTER (1 << 7) | |
| 178 | 179 | |
| 179 | 180 | |
| 180 | 181 | /* CS42L73_DMMCC */ |
| 181 | −#define MCLKDIS (1 << 0) | |
| 182 | −#define MCLKSEL_MCLK2 (1 << 4) | |
| 183 | −#define MCLKSEL_MCLK1 (0 << 4) | |
| 182 | +#define CS42L73_MCLKDIS (1 << 0) | |
| 183 | +#define CS42L73_MCLKSEL_MCLK2 (1 << 4) | |
| 184 | +#define CS42L73_MCLKSEL_MCLK1 (0 << 4) | |
| 184 | 185 | |
| 185 | 186 | /* CS42L73 MCLK derived from MCLK1 or MCLK2 */ |
| 186 | 187 | #define CS42L73_CLKID_MCLK1 0 |
| @@ -194,28 +195,26 @@ · 7 unmodified lines | ||
| 194 | 195 | #define CS42L73_VSP 2 |
| 195 | 196 | |
| 196 | 197 | /* IS1, IM1 */ |
| 197 | −#define MIC2_SDET (1 << 6) | |
| 198 | −#define THMOVLD (1 << 4) | |
| 199 | −#define DIGMIXOVFL (1 << 3) | |
| 200 | −#define IPBOVFL (1 << 1) | |
| 201 | −#define IPAOVFL (1 << 0) | |
| 198 | +#define CS42L73_MIC2_SDET (1 << 6) | |
| 199 | +#define CS42L73_THMOVLD (1 << 4) | |
| 200 | +#define CS42L73_DIGMIXOVFL (1 << 3) | |
| 201 | +#define CS42L73_IPBOVFL (1 << 1) | |
| 202 | +#define CS42L73_IPAOVFL (1 << 0) | |
| 202 | 203 | |
| 203 | 204 | /* Analog Softramp */ |
| 204 | −#define ANLGOSFT (1 << 0) | |
| 205 | +#define CS42L73_ANLGOSFT (1 << 0) | |
| 205 | 206 | |
| 206 | 207 | /* HP A/B Analog Mute */ |
| 207 | −#define HPA_MUTE (1 << 7) | |
| 208 | +#define CS42L73_HPA_MUTE (1 << 7) | |
| 208 | 209 | /* LO A/B Analog Mute */ |
| 209 | −#define LOA_MUTE (1 << 7) | |
| 210 | +#define CS42L73_LOA_MUTE (1 << 7) | |
| 210 | 211 | /* Digital Mute */ |
| 211 | −#define HLAD_MUTE (1 << 0) | |
| 212 | −#define HLBD_MUTE (1 << 1) | |
| 213 | −#define SPKD_MUTE (1 << 2) | |
| 214 | −#define ESLD_MUTE (1 << 3) | |
| 212 | +#define CS42L73_HLAD_MUTE (1 << 0) | |
| 213 | +#define CS42L73_HLBD_MUTE (1 << 1) | |
| 214 | +#define CS42L73_SPKD_MUTE (1 << 2) | |
| 215 | +#define CS42L73_ESLD_MUTE (1 << 3) | |
| 215 | 216 | |
| 216 | 217 | /* Misc defines for codec */ |
| 217 | −#define CS42L73_RESET_GPIO 143 | |
| 218 | − | |
| 219 | 218 | #define CS42L73_DEVID 0x00042A73 |
| 220 | 219 | #define CS42L73_MCLKX_MIN 5644800 |
| 221 | 220 | #define CS42L73_MCLKX_MAX 38400000 |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <linux/delay.h> |
| 16 | 16 | #include <linux/pm.h> |
| 17 | 17 | #include <linux/i2c.h> |
| 18 | +#include <linux/regmap.h> | |
| 18 | 19 | #include <sound/core.h> |
| 19 | 20 | #include <sound/pcm.h> |
| 20 | 21 | #include <sound/pcm_params.h> |
| @@ -38,294 +39,223 @@ struct max98088_cdata { · 17 unmodified lines | ||
| 38 | 39 | }; |
| 39 | 40 | |
| 40 | 41 | struct max98088_priv { |
| 41 | − enum max98088_type devtype; | |
| 42 | − struct max98088_pdata *pdata; | |
| 43 | − unsigned int sysclk; | |
| 44 | − struct max98088_cdata dai[2]; | |
| 45 | − int eq_textcnt; | |
| 46 | − const char **eq_texts; | |
| 47 | − struct soc_enum eq_enum; | |
| 48 | − u8 ina_state; | |
| 49 | − u8 inb_state; | |
| 50 | − unsigned int ex_mode; | |
| 51 | − unsigned int digmic; | |
| 52 | − unsigned int mic1pre; | |
| 53 | − unsigned int mic2pre; | |
| 54 | − unsigned int extmic_mode; | |
| 42 | + struct regmap *regmap; | |
| 43 | + enum max98088_type devtype; | |
| 44 | + struct max98088_pdata *pdata; | |
| 45 | + unsigned int sysclk; | |
| 46 | + struct max98088_cdata dai[2]; | |
| 47 | + int eq_textcnt; | |
| 48 | + const char **eq_texts; | |
| 49 | + struct soc_enum eq_enum; | |
| 50 | + u8 ina_state; | |
| 51 | + u8 inb_state; | |
| 52 | + unsigned int ex_mode; | |
| 53 | + unsigned int digmic; | |
| 54 | + unsigned int mic1pre; | |
| 55 | + unsigned int mic2pre; | |
| 56 | + unsigned int extmic_mode; | |
| 55 | 57 | }; |
| 56 | 58 | |
| 57 | −static const u8 max98088_reg[M98088_REG_CNT] = { | |
| 58 | − 0x00, /* 00 IRQ status */ | |
| 59 | − 0x00, /* 01 MIC status */ | |
| 60 | − 0x00, /* 02 jack status */ | |
| 61 | − 0x00, /* 03 battery voltage */ | |
| 62 | − 0x00, /* 04 */ | |
| 63 | − 0x00, /* 05 */ | |
| 64 | − 0x00, /* 06 */ | |
| 65 | − 0x00, /* 07 */ | |
| 66 | − 0x00, /* 08 */ | |
| 67 | − 0x00, /* 09 */ | |
| 68 | − 0x00, /* 0A */ | |
| 69 | − 0x00, /* 0B */ | |
| 70 | − 0x00, /* 0C */ | |
| 71 | − 0x00, /* 0D */ | |
| 72 | − 0x00, /* 0E */ | |
| 73 | − 0x00, /* 0F interrupt enable */ | |
| 74 | − | |
| 75 | − 0x00, /* 10 master clock */ | |
| 76 | − 0x00, /* 11 DAI1 clock mode */ | |
| 77 | − 0x00, /* 12 DAI1 clock control */ | |
| 78 | − 0x00, /* 13 DAI1 clock control */ | |
| 79 | − 0x00, /* 14 DAI1 format */ | |
| 80 | − 0x00, /* 15 DAI1 clock */ | |
| 81 | − 0x00, /* 16 DAI1 config */ | |
| 82 | − 0x00, /* 17 DAI1 TDM */ | |
| 83 | − 0x00, /* 18 DAI1 filters */ | |
| 84 | − 0x00, /* 19 DAI2 clock mode */ | |
| 85 | − 0x00, /* 1A DAI2 clock control */ | |
| 86 | − 0x00, /* 1B DAI2 clock control */ | |
| 87 | − 0x00, /* 1C DAI2 format */ | |
| 88 | − 0x00, /* 1D DAI2 clock */ | |
| 89 | − 0x00, /* 1E DAI2 config */ | |
| 90 | − 0x00, /* 1F DAI2 TDM */ | |
| 91 | − | |
| 92 | − 0x00, /* 20 DAI2 filters */ | |
| 93 | − 0x00, /* 21 data config */ | |
| 94 | − 0x00, /* 22 DAC mixer */ | |
| 95 | − 0x00, /* 23 left ADC mixer */ | |
| 96 | − 0x00, /* 24 right ADC mixer */ | |
| 97 | − 0x00, /* 25 left HP mixer */ | |
| 98 | − 0x00, /* 26 right HP mixer */ | |
| 99 | − 0x00, /* 27 HP control */ | |
| 100 | − 0x00, /* 28 left REC mixer */ | |
| 101 | − 0x00, /* 29 right REC mixer */ | |
| 102 | − 0x00, /* 2A REC control */ | |
| 103 | − 0x00, /* 2B left SPK mixer */ | |
| 104 | − 0x00, /* 2C right SPK mixer */ | |
| 105 | − 0x00, /* 2D SPK control */ | |
| 106 | − 0x00, /* 2E sidetone */ | |
| 107 | − 0x00, /* 2F DAI1 playback level */ | |
| 108 | − | |
| 109 | − 0x00, /* 30 DAI1 playback level */ | |
| 110 | − 0x00, /* 31 DAI2 playback level */ | |
| 111 | − 0x00, /* 32 DAI2 playbakc level */ | |
| 112 | − 0x00, /* 33 left ADC level */ | |
| 113 | − 0x00, /* 34 right ADC level */ | |
| 114 | − 0x00, /* 35 MIC1 level */ | |
| 115 | − 0x00, /* 36 MIC2 level */ | |
| 116 | − 0x00, /* 37 INA level */ | |
| 117 | − 0x00, /* 38 INB level */ | |
| 118 | − 0x00, /* 39 left HP volume */ | |
| 119 | − 0x00, /* 3A right HP volume */ | |
| 120 | − 0x00, /* 3B left REC volume */ | |
| 121 | − 0x00, /* 3C right REC volume */ | |
| 122 | − 0x00, /* 3D left SPK volume */ | |
| 123 | − 0x00, /* 3E right SPK volume */ | |
| 124 | − 0x00, /* 3F MIC config */ | |
| 125 | − | |
| 126 | − 0x00, /* 40 MIC threshold */ | |
| 127 | − 0x00, /* 41 excursion limiter filter */ | |
| 128 | − 0x00, /* 42 excursion limiter threshold */ | |
| 129 | − 0x00, /* 43 ALC */ | |
| 130 | − 0x00, /* 44 power limiter threshold */ | |
| 131 | − 0x00, /* 45 power limiter config */ | |
| 132 | − 0x00, /* 46 distortion limiter config */ | |
| 133 | − 0x00, /* 47 audio input */ | |
| 134 | − 0x00, /* 48 microphone */ | |
| 135 | − 0x00, /* 49 level control */ | |
| 136 | − 0x00, /* 4A bypass switches */ | |
| 137 | − 0x00, /* 4B jack detect */ | |
| 138 | − 0x00, /* 4C input enable */ | |
| 139 | − 0x00, /* 4D output enable */ | |
| 140 | − 0xF0, /* 4E bias control */ | |
| 141 | − 0x00, /* 4F DAC power */ | |
| 142 | − | |
| 143 | − 0x0F, /* 50 DAC power */ | |
| 144 | − 0x00, /* 51 system */ | |
| 145 | − 0x00, /* 52 DAI1 EQ1 */ | |
| 146 | − 0x00, /* 53 DAI1 EQ1 */ | |
| 147 | − 0x00, /* 54 DAI1 EQ1 */ | |
| 148 | − 0x00, /* 55 DAI1 EQ1 */ | |
| 149 | − 0x00, /* 56 DAI1 EQ1 */ | |
| 150 | − 0x00, /* 57 DAI1 EQ1 */ | |
| 151 | − 0x00, /* 58 DAI1 EQ1 */ | |
| 152 | − 0x00, /* 59 DAI1 EQ1 */ | |
| 153 | − 0x00, /* 5A DAI1 EQ1 */ | |
| 154 | − 0x00, /* 5B DAI1 EQ1 */ | |
| 155 | − 0x00, /* 5C DAI1 EQ2 */ | |
| 156 | − 0x00, /* 5D DAI1 EQ2 */ | |
| 157 | − 0x00, /* 5E DAI1 EQ2 */ | |
| 158 | − 0x00, /* 5F DAI1 EQ2 */ | |
| 159 | − | |
| 160 | − 0x00, /* 60 DAI1 EQ2 */ | |
| 161 | − 0x00, /* 61 DAI1 EQ2 */ | |
| 162 | − 0x00, /* 62 DAI1 EQ2 */ | |
| 163 | − 0x00, /* 63 DAI1 EQ2 */ | |
| 164 | − 0x00, /* 64 DAI1 EQ2 */ | |
| 165 | − 0x00, /* 65 DAI1 EQ2 */ | |
| 166 | − 0x00, /* 66 DAI1 EQ3 */ | |
| 167 | − 0x00, /* 67 DAI1 EQ3 */ | |
| 168 | − 0x00, /* 68 DAI1 EQ3 */ | |
| 169 | − 0x00, /* 69 DAI1 EQ3 */ | |
| 170 | − 0x00, /* 6A DAI1 EQ3 */ | |
| 171 | − 0x00, /* 6B DAI1 EQ3 */ | |
| 172 | − 0x00, /* 6C DAI1 EQ3 */ | |
| 173 | − 0x00, /* 6D DAI1 EQ3 */ | |
| 174 | − 0x00, /* 6E DAI1 EQ3 */ | |
| 175 | − 0x00, /* 6F DAI1 EQ3 */ | |
| 176 | − | |
| 177 | − 0x00, /* 70 DAI1 EQ4 */ | |
| 178 | − 0x00, /* 71 DAI1 EQ4 */ | |
| 179 | − 0x00, /* 72 DAI1 EQ4 */ | |
| 180 | − 0x00, /* 73 DAI1 EQ4 */ | |
| 181 | − 0x00, /* 74 DAI1 EQ4 */ | |
| 182 | − 0x00, /* 75 DAI1 EQ4 */ | |
| 183 | − 0x00, /* 76 DAI1 EQ4 */ | |
| 184 | − 0x00, /* 77 DAI1 EQ4 */ | |
| 185 | − 0x00, /* 78 DAI1 EQ4 */ | |
| 186 | − 0x00, /* 79 DAI1 EQ4 */ | |
| 187 | − 0x00, /* 7A DAI1 EQ5 */ | |
| 188 | − 0x00, /* 7B DAI1 EQ5 */ | |
| 189 | − 0x00, /* 7C DAI1 EQ5 */ | |
| 190 | − 0x00, /* 7D DAI1 EQ5 */ | |
| 191 | − 0x00, /* 7E DAI1 EQ5 */ | |
| 192 | − 0x00, /* 7F DAI1 EQ5 */ | |
| 193 | − | |
| 194 | − 0x00, /* 80 DAI1 EQ5 */ | |
| 195 | − 0x00, /* 81 DAI1 EQ5 */ | |
| 196 | − 0x00, /* 82 DAI1 EQ5 */ | |
| 197 | − 0x00, /* 83 DAI1 EQ5 */ | |
| 198 | − 0x00, /* 84 DAI2 EQ1 */ | |
| 199 | − 0x00, /* 85 DAI2 EQ1 */ | |
| 200 | − 0x00, /* 86 DAI2 EQ1 */ | |
| 201 | − 0x00, /* 87 DAI2 EQ1 */ | |
| 202 | − 0x00, /* 88 DAI2 EQ1 */ | |
| 203 | − 0x00, /* 89 DAI2 EQ1 */ | |
| 204 | − 0x00, /* 8A DAI2 EQ1 */ | |
| 205 | − 0x00, /* 8B DAI2 EQ1 */ | |
| 206 | − 0x00, /* 8C DAI2 EQ1 */ | |
| 207 | − 0x00, /* 8D DAI2 EQ1 */ | |
| 208 | − 0x00, /* 8E DAI2 EQ2 */ | |
| 209 | − 0x00, /* 8F DAI2 EQ2 */ | |
| 210 | − | |
| 211 | − 0x00, /* 90 DAI2 EQ2 */ | |
| 212 | − 0x00, /* 91 DAI2 EQ2 */ | |
| 213 | − 0x00, /* 92 DAI2 EQ2 */ | |
| 214 | − 0x00, /* 93 DAI2 EQ2 */ | |
| 215 | − 0x00, /* 94 DAI2 EQ2 */ | |
| 216 | − 0x00, /* 95 DAI2 EQ2 */ | |
| 217 | − 0x00, /* 96 DAI2 EQ2 */ | |
| 218 | − 0x00, /* 97 DAI2 EQ2 */ | |
| 219 | − 0x00, /* 98 DAI2 EQ3 */ | |
| 220 | − 0x00, /* 99 DAI2 EQ3 */ | |
| 221 | − 0x00, /* 9A DAI2 EQ3 */ | |
| 222 | − 0x00, /* 9B DAI2 EQ3 */ | |
| 223 | − 0x00, /* 9C DAI2 EQ3 */ | |
| 224 | − 0x00, /* 9D DAI2 EQ3 */ | |
| 225 | − 0x00, /* 9E DAI2 EQ3 */ | |
| 226 | − 0x00, /* 9F DAI2 EQ3 */ | |
| 227 | − | |
| 228 | − 0x00, /* A0 DAI2 EQ3 */ | |
| 229 | − 0x00, /* A1 DAI2 EQ3 */ | |
| 230 | − 0x00, /* A2 DAI2 EQ4 */ | |
| 231 | − 0x00, /* A3 DAI2 EQ4 */ | |
| 232 | − 0x00, /* A4 DAI2 EQ4 */ | |
| 233 | − 0x00, /* A5 DAI2 EQ4 */ | |
| 234 | − 0x00, /* A6 DAI2 EQ4 */ | |
| 235 | − 0x00, /* A7 DAI2 EQ4 */ | |
| 236 | − 0x00, /* A8 DAI2 EQ4 */ | |
| 237 | − 0x00, /* A9 DAI2 EQ4 */ | |
| 238 | − 0x00, /* AA DAI2 EQ4 */ | |
| 239 | − 0x00, /* AB DAI2 EQ4 */ | |
| 240 | − 0x00, /* AC DAI2 EQ5 */ | |
| 241 | − 0x00, /* AD DAI2 EQ5 */ | |
| 242 | − 0x00, /* AE DAI2 EQ5 */ | |
| 243 | − 0x00, /* AF DAI2 EQ5 */ | |
| 244 | − | |
| 245 | − 0x00, /* B0 DAI2 EQ5 */ | |
| 246 | − 0x00, /* B1 DAI2 EQ5 */ | |
| 247 | − 0x00, /* B2 DAI2 EQ5 */ | |
| 248 | − 0x00, /* B3 DAI2 EQ5 */ | |
| 249 | − 0x00, /* B4 DAI2 EQ5 */ | |
| 250 | − 0x00, /* B5 DAI2 EQ5 */ | |
| 251 | − 0x00, /* B6 DAI1 biquad */ | |
| 252 | − 0x00, /* B7 DAI1 biquad */ | |
| 253 | − 0x00, /* B8 DAI1 biquad */ | |
| 254 | − 0x00, /* B9 DAI1 biquad */ | |
| 255 | − 0x00, /* BA DAI1 biquad */ | |
| 256 | − 0x00, /* BB DAI1 biquad */ | |
| 257 | − 0x00, /* BC DAI1 biquad */ | |
| 258 | − 0x00, /* BD DAI1 biquad */ | |
| 259 | − 0x00, /* BE DAI1 biquad */ | |
| 260 | − 0x00, /* BF DAI1 biquad */ | |
| 261 | − | |
| 262 | − 0x00, /* C0 DAI2 biquad */ | |
| 263 | − 0x00, /* C1 DAI2 biquad */ | |
| 264 | − 0x00, /* C2 DAI2 biquad */ | |
| 265 | − 0x00, /* C3 DAI2 biquad */ | |
| 266 | − 0x00, /* C4 DAI2 biquad */ | |
| 267 | − 0x00, /* C5 DAI2 biquad */ | |
| 268 | − 0x00, /* C6 DAI2 biquad */ | |
| 269 | − 0x00, /* C7 DAI2 biquad */ | |
| 270 | − 0x00, /* C8 DAI2 biquad */ | |
| 271 | − 0x00, /* C9 DAI2 biquad */ | |
| 272 | − 0x00, /* CA */ | |
| 273 | − 0x00, /* CB */ | |
| 274 | − 0x00, /* CC */ | |
| 275 | − 0x00, /* CD */ | |
| 276 | − 0x00, /* CE */ | |
| 277 | − 0x00, /* CF */ | |
| 278 | − | |
| 279 | − 0x00, /* D0 */ | |
| 280 | − 0x00, /* D1 */ | |
| 281 | − 0x00, /* D2 */ | |
| 282 | − 0x00, /* D3 */ | |
| 283 | − 0x00, /* D4 */ | |
| 284 | − 0x00, /* D5 */ | |
| 285 | − 0x00, /* D6 */ | |
| 286 | − 0x00, /* D7 */ | |
| 287 | − 0x00, /* D8 */ | |
| 288 | − 0x00, /* D9 */ | |
| 289 | − 0x00, /* DA */ | |
| 290 | − 0x70, /* DB */ | |
| 291 | − 0x00, /* DC */ | |
| 292 | − 0x00, /* DD */ | |
| 293 | − 0x00, /* DE */ | |
| 294 | − 0x00, /* DF */ | |
| 295 | − | |
| 296 | − 0x00, /* E0 */ | |
| 297 | − 0x00, /* E1 */ | |
| 298 | − 0x00, /* E2 */ | |
| 299 | − 0x00, /* E3 */ | |
| 300 | − 0x00, /* E4 */ | |
| 301 | − 0x00, /* E5 */ | |
| 302 | − 0x00, /* E6 */ | |
| 303 | − 0x00, /* E7 */ | |
| 304 | − 0x00, /* E8 */ | |
| 305 | − 0x00, /* E9 */ | |
| 306 | − 0x00, /* EA */ | |
| 307 | − 0x00, /* EB */ | |
| 308 | − 0x00, /* EC */ | |
| 309 | − 0x00, /* ED */ | |
| 310 | − 0x00, /* EE */ | |
| 311 | − 0x00, /* EF */ | |
| 312 | − | |
| 313 | − 0x00, /* F0 */ | |
| 314 | − 0x00, /* F1 */ | |
| 315 | − 0x00, /* F2 */ | |
| 316 | − 0x00, /* F3 */ | |
| 317 | − 0x00, /* F4 */ | |
| 318 | − 0x00, /* F5 */ | |
| 319 | − 0x00, /* F6 */ | |
| 320 | − 0x00, /* F7 */ | |
| 321 | − 0x00, /* F8 */ | |
| 322 | − 0x00, /* F9 */ | |
| 323 | − 0x00, /* FA */ | |
| 324 | − 0x00, /* FB */ | |
| 325 | − 0x00, /* FC */ | |
| 326 | − 0x00, /* FD */ | |
| 327 | − 0x00, /* FE */ | |
| 328 | − 0x00, /* FF */ | |
| 59 | +static const struct reg_default max98088_reg[] = { | |
| 60 | + { 0xf, 0x00 }, /* 0F interrupt enable */ | |
| 61 | + | |
| 62 | + { 0x10, 0x00 }, /* 10 master clock */ | |
| 63 | + { 0x11, 0x00 }, /* 11 DAI1 clock mode */ | |
| 64 | + { 0x12, 0x00 }, /* 12 DAI1 clock control */ | |
| 65 | + { 0x13, 0x00 }, /* 13 DAI1 clock control */ | |
| 66 | + { 0x14, 0x00 }, /* 14 DAI1 format */ | |
| 67 | + { 0x15, 0x00 }, /* 15 DAI1 clock */ | |
| 68 | + { 0x16, 0x00 }, /* 16 DAI1 config */ | |
| 69 | + { 0x17, 0x00 }, /* 17 DAI1 TDM */ | |
| 70 | + { 0x18, 0x00 }, /* 18 DAI1 filters */ | |
| 71 | + { 0x19, 0x00 }, /* 19 DAI2 clock mode */ | |
| 72 | + { 0x1a, 0x00 }, /* 1A DAI2 clock control */ | |
| 73 | + { 0x1b, 0x00 }, /* 1B DAI2 clock control */ | |
| 74 | + { 0x1c, 0x00 }, /* 1C DAI2 format */ | |
| 75 | + { 0x1d, 0x00 }, /* 1D DAI2 clock */ | |
| 76 | + { 0x1e, 0x00 }, /* 1E DAI2 config */ | |
| 77 | + { 0x1f, 0x00 }, /* 1F DAI2 TDM */ | |
| 78 | + | |
| 79 | + { 0x20, 0x00 }, /* 20 DAI2 filters */ | |
| 80 | + { 0x21, 0x00 }, /* 21 data config */ | |
| 81 | + { 0x22, 0x00 }, /* 22 DAC mixer */ | |
| 82 | + { 0x23, 0x00 }, /* 23 left ADC mixer */ | |
| 83 | + { 0x24, 0x00 }, /* 24 right ADC mixer */ | |
| 84 | + { 0x25, 0x00 }, /* 25 left HP mixer */ | |
| 85 | + { 0x26, 0x00 }, /* 26 right HP mixer */ | |
| 86 | + { 0x27, 0x00 }, /* 27 HP control */ | |
| 87 | + { 0x28, 0x00 }, /* 28 left REC mixer */ | |
| 88 | + { 0x29, 0x00 }, /* 29 right REC mixer */ | |
| 89 | + { 0x2a, 0x00 }, /* 2A REC control */ | |
| 90 | + { 0x2b, 0x00 }, /* 2B left SPK mixer */ | |
| 91 | + { 0x2c, 0x00 }, /* 2C right SPK mixer */ | |
| 92 | + { 0x2d, 0x00 }, /* 2D SPK control */ | |
| 93 | + { 0x2e, 0x00 }, /* 2E sidetone */ | |
| 94 | + { 0x2f, 0x00 }, /* 2F DAI1 playback level */ | |
| 95 | + | |
| 96 | + { 0x30, 0x00 }, /* 30 DAI1 playback level */ | |
| 97 | + { 0x31, 0x00 }, /* 31 DAI2 playback level */ | |
| 98 | + { 0x32, 0x00 }, /* 32 DAI2 playbakc level */ | |
| 99 | + { 0x33, 0x00 }, /* 33 left ADC level */ | |
| 100 | + { 0x34, 0x00 }, /* 34 right ADC level */ | |
| 101 | + { 0x35, 0x00 }, /* 35 MIC1 level */ | |
| 102 | + { 0x36, 0x00 }, /* 36 MIC2 level */ | |
| 103 | + { 0x37, 0x00 }, /* 37 INA level */ | |
| 104 | + { 0x38, 0x00 }, /* 38 INB level */ | |
| 105 | + { 0x39, 0x00 }, /* 39 left HP volume */ | |
| 106 | + { 0x3a, 0x00 }, /* 3A right HP volume */ | |
| 107 | + { 0x3b, 0x00 }, /* 3B left REC volume */ | |
| 108 | + { 0x3c, 0x00 }, /* 3C right REC volume */ | |
| 109 | + { 0x3d, 0x00 }, /* 3D left SPK volume */ | |
| 110 | + { 0x3e, 0x00 }, /* 3E right SPK volume */ | |
| 111 | + { 0x3f, 0x00 }, /* 3F MIC config */ | |
| 112 | + | |
| 113 | + { 0x40, 0x00 }, /* 40 MIC threshold */ | |
| 114 | + { 0x41, 0x00 }, /* 41 excursion limiter filter */ | |
| 115 | + { 0x42, 0x00 }, /* 42 excursion limiter threshold */ | |
| 116 | + { 0x43, 0x00 }, /* 43 ALC */ | |
| 117 | + { 0x44, 0x00 }, /* 44 power limiter threshold */ | |
| 118 | + { 0x45, 0x00 }, /* 45 power limiter config */ | |
| 119 | + { 0x46, 0x00 }, /* 46 distortion limiter config */ | |
| 120 | + { 0x47, 0x00 }, /* 47 audio input */ | |
| 121 | + { 0x48, 0x00 }, /* 48 microphone */ | |
| 122 | + { 0x49, 0x00 }, /* 49 level control */ | |
| 123 | + { 0x4a, 0x00 }, /* 4A bypass switches */ | |
| 124 | + { 0x4b, 0x00 }, /* 4B jack detect */ | |
| 125 | + { 0x4c, 0x00 }, /* 4C input enable */ | |
| 126 | + { 0x4d, 0x00 }, /* 4D output enable */ | |
| 127 | + { 0x4e, 0xF0 }, /* 4E bias control */ | |
| 128 | + { 0x4f, 0x00 }, /* 4F DAC power */ | |
| 129 | + | |
| 130 | + { 0x50, 0x0F }, /* 50 DAC power */ | |
| 131 | + { 0x51, 0x00 }, /* 51 system */ | |
| 132 | + { 0x52, 0x00 }, /* 52 DAI1 EQ1 */ | |
| 133 | + { 0x53, 0x00 }, /* 53 DAI1 EQ1 */ | |
| 134 | + { 0x54, 0x00 }, /* 54 DAI1 EQ1 */ | |
| 135 | + { 0x55, 0x00 }, /* 55 DAI1 EQ1 */ | |
| 136 | + { 0x56, 0x00 }, /* 56 DAI1 EQ1 */ | |
| 137 | + { 0x57, 0x00 }, /* 57 DAI1 EQ1 */ | |
| 138 | + { 0x58, 0x00 }, /* 58 DAI1 EQ1 */ | |
| 139 | + { 0x59, 0x00 }, /* 59 DAI1 EQ1 */ | |
| 140 | + { 0x5a, 0x00 }, /* 5A DAI1 EQ1 */ | |
| 141 | + { 0x5b, 0x00 }, /* 5B DAI1 EQ1 */ | |
| 142 | + { 0x5c, 0x00 }, /* 5C DAI1 EQ2 */ | |
| 143 | + { 0x5d, 0x00 }, /* 5D DAI1 EQ2 */ | |
| 144 | + { 0x5e, 0x00 }, /* 5E DAI1 EQ2 */ | |
| 145 | + { 0x5f, 0x00 }, /* 5F DAI1 EQ2 */ | |
| 146 | + | |
| 147 | + { 0x60, 0x00 }, /* 60 DAI1 EQ2 */ | |
| 148 | + { 0x61, 0x00 }, /* 61 DAI1 EQ2 */ | |
| 149 | + { 0x62, 0x00 }, /* 62 DAI1 EQ2 */ | |
| 150 | + { 0x63, 0x00 }, /* 63 DAI1 EQ2 */ | |
| 151 | + { 0x64, 0x00 }, /* 64 DAI1 EQ2 */ | |
| 152 | + { 0x65, 0x00 }, /* 65 DAI1 EQ2 */ | |
| 153 | + { 0x66, 0x00 }, /* 66 DAI1 EQ3 */ | |
| 154 | + { 0x67, 0x00 }, /* 67 DAI1 EQ3 */ | |
| 155 | + { 0x68, 0x00 }, /* 68 DAI1 EQ3 */ | |
| 156 | + { 0x69, 0x00 }, /* 69 DAI1 EQ3 */ | |
| 157 | + { 0x6a, 0x00 }, /* 6A DAI1 EQ3 */ | |
| 158 | + { 0x6b, 0x00 }, /* 6B DAI1 EQ3 */ | |
| 159 | + { 0x6c, 0x00 }, /* 6C DAI1 EQ3 */ | |
| 160 | + { 0x6d, 0x00 }, /* 6D DAI1 EQ3 */ | |
| 161 | + { 0x6e, 0x00 }, /* 6E DAI1 EQ3 */ | |
| 162 | + { 0x6f, 0x00 }, /* 6F DAI1 EQ3 */ | |
| 163 | + | |
| 164 | + { 0x70, 0x00 }, /* 70 DAI1 EQ4 */ | |
| 165 | + { 0x71, 0x00 }, /* 71 DAI1 EQ4 */ | |
| 166 | + { 0x72, 0x00 }, /* 72 DAI1 EQ4 */ | |
| 167 | + { 0x73, 0x00 }, /* 73 DAI1 EQ4 */ | |
| 168 | + { 0x74, 0x00 }, /* 74 DAI1 EQ4 */ | |
| 169 | + { 0x75, 0x00 }, /* 75 DAI1 EQ4 */ | |
| 170 | + { 0x76, 0x00 }, /* 76 DAI1 EQ4 */ | |
| 171 | + { 0x77, 0x00 }, /* 77 DAI1 EQ4 */ | |
| 172 | + { 0x78, 0x00 }, /* 78 DAI1 EQ4 */ | |
| 173 | + { 0x79, 0x00 }, /* 79 DAI1 EQ4 */ | |
| 174 | + { 0x7a, 0x00 }, /* 7A DAI1 EQ5 */ | |
| 175 | + { 0x7b, 0x00 }, /* 7B DAI1 EQ5 */ | |
| 176 | + { 0x7c, 0x00 }, /* 7C DAI1 EQ5 */ | |
| 177 | + { 0x7d, 0x00 }, /* 7D DAI1 EQ5 */ | |
| 178 | + { 0x7e, 0x00 }, /* 7E DAI1 EQ5 */ | |
| 179 | + { 0x7f, 0x00 }, /* 7F DAI1 EQ5 */ | |
| 180 | + | |
| 181 | + { 0x80, 0x00 }, /* 80 DAI1 EQ5 */ | |
| 182 | + { 0x81, 0x00 }, /* 81 DAI1 EQ5 */ | |
| 183 | + { 0x82, 0x00 }, /* 82 DAI1 EQ5 */ | |
| 184 | + { 0x83, 0x00 }, /* 83 DAI1 EQ5 */ | |
| 185 | + { 0x84, 0x00 }, /* 84 DAI2 EQ1 */ | |
| 186 | + { 0x85, 0x00 }, /* 85 DAI2 EQ1 */ | |
| 187 | + { 0x86, 0x00 }, /* 86 DAI2 EQ1 */ | |
| 188 | + { 0x87, 0x00 }, /* 87 DAI2 EQ1 */ | |
| 189 | + { 0x88, 0x00 }, /* 88 DAI2 EQ1 */ | |
| 190 | + { 0x89, 0x00 }, /* 89 DAI2 EQ1 */ | |
| 191 | + { 0x8a, 0x00 }, /* 8A DAI2 EQ1 */ | |
| 192 | + { 0x8b, 0x00 }, /* 8B DAI2 EQ1 */ | |
| 193 | + { 0x8c, 0x00 }, /* 8C DAI2 EQ1 */ | |
| 194 | + { 0x8d, 0x00 }, /* 8D DAI2 EQ1 */ | |
| 195 | + { 0x8e, 0x00 }, /* 8E DAI2 EQ2 */ | |
| 196 | + { 0x8f, 0x00 }, /* 8F DAI2 EQ2 */ | |
| 197 | + | |
| 198 | + { 0x90, 0x00 }, /* 90 DAI2 EQ2 */ | |
| 199 | + { 0x91, 0x00 }, /* 91 DAI2 EQ2 */ | |
| 200 | + { 0x92, 0x00 }, /* 92 DAI2 EQ2 */ | |
| 201 | + { 0x93, 0x00 }, /* 93 DAI2 EQ2 */ | |
| 202 | + { 0x94, 0x00 }, /* 94 DAI2 EQ2 */ | |
| 203 | + { 0x95, 0x00 }, /* 95 DAI2 EQ2 */ | |
| 204 | + { 0x96, 0x00 }, /* 96 DAI2 EQ2 */ | |
| 205 | + { 0x97, 0x00 }, /* 97 DAI2 EQ2 */ | |
| 206 | + { 0x98, 0x00 }, /* 98 DAI2 EQ3 */ | |
| 207 | + { 0x99, 0x00 }, /* 99 DAI2 EQ3 */ | |
| 208 | + { 0x9a, 0x00 }, /* 9A DAI2 EQ3 */ | |
| 209 | + { 0x9b, 0x00 }, /* 9B DAI2 EQ3 */ | |
| 210 | + { 0x9c, 0x00 }, /* 9C DAI2 EQ3 */ | |
| 211 | + { 0x9d, 0x00 }, /* 9D DAI2 EQ3 */ | |
| 212 | + { 0x9e, 0x00 }, /* 9E DAI2 EQ3 */ | |
| 213 | + { 0x9f, 0x00 }, /* 9F DAI2 EQ3 */ | |
| 214 | + | |
| 215 | + { 0xa0, 0x00 }, /* A0 DAI2 EQ3 */ | |
| 216 | + { 0xa1, 0x00 }, /* A1 DAI2 EQ3 */ | |
| 217 | + { 0xa2, 0x00 }, /* A2 DAI2 EQ4 */ | |
| 218 | + { 0xa3, 0x00 }, /* A3 DAI2 EQ4 */ | |
| 219 | + { 0xa4, 0x00 }, /* A4 DAI2 EQ4 */ | |
| 220 | + { 0xa5, 0x00 }, /* A5 DAI2 EQ4 */ | |
| 221 | + { 0xa6, 0x00 }, /* A6 DAI2 EQ4 */ | |
| 222 | + { 0xa7, 0x00 }, /* A7 DAI2 EQ4 */ | |
| 223 | + { 0xa8, 0x00 }, /* A8 DAI2 EQ4 */ | |
| 224 | + { 0xa9, 0x00 }, /* A9 DAI2 EQ4 */ | |
| 225 | + { 0xaa, 0x00 }, /* AA DAI2 EQ4 */ | |
| 226 | + { 0xab, 0x00 }, /* AB DAI2 EQ4 */ | |
| 227 | + { 0xac, 0x00 }, /* AC DAI2 EQ5 */ | |
| 228 | + { 0xad, 0x00 }, /* AD DAI2 EQ5 */ | |
| 229 | + { 0xae, 0x00 }, /* AE DAI2 EQ5 */ | |
| 230 | + { 0xaf, 0x00 }, /* AF DAI2 EQ5 */ | |
| 231 | + | |
| 232 | + { 0xb0, 0x00 }, /* B0 DAI2 EQ5 */ | |
| 233 | + { 0xb1, 0x00 }, /* B1 DAI2 EQ5 */ | |
| 234 | + { 0xb2, 0x00 }, /* B2 DAI2 EQ5 */ | |
| 235 | + { 0xb3, 0x00 }, /* B3 DAI2 EQ5 */ | |
| 236 | + { 0xb4, 0x00 }, /* B4 DAI2 EQ5 */ | |
| 237 | + { 0xb5, 0x00 }, /* B5 DAI2 EQ5 */ | |
| 238 | + { 0xb6, 0x00 }, /* B6 DAI1 biquad */ | |
| 239 | + { 0xb7, 0x00 }, /* B7 DAI1 biquad */ | |
| 240 | + { 0xb8 ,0x00 }, /* B8 DAI1 biquad */ | |
| 241 | + { 0xb9, 0x00 }, /* B9 DAI1 biquad */ | |
| 242 | + { 0xba, 0x00 }, /* BA DAI1 biquad */ | |
| 243 | + { 0xbb, 0x00 }, /* BB DAI1 biquad */ | |
| 244 | + { 0xbc, 0x00 }, /* BC DAI1 biquad */ | |
| 245 | + { 0xbd, 0x00 }, /* BD DAI1 biquad */ | |
| 246 | + { 0xbe, 0x00 }, /* BE DAI1 biquad */ | |
| 247 | + { 0xbf, 0x00 }, /* BF DAI1 biquad */ | |
| 248 | + | |
| 249 | + { 0xc0, 0x00 }, /* C0 DAI2 biquad */ | |
| 250 | + { 0xc1, 0x00 }, /* C1 DAI2 biquad */ | |
| 251 | + { 0xc2, 0x00 }, /* C2 DAI2 biquad */ | |
| 252 | + { 0xc3, 0x00 }, /* C3 DAI2 biquad */ | |
| 253 | + { 0xc4, 0x00 }, /* C4 DAI2 biquad */ | |
| 254 | + { 0xc5, 0x00 }, /* C5 DAI2 biquad */ | |
| 255 | + { 0xc6, 0x00 }, /* C6 DAI2 biquad */ | |
| 256 | + { 0xc7, 0x00 }, /* C7 DAI2 biquad */ | |
| 257 | + { 0xc8, 0x00 }, /* C8 DAI2 biquad */ | |
| 258 | + { 0xc9, 0x00 }, /* C9 DAI2 biquad */ | |
| 329 | 259 | }; |
| 330 | 260 | |
| 331 | 261 | static struct { |
| @@ -606,11 +536,28 @@ static struct { · 274 unmodified lines | ||
| 606 | 536 | { 0xFF, 0x00, 1 }, /* FF */ |
| 607 | 537 | }; |
| 608 | 538 | |
| 609 | −static int max98088_volatile_register(struct snd_soc_codec *codec, unsigned int reg) | |
| 539 | +static bool max98088_readable_register(struct device *dev, unsigned int reg) | |
| 540 | +{ | |
| 541 | + return max98088_access[reg].readable; | |
| 542 | +} | |
| 543 | + | |
| 544 | +static bool max98088_volatile_register(struct device *dev, unsigned int reg) | |
| 610 | 545 | { |
| 611 | 546 | return max98088_access[reg].vol; |
| 612 | 547 | } |
| 613 | 548 | |
| 549 | +static const struct regmap_config max98088_regmap = { | |
| 550 | + .reg_bits = 8, | |
| 551 | + .val_bits = 8, | |
| 552 | + | |
| 553 | + .readable_reg = max98088_readable_register, | |
| 554 | + .volatile_reg = max98088_volatile_register, | |
| 555 | + .max_register = 0xff, | |
| 556 | + | |
| 557 | + .reg_defaults = max98088_reg, | |
| 558 | + .num_reg_defaults = ARRAY_SIZE(max98088_reg), | |
| 559 | + .cache_type = REGCACHE_RBTREE, | |
| 560 | +}; | |
| 614 | 561 | |
| 615 | 562 | /* |
| 616 | 563 | * Load equalizer DSP coefficient configurations registers |
| @@ -621,8 +568,9 @@ static void m98088_eq_band(struct snd_soc_codec *codec, unsigned int dai, · 4 unmodified lines | ||
| 621 | 568 | unsigned int eq_reg; |
| 622 | 569 | unsigned int i; |
| 623 | 570 | |
| 624 | − BUG_ON(band > 4); | |
| 625 | − BUG_ON(dai > 1); | |
| 571 | + if (WARN_ON(band > 4) || | |
| 572 | + WARN_ON(dai > 1)) | |
| 573 | + return; | |
| 626 | 574 | |
| 627 | 575 | /* Load the base register address */ |
| 628 | 576 | eq_reg = dai ? M98088_REG_84_DAI2_EQ_BASE : M98088_REG_52_DAI1_EQ_BASE; |
| @@ -962,7 +910,8 @@ static int max98088_line_pga(struct snd_soc_dapm_widget *w, · 333 unmodified lines | ||
| 962 | 910 | struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); |
| 963 | 911 | u8 *state; |
| 964 | 912 | |
| 965 | − BUG_ON(!((channel == 1) || (channel == 2))); | |
| 913 | + if (WARN_ON(!(channel == 1 || channel == 2))) | |
| 914 | + return -EINVAL; | |
| 966 | 915 | |
| 967 | 916 | switch (line) { |
| 968 | 917 | case LINE_INA: |
| @@ -1610,58 +1559,34 @@ static int max98088_dai2_digital_mute(struct snd_soc_dai *codec_dai, int mute) · 641 unmodified lines | ||
| 1610 | 1559 | return 0; |
| 1611 | 1560 | } |
| 1612 | 1561 | |
| 1613 | −static void max98088_sync_cache(struct snd_soc_codec *codec) | |
| 1614 | −{ | |
| 1615 | − u8 *reg_cache = codec->reg_cache; | |
| 1616 | − int i; | |
| 1617 | − | |
| 1618 | − if (!codec->cache_sync) | |
| 1619 | − return; | |
| 1620 | − | |
| 1621 | − codec->cache_only = 0; | |
| 1622 | − | |
| 1623 | − /* write back cached values if they're writeable and | |
| 1624 | − * different from the hardware default. | |
| 1625 | − */ | |
| 1626 | − for (i = 1; i < codec->driver->reg_cache_size; i++) { | |
| 1627 | − if (!max98088_access[i].writable) | |
| 1628 | − continue; | |
| 1629 | − | |
| 1630 | − if (reg_cache[i] == max98088_reg[i]) | |
| 1631 | − continue; | |
| 1632 | − | |
| 1633 | − snd_soc_write(codec, i, reg_cache[i]); | |
| 1634 | − } | |
| 1635 | − | |
| 1636 | − codec->cache_sync = 0; | |
| 1637 | −} | |
| 1638 | − | |
| 1639 | 1562 | static int max98088_set_bias_level(struct snd_soc_codec *codec, |
| 1640 | 1563 | enum snd_soc_bias_level level) |
| 1641 | 1564 | { |
| 1642 | − switch (level) { | |
| 1643 | − case SND_SOC_BIAS_ON: | |
| 1644 | − break; | |
| 1645 | − | |
| 1646 | − case SND_SOC_BIAS_PREPARE: | |
| 1647 | − break; | |
| 1648 | − | |
| 1649 | − case SND_SOC_BIAS_STANDBY: | |
| 1650 | − if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) | |
| 1651 | − max98088_sync_cache(codec); | |
| 1652 | − | |
| 1653 | − snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | |
| 1654 | − M98088_MBEN, M98088_MBEN); | |
| 1655 | − break; | |
| 1656 | − | |
| 1657 | − case SND_SOC_BIAS_OFF: | |
| 1658 | − snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | |
| 1659 | − M98088_MBEN, 0); | |
| 1660 | − codec->cache_sync = 1; | |
| 1661 | − break; | |
| 1662 | − } | |
| 1663 | − codec->dapm.bias_level = level; | |
| 1664 | − return 0; | |
| 1565 | + struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec); | |
| 1566 | + | |
| 1567 | + switch (level) { | |
| 1568 | + case SND_SOC_BIAS_ON: | |
| 1569 | + break; | |
| 1570 | + | |
| 1571 | + case SND_SOC_BIAS_PREPARE: | |
| 1572 | + break; | |
| 1573 | + | |
| 1574 | + case SND_SOC_BIAS_STANDBY: | |
| 1575 | + if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) | |
| 1576 | + regcache_sync(max98088->regmap); | |
| 1577 | + | |
| 1578 | + snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | |
| 1579 | + M98088_MBEN, M98088_MBEN); | |
| 1580 | + break; | |
| 1581 | + | |
| 1582 | + case SND_SOC_BIAS_OFF: | |
| 1583 | + snd_soc_update_bits(codec, M98088_REG_4C_PWR_EN_IN, | |
| 1584 | + M98088_MBEN, 0); | |
| 1585 | + regcache_mark_dirty(max98088->regmap); | |
| 1586 | + break; | |
| 1587 | + } | |
| 1588 | + codec->dapm.bias_level = level; | |
| 1589 | + return 0; | |
| 1665 | 1590 | } |
| 1666 | 1591 | |
| 1667 | 1592 | #define MAX98088_RATES SNDRV_PCM_RATE_8000_96000 |
| @@ -1988,9 +1913,9 @@ static int max98088_probe(struct snd_soc_codec *codec) · 320 unmodified lines | ||
| 1988 | 1913 | struct max98088_cdata *cdata; |
| 1989 | 1914 | int ret = 0; |
| 1990 | 1915 | |
| 1991 | − codec->cache_sync = 1; | |
| 1916 | + regcache_mark_dirty(max98088->regmap); | |
| 1992 | 1917 | |
| 1993 | − ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | |
| 1918 | + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); | |
| 1994 | 1919 | if (ret != 0) { |
| 1995 | 1920 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 1996 | 1921 | return ret; |
| @@ -2048,9 +1973,6 @@ static int max98088_probe(struct snd_soc_codec *codec) · 51 unmodified lines | ||
| 2048 | 1973 | |
| 2049 | 1974 | max98088_handle_pdata(codec); |
| 2050 | 1975 | |
| 2051 | − snd_soc_add_codec_controls(codec, max98088_snd_controls, | |
| 2052 | − ARRAY_SIZE(max98088_snd_controls)); | |
| 2053 | − | |
| 2054 | 1976 | err_access: |
| 2055 | 1977 | return ret; |
| 2056 | 1978 | } |
| @@ -2066,15 +1988,13 @@ static int max98088_remove(struct snd_soc_codec *codec) · 9 unmodified lines | ||
| 2066 | 1988 | } |
| 2067 | 1989 | |
| 2068 | 1990 | static struct snd_soc_codec_driver soc_codec_dev_max98088 = { |
| 2069 | − .probe = max98088_probe, | |
| 2070 | − .remove = max98088_remove, | |
| 2071 | − .suspend = max98088_suspend, | |
| 2072 | − .resume = max98088_resume, | |
| 2073 | − .set_bias_level = max98088_set_bias_level, | |
| 2074 | − .reg_cache_size = ARRAY_SIZE(max98088_reg), | |
| 2075 | − .reg_word_size = sizeof(u8), | |
| 2076 | − .reg_cache_default = max98088_reg, | |
| 2077 | − .volatile_register = max98088_volatile_register, | |
| 1991 | + .probe = max98088_probe, | |
| 1992 | + .remove = max98088_remove, | |
| 1993 | + .suspend = max98088_suspend, | |
| 1994 | + .resume = max98088_resume, | |
| 1995 | + .set_bias_level = max98088_set_bias_level, | |
| 1996 | + .controls = max98088_snd_controls, | |
| 1997 | + .num_controls = ARRAY_SIZE(max98088_snd_controls), | |
| 2078 | 1998 | .dapm_widgets = max98088_dapm_widgets, |
| 2079 | 1999 | .num_dapm_widgets = ARRAY_SIZE(max98088_dapm_widgets), |
| 2080 | 2000 | .dapm_routes = max98088_audio_map, |
| @@ -2082,7 +2002,7 @@ static struct snd_soc_codec_driver soc_codec_dev_max98088 = { · 1 unmodified line | ||
| 2082 | 2002 | }; |
| 2083 | 2003 | |
| 2084 | 2004 | static int max98088_i2c_probe(struct i2c_client *i2c, |
| 2085 | − const struct i2c_device_id *id) | |
| 2005 | + const struct i2c_device_id *id) | |
| 2086 | 2006 | { |
| 2087 | 2007 | struct max98088_priv *max98088; |
| 2088 | 2008 | int ret; |
| @@ -2092,6 +2012,10 @@ static int max98088_i2c_probe(struct i2c_client *i2c, · 3 unmodified lines | ||
| 2092 | 2012 | if (max98088 == NULL) |
| 2093 | 2013 | return -ENOMEM; |
| 2094 | 2014 | |
| 2015 | + max98088->regmap = devm_regmap_init_i2c(i2c, &max98088_regmap); | |
| 2016 | + if (IS_ERR(max98088->regmap)) | |
| 2017 | + return PTR_ERR(max98088->regmap); | |
| 2018 | + | |
| 2095 | 2019 | max98088->devtype = id->driver_data; |
| 2096 | 2020 | |
| 2097 | 2021 | i2c_set_clientdata(i2c, max98088); |
| @@ -39,6 +39,7 @@ struct max98095_cdata { · 38 unmodified lines | ||
| 39 | 39 | }; |
| 40 | 40 | |
| 41 | 41 | struct max98095_priv { |
| 42 | + struct regmap *regmap; | |
| 42 | 43 | enum max98095_type devtype; |
| 43 | 44 | struct max98095_pdata *pdata; |
| 44 | 45 | unsigned int sysclk; |
| @@ -56,263 +57,145 @@ struct max98095_priv { · 11 unmodified lines | ||
| 56 | 57 | struct snd_soc_jack *mic_jack; |
| 57 | 58 | }; |
| 58 | 59 | |
| 59 | −static const u8 max98095_reg_def[M98095_REG_CNT] = { | |
| 60 | − 0x00, /* 00 */ | |
| 61 | − 0x00, /* 01 */ | |
| 62 | − 0x00, /* 02 */ | |
| 63 | − 0x00, /* 03 */ | |
| 64 | − 0x00, /* 04 */ | |
| 65 | − 0x00, /* 05 */ | |
| 66 | − 0x00, /* 06 */ | |
| 67 | − 0x00, /* 07 */ | |
| 68 | − 0x00, /* 08 */ | |
| 69 | − 0x00, /* 09 */ | |
| 70 | − 0x00, /* 0A */ | |
| 71 | − 0x00, /* 0B */ | |
| 72 | − 0x00, /* 0C */ | |
| 73 | − 0x00, /* 0D */ | |
| 74 | − 0x00, /* 0E */ | |
| 75 | − 0x00, /* 0F */ | |
| 76 | − 0x00, /* 10 */ | |
| 77 | − 0x00, /* 11 */ | |
| 78 | − 0x00, /* 12 */ | |
| 79 | − 0x00, /* 13 */ | |
| 80 | − 0x00, /* 14 */ | |
| 81 | − 0x00, /* 15 */ | |
| 82 | − 0x00, /* 16 */ | |
| 83 | − 0x00, /* 17 */ | |
| 84 | − 0x00, /* 18 */ | |
| 85 | − 0x00, /* 19 */ | |
| 86 | − 0x00, /* 1A */ | |
| 87 | − 0x00, /* 1B */ | |
| 88 | − 0x00, /* 1C */ | |
| 89 | − 0x00, /* 1D */ | |
| 90 | − 0x00, /* 1E */ | |
| 91 | − 0x00, /* 1F */ | |
| 92 | − 0x00, /* 20 */ | |
| 93 | − 0x00, /* 21 */ | |
| 94 | − 0x00, /* 22 */ | |
| 95 | − 0x00, /* 23 */ | |
| 96 | − 0x00, /* 24 */ | |
| 97 | − 0x00, /* 25 */ | |
| 98 | − 0x00, /* 26 */ | |
| 99 | − 0x00, /* 27 */ | |
| 100 | − 0x00, /* 28 */ | |
| 101 | − 0x00, /* 29 */ | |
| 102 | − 0x00, /* 2A */ | |
| 103 | − 0x00, /* 2B */ | |
| 104 | − 0x00, /* 2C */ | |
| 105 | − 0x00, /* 2D */ | |
| 106 | − 0x00, /* 2E */ | |
| 107 | − 0x00, /* 2F */ | |
| 108 | − 0x00, /* 30 */ | |
| 109 | − 0x00, /* 31 */ | |
| 110 | − 0x00, /* 32 */ | |
| 111 | − 0x00, /* 33 */ | |
| 112 | − 0x00, /* 34 */ | |
| 113 | − 0x00, /* 35 */ | |
| 114 | − 0x00, /* 36 */ | |
| 115 | − 0x00, /* 37 */ | |
| 116 | − 0x00, /* 38 */ | |
| 117 | − 0x00, /* 39 */ | |
| 118 | − 0x00, /* 3A */ | |
| 119 | − 0x00, /* 3B */ | |
| 120 | − 0x00, /* 3C */ | |
| 121 | − 0x00, /* 3D */ | |
| 122 | − 0x00, /* 3E */ | |
| 123 | − 0x00, /* 3F */ | |
| 124 | − 0x00, /* 40 */ | |
| 125 | − 0x00, /* 41 */ | |
| 126 | − 0x00, /* 42 */ | |
| 127 | − 0x00, /* 43 */ | |
| 128 | − 0x00, /* 44 */ | |
| 129 | − 0x00, /* 45 */ | |
| 130 | − 0x00, /* 46 */ | |
| 131 | − 0x00, /* 47 */ | |
| 132 | − 0x00, /* 48 */ | |
| 133 | − 0x00, /* 49 */ | |
| 134 | − 0x00, /* 4A */ | |
| 135 | − 0x00, /* 4B */ | |
| 136 | − 0x00, /* 4C */ | |
| 137 | − 0x00, /* 4D */ | |
| 138 | − 0x00, /* 4E */ | |
| 139 | − 0x00, /* 4F */ | |
| 140 | − 0x00, /* 50 */ | |
| 141 | − 0x00, /* 51 */ | |
| 142 | − 0x00, /* 52 */ | |
| 143 | − 0x00, /* 53 */ | |
| 144 | − 0x00, /* 54 */ | |
| 145 | − 0x00, /* 55 */ | |
| 146 | − 0x00, /* 56 */ | |
| 147 | − 0x00, /* 57 */ | |
| 148 | − 0x00, /* 58 */ | |
| 149 | − 0x00, /* 59 */ | |
| 150 | − 0x00, /* 5A */ | |
| 151 | − 0x00, /* 5B */ | |
| 152 | − 0x00, /* 5C */ | |
| 153 | − 0x00, /* 5D */ | |
| 154 | − 0x00, /* 5E */ | |
| 155 | − 0x00, /* 5F */ | |
| 156 | − 0x00, /* 60 */ | |
| 157 | − 0x00, /* 61 */ | |
| 158 | − 0x00, /* 62 */ | |
| 159 | − 0x00, /* 63 */ | |
| 160 | − 0x00, /* 64 */ | |
| 161 | − 0x00, /* 65 */ | |
| 162 | − 0x00, /* 66 */ | |
| 163 | − 0x00, /* 67 */ | |
| 164 | − 0x00, /* 68 */ | |
| 165 | − 0x00, /* 69 */ | |
| 166 | − 0x00, /* 6A */ | |
| 167 | − 0x00, /* 6B */ | |
| 168 | − 0x00, /* 6C */ | |
| 169 | − 0x00, /* 6D */ | |
| 170 | − 0x00, /* 6E */ | |
| 171 | − 0x00, /* 6F */ | |
| 172 | − 0x00, /* 70 */ | |
| 173 | − 0x00, /* 71 */ | |
| 174 | − 0x00, /* 72 */ | |
| 175 | − 0x00, /* 73 */ | |
| 176 | − 0x00, /* 74 */ | |
| 177 | − 0x00, /* 75 */ | |
| 178 | − 0x00, /* 76 */ | |
| 179 | − 0x00, /* 77 */ | |
| 180 | − 0x00, /* 78 */ | |
| 181 | − 0x00, /* 79 */ | |
| 182 | − 0x00, /* 7A */ | |
| 183 | − 0x00, /* 7B */ | |
| 184 | − 0x00, /* 7C */ | |
| 185 | − 0x00, /* 7D */ | |
| 186 | − 0x00, /* 7E */ | |
| 187 | − 0x00, /* 7F */ | |
| 188 | − 0x00, /* 80 */ | |
| 189 | − 0x00, /* 81 */ | |
| 190 | − 0x00, /* 82 */ | |
| 191 | − 0x00, /* 83 */ | |
| 192 | − 0x00, /* 84 */ | |
| 193 | − 0x00, /* 85 */ | |
| 194 | − 0x00, /* 86 */ | |
| 195 | − 0x00, /* 87 */ | |
| 196 | − 0x00, /* 88 */ | |
| 197 | − 0x00, /* 89 */ | |
| 198 | − 0x00, /* 8A */ | |
| 199 | − 0x00, /* 8B */ | |
| 200 | − 0x00, /* 8C */ | |
| 201 | − 0x00, /* 8D */ | |
| 202 | − 0x00, /* 8E */ | |
| 203 | − 0x00, /* 8F */ | |
| 204 | − 0x00, /* 90 */ | |
| 205 | − 0x00, /* 91 */ | |
| 206 | − 0x30, /* 92 */ | |
| 207 | − 0xF0, /* 93 */ | |
| 208 | − 0x00, /* 94 */ | |
| 209 | − 0x00, /* 95 */ | |
| 210 | − 0x3F, /* 96 */ | |
| 211 | − 0x00, /* 97 */ | |
| 212 | − 0x00, /* 98 */ | |
| 213 | − 0x00, /* 99 */ | |
| 214 | − 0x00, /* 9A */ | |
| 215 | − 0x00, /* 9B */ | |
| 216 | − 0x00, /* 9C */ | |
| 217 | − 0x00, /* 9D */ | |
| 218 | − 0x00, /* 9E */ | |
| 219 | − 0x00, /* 9F */ | |
| 220 | − 0x00, /* A0 */ | |
| 221 | − 0x00, /* A1 */ | |
| 222 | − 0x00, /* A2 */ | |
| 223 | − 0x00, /* A3 */ | |
| 224 | − 0x00, /* A4 */ | |
| 225 | − 0x00, /* A5 */ | |
| 226 | − 0x00, /* A6 */ | |
| 227 | − 0x00, /* A7 */ | |
| 228 | − 0x00, /* A8 */ | |
| 229 | − 0x00, /* A9 */ | |
| 230 | − 0x00, /* AA */ | |
| 231 | − 0x00, /* AB */ | |
| 232 | − 0x00, /* AC */ | |
| 233 | − 0x00, /* AD */ | |
| 234 | − 0x00, /* AE */ | |
| 235 | − 0x00, /* AF */ | |
| 236 | − 0x00, /* B0 */ | |
| 237 | − 0x00, /* B1 */ | |
| 238 | − 0x00, /* B2 */ | |
| 239 | − 0x00, /* B3 */ | |
| 240 | − 0x00, /* B4 */ | |
| 241 | − 0x00, /* B5 */ | |
| 242 | − 0x00, /* B6 */ | |
| 243 | − 0x00, /* B7 */ | |
| 244 | − 0x00, /* B8 */ | |
| 245 | − 0x00, /* B9 */ | |
| 246 | − 0x00, /* BA */ | |
| 247 | − 0x00, /* BB */ | |
| 248 | − 0x00, /* BC */ | |
| 249 | − 0x00, /* BD */ | |
| 250 | − 0x00, /* BE */ | |
| 251 | − 0x00, /* BF */ | |
| 252 | − 0x00, /* C0 */ | |
| 253 | − 0x00, /* C1 */ | |
| 254 | − 0x00, /* C2 */ | |
| 255 | − 0x00, /* C3 */ | |
| 256 | − 0x00, /* C4 */ | |
| 257 | − 0x00, /* C5 */ | |
| 258 | − 0x00, /* C6 */ | |
| 259 | − 0x00, /* C7 */ | |
| 260 | − 0x00, /* C8 */ | |
| 261 | − 0x00, /* C9 */ | |
| 262 | − 0x00, /* CA */ | |
| 263 | − 0x00, /* CB */ | |
| 264 | − 0x00, /* CC */ | |
| 265 | − 0x00, /* CD */ | |
| 266 | − 0x00, /* CE */ | |
| 267 | − 0x00, /* CF */ | |
| 268 | − 0x00, /* D0 */ | |
| 269 | − 0x00, /* D1 */ | |
| 270 | − 0x00, /* D2 */ | |
| 271 | − 0x00, /* D3 */ | |
| 272 | − 0x00, /* D4 */ | |
| 273 | − 0x00, /* D5 */ | |
| 274 | − 0x00, /* D6 */ | |
| 275 | − 0x00, /* D7 */ | |
| 276 | − 0x00, /* D8 */ | |
| 277 | − 0x00, /* D9 */ | |
| 278 | − 0x00, /* DA */ | |
| 279 | − 0x00, /* DB */ | |
| 280 | − 0x00, /* DC */ | |
| 281 | − 0x00, /* DD */ | |
| 282 | − 0x00, /* DE */ | |
| 283 | − 0x00, /* DF */ | |
| 284 | − 0x00, /* E0 */ | |
| 285 | − 0x00, /* E1 */ | |
| 286 | − 0x00, /* E2 */ | |
| 287 | − 0x00, /* E3 */ | |
| 288 | − 0x00, /* E4 */ | |
| 289 | − 0x00, /* E5 */ | |
| 290 | − 0x00, /* E6 */ | |
| 291 | − 0x00, /* E7 */ | |
| 292 | − 0x00, /* E8 */ | |
| 293 | − 0x00, /* E9 */ | |
| 294 | − 0x00, /* EA */ | |
| 295 | − 0x00, /* EB */ | |
| 296 | − 0x00, /* EC */ | |
| 297 | − 0x00, /* ED */ | |
| 298 | − 0x00, /* EE */ | |
| 299 | − 0x00, /* EF */ | |
| 300 | − 0x00, /* F0 */ | |
| 301 | − 0x00, /* F1 */ | |
| 302 | − 0x00, /* F2 */ | |
| 303 | − 0x00, /* F3 */ | |
| 304 | − 0x00, /* F4 */ | |
| 305 | − 0x00, /* F5 */ | |
| 306 | − 0x00, /* F6 */ | |
| 307 | − 0x00, /* F7 */ | |
| 308 | − 0x00, /* F8 */ | |
| 309 | − 0x00, /* F9 */ | |
| 310 | − 0x00, /* FA */ | |
| 311 | − 0x00, /* FB */ | |
| 312 | − 0x00, /* FC */ | |
| 313 | − 0x00, /* FD */ | |
| 314 | − 0x00, /* FE */ | |
| 315 | − 0x00, /* FF */ | |
| 60 | +static const struct reg_default max98095_reg_def[] = { | |
| 61 | + { 0xf, 0x00 }, /* 0F */ | |
| 62 | + { 0x10, 0x00 }, /* 10 */ | |
| 63 | + { 0x11, 0x00 }, /* 11 */ | |
| 64 | + { 0x12, 0x00 }, /* 12 */ | |
| 65 | + { 0x13, 0x00 }, /* 13 */ | |
| 66 | + { 0x14, 0x00 }, /* 14 */ | |
| 67 | + { 0x15, 0x00 }, /* 15 */ | |
| 68 | + { 0x16, 0x00 }, /* 16 */ | |
| 69 | + { 0x17, 0x00 }, /* 17 */ | |
| 70 | + { 0x18, 0x00 }, /* 18 */ | |
| 71 | + { 0x19, 0x00 }, /* 19 */ | |
| 72 | + { 0x1a, 0x00 }, /* 1A */ | |
| 73 | + { 0x1b, 0x00 }, /* 1B */ | |
| 74 | + { 0x1c, 0x00 }, /* 1C */ | |
| 75 | + { 0x1d, 0x00 }, /* 1D */ | |
| 76 | + { 0x1e, 0x00 }, /* 1E */ | |
| 77 | + { 0x1f, 0x00 }, /* 1F */ | |
| 78 | + { 0x20, 0x00 }, /* 20 */ | |
| 79 | + { 0x21, 0x00 }, /* 21 */ | |
| 80 | + { 0x22, 0x00 }, /* 22 */ | |
| 81 | + { 0x23, 0x00 }, /* 23 */ | |
| 82 | + { 0x24, 0x00 }, /* 24 */ | |
| 83 | + { 0x25, 0x00 }, /* 25 */ | |
| 84 | + { 0x26, 0x00 }, /* 26 */ | |
| 85 | + { 0x27, 0x00 }, /* 27 */ | |
| 86 | + { 0x28, 0x00 }, /* 28 */ | |
| 87 | + { 0x29, 0x00 }, /* 29 */ | |
| 88 | + { 0x2a, 0x00 }, /* 2A */ | |
| 89 | + { 0x2b, 0x00 }, /* 2B */ | |
| 90 | + { 0x2c, 0x00 }, /* 2C */ | |
| 91 | + { 0x2d, 0x00 }, /* 2D */ | |
| 92 | + { 0x2e, 0x00 }, /* 2E */ | |
| 93 | + { 0x2f, 0x00 }, /* 2F */ | |
| 94 | + { 0x30, 0x00 }, /* 30 */ | |
| 95 | + { 0x31, 0x00 }, /* 31 */ | |
| 96 | + { 0x32, 0x00 }, /* 32 */ | |
| 97 | + { 0x33, 0x00 }, /* 33 */ | |
| 98 | + { 0x34, 0x00 }, /* 34 */ | |
| 99 | + { 0x35, 0x00 }, /* 35 */ | |
| 100 | + { 0x36, 0x00 }, /* 36 */ | |
| 101 | + { 0x37, 0x00 }, /* 37 */ | |
| 102 | + { 0x38, 0x00 }, /* 38 */ | |
| 103 | + { 0x39, 0x00 }, /* 39 */ | |
| 104 | + { 0x3a, 0x00 }, /* 3A */ | |
| 105 | + { 0x3b, 0x00 }, /* 3B */ | |
| 106 | + { 0x3c, 0x00 }, /* 3C */ | |
| 107 | + { 0x3d, 0x00 }, /* 3D */ | |
| 108 | + { 0x3e, 0x00 }, /* 3E */ | |
| 109 | + { 0x3f, 0x00 }, /* 3F */ | |
| 110 | + { 0x40, 0x00 }, /* 40 */ | |
| 111 | + { 0x41, 0x00 }, /* 41 */ | |
| 112 | + { 0x42, 0x00 }, /* 42 */ | |
| 113 | + { 0x43, 0x00 }, /* 43 */ | |
| 114 | + { 0x44, 0x00 }, /* 44 */ | |
| 115 | + { 0x45, 0x00 }, /* 45 */ | |
| 116 | + { 0x46, 0x00 }, /* 46 */ | |
| 117 | + { 0x47, 0x00 }, /* 47 */ | |
| 118 | + { 0x48, 0x00 }, /* 48 */ | |
| 119 | + { 0x49, 0x00 }, /* 49 */ | |
| 120 | + { 0x4a, 0x00 }, /* 4A */ | |
| 121 | + { 0x4b, 0x00 }, /* 4B */ | |
| 122 | + { 0x4c, 0x00 }, /* 4C */ | |
| 123 | + { 0x4d, 0x00 }, /* 4D */ | |
| 124 | + { 0x4e, 0x00 }, /* 4E */ | |
| 125 | + { 0x4f, 0x00 }, /* 4F */ | |
| 126 | + { 0x50, 0x00 }, /* 50 */ | |
| 127 | + { 0x51, 0x00 }, /* 51 */ | |
| 128 | + { 0x52, 0x00 }, /* 52 */ | |
| 129 | + { 0x53, 0x00 }, /* 53 */ | |
| 130 | + { 0x54, 0x00 }, /* 54 */ | |
| 131 | + { 0x55, 0x00 }, /* 55 */ | |
| 132 | + { 0x56, 0x00 }, /* 56 */ | |
| 133 | + { 0x57, 0x00 }, /* 57 */ | |
| 134 | + { 0x58, 0x00 }, /* 58 */ | |
| 135 | + { 0x59, 0x00 }, /* 59 */ | |
| 136 | + { 0x5a, 0x00 }, /* 5A */ | |
| 137 | + { 0x5b, 0x00 }, /* 5B */ | |
| 138 | + { 0x5c, 0x00 }, /* 5C */ | |
| 139 | + { 0x5d, 0x00 }, /* 5D */ | |
| 140 | + { 0x5e, 0x00 }, /* 5E */ | |
| 141 | + { 0x5f, 0x00 }, /* 5F */ | |
| 142 | + { 0x60, 0x00 }, /* 60 */ | |
| 143 | + { 0x61, 0x00 }, /* 61 */ | |
| 144 | + { 0x62, 0x00 }, /* 62 */ | |
| 145 | + { 0x63, 0x00 }, /* 63 */ | |
| 146 | + { 0x64, 0x00 }, /* 64 */ | |
| 147 | + { 0x65, 0x00 }, /* 65 */ | |
| 148 | + { 0x66, 0x00 }, /* 66 */ | |
| 149 | + { 0x67, 0x00 }, /* 67 */ | |
| 150 | + { 0x68, 0x00 }, /* 68 */ | |
| 151 | + { 0x69, 0x00 }, /* 69 */ | |
| 152 | + { 0x6a, 0x00 }, /* 6A */ | |
| 153 | + { 0x6b, 0x00 }, /* 6B */ | |
| 154 | + { 0x6c, 0x00 }, /* 6C */ | |
| 155 | + { 0x6d, 0x00 }, /* 6D */ | |
| 156 | + { 0x6e, 0x00 }, /* 6E */ | |
| 157 | + { 0x6f, 0x00 }, /* 6F */ | |
| 158 | + { 0x70, 0x00 }, /* 70 */ | |
| 159 | + { 0x71, 0x00 }, /* 71 */ | |
| 160 | + { 0x72, 0x00 }, /* 72 */ | |
| 161 | + { 0x73, 0x00 }, /* 73 */ | |
| 162 | + { 0x74, 0x00 }, /* 74 */ | |
| 163 | + { 0x75, 0x00 }, /* 75 */ | |
| 164 | + { 0x76, 0x00 }, /* 76 */ | |
| 165 | + { 0x77, 0x00 }, /* 77 */ | |
| 166 | + { 0x78, 0x00 }, /* 78 */ | |
| 167 | + { 0x79, 0x00 }, /* 79 */ | |
| 168 | + { 0x7a, 0x00 }, /* 7A */ | |
| 169 | + { 0x7b, 0x00 }, /* 7B */ | |
| 170 | + { 0x7c, 0x00 }, /* 7C */ | |
| 171 | + { 0x7d, 0x00 }, /* 7D */ | |
| 172 | + { 0x7e, 0x00 }, /* 7E */ | |
| 173 | + { 0x7f, 0x00 }, /* 7F */ | |
| 174 | + { 0x80, 0x00 }, /* 80 */ | |
| 175 | + { 0x81, 0x00 }, /* 81 */ | |
| 176 | + { 0x82, 0x00 }, /* 82 */ | |
| 177 | + { 0x83, 0x00 }, /* 83 */ | |
| 178 | + { 0x84, 0x00 }, /* 84 */ | |
| 179 | + { 0x85, 0x00 }, /* 85 */ | |
| 180 | + { 0x86, 0x00 }, /* 86 */ | |
| 181 | + { 0x87, 0x00 }, /* 87 */ | |
| 182 | + { 0x88, 0x00 }, /* 88 */ | |
| 183 | + { 0x89, 0x00 }, /* 89 */ | |
| 184 | + { 0x8a, 0x00 }, /* 8A */ | |
| 185 | + { 0x8b, 0x00 }, /* 8B */ | |
| 186 | + { 0x8c, 0x00 }, /* 8C */ | |
| 187 | + { 0x8d, 0x00 }, /* 8D */ | |
| 188 | + { 0x8e, 0x00 }, /* 8E */ | |
| 189 | + { 0x8f, 0x00 }, /* 8F */ | |
| 190 | + { 0x90, 0x00 }, /* 90 */ | |
| 191 | + { 0x91, 0x00 }, /* 91 */ | |
| 192 | + { 0x92, 0x30 }, /* 92 */ | |
| 193 | + { 0x93, 0xF0 }, /* 93 */ | |
| 194 | + { 0x94, 0x00 }, /* 94 */ | |
| 195 | + { 0x95, 0x00 }, /* 95 */ | |
| 196 | + { 0x96, 0x3F }, /* 96 */ | |
| 197 | + { 0x97, 0x00 }, /* 97 */ | |
| 198 | + { 0xff, 0x00 }, /* FF */ | |
| 316 | 199 | }; |
| 317 | 200 | |
| 318 | 201 | static struct { |
| @@ -577,14 +460,14 @@ static struct { · 258 unmodified lines | ||
| 577 | 460 | { 0xFF, 0x00 }, /* FF */ |
| 578 | 461 | }; |
| 579 | 462 | |
| 580 | −static int max98095_readable(struct snd_soc_codec *codec, unsigned int reg) | |
| 463 | +static bool max98095_readable(struct device *dev, unsigned int reg) | |
| 581 | 464 | { |
| 582 | 465 | if (reg >= M98095_REG_CNT) |
| 583 | 466 | return 0; |
| 584 | 467 | return max98095_access[reg].readable != 0; |
| 585 | 468 | } |
| 586 | 469 | |
| 587 | −static int max98095_volatile(struct snd_soc_codec *codec, unsigned int reg) | |
| 470 | +static bool max98095_volatile(struct device *dev, unsigned int reg) | |
| 588 | 471 | { |
| 589 | 472 | if (reg > M98095_REG_MAX_CACHED) |
| 590 | 473 | return 1; |
| @@ -611,22 +494,18 @@ static int max98095_volatile(struct snd_soc_codec *codec, unsigned int reg) · 20 unmodified lines | ||
| 611 | 494 | return 0; |
| 612 | 495 | } |
| 613 | 496 | |
| 614 | −/* | |
| 615 | − * Filter coefficients are in a separate register segment | |
| 616 | − * and they share the address space of the normal registers. | |
| 617 | − * The coefficient registers do not need or share the cache. | |
| 618 | − */ | |
| 619 | −static int max98095_hw_write(struct snd_soc_codec *codec, unsigned int reg, | |
| 620 | − unsigned int value) | |
| 621 | −{ | |
| 622 | − int ret; | |
| 497 | +static const struct regmap_config max98095_regmap = { | |
| 498 | + .reg_bits = 8, | |
| 499 | + .val_bits = 8, | |
| 623 | 500 | |
| 624 | − codec->cache_bypass = 1; | |
| 625 | − ret = snd_soc_write(codec, reg, value); | |
| 626 | − codec->cache_bypass = 0; | |
| 501 | + .reg_defaults = max98095_reg_def, | |
| 502 | + .num_reg_defaults = ARRAY_SIZE(max98095_reg_def), | |
| 503 | + .max_register = M98095_0FF_REV_ID, | |
| 504 | + .cache_type = REGCACHE_RBTREE, | |
| 627 | 505 | |
| 628 | − return ret ? -EIO : 0; | |
| 629 | −} | |
| 506 | + .readable_reg = max98095_readable, | |
| 507 | + .volatile_reg = max98095_volatile, | |
| 508 | +}; | |
| 630 | 509 | |
| 631 | 510 | /* |
| 632 | 511 | * Load equalizer DSP coefficient configurations registers |
| @@ -637,8 +516,9 @@ static void m98095_eq_band(struct snd_soc_codec *codec, unsigned int dai, · 4 unmodified lines | ||
| 637 | 516 | unsigned int eq_reg; |
| 638 | 517 | unsigned int i; |
| 639 | 518 | |
| 640 | − BUG_ON(band > 4); | |
| 641 | − BUG_ON(dai > 1); | |
| 519 | + if (WARN_ON(band > 4) || | |
| 520 | + WARN_ON(dai > 1)) | |
| 521 | + return; | |
| 642 | 522 | |
| 643 | 523 | /* Load the base register address */ |
| 644 | 524 | eq_reg = dai ? M98095_142_DAI2_EQ_BASE : M98095_110_DAI1_EQ_BASE; |
| @@ -648,8 +528,8 @@ static void m98095_eq_band(struct snd_soc_codec *codec, unsigned int dai, · 3 unmodified lines | ||
| 648 | 528 | |
| 649 | 529 | /* Step through the registers and coefs */ |
| 650 | 530 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { |
| 651 | − max98095_hw_write(codec, eq_reg++, M98095_BYTE1(coefs[i])); | |
| 652 | − max98095_hw_write(codec, eq_reg++, M98095_BYTE0(coefs[i])); | |
| 531 | + snd_soc_write(codec, eq_reg++, M98095_BYTE1(coefs[i])); | |
| 532 | + snd_soc_write(codec, eq_reg++, M98095_BYTE0(coefs[i])); | |
| 653 | 533 | } |
| 654 | 534 | } |
| 655 | 535 | |
| @@ -662,8 +542,9 @@ static void m98095_biquad_band(struct snd_soc_codec *codec, unsigned int dai, · 6 unmodified lines | ||
| 662 | 542 | unsigned int bq_reg; |
| 663 | 543 | unsigned int i; |
| 664 | 544 | |
| 665 | − BUG_ON(band > 1); | |
| 666 | − BUG_ON(dai > 1); | |
| 545 | + if (WARN_ON(band > 1) || | |
| 546 | + WARN_ON(dai > 1)) | |
| 547 | + return; | |
| 667 | 548 | |
| 668 | 549 | /* Load the base register address */ |
| 669 | 550 | bq_reg = dai ? M98095_17E_DAI2_BQ_BASE : M98095_174_DAI1_BQ_BASE; |
| @@ -673,8 +554,8 @@ static void m98095_biquad_band(struct snd_soc_codec *codec, unsigned int dai, · 3 unmodified lines | ||
| 673 | 554 | |
| 674 | 555 | /* Step through the registers and coefs */ |
| 675 | 556 | for (i = 0; i < M98095_COEFS_PER_BAND; i++) { |
| 676 | − max98095_hw_write(codec, bq_reg++, M98095_BYTE1(coefs[i])); | |
| 677 | − max98095_hw_write(codec, bq_reg++, M98095_BYTE0(coefs[i])); | |
| 557 | + snd_soc_write(codec, bq_reg++, M98095_BYTE1(coefs[i])); | |
| 558 | + snd_soc_write(codec, bq_reg++, M98095_BYTE0(coefs[i])); | |
| 678 | 559 | } |
| 679 | 560 | } |
| 680 | 561 | |
| @@ -1011,7 +892,8 @@ static int max98095_line_pga(struct snd_soc_dapm_widget *w, · 330 unmodified lines | ||
| 1011 | 892 | struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); |
| 1012 | 893 | u8 *state; |
| 1013 | 894 | |
| 1014 | − BUG_ON(!((channel == 1) || (channel == 2))); | |
| 895 | + if (WARN_ON(!(channel == 1 || channel == 2))) | |
| 896 | + return -EINVAL; | |
| 1015 | 897 | |
| 1016 | 898 | state = &max98095->lin_state; |
| 1017 | 899 | |
| @@ -1285,14 +1167,6 @@ static const struct snd_soc_dapm_route max98095_audio_map[] = { · 267 unmodified lines | ||
| 1285 | 1167 | {"MIC2 Input", NULL, "MIC2"}, |
| 1286 | 1168 | }; |
| 1287 | 1169 | |
| 1288 | −static int max98095_add_widgets(struct snd_soc_codec *codec) | |
| 1289 | −{ | |
| 1290 | − snd_soc_add_codec_controls(codec, max98095_snd_controls, | |
| 1291 | − ARRAY_SIZE(max98095_snd_controls)); | |
| 1292 | − | |
| 1293 | − return 0; | |
| 1294 | −} | |
| 1295 | − | |
| 1296 | 1170 | /* codec mclk clock divider coefficients */ |
| 1297 | 1171 | static const struct { |
| 1298 | 1172 | u32 rate; |
| @@ -1748,6 +1622,7 @@ static int max98095_dai3_set_fmt(struct snd_soc_dai *codec_dai, · 449 unmodified lines | ||
| 1748 | 1622 | static int max98095_set_bias_level(struct snd_soc_codec *codec, |
| 1749 | 1623 | enum snd_soc_bias_level level) |
| 1750 | 1624 | { |
| 1625 | + struct max98095_priv *max98095 = snd_soc_codec_get_drvdata(codec); | |
| 1751 | 1626 | int ret; |
| 1752 | 1627 | |
| 1753 | 1628 | switch (level) { |
| @@ -1759,7 +1634,7 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec, · 5 unmodified lines | ||
| 1759 | 1634 | |
| 1760 | 1635 | case SND_SOC_BIAS_STANDBY: |
| 1761 | 1636 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
| 1762 | − ret = snd_soc_cache_sync(codec); | |
| 1637 | + ret = regcache_sync(max98095->regmap); | |
| 1763 | 1638 | |
| 1764 | 1639 | if (ret != 0) { |
| 1765 | 1640 | dev_err(codec->dev, "Failed to sync cache: %d\n", ret); |
| @@ -1774,7 +1649,7 @@ static int max98095_set_bias_level(struct snd_soc_codec *codec, · 8 unmodified lines | ||
| 1774 | 1649 | case SND_SOC_BIAS_OFF: |
| 1775 | 1650 | snd_soc_update_bits(codec, M98095_090_PWR_EN_IN, |
| 1776 | 1651 | M98095_MBEN, 0); |
| 1777 | − codec->cache_sync = 1; | |
| 1652 | + regcache_mark_dirty(max98095->regmap); | |
| 1778 | 1653 | break; |
| 1779 | 1654 | } |
| 1780 | 1655 | codec->dapm.bias_level = level; |
| @@ -1868,7 +1743,8 @@ static int max98095_put_eq_enum(struct snd_kcontrol *kcontrol, · 87 unmodified lines | ||
| 1868 | 1743 | int fs, best, best_val, i; |
| 1869 | 1744 | int regmask, regsave; |
| 1870 | 1745 | |
| 1871 | − BUG_ON(channel > 1); | |
| 1746 | + if (WARN_ON(channel > 1)) | |
| 1747 | + return -EINVAL; | |
| 1872 | 1748 | |
| 1873 | 1749 | if (!pdata || !max98095->eq_textcnt) |
| 1874 | 1750 | return 0; |
| @@ -2341,7 +2217,7 @@ static int max98095_reset(struct snd_soc_codec *codec) · 466 unmodified lines | ||
| 2341 | 2217 | /* Reset to hardware default for registers, as there is not |
| 2342 | 2218 | * a soft reset hardware control register */ |
| 2343 | 2219 | for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) { |
| 2344 | − ret = snd_soc_write(codec, i, max98095_reg_def[i]); | |
| 2220 | + ret = snd_soc_write(codec, i, snd_soc_read(codec, i)); | |
| 2345 | 2221 | if (ret < 0) { |
| 2346 | 2222 | dev_err(codec->dev, "Failed to reset: %d\n", ret); |
| 2347 | 2223 | return ret; |
| @@ -2358,7 +2234,7 @@ static int max98095_probe(struct snd_soc_codec *codec) · 10 unmodified lines | ||
| 2358 | 2234 | struct i2c_client *client; |
| 2359 | 2235 | int ret = 0; |
| 2360 | 2236 | |
| 2361 | − ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | |
| 2237 | + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); | |
| 2362 | 2238 | if (ret != 0) { |
| 2363 | 2239 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 2364 | 2240 | return ret; |
| @@ -2447,8 +2323,6 @@ static int max98095_probe(struct snd_soc_codec *codec) · 82 unmodified lines | ||
| 2447 | 2323 | snd_soc_update_bits(codec, M98095_097_PWR_SYS, M98095_SHDNRUN, |
| 2448 | 2324 | M98095_SHDNRUN); |
| 2449 | 2325 | |
| 2450 | − max98095_add_widgets(codec); | |
| 2451 | − | |
| 2452 | 2326 | return 0; |
| 2453 | 2327 | |
| 2454 | 2328 | err_irq: |
| @@ -2480,11 +2354,8 @@ static struct snd_soc_codec_driver soc_codec_dev_max98095 = { · 25 unmodified lines | ||
| 2480 | 2354 | .suspend = max98095_suspend, |
| 2481 | 2355 | .resume = max98095_resume, |
| 2482 | 2356 | .set_bias_level = max98095_set_bias_level, |
| 2483 | − .reg_cache_size = ARRAY_SIZE(max98095_reg_def), | |
| 2484 | − .reg_word_size = sizeof(u8), | |
| 2485 | − .reg_cache_default = max98095_reg_def, | |
| 2486 | − .readable_register = max98095_readable, | |
| 2487 | − .volatile_register = max98095_volatile, | |
| 2357 | + .controls = max98095_snd_controls, | |
| 2358 | + .num_controls = ARRAY_SIZE(max98095_snd_controls), | |
| 2488 | 2359 | .dapm_widgets = max98095_dapm_widgets, |
| 2489 | 2360 | .num_dapm_widgets = ARRAY_SIZE(max98095_dapm_widgets), |
| 2490 | 2361 | .dapm_routes = max98095_audio_map, |
| @@ -2502,6 +2373,13 @@ static int max98095_i2c_probe(struct i2c_client *i2c, · 11 unmodified lines | ||
| 2502 | 2373 | if (max98095 == NULL) |
| 2503 | 2374 | return -ENOMEM; |
| 2504 | 2375 | |
| 2376 | + max98095->regmap = devm_regmap_init_i2c(i2c, &max98095_regmap); | |
| 2377 | + if (IS_ERR(max98095->regmap)) { | |
| 2378 | + ret = PTR_ERR(max98095->regmap); | |
| 2379 | + dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret); | |
| 2380 | + return ret; | |
| 2381 | + } | |
| 2382 | + | |
| 2505 | 2383 | max98095->devtype = id->driver_data; |
| 2506 | 2384 | i2c_set_clientdata(i2c, max98095); |
| 2507 | 2385 | max98095->pdata = i2c->dev.platform_data; |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/module.h> |
| 19 | 19 | #include <linux/init.h> |
| 20 | 20 | #include <linux/i2c.h> |
| 21 | +#include <linux/regmap.h> | |
| 21 | 22 | #include <linux/slab.h> |
| 22 | 23 | #include <sound/pcm.h> |
| 23 | 24 | #include <sound/pcm_params.h> |
| @@ -27,18 +28,26 @@ · 3 unmodified lines | ||
| 27 | 28 | #include "max9850.h" |
| 28 | 29 | |
| 29 | 30 | struct max9850_priv { |
| 31 | + struct regmap *regmap; | |
| 30 | 32 | unsigned int sysclk; |
| 31 | 33 | }; |
| 32 | 34 | |
| 33 | 35 | /* max9850 register cache */ |
| 34 | −static const u8 max9850_reg[MAX9850_CACHEREGNUM] = { | |
| 35 | − 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 | |
| 36 | +static const struct reg_default max9850_reg[] = { | |
| 37 | + { 2, 0x0c }, | |
| 38 | + { 3, 0x00 }, | |
| 39 | + { 4, 0x00 }, | |
| 40 | + { 5, 0x00 }, | |
| 41 | + { 6, 0x00 }, | |
| 42 | + { 7, 0x00 }, | |
| 43 | + { 8, 0x00 }, | |
| 44 | + { 9, 0x00 }, | |
| 45 | + { 10, 0x00 }, | |
| 36 | 46 | }; |
| 37 | 47 | |
| 38 | 48 | /* these registers are not used at the moment but provided for the sake of |
| 39 | 49 | * completeness */ |
| 40 | −static int max9850_volatile_register(struct snd_soc_codec *codec, | |
| 41 | − unsigned int reg) | |
| 50 | +static bool max9850_volatile_register(struct device *dev, unsigned int reg) | |
| 42 | 51 | { |
| 43 | 52 | switch (reg) { |
| 44 | 53 | case MAX9850_STATUSA: |
| @@ -49,6 +58,15 @@ static int max9850_volatile_register(struct snd_soc_codec *codec, · 4 unmodified lines | ||
| 49 | 58 | } |
| 50 | 59 | } |
| 51 | 60 | |
| 61 | +static const struct regmap_config max9850_regmap = { | |
| 62 | + .reg_bits = 8, | |
| 63 | + .val_bits = 8, | |
| 64 | + | |
| 65 | + .max_register = MAX9850_DIGITAL_AUDIO, | |
| 66 | + .volatile_reg = max9850_volatile_register, | |
| 67 | + .cache_type = REGCACHE_RBTREE, | |
| 68 | +}; | |
| 69 | + | |
| 52 | 70 | static const unsigned int max9850_tlv[] = { |
| 53 | 71 | TLV_DB_RANGE_HEAD(4), |
| 54 | 72 | 0x18, 0x1f, TLV_DB_SCALE_ITEM(-7450, 400, 0), |
| @@ -225,6 +243,7 @@ static int max9850_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) · 170 unmodified lines | ||
| 225 | 243 | static int max9850_set_bias_level(struct snd_soc_codec *codec, |
| 226 | 244 | enum snd_soc_bias_level level) |
| 227 | 245 | { |
| 246 | + struct max9850_priv *max9850 = snd_soc_codec_get_drvdata(codec); | |
| 228 | 247 | int ret; |
| 229 | 248 | |
| 230 | 249 | switch (level) { |
| @@ -234,7 +253,7 @@ static int max9850_set_bias_level(struct snd_soc_codec *codec, · 3 unmodified lines | ||
| 234 | 253 | break; |
| 235 | 254 | case SND_SOC_BIAS_STANDBY: |
| 236 | 255 | if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { |
| 237 | − ret = snd_soc_cache_sync(codec); | |
| 256 | + ret = regcache_sync(max9850->regmap); | |
| 238 | 257 | if (ret) { |
| 239 | 258 | dev_err(codec->dev, |
| 240 | 259 | "Failed to sync cache: %d\n", ret); |
| @@ -295,7 +314,7 @@ static int max9850_probe(struct snd_soc_codec *codec) · 54 unmodified lines | ||
| 295 | 314 | { |
| 296 | 315 | int ret; |
| 297 | 316 | |
| 298 | − ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C); | |
| 317 | + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); | |
| 299 | 318 | if (ret < 0) { |
| 300 | 319 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 301 | 320 | return ret; |
| @@ -316,10 +335,6 @@ static struct snd_soc_codec_driver soc_codec_dev_max9850 = { · 14 unmodified lines | ||
| 316 | 335 | .suspend = max9850_suspend, |
| 317 | 336 | .resume = max9850_resume, |
| 318 | 337 | .set_bias_level = max9850_set_bias_level, |
| 319 | − .reg_cache_size = ARRAY_SIZE(max9850_reg), | |
| 320 | − .reg_word_size = sizeof(u8), | |
| 321 | − .reg_cache_default = max9850_reg, | |
| 322 | − .volatile_register = max9850_volatile_register, | |
| 323 | 338 | |
| 324 | 339 | .controls = max9850_controls, |
| 325 | 340 | .num_controls = ARRAY_SIZE(max9850_controls), |
| @@ -340,6 +355,10 @@ static int max9850_i2c_probe(struct i2c_client *i2c, · 14 unmodified lines | ||
| 340 | 355 | if (max9850 == NULL) |
| 341 | 356 | return -ENOMEM; |
| 342 | 357 | |
| 358 | + max9850->regmap = devm_regmap_init_i2c(i2c, &max9850_regmap); | |
| 359 | + if (IS_ERR(max9850->regmap)) | |
| 360 | + return PTR_ERR(max9850->regmap); | |
| 361 | + | |
| 343 | 362 | i2c_set_clientdata(i2c, max9850); |
| 344 | 363 | |
| 345 | 364 | ret = snd_soc_register_codec(&i2c->dev, |
| @@ -30,16 +30,10 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <sound/soc.h> |
| 31 | 31 | #include <sound/initval.h> |
| 32 | 32 | #include <sound/soc-dapm.h> |
| 33 | +#include <linux/regmap.h> | |
| 33 | 34 | |
| 34 | 35 | #include "mc13783.h" |
| 35 | 36 | |
| 36 | −#define MC13783_AUDIO_RX0 36 | |
| 37 | −#define MC13783_AUDIO_RX1 37 | |
| 38 | −#define MC13783_AUDIO_TX 38 | |
| 39 | −#define MC13783_SSI_NETWORK 39 | |
| 40 | −#define MC13783_AUDIO_CODEC 40 | |
| 41 | −#define MC13783_AUDIO_DAC 41 | |
| 42 | − | |
| 43 | 37 | #define AUDIO_RX0_ALSPEN (1 << 5) |
| 44 | 38 | #define AUDIO_RX0_ALSPSEL (1 << 7) |
| 45 | 39 | #define AUDIO_RX0_ADDCDC (1 << 21) |
| @@ -95,45 +89,12 @@ · 49 unmodified lines | ||
| 95 | 89 | |
| 96 | 90 | struct mc13783_priv { |
| 97 | 91 | struct mc13xxx *mc13xxx; |
| 92 | + struct regmap *regmap; | |
| 98 | 93 | |
| 99 | 94 | enum mc13783_ssi_port adc_ssi_port; |
| 100 | 95 | enum mc13783_ssi_port dac_ssi_port; |
| 101 | 96 | }; |
| 102 | 97 | |
| 103 | −static unsigned int mc13783_read(struct snd_soc_codec *codec, | |
| 104 | − unsigned int reg) | |
| 105 | −{ | |
| 106 | − struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); | |
| 107 | − unsigned int value = 0; | |
| 108 | − | |
| 109 | − mc13xxx_lock(priv->mc13xxx); | |
| 110 | − | |
| 111 | − mc13xxx_reg_read(priv->mc13xxx, reg, &value); | |
| 112 | − | |
| 113 | − mc13xxx_unlock(priv->mc13xxx); | |
| 114 | − | |
| 115 | − return value; | |
| 116 | −} | |
| 117 | − | |
| 118 | −static int mc13783_write(struct snd_soc_codec *codec, | |
| 119 | − unsigned int reg, unsigned int value) | |
| 120 | −{ | |
| 121 | − struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); | |
| 122 | − int ret; | |
| 123 | − | |
| 124 | − mc13xxx_lock(priv->mc13xxx); | |
| 125 | − | |
| 126 | − ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); | |
| 127 | − | |
| 128 | − /* include errata fix for spi audio problems */ | |
| 129 | − if (reg == MC13783_AUDIO_CODEC || reg == MC13783_AUDIO_DAC) | |
| 130 | − ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); | |
| 131 | − | |
| 132 | − mc13xxx_unlock(priv->mc13xxx); | |
| 133 | − | |
| 134 | − return ret; | |
| 135 | −} | |
| 136 | − | |
| 137 | 98 | /* Mapping between sample rates and register value */ |
| 138 | 99 | static unsigned int mc13783_rates[] = { |
| 139 | 100 | 8000, 11025, 12000, 16000, |
| @@ -382,7 +343,7 @@ static int mc13783_set_tdm_slot_dac(struct snd_soc_dai *dai, · 242 unmodified lines | ||
| 382 | 343 | break; |
| 383 | 344 | default: |
| 384 | 345 | return -EINVAL; |
| 385 | − }; | |
| 346 | + } | |
| 386 | 347 | |
| 387 | 348 | snd_soc_update_bits(codec, MC13783_SSI_NETWORK, mask, val); |
| 388 | 349 | |
| @@ -466,6 +427,29 @@ static const struct snd_kcontrol_new right_input_mux = · 77 unmodified lines | ||
| 466 | 427 | static const struct snd_kcontrol_new samp_ctl = |
| 467 | 428 | SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 3, 1, 0); |
| 468 | 429 | |
| 430 | +static const char * const speaker_amp_source_text[] = { | |
| 431 | + "CODEC", "Right" | |
| 432 | +}; | |
| 433 | +static const SOC_ENUM_SINGLE_DECL(speaker_amp_source, MC13783_AUDIO_RX0, 4, | |
| 434 | + speaker_amp_source_text); | |
| 435 | +static const struct snd_kcontrol_new speaker_amp_source_mux = | |
| 436 | + SOC_DAPM_ENUM("Speaker Amp Source MUX", speaker_amp_source); | |
| 437 | + | |
| 438 | +static const char * const headset_amp_source_text[] = { | |
| 439 | + "CODEC", "Mixer" | |
| 440 | +}; | |
| 441 | + | |
| 442 | +static const SOC_ENUM_SINGLE_DECL(headset_amp_source, MC13783_AUDIO_RX0, 11, | |
| 443 | + headset_amp_source_text); | |
| 444 | +static const struct snd_kcontrol_new headset_amp_source_mux = | |
| 445 | + SOC_DAPM_ENUM("Headset Amp Source MUX", headset_amp_source); | |
| 446 | + | |
| 447 | +static const struct snd_kcontrol_new cdcout_ctl = | |
| 448 | + SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 18, 1, 0); | |
| 449 | + | |
| 450 | +static const struct snd_kcontrol_new adc_bypass_ctl = | |
| 451 | + SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_CODEC, 16, 1, 0); | |
| 452 | + | |
| 469 | 453 | static const struct snd_kcontrol_new lamp_ctl = |
| 470 | 454 | SOC_DAPM_SINGLE("Switch", MC13783_AUDIO_RX0, 5, 1, 0); |
| 471 | 455 | |
| @@ -503,12 +487,22 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { · 31 unmodified lines | ||
| 503 | 487 | SND_SOC_DAPM_VIRT_MUX("PGA Right Input Mux", SND_SOC_NOPM, 0, 0, |
| 504 | 488 | &right_input_mux), |
| 505 | 489 | |
| 490 | + SND_SOC_DAPM_MUX("Speaker Amp Source MUX", SND_SOC_NOPM, 0, 0, | |
| 491 | + &speaker_amp_source_mux), | |
| 492 | + | |
| 493 | + SND_SOC_DAPM_MUX("Headset Amp Source MUX", SND_SOC_NOPM, 0, 0, | |
| 494 | + &headset_amp_source_mux), | |
| 495 | + | |
| 506 | 496 | SND_SOC_DAPM_PGA("PGA Left Input", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 507 | 497 | SND_SOC_DAPM_PGA("PGA Right Input", SND_SOC_NOPM, 0, 0, NULL, 0), |
| 508 | 498 | |
| 509 | 499 | SND_SOC_DAPM_ADC("ADC", "Capture", MC13783_AUDIO_CODEC, 11, 0), |
| 510 | 500 | SND_SOC_DAPM_SUPPLY("ADC_Reset", MC13783_AUDIO_CODEC, 15, 0, NULL, 0), |
| 511 | 501 | |
| 502 | + SND_SOC_DAPM_PGA("Voice CODEC PGA", MC13783_AUDIO_RX1, 0, 0, NULL, 0), | |
| 503 | + SND_SOC_DAPM_SWITCH("Voice CODEC Bypass", MC13783_AUDIO_CODEC, 16, 0, | |
| 504 | + &adc_bypass_ctl), | |
| 505 | + | |
| 512 | 506 | /* Output */ |
| 513 | 507 | SND_SOC_DAPM_SUPPLY("DAC_E", MC13783_AUDIO_DAC, 11, 0, NULL, 0), |
| 514 | 508 | SND_SOC_DAPM_SUPPLY("DAC_Reset", MC13783_AUDIO_DAC, 15, 0, NULL, 0), |
| @@ -516,10 +510,15 @@ static const struct snd_soc_dapm_widget mc13783_dapm_widgets[] = { · 1 unmodified line | ||
| 516 | 510 | SND_SOC_DAPM_OUTPUT("RXOUTR"), |
| 517 | 511 | SND_SOC_DAPM_OUTPUT("HSL"), |
| 518 | 512 | SND_SOC_DAPM_OUTPUT("HSR"), |
| 513 | + SND_SOC_DAPM_OUTPUT("LSPL"), | |
| 519 | 514 | SND_SOC_DAPM_OUTPUT("LSP"), |
| 520 | 515 | SND_SOC_DAPM_OUTPUT("SP"), |
| 516 | + SND_SOC_DAPM_OUTPUT("CDCOUT"), | |
| 521 | 517 | |
| 522 | − SND_SOC_DAPM_SWITCH("Speaker Amp", MC13783_AUDIO_RX0, 3, 0, &samp_ctl), | |
| 518 | + SND_SOC_DAPM_SWITCH("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 0, | |
| 519 | + &cdcout_ctl), | |
| 520 | + SND_SOC_DAPM_SWITCH("Speaker Amp Switch", MC13783_AUDIO_RX0, 3, 0, | |
| 521 | + &samp_ctl), | |
| 523 | 522 | SND_SOC_DAPM_SWITCH("Loudspeaker Amp", SND_SOC_NOPM, 0, 0, &lamp_ctl), |
| 524 | 523 | SND_SOC_DAPM_SWITCH("Headset Amp Left", MC13783_AUDIO_RX0, 10, 0, |
| 525 | 524 | &hlamp_ctl), |
| @@ -554,20 +553,28 @@ static struct snd_soc_dapm_route mc13783_routes[] = { · 28 unmodified lines | ||
| 554 | 553 | { "ADC", NULL, "PGA Right Input"}, |
| 555 | 554 | { "ADC", NULL, "ADC_Reset"}, |
| 556 | 555 | |
| 556 | + { "Voice CODEC PGA", "Voice CODEC Bypass", "ADC" }, | |
| 557 | + | |
| 558 | + { "Speaker Amp Source MUX", "CODEC", "Voice CODEC PGA"}, | |
| 559 | + { "Speaker Amp Source MUX", "Right", "DAC PGA"}, | |
| 560 | + | |
| 561 | + { "Headset Amp Source MUX", "CODEC", "Voice CODEC PGA"}, | |
| 562 | + { "Headset Amp Source MUX", "Mixer", "DAC PGA"}, | |
| 563 | + | |
| 557 | 564 | /* Output */ |
| 558 | 565 | { "HSL", NULL, "Headset Amp Left" }, |
| 559 | 566 | { "HSR", NULL, "Headset Amp Right"}, |
| 560 | 567 | { "RXOUTL", NULL, "Line out Amp Left"}, |
| 561 | 568 | { "RXOUTR", NULL, "Line out Amp Right"}, |
| 562 | − { "SP", NULL, "Speaker Amp"}, | |
| 563 | − { "Speaker Amp", NULL, "DAC PGA"}, | |
| 564 | − { "LSP", NULL, "DAC PGA"}, | |
| 565 | − { "Headset Amp Left", NULL, "DAC PGA"}, | |
| 566 | − { "Headset Amp Right", NULL, "DAC PGA"}, | |
| 569 | + { "SP", "Speaker Amp Switch", "Speaker Amp Source MUX"}, | |
| 570 | + { "LSP", "Loudspeaker Amp", "Speaker Amp Source MUX"}, | |
| 571 | + { "HSL", "Headset Amp Left", "Headset Amp Source MUX"}, | |
| 572 | + { "HSR", "Headset Amp Right", "Headset Amp Source MUX"}, | |
| 567 | 573 | { "Line out Amp Left", NULL, "DAC PGA"}, |
| 568 | 574 | { "Line out Amp Right", NULL, "DAC PGA"}, |
| 569 | 575 | { "DAC PGA", NULL, "DAC"}, |
| 570 | 576 | { "DAC", NULL, "DAC_E"}, |
| 577 | + { "CDCOUT", "CDCOUT Switch", "Voice CODEC PGA"}, | |
| 571 | 578 | }; |
| 572 | 579 | |
| 573 | 580 | static const char * const mc13783_3d_mixer[] = {"Stereo", "Phase Mix", |
| @@ -580,15 +587,39 @@ static const struct soc_enum mc13783_enum_3d_mixer = · 6 unmodified lines | ||
| 580 | 587 | static struct snd_kcontrol_new mc13783_control_list[] = { |
| 581 | 588 | SOC_SINGLE("Loudspeaker enable", MC13783_AUDIO_RX0, 5, 1, 0), |
| 582 | 589 | SOC_SINGLE("PCM Playback Volume", MC13783_AUDIO_RX1, 6, 15, 0), |
| 590 | + SOC_SINGLE("PCM Playback Switch", MC13783_AUDIO_RX1, 5, 1, 0), | |
| 583 | 591 | SOC_DOUBLE("PCM Capture Volume", MC13783_AUDIO_TX, 19, 14, 31, 0), |
| 584 | 592 | SOC_ENUM("3D Control", mc13783_enum_3d_mixer), |
| 593 | + | |
| 594 | + SOC_SINGLE("CDCOUT Switch", MC13783_AUDIO_RX0, 18, 1, 0), | |
| 595 | + SOC_SINGLE("Earpiece Amp Switch", MC13783_AUDIO_RX0, 3, 1, 0), | |
| 596 | + SOC_DOUBLE("Headset Amp Switch", MC13783_AUDIO_RX0, 10, 9, 1, 0), | |
| 597 | + SOC_DOUBLE("Line out Amp Switch", MC13783_AUDIO_RX0, 16, 15, 1, 0), | |
| 598 | + | |
| 599 | + SOC_SINGLE("PCM Capture Mixin Switch", MC13783_AUDIO_RX0, 22, 1, 0), | |
| 600 | + SOC_SINGLE("Line in Capture Mixin Switch", MC13783_AUDIO_RX0, 23, 1, 0), | |
| 601 | + | |
| 602 | + SOC_SINGLE("CODEC Capture Volume", MC13783_AUDIO_RX1, 1, 15, 0), | |
| 603 | + SOC_SINGLE("CODEC Capture Mixin Switch", MC13783_AUDIO_RX0, 21, 1, 0), | |
| 604 | + | |
| 605 | + SOC_SINGLE("Line in Capture Volume", MC13783_AUDIO_RX1, 12, 15, 0), | |
| 606 | + SOC_SINGLE("Line in Capture Switch", MC13783_AUDIO_RX1, 10, 1, 0), | |
| 607 | + | |
| 608 | + SOC_SINGLE("MC1 Capture Bias Switch", MC13783_AUDIO_TX, 0, 1, 0), | |
| 609 | + SOC_SINGLE("MC2 Capture Bias Switch", MC13783_AUDIO_TX, 1, 1, 0), | |
| 585 | 610 | }; |
| 586 | 611 | |
| 587 | 612 | static int mc13783_probe(struct snd_soc_codec *codec) |
| 588 | 613 | { |
| 589 | 614 | struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); |
| 615 | + int ret; | |
| 590 | 616 | |
| 591 | − mc13xxx_lock(priv->mc13xxx); | |
| 617 | + codec->control_data = dev_get_regmap(codec->dev->parent, NULL); | |
| 618 | + ret = snd_soc_codec_set_cache_io(codec, 8, 24, SND_SOC_REGMAP); | |
| 619 | + if (ret != 0) { | |
| 620 | + dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); | |
| 621 | + return ret; | |
| 622 | + } | |
| 592 | 623 | |
| 593 | 624 | /* these are the reset values */ |
| 594 | 625 | mc13xxx_reg_write(priv->mc13xxx, MC13783_AUDIO_RX0, 0x25893); |
| @@ -612,8 +643,6 @@ static int mc13783_probe(struct snd_soc_codec *codec) · 17 unmodified lines | ||
| 612 | 643 | mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_DAC, |
| 613 | 644 | 0, AUDIO_SSI_SEL); |
| 614 | 645 | |
| 615 | − mc13xxx_unlock(priv->mc13xxx); | |
| 616 | − | |
| 617 | 646 | return 0; |
| 618 | 647 | } |
| 619 | 648 | |
| @@ -621,13 +650,9 @@ static int mc13783_remove(struct snd_soc_codec *codec) · 1 unmodified line | ||
| 621 | 650 | { |
| 622 | 651 | struct mc13783_priv *priv = snd_soc_codec_get_drvdata(codec); |
| 623 | 652 | |
| 624 | − mc13xxx_lock(priv->mc13xxx); | |
| 625 | − | |
| 626 | 653 | /* Make sure VAUDIOON is off */ |
| 627 | 654 | mc13xxx_reg_rmw(priv->mc13xxx, MC13783_AUDIO_RX0, 0x3, 0); |
| 628 | 655 | |
| 629 | − mc13xxx_unlock(priv->mc13xxx); | |
| 630 | − | |
| 631 | 656 | return 0; |
| 632 | 657 | } |
| 633 | 658 | |
| @@ -717,8 +742,6 @@ static struct snd_soc_dai_driver mc13783_dai_sync[] = { · 83 unmodified lines | ||
| 717 | 742 | static struct snd_soc_codec_driver soc_codec_dev_mc13783 = { |
| 718 | 743 | .probe = mc13783_probe, |
| 719 | 744 | .remove = mc13783_remove, |
| 720 | − .read = mc13783_read, | |
| 721 | − .write = mc13783_write, | |
| 722 | 745 | .controls = mc13783_control_list, |
| 723 | 746 | .num_controls = ARRAY_SIZE(mc13783_control_list), |
| 724 | 747 | .dapm_widgets = mc13783_dapm_widgets, |
| @@ -342,6 +342,8 @@ static int ml26124_hw_params(struct snd_pcm_substream *substream, · 341 unmodified lines | ||
| 342 | 342 | struct ml26124_priv *priv = snd_soc_codec_get_drvdata(codec); |
| 343 | 343 | int i = get_coeff(priv->mclk, params_rate(hw_params)); |
| 344 | 344 | |
| 345 | + if (i < 0) | |
| 346 | + return i; | |
| 345 | 347 | priv->substream = substream; |
| 346 | 348 | priv->rate = params_rate(hw_params); |
| 347 | 349 | |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/gpio.h> |
| 22 | 22 | #include <linux/i2c.h> |
| 23 | 23 | #include <linux/regmap.h> |
| 24 | +#include <linux/of.h> | |
| 24 | 25 | #include <linux/of_device.h> |
| 25 | 26 | #include <linux/of_gpio.h> |
| 26 | 27 | #include <sound/pcm.h> |
| @@ -28,6 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <sound/initval.h> |
| 29 | 29 | #include <sound/soc.h> |
| 30 | 30 | #include <sound/tlv.h> |
| 31 | +#include <linux/of.h> | |
| 31 | 32 | #include <linux/of_device.h> |
| 32 | 33 | |
| 33 | 34 | #include "pcm1792a.h" |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/of_gpio.h> |
| 22 | 22 | #include <linux/platform_device.h> |
| 23 | 23 | #include <linux/spi/spi.h> |
| 24 | +#include <linux/acpi.h> | |
| 24 | 25 | #include <sound/core.h> |
| 25 | 26 | #include <sound/pcm.h> |
| 26 | 27 | #include <sound/pcm_params.h> |
| @@ -926,7 +927,7 @@ static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w, · 899 unmodified lines | ||
| 926 | 927 | return 0; |
| 927 | 928 | } |
| 928 | 929 | |
| 929 | −void hp_amp_power_on(struct snd_soc_codec *codec) | |
| 930 | +static void hp_amp_power_on(struct snd_soc_codec *codec) | |
| 930 | 931 | { |
| 931 | 932 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); |
| 932 | 933 | |
| @@ -1603,13 +1604,14 @@ static int rt5640_hw_params(struct snd_pcm_substream *substream, · 670 unmodified lines | ||
| 1603 | 1604 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 1604 | 1605 | struct snd_soc_codec *codec = rtd->codec; |
| 1605 | 1606 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); |
| 1606 | − unsigned int val_len = 0, val_clk, mask_clk, dai_sel; | |
| 1607 | − int pre_div, bclk_ms, frame_size; | |
| 1607 | + unsigned int val_len = 0, val_clk, mask_clk; | |
| 1608 | + int dai_sel, pre_div, bclk_ms, frame_size; | |
| 1608 | 1609 | |
| 1609 | 1610 | rt5640->lrck[dai->id] = params_rate(params); |
| 1610 | 1611 | pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]); |
| 1611 | 1612 | if (pre_div < 0) { |
| 1612 | − dev_err(codec->dev, "Unsupported clock setting\n"); | |
| 1613 | + dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n", | |
| 1614 | + rt5640->lrck[dai->id], dai->id); | |
| 1613 | 1615 | return -EINVAL; |
| 1614 | 1616 | } |
| 1615 | 1617 | frame_size = snd_soc_params_to_frame_size(params); |
| @@ -1673,7 +1675,8 @@ static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 57 unmodified lines | ||
| 1673 | 1675 | { |
| 1674 | 1676 | struct snd_soc_codec *codec = dai->codec; |
| 1675 | 1677 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); |
| 1676 | − unsigned int reg_val = 0, dai_sel; | |
| 1678 | + unsigned int reg_val = 0; | |
| 1679 | + int dai_sel; | |
| 1677 | 1680 | |
| 1678 | 1681 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 1679 | 1682 | case SND_SOC_DAIFMT_CBM_CFM: |
| @@ -1977,13 +1980,20 @@ static int rt5640_suspend(struct snd_soc_codec *codec) · 297 unmodified lines | ||
| 1977 | 1980 | rt5640_reset(codec); |
| 1978 | 1981 | regcache_cache_only(rt5640->regmap, true); |
| 1979 | 1982 | regcache_mark_dirty(rt5640->regmap); |
| 1983 | + if (gpio_is_valid(rt5640->pdata.ldo1_en)) | |
| 1984 | + gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0); | |
| 1980 | 1985 | |
| 1981 | 1986 | return 0; |
| 1982 | 1987 | } |
| 1983 | 1988 | |
| 1984 | 1989 | static int rt5640_resume(struct snd_soc_codec *codec) |
| 1985 | 1990 | { |
| 1986 | − rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | |
| 1991 | + struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); | |
| 1992 | + | |
| 1993 | + if (gpio_is_valid(rt5640->pdata.ldo1_en)) { | |
| 1994 | + gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1); | |
| 1995 | + msleep(400); | |
| 1996 | + } | |
| 1987 | 1997 | |
| 1988 | 1998 | return 0; |
| 1989 | 1999 | } |
| @@ -2080,6 +2090,14 @@ static const struct i2c_device_id rt5640_i2c_id[] = { · 90 unmodified lines | ||
| 2080 | 2090 | }; |
| 2081 | 2091 | MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id); |
| 2082 | 2092 | |
| 2093 | +#ifdef CONFIG_ACPI | |
| 2094 | +static struct acpi_device_id rt5640_acpi_match[] = { | |
| 2095 | + { "INT33CA", 0 }, | |
| 2096 | + { }, | |
| 2097 | +}; | |
| 2098 | +MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match); | |
| 2099 | +#endif | |
| 2100 | + | |
| 2083 | 2101 | static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np) |
| 2084 | 2102 | { |
| 2085 | 2103 | rt5640->pdata.in1_diff = of_property_read_bool(np, |
| @@ -2199,6 +2217,7 @@ static struct i2c_driver rt5640_i2c_driver = { · 113 unmodified lines | ||
| 2199 | 2217 | .driver = { |
| 2200 | 2218 | .name = "rt5640", |
| 2201 | 2219 | .owner = THIS_MODULE, |
| 2220 | + .acpi_match_table = ACPI_PTR(rt5640_acpi_match), | |
| 2202 | 2221 | }, |
| 2203 | 2222 | .probe = rt5640_i2c_probe, |
| 2204 | 2223 | .remove = rt5640_i2c_remove, |
| @@ -60,48 +60,6 @@ enum si476x_pcm_format { · 59 unmodified lines | ||
| 60 | 60 | SI476X_PCM_FORMAT_S24_LE = 6, |
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | −static unsigned int si476x_codec_read(struct snd_soc_codec *codec, | |
| 64 | − unsigned int reg) | |
| 65 | −{ | |
| 66 | − int err; | |
| 67 | − unsigned int val; | |
| 68 | − struct si476x_core *core = codec->control_data; | |
| 69 | − | |
| 70 | − si476x_core_lock(core); | |
| 71 | − if (!si476x_core_is_powered_up(core)) | |
| 72 | − regcache_cache_only(core->regmap, true); | |
| 73 | − | |
| 74 | − err = regmap_read(core->regmap, reg, &val); | |
| 75 | − | |
| 76 | − if (!si476x_core_is_powered_up(core)) | |
| 77 | − regcache_cache_only(core->regmap, false); | |
| 78 | − si476x_core_unlock(core); | |
| 79 | − | |
| 80 | − if (err < 0) | |
| 81 | − return err; | |
| 82 | − | |
| 83 | − return val; | |
| 84 | −} | |
| 85 | − | |
| 86 | −static int si476x_codec_write(struct snd_soc_codec *codec, | |
| 87 | − unsigned int reg, unsigned int val) | |
| 88 | −{ | |
| 89 | − int err; | |
| 90 | − struct si476x_core *core = codec->control_data; | |
| 91 | − | |
| 92 | − si476x_core_lock(core); | |
| 93 | − if (!si476x_core_is_powered_up(core)) | |
| 94 | − regcache_cache_only(core->regmap, true); | |
| 95 | − | |
| 96 | − err = regmap_write(core->regmap, reg, val); | |
| 97 | − | |
| 98 | − if (!si476x_core_is_powered_up(core)) | |
| 99 | − regcache_cache_only(core->regmap, false); | |
| 100 | − si476x_core_unlock(core); | |
| 101 | − | |
| 102 | − return err; | |
| 103 | −} | |
| 104 | − | |
| 105 | 63 | static const struct snd_soc_dapm_widget si476x_dapm_widgets[] = { |
| 106 | 64 | SND_SOC_DAPM_OUTPUT("LOUT"), |
| 107 | 65 | SND_SOC_DAPM_OUTPUT("ROUT"), |
| @@ -115,6 +73,7 @@ static const struct snd_soc_dapm_route si476x_dapm_routes[] = { · 7 unmodified lines | ||
| 115 | 73 | static int si476x_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, |
| 116 | 74 | unsigned int fmt) |
| 117 | 75 | { |
| 76 | + struct si476x_core *core = i2c_mfd_cell_to_core(codec_dai->dev); | |
| 118 | 77 | int err; |
| 119 | 78 | u16 format = 0; |
| 120 | 79 | |
| @@ -178,9 +137,14 @@ static int si476x_codec_set_dai_fmt(struct snd_soc_dai *codec_dai, · 57 unmodified lines | ||
| 178 | 137 | return -EINVAL; |
| 179 | 138 | } |
| 180 | 139 | |
| 140 | + si476x_core_lock(core); | |
| 141 | + | |
| 181 | 142 | err = snd_soc_update_bits(codec_dai->codec, SI476X_DIGITAL_IO_OUTPUT_FORMAT, |
| 182 | 143 | SI476X_DIGITAL_IO_OUTPUT_FORMAT_MASK, |
| 183 | 144 | format); |
| 145 | + | |
| 146 | + si476x_core_unlock(core); | |
| 147 | + | |
| 184 | 148 | if (err < 0) { |
| 185 | 149 | dev_err(codec_dai->codec->dev, "Failed to set output format\n"); |
| 186 | 150 | return err; |
| @@ -193,6 +157,7 @@ static int si476x_codec_hw_params(struct snd_pcm_substream *substream, · 6 unmodified lines | ||
| 193 | 157 | struct snd_pcm_hw_params *params, |
| 194 | 158 | struct snd_soc_dai *dai) |
| 195 | 159 | { |
| 160 | + struct si476x_core *core = i2c_mfd_cell_to_core(dai->dev); | |
| 196 | 161 | int rate, width, err; |
| 197 | 162 | |
| 198 | 163 | rate = params_rate(params); |
| @@ -218,11 +183,13 @@ static int si476x_codec_hw_params(struct snd_pcm_substream *substream, · 19 unmodified lines | ||
| 218 | 183 | return -EINVAL; |
| 219 | 184 | } |
| 220 | 185 | |
| 186 | + si476x_core_lock(core); | |
| 187 | + | |
| 221 | 188 | err = snd_soc_write(dai->codec, SI476X_DIGITAL_IO_OUTPUT_SAMPLE_RATE, |
| 222 | 189 | rate); |
| 223 | 190 | if (err < 0) { |
| 224 | 191 | dev_err(dai->codec->dev, "Failed to set sample rate\n"); |
| 225 | − return err; | |
| 192 | + goto out; | |
| 226 | 193 | } |
| 227 | 194 | |
| 228 | 195 | err = snd_soc_update_bits(dai->codec, SI476X_DIGITAL_IO_OUTPUT_FORMAT, |
| @@ -231,15 +198,18 @@ static int si476x_codec_hw_params(struct snd_pcm_substream *substream, · 2 unmodified lines | ||
| 231 | 198 | (width << SI476X_DIGITAL_IO_SAMPLE_SIZE_SHIFT)); |
| 232 | 199 | if (err < 0) { |
| 233 | 200 | dev_err(dai->codec->dev, "Failed to set output width\n"); |
| 234 | − return err; | |
| 201 | + goto out; | |
| 235 | 202 | } |
| 236 | 203 | |
| 237 | − return 0; | |
| 204 | +out: | |
| 205 | + si476x_core_unlock(core); | |
| 206 | + | |
| 207 | + return err; | |
| 238 | 208 | } |
| 239 | 209 | |
| 240 | 210 | static int si476x_codec_probe(struct snd_soc_codec *codec) |
| 241 | 211 | { |
| 242 | − codec->control_data = i2c_mfd_cell_to_core(codec->dev); | |
| 212 | + codec->control_data = dev_get_regmap(codec->dev->parent, NULL); | |
| 243 | 213 | return 0; |
| 244 | 214 | } |
| 245 | 215 | |
| @@ -268,8 +238,6 @@ static struct snd_soc_dai_driver si476x_dai = { · 22 unmodified lines | ||
| 268 | 238 | |
| 269 | 239 | static struct snd_soc_codec_driver soc_codec_dev_si476x = { |
| 270 | 240 | .probe = si476x_codec_probe, |
| 271 | − .read = si476x_codec_read, | |
| 272 | − .write = si476x_codec_write, | |
| 273 | 241 | .dapm_widgets = si476x_dapm_widgets, |
| 274 | 242 | .num_dapm_widgets = ARRAY_SIZE(si476x_dapm_widgets), |
| 275 | 243 | .dapm_routes = si476x_dapm_routes, |
| @@ -164,30 +164,28 @@ static unsigned int sn95031_get_mic_bias(struct snd_soc_codec *codec) · 163 unmodified lines | ||
| 164 | 164 | } |
| 165 | 165 | /*end - adc helper functions */ |
| 166 | 166 | |
| 167 | −static inline unsigned int sn95031_read(struct snd_soc_codec *codec, | |
| 168 | − unsigned int reg) | |
| 167 | +static int sn95031_read(void *ctx, unsigned int reg, unsigned int *val) | |
| 169 | 168 | { |
| 170 | 169 | u8 value = 0; |
| 171 | 170 | int ret; |
| 172 | 171 | |
| 173 | 172 | ret = intel_scu_ipc_ioread8(reg, &value); |
| 174 | − if (ret) | |
| 175 | − pr_err("read of %x failed, err %d\n", reg, ret); | |
| 176 | − return value; | |
| 173 | + if (ret == 0) | |
| 174 | + *val = value; | |
| 177 | 175 | |
| 176 | + return ret; | |
| 178 | 177 | } |
| 179 | 178 | |
| 180 | −static inline int sn95031_write(struct snd_soc_codec *codec, | |
| 181 | − unsigned int reg, unsigned int value) | |
| 179 | +static int sn95031_write(void *ctx, unsigned int reg, unsigned int value) | |
| 182 | 180 | { |
| 183 | − int ret; | |
| 184 | − | |
| 185 | − ret = intel_scu_ipc_iowrite8(reg, value); | |
| 186 | − if (ret) | |
| 187 | − pr_err("write of %x failed, err %d\n", reg, ret); | |
| 188 | − return ret; | |
| 181 | + return intel_scu_ipc_iowrite8(reg, value); | |
| 189 | 182 | } |
| 190 | 183 | |
| 184 | +static const struct regmap_config sn95031_regmap = { | |
| 185 | + .reg_read = sn95031_read, | |
| 186 | + .reg_write = sn95031_write, | |
| 187 | +}; | |
| 188 | + | |
| 191 | 189 | static int sn95031_set_vaud_bias(struct snd_soc_codec *codec, |
| 192 | 190 | enum snd_soc_bias_level level) |
| 193 | 191 | { |
| @@ -827,6 +825,8 @@ static int sn95031_codec_probe(struct snd_soc_codec *codec) · 633 unmodified lines | ||
| 827 | 825 | { |
| 828 | 826 | pr_debug("codec_probe called\n"); |
| 829 | 827 | |
| 828 | + snd_soc_codec_set_cache_io(codec, 0, 0, SND_SOC_REGMAP); | |
| 829 | + | |
| 830 | 830 | /* PCM interface config |
| 831 | 831 | * This sets the pcm rx slot conguration to max 6 slots |
| 832 | 832 | * for max 4 dais (2 stereo and 2 mono) |
| @@ -886,8 +886,6 @@ static int sn95031_codec_remove(struct snd_soc_codec *codec) · 53 unmodified lines | ||
| 886 | 886 | static struct snd_soc_codec_driver sn95031_codec = { |
| 887 | 887 | .probe = sn95031_codec_probe, |
| 888 | 888 | .remove = sn95031_codec_remove, |
| 889 | − .read = sn95031_read, | |
| 890 | − .write = sn95031_write, | |
| 891 | 889 | .set_bias_level = sn95031_set_vaud_bias, |
| 892 | 890 | .idle_bias_off = true, |
| 893 | 891 | .dapm_widgets = sn95031_dapm_widgets, |
| @@ -898,7 +896,14 @@ static struct snd_soc_codec_driver sn95031_codec = { · 4 unmodified lines | ||
| 898 | 896 | |
| 899 | 897 | static int sn95031_device_probe(struct platform_device *pdev) |
| 900 | 898 | { |
| 899 | + struct regmap *regmap; | |
| 900 | + | |
| 901 | 901 | pr_debug("codec device probe called for %s\n", dev_name(&pdev->dev)); |
| 902 | + | |
| 903 | + regmap = devm_regmap_init(&pdev->dev, NULL, NULL, &sn95031_regmap); | |
| 904 | + if (IS_ERR(regmap)) | |
| 905 | + return PTR_ERR(regmap); | |
| 906 | + | |
| 902 | 907 | return snd_soc_register_codec(&pdev->dev, &sn95031_codec, |
| 903 | 908 | sn95031_dais, ARRAY_SIZE(sn95031_dais)); |
| 904 | 909 | } |
| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #include <linux/i2c.h> |
| 38 | 38 | #include <linux/regmap.h> |
| 39 | 39 | #include <linux/spi/spi.h> |
| 40 | +#include <linux/of.h> | |
| 40 | 41 | #include <linux/of_device.h> |
| 41 | 42 | #include <linux/of_gpio.h> |
| 42 | 43 | #include <sound/pcm.h> |
| @@ -244,6 +245,8 @@ struct tas5086_private { · 201 unmodified lines | ||
| 244 | 245 | unsigned int mclk, sclk; |
| 245 | 246 | unsigned int format; |
| 246 | 247 | bool deemph; |
| 248 | + unsigned int charge_period; | |
| 249 | + unsigned int pwm_start_mid_z; | |
| 247 | 250 | /* Current sample rate for de-emphasis control */ |
| 248 | 251 | int rate; |
| 249 | 252 | /* GPIO driving Reset pin, if any */ |
| @@ -429,7 +432,7 @@ static int tas5086_hw_params(struct snd_pcm_substream *substream, · 179 unmodified lines | ||
| 429 | 432 | default: |
| 430 | 433 | dev_err(codec->dev, "Invalid bit width\n"); |
| 431 | 434 | return -EINVAL; |
| 432 | − }; | |
| 435 | + } | |
| 433 | 436 | |
| 434 | 437 | ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val); |
| 435 | 438 | if (ret < 0) |
| @@ -456,6 +459,75 @@ static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream) · 20 unmodified lines | ||
| 456 | 459 | return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val); |
| 457 | 460 | } |
| 458 | 461 | |
| 462 | +static void tas5086_reset(struct tas5086_private *priv) | |
| 463 | +{ | |
| 464 | + if (gpio_is_valid(priv->gpio_nreset)) { | |
| 465 | + /* Reset codec - minimum assertion time is 400ns */ | |
| 466 | + gpio_direction_output(priv->gpio_nreset, 0); | |
| 467 | + udelay(1); | |
| 468 | + gpio_set_value(priv->gpio_nreset, 1); | |
| 469 | + | |
| 470 | + /* Codec needs ~15ms to wake up */ | |
| 471 | + msleep(15); | |
| 472 | + } | |
| 473 | +} | |
| 474 | + | |
| 475 | +/* charge period values in microseconds */ | |
| 476 | +static const int tas5086_charge_period[] = { | |
| 477 | + 13000, 16900, 23400, 31200, 41600, 54600, 72800, 96200, | |
| 478 | + 130000, 156000, 234000, 312000, 416000, 546000, 728000, 962000, | |
| 479 | + 1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000, | |
| 480 | +}; | |
| 481 | + | |
| 482 | +static int tas5086_init(struct device *dev, struct tas5086_private *priv) | |
| 483 | +{ | |
| 484 | + int ret, i; | |
| 485 | + | |
| 486 | + /* | |
| 487 | + * If any of the channels is configured to start in Mid-Z mode, | |
| 488 | + * configure 'part 1' of the PWM starts to use Mid-Z, and tell | |
| 489 | + * all configured mid-z channels to start start under 'part 1'. | |
| 490 | + */ | |
| 491 | + if (priv->pwm_start_mid_z) | |
| 492 | + regmap_write(priv->regmap, TAS5086_PWM_START, | |
| 493 | + TAS5086_PWM_START_MIDZ_FOR_START_1 | | |
| 494 | + priv->pwm_start_mid_z); | |
| 495 | + | |
| 496 | + /* lookup and set split-capacitor charge period */ | |
| 497 | + if (priv->charge_period == 0) { | |
| 498 | + regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0); | |
| 499 | + } else { | |
| 500 | + i = index_in_array(tas5086_charge_period, | |
| 501 | + ARRAY_SIZE(tas5086_charge_period), | |
| 502 | + priv->charge_period); | |
| 503 | + if (i >= 0) | |
| 504 | + regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, | |
| 505 | + i + 0x08); | |
| 506 | + else | |
| 507 | + dev_warn(dev, | |
| 508 | + "Invalid split-cap charge period of %d ns.\n", | |
| 509 | + priv->charge_period); | |
| 510 | + } | |
| 511 | + | |
| 512 | + /* enable factory trim */ | |
| 513 | + ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00); | |
| 514 | + if (ret < 0) | |
| 515 | + return ret; | |
| 516 | + | |
| 517 | + /* start all channels */ | |
| 518 | + ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20); | |
| 519 | + if (ret < 0) | |
| 520 | + return ret; | |
| 521 | + | |
| 522 | + /* mute all channels for now */ | |
| 523 | + ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE, | |
| 524 | + TAS5086_SOFT_MUTE_ALL); | |
| 525 | + if (ret < 0) | |
| 526 | + return ret; | |
| 527 | + | |
| 528 | + return 0; | |
| 529 | +} | |
| 530 | + | |
| 459 | 531 | /* TAS5086 controls */ |
| 460 | 532 | static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1); |
| 461 | 533 | |
| @@ -691,14 +763,39 @@ static struct snd_soc_dai_driver tas5086_dai = { · 229 unmodified lines | ||
| 691 | 763 | }; |
| 692 | 764 | |
| 693 | 765 | #ifdef CONFIG_PM |
| 766 | +static int tas5086_soc_suspend(struct snd_soc_codec *codec) | |
| 767 | +{ | |
| 768 | + struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); | |
| 769 | + int ret; | |
| 770 | + | |
| 771 | + /* Shut down all channels */ | |
| 772 | + ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x60); | |
| 773 | + if (ret < 0) | |
| 774 | + return ret; | |
| 775 | + | |
| 776 | + return 0; | |
| 777 | +} | |
| 778 | + | |
| 694 | 779 | static int tas5086_soc_resume(struct snd_soc_codec *codec) |
| 695 | 780 | { |
| 696 | 781 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); |
| 782 | + int ret; | |
| 783 | + | |
| 784 | + tas5086_reset(priv); | |
| 785 | + regcache_mark_dirty(priv->regmap); | |
| 786 | + | |
| 787 | + ret = tas5086_init(codec->dev, priv); | |
| 788 | + if (ret < 0) | |
| 789 | + return ret; | |
| 790 | + | |
| 791 | + ret = regcache_sync(priv->regmap); | |
| 792 | + if (ret < 0) | |
| 793 | + return ret; | |
| 697 | 794 | |
| 698 | − /* Restore codec state */ | |
| 699 | − return regcache_sync(priv->regmap); | |
| 795 | + return 0; | |
| 700 | 796 | } |
| 701 | 797 | #else |
| 798 | +#define tas5086_soc_suspend NULL | |
| 702 | 799 | #define tas5086_soc_resume NULL |
| 703 | 800 | #endif /* CONFIG_PM */ |
| 704 | 801 | |
| @@ -710,23 +807,19 @@ static const struct of_device_id tas5086_dt_ids[] = { · 5 unmodified lines | ||
| 710 | 807 | MODULE_DEVICE_TABLE(of, tas5086_dt_ids); |
| 711 | 808 | #endif |
| 712 | 809 | |
| 713 | −/* charge period values in microseconds */ | |
| 714 | −static const int tas5086_charge_period[] = { | |
| 715 | − 13000, 16900, 23400, 31200, 41600, 54600, 72800, 96200, | |
| 716 | − 130000, 156000, 234000, 312000, 416000, 546000, 728000, 962000, | |
| 717 | − 1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000, | |
| 718 | −}; | |
| 719 | − | |
| 720 | 810 | static int tas5086_probe(struct snd_soc_codec *codec) |
| 721 | 811 | { |
| 722 | 812 | struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); |
| 723 | − int charge_period = 1300000; /* hardware default is 1300 ms */ | |
| 724 | − u8 pwm_start_mid_z = 0; | |
| 725 | 813 | int i, ret; |
| 726 | 814 | |
| 815 | + priv->pwm_start_mid_z = 0; | |
| 816 | + priv->charge_period = 1300000; /* hardware default is 1300 ms */ | |
| 817 | + | |
| 727 | 818 | if (of_match_device(of_match_ptr(tas5086_dt_ids), codec->dev)) { |
| 728 | 819 | struct device_node *of_node = codec->dev->of_node; |
| 729 | − of_property_read_u32(of_node, "ti,charge-period", &charge_period); | |
| 820 | + | |
| 821 | + of_property_read_u32(of_node, "ti,charge-period", | |
| 822 | + &priv->charge_period); | |
| 730 | 823 | |
| 731 | 824 | for (i = 0; i < 6; i++) { |
| 732 | 825 | char name[25]; |
| @@ -735,43 +828,11 @@ static int tas5086_probe(struct snd_soc_codec *codec) · 2 unmodified lines | ||
| 735 | 828 | "ti,mid-z-channel-%d", i + 1); |
| 736 | 829 | |
| 737 | 830 | if (of_get_property(of_node, name, NULL) != NULL) |
| 738 | − pwm_start_mid_z |= 1 << i; | |
| 831 | + priv->pwm_start_mid_z |= 1 << i; | |
| 739 | 832 | } |
| 740 | 833 | } |
| 741 | 834 | |
| 742 | − /* | |
| 743 | − * If any of the channels is configured to start in Mid-Z mode, | |
| 744 | − * configure 'part 1' of the PWM starts to use Mid-Z, and tell | |
| 745 | − * all configured mid-z channels to start start under 'part 1'. | |
| 746 | − */ | |
| 747 | − if (pwm_start_mid_z) | |
| 748 | − regmap_write(priv->regmap, TAS5086_PWM_START, | |
| 749 | − TAS5086_PWM_START_MIDZ_FOR_START_1 | | |
| 750 | − pwm_start_mid_z); | |
| 751 | − | |
| 752 | − /* lookup and set split-capacitor charge period */ | |
| 753 | − if (charge_period == 0) { | |
| 754 | − regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0); | |
| 755 | − } else { | |
| 756 | − i = index_in_array(tas5086_charge_period, | |
| 757 | − ARRAY_SIZE(tas5086_charge_period), | |
| 758 | − charge_period); | |
| 759 | − if (i >= 0) | |
| 760 | − regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, | |
| 761 | − i + 0x08); | |
| 762 | − else | |
| 763 | − dev_warn(codec->dev, | |
| 764 | − "Invalid split-cap charge period of %d ns.\n", | |
| 765 | − charge_period); | |
| 766 | − } | |
| 767 | − | |
| 768 | − /* enable factory trim */ | |
| 769 | − ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00); | |
| 770 | − if (ret < 0) | |
| 771 | − return ret; | |
| 772 | − | |
| 773 | − /* start all channels */ | |
| 774 | − ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20); | |
| 835 | + ret = tas5086_init(codec->dev, priv); | |
| 775 | 836 | if (ret < 0) |
| 776 | 837 | return ret; |
| 777 | 838 | |
| @@ -780,12 +841,6 @@ static int tas5086_probe(struct snd_soc_codec *codec) · 2 unmodified lines | ||
| 780 | 841 | if (ret < 0) |
| 781 | 842 | return ret; |
| 782 | 843 | |
| 783 | − /* mute all channels for now */ | |
| 784 | − ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE, | |
| 785 | − TAS5086_SOFT_MUTE_ALL); | |
| 786 | − if (ret < 0) | |
| 787 | − return ret; | |
| 788 | − | |
| 789 | 844 | return 0; |
| 790 | 845 | } |
| 791 | 846 | |
| @@ -803,6 +858,7 @@ static int tas5086_remove(struct snd_soc_codec *codec) · 11 unmodified lines | ||
| 803 | 858 | static struct snd_soc_codec_driver soc_codec_dev_tas5086 = { |
| 804 | 859 | .probe = tas5086_probe, |
| 805 | 860 | .remove = tas5086_remove, |
| 861 | + .suspend = tas5086_soc_suspend, | |
| 806 | 862 | .resume = tas5086_soc_resume, |
| 807 | 863 | .controls = tas5086_controls, |
| 808 | 864 | .num_controls = ARRAY_SIZE(tas5086_controls), |
| @@ -862,17 +918,8 @@ static int tas5086_i2c_probe(struct i2c_client *i2c, · 53 unmodified lines | ||
| 862 | 918 | if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset")) |
| 863 | 919 | gpio_nreset = -EINVAL; |
| 864 | 920 | |
| 865 | − if (gpio_is_valid(gpio_nreset)) { | |
| 866 | − /* Reset codec - minimum assertion time is 400ns */ | |
| 867 | − gpio_direction_output(gpio_nreset, 0); | |
| 868 | − udelay(1); | |
| 869 | − gpio_set_value(gpio_nreset, 1); | |
| 870 | − | |
| 871 | − /* Codec needs ~15ms to wake up */ | |
| 872 | − msleep(15); | |
| 873 | − } | |
| 874 | − | |
| 875 | 921 | priv->gpio_nreset = gpio_nreset; |
| 922 | + tas5086_reset(priv); | |
| 876 | 923 | |
| 877 | 924 | /* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */ |
| 878 | 925 | ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i); |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/delay.h> |
| 25 | 25 | #include <linux/pm.h> |
| 26 | 26 | #include <linux/i2c.h> |
| 27 | +#include <linux/regmap.h> | |
| 27 | 28 | #include <linux/slab.h> |
| 28 | 29 | #include <sound/core.h> |
| 29 | 30 | #include <sound/pcm.h> |
| @@ -37,11 +38,27 @@ · 7 unmodified lines | ||
| 37 | 38 | /* |
| 38 | 39 | * AIC23 register cache |
| 39 | 40 | */ |
| 40 | −static const u16 tlv320aic23_reg[] = { | |
| 41 | − 0x0097, 0x0097, 0x00F9, 0x00F9, /* 0 */ | |
| 42 | − 0x001A, 0x0004, 0x0007, 0x0001, /* 4 */ | |
| 43 | − 0x0020, 0x0000, 0x0000, 0x0000, /* 8 */ | |
| 44 | − 0x0000, 0x0000, 0x0000, 0x0000, /* 12 */ | |
| 41 | +static const struct reg_default tlv320aic23_reg[] = { | |
| 42 | + { 0, 0x0097 }, | |
| 43 | + { 1, 0x0097 }, | |
| 44 | + { 2, 0x00F9 }, | |
| 45 | + { 3, 0x00F9 }, | |
| 46 | + { 4, 0x001A }, | |
| 47 | + { 5, 0x0004 }, | |
| 48 | + { 6, 0x0007 }, | |
| 49 | + { 7, 0x0001 }, | |
| 50 | + { 8, 0x0020 }, | |
| 51 | + { 9, 0x0000 }, | |
| 52 | +}; | |
| 53 | + | |
| 54 | +static const struct regmap_config tlv320aic23_regmap = { | |
| 55 | + .reg_bits = 7, | |
| 56 | + .val_bits = 9, | |
| 57 | + | |
| 58 | + .max_register = TLV320AIC23_RESET, | |
| 59 | + .reg_defaults = tlv320aic23_reg, | |
| 60 | + .num_reg_defaults = ARRAY_SIZE(tlv320aic23_reg), | |
| 61 | + .cache_type = REGCACHE_RBTREE, | |
| 45 | 62 | }; |
| 46 | 63 | |
| 47 | 64 | static const char *rec_src_text[] = { "Line", "Mic" }; |
| @@ -171,7 +188,7 @@ static const struct snd_soc_dapm_route tlv320aic23_intercon[] = { · 123 unmodified lines | ||
| 171 | 188 | |
| 172 | 189 | /* AIC23 driver data */ |
| 173 | 190 | struct aic23 { |
| 174 | − enum snd_soc_control_type control_type; | |
| 191 | + struct regmap *regmap; | |
| 175 | 192 | int mclk; |
| 176 | 193 | int requested_adc; |
| 177 | 194 | int requested_dac; |
| @@ -532,7 +549,9 @@ static int tlv320aic23_suspend(struct snd_soc_codec *codec) · 354 unmodified lines | ||
| 532 | 549 | |
| 533 | 550 | static int tlv320aic23_resume(struct snd_soc_codec *codec) |
| 534 | 551 | { |
| 535 | − snd_soc_cache_sync(codec); | |
| 552 | + struct aic23 *aic23 = snd_soc_codec_get_drvdata(codec); | |
| 553 | + regcache_mark_dirty(aic23->regmap); | |
| 554 | + regcache_sync(aic23->regmap); | |
| 536 | 555 | tlv320aic23_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 537 | 556 | |
| 538 | 557 | return 0; |
| @@ -540,10 +559,9 @@ static int tlv320aic23_resume(struct snd_soc_codec *codec) · 1 unmodified line | ||
| 540 | 559 | |
| 541 | 560 | static int tlv320aic23_probe(struct snd_soc_codec *codec) |
| 542 | 561 | { |
| 543 | − struct aic23 *aic23 = snd_soc_codec_get_drvdata(codec); | |
| 544 | 562 | int ret; |
| 545 | 563 | |
| 546 | − ret = snd_soc_codec_set_cache_io(codec, 7, 9, aic23->control_type); | |
| 564 | + ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP); | |
| 547 | 565 | if (ret < 0) { |
| 548 | 566 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 549 | 567 | return ret; |
| @@ -552,16 +570,6 @@ static int tlv320aic23_probe(struct snd_soc_codec *codec) · 2 unmodified lines | ||
| 552 | 570 | /* Reset codec */ |
| 553 | 571 | snd_soc_write(codec, TLV320AIC23_RESET, 0); |
| 554 | 572 | |
| 555 | − /* Write the register default value to cache for reserved registers, | |
| 556 | − * so the write to the these registers are suppressed by the cache | |
| 557 | − * restore code when it skips writes of default registers. | |
| 558 | − */ | |
| 559 | − snd_soc_cache_write(codec, 0x0A, 0); | |
| 560 | − snd_soc_cache_write(codec, 0x0B, 0); | |
| 561 | − snd_soc_cache_write(codec, 0x0C, 0); | |
| 562 | − snd_soc_cache_write(codec, 0x0D, 0); | |
| 563 | − snd_soc_cache_write(codec, 0x0E, 0); | |
| 564 | − | |
| 565 | 573 | /* power on device */ |
| 566 | 574 | tlv320aic23_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
| 567 | 575 | |
| @@ -586,9 +594,6 @@ static int tlv320aic23_probe(struct snd_soc_codec *codec) · 18 unmodified lines | ||
| 586 | 594 | |
| 587 | 595 | snd_soc_write(codec, TLV320AIC23_ACTIVE, 0x1); |
| 588 | 596 | |
| 589 | − snd_soc_add_codec_controls(codec, tlv320aic23_snd_controls, | |
| 590 | − ARRAY_SIZE(tlv320aic23_snd_controls)); | |
| 591 | − | |
| 592 | 597 | return 0; |
| 593 | 598 | } |
| 594 | 599 | |
| @@ -599,21 +604,19 @@ static int tlv320aic23_remove(struct snd_soc_codec *codec) · 4 unmodified lines | ||
| 599 | 604 | } |
| 600 | 605 | |
| 601 | 606 | static struct snd_soc_codec_driver soc_codec_dev_tlv320aic23 = { |
| 602 | − .reg_cache_size = ARRAY_SIZE(tlv320aic23_reg), | |
| 603 | − .reg_word_size = sizeof(u16), | |
| 604 | − .reg_cache_default = tlv320aic23_reg, | |
| 605 | 607 | .probe = tlv320aic23_probe, |
| 606 | 608 | .remove = tlv320aic23_remove, |
| 607 | 609 | .suspend = tlv320aic23_suspend, |
| 608 | 610 | .resume = tlv320aic23_resume, |
| 609 | 611 | .set_bias_level = tlv320aic23_set_bias_level, |
| 612 | + .controls = tlv320aic23_snd_controls, | |
| 613 | + .num_controls = ARRAY_SIZE(tlv320aic23_snd_controls), | |
| 610 | 614 | .dapm_widgets = tlv320aic23_dapm_widgets, |
| 611 | 615 | .num_dapm_widgets = ARRAY_SIZE(tlv320aic23_dapm_widgets), |
| 612 | 616 | .dapm_routes = tlv320aic23_intercon, |
| 613 | 617 | .num_dapm_routes = ARRAY_SIZE(tlv320aic23_intercon), |
| 614 | 618 | }; |
| 615 | 619 | |
| 616 | −#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
| 617 | 620 | /* |
| 618 | 621 | * If the i2c layer weren't so broken, we could pass this kind of data |
| 619 | 622 | * around |
| @@ -631,8 +634,11 @@ static int tlv320aic23_codec_probe(struct i2c_client *i2c, · 11 unmodified lines | ||
| 631 | 634 | if (aic23 == NULL) |
| 632 | 635 | return -ENOMEM; |
| 633 | 636 | |
| 637 | + aic23->regmap = devm_regmap_init_i2c(i2c, &tlv320aic23_regmap); | |
| 638 | + if (IS_ERR(aic23->regmap)) | |
| 639 | + return PTR_ERR(aic23->regmap); | |
| 640 | + | |
| 634 | 641 | i2c_set_clientdata(i2c, aic23); |
| 635 | − aic23->control_type = SND_SOC_I2C; | |
| 636 | 642 | |
| 637 | 643 | ret = snd_soc_register_codec(&i2c->dev, |
| 638 | 644 | &soc_codec_dev_tlv320aic23, &tlv320aic23_dai, 1); |
| @@ -660,29 +666,7 @@ static struct i2c_driver tlv320aic23_i2c_driver = { · 21 unmodified lines | ||
| 660 | 666 | .id_table = tlv320aic23_id, |
| 661 | 667 | }; |
| 662 | 668 | |
| 663 | −#endif | |
| 664 | − | |
| 665 | −static int __init tlv320aic23_modinit(void) | |
| 666 | −{ | |
| 667 | − int ret; | |
| 668 | −#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
| 669 | − ret = i2c_add_driver(&tlv320aic23_i2c_driver); | |
| 670 | − if (ret != 0) { | |
| 671 | − printk(KERN_ERR "Failed to register TLV320AIC23 I2C driver: %d\n", | |
| 672 | − ret); | |
| 673 | − } | |
| 674 | −#endif | |
| 675 | − return ret; | |
| 676 | −} | |
| 677 | −module_init(tlv320aic23_modinit); | |
| 678 | − | |
| 679 | −static void __exit tlv320aic23_exit(void) | |
| 680 | −{ | |
| 681 | −#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
| 682 | − i2c_del_driver(&tlv320aic23_i2c_driver); | |
| 683 | −#endif | |
| 684 | −} | |
| 685 | −module_exit(tlv320aic23_exit); | |
| 669 | +module_i2c_driver(tlv320aic23_i2c_driver); | |
| 686 | 670 | |
| 687 | 671 | MODULE_DESCRIPTION("ASoC TLV320AIC23 codec driver"); |
| 688 | 672 | MODULE_AUTHOR("Arun KS <arunks@mistralsolutions.com>"); |
| @@ -29,6 +29,7 @@ MODULE_LICENSE("GPL"); · 28 unmodified lines | ||
| 29 | 29 | /* AIC26 driver private data */ |
| 30 | 30 | struct aic26 { |
| 31 | 31 | struct spi_device *spi; |
| 32 | + struct regmap *regmap; | |
| 32 | 33 | struct snd_soc_codec *codec; |
| 33 | 34 | int master; |
| 34 | 35 | int datfm; |
| @@ -40,85 +41,6 @@ struct aic26 { · 5 unmodified lines | ||
| 40 | 41 | int keyclick_len; |
| 41 | 42 | }; |
| 42 | 43 | |
| 43 | −/* --------------------------------------------------------------------- | |
| 44 | − * Register access routines | |
| 45 | − */ | |
| 46 | −static unsigned int aic26_reg_read(struct snd_soc_codec *codec, | |
| 47 | − unsigned int reg) | |
| 48 | −{ | |
| 49 | − struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); | |
| 50 | − u16 *cache = codec->reg_cache; | |
| 51 | − u16 cmd, value; | |
| 52 | − u8 buffer[2]; | |
| 53 | − int rc; | |
| 54 | − | |
| 55 | − if (reg >= AIC26_NUM_REGS) { | |
| 56 | − WARN_ON_ONCE(1); | |
| 57 | − return 0; | |
| 58 | − } | |
| 59 | − | |
| 60 | − /* Do SPI transfer; first 16bits are command; remaining is | |
| 61 | − * register contents */ | |
| 62 | − cmd = AIC26_READ_COMMAND_WORD(reg); | |
| 63 | − buffer[0] = (cmd >> 8) & 0xff; | |
| 64 | − buffer[1] = cmd & 0xff; | |
| 65 | − rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2); | |
| 66 | − if (rc) { | |
| 67 | − dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); | |
| 68 | − return -EIO; | |
| 69 | − } | |
| 70 | − value = (buffer[0] << 8) | buffer[1]; | |
| 71 | − | |
| 72 | − /* Update the cache before returning with the value */ | |
| 73 | − cache[reg] = value; | |
| 74 | − return value; | |
| 75 | −} | |
| 76 | − | |
| 77 | −static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec, | |
| 78 | − unsigned int reg) | |
| 79 | −{ | |
| 80 | − u16 *cache = codec->reg_cache; | |
| 81 | − | |
| 82 | − if (reg >= AIC26_NUM_REGS) { | |
| 83 | − WARN_ON_ONCE(1); | |
| 84 | − return 0; | |
| 85 | − } | |
| 86 | − | |
| 87 | − return cache[reg]; | |
| 88 | −} | |
| 89 | − | |
| 90 | −static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg, | |
| 91 | − unsigned int value) | |
| 92 | −{ | |
| 93 | − struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); | |
| 94 | − u16 *cache = codec->reg_cache; | |
| 95 | − u16 cmd; | |
| 96 | − u8 buffer[4]; | |
| 97 | − int rc; | |
| 98 | − | |
| 99 | − if (reg >= AIC26_NUM_REGS) { | |
| 100 | − WARN_ON_ONCE(1); | |
| 101 | − return -EINVAL; | |
| 102 | − } | |
| 103 | − | |
| 104 | − /* Do SPI transfer; first 16bits are command; remaining is data | |
| 105 | − * to write into register */ | |
| 106 | − cmd = AIC26_WRITE_COMMAND_WORD(reg); | |
| 107 | − buffer[0] = (cmd >> 8) & 0xff; | |
| 108 | − buffer[1] = cmd & 0xff; | |
| 109 | − buffer[2] = value >> 8; | |
| 110 | − buffer[3] = value; | |
| 111 | − rc = spi_write(aic26->spi, buffer, 4); | |
| 112 | − if (rc) { | |
| 113 | − dev_err(&aic26->spi->dev, "AIC26 reg read error\n"); | |
| 114 | − return -EIO; | |
| 115 | − } | |
| 116 | − | |
| 117 | − /* update cache before returning */ | |
| 118 | − cache[reg] = value; | |
| 119 | − return 0; | |
| 120 | −} | |
| 121 | − | |
| 122 | 44 | static const struct snd_soc_dapm_widget tlv320aic26_dapm_widgets[] = { |
| 123 | 45 | SND_SOC_DAPM_INPUT("MICIN"), |
| 124 | 46 | SND_SOC_DAPM_INPUT("AUX"), |
| @@ -195,19 +117,15 @@ static int aic26_hw_params(struct snd_pcm_substream *substream, · 70 unmodified lines | ||
| 195 | 117 | snd_soc_write(codec, AIC26_REG_PLL_PROG2, reg); |
| 196 | 118 | |
| 197 | 119 | /* Audio Control 3 (master mode, fsref rate) */ |
| 198 | − reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3); | |
| 199 | − reg &= ~0xf800; | |
| 200 | 120 | if (aic26->master) |
| 201 | − reg |= 0x0800; | |
| 121 | + reg = 0x0800; | |
| 202 | 122 | if (fsref == 48000) |
| 203 | − reg |= 0x2000; | |
| 204 | − snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg); | |
| 123 | + reg = 0x2000; | |
| 124 | + snd_soc_update_bits(codec, AIC26_REG_AUDIO_CTRL3, 0xf800, reg); | |
| 205 | 125 | |
| 206 | 126 | /* Audio Control 1 (FSref divisor) */ |
| 207 | − reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1); | |
| 208 | − reg &= ~0x0fff; | |
| 209 | − reg |= wlen | aic26->datfm | (divisor << 3) | divisor; | |
| 210 | − snd_soc_write(codec, AIC26_REG_AUDIO_CTRL1, reg); | |
| 127 | + reg = wlen | aic26->datfm | (divisor << 3) | divisor; | |
| 128 | + snd_soc_update_bits(codec, AIC26_REG_AUDIO_CTRL1, 0xfff, reg); | |
| 211 | 129 | |
| 212 | 130 | return 0; |
| 213 | 131 | } |
| @@ -219,16 +137,16 @@ static int aic26_mute(struct snd_soc_dai *dai, int mute) · 5 unmodified lines | ||
| 219 | 137 | { |
| 220 | 138 | struct snd_soc_codec *codec = dai->codec; |
| 221 | 139 | struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec); |
| 222 | − u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN); | |
| 140 | + u16 reg; | |
| 223 | 141 | |
| 224 | 142 | dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n", |
| 225 | 143 | dai, mute); |
| 226 | 144 | |
| 227 | 145 | if (mute) |
| 228 | − reg |= 0x8080; | |
| 146 | + reg = 0x8080; | |
| 229 | 147 | else |
| 230 | − reg &= ~0x8080; | |
| 231 | − snd_soc_write(codec, AIC26_REG_DAC_GAIN, reg); | |
| 148 | + reg = 0; | |
| 149 | + snd_soc_update_bits(codec, AIC26_REG_DAC_GAIN, 0x8000, reg); | |
| 232 | 150 | |
| 233 | 151 | return 0; |
| 234 | 152 | } |
| @@ -346,7 +264,7 @@ static ssize_t aic26_keyclick_show(struct device *dev, · 111 unmodified lines | ||
| 346 | 264 | struct aic26 *aic26 = dev_get_drvdata(dev); |
| 347 | 265 | int val, amp, freq, len; |
| 348 | 266 | |
| 349 | − val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2); | |
| 267 | + val = snd_soc_read(aic26->codec, AIC26_REG_AUDIO_CTRL2); | |
| 350 | 268 | amp = (val >> 12) & 0x7; |
| 351 | 269 | freq = (125 << ((val >> 8) & 0x7)) >> 1; |
| 352 | 270 | len = 2 * (1 + ((val >> 4) & 0xf)); |
| @@ -360,11 +278,9 @@ static ssize_t aic26_keyclick_set(struct device *dev, · 7 unmodified lines | ||
| 360 | 278 | const char *buf, size_t count) |
| 361 | 279 | { |
| 362 | 280 | struct aic26 *aic26 = dev_get_drvdata(dev); |
| 363 | − int val; | |
| 364 | 281 | |
| 365 | − val = aic26_reg_read_cache(aic26->codec, AIC26_REG_AUDIO_CTRL2); | |
| 366 | − val |= 0x8000; | |
| 367 | − snd_soc_write(aic26->codec, AIC26_REG_AUDIO_CTRL2, val); | |
| 282 | + snd_soc_update_bits(aic26->codec, AIC26_REG_AUDIO_CTRL2, | |
| 283 | + 0x8000, 0x800); | |
| 368 | 284 | |
| 369 | 285 | return count; |
| 370 | 286 | } |
| @@ -377,7 +293,9 @@ static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set); · 6 unmodified lines | ||
| 377 | 293 | static int aic26_probe(struct snd_soc_codec *codec) |
| 378 | 294 | { |
| 379 | 295 | struct aic26 *aic26 = dev_get_drvdata(codec->dev); |
| 380 | − int ret, err, i, reg; | |
| 296 | + int ret, reg; | |
| 297 | + | |
| 298 | + snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); | |
| 381 | 299 | |
| 382 | 300 | aic26->codec = codec; |
| 383 | 301 | |
| @@ -393,37 +311,30 @@ static int aic26_probe(struct snd_soc_codec *codec) · 9 unmodified lines | ||
| 393 | 311 | reg |= 0x0800; /* set master mode */ |
| 394 | 312 | snd_soc_write(codec, AIC26_REG_AUDIO_CTRL3, reg); |
| 395 | 313 | |
| 396 | − /* Fill register cache */ | |
| 397 | − for (i = 0; i < codec->driver->reg_cache_size; i++) | |
| 398 | − snd_soc_read(codec, i); | |
| 399 | − | |
| 400 | 314 | /* Register the sysfs files for debugging */ |
| 401 | 315 | /* Create SysFS files */ |
| 402 | 316 | ret = device_create_file(codec->dev, &dev_attr_keyclick); |
| 403 | 317 | if (ret) |
| 404 | 318 | dev_info(codec->dev, "error creating sysfs files\n"); |
| 405 | 319 | |
| 406 | − /* register controls */ | |
| 407 | − dev_dbg(codec->dev, "Registering controls\n"); | |
| 408 | − err = snd_soc_add_codec_controls(codec, aic26_snd_controls, | |
| 409 | − ARRAY_SIZE(aic26_snd_controls)); | |
| 410 | − WARN_ON(err < 0); | |
| 411 | − | |
| 412 | 320 | return 0; |
| 413 | 321 | } |
| 414 | 322 | |
| 415 | 323 | static struct snd_soc_codec_driver aic26_soc_codec_dev = { |
| 416 | 324 | .probe = aic26_probe, |
| 417 | − .read = aic26_reg_read, | |
| 418 | − .write = aic26_reg_write, | |
| 419 | − .reg_cache_size = AIC26_NUM_REGS, | |
| 420 | − .reg_word_size = sizeof(u16), | |
| 325 | + .controls = aic26_snd_controls, | |
| 326 | + .num_controls = ARRAY_SIZE(aic26_snd_controls), | |
| 421 | 327 | .dapm_widgets = tlv320aic26_dapm_widgets, |
| 422 | 328 | .num_dapm_widgets = ARRAY_SIZE(tlv320aic26_dapm_widgets), |
| 423 | 329 | .dapm_routes = tlv320aic26_dapm_routes, |
| 424 | 330 | .num_dapm_routes = ARRAY_SIZE(tlv320aic26_dapm_routes), |
| 425 | 331 | }; |
| 426 | 332 | |
| 333 | +static const struct regmap_config aic26_regmap = { | |
| 334 | + .reg_bits = 16, | |
| 335 | + .val_bits = 16, | |
| 336 | +}; | |
| 337 | + | |
| 427 | 338 | /* --------------------------------------------------------------------- |
| 428 | 339 | * SPI device portion of driver: probe and release routines and SPI |
| 429 | 340 | * driver registration. |
| @@ -440,6 +351,10 @@ static int aic26_spi_probe(struct spi_device *spi) · 10 unmodified lines | ||
| 440 | 351 | if (!aic26) |
| 441 | 352 | return -ENOMEM; |
| 442 | 353 | |
| 354 | + aic26->regmap = devm_regmap_init_spi(spi, &aic26_regmap); | |
| 355 | + if (IS_ERR(aic26->regmap)) | |
| 356 | + return PTR_ERR(aic26->regmap); | |
| 357 | + | |
| 443 | 358 | /* Initialize the driver data */ |
| 444 | 359 | aic26->spi = spi; |
| 445 | 360 | dev_set_drvdata(&spi->dev, aic26); |
| @@ -9,10 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | #define _TLV320AIC16_H_ |
| 10 | 10 | |
| 11 | 11 | /* AIC26 Registers */ |
| 12 | −#define AIC26_READ_COMMAND_WORD(addr) ((1 << 15) | (addr << 5)) | |
| 13 | −#define AIC26_WRITE_COMMAND_WORD(addr) ((0 << 15) | (addr << 5)) | |
| 14 | −#define AIC26_PAGE_ADDR(page, offset) ((page << 6) | offset) | |
| 15 | −#define AIC26_NUM_REGS AIC26_PAGE_ADDR(3, 0) | |
| 12 | +#define AIC26_PAGE_ADDR(page, offset) ((page << 11) | offset << 5) | |
| 16 | 13 | |
| 17 | 14 | /* Page 0: Auxiliary data registers */ |
| 18 | 15 | #define AIC26_REG_BAT1 AIC26_PAGE_ADDR(0, 0x05) |
| @@ -60,9 +60,8 @@ struct aic32x4_rate_divs { · 59 unmodified lines | ||
| 60 | 60 | }; |
| 61 | 61 | |
| 62 | 62 | struct aic32x4_priv { |
| 63 | + struct regmap *regmap; | |
| 63 | 64 | u32 sysclk; |
| 64 | − u8 page_no; | |
| 65 | − void *control_data; | |
| 66 | 65 | u32 power_cfg; |
| 67 | 66 | u32 micpga_routing; |
| 68 | 67 | bool swapdacs; |
| @@ -262,67 +261,25 @@ static const struct snd_soc_dapm_route aic32x4_dapm_routes[] = { · 193 unmodified lines | ||
| 262 | 261 | {"Right ADC", NULL, "Right Input Mixer"}, |
| 263 | 262 | }; |
| 264 | 263 | |
| 265 | −static inline int aic32x4_change_page(struct snd_soc_codec *codec, | |
| 266 | − unsigned int new_page) | |
| 267 | −{ | |
| 268 | − struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); | |
| 269 | − u8 data[2]; | |
| 270 | − int ret; | |
| 271 | − | |
| 272 | − data[0] = 0x00; | |
| 273 | − data[1] = new_page & 0xff; | |
| 274 | − | |
| 275 | − ret = codec->hw_write(codec->control_data, data, 2); | |
| 276 | − if (ret == 2) { | |
| 277 | − aic32x4->page_no = new_page; | |
| 278 | − return 0; | |
| 279 | − } else { | |
| 280 | − return ret; | |
| 281 | − } | |
| 282 | −} | |
| 283 | − | |
| 284 | −static int aic32x4_write(struct snd_soc_codec *codec, unsigned int reg, | |
| 285 | − unsigned int val) | |
| 286 | −{ | |
| 287 | − struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); | |
| 288 | − unsigned int page = reg / 128; | |
| 289 | − unsigned int fixed_reg = reg % 128; | |
| 290 | − u8 data[2]; | |
| 291 | − int ret; | |
| 292 | − | |
| 293 | − /* A write to AIC32X4_PSEL is really a non-explicit page change */ | |
| 294 | − if (reg == AIC32X4_PSEL) | |
| 295 | − return aic32x4_change_page(codec, val); | |
| 296 | − | |
| 297 | − if (aic32x4->page_no != page) { | |
| 298 | − ret = aic32x4_change_page(codec, page); | |
| 299 | − if (ret != 0) | |
| 300 | − return ret; | |
| 301 | − } | |
| 302 | − | |
| 303 | − data[0] = fixed_reg & 0xff; | |
| 304 | − data[1] = val & 0xff; | |
| 305 | − | |
| 306 | − if (codec->hw_write(codec->control_data, data, 2) == 2) | |
| 307 | − return 0; | |
| 308 | − else | |
| 309 | − return -EIO; | |
| 310 | −} | |
| 264 | +static const struct regmap_range_cfg aic32x4_regmap_pages[] = { | |
| 265 | + { | |
| 266 | + .selector_reg = 0, | |
| 267 | + .selector_mask = 0xff, | |
| 268 | + .window_start = 0, | |
| 269 | + .window_len = 128, | |
| 270 | + .range_min = AIC32X4_PAGE1, | |
| 271 | + .range_max = AIC32X4_PAGE1 + 127, | |
| 272 | + }, | |
| 273 | +}; | |
| 311 | 274 | |
| 312 | −static unsigned int aic32x4_read(struct snd_soc_codec *codec, unsigned int reg) | |
| 313 | −{ | |
| 314 | − struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); | |
| 315 | − unsigned int page = reg / 128; | |
| 316 | − unsigned int fixed_reg = reg % 128; | |
| 317 | − int ret; | |
| 275 | +static const struct regmap_config aic32x4_regmap = { | |
| 276 | + .reg_bits = 8, | |
| 277 | + .val_bits = 8, | |
| 318 | 278 | |
| 319 | − if (aic32x4->page_no != page) { | |
| 320 | − ret = aic32x4_change_page(codec, page); | |
| 321 | − if (ret != 0) | |
| 322 | − return ret; | |
| 323 | − } | |
| 324 | − return i2c_smbus_read_byte_data(codec->control_data, fixed_reg & 0xff); | |
| 325 | −} | |
| 279 | + .max_register = AIC32X4_RMICPGAVOL, | |
| 280 | + .ranges = aic32x4_regmap_pages, | |
| 281 | + .num_ranges = ARRAY_SIZE(aic32x4_regmap_pages), | |
| 282 | +}; | |
| 326 | 283 | |
| 327 | 284 | static inline int aic32x4_get_divs(int mclk, int rate) |
| 328 | 285 | { |
| @@ -617,16 +574,10 @@ static int aic32x4_probe(struct snd_soc_codec *codec) · 288 unmodified lines | ||
| 617 | 574 | { |
| 618 | 575 | struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec); |
| 619 | 576 | u32 tmp_reg; |
| 620 | − int ret; | |
| 621 | 577 | |
| 622 | − codec->hw_write = (hw_write_t) i2c_master_send; | |
| 623 | − codec->control_data = aic32x4->control_data; | |
| 578 | + snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); | |
| 624 | 579 | |
| 625 | 580 | if (aic32x4->rstn_gpio >= 0) { |
| 626 | − ret = devm_gpio_request_one(codec->dev, aic32x4->rstn_gpio, | |
| 627 | − GPIOF_OUT_INIT_LOW, "tlv320aic32x4 rstn"); | |
| 628 | − if (ret != 0) | |
| 629 | − return ret; | |
| 630 | 581 | ndelay(10); |
| 631 | 582 | gpio_set_value(aic32x4->rstn_gpio, 1); |
| 632 | 583 | } |
| @@ -692,8 +643,6 @@ static int aic32x4_remove(struct snd_soc_codec *codec) · 59 unmodified lines | ||
| 692 | 643 | } |
| 693 | 644 | |
| 694 | 645 | static struct snd_soc_codec_driver soc_codec_dev_aic32x4 = { |
| 695 | − .read = aic32x4_read, | |
| 696 | − .write = aic32x4_write, | |
| 697 | 646 | .probe = aic32x4_probe, |
| 698 | 647 | .remove = aic32x4_remove, |
| 699 | 648 | .suspend = aic32x4_suspend, |
| @@ -720,7 +669,10 @@ static int aic32x4_i2c_probe(struct i2c_client *i2c, · 20 unmodified lines | ||
| 720 | 669 | if (aic32x4 == NULL) |
| 721 | 670 | return -ENOMEM; |
| 722 | 671 | |
| 723 | − aic32x4->control_data = i2c; | |
| 672 | + aic32x4->regmap = devm_regmap_init_i2c(i2c, &aic32x4_regmap); | |
| 673 | + if (IS_ERR(aic32x4->regmap)) | |
| 674 | + return PTR_ERR(aic32x4->regmap); | |
| 675 | + | |
| 724 | 676 | i2c_set_clientdata(i2c, aic32x4); |
| 725 | 677 | |
| 726 | 678 | if (pdata) { |
| @@ -735,6 +687,13 @@ static int aic32x4_i2c_probe(struct i2c_client *i2c, · 8 unmodified lines | ||
| 735 | 687 | aic32x4->rstn_gpio = -1; |
| 736 | 688 | } |
| 737 | 689 | |
| 690 | + if (aic32x4->rstn_gpio >= 0) { | |
| 691 | + ret = devm_gpio_request_one(&i2c->dev, aic32x4->rstn_gpio, | |
| 692 | + GPIOF_OUT_INIT_LOW, "tlv320aic32x4 rstn"); | |
| 693 | + if (ret != 0) | |
| 694 | + return ret; | |
| 695 | + } | |
| 696 | + | |
| 738 | 697 | ret = snd_soc_register_codec(&i2c->dev, |
| 739 | 698 | &soc_codec_dev_aic32x4, &aic32x4_dai, 1); |
| 740 | 699 | return ret; |
| @@ -40,6 +40,7 @@ · 39 unmodified lines | ||
| 40 | 40 | #include <linux/i2c.h> |
| 41 | 41 | #include <linux/gpio.h> |
| 42 | 42 | #include <linux/regulator/consumer.h> |
| 43 | +#include <linux/of.h> | |
| 43 | 44 | #include <linux/of_gpio.h> |
| 44 | 45 | #include <linux/slab.h> |
| 45 | 46 | #include <sound/core.h> |
| @@ -72,9 +73,9 @@ struct aic3x_disable_nb { · 26 unmodified lines | ||
| 72 | 73 | /* codec private data */ |
| 73 | 74 | struct aic3x_priv { |
| 74 | 75 | struct snd_soc_codec *codec; |
| 76 | + struct regmap *regmap; | |
| 75 | 77 | struct regulator_bulk_data supplies[AIC3X_NUM_SUPPLIES]; |
| 76 | 78 | struct aic3x_disable_nb disable_nb[AIC3X_NUM_SUPPLIES]; |
| 77 | − enum snd_soc_control_type control_type; | |
| 78 | 79 | struct aic3x_setup_data *setup; |
| 79 | 80 | unsigned int sysclk; |
| 80 | 81 | struct list_head list; |
| @@ -90,41 +91,45 @@ struct aic3x_priv { · 9 unmodified lines | ||
| 90 | 91 | enum aic3x_micbias_voltage micbias_vg; |
| 91 | 92 | }; |
| 92 | 93 | |
| 93 | −/* | |
| 94 | − * AIC3X register cache | |
| 95 | − * We can't read the AIC3X register space when we are | |
| 96 | − * using 2 wire for device control, so we cache them instead. | |
| 97 | − * There is no point in caching the reset register | |
| 98 | − */ | |
| 99 | −static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = { | |
| 100 | − 0x00, 0x00, 0x00, 0x10, /* 0 */ | |
| 101 | − 0x04, 0x00, 0x00, 0x00, /* 4 */ | |
| 102 | − 0x00, 0x00, 0x00, 0x01, /* 8 */ | |
| 103 | − 0x00, 0x00, 0x00, 0x80, /* 12 */ | |
| 104 | − 0x80, 0xff, 0xff, 0x78, /* 16 */ | |
| 105 | − 0x78, 0x78, 0x78, 0x78, /* 20 */ | |
| 106 | − 0x78, 0x00, 0x00, 0xfe, /* 24 */ | |
| 107 | − 0x00, 0x00, 0xfe, 0x00, /* 28 */ | |
| 108 | − 0x18, 0x18, 0x00, 0x00, /* 32 */ | |
| 109 | − 0x00, 0x00, 0x00, 0x00, /* 36 */ | |
| 110 | − 0x00, 0x00, 0x00, 0x80, /* 40 */ | |
| 111 | − 0x80, 0x00, 0x00, 0x00, /* 44 */ | |
| 112 | − 0x00, 0x00, 0x00, 0x04, /* 48 */ | |
| 113 | − 0x00, 0x00, 0x00, 0x00, /* 52 */ | |
| 114 | − 0x00, 0x00, 0x04, 0x00, /* 56 */ | |
| 115 | − 0x00, 0x00, 0x00, 0x00, /* 60 */ | |
| 116 | − 0x00, 0x04, 0x00, 0x00, /* 64 */ | |
| 117 | − 0x00, 0x00, 0x00, 0x00, /* 68 */ | |
| 118 | − 0x04, 0x00, 0x00, 0x00, /* 72 */ | |
| 119 | − 0x00, 0x00, 0x00, 0x00, /* 76 */ | |
| 120 | − 0x00, 0x00, 0x00, 0x00, /* 80 */ | |
| 121 | − 0x00, 0x00, 0x00, 0x00, /* 84 */ | |
| 122 | − 0x00, 0x00, 0x00, 0x00, /* 88 */ | |
| 123 | − 0x00, 0x00, 0x00, 0x00, /* 92 */ | |
| 124 | − 0x00, 0x00, 0x00, 0x00, /* 96 */ | |
| 125 | − 0x00, 0x00, 0x02, 0x00, /* 100 */ | |
| 126 | − 0x00, 0x00, 0x00, 0x00, /* 104 */ | |
| 127 | − 0x00, 0x00, /* 108 */ | |
| 94 | +static const struct reg_default aic3x_reg[] = { | |
| 95 | + { 0, 0x00 }, { 1, 0x00 }, { 2, 0x00 }, { 3, 0x10 }, | |
| 96 | + { 4, 0x04 }, { 5, 0x00 }, { 6, 0x00 }, { 7, 0x00 }, | |
| 97 | + { 8, 0x00 }, { 9, 0x00 }, { 10, 0x00 }, { 11, 0x01 }, | |
| 98 | + { 12, 0x00 }, { 13, 0x00 }, { 14, 0x00 }, { 15, 0x80 }, | |
| 99 | + { 16, 0x80 }, { 17, 0xff }, { 18, 0xff }, { 19, 0x78 }, | |
| 100 | + { 20, 0x78 }, { 21, 0x78 }, { 22, 0x78 }, { 23, 0x78 }, | |
| 101 | + { 24, 0x78 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0xfe }, | |
| 102 | + { 28, 0x00 }, { 29, 0x00 }, { 30, 0xfe }, { 31, 0x00 }, | |
| 103 | + { 32, 0x18 }, { 33, 0x18 }, { 34, 0x00 }, { 35, 0x00 }, | |
| 104 | + { 36, 0x00 }, { 37, 0x00 }, { 38, 0x00 }, { 39, 0x00 }, | |
| 105 | + { 40, 0x00 }, { 41, 0x00 }, { 42, 0x00 }, { 43, 0x80 }, | |
| 106 | + { 44, 0x80 }, { 45, 0x00 }, { 46, 0x00 }, { 47, 0x00 }, | |
| 107 | + { 48, 0x00 }, { 49, 0x00 }, { 50, 0x00 }, { 51, 0x04 }, | |
| 108 | + { 52, 0x00 }, { 53, 0x00 }, { 54, 0x00 }, { 55, 0x00 }, | |
| 109 | + { 56, 0x00 }, { 57, 0x00 }, { 58, 0x04 }, { 59, 0x00 }, | |
| 110 | + { 60, 0x00 }, { 61, 0x00 }, { 62, 0x00 }, { 63, 0x00 }, | |
| 111 | + { 64, 0x00 }, { 65, 0x04 }, { 66, 0x00 }, { 67, 0x00 }, | |
| 112 | + { 68, 0x00 }, { 69, 0x00 }, { 70, 0x00 }, { 71, 0x00 }, | |
| 113 | + { 72, 0x04 }, { 73, 0x00 }, { 74, 0x00 }, { 75, 0x00 }, | |
| 114 | + { 76, 0x00 }, { 77, 0x00 }, { 78, 0x00 }, { 79, 0x00 }, | |
| 115 | + { 80, 0x00 }, { 81, 0x00 }, { 82, 0x00 }, { 83, 0x00 }, | |
| 116 | + { 84, 0x00 }, { 85, 0x00 }, { 86, 0x00 }, { 87, 0x00 }, | |
| 117 | + { 88, 0x00 }, { 89, 0x00 }, { 90, 0x00 }, { 91, 0x00 }, | |
| 118 | + { 92, 0x00 }, { 93, 0x00 }, { 94, 0x00 }, { 95, 0x00 }, | |
| 119 | + { 96, 0x00 }, { 97, 0x00 }, { 98, 0x00 }, { 99, 0x00 }, | |
| 120 | + { 100, 0x00 }, { 101, 0x00 }, { 102, 0x02 }, { 103, 0x00 }, | |
| 121 | + { 104, 0x00 }, { 105, 0x00 }, { 106, 0x00 }, { 107, 0x00 }, | |
| 122 | + { 108, 0x00 }, { 109, 0x00 }, | |
| 123 | +}; | |
| 124 | + | |
| 125 | +static const struct regmap_config aic3x_regmap = { | |
| 126 | + .reg_bits = 8, | |
| 127 | + .val_bits = 8, | |
| 128 | + | |
| 129 | + .max_register = DAC_ICC_ADJ, | |
| 130 | + .reg_defaults = aic3x_reg, | |
| 131 | + .num_reg_defaults = ARRAY_SIZE(aic3x_reg), | |
| 132 | + .cache_type = REGCACHE_RBTREE, | |
| 128 | 133 | }; |
| 129 | 134 | |
| 130 | 135 | #define SOC_DAPM_SINGLE_AIC3X(xname, reg, shift, mask, invert) \ |
| @@ -828,12 +833,6 @@ static int aic3x_add_widgets(struct snd_soc_codec *codec) · 697 unmodified lines | ||
| 828 | 833 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); |
| 829 | 834 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
| 830 | 835 | |
| 831 | − snd_soc_dapm_new_controls(dapm, aic3x_dapm_widgets, | |
| 832 | − ARRAY_SIZE(aic3x_dapm_widgets)); | |
| 833 | − | |
| 834 | − /* set up audio path interconnects */ | |
| 835 | − snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon)); | |
| 836 | − | |
| 837 | 836 | if (aic3x->model == AIC3X_MODEL_3007) { |
| 838 | 837 | snd_soc_dapm_new_controls(dapm, aic3007_dapm_widgets, |
| 839 | 838 | ARRAY_SIZE(aic3007_dapm_widgets)); |
| @@ -1082,29 +1081,6 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai, · 242 unmodified lines | ||
| 1082 | 1081 | return 0; |
| 1083 | 1082 | } |
| 1084 | 1083 | |
| 1085 | −static int aic3x_init_3007(struct snd_soc_codec *codec) | |
| 1086 | −{ | |
| 1087 | − u8 tmp1, tmp2, *cache = codec->reg_cache; | |
| 1088 | − | |
| 1089 | − /* | |
| 1090 | − * There is no need to cache writes to undocumented page 0xD but | |
| 1091 | − * respective page 0 register cache entries must be preserved | |
| 1092 | − */ | |
| 1093 | − tmp1 = cache[0xD]; | |
| 1094 | − tmp2 = cache[0x8]; | |
| 1095 | − /* Class-D speaker driver init; datasheet p. 46 */ | |
| 1096 | − snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x0D); | |
| 1097 | − snd_soc_write(codec, 0xD, 0x0D); | |
| 1098 | − snd_soc_write(codec, 0x8, 0x5C); | |
| 1099 | − snd_soc_write(codec, 0x8, 0x5D); | |
| 1100 | − snd_soc_write(codec, 0x8, 0x5C); | |
| 1101 | − snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x00); | |
| 1102 | − cache[0xD] = tmp1; | |
| 1103 | − cache[0x8] = tmp2; | |
| 1104 | − | |
| 1105 | − return 0; | |
| 1106 | −} | |
| 1107 | − | |
| 1108 | 1084 | static int aic3x_regulator_event(struct notifier_block *nb, |
| 1109 | 1085 | unsigned long event, void *data) |
| 1110 | 1086 | { |
| @@ -1119,7 +1095,7 @@ static int aic3x_regulator_event(struct notifier_block *nb, · 8 unmodified lines | ||
| 1119 | 1095 | */ |
| 1120 | 1096 | if (gpio_is_valid(aic3x->gpio_reset)) |
| 1121 | 1097 | gpio_set_value(aic3x->gpio_reset, 0); |
| 1122 | − aic3x->codec->cache_sync = 1; | |
| 1098 | + regcache_mark_dirty(aic3x->regmap); | |
| 1123 | 1099 | } |
| 1124 | 1100 | |
| 1125 | 1101 | return 0; |
| @@ -1128,8 +1104,7 @@ static int aic3x_regulator_event(struct notifier_block *nb, · 2 unmodified lines | ||
| 1128 | 1104 | static int aic3x_set_power(struct snd_soc_codec *codec, int power) |
| 1129 | 1105 | { |
| 1130 | 1106 | struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); |
| 1131 | − int i, ret; | |
| 1132 | − u8 *cache = codec->reg_cache; | |
| 1107 | + int ret; | |
| 1133 | 1108 | |
| 1134 | 1109 | if (power) { |
| 1135 | 1110 | ret = regulator_bulk_enable(ARRAY_SIZE(aic3x->supplies), |
| @@ -1137,12 +1112,6 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power) · 1 unmodified line | ||
| 1137 | 1112 | if (ret) |
| 1138 | 1113 | goto out; |
| 1139 | 1114 | aic3x->power = 1; |
| 1140 | − /* | |
| 1141 | − * Reset release and cache sync is necessary only if some | |
| 1142 | − * supply was off or if there were cached writes | |
| 1143 | − */ | |
| 1144 | − if (!codec->cache_sync) | |
| 1145 | − goto out; | |
| 1146 | 1115 | |
| 1147 | 1116 | if (gpio_is_valid(aic3x->gpio_reset)) { |
| 1148 | 1117 | udelay(1); |
| @@ -1150,12 +1119,8 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power) · 1 unmodified line | ||
| 1150 | 1119 | } |
| 1151 | 1120 | |
| 1152 | 1121 | /* Sync reg_cache with the hardware */ |
| 1153 | − codec->cache_only = 0; | |
| 1154 | − for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++) | |
| 1155 | − snd_soc_write(codec, i, cache[i]); | |
| 1156 | − if (aic3x->model == AIC3X_MODEL_3007) | |
| 1157 | − aic3x_init_3007(codec); | |
| 1158 | − codec->cache_sync = 0; | |
| 1122 | + regcache_cache_only(aic3x->regmap, false); | |
| 1123 | + regcache_sync(aic3x->regmap); | |
| 1159 | 1124 | } else { |
| 1160 | 1125 | /* |
| 1161 | 1126 | * Do soft reset to this codec instance in order to clear |
| @@ -1163,10 +1128,10 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power) · 1 unmodified line | ||
| 1163 | 1128 | * remain on |
| 1164 | 1129 | */ |
| 1165 | 1130 | snd_soc_write(codec, AIC3X_RESET, SOFT_RESET); |
| 1166 | − codec->cache_sync = 1; | |
| 1131 | + regcache_mark_dirty(aic3x->regmap); | |
| 1167 | 1132 | aic3x->power = 0; |
| 1168 | 1133 | /* HW writes are needless when bias is off */ |
| 1169 | − codec->cache_only = 1; | |
| 1134 | + regcache_cache_only(aic3x->regmap, true); | |
| 1170 | 1135 | ret = regulator_bulk_disable(ARRAY_SIZE(aic3x->supplies), |
| 1171 | 1136 | aic3x->supplies); |
| 1172 | 1137 | } |
| @@ -1321,7 +1286,6 @@ static int aic3x_init(struct snd_soc_codec *codec) · 148 unmodified lines | ||
| 1321 | 1286 | snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); |
| 1322 | 1287 | |
| 1323 | 1288 | if (aic3x->model == AIC3X_MODEL_3007) { |
| 1324 | − aic3x_init_3007(codec); | |
| 1325 | 1289 | snd_soc_write(codec, CLASSD_CTRL, 0); |
| 1326 | 1290 | } |
| 1327 | 1291 | |
| @@ -1349,29 +1313,12 @@ static int aic3x_probe(struct snd_soc_codec *codec) · 21 unmodified lines | ||
| 1349 | 1313 | INIT_LIST_HEAD(&aic3x->list); |
| 1350 | 1314 | aic3x->codec = codec; |
| 1351 | 1315 | |
| 1352 | − ret = snd_soc_codec_set_cache_io(codec, 8, 8, aic3x->control_type); | |
| 1316 | + ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP); | |
| 1353 | 1317 | if (ret != 0) { |
| 1354 | 1318 | dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); |
| 1355 | 1319 | return ret; |
| 1356 | 1320 | } |
| 1357 | 1321 | |
| 1358 | − if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1359 | − !aic3x_is_shared_reset(aic3x)) { | |
| 1360 | − ret = gpio_request(aic3x->gpio_reset, "tlv320aic3x reset"); | |
| 1361 | − if (ret != 0) | |
| 1362 | − goto err_gpio; | |
| 1363 | − gpio_direction_output(aic3x->gpio_reset, 0); | |
| 1364 | − } | |
| 1365 | − | |
| 1366 | − for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) | |
| 1367 | − aic3x->supplies[i].supply = aic3x_supply_names[i]; | |
| 1368 | − | |
| 1369 | − ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(aic3x->supplies), | |
| 1370 | − aic3x->supplies); | |
| 1371 | − if (ret != 0) { | |
| 1372 | − dev_err(codec->dev, "Failed to request supplies: %d\n", ret); | |
| 1373 | − goto err_get; | |
| 1374 | − } | |
| 1375 | 1322 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) { |
| 1376 | 1323 | aic3x->disable_nb[i].nb.notifier_call = aic3x_regulator_event; |
| 1377 | 1324 | aic3x->disable_nb[i].aic3x = aic3x; |
| @@ -1385,7 +1332,7 @@ static int aic3x_probe(struct snd_soc_codec *codec) · 7 unmodified lines | ||
| 1385 | 1332 | } |
| 1386 | 1333 | } |
| 1387 | 1334 | |
| 1388 | − codec->cache_only = 1; | |
| 1335 | + regcache_mark_dirty(aic3x->regmap); | |
| 1389 | 1336 | aic3x_init(codec); |
| 1390 | 1337 | |
| 1391 | 1338 | if (aic3x->setup) { |
| @@ -1396,8 +1343,6 @@ static int aic3x_probe(struct snd_soc_codec *codec) · 4 unmodified lines | ||
| 1396 | 1343 | (aic3x->setup->gpio_func[1] & 0xf) << 4); |
| 1397 | 1344 | } |
| 1398 | 1345 | |
| 1399 | − snd_soc_add_codec_controls(codec, aic3x_snd_controls, | |
| 1400 | − ARRAY_SIZE(aic3x_snd_controls)); | |
| 1401 | 1346 | if (aic3x->model == AIC3X_MODEL_3007) |
| 1402 | 1347 | snd_soc_add_codec_controls(codec, &aic3x_classd_amp_gain_ctrl, 1); |
| 1403 | 1348 | |
| @@ -1428,12 +1373,6 @@ err_notif: · 24 unmodified lines | ||
| 1428 | 1373 | while (i--) |
| 1429 | 1374 | regulator_unregister_notifier(aic3x->supplies[i].consumer, |
| 1430 | 1375 | &aic3x->disable_nb[i].nb); |
| 1431 | − regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | |
| 1432 | −err_get: | |
| 1433 | − if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1434 | − !aic3x_is_shared_reset(aic3x)) | |
| 1435 | − gpio_free(aic3x->gpio_reset); | |
| 1436 | −err_gpio: | |
| 1437 | 1376 | return ret; |
| 1438 | 1377 | } |
| 1439 | 1378 | |
| @@ -1444,15 +1383,9 @@ static int aic3x_remove(struct snd_soc_codec *codec) · 4 unmodified lines | ||
| 1444 | 1383 | |
| 1445 | 1384 | aic3x_set_bias_level(codec, SND_SOC_BIAS_OFF); |
| 1446 | 1385 | list_del(&aic3x->list); |
| 1447 | − if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1448 | − !aic3x_is_shared_reset(aic3x)) { | |
| 1449 | − gpio_set_value(aic3x->gpio_reset, 0); | |
| 1450 | − gpio_free(aic3x->gpio_reset); | |
| 1451 | − } | |
| 1452 | 1386 | for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) |
| 1453 | 1387 | regulator_unregister_notifier(aic3x->supplies[i].consumer, |
| 1454 | 1388 | &aic3x->disable_nb[i].nb); |
| 1455 | − regulator_bulk_free(ARRAY_SIZE(aic3x->supplies), aic3x->supplies); | |
| 1456 | 1389 | |
| 1457 | 1390 | return 0; |
| 1458 | 1391 | } |
| @@ -1460,13 +1393,16 @@ static int aic3x_remove(struct snd_soc_codec *codec) · 1 unmodified line | ||
| 1460 | 1393 | static struct snd_soc_codec_driver soc_codec_dev_aic3x = { |
| 1461 | 1394 | .set_bias_level = aic3x_set_bias_level, |
| 1462 | 1395 | .idle_bias_off = true, |
| 1463 | − .reg_cache_size = ARRAY_SIZE(aic3x_reg), | |
| 1464 | − .reg_word_size = sizeof(u8), | |
| 1465 | − .reg_cache_default = aic3x_reg, | |
| 1466 | 1396 | .probe = aic3x_probe, |
| 1467 | 1397 | .remove = aic3x_remove, |
| 1468 | 1398 | .suspend = aic3x_suspend, |
| 1469 | 1399 | .resume = aic3x_resume, |
| 1400 | + .controls = aic3x_snd_controls, | |
| 1401 | + .num_controls = ARRAY_SIZE(aic3x_snd_controls), | |
| 1402 | + .dapm_widgets = aic3x_dapm_widgets, | |
| 1403 | + .num_dapm_widgets = ARRAY_SIZE(aic3x_dapm_widgets), | |
| 1404 | + .dapm_routes = intercon, | |
| 1405 | + .num_dapm_routes = ARRAY_SIZE(intercon), | |
| 1470 | 1406 | }; |
| 1471 | 1407 | |
| 1472 | 1408 | /* |
| @@ -1483,6 +1419,16 @@ static const struct i2c_device_id aic3x_i2c_id[] = { · 10 unmodified lines | ||
| 1483 | 1419 | }; |
| 1484 | 1420 | MODULE_DEVICE_TABLE(i2c, aic3x_i2c_id); |
| 1485 | 1421 | |
| 1422 | +static const struct reg_default aic3007_class_d[] = { | |
| 1423 | + /* Class-D speaker driver init; datasheet p. 46 */ | |
| 1424 | + { AIC3X_PAGE_SELECT, 0x0D }, | |
| 1425 | + { 0xD, 0x0D }, | |
| 1426 | + { 0x8, 0x5C }, | |
| 1427 | + { 0x8, 0x5D }, | |
| 1428 | + { 0x8, 0x5C }, | |
| 1429 | + { AIC3X_PAGE_SELECT, 0x00 }, | |
| 1430 | +}; | |
| 1431 | + | |
| 1486 | 1432 | /* |
| 1487 | 1433 | * If the i2c layer weren't so broken, we could pass this kind of data |
| 1488 | 1434 | * around |
| @@ -1494,7 +1440,7 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, · 5 unmodified lines | ||
| 1494 | 1440 | struct aic3x_priv *aic3x; |
| 1495 | 1441 | struct aic3x_setup_data *ai3x_setup; |
| 1496 | 1442 | struct device_node *np = i2c->dev.of_node; |
| 1497 | − int ret; | |
| 1443 | + int ret, i; | |
| 1498 | 1444 | u32 value; |
| 1499 | 1445 | |
| 1500 | 1446 | aic3x = devm_kzalloc(&i2c->dev, sizeof(struct aic3x_priv), GFP_KERNEL); |
| @@ -1503,7 +1449,13 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, · 2 unmodified lines | ||
| 1503 | 1449 | return -ENOMEM; |
| 1504 | 1450 | } |
| 1505 | 1451 | |
| 1506 | − aic3x->control_type = SND_SOC_I2C; | |
| 1452 | + aic3x->regmap = devm_regmap_init_i2c(i2c, &aic3x_regmap); | |
| 1453 | + if (IS_ERR(aic3x->regmap)) { | |
| 1454 | + ret = PTR_ERR(aic3x->regmap); | |
| 1455 | + return ret; | |
| 1456 | + } | |
| 1457 | + | |
| 1458 | + regcache_cache_only(aic3x->regmap, true); | |
| 1507 | 1459 | |
| 1508 | 1460 | i2c_set_clientdata(i2c, aic3x); |
| 1509 | 1461 | if (pdata) { |
| @@ -1555,14 +1507,54 @@ static int aic3x_i2c_probe(struct i2c_client *i2c, · 45 unmodified lines | ||
| 1555 | 1507 | |
| 1556 | 1508 | aic3x->model = id->driver_data; |
| 1557 | 1509 | |
| 1510 | + if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1511 | + !aic3x_is_shared_reset(aic3x)) { | |
| 1512 | + ret = gpio_request(aic3x->gpio_reset, "tlv320aic3x reset"); | |
| 1513 | + if (ret != 0) | |
| 1514 | + goto err; | |
| 1515 | + gpio_direction_output(aic3x->gpio_reset, 0); | |
| 1516 | + } | |
| 1517 | + | |
| 1518 | + for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) | |
| 1519 | + aic3x->supplies[i].supply = aic3x_supply_names[i]; | |
| 1520 | + | |
| 1521 | + ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(aic3x->supplies), | |
| 1522 | + aic3x->supplies); | |
| 1523 | + if (ret != 0) { | |
| 1524 | + dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); | |
| 1525 | + goto err_gpio; | |
| 1526 | + } | |
| 1527 | + | |
| 1528 | + if (aic3x->model == AIC3X_MODEL_3007) { | |
| 1529 | + ret = regmap_register_patch(aic3x->regmap, aic3007_class_d, | |
| 1530 | + ARRAY_SIZE(aic3007_class_d)); | |
| 1531 | + if (ret != 0) | |
| 1532 | + dev_err(&i2c->dev, "Failed to init class D: %d\n", | |
| 1533 | + ret); | |
| 1534 | + } | |
| 1535 | + | |
| 1558 | 1536 | ret = snd_soc_register_codec(&i2c->dev, |
| 1559 | 1537 | &soc_codec_dev_aic3x, &aic3x_dai, 1); |
| 1560 | 1538 | return ret; |
| 1539 | + | |
| 1540 | +err_gpio: | |
| 1541 | + if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1542 | + !aic3x_is_shared_reset(aic3x)) | |
| 1543 | + gpio_free(aic3x->gpio_reset); | |
| 1544 | +err: | |
| 1545 | + return ret; | |
| 1561 | 1546 | } |
| 1562 | 1547 | |
| 1563 | 1548 | static int aic3x_i2c_remove(struct i2c_client *client) |
| 1564 | 1549 | { |
| 1550 | + struct aic3x_priv *aic3x = i2c_get_clientdata(client); | |
| 1551 | + | |
| 1565 | 1552 | snd_soc_unregister_codec(&client->dev); |
| 1553 | + if (gpio_is_valid(aic3x->gpio_reset) && | |
| 1554 | + !aic3x_is_shared_reset(aic3x)) { | |
| 1555 | + gpio_set_value(aic3x->gpio_reset, 0); | |
| 1556 | + gpio_free(aic3x->gpio_reset); | |
| 1557 | + } | |
| 1566 | 1558 | return 0; |
| 1567 | 1559 | } |
| 1568 | 1560 | |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <sound/tpa6130a2-plat.h> |
| 31 | 31 | #include <sound/soc.h> |
| 32 | 32 | #include <sound/tlv.h> |
| 33 | +#include <linux/of_gpio.h> | |
| 33 | 34 | |
| 34 | 35 | #include "tpa6130a2.h" |
| 35 | 36 | |
| @@ -55,7 +56,8 @@ static int tpa6130a2_i2c_read(int reg) · 19 unmodified lines | ||
| 55 | 56 | struct tpa6130a2_data *data; |
| 56 | 57 | int val; |
| 57 | 58 | |
| 58 | − BUG_ON(tpa6130a2_client == NULL); | |
| 59 | + if (WARN_ON(!tpa6130a2_client)) | |
| 60 | + return -EINVAL; | |
| 59 | 61 | data = i2c_get_clientdata(tpa6130a2_client); |
| 60 | 62 | |
| 61 | 63 | /* If powered off, return the cached value */ |
| @@ -77,7 +79,8 @@ static int tpa6130a2_i2c_write(int reg, u8 value) · 15 unmodified lines | ||
| 77 | 79 | struct tpa6130a2_data *data; |
| 78 | 80 | int val = 0; |
| 79 | 81 | |
| 80 | − BUG_ON(tpa6130a2_client == NULL); | |
| 82 | + if (WARN_ON(!tpa6130a2_client)) | |
| 83 | + return -EINVAL; | |
| 81 | 84 | data = i2c_get_clientdata(tpa6130a2_client); |
| 82 | 85 | |
| 83 | 86 | if (data->power_state) { |
| @@ -98,7 +101,8 @@ static u8 tpa6130a2_read(int reg) · 14 unmodified lines | ||
| 98 | 101 | { |
| 99 | 102 | struct tpa6130a2_data *data; |
| 100 | 103 | |
| 101 | − BUG_ON(tpa6130a2_client == NULL); | |
| 104 | + if (WARN_ON(!tpa6130a2_client)) | |
| 105 | + return 0; | |
| 102 | 106 | data = i2c_get_clientdata(tpa6130a2_client); |
| 103 | 107 | |
| 104 | 108 | return data->regs[reg]; |
| @@ -109,7 +113,8 @@ static int tpa6130a2_initialize(void) · 4 unmodified lines | ||
| 109 | 113 | struct tpa6130a2_data *data; |
| 110 | 114 | int i, ret = 0; |
| 111 | 115 | |
| 112 | − BUG_ON(tpa6130a2_client == NULL); | |
| 116 | + if (WARN_ON(!tpa6130a2_client)) | |
| 117 | + return -EINVAL; | |
| 113 | 118 | data = i2c_get_clientdata(tpa6130a2_client); |
| 114 | 119 | |
| 115 | 120 | for (i = 1; i < TPA6130A2_REG_VERSION; i++) { |
| @@ -127,7 +132,8 @@ static int tpa6130a2_power(u8 power) · 11 unmodified lines | ||
| 127 | 132 | u8 val; |
| 128 | 133 | int ret = 0; |
| 129 | 134 | |
| 130 | − BUG_ON(tpa6130a2_client == NULL); | |
| 135 | + if (WARN_ON(!tpa6130a2_client)) | |
| 136 | + return -EINVAL; | |
| 131 | 137 | data = i2c_get_clientdata(tpa6130a2_client); |
| 132 | 138 | |
| 133 | 139 | mutex_lock(&data->mutex); |
| @@ -193,7 +199,8 @@ static int tpa6130a2_get_volsw(struct snd_kcontrol *kcontrol, · 59 unmodified lines | ||
| 193 | 199 | unsigned int mask = (1 << fls(max)) - 1; |
| 194 | 200 | unsigned int invert = mc->invert; |
| 195 | 201 | |
| 196 | − BUG_ON(tpa6130a2_client == NULL); | |
| 202 | + if (WARN_ON(!tpa6130a2_client)) | |
| 203 | + return -EINVAL; | |
| 197 | 204 | data = i2c_get_clientdata(tpa6130a2_client); |
| 198 | 205 | |
| 199 | 206 | mutex_lock(&data->mutex); |
| @@ -223,7 +230,8 @@ static int tpa6130a2_put_volsw(struct snd_kcontrol *kcontrol, · 23 unmodified lines | ||
| 223 | 230 | unsigned int val = (ucontrol->value.integer.value[0] & mask); |
| 224 | 231 | unsigned int val_reg; |
| 225 | 232 | |
| 226 | − BUG_ON(tpa6130a2_client == NULL); | |
| 233 | + if (WARN_ON(!tpa6130a2_client)) | |
| 234 | + return -EINVAL; | |
| 227 | 235 | data = i2c_get_clientdata(tpa6130a2_client); |
| 228 | 236 | |
| 229 | 237 | if (invert) |
| @@ -364,30 +372,33 @@ static int tpa6130a2_probe(struct i2c_client *client, · 134 unmodified lines | ||
| 364 | 372 | { |
| 365 | 373 | struct device *dev; |
| 366 | 374 | struct tpa6130a2_data *data; |
| 367 | − struct tpa6130a2_platform_data *pdata; | |
| 375 | + struct tpa6130a2_platform_data *pdata = client->dev.platform_data; | |
| 376 | + struct device_node *np = client->dev.of_node; | |
| 368 | 377 | const char *regulator; |
| 369 | 378 | int ret; |
| 370 | 379 | |
| 371 | 380 | dev = &client->dev; |
| 372 | 381 | |
| 373 | − if (client->dev.platform_data == NULL) { | |
| 374 | − dev_err(dev, "Platform data not set\n"); | |
| 375 | − dump_stack(); | |
| 376 | − return -ENODEV; | |
| 377 | − } | |
| 378 | − | |
| 379 | 382 | data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL); |
| 380 | 383 | if (data == NULL) { |
| 381 | 384 | dev_err(dev, "Can not allocate memory\n"); |
| 382 | 385 | return -ENOMEM; |
| 383 | 386 | } |
| 384 | 387 | |
| 388 | + if (pdata) { | |
| 389 | + data->power_gpio = pdata->power_gpio; | |
| 390 | + } else if (np) { | |
| 391 | + data->power_gpio = of_get_named_gpio(np, "power-gpio", 0); | |
| 392 | + } else { | |
| 393 | + dev_err(dev, "Platform data not set\n"); | |
| 394 | + dump_stack(); | |
| 395 | + return -ENODEV; | |
| 396 | + } | |
| 397 | + | |
| 385 | 398 | tpa6130a2_client = client; |
| 386 | 399 | |
| 387 | 400 | i2c_set_clientdata(tpa6130a2_client, data); |
| 388 | 401 | |
| 389 | − pdata = client->dev.platform_data; | |
| 390 | − data->power_gpio = pdata->power_gpio; | |
| 391 | 402 | data->id = id->driver_data; |
| 392 | 403 | |
| 393 | 404 | mutex_init(&data->mutex); |
| @@ -466,10 +477,20 @@ static const struct i2c_device_id tpa6130a2_id[] = { · 72 unmodified lines | ||
| 466 | 477 | }; |
| 467 | 478 | MODULE_DEVICE_TABLE(i2c, tpa6130a2_id); |
| 468 | 479 | |
| 480 | +#if IS_ENABLED(CONFIG_OF) | |
| 481 | +static const struct of_device_id tpa6130a2_of_match[] = { | |
| 482 | + { .compatible = "ti,tpa6130a2", }, | |
| 483 | + { .compatible = "ti,tpa6140a2" }, | |
| 484 | + {}, | |
| 485 | +}; | |
| 486 | +MODULE_DEVICE_TABLE(of, tpa6130a2_of_match); | |
| 487 | +#endif | |
| 488 | + | |
| 469 | 489 | static struct i2c_driver tpa6130a2_i2c_driver = { |
| 470 | 490 | .driver = { |
| 471 | 491 | .name = "tpa6130a2", |
| 472 | 492 | .owner = THIS_MODULE, |
| 493 | + .of_match_table = of_match_ptr(tpa6130a2_of_match), | |
| 473 | 494 | }, |
| 474 | 495 | .probe = tpa6130a2_probe, |
| 475 | 496 | .remove = tpa6130a2_remove, |
| @@ -46,13 +46,7 @@ · 45 unmodified lines | ||
| 46 | 46 | /* TWL4030 PMBR1 Register GPIO6 mux bits */ |
| 47 | 47 | #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2) |
| 48 | 48 | |
| 49 | −/* Shadow register used by the audio driver */ | |
| 50 | −#define TWL4030_REG_SW_SHADOW 0x4A | |
| 51 | −#define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1) | |
| 52 | − | |
| 53 | −/* TWL4030_REG_SW_SHADOW (0x4A) Fields */ | |
| 54 | −#define TWL4030_HFL_EN 0x01 | |
| 55 | −#define TWL4030_HFR_EN 0x02 | |
| 49 | +#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1) | |
| 56 | 50 | |
| 57 | 51 | /* |
| 58 | 52 | * twl4030 register cache & default register settings |
| @@ -132,7 +126,6 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { · 73 unmodified lines | ||
| 132 | 126 | 0x00, /* REG_VIBRA_PWM_SET (0x47) */ |
| 133 | 127 | 0x00, /* REG_ANAMIC_GAIN (0x48) */ |
| 134 | 128 | 0x00, /* REG_MISC_SET_2 (0x49) */ |
| 135 | − 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */ | |
| 136 | 129 | }; |
| 137 | 130 | |
| 138 | 131 | /* codec private data */ |
| @@ -198,42 +191,41 @@ static int twl4030_write(struct snd_soc_codec *codec, · 59 unmodified lines | ||
| 198 | 191 | int write_to_reg = 0; |
| 199 | 192 | |
| 200 | 193 | twl4030_write_reg_cache(codec, reg, value); |
| 201 | − if (likely(reg < TWL4030_REG_SW_SHADOW)) { | |
| 202 | − /* Decide if the given register can be written */ | |
| 203 | − switch (reg) { | |
| 204 | − case TWL4030_REG_EAR_CTL: | |
| 205 | − if (twl4030->earpiece_enabled) | |
| 206 | − write_to_reg = 1; | |
| 207 | − break; | |
| 208 | − case TWL4030_REG_PREDL_CTL: | |
| 209 | − if (twl4030->predrivel_enabled) | |
| 210 | − write_to_reg = 1; | |
| 211 | − break; | |
| 212 | − case TWL4030_REG_PREDR_CTL: | |
| 213 | − if (twl4030->predriver_enabled) | |
| 214 | − write_to_reg = 1; | |
| 215 | − break; | |
| 216 | − case TWL4030_REG_PRECKL_CTL: | |
| 217 | − if (twl4030->carkitl_enabled) | |
| 218 | − write_to_reg = 1; | |
| 219 | − break; | |
| 220 | − case TWL4030_REG_PRECKR_CTL: | |
| 221 | − if (twl4030->carkitr_enabled) | |
| 222 | − write_to_reg = 1; | |
| 223 | − break; | |
| 224 | − case TWL4030_REG_HS_GAIN_SET: | |
| 225 | − if (twl4030->hsl_enabled || twl4030->hsr_enabled) | |
| 226 | − write_to_reg = 1; | |
| 227 | − break; | |
| 228 | − default: | |
| 229 | − /* All other register can be written */ | |
| 194 | + /* Decide if the given register can be written */ | |
| 195 | + switch (reg) { | |
| 196 | + case TWL4030_REG_EAR_CTL: | |
| 197 | + if (twl4030->earpiece_enabled) | |
| 230 | 198 | write_to_reg = 1; |
| 231 | − break; | |
| 232 | − } | |
| 233 | − if (write_to_reg) | |
| 234 | − return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, | |
| 235 | − value, reg); | |
| 199 | + break; | |
| 200 | + case TWL4030_REG_PREDL_CTL: | |
| 201 | + if (twl4030->predrivel_enabled) | |
| 202 | + write_to_reg = 1; | |
| 203 | + break; | |
| 204 | + case TWL4030_REG_PREDR_CTL: | |
| 205 | + if (twl4030->predriver_enabled) | |
| 206 | + write_to_reg = 1; | |
| 207 | + break; | |
| 208 | + case TWL4030_REG_PRECKL_CTL: | |
| 209 | + if (twl4030->carkitl_enabled) | |
| 210 | + write_to_reg = 1; | |
| 211 | + break; | |
| 212 | + case TWL4030_REG_PRECKR_CTL: | |
| 213 | + if (twl4030->carkitr_enabled) | |
| 214 | + write_to_reg = 1; | |
| 215 | + break; | |
| 216 | + case TWL4030_REG_HS_GAIN_SET: | |
| 217 | + if (twl4030->hsl_enabled || twl4030->hsr_enabled) | |
| 218 | + write_to_reg = 1; | |
| 219 | + break; | |
| 220 | + default: | |
| 221 | + /* All other register can be written */ | |
| 222 | + write_to_reg = 1; | |
| 223 | + break; | |
| 236 | 224 | } |
| 225 | + if (write_to_reg) | |
| 226 | + return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, | |
| 227 | + value, reg); | |
| 228 | + | |
| 237 | 229 | return 0; |
| 238 | 230 | } |
| 239 | 231 | |
| @@ -532,7 +524,7 @@ SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum); · 292 unmodified lines | ||
| 532 | 524 | |
| 533 | 525 | /* Handsfree Left virtual mute */ |
| 534 | 526 | static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control = |
| 535 | − SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0); | |
| 527 | + SOC_DAPM_SINGLE_VIRT("Switch", 1); | |
| 536 | 528 | |
| 537 | 529 | /* Handsfree Right */ |
| 538 | 530 | static const char *twl4030_handsfreer_texts[] = |
| @@ -548,7 +540,7 @@ SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum); · 9 unmodified lines | ||
| 548 | 540 | |
| 549 | 541 | /* Handsfree Right virtual mute */ |
| 550 | 542 | static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control = |
| 551 | − SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0); | |
| 543 | + SOC_DAPM_SINGLE_VIRT("Switch", 1); | |
| 552 | 544 | |
| 553 | 545 | /* Vibra */ |
| 554 | 546 | /* Vibra audio path selection */ |
| @@ -54,12 +54,7 @@ enum twl6040_dai_id { · 53 unmodified lines | ||
| 54 | 54 | #define TWL6040_OUTHF_0dB 0x03 |
| 55 | 55 | #define TWL6040_OUTHF_M52dB 0x1D |
| 56 | 56 | |
| 57 | −/* Shadow register used by the driver */ | |
| 58 | −#define TWL6040_REG_SW_SHADOW 0x2F | |
| 59 | −#define TWL6040_CACHEREGNUM (TWL6040_REG_SW_SHADOW + 1) | |
| 60 | − | |
| 61 | −/* TWL6040_REG_SW_SHADOW (0x2F) fields */ | |
| 62 | −#define TWL6040_EAR_PATH_ENABLE 0x01 | |
| 57 | +#define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1) | |
| 63 | 58 | |
| 64 | 59 | struct twl6040_jack_data { |
| 65 | 60 | struct snd_soc_jack *jack; |
| @@ -135,8 +130,6 @@ static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { · 69 unmodified lines | ||
| 135 | 130 | 0x00, /* REG_HFOTRIM 0x2C */ |
| 136 | 131 | 0x09, /* REG_ACCCTL 0x2D */ |
| 137 | 132 | 0x00, /* REG_STATUS 0x2E (ro) */ |
| 138 | − | |
| 139 | − 0x00, /* REG_SW_SHADOW 0x2F - Shadow, non HW register */ | |
| 140 | 133 | }; |
| 141 | 134 | |
| 142 | 135 | /* List of registers to be restored after power up */ |
| @@ -220,12 +213,8 @@ static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, · 77 unmodified lines | ||
| 220 | 213 | if (reg >= TWL6040_CACHEREGNUM) |
| 221 | 214 | return -EIO; |
| 222 | 215 | |
| 223 | − if (likely(reg < TWL6040_REG_SW_SHADOW)) { | |
| 224 | − value = twl6040_reg_read(twl6040, reg); | |
| 225 | − twl6040_write_reg_cache(codec, reg, value); | |
| 226 | − } else { | |
| 227 | − value = twl6040_read_reg_cache(codec, reg); | |
| 228 | − } | |
| 216 | + value = twl6040_reg_read(twl6040, reg); | |
| 217 | + twl6040_write_reg_cache(codec, reg, value); | |
| 229 | 218 | |
| 230 | 219 | return value; |
| 231 | 220 | } |
| @@ -246,7 +235,7 @@ static bool twl6040_is_path_unmuted(struct snd_soc_codec *codec, · 14 unmodified lines | ||
| 246 | 235 | return priv->dl2_unmuted; |
| 247 | 236 | default: |
| 248 | 237 | return 1; |
| 249 | − }; | |
| 238 | + } | |
| 250 | 239 | } |
| 251 | 240 | |
| 252 | 241 | /* |
| @@ -261,8 +250,7 @@ static int twl6040_write(struct snd_soc_codec *codec, · 8 unmodified lines | ||
| 261 | 250 | return -EIO; |
| 262 | 251 | |
| 263 | 252 | twl6040_write_reg_cache(codec, reg, value); |
| 264 | − if (likely(reg < TWL6040_REG_SW_SHADOW) && | |
| 265 | − twl6040_is_path_unmuted(codec, reg)) | |
| 253 | + if (twl6040_is_path_unmuted(codec, reg)) | |
| 266 | 254 | return twl6040_reg_write(twl6040, reg, value); |
| 267 | 255 | else |
| 268 | 256 | return 0; |
| @@ -555,7 +543,7 @@ static const struct snd_kcontrol_new hfr_mux_controls = · 286 unmodified lines | ||
| 555 | 543 | SOC_DAPM_ENUM("Route", twl6040_hf_enum[1]); |
| 556 | 544 | |
| 557 | 545 | static const struct snd_kcontrol_new ep_path_enable_control = |
| 558 | − SOC_DAPM_SINGLE("Switch", TWL6040_REG_SW_SHADOW, 0, 1, 0); | |
| 546 | + SOC_DAPM_SINGLE_VIRT("Switch", 1); | |
| 559 | 547 | |
| 560 | 548 | static const struct snd_kcontrol_new auxl_switch_control = |
| 561 | 549 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 6, 1, 0); |
| @@ -1100,7 +1088,7 @@ static void twl6040_mute_path(struct snd_soc_codec *codec, enum twl6040_dai_id i · 538 unmodified lines | ||
| 1100 | 1088 | break; |
| 1101 | 1089 | default: |
| 1102 | 1090 | break; |
| 1103 | − }; | |
| 1091 | + } | |
| 1104 | 1092 | } |
| 1105 | 1093 | |
| 1106 | 1094 | static int twl6040_digital_mute(struct snd_soc_dai *dai, int mute) |
| @@ -372,7 +372,8 @@ static int wm0010_firmware_load(const char *name, struct snd_soc_codec *codec) · 371 unmodified lines | ||
| 372 | 372 | offset = 0; |
| 373 | 373 | dsp = inforec->dsp_target; |
| 374 | 374 | wm0010->boot_failed = false; |
| 375 | − BUG_ON(!list_empty(&xfer_list)); | |
| 375 | + if (WARN_ON(!list_empty(&xfer_list))) | |
| 376 | + return -EINVAL; | |
| 376 | 377 | init_completion(&done); |
| 377 | 378 | |
| 378 | 379 | /* First record should be INFO */ |
| @@ -793,11 +794,11 @@ static int wm0010_set_sysclk(struct snd_soc_codec *codec, int source, · 414 unmodified lines | ||
| 793 | 794 | wm0010->max_spi_freq = 0; |
| 794 | 795 | } else { |
| 795 | 796 | for (i = 0; i < ARRAY_SIZE(pll_clock_map); i++) |
| 796 | − if (freq >= pll_clock_map[i].max_sysclk) | |
| 797 | + if (freq >= pll_clock_map[i].max_sysclk) { | |
| 798 | + wm0010->max_spi_freq = pll_clock_map[i].max_pll_spi_speed; | |
| 799 | + wm0010->pll_clkctrl1 = pll_clock_map[i].pll_clkctrl1; | |
| 797 | 800 | break; |
| 798 | − | |
| 799 | − wm0010->max_spi_freq = pll_clock_map[i].max_pll_spi_speed; | |
| 800 | − wm0010->pll_clkctrl1 = pll_clock_map[i].pll_clkctrl1; | |
| 801 | + } | |
| 801 | 802 | } |
| 802 | 803 | |
| 803 | 804 | return 0; |
| @@ -137,7 +137,8 @@ static int wm2000_power_up(struct i2c_client *i2c, int analogue) · 136 unmodified lines | ||
| 137 | 137 | unsigned long rate; |
| 138 | 138 | int ret; |
| 139 | 139 | |
| 140 | − BUG_ON(wm2000->anc_mode != ANC_OFF); | |
| 140 | + if (WARN_ON(wm2000->anc_mode != ANC_OFF)) | |
| 141 | + return -EINVAL; | |
| 141 | 142 | |
| 142 | 143 | dev_dbg(&i2c->dev, "Beginning power up\n"); |
| 143 | 144 | |
| @@ -277,7 +278,8 @@ static int wm2000_enter_bypass(struct i2c_client *i2c, int analogue) · 133 unmodified lines | ||
| 277 | 278 | { |
| 278 | 279 | struct wm2000_priv *wm2000 = dev_get_drvdata(&i2c->dev); |
| 279 | 280 | |
| 280 | − BUG_ON(wm2000->anc_mode != ANC_ACTIVE); | |
| 281 | + if (WARN_ON(wm2000->anc_mode != ANC_ACTIVE)) | |
| 282 | + return -EINVAL; | |
| 281 | 283 | |
| 282 | 284 | if (analogue) { |
| 283 | 285 | wm2000_write(i2c, WM2000_REG_SYS_MODE_CNTRL, |
| @@ -315,7 +317,8 @@ static int wm2000_exit_bypass(struct i2c_client *i2c, int analogue) · 31 unmodified lines | ||
| 315 | 317 | { |
| 316 | 318 | struct wm2000_priv *wm2000 = dev_get_drvdata(&i2c->dev); |
| 317 | 319 | |
| 318 | − BUG_ON(wm2000->anc_mode != ANC_BYPASS); | |
| 320 | + if (WARN_ON(wm2000->anc_mode != ANC_BYPASS)) | |
| 321 | + return -EINVAL; | |
| 319 | 322 | |
| 320 | 323 | wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); |
| 321 | 324 | |
| @@ -349,7 +352,8 @@ static int wm2000_enter_standby(struct i2c_client *i2c, int analogue) · 27 unmodified lines | ||
| 349 | 352 | { |
| 350 | 353 | struct wm2000_priv *wm2000 = dev_get_drvdata(&i2c->dev); |
| 351 | 354 | |
| 352 | − BUG_ON(wm2000->anc_mode != ANC_ACTIVE); | |
| 355 | + if (WARN_ON(wm2000->anc_mode != ANC_ACTIVE)) | |
| 356 | + return -EINVAL; | |
| 353 | 357 | |
| 354 | 358 | if (analogue) { |
| 355 | 359 | wm2000_write(i2c, WM2000_REG_ANA_VMID_PD_TIME, 248 / 4); |
| @@ -392,7 +396,8 @@ static int wm2000_exit_standby(struct i2c_client *i2c, int analogue) · 36 unmodified lines | ||
| 392 | 396 | { |
| 393 | 397 | struct wm2000_priv *wm2000 = dev_get_drvdata(&i2c->dev); |
| 394 | 398 | |
| 395 | − BUG_ON(wm2000->anc_mode != ANC_STANDBY); | |
| 399 | + if (WARN_ON(wm2000->anc_mode != ANC_STANDBY)) | |
| 400 | + return -EINVAL; | |
| 396 | 401 | |
| 397 | 402 | wm2000_write(i2c, WM2000_REG_SYS_CTL1, 0); |
| 398 | 403 | |
| @@ -1972,7 +1972,8 @@ static void wm5100_set_detect_mode(struct wm5100_priv *wm5100, int the_mode) · 1971 unmodified lines | ||
| 1972 | 1972 | { |
| 1973 | 1973 | struct wm5100_jack_mode *mode = &wm5100->pdata.jack_modes[the_mode]; |
| 1974 | 1974 | |
| 1975 | − BUG_ON(the_mode >= ARRAY_SIZE(wm5100->pdata.jack_modes)); | |
| 1975 | + if (WARN_ON(the_mode >= ARRAY_SIZE(wm5100->pdata.jack_modes))) | |
| 1976 | + return; | |
| 1976 | 1977 | |
| 1977 | 1978 | gpio_set_value_cansleep(wm5100->pdata.hp_pol, mode->hp_pol); |
| 1978 | 1979 | regmap_update_bits(wm5100->regmap, WM5100_ACCESSORY_DETECT_MODE_1, |
| @@ -983,24 +983,36 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { · 982 unmodified lines | ||
| 983 | 983 | ARIZONA_MUX_ROUTES("ASRC2L", "ASRC2L"), |
| 984 | 984 | ARIZONA_MUX_ROUTES("ASRC2R", "ASRC2R"), |
| 985 | 985 | |
| 986 | + { "AEC Loopback", "HPOUT1L", "OUT1L" }, | |
| 987 | + { "AEC Loopback", "HPOUT1R", "OUT1R" }, | |
| 986 | 988 | { "HPOUT1L", NULL, "OUT1L" }, |
| 987 | 989 | { "HPOUT1R", NULL, "OUT1R" }, |
| 988 | 990 | |
| 991 | + { "AEC Loopback", "HPOUT2L", "OUT2L" }, | |
| 992 | + { "AEC Loopback", "HPOUT2R", "OUT2R" }, | |
| 989 | 993 | { "HPOUT2L", NULL, "OUT2L" }, |
| 990 | 994 | { "HPOUT2R", NULL, "OUT2R" }, |
| 991 | 995 | |
| 996 | + { "AEC Loopback", "HPOUT3L", "OUT3L" }, | |
| 997 | + { "AEC Loopback", "HPOUT3R", "OUT3R" }, | |
| 992 | 998 | { "HPOUT3L", NULL, "OUT3L" }, |
| 993 | 999 | { "HPOUT3R", NULL, "OUT3L" }, |
| 994 | 1000 | |
| 1001 | + { "AEC Loopback", "SPKOUTL", "OUT4L" }, | |
| 995 | 1002 | { "SPKOUTLN", NULL, "OUT4L" }, |
| 996 | 1003 | { "SPKOUTLP", NULL, "OUT4L" }, |
| 997 | 1004 | |
| 1005 | + { "AEC Loopback", "SPKOUTR", "OUT4R" }, | |
| 998 | 1006 | { "SPKOUTRN", NULL, "OUT4R" }, |
| 999 | 1007 | { "SPKOUTRP", NULL, "OUT4R" }, |
| 1000 | 1008 | |
| 1009 | + { "AEC Loopback", "SPKDAT1L", "OUT5L" }, | |
| 1010 | + { "AEC Loopback", "SPKDAT1R", "OUT5R" }, | |
| 1001 | 1011 | { "SPKDAT1L", NULL, "OUT5L" }, |
| 1002 | 1012 | { "SPKDAT1R", NULL, "OUT5R" }, |
| 1003 | 1013 | |
| 1014 | + { "AEC Loopback", "SPKDAT2L", "OUT6L" }, | |
| 1015 | + { "AEC Loopback", "SPKDAT2R", "OUT6R" }, | |
| 1004 | 1016 | { "SPKDAT2L", NULL, "OUT6L" }, |
| 1005 | 1017 | { "SPKDAT2R", NULL, "OUT6R" }, |
| 1006 | 1018 | |
| @@ -274,7 +274,7 @@ static int pga_event(struct snd_soc_dapm_widget *w, · 273 unmodified lines | ||
| 274 | 274 | break; |
| 275 | 275 | |
| 276 | 276 | default: |
| 277 | − BUG(); | |
| 277 | + WARN(1, "Invalid shift %d\n", w->shift); | |
| 278 | 278 | return -1; |
| 279 | 279 | } |
| 280 | 280 | |
| @@ -32,13 +32,6 @@ · 31 unmodified lines | ||
| 32 | 32 | |
| 33 | 33 | #include "wm8400.h" |
| 34 | 34 | |
| 35 | −/* Fake register for internal state */ | |
| 36 | −#define WM8400_INTDRIVBITS (WM8400_REGISTER_COUNT + 1) | |
| 37 | −#define WM8400_INMIXL_PWR 0 | |
| 38 | −#define WM8400_AINLMUX_PWR 1 | |
| 39 | −#define WM8400_INMIXR_PWR 2 | |
| 40 | −#define WM8400_AINRMUX_PWR 3 | |
| 41 | − | |
| 42 | 35 | static struct regulator_bulk_data power[] = { |
| 43 | 36 | { |
| 44 | 37 | .supply = "I2S1VDD", |
| @@ -74,32 +67,6 @@ struct wm8400_priv { · 29 unmodified lines | ||
| 74 | 67 | int fll_in, fll_out; |
| 75 | 68 | }; |
| 76 | 69 | |
| 77 | −static inline unsigned int wm8400_read(struct snd_soc_codec *codec, | |
| 78 | − unsigned int reg) | |
| 79 | −{ | |
| 80 | − struct wm8400_priv *wm8400 = snd_soc_codec_get_drvdata(codec); | |
| 81 | − | |
| 82 | − if (reg == WM8400_INTDRIVBITS) | |
| 83 | − return wm8400->fake_register; | |
| 84 | − else | |
| 85 | − return wm8400_reg_read(wm8400->wm8400, reg); | |
| 86 | −} | |
| 87 | − | |
| 88 | −/* | |
| 89 | − * write to the wm8400 register space | |
| 90 | − */ | |
| 91 | −static int wm8400_write(struct snd_soc_codec *codec, unsigned int reg, | |
| 92 | − unsigned int value) | |
| 93 | −{ | |
| 94 | − struct wm8400_priv *wm8400 = snd_soc_codec_get_drvdata(codec); | |
| 95 | − | |
| 96 | − if (reg == WM8400_INTDRIVBITS) { | |
| 97 | − wm8400->fake_register = value; | |
| 98 | − return 0; | |
| 99 | − } else | |
| 100 | − return wm8400_set_bits(wm8400->wm8400, reg, 0xffff, value); | |
| 101 | −} | |
| 102 | − | |
| 103 | 70 | static void wm8400_codec_reset(struct snd_soc_codec *codec) |
| 104 | 71 | { |
| 105 | 72 | struct wm8400_priv *wm8400 = snd_soc_codec_get_drvdata(codec); |
| @@ -352,32 +319,6 @@ SOC_SINGLE("RIN34 Mute Switch", WM8400_RIGHT_LINE_INPUT_3_4_VOLUME, · 246 unmodified lines | ||
| 352 | 319 | * _DAPM_ Controls |
| 353 | 320 | */ |
| 354 | 321 | |
| 355 | −static int inmixer_event (struct snd_soc_dapm_widget *w, | |
| 356 | − struct snd_kcontrol *kcontrol, int event) | |
| 357 | −{ | |
| 358 | − u16 reg, fakepower; | |
| 359 | − | |
| 360 | − reg = snd_soc_read(w->codec, WM8400_POWER_MANAGEMENT_2); | |
| 361 | − fakepower = snd_soc_read(w->codec, WM8400_INTDRIVBITS); | |
| 362 | − | |
| 363 | − if (fakepower & ((1 << WM8400_INMIXL_PWR) | | |
| 364 | − (1 << WM8400_AINLMUX_PWR))) { | |
| 365 | − reg |= WM8400_AINL_ENA; | |
| 366 | − } else { | |
| 367 | − reg &= ~WM8400_AINL_ENA; | |
| 368 | − } | |
| 369 | − | |
| 370 | − if (fakepower & ((1 << WM8400_INMIXR_PWR) | | |
| 371 | − (1 << WM8400_AINRMUX_PWR))) { | |
| 372 | − reg |= WM8400_AINR_ENA; | |
| 373 | − } else { | |
| 374 | − reg &= ~WM8400_AINR_ENA; | |
| 375 | − } | |
| 376 | − snd_soc_write(w->codec, WM8400_POWER_MANAGEMENT_2, reg); | |
| 377 | − | |
| 378 | − return 0; | |
| 379 | −} | |
| 380 | − | |
| 381 | 322 | static int outmixer_event (struct snd_soc_dapm_widget *w, |
| 382 | 323 | struct snd_kcontrol * kcontrol, int event) |
| 383 | 324 | { |
| @@ -658,27 +599,26 @@ SND_SOC_DAPM_MIXER("RIN34 PGA", WM8400_POWER_MANAGEMENT_2, · 274 unmodified lines | ||
| 658 | 599 | 0, &wm8400_dapm_rin34_pga_controls[0], |
| 659 | 600 | ARRAY_SIZE(wm8400_dapm_rin34_pga_controls)), |
| 660 | 601 | |
| 602 | +SND_SOC_DAPM_SUPPLY("INL", WM8400_POWER_MANAGEMENT_2, WM8400_AINL_ENA_SHIFT, | |
| 603 | + 0, NULL, 0), | |
| 604 | +SND_SOC_DAPM_SUPPLY("INR", WM8400_POWER_MANAGEMENT_2, WM8400_AINR_ENA_SHIFT, | |
| 605 | + 0, NULL, 0), | |
| 606 | + | |
| 661 | 607 | /* INMIXL */ |
| 662 | −SND_SOC_DAPM_MIXER_E("INMIXL", WM8400_INTDRIVBITS, WM8400_INMIXL_PWR, 0, | |
| 608 | +SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, | |
| 663 | 609 | &wm8400_dapm_inmixl_controls[0], |
| 664 | − ARRAY_SIZE(wm8400_dapm_inmixl_controls), | |
| 665 | − inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
| 610 | + ARRAY_SIZE(wm8400_dapm_inmixl_controls)), | |
| 666 | 611 | |
| 667 | 612 | /* AINLMUX */ |
| 668 | −SND_SOC_DAPM_MUX_E("AILNMUX", WM8400_INTDRIVBITS, WM8400_AINLMUX_PWR, 0, | |
| 669 | − &wm8400_dapm_ainlmux_controls, inmixer_event, | |
| 670 | − SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
| 613 | +SND_SOC_DAPM_MUX("AILNMUX", SND_SOC_NOPM, 0, 0, &wm8400_dapm_ainlmux_controls), | |
| 671 | 614 | |
| 672 | 615 | /* INMIXR */ |
| 673 | −SND_SOC_DAPM_MIXER_E("INMIXR", WM8400_INTDRIVBITS, WM8400_INMIXR_PWR, 0, | |
| 616 | +SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, | |
| 674 | 617 | &wm8400_dapm_inmixr_controls[0], |
| 675 | − ARRAY_SIZE(wm8400_dapm_inmixr_controls), | |
| 676 | − inmixer_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
| 618 | + ARRAY_SIZE(wm8400_dapm_inmixr_controls)), | |
| 677 | 619 | |
| 678 | 620 | /* AINRMUX */ |
| 679 | −SND_SOC_DAPM_MUX_E("AIRNMUX", WM8400_INTDRIVBITS, WM8400_AINRMUX_PWR, 0, | |
| 680 | − &wm8400_dapm_ainrmux_controls, inmixer_event, | |
| 681 | − SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | |
| 621 | +SND_SOC_DAPM_MUX("AIRNMUX", SND_SOC_NOPM, 0, 0, &wm8400_dapm_ainrmux_controls), | |
| 682 | 622 | |
| 683 | 623 | /* Output Side */ |
| 684 | 624 | /* DACs */ |
| @@ -789,11 +729,13 @@ static const struct snd_soc_dapm_route wm8400_dapm_routes[] = { · 104 unmodified lines | ||
| 789 | 729 | {"LIN34 PGA", "LIN3 Switch", "LIN3"}, |
| 790 | 730 | {"LIN34 PGA", "LIN4 Switch", "LIN4/RXN"}, |
| 791 | 731 | /* INMIXL */ |
| 732 | + {"INMIXL", NULL, "INL"}, | |
| 792 | 733 | {"INMIXL", "Record Left Volume", "LOMIX"}, |
| 793 | 734 | {"INMIXL", "LIN2 Volume", "LIN2"}, |
| 794 | 735 | {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, |
| 795 | 736 | {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, |
| 796 | 737 | /* AILNMUX */ |
| 738 | + {"AILNMUX", NULL, "INL"}, | |
| 797 | 739 | {"AILNMUX", "INMIXL Mix", "INMIXL"}, |
| 798 | 740 | {"AILNMUX", "DIFFINL Mix", "LIN12 PGA"}, |
| 799 | 741 | {"AILNMUX", "DIFFINL Mix", "LIN34 PGA"}, |
| @@ -808,12 +750,14 @@ static const struct snd_soc_dapm_route wm8400_dapm_routes[] = { · 8 unmodified lines | ||
| 808 | 750 | /* RIN34 PGA */ |
| 809 | 751 | {"RIN34 PGA", "RIN3 Switch", "RIN3"}, |
| 810 | 752 | {"RIN34 PGA", "RIN4 Switch", "RIN4/RXP"}, |
| 811 | − /* INMIXL */ | |
| 753 | + /* INMIXR */ | |
| 754 | + {"INMIXR", NULL, "INR"}, | |
| 812 | 755 | {"INMIXR", "Record Right Volume", "ROMIX"}, |
| 813 | 756 | {"INMIXR", "RIN2 Volume", "RIN2"}, |
| 814 | 757 | {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, |
| 815 | 758 | {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, |
| 816 | 759 | /* AIRNMUX */ |
| 760 | + {"AIRNMUX", NULL, "INR"}, | |
| 817 | 761 | {"AIRNMUX", "INMIXR Mix", "INMIXR"}, |
| 818 | 762 | {"AIRNMUX", "DIFFINR Mix", "RIN12 PGA"}, |
| 819 | 763 | {"AIRNMUX", "DIFFINR Mix", "RIN34 PGA"}, |
| @@ -1365,9 +1309,12 @@ static int wm8400_codec_probe(struct snd_soc_codec *codec) · 545 unmodified lines | ||
| 1365 | 1309 | return -ENOMEM; |
| 1366 | 1310 | |
| 1367 | 1311 | snd_soc_codec_set_drvdata(codec, priv); |
| 1368 | − codec->control_data = priv->wm8400 = wm8400; | |
| 1312 | + priv->wm8400 = wm8400; | |
| 1313 | + codec->control_data = wm8400->regmap; | |
| 1369 | 1314 | priv->codec = codec; |
| 1370 | 1315 | |
| 1316 | + snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP); | |
| 1317 | + | |
| 1371 | 1318 | ret = devm_regulator_bulk_get(wm8400->dev, |
| 1372 | 1319 | ARRAY_SIZE(power), &power[0]); |
| 1373 | 1320 | if (ret != 0) { |
| @@ -1414,8 +1361,6 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8400 = { · 40 unmodified lines | ||
| 1414 | 1361 | .remove = wm8400_codec_remove, |
| 1415 | 1362 | .suspend = wm8400_suspend, |
| 1416 | 1363 | .resume = wm8400_resume, |
| 1417 | − .read = snd_soc_read, | |
| 1418 | − .write = wm8400_write, | |
| 1419 | 1364 | .set_bias_level = wm8400_set_bias_level, |
| 1420 | 1365 | |
| 1421 | 1366 | .controls = wm8400_snd_controls, |
| @@ -736,7 +736,7 @@ static int wm8580_set_sysclk(struct snd_soc_dai *dai, int clk_id, · 735 unmodified lines | ||
| 736 | 736 | break; |
| 737 | 737 | |
| 738 | 738 | default: |
| 739 | − BUG_ON("Unknown DAI driver ID\n"); | |
| 739 | + WARN(1, "Unknown DAI driver ID\n"); | |
| 740 | 740 | return -EINVAL; |
| 741 | 741 | } |
| 742 | 742 | |
| @@ -325,7 +325,8 @@ static int wm8776_set_sysclk(struct snd_soc_dai *dai, · 324 unmodified lines | ||
| 325 | 325 | struct snd_soc_codec *codec = dai->codec; |
| 326 | 326 | struct wm8776_priv *wm8776 = snd_soc_codec_get_drvdata(codec); |
| 327 | 327 | |
| 328 | − BUG_ON(dai->driver->id >= ARRAY_SIZE(wm8776->sysclk)); | |
| 328 | + if (WARN_ON(dai->driver->id >= ARRAY_SIZE(wm8776->sysclk))) | |
| 329 | + return -EINVAL; | |
| 329 | 330 | |
| 330 | 331 | wm8776->sysclk[dai->driver->id] = freq; |
| 331 | 332 | |
| @@ -279,7 +279,8 @@ static int wm8900_hp_event(struct snd_soc_dapm_widget *w, · 278 unmodified lines | ||
| 279 | 279 | break; |
| 280 | 280 | |
| 281 | 281 | default: |
| 282 | − BUG(); | |
| 282 | + WARN(1, "Invalid event %d\n", event); | |
| 283 | + break; | |
| 283 | 284 | } |
| 284 | 285 | |
| 285 | 286 | return 0; |
| @@ -691,7 +692,8 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, · 405 unmodified lines | ||
| 691 | 692 | unsigned int K, Ndiv, Nmod, target; |
| 692 | 693 | unsigned int div; |
| 693 | 694 | |
| 694 | − BUG_ON(!Fout); | |
| 695 | + if (WARN_ON(!Fout)) | |
| 696 | + return -EINVAL; | |
| 695 | 697 | |
| 696 | 698 | /* The FLL must run at 90-100MHz which is then scaled down to |
| 697 | 699 | * the output value by FLLCLK_DIV. */ |
| @@ -742,8 +744,9 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, · 44 unmodified lines | ||
| 742 | 744 | /* Move down to proper range now rounding is done */ |
| 743 | 745 | fll_div->k = K / 10; |
| 744 | 746 | |
| 745 | − BUG_ON(target != Fout * (fll_div->fllclk_div << 2)); | |
| 746 | − BUG_ON(!K && target != Fref * fll_div->fll_ratio * fll_div->n); | |
| 747 | + if (WARN_ON(target != Fout * (fll_div->fllclk_div << 2)) || | |
| 748 | + WARN_ON(!K && target != Fref * fll_div->fll_ratio * fll_div->n)) | |
| 749 | + return -EINVAL; | |
| 747 | 750 | |
| 748 | 751 | return 0; |
| 749 | 752 | } |
| @@ -658,7 +658,8 @@ SOC_SINGLE_TLV("EQ5 Volume", WM8904_EQ6, 0, 24, 0, eq_tlv), · 657 unmodified lines | ||
| 658 | 658 | static int cp_event(struct snd_soc_dapm_widget *w, |
| 659 | 659 | struct snd_kcontrol *kcontrol, int event) |
| 660 | 660 | { |
| 661 | − BUG_ON(event != SND_SOC_DAPM_POST_PMU); | |
| 661 | + if (WARN_ON(event != SND_SOC_DAPM_POST_PMU)) | |
| 662 | + return -EINVAL; | |
| 662 | 663 | |
| 663 | 664 | /* Maximum startup time */ |
| 664 | 665 | udelay(500); |
| @@ -740,7 +741,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, · 75 unmodified lines | ||
| 740 | 741 | dcs_r = 3; |
| 741 | 742 | break; |
| 742 | 743 | default: |
| 743 | − BUG(); | |
| 744 | + WARN(1, "Invalid reg %d\n", reg); | |
| 744 | 745 | return -EINVAL; |
| 745 | 746 | } |
| 746 | 747 | |
| @@ -348,7 +348,7 @@ static void wm8958_dsp_apply(struct snd_soc_codec *codec, int path, int start) · 347 unmodified lines | ||
| 348 | 348 | aif = 1; |
| 349 | 349 | break; |
| 350 | 350 | default: |
| 351 | − BUG(); | |
| 351 | + WARN(1, "Invalid path %d\n", path); | |
| 352 | 352 | return; |
| 353 | 353 | } |
| 354 | 354 | |
| @@ -1758,6 +1758,9 @@ SOC_DOUBLE_R_TLV("EQ4 Volume", WM8962_EQ3, WM8962_EQ23, · 1757 unmodified lines | ||
| 1758 | 1758 | WM8962_EQL_B4_GAIN_SHIFT, 31, 0, eq_tlv), |
| 1759 | 1759 | SOC_DOUBLE_R_TLV("EQ5 Volume", WM8962_EQ3, WM8962_EQ23, |
| 1760 | 1760 | WM8962_EQL_B5_GAIN_SHIFT, 31, 0, eq_tlv), |
| 1761 | +SND_SOC_BYTES("EQL Coefficients", WM8962_EQ4, 18), | |
| 1762 | +SND_SOC_BYTES("EQR Coefficients", WM8962_EQ24, 18), | |
| 1763 | + | |
| 1761 | 1764 | |
| 1762 | 1765 | SOC_SINGLE("3D Switch", WM8962_THREED1, 0, 1, 0), |
| 1763 | 1766 | SND_SOC_BYTES_MASK("3D Coefficients", WM8962_THREED1, 4, WM8962_THREED_ENA), |
| @@ -1775,6 +1778,11 @@ WM8962_DSP2_ENABLE("HPF2 Switch", WM8962_HPF2_ENA_SHIFT), · 11 unmodified lines | ||
| 1775 | 1778 | SND_SOC_BYTES("HPF Coefficients", WM8962_LHPF2, 1), |
| 1776 | 1779 | WM8962_DSP2_ENABLE("HD Bass Switch", WM8962_HDBASS_ENA_SHIFT), |
| 1777 | 1780 | SND_SOC_BYTES("HD Bass Coefficients", WM8962_HDBASS_AI_1, 30), |
| 1781 | + | |
| 1782 | +SOC_DOUBLE("ALC Switch", WM8962_ALC1, WM8962_ALCL_ENA_SHIFT, | |
| 1783 | + WM8962_ALCR_ENA_SHIFT, 1, 0), | |
| 1784 | +SND_SOC_BYTES_MASK("ALC Coefficients", WM8962_ALC1, 4, | |
| 1785 | + WM8962_ALCL_ENA_MASK | WM8962_ALCR_ENA_MASK), | |
| 1778 | 1786 | }; |
| 1779 | 1787 | |
| 1780 | 1788 | static const struct snd_kcontrol_new wm8962_spk_mono_controls[] = { |
| @@ -1845,7 +1853,7 @@ static int cp_event(struct snd_soc_dapm_widget *w, · 64 unmodified lines | ||
| 1845 | 1853 | break; |
| 1846 | 1854 | |
| 1847 | 1855 | default: |
| 1848 | − BUG(); | |
| 1856 | + WARN(1, "Invalid event %d\n", event); | |
| 1849 | 1857 | return -EINVAL; |
| 1850 | 1858 | } |
| 1851 | 1859 | |
| @@ -1937,7 +1945,7 @@ static int hp_event(struct snd_soc_dapm_widget *w, · 85 unmodified lines | ||
| 1937 | 1945 | break; |
| 1938 | 1946 | |
| 1939 | 1947 | default: |
| 1940 | − BUG(); | |
| 1948 | + WARN(1, "Invalid event %d\n", event); | |
| 1941 | 1949 | return -EINVAL; |
| 1942 | 1950 | |
| 1943 | 1951 | } |
| @@ -1966,7 +1974,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, · 22 unmodified lines | ||
| 1966 | 1974 | reg = WM8962_SPKOUTL_VOLUME; |
| 1967 | 1975 | break; |
| 1968 | 1976 | default: |
| 1969 | − BUG(); | |
| 1977 | + WARN(1, "Invalid shift %d\n", w->shift); | |
| 1970 | 1978 | return -EINVAL; |
| 1971 | 1979 | } |
| 1972 | 1980 | |
| @@ -1974,7 +1982,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w, · 1 unmodified line | ||
| 1974 | 1982 | case SND_SOC_DAPM_POST_PMU: |
| 1975 | 1983 | return snd_soc_write(codec, reg, snd_soc_read(codec, reg)); |
| 1976 | 1984 | default: |
| 1977 | − BUG(); | |
| 1985 | + WARN(1, "Invalid event %d\n", event); | |
| 1978 | 1986 | return -EINVAL; |
| 1979 | 1987 | } |
| 1980 | 1988 | } |
| @@ -1997,7 +2005,7 @@ static int dsp2_event(struct snd_soc_dapm_widget *w, · 16 unmodified lines | ||
| 1997 | 2005 | break; |
| 1998 | 2006 | |
| 1999 | 2007 | default: |
| 2000 | − BUG(); | |
| 2008 | + WARN(1, "Invalid event %d\n", event); | |
| 2001 | 2009 | return -EINVAL; |
| 2002 | 2010 | } |
| 2003 | 2011 | |
| @@ -3242,7 +3250,7 @@ static void wm8962_free_beep(struct snd_soc_codec *codec) · 1238 unmodified lines | ||
| 3242 | 3250 | } |
| 3243 | 3251 | #endif |
| 3244 | 3252 | |
| 3245 | −static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio) | |
| 3253 | +static void wm8962_set_gpio_mode(struct wm8962_priv *wm8962, int gpio) | |
| 3246 | 3254 | { |
| 3247 | 3255 | int mask = 0; |
| 3248 | 3256 | int val = 0; |
| @@ -3263,8 +3271,8 @@ static void wm8962_set_gpio_mode(struct snd_soc_codec *codec, int gpio) · 14 unmodified lines | ||
| 3263 | 3271 | } |
| 3264 | 3272 | |
| 3265 | 3273 | if (mask) |
| 3266 | − snd_soc_update_bits(codec, WM8962_ANALOGUE_CLOCKING1, | |
| 3267 | − mask, val); | |
| 3274 | + regmap_update_bits(wm8962->regmap, WM8962_ANALOGUE_CLOCKING1, | |
| 3275 | + mask, val); | |
| 3268 | 3276 | } |
| 3269 | 3277 | |
| 3270 | 3278 | #ifdef CONFIG_GPIOLIB |
| @@ -3276,7 +3284,6 @@ static inline struct wm8962_priv *gpio_to_wm8962(struct gpio_chip *chip) · 5 unmodified lines | ||
| 3276 | 3284 | static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) |
| 3277 | 3285 | { |
| 3278 | 3286 | struct wm8962_priv *wm8962 = gpio_to_wm8962(chip); |
| 3279 | − struct snd_soc_codec *codec = wm8962->codec; | |
| 3280 | 3287 | |
| 3281 | 3288 | /* The WM8962 GPIOs aren't linearly numbered. For simplicity |
| 3282 | 3289 | * we export linear numbers and error out if the unsupported |
| @@ -3292,7 +3299,7 @@ static int wm8962_gpio_request(struct gpio_chip *chip, unsigned offset) · 9 unmodified lines | ||
| 3292 | 3299 | return -EINVAL; |
| 3293 | 3300 | } |
| 3294 | 3301 | |
| 3295 | − wm8962_set_gpio_mode(codec, offset + 1); | |
| 3302 | + wm8962_set_gpio_mode(wm8962, offset + 1); | |
| 3296 | 3303 | |
| 3297 | 3304 | return 0; |
| 3298 | 3305 | } |
| @@ -3376,8 +3383,7 @@ static int wm8962_probe(struct snd_soc_codec *codec) · 77 unmodified lines | ||
| 3376 | 3383 | { |
| 3377 | 3384 | int ret; |
| 3378 | 3385 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
| 3379 | − struct wm8962_pdata *pdata = &wm8962->pdata; | |
| 3380 | − int i, trigger, irq_pol; | |
| 3386 | + int i; | |
| 3381 | 3387 | bool dmicclk, dmicdat; |
| 3382 | 3388 | |
| 3383 | 3389 | wm8962->codec = codec; |
| @@ -3409,75 +3415,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) · 25 unmodified lines | ||
| 3409 | 3415 | } |
| 3410 | 3416 | } |
| 3411 | 3417 | |
| 3412 | − /* SYSCLK defaults to on; make sure it is off so we can safely | |
| 3413 | − * write to registers if the device is declocked. | |
| 3414 | − */ | |
| 3415 | − snd_soc_update_bits(codec, WM8962_CLOCKING2, WM8962_SYSCLK_ENA, 0); | |
| 3416 | − | |
| 3417 | − /* Ensure we have soft control over all registers */ | |
| 3418 | − snd_soc_update_bits(codec, WM8962_CLOCKING2, | |
| 3419 | − WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); | |
| 3420 | − | |
| 3421 | − /* Ensure that the oscillator and PLLs are disabled */ | |
| 3422 | − snd_soc_update_bits(codec, WM8962_PLL2, | |
| 3423 | − WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, | |
| 3424 | − 0); | |
| 3425 | − | |
| 3426 | − /* Apply static configuration for GPIOs */ | |
| 3427 | − for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) | |
| 3428 | − if (pdata->gpio_init[i]) { | |
| 3429 | − wm8962_set_gpio_mode(codec, i + 1); | |
| 3430 | − snd_soc_write(codec, 0x200 + i, | |
| 3431 | − pdata->gpio_init[i] & 0xffff); | |
| 3432 | − } | |
| 3433 | − | |
| 3434 | − | |
| 3435 | − /* Put the speakers into mono mode? */ | |
| 3436 | − if (pdata->spk_mono) | |
| 3437 | − snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_2, | |
| 3438 | − WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); | |
| 3439 | − | |
| 3440 | − /* Micbias setup, detection enable and detection | |
| 3441 | − * threasholds. */ | |
| 3442 | − if (pdata->mic_cfg) | |
| 3443 | − snd_soc_update_bits(codec, WM8962_ADDITIONAL_CONTROL_4, | |
| 3444 | − WM8962_MICDET_ENA | | |
| 3445 | − WM8962_MICDET_THR_MASK | | |
| 3446 | − WM8962_MICSHORT_THR_MASK | | |
| 3447 | − WM8962_MICBIAS_LVL, | |
| 3448 | − pdata->mic_cfg); | |
| 3449 | − | |
| 3450 | − /* Latch volume update bits */ | |
| 3451 | − snd_soc_update_bits(codec, WM8962_LEFT_INPUT_VOLUME, | |
| 3452 | − WM8962_IN_VU, WM8962_IN_VU); | |
| 3453 | − snd_soc_update_bits(codec, WM8962_RIGHT_INPUT_VOLUME, | |
| 3454 | − WM8962_IN_VU, WM8962_IN_VU); | |
| 3455 | − snd_soc_update_bits(codec, WM8962_LEFT_ADC_VOLUME, | |
| 3456 | − WM8962_ADC_VU, WM8962_ADC_VU); | |
| 3457 | − snd_soc_update_bits(codec, WM8962_RIGHT_ADC_VOLUME, | |
| 3458 | − WM8962_ADC_VU, WM8962_ADC_VU); | |
| 3459 | − snd_soc_update_bits(codec, WM8962_LEFT_DAC_VOLUME, | |
| 3460 | − WM8962_DAC_VU, WM8962_DAC_VU); | |
| 3461 | − snd_soc_update_bits(codec, WM8962_RIGHT_DAC_VOLUME, | |
| 3462 | − WM8962_DAC_VU, WM8962_DAC_VU); | |
| 3463 | − snd_soc_update_bits(codec, WM8962_SPKOUTL_VOLUME, | |
| 3464 | − WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | |
| 3465 | − snd_soc_update_bits(codec, WM8962_SPKOUTR_VOLUME, | |
| 3466 | − WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | |
| 3467 | − snd_soc_update_bits(codec, WM8962_HPOUTL_VOLUME, | |
| 3468 | − WM8962_HPOUT_VU, WM8962_HPOUT_VU); | |
| 3469 | − snd_soc_update_bits(codec, WM8962_HPOUTR_VOLUME, | |
| 3470 | − WM8962_HPOUT_VU, WM8962_HPOUT_VU); | |
| 3471 | − | |
| 3472 | − /* Stereo control for EQ */ | |
| 3473 | − snd_soc_update_bits(codec, WM8962_EQ1, WM8962_EQ_SHARED_COEFF, 0); | |
| 3474 | − | |
| 3475 | − /* Don't debouce interrupts so we don't need SYSCLK */ | |
| 3476 | − snd_soc_update_bits(codec, WM8962_IRQ_DEBOUNCE, | |
| 3477 | − WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | | |
| 3478 | − WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, | |
| 3479 | − 0); | |
| 3480 | − | |
| 3481 | 3418 | wm8962_add_widgets(codec); |
| 3482 | 3419 | |
| 3483 | 3420 | /* Save boards having to disable DMIC when not in use */ |
| @@ -3506,36 +3443,6 @@ static int wm8962_probe(struct snd_soc_codec *codec) · 22 unmodified lines | ||
| 3506 | 3443 | wm8962_init_beep(codec); |
| 3507 | 3444 | wm8962_init_gpio(codec); |
| 3508 | 3445 | |
| 3509 | − if (wm8962->irq) { | |
| 3510 | − if (pdata->irq_active_low) { | |
| 3511 | − trigger = IRQF_TRIGGER_LOW; | |
| 3512 | − irq_pol = WM8962_IRQ_POL; | |
| 3513 | − } else { | |
| 3514 | − trigger = IRQF_TRIGGER_HIGH; | |
| 3515 | − irq_pol = 0; | |
| 3516 | − } | |
| 3517 | − | |
| 3518 | − snd_soc_update_bits(codec, WM8962_INTERRUPT_CONTROL, | |
| 3519 | − WM8962_IRQ_POL, irq_pol); | |
| 3520 | − | |
| 3521 | − ret = request_threaded_irq(wm8962->irq, NULL, wm8962_irq, | |
| 3522 | − trigger | IRQF_ONESHOT, | |
| 3523 | − "wm8962", codec->dev); | |
| 3524 | − if (ret != 0) { | |
| 3525 | − dev_err(codec->dev, "Failed to request IRQ %d: %d\n", | |
| 3526 | − wm8962->irq, ret); | |
| 3527 | − wm8962->irq = 0; | |
| 3528 | − /* Non-fatal */ | |
| 3529 | − } else { | |
| 3530 | − /* Enable some IRQs by default */ | |
| 3531 | − snd_soc_update_bits(codec, | |
| 3532 | − WM8962_INTERRUPT_STATUS_2_MASK, | |
| 3533 | − WM8962_FLL_LOCK_EINT | | |
| 3534 | − WM8962_TEMP_SHUT_EINT | | |
| 3535 | − WM8962_FIFOS_ERR_EINT, 0); | |
| 3536 | − } | |
| 3537 | − } | |
| 3538 | − | |
| 3539 | 3446 | return 0; |
| 3540 | 3447 | } |
| 3541 | 3448 | |
| @@ -3544,9 +3451,6 @@ static int wm8962_remove(struct snd_soc_codec *codec) · 2 unmodified lines | ||
| 3544 | 3451 | struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec); |
| 3545 | 3452 | int i; |
| 3546 | 3453 | |
| 3547 | − if (wm8962->irq) | |
| 3548 | − free_irq(wm8962->irq, codec); | |
| 3549 | − | |
| 3550 | 3454 | cancel_delayed_work_sync(&wm8962->mic_work); |
| 3551 | 3455 | |
| 3552 | 3456 | wm8962_free_gpio(codec); |
| @@ -3619,7 +3523,7 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, · 66 unmodified lines | ||
| 3619 | 3523 | struct wm8962_pdata *pdata = dev_get_platdata(&i2c->dev); |
| 3620 | 3524 | struct wm8962_priv *wm8962; |
| 3621 | 3525 | unsigned int reg; |
| 3622 | − int ret, i; | |
| 3526 | + int ret, i, irq_pol, trigger; | |
| 3623 | 3527 | |
| 3624 | 3528 | wm8962 = devm_kzalloc(&i2c->dev, sizeof(struct wm8962_priv), |
| 3625 | 3529 | GFP_KERNEL); |
| @@ -3704,6 +3608,77 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, · 78 unmodified lines | ||
| 3704 | 3608 | goto err_enable; |
| 3705 | 3609 | } |
| 3706 | 3610 | |
| 3611 | + /* SYSCLK defaults to on; make sure it is off so we can safely | |
| 3612 | + * write to registers if the device is declocked. | |
| 3613 | + */ | |
| 3614 | + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, | |
| 3615 | + WM8962_SYSCLK_ENA, 0); | |
| 3616 | + | |
| 3617 | + /* Ensure we have soft control over all registers */ | |
| 3618 | + regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2, | |
| 3619 | + WM8962_CLKREG_OVD, WM8962_CLKREG_OVD); | |
| 3620 | + | |
| 3621 | + /* Ensure that the oscillator and PLLs are disabled */ | |
| 3622 | + regmap_update_bits(wm8962->regmap, WM8962_PLL2, | |
| 3623 | + WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, | |
| 3624 | + 0); | |
| 3625 | + | |
| 3626 | + /* Apply static configuration for GPIOs */ | |
| 3627 | + for (i = 0; i < ARRAY_SIZE(wm8962->pdata.gpio_init); i++) | |
| 3628 | + if (wm8962->pdata.gpio_init[i]) { | |
| 3629 | + wm8962_set_gpio_mode(wm8962, i + 1); | |
| 3630 | + regmap_write(wm8962->regmap, 0x200 + i, | |
| 3631 | + wm8962->pdata.gpio_init[i] & 0xffff); | |
| 3632 | + } | |
| 3633 | + | |
| 3634 | + | |
| 3635 | + /* Put the speakers into mono mode? */ | |
| 3636 | + if (wm8962->pdata.spk_mono) | |
| 3637 | + regmap_update_bits(wm8962->regmap, WM8962_CLASS_D_CONTROL_2, | |
| 3638 | + WM8962_SPK_MONO_MASK, WM8962_SPK_MONO); | |
| 3639 | + | |
| 3640 | + /* Micbias setup, detection enable and detection | |
| 3641 | + * threasholds. */ | |
| 3642 | + if (wm8962->pdata.mic_cfg) | |
| 3643 | + regmap_update_bits(wm8962->regmap, WM8962_ADDITIONAL_CONTROL_4, | |
| 3644 | + WM8962_MICDET_ENA | | |
| 3645 | + WM8962_MICDET_THR_MASK | | |
| 3646 | + WM8962_MICSHORT_THR_MASK | | |
| 3647 | + WM8962_MICBIAS_LVL, | |
| 3648 | + wm8962->pdata.mic_cfg); | |
| 3649 | + | |
| 3650 | + /* Latch volume update bits */ | |
| 3651 | + regmap_update_bits(wm8962->regmap, WM8962_LEFT_INPUT_VOLUME, | |
| 3652 | + WM8962_IN_VU, WM8962_IN_VU); | |
| 3653 | + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, | |
| 3654 | + WM8962_IN_VU, WM8962_IN_VU); | |
| 3655 | + regmap_update_bits(wm8962->regmap, WM8962_LEFT_ADC_VOLUME, | |
| 3656 | + WM8962_ADC_VU, WM8962_ADC_VU); | |
| 3657 | + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_ADC_VOLUME, | |
| 3658 | + WM8962_ADC_VU, WM8962_ADC_VU); | |
| 3659 | + regmap_update_bits(wm8962->regmap, WM8962_LEFT_DAC_VOLUME, | |
| 3660 | + WM8962_DAC_VU, WM8962_DAC_VU); | |
| 3661 | + regmap_update_bits(wm8962->regmap, WM8962_RIGHT_DAC_VOLUME, | |
| 3662 | + WM8962_DAC_VU, WM8962_DAC_VU); | |
| 3663 | + regmap_update_bits(wm8962->regmap, WM8962_SPKOUTL_VOLUME, | |
| 3664 | + WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | |
| 3665 | + regmap_update_bits(wm8962->regmap, WM8962_SPKOUTR_VOLUME, | |
| 3666 | + WM8962_SPKOUT_VU, WM8962_SPKOUT_VU); | |
| 3667 | + regmap_update_bits(wm8962->regmap, WM8962_HPOUTL_VOLUME, | |
| 3668 | + WM8962_HPOUT_VU, WM8962_HPOUT_VU); | |
| 3669 | + regmap_update_bits(wm8962->regmap, WM8962_HPOUTR_VOLUME, | |
| 3670 | + WM8962_HPOUT_VU, WM8962_HPOUT_VU); | |
| 3671 | + | |
| 3672 | + /* Stereo control for EQ */ | |
| 3673 | + regmap_update_bits(wm8962->regmap, WM8962_EQ1, | |
| 3674 | + WM8962_EQ_SHARED_COEFF, 0); | |
| 3675 | + | |
| 3676 | + /* Don't debouce interrupts so we don't need SYSCLK */ | |
| 3677 | + regmap_update_bits(wm8962->regmap, WM8962_IRQ_DEBOUNCE, | |
| 3678 | + WM8962_FLL_LOCK_DB | WM8962_PLL3_LOCK_DB | | |
| 3679 | + WM8962_PLL2_LOCK_DB | WM8962_TEMP_SHUT_DB, | |
| 3680 | + 0); | |
| 3681 | + | |
| 3707 | 3682 | if (wm8962->pdata.in4_dc_measure) { |
| 3708 | 3683 | ret = regmap_register_patch(wm8962->regmap, |
| 3709 | 3684 | wm8962_dc_measure, |
| @@ -3714,6 +3689,37 @@ static int wm8962_i2c_probe(struct i2c_client *i2c, · 4 unmodified lines | ||
| 3714 | 3689 | ret); |
| 3715 | 3690 | } |
| 3716 | 3691 | |
| 3692 | + if (wm8962->irq) { | |
| 3693 | + if (wm8962->pdata.irq_active_low) { | |
| 3694 | + trigger = IRQF_TRIGGER_LOW; | |
| 3695 | + irq_pol = WM8962_IRQ_POL; | |
| 3696 | + } else { | |
| 3697 | + trigger = IRQF_TRIGGER_HIGH; | |
| 3698 | + irq_pol = 0; | |
| 3699 | + } | |
| 3700 | + | |
| 3701 | + regmap_update_bits(wm8962->regmap, WM8962_INTERRUPT_CONTROL, | |
| 3702 | + WM8962_IRQ_POL, irq_pol); | |
| 3703 | + | |
| 3704 | + ret = devm_request_threaded_irq(&i2c->dev, wm8962->irq, NULL, | |
| 3705 | + wm8962_irq, | |
| 3706 | + trigger | IRQF_ONESHOT, | |
| 3707 | + "wm8962", &i2c->dev); | |
| 3708 | + if (ret != 0) { | |
| 3709 | + dev_err(&i2c->dev, "Failed to request IRQ %d: %d\n", | |
| 3710 | + wm8962->irq, ret); | |
| 3711 | + wm8962->irq = 0; | |
| 3712 | + /* Non-fatal */ | |
| 3713 | + } else { | |
| 3714 | + /* Enable some IRQs by default */ | |
| 3715 | + regmap_update_bits(wm8962->regmap, | |
| 3716 | + WM8962_INTERRUPT_STATUS_2_MASK, | |
| 3717 | + WM8962_FLL_LOCK_EINT | | |
| 3718 | + WM8962_TEMP_SHUT_EINT | | |
| 3719 | + WM8962_FIFOS_ERR_EINT, 0); | |
| 3720 | + } | |
| 3721 | + } | |
| 3722 | + | |
| 3717 | 3723 | pm_runtime_enable(&i2c->dev); |
| 3718 | 3724 | pm_request_idle(&i2c->dev); |
| 3719 | 3725 | |
| @@ -438,6 +438,8 @@ static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, · 437 unmodified lines | ||
| 438 | 438 | struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); |
| 439 | 439 | int block = wm8996_get_retune_mobile_block(kcontrol->id.name); |
| 440 | 440 | |
| 441 | + if (block < 0) | |
| 442 | + return block; | |
| 441 | 443 | ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block]; |
| 442 | 444 | |
| 443 | 445 | return 0; |
| @@ -608,7 +610,7 @@ static int bg_event(struct snd_soc_dapm_widget *w, · 164 unmodified lines | ||
| 608 | 610 | wm8996_bg_disable(codec); |
| 609 | 611 | break; |
| 610 | 612 | default: |
| 611 | − BUG(); | |
| 613 | + WARN(1, "Invalid event %d\n", event); | |
| 612 | 614 | ret = -EINVAL; |
| 613 | 615 | } |
| 614 | 616 | |
| @@ -625,7 +627,7 @@ static int cp_event(struct snd_soc_dapm_widget *w, · 10 unmodified lines | ||
| 625 | 627 | msleep(5); |
| 626 | 628 | break; |
| 627 | 629 | default: |
| 628 | − BUG(); | |
| 630 | + WARN(1, "Invalid event %d\n", event); | |
| 629 | 631 | ret = -EINVAL; |
| 630 | 632 | } |
| 631 | 633 | |
| @@ -646,7 +648,7 @@ static int rmv_short_event(struct snd_soc_dapm_widget *w, · 14 unmodified lines | ||
| 646 | 648 | wm8996->hpout_pending |= w->shift; |
| 647 | 649 | break; |
| 648 | 650 | default: |
| 649 | − BUG(); | |
| 651 | + WARN(1, "Invalid event %d\n", event); | |
| 650 | 652 | return -EINVAL; |
| 651 | 653 | } |
| 652 | 654 | |
| @@ -767,7 +769,7 @@ static int dcs_start(struct snd_soc_dapm_widget *w, · 114 unmodified lines | ||
| 767 | 769 | wm8996->dcs_pending |= 1 << w->shift; |
| 768 | 770 | break; |
| 769 | 771 | default: |
| 770 | − BUG(); | |
| 772 | + WARN(1, "Invalid event %d\n", event); | |
| 771 | 773 | return -EINVAL; |
| 772 | 774 | } |
| 773 | 775 | |
| @@ -1656,7 +1658,7 @@ static int wm8996_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) · 882 unmodified lines | ||
| 1656 | 1658 | lrclk_rx_reg = WM8996_AIF2_RX_LRCLK_2; |
| 1657 | 1659 | break; |
| 1658 | 1660 | default: |
| 1659 | − BUG(); | |
| 1661 | + WARN(1, "Invalid dai id %d\n", dai->id); | |
| 1660 | 1662 | return -EINVAL; |
| 1661 | 1663 | } |
| 1662 | 1664 | |
| @@ -1768,7 +1770,7 @@ static int wm8996_hw_params(struct snd_pcm_substream *substream, · 105 unmodified lines | ||
| 1768 | 1770 | dsp_shift = WM8996_DSP2_DIV_SHIFT; |
| 1769 | 1771 | break; |
| 1770 | 1772 | default: |
| 1771 | − BUG(); | |
| 1773 | + WARN(1, "Invalid dai id %d\n", dai->id); | |
| 1772 | 1774 | return -EINVAL; |
| 1773 | 1775 | } |
| 1774 | 1776 | |
| @@ -221,7 +221,8 @@ static int wm9713_voice_shutdown(struct snd_soc_dapm_widget *w, · 220 unmodified lines | ||
| 221 | 221 | struct snd_soc_codec *codec = w->codec; |
| 222 | 222 | u16 status, rate; |
| 223 | 223 | |
| 224 | − BUG_ON(event != SND_SOC_DAPM_PRE_PMD); | |
| 224 | + if (WARN_ON(event != SND_SOC_DAPM_PRE_PMD)) | |
| 225 | + return -EINVAL; | |
| 225 | 226 | |
| 226 | 227 | /* Gracefully shut down the voice interface. */ |
| 227 | 228 | status = ac97_read(codec, AC97_EXTENDED_MID) | 0x1000; |
| @@ -341,6 +341,8 @@ static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, · 340 unmodified lines | ||
| 341 | 341 | static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, |
| 342 | 342 | unsigned int offset) |
| 343 | 343 | { |
| 344 | + if (WARN_ON(!region)) | |
| 345 | + return offset; | |
| 344 | 346 | switch (region->type) { |
| 345 | 347 | case WMFW_ADSP1_PM: |
| 346 | 348 | return region->base + (offset * 3); |
| @@ -353,7 +355,7 @@ static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, · 6 unmodified lines | ||
| 353 | 355 | case WMFW_ADSP1_ZM: |
| 354 | 356 | return region->base + (offset * 2); |
| 355 | 357 | default: |
| 356 | − WARN_ON(NULL != "Unknown memory region type"); | |
| 358 | + WARN(1, "Unknown memory region type"); | |
| 357 | 359 | return offset; |
| 358 | 360 | } |
| 359 | 361 | } |
| @@ -396,11 +398,12 @@ static int wm_coeff_write_control(struct snd_kcontrol *kcontrol, · 36 unmodified lines | ||
| 396 | 398 | ret = regmap_raw_write(adsp->regmap, reg, scratch, |
| 397 | 399 | ctl->len); |
| 398 | 400 | if (ret) { |
| 399 | − adsp_err(adsp, "Failed to write %zu bytes to %x\n", | |
| 400 | − ctl->len, reg); | |
| 401 | + adsp_err(adsp, "Failed to write %zu bytes to %x: %d\n", | |
| 402 | + ctl->len, reg, ret); | |
| 401 | 403 | kfree(scratch); |
| 402 | 404 | return ret; |
| 403 | 405 | } |
| 406 | + adsp_dbg(adsp, "Wrote %zu bytes to %x\n", ctl->len, reg); | |
| 404 | 407 | |
| 405 | 408 | kfree(scratch); |
| 406 | 409 | |
| @@ -450,11 +453,12 @@ static int wm_coeff_read_control(struct snd_kcontrol *kcontrol, · 43 unmodified lines | ||
| 450 | 453 | |
| 451 | 454 | ret = regmap_raw_read(adsp->regmap, reg, scratch, ctl->len); |
| 452 | 455 | if (ret) { |
| 453 | − adsp_err(adsp, "Failed to read %zu bytes from %x\n", | |
| 454 | − ctl->len, reg); | |
| 456 | + adsp_err(adsp, "Failed to read %zu bytes from %x: %d\n", | |
| 457 | + ctl->len, reg, ret); | |
| 455 | 458 | kfree(scratch); |
| 456 | 459 | return ret; |
| 457 | 460 | } |
| 461 | + adsp_dbg(adsp, "Read %zu bytes from %x\n", ctl->len, reg); | |
| 458 | 462 | |
| 459 | 463 | memcpy(buf, scratch, ctl->len); |
| 460 | 464 | kfree(scratch); |
| @@ -568,6 +572,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) · 107 unmodified lines | ||
| 568 | 572 | file, header->ver); |
| 569 | 573 | goto out_fw; |
| 570 | 574 | } |
| 575 | + adsp_info(dsp, "Firmware version: %d\n", header->ver); | |
| 571 | 576 | |
| 572 | 577 | if (header->core != dsp->type) { |
| 573 | 578 | adsp_err(dsp, "%s: invalid core %d != %d\n", |
| @@ -602,7 +607,7 @@ static int wm_adsp_load(struct wm_adsp *dsp) · 28 unmodified lines | ||
| 602 | 607 | break; |
| 603 | 608 | |
| 604 | 609 | default: |
| 605 | − BUG_ON(NULL == "Unknown DSP type"); | |
| 610 | + WARN(1, "Unknown DSP type"); | |
| 606 | 611 | goto out_fw; |
| 607 | 612 | } |
| 608 | 613 | |
| @@ -642,27 +647,22 @@ static int wm_adsp_load(struct wm_adsp *dsp) · 33 unmodified lines | ||
| 642 | 647 | reg = offset; |
| 643 | 648 | break; |
| 644 | 649 | case WMFW_ADSP1_PM: |
| 645 | − BUG_ON(!mem); | |
| 646 | 650 | region_name = "PM"; |
| 647 | 651 | reg = wm_adsp_region_to_reg(mem, offset); |
| 648 | 652 | break; |
| 649 | 653 | case WMFW_ADSP1_DM: |
| 650 | − BUG_ON(!mem); | |
| 651 | 654 | region_name = "DM"; |
| 652 | 655 | reg = wm_adsp_region_to_reg(mem, offset); |
| 653 | 656 | break; |
| 654 | 657 | case WMFW_ADSP2_XM: |
| 655 | − BUG_ON(!mem); | |
| 656 | 658 | region_name = "XM"; |
| 657 | 659 | reg = wm_adsp_region_to_reg(mem, offset); |
| 658 | 660 | break; |
| 659 | 661 | case WMFW_ADSP2_YM: |
| 660 | − BUG_ON(!mem); | |
| 661 | 662 | region_name = "YM"; |
| 662 | 663 | reg = wm_adsp_region_to_reg(mem, offset); |
| 663 | 664 | break; |
| 664 | 665 | case WMFW_ADSP1_ZM: |
| 665 | − BUG_ON(!mem); | |
| 666 | 666 | region_name = "ZM"; |
| 667 | 667 | reg = wm_adsp_region_to_reg(mem, offset); |
| 668 | 668 | break; |
| @@ -689,7 +689,8 @@ static int wm_adsp_load(struct wm_adsp *dsp) · 20 unmodified lines | ||
| 689 | 689 | &buf_list); |
| 690 | 690 | if (!buf) { |
| 691 | 691 | adsp_err(dsp, "Out of memory\n"); |
| 692 | − return -ENOMEM; | |
| 692 | + ret = -ENOMEM; | |
| 693 | + goto out_fw; | |
| 693 | 694 | } |
| 694 | 695 | |
| 695 | 696 | ret = regmap_raw_write_async(regmap, reg, buf->buf, |
| @@ -901,10 +902,8 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 205 unmodified lines | ||
| 901 | 902 | break; |
| 902 | 903 | } |
| 903 | 904 | |
| 904 | − if (mem == NULL) { | |
| 905 | − BUG_ON(mem != NULL); | |
| 905 | + if (WARN_ON(!mem)) | |
| 906 | 906 | return -EINVAL; |
| 907 | − } | |
| 908 | 907 | |
| 909 | 908 | switch (dsp->type) { |
| 910 | 909 | case WMFW_ADSP1: |
| @@ -998,7 +997,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 87 unmodified lines | ||
| 998 | 997 | break; |
| 999 | 998 | |
| 1000 | 999 | default: |
| 1001 | − BUG_ON(NULL == "Unknown DSP type"); | |
| 1000 | + WARN(1, "Unknown DSP type"); | |
| 1002 | 1001 | return -EINVAL; |
| 1003 | 1002 | } |
| 1004 | 1003 | |
| @@ -1062,6 +1061,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 57 unmodified lines | ||
| 1062 | 1061 | if (i + 1 < algs) { |
| 1063 | 1062 | region->len = be32_to_cpu(adsp1_alg[i + 1].dm); |
| 1064 | 1063 | region->len -= be32_to_cpu(adsp1_alg[i].dm); |
| 1064 | + region->len *= 4; | |
| 1065 | 1065 | wm_adsp_create_control(dsp, region); |
| 1066 | 1066 | } else { |
| 1067 | 1067 | adsp_warn(dsp, "Missing length info for region DM with ID %x\n", |
| @@ -1079,6 +1079,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 11 unmodified lines | ||
| 1079 | 1079 | if (i + 1 < algs) { |
| 1080 | 1080 | region->len = be32_to_cpu(adsp1_alg[i + 1].zm); |
| 1081 | 1081 | region->len -= be32_to_cpu(adsp1_alg[i].zm); |
| 1082 | + region->len *= 4; | |
| 1082 | 1083 | wm_adsp_create_control(dsp, region); |
| 1083 | 1084 | } else { |
| 1084 | 1085 | adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", |
| @@ -1108,6 +1109,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 23 unmodified lines | ||
| 1108 | 1109 | if (i + 1 < algs) { |
| 1109 | 1110 | region->len = be32_to_cpu(adsp2_alg[i + 1].xm); |
| 1110 | 1111 | region->len -= be32_to_cpu(adsp2_alg[i].xm); |
| 1112 | + region->len *= 4; | |
| 1111 | 1113 | wm_adsp_create_control(dsp, region); |
| 1112 | 1114 | } else { |
| 1113 | 1115 | adsp_warn(dsp, "Missing length info for region XM with ID %x\n", |
| @@ -1125,6 +1127,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 11 unmodified lines | ||
| 1125 | 1127 | if (i + 1 < algs) { |
| 1126 | 1128 | region->len = be32_to_cpu(adsp2_alg[i + 1].ym); |
| 1127 | 1129 | region->len -= be32_to_cpu(adsp2_alg[i].ym); |
| 1130 | + region->len *= 4; | |
| 1128 | 1131 | wm_adsp_create_control(dsp, region); |
| 1129 | 1132 | } else { |
| 1130 | 1133 | adsp_warn(dsp, "Missing length info for region YM with ID %x\n", |
| @@ -1142,6 +1145,7 @@ static int wm_adsp_setup_algs(struct wm_adsp *dsp) · 11 unmodified lines | ||
| 1142 | 1145 | if (i + 1 < algs) { |
| 1143 | 1146 | region->len = be32_to_cpu(adsp2_alg[i + 1].zm); |
| 1144 | 1147 | region->len -= be32_to_cpu(adsp2_alg[i].zm); |
| 1148 | + region->len *= 4; | |
| 1145 | 1149 | wm_adsp_create_control(dsp, region); |
| 1146 | 1150 | } else { |
| 1147 | 1151 | adsp_warn(dsp, "Missing length info for region ZM with ID %x\n", |
| @@ -1313,8 +1317,8 @@ static int wm_adsp_load_coeff(struct wm_adsp *dsp) · 165 unmodified lines | ||
| 1313 | 1317 | le32_to_cpu(blk->len)); |
| 1314 | 1318 | if (ret != 0) { |
| 1315 | 1319 | adsp_err(dsp, |
| 1316 | − "%s.%d: Failed to write to %x in %s\n", | |
| 1317 | − file, blocks, reg, region_name); | |
| 1320 | + "%s.%d: Failed to write to %x in %s: %d\n", | |
| 1321 | + file, blocks, reg, region_name, ret); | |
| 1318 | 1322 | } |
| 1319 | 1323 | } |
| 1320 | 1324 | |
| @@ -1358,6 +1362,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, · 37 unmodified lines | ||
| 1358 | 1362 | struct snd_soc_codec *codec = w->codec; |
| 1359 | 1363 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); |
| 1360 | 1364 | struct wm_adsp *dsp = &dsps[w->shift]; |
| 1365 | + struct wm_adsp_alg_region *alg_region; | |
| 1361 | 1366 | struct wm_coeff_ctl *ctl; |
| 1362 | 1367 | int ret; |
| 1363 | 1368 | int val; |
| @@ -1435,6 +1440,14 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, · 71 unmodified lines | ||
| 1435 | 1440 | |
| 1436 | 1441 | list_for_each_entry(ctl, &dsp->ctl_list, list) |
| 1437 | 1442 | ctl->enabled = 0; |
| 1443 | + | |
| 1444 | + while (!list_empty(&dsp->alg_regions)) { | |
| 1445 | + alg_region = list_first_entry(&dsp->alg_regions, | |
| 1446 | + struct wm_adsp_alg_region, | |
| 1447 | + list); | |
| 1448 | + list_del(&alg_region->list); | |
| 1449 | + kfree(alg_region); | |
| 1450 | + } | |
| 1438 | 1451 | break; |
| 1439 | 1452 | |
| 1440 | 1453 | default: |
| @@ -611,7 +611,7 @@ static int earpiece_event(struct snd_soc_dapm_widget *w, · 610 unmodified lines | ||
| 611 | 611 | break; |
| 612 | 612 | |
| 613 | 613 | default: |
| 614 | − BUG(); | |
| 614 | + WARN(1, "Invalid event %d\n", event); | |
| 615 | 615 | break; |
| 616 | 616 | } |
| 617 | 617 | |
| @@ -1,9 +1,10 @@ | ||
| 1 | 1 | config SND_DAVINCI_SOC |
| 2 | − tristate "SoC Audio for the TI DAVINCI chip" | |
| 3 | − depends on ARCH_DAVINCI | |
| 2 | + tristate "SoC Audio for the TI DAVINCI or AM33XX chip" | |
| 3 | + depends on ARCH_DAVINCI || SOC_AM33XX | |
| 4 | 4 | help |
| 5 | + Platform driver for daVinci or AM33xx | |
| 5 | 6 | Say Y or M if you want to add support for codecs attached to |
| 6 | − the DAVINCI AC97 or I2S interface. You will also need | |
| 7 | + the DAVINCI AC97, I2S, or McASP interface. You will also need | |
| 7 | 8 | to select the audio interfaces to support below. |
| 8 | 9 | |
| 9 | 10 | config SND_DAVINCI_SOC_I2S |
| @@ -15,6 +16,17 @@ config SND_DAVINCI_SOC_MCASP · 5 unmodified lines | ||
| 15 | 16 | config SND_DAVINCI_SOC_VCIF |
| 16 | 17 | tristate |
| 17 | 18 | |
| 19 | +config SND_AM33XX_SOC_EVM | |
| 20 | + tristate "SoC Audio for the AM33XX chip based boards" | |
| 21 | + depends on SND_DAVINCI_SOC && SOC_AM33XX | |
| 22 | + select SND_SOC_TLV320AIC3X | |
| 23 | + select SND_DAVINCI_SOC_MCASP | |
| 24 | + help | |
| 25 | + Say Y or M if you want to add support for SoC audio on AM33XX | |
| 26 | + boards using McASP and TLV320AIC3X codec. For example AM335X-EVM, | |
| 27 | + AM335X-EVMSK, and BeagelBone with AudioCape boards have this | |
| 28 | + setup. | |
| 29 | + | |
| 18 | 30 | config SND_DAVINCI_SOC_EVM |
| 19 | 31 | tristate "SoC Audio support for DaVinci DM6446, DM355 or DM365 EVM" |
| 20 | 32 | depends on SND_DAVINCI_SOC |
| @@ -13,6 +13,7 @@ obj-$(CONFIG_SND_DAVINCI_SOC_VCIF) += snd-soc-davinci-vcif.o · 12 unmodified lines | ||
| 13 | 13 | snd-soc-evm-objs := davinci-evm.o |
| 14 | 14 | |
| 15 | 15 | obj-$(CONFIG_SND_DAVINCI_SOC_EVM) += snd-soc-evm.o |
| 16 | +obj-$(CONFIG_SND_AM33XX_SOC_EVM) += snd-soc-evm.o | |
| 16 | 17 | obj-$(CONFIG_SND_DM6467_SOC_EVM) += snd-soc-evm.o |
| 17 | 18 | obj-$(CONFIG_SND_DA830_SOC_EVM) += snd-soc-evm.o |
| 18 | 19 | obj-$(CONFIG_SND_DA850_SOC_EVM) += snd-soc-evm.o |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | #include <linux/platform_device.h> |
| 17 | 17 | #include <linux/platform_data/edma.h> |
| 18 | 18 | #include <linux/i2c.h> |
| 19 | +#include <linux/of_platform.h> | |
| 19 | 20 | #include <sound/core.h> |
| 20 | 21 | #include <sound/pcm.h> |
| 21 | 22 | #include <sound/soc.h> |
| @@ -23,10 +24,16 @@ · 1 unmodified line | ||
| 23 | 24 | #include <asm/dma.h> |
| 24 | 25 | #include <asm/mach-types.h> |
| 25 | 26 | |
| 27 | +#include <linux/edma.h> | |
| 28 | + | |
| 26 | 29 | #include "davinci-pcm.h" |
| 27 | 30 | #include "davinci-i2s.h" |
| 28 | 31 | #include "davinci-mcasp.h" |
| 29 | 32 | |
| 33 | +struct snd_soc_card_drvdata_davinci { | |
| 34 | + unsigned sysclk; | |
| 35 | +}; | |
| 36 | + | |
| 30 | 37 | #define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B | \ |
| 31 | 38 | SND_SOC_DAIFMT_CBM_CFM | SND_SOC_DAIFMT_IB_NF) |
| 32 | 39 | static int evm_hw_params(struct snd_pcm_substream *substream, |
| @@ -35,27 +42,11 @@ static int evm_hw_params(struct snd_pcm_substream *substream, · 2 unmodified lines | ||
| 35 | 42 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 36 | 43 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 37 | 44 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
| 45 | + struct snd_soc_codec *codec = rtd->codec; | |
| 46 | + struct snd_soc_card *soc_card = codec->card; | |
| 38 | 47 | int ret = 0; |
| 39 | − unsigned sysclk; | |
| 40 | − | |
| 41 | − /* ASP1 on DM355 EVM is clocked by an external oscillator */ | |
| 42 | − if (machine_is_davinci_dm355_evm() || machine_is_davinci_dm6467_evm() || | |
| 43 | − machine_is_davinci_dm365_evm()) | |
| 44 | − sysclk = 27000000; | |
| 45 | − | |
| 46 | − /* ASP0 in DM6446 EVM is clocked by U55, as configured by | |
| 47 | − * board-dm644x-evm.c using GPIOs from U18. There are six | |
| 48 | − * options; here we "know" we use a 48 KHz sample rate. | |
| 49 | − */ | |
| 50 | − else if (machine_is_davinci_evm()) | |
| 51 | − sysclk = 12288000; | |
| 52 | − | |
| 53 | − else if (machine_is_davinci_da830_evm() || | |
| 54 | − machine_is_davinci_da850_evm()) | |
| 55 | − sysclk = 24576000; | |
| 56 | − | |
| 57 | − else | |
| 58 | − return -EINVAL; | |
| 48 | + unsigned sysclk = ((struct snd_soc_card_drvdata_davinci *) | |
| 49 | + snd_soc_card_get_drvdata(soc_card))->sysclk; | |
| 59 | 50 | |
| 60 | 51 | /* set codec DAI configuration */ |
| 61 | 52 | ret = snd_soc_dai_set_fmt(codec_dai, AUDIO_FORMAT); |
| @@ -133,13 +124,22 @@ static int evm_aic3x_init(struct snd_soc_pcm_runtime *rtd) · 71 unmodified lines | ||
| 133 | 124 | { |
| 134 | 125 | struct snd_soc_codec *codec = rtd->codec; |
| 135 | 126 | struct snd_soc_dapm_context *dapm = &codec->dapm; |
| 127 | + struct device_node *np = codec->card->dev->of_node; | |
| 128 | + int ret; | |
| 136 | 129 | |
| 137 | 130 | /* Add davinci-evm specific widgets */ |
| 138 | 131 | snd_soc_dapm_new_controls(dapm, aic3x_dapm_widgets, |
| 139 | 132 | ARRAY_SIZE(aic3x_dapm_widgets)); |
| 140 | 133 | |
| 141 | − /* Set up davinci-evm specific audio path audio_map */ | |
| 142 | − snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); | |
| 134 | + if (np) { | |
| 135 | + ret = snd_soc_of_parse_audio_routing(codec->card, | |
| 136 | + "ti,audio-routing"); | |
| 137 | + if (ret) | |
| 138 | + return ret; | |
| 139 | + } else { | |
| 140 | + /* Set up davinci-evm specific audio path audio_map */ | |
| 141 | + snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); | |
| 142 | + } | |
| 143 | 143 | |
| 144 | 144 | /* not connected */ |
| 145 | 145 | snd_soc_dapm_disable_pin(dapm, "MONO_LOUT"); |
| @@ -243,35 +243,65 @@ static struct snd_soc_dai_link da850_evm_dai = { · 97 unmodified lines | ||
| 243 | 243 | }; |
| 244 | 244 | |
| 245 | 245 | /* davinci dm6446 evm audio machine driver */ |
| 246 | +/* | |
| 247 | + * ASP0 in DM6446 EVM is clocked by U55, as configured by | |
| 248 | + * board-dm644x-evm.c using GPIOs from U18. There are six | |
| 249 | + * options; here we "know" we use a 48 KHz sample rate. | |
| 250 | + */ | |
| 251 | +static struct snd_soc_card_drvdata_davinci dm6446_snd_soc_card_drvdata = { | |
| 252 | + .sysclk = 12288000, | |
| 253 | +}; | |
| 254 | + | |
| 246 | 255 | static struct snd_soc_card dm6446_snd_soc_card_evm = { |
| 247 | 256 | .name = "DaVinci DM6446 EVM", |
| 248 | 257 | .owner = THIS_MODULE, |
| 249 | 258 | .dai_link = &dm6446_evm_dai, |
| 250 | 259 | .num_links = 1, |
| 260 | + .drvdata = &dm6446_snd_soc_card_drvdata, | |
| 251 | 261 | }; |
| 252 | 262 | |
| 253 | 263 | /* davinci dm355 evm audio machine driver */ |
| 264 | +/* ASP1 on DM355 EVM is clocked by an external oscillator */ | |
| 265 | +static struct snd_soc_card_drvdata_davinci dm355_snd_soc_card_drvdata = { | |
| 266 | + .sysclk = 27000000, | |
| 267 | +}; | |
| 268 | + | |
| 254 | 269 | static struct snd_soc_card dm355_snd_soc_card_evm = { |
| 255 | 270 | .name = "DaVinci DM355 EVM", |
| 256 | 271 | .owner = THIS_MODULE, |
| 257 | 272 | .dai_link = &dm355_evm_dai, |
| 258 | 273 | .num_links = 1, |
| 274 | + .drvdata = &dm355_snd_soc_card_drvdata, | |
| 259 | 275 | }; |
| 260 | 276 | |
| 261 | 277 | /* davinci dm365 evm audio machine driver */ |
| 278 | +static struct snd_soc_card_drvdata_davinci dm365_snd_soc_card_drvdata = { | |
| 279 | + .sysclk = 27000000, | |
| 280 | +}; | |
| 281 | + | |
| 262 | 282 | static struct snd_soc_card dm365_snd_soc_card_evm = { |
| 263 | 283 | .name = "DaVinci DM365 EVM", |
| 264 | 284 | .owner = THIS_MODULE, |
| 265 | 285 | .dai_link = &dm365_evm_dai, |
| 266 | 286 | .num_links = 1, |
| 287 | + .drvdata = &dm365_snd_soc_card_drvdata, | |
| 267 | 288 | }; |
| 268 | 289 | |
| 269 | 290 | /* davinci dm6467 evm audio machine driver */ |
| 291 | +static struct snd_soc_card_drvdata_davinci dm6467_snd_soc_card_drvdata = { | |
| 292 | + .sysclk = 27000000, | |
| 293 | +}; | |
| 294 | + | |
| 270 | 295 | static struct snd_soc_card dm6467_snd_soc_card_evm = { |
| 271 | 296 | .name = "DaVinci DM6467 EVM", |
| 272 | 297 | .owner = THIS_MODULE, |
| 273 | 298 | .dai_link = dm6467_evm_dai, |
| 274 | 299 | .num_links = ARRAY_SIZE(dm6467_evm_dai), |
| 300 | + .drvdata = &dm6467_snd_soc_card_drvdata, | |
| 301 | +}; | |
| 302 | + | |
| 303 | +static struct snd_soc_card_drvdata_davinci da830_snd_soc_card_drvdata = { | |
| 304 | + .sysclk = 24576000, | |
| 275 | 305 | }; |
| 276 | 306 | |
| 277 | 307 | static struct snd_soc_card da830_snd_soc_card = { |
| @@ -279,6 +309,11 @@ static struct snd_soc_card da830_snd_soc_card = { · 1 unmodified line | ||
| 279 | 309 | .owner = THIS_MODULE, |
| 280 | 310 | .dai_link = &da830_evm_dai, |
| 281 | 311 | .num_links = 1, |
| 312 | + .drvdata = &da830_snd_soc_card_drvdata, | |
| 313 | +}; | |
| 314 | + | |
| 315 | +static struct snd_soc_card_drvdata_davinci da850_snd_soc_card_drvdata = { | |
| 316 | + .sysclk = 24576000, | |
| 282 | 317 | }; |
| 283 | 318 | |
| 284 | 319 | static struct snd_soc_card da850_snd_soc_card = { |
| @@ -286,8 +321,101 @@ static struct snd_soc_card da850_snd_soc_card = { · 1 unmodified line | ||
| 286 | 321 | .owner = THIS_MODULE, |
| 287 | 322 | .dai_link = &da850_evm_dai, |
| 288 | 323 | .num_links = 1, |
| 324 | + .drvdata = &da850_snd_soc_card_drvdata, | |
| 325 | +}; | |
| 326 | + | |
| 327 | +#if defined(CONFIG_OF) | |
| 328 | + | |
| 329 | +/* | |
| 330 | + * The struct is used as place holder. It will be completely | |
| 331 | + * filled with data from dt node. | |
| 332 | + */ | |
| 333 | +static struct snd_soc_dai_link evm_dai_tlv320aic3x = { | |
| 334 | + .name = "TLV320AIC3X", | |
| 335 | + .stream_name = "AIC3X", | |
| 336 | + .codec_dai_name = "tlv320aic3x-hifi", | |
| 337 | + .ops = &evm_ops, | |
| 338 | + .init = evm_aic3x_init, | |
| 339 | +}; | |
| 340 | + | |
| 341 | +static const struct of_device_id davinci_evm_dt_ids[] = { | |
| 342 | + { | |
| 343 | + .compatible = "ti,da830-evm-audio", | |
| 344 | + .data = (void *) &evm_dai_tlv320aic3x, | |
| 345 | + }, | |
| 346 | + { /* sentinel */ } | |
| 347 | +}; | |
| 348 | +MODULE_DEVICE_TABLE(of, davinci_evm_dt_ids); | |
| 349 | + | |
| 350 | +/* davinci evm audio machine driver */ | |
| 351 | +static struct snd_soc_card evm_soc_card = { | |
| 352 | + .owner = THIS_MODULE, | |
| 353 | + .num_links = 1, | |
| 289 | 354 | }; |
| 290 | 355 | |
| 356 | +static int davinci_evm_probe(struct platform_device *pdev) | |
| 357 | +{ | |
| 358 | + struct device_node *np = pdev->dev.of_node; | |
| 359 | + const struct of_device_id *match = | |
| 360 | + of_match_device(of_match_ptr(davinci_evm_dt_ids), &pdev->dev); | |
| 361 | + struct snd_soc_dai_link *dai = (struct snd_soc_dai_link *) match->data; | |
| 362 | + struct snd_soc_card_drvdata_davinci *drvdata = NULL; | |
| 363 | + int ret = 0; | |
| 364 | + | |
| 365 | + evm_soc_card.dai_link = dai; | |
| 366 | + | |
| 367 | + dai->codec_of_node = of_parse_phandle(np, "ti,audio-codec", 0); | |
| 368 | + if (!dai->codec_of_node) | |
| 369 | + return -EINVAL; | |
| 370 | + | |
| 371 | + dai->cpu_of_node = of_parse_phandle(np, "ti,mcasp-controller", 0); | |
| 372 | + if (!dai->cpu_of_node) | |
| 373 | + return -EINVAL; | |
| 374 | + | |
| 375 | + dai->platform_of_node = dai->cpu_of_node; | |
| 376 | + | |
| 377 | + evm_soc_card.dev = &pdev->dev; | |
| 378 | + ret = snd_soc_of_parse_card_name(&evm_soc_card, "ti,model"); | |
| 379 | + if (ret) | |
| 380 | + return ret; | |
| 381 | + | |
| 382 | + drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); | |
| 383 | + if (!drvdata) | |
| 384 | + return -ENOMEM; | |
| 385 | + | |
| 386 | + ret = of_property_read_u32(np, "ti,codec-clock-rate", &drvdata->sysclk); | |
| 387 | + if (ret < 0) | |
| 388 | + return -EINVAL; | |
| 389 | + | |
| 390 | + snd_soc_card_set_drvdata(&evm_soc_card, drvdata); | |
| 391 | + ret = devm_snd_soc_register_card(&pdev->dev, &evm_soc_card); | |
| 392 | + | |
| 393 | + if (ret) | |
| 394 | + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); | |
| 395 | + | |
| 396 | + return ret; | |
| 397 | +} | |
| 398 | + | |
| 399 | +static int davinci_evm_remove(struct platform_device *pdev) | |
| 400 | +{ | |
| 401 | + struct snd_soc_card *card = platform_get_drvdata(pdev); | |
| 402 | + | |
| 403 | + snd_soc_unregister_card(card); | |
| 404 | + | |
| 405 | + return 0; | |
| 406 | +} | |
| 407 | + | |
| 408 | +static struct platform_driver davinci_evm_driver = { | |
| 409 | + .probe = davinci_evm_probe, | |
| 410 | + .remove = davinci_evm_remove, | |
| 411 | + .driver = { | |
| 412 | + .name = "davinci_evm", | |
| 413 | + .owner = THIS_MODULE, | |
| 414 | + .of_match_table = of_match_ptr(davinci_evm_dt_ids), | |
| 415 | + }, | |
| 416 | +}; | |
| 417 | +#endif | |
| 418 | + | |
| 291 | 419 | static struct platform_device *evm_snd_device; |
| 292 | 420 | |
| 293 | 421 | static int __init evm_init(void) |
| @@ -296,6 +424,15 @@ static int __init evm_init(void) · 2 unmodified lines | ||
| 296 | 424 | int index; |
| 297 | 425 | int ret; |
| 298 | 426 | |
| 427 | + /* | |
| 428 | + * If dtb is there, the devices will be created dynamically. | |
| 429 | + * Only register platfrom driver structure. | |
| 430 | + */ | |
| 431 | +#if defined(CONFIG_OF) | |
| 432 | + if (of_have_populated_dt()) | |
| 433 | + return platform_driver_register(&davinci_evm_driver); | |
| 434 | +#endif | |
| 435 | + | |
| 299 | 436 | if (machine_is_davinci_evm()) { |
| 300 | 437 | evm_snd_dev_data = &dm6446_snd_soc_card_evm; |
| 301 | 438 | index = 0; |
| @@ -331,6 +468,13 @@ static int __init evm_init(void) · 29 unmodified lines | ||
| 331 | 468 | |
| 332 | 469 | static void __exit evm_exit(void) |
| 333 | 470 | { |
| 471 | +#if defined(CONFIG_OF) | |
| 472 | + if (of_have_populated_dt()) { | |
| 473 | + platform_driver_unregister(&davinci_evm_driver); | |
| 474 | + return; | |
| 475 | + } | |
| 476 | +#endif | |
| 477 | + | |
| 334 | 478 | platform_device_unregister(evm_snd_device); |
| 335 | 479 | } |
| 336 | 480 | |
| @@ -1001,18 +1001,40 @@ static const struct snd_soc_component_driver davinci_mcasp_component = { · 1000 unmodified lines | ||
| 1001 | 1001 | .name = "davinci-mcasp", |
| 1002 | 1002 | }; |
| 1003 | 1003 | |
| 1004 | +/* Some HW specific values and defaults. The rest is filled in from DT. */ | |
| 1005 | +static struct snd_platform_data dm646x_mcasp_pdata = { | |
| 1006 | + .tx_dma_offset = 0x400, | |
| 1007 | + .rx_dma_offset = 0x400, | |
| 1008 | + .asp_chan_q = EVENTQ_0, | |
| 1009 | + .version = MCASP_VERSION_1, | |
| 1010 | +}; | |
| 1011 | + | |
| 1012 | +static struct snd_platform_data da830_mcasp_pdata = { | |
| 1013 | + .tx_dma_offset = 0x2000, | |
| 1014 | + .rx_dma_offset = 0x2000, | |
| 1015 | + .asp_chan_q = EVENTQ_0, | |
| 1016 | + .version = MCASP_VERSION_2, | |
| 1017 | +}; | |
| 1018 | + | |
| 1019 | +static struct snd_platform_data omap2_mcasp_pdata = { | |
| 1020 | + .tx_dma_offset = 0, | |
| 1021 | + .rx_dma_offset = 0, | |
| 1022 | + .asp_chan_q = EVENTQ_0, | |
| 1023 | + .version = MCASP_VERSION_3, | |
| 1024 | +}; | |
| 1025 | + | |
| 1004 | 1026 | static const struct of_device_id mcasp_dt_ids[] = { |
| 1005 | 1027 | { |
| 1006 | 1028 | .compatible = "ti,dm646x-mcasp-audio", |
| 1007 | − .data = (void *)MCASP_VERSION_1, | |
| 1029 | + .data = &dm646x_mcasp_pdata, | |
| 1008 | 1030 | }, |
| 1009 | 1031 | { |
| 1010 | 1032 | .compatible = "ti,da830-mcasp-audio", |
| 1011 | − .data = (void *)MCASP_VERSION_2, | |
| 1033 | + .data = &da830_mcasp_pdata, | |
| 1012 | 1034 | }, |
| 1013 | 1035 | { |
| 1014 | − .compatible = "ti,omap2-mcasp-audio", | |
| 1015 | − .data = (void *)MCASP_VERSION_3, | |
| 1036 | + .compatible = "ti,am33xx-mcasp-audio", | |
| 1037 | + .data = &omap2_mcasp_pdata, | |
| 1016 | 1038 | }, |
| 1017 | 1039 | { /* sentinel */ } |
| 1018 | 1040 | }; |
| @@ -1025,9 +1047,9 @@ static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( · 6 unmodified lines | ||
| 1025 | 1047 | struct snd_platform_data *pdata = NULL; |
| 1026 | 1048 | const struct of_device_id *match = |
| 1027 | 1049 | of_match_device(mcasp_dt_ids, &pdev->dev); |
| 1050 | + struct of_phandle_args dma_spec; | |
| 1028 | 1051 | |
| 1029 | 1052 | const u32 *of_serial_dir32; |
| 1030 | − u8 *of_serial_dir; | |
| 1031 | 1053 | u32 val; |
| 1032 | 1054 | int i, ret = 0; |
| 1033 | 1055 | |
| @@ -1035,20 +1057,13 @@ static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( · 1 unmodified line | ||
| 1035 | 1057 | pdata = pdev->dev.platform_data; |
| 1036 | 1058 | return pdata; |
| 1037 | 1059 | } else if (match) { |
| 1038 | − pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); | |
| 1039 | − if (!pdata) { | |
| 1040 | − ret = -ENOMEM; | |
| 1041 | − goto nodata; | |
| 1042 | − } | |
| 1060 | + pdata = (struct snd_platform_data *) match->data; | |
| 1043 | 1061 | } else { |
| 1044 | 1062 | /* control shouldn't reach here. something is wrong */ |
| 1045 | 1063 | ret = -EINVAL; |
| 1046 | 1064 | goto nodata; |
| 1047 | 1065 | } |
| 1048 | 1066 | |
| 1049 | − if (match->data) | |
| 1050 | − pdata->version = (u8)((int)match->data); | |
| 1051 | − | |
| 1052 | 1067 | ret = of_property_read_u32(np, "op-mode", &val); |
| 1053 | 1068 | if (ret >= 0) |
| 1054 | 1069 | pdata->op_mode = val; |
| @@ -1065,35 +1080,46 @@ static struct snd_platform_data *davinci_mcasp_set_pdata_from_of( · 10 unmodified lines | ||
| 1065 | 1080 | pdata->tdm_slots = val; |
| 1066 | 1081 | } |
| 1067 | 1082 | |
| 1068 | − ret = of_property_read_u32(np, "num-serializer", &val); | |
| 1069 | − if (ret >= 0) | |
| 1070 | − pdata->num_serializer = val; | |
| 1071 | − | |
| 1072 | 1083 | of_serial_dir32 = of_get_property(np, "serial-dir", &val); |
| 1073 | 1084 | val /= sizeof(u32); |
| 1074 | − if (val != pdata->num_serializer) { | |
| 1075 | − dev_err(&pdev->dev, | |
| 1076 | − "num-serializer(%d) != serial-dir size(%d)\n", | |
| 1077 | − pdata->num_serializer, val); | |
| 1078 | − ret = -EINVAL; | |
| 1079 | − goto nodata; | |
| 1080 | − } | |
| 1081 | − | |
| 1082 | 1085 | if (of_serial_dir32) { |
| 1083 | − of_serial_dir = devm_kzalloc(&pdev->dev, | |
| 1084 | − (sizeof(*of_serial_dir) * val), | |
| 1085 | − GFP_KERNEL); | |
| 1086 | + u8 *of_serial_dir = devm_kzalloc(&pdev->dev, | |
| 1087 | + (sizeof(*of_serial_dir) * val), | |
| 1088 | + GFP_KERNEL); | |
| 1086 | 1089 | if (!of_serial_dir) { |
| 1087 | 1090 | ret = -ENOMEM; |
| 1088 | 1091 | goto nodata; |
| 1089 | 1092 | } |
| 1090 | 1093 | |
| 1091 | − for (i = 0; i < pdata->num_serializer; i++) | |
| 1094 | + for (i = 0; i < val; i++) | |
| 1092 | 1095 | of_serial_dir[i] = be32_to_cpup(&of_serial_dir32[i]); |
| 1093 | 1096 | |
| 1097 | + pdata->num_serializer = val; | |
| 1094 | 1098 | pdata->serial_dir = of_serial_dir; |
| 1095 | 1099 | } |
| 1096 | 1100 | |
| 1101 | + ret = of_property_match_string(np, "dma-names", "tx"); | |
| 1102 | + if (ret < 0) | |
| 1103 | + goto nodata; | |
| 1104 | + | |
| 1105 | + ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells", ret, | |
| 1106 | + &dma_spec); | |
| 1107 | + if (ret < 0) | |
| 1108 | + goto nodata; | |
| 1109 | + | |
| 1110 | + pdata->tx_dma_channel = dma_spec.args[0]; | |
| 1111 | + | |
| 1112 | + ret = of_property_match_string(np, "dma-names", "rx"); | |
| 1113 | + if (ret < 0) | |
| 1114 | + goto nodata; | |
| 1115 | + | |
| 1116 | + ret = of_parse_phandle_with_args(np, "dmas", "#dma-cells", ret, | |
| 1117 | + &dma_spec); | |
| 1118 | + if (ret < 0) | |
| 1119 | + goto nodata; | |
| 1120 | + | |
| 1121 | + pdata->rx_dma_channel = dma_spec.args[0]; | |
| 1122 | + | |
| 1097 | 1123 | ret = of_property_read_u32(np, "tx-num-evt", &val); |
| 1098 | 1124 | if (ret >= 0) |
| 1099 | 1125 | pdata->txnumevt = val; |
| @@ -1124,7 +1150,7 @@ nodata: · 24 unmodified lines | ||
| 1124 | 1150 | static int davinci_mcasp_probe(struct platform_device *pdev) |
| 1125 | 1151 | { |
| 1126 | 1152 | struct davinci_pcm_dma_params *dma_data; |
| 1127 | − struct resource *mem, *ioarea, *res; | |
| 1153 | + struct resource *mem, *ioarea, *res, *dat; | |
| 1128 | 1154 | struct snd_platform_data *pdata; |
| 1129 | 1155 | struct davinci_audio_dev *dev; |
| 1130 | 1156 | int ret; |
| @@ -1145,10 +1171,15 @@ static int davinci_mcasp_probe(struct platform_device *pdev) · 14 unmodified lines | ||
| 1145 | 1171 | return -EINVAL; |
| 1146 | 1172 | } |
| 1147 | 1173 | |
| 1148 | − mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 1174 | + mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); | |
| 1149 | 1175 | if (!mem) { |
| 1150 | − dev_err(&pdev->dev, "no mem resource?\n"); | |
| 1151 | − return -ENODEV; | |
| 1176 | + dev_warn(dev->dev, | |
| 1177 | + "\"mpu\" mem resource not found, using index 0\n"); | |
| 1178 | + mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 1179 | + if (!mem) { | |
| 1180 | + dev_err(&pdev->dev, "no mem resource?\n"); | |
| 1181 | + return -ENODEV; | |
| 1182 | + } | |
| 1152 | 1183 | } |
| 1153 | 1184 | |
| 1154 | 1185 | ioarea = devm_request_mem_region(&pdev->dev, mem->start, |
| @@ -1182,40 +1213,36 @@ static int davinci_mcasp_probe(struct platform_device *pdev) · 27 unmodified lines | ||
| 1182 | 1213 | dev->rxnumevt = pdata->rxnumevt; |
| 1183 | 1214 | dev->dev = &pdev->dev; |
| 1184 | 1215 | |
| 1216 | + dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat"); | |
| 1217 | + if (!dat) | |
| 1218 | + dat = mem; | |
| 1219 | + | |
| 1185 | 1220 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]; |
| 1186 | 1221 | dma_data->asp_chan_q = pdata->asp_chan_q; |
| 1187 | 1222 | dma_data->ram_chan_q = pdata->ram_chan_q; |
| 1188 | 1223 | dma_data->sram_pool = pdata->sram_pool; |
| 1189 | 1224 | dma_data->sram_size = pdata->sram_size_playback; |
| 1190 | − dma_data->dma_addr = (dma_addr_t) (pdata->tx_dma_offset + | |
| 1191 | − mem->start); | |
| 1225 | + dma_data->dma_addr = dat->start + pdata->tx_dma_offset; | |
| 1192 | 1226 | |
| 1193 | − /* first TX, then RX */ | |
| 1194 | 1227 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); |
| 1195 | − if (!res) { | |
| 1196 | − dev_err(&pdev->dev, "no DMA resource\n"); | |
| 1197 | − ret = -ENODEV; | |
| 1198 | − goto err_release_clk; | |
| 1199 | − } | |
| 1200 | − | |
| 1201 | − dma_data->channel = res->start; | |
| 1228 | + if (res) | |
| 1229 | + dma_data->channel = res->start; | |
| 1230 | + else | |
| 1231 | + dma_data->channel = pdata->tx_dma_channel; | |
| 1202 | 1232 | |
| 1203 | 1233 | dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]; |
| 1204 | 1234 | dma_data->asp_chan_q = pdata->asp_chan_q; |
| 1205 | 1235 | dma_data->ram_chan_q = pdata->ram_chan_q; |
| 1206 | 1236 | dma_data->sram_pool = pdata->sram_pool; |
| 1207 | 1237 | dma_data->sram_size = pdata->sram_size_capture; |
| 1208 | − dma_data->dma_addr = (dma_addr_t)(pdata->rx_dma_offset + | |
| 1209 | − mem->start); | |
| 1238 | + dma_data->dma_addr = dat->start + pdata->rx_dma_offset; | |
| 1210 | 1239 | |
| 1211 | 1240 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
| 1212 | − if (!res) { | |
| 1213 | − dev_err(&pdev->dev, "no DMA resource\n"); | |
| 1214 | − ret = -ENODEV; | |
| 1215 | − goto err_release_clk; | |
| 1216 | − } | |
| 1241 | + if (res) | |
| 1242 | + dma_data->channel = res->start; | |
| 1243 | + else | |
| 1244 | + dma_data->channel = pdata->rx_dma_channel; | |
| 1217 | 1245 | |
| 1218 | − dma_data->channel = res->start; | |
| 1219 | 1246 | dev_set_drvdata(&pdev->dev, dev); |
| 1220 | 1247 | ret = snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, |
| 1221 | 1248 | &davinci_mcasp_dai[pdata->op_mode], 1); |
| @@ -1251,12 +1278,51 @@ static int davinci_mcasp_remove(struct platform_device *pdev) · 29 unmodified lines | ||
| 1251 | 1278 | return 0; |
| 1252 | 1279 | } |
| 1253 | 1280 | |
| 1281 | +#ifdef CONFIG_PM_SLEEP | |
| 1282 | +static int davinci_mcasp_suspend(struct device *dev) | |
| 1283 | +{ | |
| 1284 | + struct davinci_audio_dev *a = dev_get_drvdata(dev); | |
| 1285 | + void __iomem *base = a->base; | |
| 1286 | + | |
| 1287 | + a->context.txfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_TXFMCTL_REG); | |
| 1288 | + a->context.rxfmtctl = mcasp_get_reg(base + DAVINCI_MCASP_RXFMCTL_REG); | |
| 1289 | + a->context.txfmt = mcasp_get_reg(base + DAVINCI_MCASP_TXFMT_REG); | |
| 1290 | + a->context.rxfmt = mcasp_get_reg(base + DAVINCI_MCASP_RXFMT_REG); | |
| 1291 | + a->context.aclkxctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKXCTL_REG); | |
| 1292 | + a->context.aclkrctl = mcasp_get_reg(base + DAVINCI_MCASP_ACLKRCTL_REG); | |
| 1293 | + a->context.pdir = mcasp_get_reg(base + DAVINCI_MCASP_PDIR_REG); | |
| 1294 | + | |
| 1295 | + return 0; | |
| 1296 | +} | |
| 1297 | + | |
| 1298 | +static int davinci_mcasp_resume(struct device *dev) | |
| 1299 | +{ | |
| 1300 | + struct davinci_audio_dev *a = dev_get_drvdata(dev); | |
| 1301 | + void __iomem *base = a->base; | |
| 1302 | + | |
| 1303 | + mcasp_set_reg(base + DAVINCI_MCASP_TXFMCTL_REG, a->context.txfmtctl); | |
| 1304 | + mcasp_set_reg(base + DAVINCI_MCASP_RXFMCTL_REG, a->context.rxfmtctl); | |
| 1305 | + mcasp_set_reg(base + DAVINCI_MCASP_TXFMT_REG, a->context.txfmt); | |
| 1306 | + mcasp_set_reg(base + DAVINCI_MCASP_RXFMT_REG, a->context.rxfmt); | |
| 1307 | + mcasp_set_reg(base + DAVINCI_MCASP_ACLKXCTL_REG, a->context.aclkxctl); | |
| 1308 | + mcasp_set_reg(base + DAVINCI_MCASP_ACLKRCTL_REG, a->context.aclkrctl); | |
| 1309 | + mcasp_set_reg(base + DAVINCI_MCASP_PDIR_REG, a->context.pdir); | |
| 1310 | + | |
| 1311 | + return 0; | |
| 1312 | +} | |
| 1313 | +#endif | |
| 1314 | + | |
| 1315 | +SIMPLE_DEV_PM_OPS(davinci_mcasp_pm_ops, | |
| 1316 | + davinci_mcasp_suspend, | |
| 1317 | + davinci_mcasp_resume); | |
| 1318 | + | |
| 1254 | 1319 | static struct platform_driver davinci_mcasp_driver = { |
| 1255 | 1320 | .probe = davinci_mcasp_probe, |
| 1256 | 1321 | .remove = davinci_mcasp_remove, |
| 1257 | 1322 | .driver = { |
| 1258 | 1323 | .name = "davinci-mcasp", |
| 1259 | 1324 | .owner = THIS_MODULE, |
| 1325 | + .pm = &davinci_mcasp_pm_ops, | |
| 1260 | 1326 | .of_match_table = mcasp_dt_ids, |
| 1261 | 1327 | }, |
| 1262 | 1328 | }; |
| @@ -1266,4 +1332,3 @@ module_platform_driver(davinci_mcasp_driver); · 3 unmodified lines | ||
| 1266 | 1332 | MODULE_AUTHOR("Steve Chen"); |
| 1267 | 1333 | MODULE_DESCRIPTION("TI DAVINCI McASP SoC Interface"); |
| 1268 | 1334 | MODULE_LICENSE("GPL"); |
| 1269 | − | |
| @@ -43,6 +43,18 @@ struct davinci_audio_dev { · 42 unmodified lines | ||
| 43 | 43 | /* McASP FIFO related */ |
| 44 | 44 | u8 txnumevt; |
| 45 | 45 | u8 rxnumevt; |
| 46 | + | |
| 47 | +#ifdef CONFIG_PM_SLEEP | |
| 48 | + struct { | |
| 49 | + u32 txfmtctl; | |
| 50 | + u32 rxfmtctl; | |
| 51 | + u32 txfmt; | |
| 52 | + u32 rxfmt; | |
| 53 | + u32 aclkxctl; | |
| 54 | + u32 aclkrctl; | |
| 55 | + u32 pdir; | |
| 56 | + } context; | |
| 57 | +#endif | |
| 46 | 58 | }; |
| 47 | 59 | |
| 48 | 60 | #endif /* DAVINCI_MCASP_H */ |
| @@ -42,7 +42,8 @@ static int eukrea_tlv320_hw_params(struct snd_pcm_substream *substream, · 41 unmodified lines | ||
| 42 | 42 | SND_SOC_DAIFMT_NB_NF | |
| 43 | 43 | SND_SOC_DAIFMT_CBM_CFM); |
| 44 | 44 | if (ret) { |
| 45 | − pr_err("%s: failed set cpu dai format\n", __func__); | |
| 45 | + dev_err(cpu_dai->dev, | |
| 46 | + "Failed to set the cpu dai format.\n"); | |
| 46 | 47 | return ret; |
| 47 | 48 | } |
| 48 | 49 | |
| @@ -50,14 +51,16 @@ static int eukrea_tlv320_hw_params(struct snd_pcm_substream *substream, · 1 unmodified line | ||
| 50 | 51 | SND_SOC_DAIFMT_NB_NF | |
| 51 | 52 | SND_SOC_DAIFMT_CBM_CFM); |
| 52 | 53 | if (ret) { |
| 53 | − pr_err("%s: failed set codec dai format\n", __func__); | |
| 54 | + dev_err(cpu_dai->dev, | |
| 55 | + "Failed to set the codec format.\n"); | |
| 54 | 56 | return ret; |
| 55 | 57 | } |
| 56 | 58 | |
| 57 | 59 | ret = snd_soc_dai_set_sysclk(codec_dai, 0, |
| 58 | 60 | CODEC_CLOCK, SND_SOC_CLOCK_OUT); |
| 59 | 61 | if (ret) { |
| 60 | − pr_err("%s: failed setting codec sysclk\n", __func__); | |
| 62 | + dev_err(cpu_dai->dev, | |
| 63 | + "Failed to set the codec sysclk.\n"); | |
| 61 | 64 | return ret; |
| 62 | 65 | } |
| 63 | 66 | snd_soc_dai_set_tdm_slot(cpu_dai, 0xffffffc, 0xffffffc, 2, 0); |
| @@ -65,7 +68,8 @@ static int eukrea_tlv320_hw_params(struct snd_pcm_substream *substream, · 1 unmodified line | ||
| 65 | 68 | ret = snd_soc_dai_set_sysclk(cpu_dai, IMX_SSP_SYS_CLK, 0, |
| 66 | 69 | SND_SOC_CLOCK_IN); |
| 67 | 70 | if (ret) { |
| 68 | − pr_err("can't set CPU system clock IMX_SSP_SYS_CLK\n"); | |
| 71 | + dev_err(cpu_dai->dev, | |
| 72 | + "Can't set the IMX_SSP_SYS_CLK CPU system clock.\n"); | |
| 69 | 73 | return ret; |
| 70 | 74 | } |
| 71 | 75 | |
| @@ -155,7 +159,8 @@ static struct platform_driver eukrea_tlv320_driver = { · 83 unmodified lines | ||
| 155 | 159 | .owner = THIS_MODULE, |
| 156 | 160 | }, |
| 157 | 161 | .probe = eukrea_tlv320_probe, |
| 158 | − .remove = eukrea_tlv320_remove,}; | |
| 162 | + .remove = eukrea_tlv320_remove, | |
| 163 | +}; | |
| 159 | 164 | |
| 160 | 165 | module_platform_driver(eukrea_tlv320_driver); |
| 161 | 166 | |
| @@ -963,7 +963,7 @@ static bool fsl_spdif_readable_reg(struct device *dev, unsigned int reg) · 962 unmodified lines | ||
| 963 | 963 | return true; |
| 964 | 964 | default: |
| 965 | 965 | return false; |
| 966 | − }; | |
| 966 | + } | |
| 967 | 967 | } |
| 968 | 968 | |
| 969 | 969 | static bool fsl_spdif_writeable_reg(struct device *dev, unsigned int reg) |
| @@ -982,7 +982,7 @@ static bool fsl_spdif_writeable_reg(struct device *dev, unsigned int reg) · 12 unmodified lines | ||
| 982 | 982 | return true; |
| 983 | 983 | default: |
| 984 | 984 | return false; |
| 985 | − }; | |
| 985 | + } | |
| 986 | 986 | } |
| 987 | 987 | |
| 988 | 988 | static const struct regmap_config fsl_spdif_regmap_config = { |
| @@ -1107,11 +1107,6 @@ static int fsl_spdif_probe(struct platform_device *pdev) · 118 unmodified lines | ||
| 1107 | 1107 | |
| 1108 | 1108 | /* Get the addresses and IRQ */ |
| 1109 | 1109 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1110 | − if (IS_ERR(res)) { | |
| 1111 | − dev_err(&pdev->dev, "could not determine device resources\n"); | |
| 1112 | − return PTR_ERR(res); | |
| 1113 | − } | |
| 1114 | − | |
| 1115 | 1110 | regs = devm_ioremap_resource(&pdev->dev, res); |
| 1116 | 1111 | if (IS_ERR(regs)) |
| 1117 | 1112 | return PTR_ERR(regs); |
| @@ -1172,23 +1167,16 @@ static int fsl_spdif_probe(struct platform_device *pdev) · 54 unmodified lines | ||
| 1172 | 1167 | /* Register with ASoC */ |
| 1173 | 1168 | dev_set_drvdata(&pdev->dev, spdif_priv); |
| 1174 | 1169 | |
| 1175 | − ret = snd_soc_register_component(&pdev->dev, &fsl_spdif_component, | |
| 1176 | − &spdif_priv->cpu_dai_drv, 1); | |
| 1170 | + ret = devm_snd_soc_register_component(&pdev->dev, &fsl_spdif_component, | |
| 1171 | + &spdif_priv->cpu_dai_drv, 1); | |
| 1177 | 1172 | if (ret) { |
| 1178 | 1173 | dev_err(&pdev->dev, "failed to register DAI: %d\n", ret); |
| 1179 | 1174 | return ret; |
| 1180 | 1175 | } |
| 1181 | 1176 | |
| 1182 | 1177 | ret = imx_pcm_dma_init(pdev); |
| 1183 | − if (ret) { | |
| 1178 | + if (ret) | |
| 1184 | 1179 | dev_err(&pdev->dev, "imx_pcm_dma_init failed: %d\n", ret); |
| 1185 | − goto error_component; | |
| 1186 | − } | |
| 1187 | − | |
| 1188 | − return ret; | |
| 1189 | − | |
| 1190 | −error_component: | |
| 1191 | − snd_soc_unregister_component(&pdev->dev); | |
| 1192 | 1180 | |
| 1193 | 1181 | return ret; |
| 1194 | 1182 | } |
| @@ -1196,7 +1184,6 @@ error_component: · 1 unmodified line | ||
| 1196 | 1184 | static int fsl_spdif_remove(struct platform_device *pdev) |
| 1197 | 1185 | { |
| 1198 | 1186 | imx_pcm_dma_exit(pdev); |
| 1199 | − snd_soc_unregister_component(&pdev->dev); | |
| 1200 | 1187 | |
| 1201 | 1188 | return 0; |
| 1202 | 1189 | } |
| @@ -469,19 +469,12 @@ static int fsl_ssi_startup(struct snd_pcm_substream *substream, · 468 unmodified lines | ||
| 469 | 469 | * parameters, then the second stream may be |
| 470 | 470 | * constrained to the wrong sample rate or size. |
| 471 | 471 | */ |
| 472 | − if (!first_runtime->sample_bits) { | |
| 473 | − dev_err(substream->pcm->card->dev, | |
| 474 | − "set sample size in %s stream first\n", | |
| 475 | − substream->stream == | |
| 476 | − SNDRV_PCM_STREAM_PLAYBACK | |
| 477 | − ? "capture" : "playback"); | |
| 478 | − return -EAGAIN; | |
| 479 | − } | |
| 480 | − | |
| 481 | − snd_pcm_hw_constraint_minmax(substream->runtime, | |
| 482 | − SNDRV_PCM_HW_PARAM_SAMPLE_BITS, | |
| 472 | + if (first_runtime->sample_bits) { | |
| 473 | + snd_pcm_hw_constraint_minmax(substream->runtime, | |
| 474 | + SNDRV_PCM_HW_PARAM_SAMPLE_BITS, | |
| 483 | 475 | first_runtime->sample_bits, |
| 484 | 476 | first_runtime->sample_bits); |
| 477 | + } | |
| 485 | 478 | } |
| 486 | 479 | |
| 487 | 480 | ssi_private->second_stream = substream; |
| @@ -748,7 +741,7 @@ static void fsl_ssi_ac97_init(void) · 260 unmodified lines | ||
| 748 | 741 | fsl_ssi_setup(fsl_ac97_data); |
| 749 | 742 | } |
| 750 | 743 | |
| 751 | −void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, | |
| 744 | +static void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, | |
| 752 | 745 | unsigned short val) |
| 753 | 746 | { |
| 754 | 747 | struct ccsr_ssi *ssi = fsl_ac97_data->ssi; |
| @@ -770,7 +763,7 @@ void fsl_ssi_ac97_write(struct snd_ac97 *ac97, unsigned short reg, · 15 unmodified lines | ||
| 770 | 763 | udelay(100); |
| 771 | 764 | } |
| 772 | 765 | |
| 773 | −unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97, | |
| 766 | +static unsigned short fsl_ssi_ac97_read(struct snd_ac97 *ac97, | |
| 774 | 767 | unsigned short reg) |
| 775 | 768 | { |
| 776 | 769 | struct ccsr_ssi *ssi = fsl_ac97_data->ssi; |
| @@ -936,7 +929,7 @@ static int fsl_ssi_probe(struct platform_device *pdev) · 159 unmodified lines | ||
| 936 | 929 | ssi_private->ssi_phys = res.start; |
| 937 | 930 | |
| 938 | 931 | ssi_private->irq = irq_of_parse_and_map(np, 0); |
| 939 | − if (ssi_private->irq == 0) { | |
| 932 | + if (!ssi_private->irq) { | |
| 940 | 933 | dev_err(&pdev->dev, "no irq for node %s\n", np->full_name); |
| 941 | 934 | return -ENXIO; |
| 942 | 935 | } |
| @@ -1135,7 +1128,6 @@ static int fsl_ssi_remove(struct platform_device *pdev) · 192 unmodified lines | ||
| 1135 | 1128 | if (ssi_private->ssi_on_imx) |
| 1136 | 1129 | imx_pcm_dma_exit(pdev); |
| 1137 | 1130 | snd_soc_unregister_component(&pdev->dev); |
| 1138 | − dev_set_drvdata(&pdev->dev, NULL); | |
| 1139 | 1131 | device_remove_file(&pdev->dev, &ssi_private->dev_attr); |
| 1140 | 1132 | if (ssi_private->ssi_on_imx) |
| 1141 | 1133 | clk_disable_unprepare(ssi_private->clk); |
| @@ -66,13 +66,10 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf, · 65 unmodified lines | ||
| 66 | 66 | size_t count, loff_t *ppos) |
| 67 | 67 | { |
| 68 | 68 | ssize_t ret; |
| 69 | − char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | |
| 69 | + char *buf; | |
| 70 | 70 | int port = (int)file->private_data; |
| 71 | 71 | u32 pdcr, ptcr; |
| 72 | 72 | |
| 73 | − if (!buf) | |
| 74 | − return -ENOMEM; | |
| 75 | − | |
| 76 | 73 | if (audmux_clk) { |
| 77 | 74 | ret = clk_prepare_enable(audmux_clk); |
| 78 | 75 | if (ret) |
| @@ -85,6 +82,10 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf, · 6 unmodified lines | ||
| 85 | 82 | if (audmux_clk) |
| 86 | 83 | clk_disable_unprepare(audmux_clk); |
| 87 | 84 | |
| 85 | + buf = kmalloc(PAGE_SIZE, GFP_KERNEL); | |
| 86 | + if (!buf) | |
| 87 | + return -ENOMEM; | |
| 88 | + | |
| 88 | 89 | ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n", |
| 89 | 90 | pdcr, ptcr); |
| 90 | 91 | |
| @@ -160,6 +160,7 @@ static struct platform_driver imx_mc13783_audio_driver = { · 159 unmodified lines | ||
| 160 | 160 | .driver = { |
| 161 | 161 | .name = "imx_mc13783", |
| 162 | 162 | .owner = THIS_MODULE, |
| 163 | + .pm = &snd_soc_pm_ops, | |
| 163 | 164 | }, |
| 164 | 165 | .probe = imx_mc13783_probe, |
| 165 | 166 | .remove = imx_mc13783_remove |
| @@ -25,12 +25,10 @@ · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | static bool filter(struct dma_chan *chan, void *param) |
| 27 | 27 | { |
| 28 | − struct snd_dmaengine_dai_dma_data *dma_data = param; | |
| 29 | − | |
| 30 | 28 | if (!imx_dma_is_general_purpose(chan)) |
| 31 | 29 | return false; |
| 32 | 30 | |
| 33 | − chan->private = dma_data->filter_data; | |
| 31 | + chan->private = param; | |
| 34 | 32 | |
| 35 | 33 | return true; |
| 36 | 34 | } |
| @@ -39,8 +39,6 @@ struct imx_pcm_runtime_data { · 38 unmodified lines | ||
| 39 | 39 | unsigned int period; |
| 40 | 40 | int periods; |
| 41 | 41 | unsigned long offset; |
| 42 | − unsigned long last_offset; | |
| 43 | − unsigned long size; | |
| 44 | 42 | struct hrtimer hrt; |
| 45 | 43 | int poll_time_ns; |
| 46 | 44 | struct snd_pcm_substream *substream; |
| @@ -52,9 +50,7 @@ static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt) · 5 unmodified lines | ||
| 52 | 50 | struct imx_pcm_runtime_data *iprtd = |
| 53 | 51 | container_of(hrt, struct imx_pcm_runtime_data, hrt); |
| 54 | 52 | struct snd_pcm_substream *substream = iprtd->substream; |
| 55 | − struct snd_pcm_runtime *runtime = substream->runtime; | |
| 56 | 53 | struct pt_regs regs; |
| 57 | − unsigned long delta; | |
| 58 | 54 | |
| 59 | 55 | if (!atomic_read(&iprtd->running)) |
| 60 | 56 | return HRTIMER_NORESTART; |
| @@ -66,19 +62,7 @@ static enum hrtimer_restart snd_hrtimer_callback(struct hrtimer *hrt) · 5 unmodified lines | ||
| 66 | 62 | else |
| 67 | 63 | iprtd->offset = regs.ARM_r9 & 0xffff; |
| 68 | 64 | |
| 69 | − /* How much data have we transferred since the last period report? */ | |
| 70 | − if (iprtd->offset >= iprtd->last_offset) | |
| 71 | − delta = iprtd->offset - iprtd->last_offset; | |
| 72 | − else | |
| 73 | − delta = runtime->buffer_size + iprtd->offset | |
| 74 | − - iprtd->last_offset; | |
| 75 | − | |
| 76 | − /* If we've transferred at least a period then report it and | |
| 77 | − * reset our poll time */ | |
| 78 | − if (delta >= iprtd->period) { | |
| 79 | − snd_pcm_period_elapsed(substream); | |
| 80 | − iprtd->last_offset = iprtd->offset; | |
| 81 | − } | |
| 65 | + snd_pcm_period_elapsed(substream); | |
| 82 | 66 | |
| 83 | 67 | hrtimer_forward_now(hrt, ns_to_ktime(iprtd->poll_time_ns)); |
| 84 | 68 | |
| @@ -95,11 +79,9 @@ static int snd_imx_pcm_hw_params(struct snd_pcm_substream *substream, · 10 unmodified lines | ||
| 95 | 79 | struct snd_pcm_runtime *runtime = substream->runtime; |
| 96 | 80 | struct imx_pcm_runtime_data *iprtd = runtime->private_data; |
| 97 | 81 | |
| 98 | − iprtd->size = params_buffer_bytes(params); | |
| 99 | 82 | iprtd->periods = params_periods(params); |
| 100 | − iprtd->period = params_period_bytes(params) ; | |
| 83 | + iprtd->period = params_period_bytes(params); | |
| 101 | 84 | iprtd->offset = 0; |
| 102 | − iprtd->last_offset = 0; | |
| 103 | 85 | iprtd->poll_time_ns = 1000000000 / params_rate(params) * |
| 104 | 86 | params_period_size(params); |
| 105 | 87 | snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer); |
| @@ -159,7 +159,7 @@ static int imx_sgtl5000_probe(struct platform_device *pdev) · 158 unmodified lines | ||
| 159 | 159 | data->card.dapm_widgets = imx_sgtl5000_dapm_widgets; |
| 160 | 160 | data->card.num_dapm_widgets = ARRAY_SIZE(imx_sgtl5000_dapm_widgets); |
| 161 | 161 | |
| 162 | − ret = snd_soc_register_card(&data->card); | |
| 162 | + ret = devm_snd_soc_register_card(&pdev->dev, &data->card); | |
| 163 | 163 | if (ret) { |
| 164 | 164 | dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); |
| 165 | 165 | goto fail; |
| @@ -186,7 +186,6 @@ static int imx_sgtl5000_remove(struct platform_device *pdev) · 20 unmodified lines | ||
| 186 | 186 | { |
| 187 | 187 | struct imx_sgtl5000_data *data = platform_get_drvdata(pdev); |
| 188 | 188 | |
| 189 | − snd_soc_unregister_card(&data->card); | |
| 190 | 189 | clk_put(data->codec_clk); |
| 191 | 190 | |
| 192 | 191 | return 0; |
| @@ -202,6 +201,7 @@ static struct platform_driver imx_sgtl5000_driver = { · 9 unmodified lines | ||
| 202 | 201 | .driver = { |
| 203 | 202 | .name = "imx-sgtl5000", |
| 204 | 203 | .owner = THIS_MODULE, |
| 204 | + .pm = &snd_soc_pm_ops, | |
| 205 | 205 | .of_match_table = imx_sgtl5000_dt_ids, |
| 206 | 206 | }, |
| 207 | 207 | .probe = imx_sgtl5000_probe, |
| @@ -87,7 +87,7 @@ static int imx_spdif_audio_probe(struct platform_device *pdev) · 86 unmodified lines | ||
| 87 | 87 | if (ret) |
| 88 | 88 | goto error_dir; |
| 89 | 89 | |
| 90 | − ret = snd_soc_register_card(&data->card); | |
| 90 | + ret = devm_snd_soc_register_card(&pdev->dev, &data->card); | |
| 91 | 91 | if (ret) { |
| 92 | 92 | dev_err(&pdev->dev, "snd_soc_register_card failed: %d\n", ret); |
| 93 | 93 | goto error_dir; |
| @@ -119,8 +119,6 @@ static int imx_spdif_audio_remove(struct platform_device *pdev) · 25 unmodified lines | ||
| 119 | 119 | if (data->txdev) |
| 120 | 120 | platform_device_unregister(data->txdev); |
| 121 | 121 | |
| 122 | − snd_soc_unregister_card(&data->card); | |
| 123 | − | |
| 124 | 122 | return 0; |
| 125 | 123 | } |
| 126 | 124 | |
| @@ -613,7 +613,6 @@ static int imx_ssi_probe(struct platform_device *pdev) · 612 unmodified lines | ||
| 613 | 613 | failed_pcm: |
| 614 | 614 | snd_soc_unregister_component(&pdev->dev); |
| 615 | 615 | failed_register: |
| 616 | − release_mem_region(res->start, resource_size(res)); | |
| 617 | 616 | clk_disable_unprepare(ssi->clk); |
| 618 | 617 | failed_clk: |
| 619 | 618 | snd_soc_set_ac97_ops(NULL); |
| @@ -623,7 +622,6 @@ failed_clk: · 3 unmodified lines | ||
| 623 | 622 | |
| 624 | 623 | static int imx_ssi_remove(struct platform_device *pdev) |
| 625 | 624 | { |
| 626 | − struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 627 | 625 | struct imx_ssi *ssi = platform_get_drvdata(pdev); |
| 628 | 626 | |
| 629 | 627 | if (!ssi->dma_init) |
| @@ -637,7 +635,6 @@ static int imx_ssi_remove(struct platform_device *pdev) · 7 unmodified lines | ||
| 637 | 635 | if (ssi->flags & IMX_SSI_USE_AC97) |
| 638 | 636 | ac97_ssi = NULL; |
| 639 | 637 | |
| 640 | − release_mem_region(res->start, resource_size(res)); | |
| 641 | 638 | clk_disable_unprepare(ssi->clk); |
| 642 | 639 | snd_soc_set_ac97_ops(NULL); |
| 643 | 640 | |
| @@ -266,7 +266,7 @@ static int imx_wm8962_probe(struct platform_device *pdev) · 265 unmodified lines | ||
| 266 | 266 | data->card.late_probe = imx_wm8962_late_probe; |
| 267 | 267 | data->card.set_bias_level = imx_wm8962_set_bias_level; |
| 268 | 268 | |
| 269 | − ret = snd_soc_register_card(&data->card); | |
| 269 | + ret = devm_snd_soc_register_card(&pdev->dev, &data->card); | |
| 270 | 270 | if (ret) { |
| 271 | 271 | dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); |
| 272 | 272 | goto clk_fail; |
| @@ -279,8 +279,7 @@ static int imx_wm8962_probe(struct platform_device *pdev) · 6 unmodified lines | ||
| 279 | 279 | return 0; |
| 280 | 280 | |
| 281 | 281 | clk_fail: |
| 282 | − if (!IS_ERR(data->codec_clk)) | |
| 283 | − clk_disable_unprepare(data->codec_clk); | |
| 282 | + clk_disable_unprepare(data->codec_clk); | |
| 284 | 283 | fail: |
| 285 | 284 | if (ssi_np) |
| 286 | 285 | of_node_put(ssi_np); |
| @@ -296,7 +295,6 @@ static int imx_wm8962_remove(struct platform_device *pdev) · 9 unmodified lines | ||
| 296 | 295 | |
| 297 | 296 | if (!IS_ERR(data->codec_clk)) |
| 298 | 297 | clk_disable_unprepare(data->codec_clk); |
| 299 | − snd_soc_unregister_card(&data->card); | |
| 300 | 298 | |
| 301 | 299 | return 0; |
| 302 | 300 | } |
| @@ -311,6 +309,7 @@ static struct platform_driver imx_wm8962_driver = { · 8 unmodified lines | ||
| 311 | 309 | .driver = { |
| 312 | 310 | .name = "imx-wm8962", |
| 313 | 311 | .owner = THIS_MODULE, |
| 312 | + .pm = &snd_soc_pm_ops, | |
| 314 | 313 | .of_match_table = imx_wm8962_dt_ids, |
| 315 | 314 | }, |
| 316 | 315 | .probe = imx_wm8962_probe, |
| @@ -27,6 +27,11 @@ static int __asoc_simple_card_dai_init(struct snd_soc_dai *dai, · 26 unmodified lines | ||
| 27 | 27 | if (!ret && daifmt) |
| 28 | 28 | ret = snd_soc_dai_set_fmt(dai, daifmt); |
| 29 | 29 | |
| 30 | + if (ret == -ENOTSUPP) { | |
| 31 | + dev_dbg(dai->dev, "ASoC: set_fmt is not supported\n"); | |
| 32 | + ret = 0; | |
| 33 | + } | |
| 34 | + | |
| 30 | 35 | if (!ret && set->sysclk) |
| 31 | 36 | ret = snd_soc_dai_set_sysclk(dai, 0, set->sysclk, 0); |
| 32 | 37 | |
| @@ -29,9 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | #define KIRKWOOD_FORMATS \ |
| 30 | 30 | (SNDRV_PCM_FMTBIT_S16_LE | \ |
| 31 | 31 | SNDRV_PCM_FMTBIT_S24_LE | \ |
| 32 | − SNDRV_PCM_FMTBIT_S32_LE | \ | |
| 33 | − SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE | \ | |
| 34 | − SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE) | |
| 32 | + SNDRV_PCM_FMTBIT_S32_LE) | |
| 35 | 33 | |
| 36 | 34 | static struct kirkwood_dma_data *kirkwood_priv(struct snd_pcm_substream *subs) |
| 37 | 35 | { |
| @@ -161,7 +159,7 @@ static int kirkwood_dma_open(struct snd_pcm_substream *substream) · 123 unmodified lines | ||
| 161 | 159 | * Enable Error interrupts. We're only ack'ing them but |
| 162 | 160 | * it's useful for diagnostics |
| 163 | 161 | */ |
| 164 | − writel((unsigned long)-1, priv->io + KIRKWOOD_ERR_MASK); | |
| 162 | + writel((unsigned int)-1, priv->io + KIRKWOOD_ERR_MASK); | |
| 165 | 163 | } |
| 166 | 164 | |
| 167 | 165 | dram = mv_mbus_dram_info(); |
| @@ -103,7 +103,7 @@ static void kirkwood_set_rate(struct snd_soc_dai *dai, · 102 unmodified lines | ||
| 103 | 103 | { |
| 104 | 104 | uint32_t clks_ctrl; |
| 105 | 105 | |
| 106 | − if (rate == 44100 || rate == 48000 || rate == 96000) { | |
| 106 | + if (IS_ERR(priv->extclk)) { | |
| 107 | 107 | /* use internal dco for the supported rates |
| 108 | 108 | * defined in kirkwood_i2s_dai */ |
| 109 | 109 | dev_dbg(dai->dev, "%s: dco set rate = %lu\n", |
| @@ -160,9 +160,11 @@ static int kirkwood_i2s_hw_params(struct snd_pcm_substream *substream, · 50 unmodified lines | ||
| 160 | 160 | case SNDRV_PCM_FORMAT_S16_LE: |
| 161 | 161 | i2s_value |= KIRKWOOD_I2S_CTL_SIZE_16; |
| 162 | 162 | ctl_play = KIRKWOOD_PLAYCTL_SIZE_16_C | |
| 163 | − KIRKWOOD_PLAYCTL_I2S_EN; | |
| 163 | + KIRKWOOD_PLAYCTL_I2S_EN | | |
| 164 | + KIRKWOOD_PLAYCTL_SPDIF_EN; | |
| 164 | 165 | ctl_rec = KIRKWOOD_RECCTL_SIZE_16_C | |
| 165 | − KIRKWOOD_RECCTL_I2S_EN; | |
| 166 | + KIRKWOOD_RECCTL_I2S_EN | | |
| 167 | + KIRKWOOD_RECCTL_SPDIF_EN; | |
| 166 | 168 | break; |
| 167 | 169 | /* |
| 168 | 170 | * doesn't work... S20_3LE != kirkwood 20bit format ? |
| @@ -178,9 +180,11 @@ static int kirkwood_i2s_hw_params(struct snd_pcm_substream *substream, · 9 unmodified lines | ||
| 178 | 180 | case SNDRV_PCM_FORMAT_S24_LE: |
| 179 | 181 | i2s_value |= KIRKWOOD_I2S_CTL_SIZE_24; |
| 180 | 182 | ctl_play = KIRKWOOD_PLAYCTL_SIZE_24 | |
| 181 | − KIRKWOOD_PLAYCTL_I2S_EN; | |
| 183 | + KIRKWOOD_PLAYCTL_I2S_EN | | |
| 184 | + KIRKWOOD_PLAYCTL_SPDIF_EN; | |
| 182 | 185 | ctl_rec = KIRKWOOD_RECCTL_SIZE_24 | |
| 183 | − KIRKWOOD_RECCTL_I2S_EN; | |
| 186 | + KIRKWOOD_RECCTL_I2S_EN | | |
| 187 | + KIRKWOOD_RECCTL_SPDIF_EN; | |
| 184 | 188 | break; |
| 185 | 189 | case SNDRV_PCM_FORMAT_S32_LE: |
| 186 | 190 | i2s_value |= KIRKWOOD_I2S_CTL_SIZE_32; |
| @@ -240,6 +244,11 @@ static int kirkwood_i2s_play_trigger(struct snd_pcm_substream *substream, · 53 unmodified lines | ||
| 240 | 244 | ctl); |
| 241 | 245 | } |
| 242 | 246 | |
| 247 | + if (dai->id == 0) | |
| 248 | + ctl &= ~KIRKWOOD_PLAYCTL_SPDIF_EN; /* i2s */ | |
| 249 | + else | |
| 250 | + ctl &= ~KIRKWOOD_PLAYCTL_I2S_EN; /* spdif */ | |
| 251 | + | |
| 243 | 252 | switch (cmd) { |
| 244 | 253 | case SNDRV_PCM_TRIGGER_START: |
| 245 | 254 | /* configure */ |
| @@ -258,7 +267,8 @@ static int kirkwood_i2s_play_trigger(struct snd_pcm_substream *substream, · 12 unmodified lines | ||
| 258 | 267 | |
| 259 | 268 | case SNDRV_PCM_TRIGGER_STOP: |
| 260 | 269 | /* stop audio, disable interrupts */ |
| 261 | − ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE; | |
| 270 | + ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | | |
| 271 | + KIRKWOOD_PLAYCTL_SPDIF_MUTE; | |
| 262 | 272 | writel(ctl, priv->io + KIRKWOOD_PLAYCTL); |
| 263 | 273 | |
| 264 | 274 | value = readl(priv->io + KIRKWOOD_INT_MASK); |
| @@ -272,13 +282,15 @@ static int kirkwood_i2s_play_trigger(struct snd_pcm_substream *substream, · 7 unmodified lines | ||
| 272 | 282 | |
| 273 | 283 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 274 | 284 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 275 | − ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE; | |
| 285 | + ctl |= KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | | |
| 286 | + KIRKWOOD_PLAYCTL_SPDIF_MUTE; | |
| 276 | 287 | writel(ctl, priv->io + KIRKWOOD_PLAYCTL); |
| 277 | 288 | break; |
| 278 | 289 | |
| 279 | 290 | case SNDRV_PCM_TRIGGER_RESUME: |
| 280 | 291 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 281 | − ctl &= ~(KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE); | |
| 292 | + ctl &= ~(KIRKWOOD_PLAYCTL_PAUSE | KIRKWOOD_PLAYCTL_I2S_MUTE | | |
| 293 | + KIRKWOOD_PLAYCTL_SPDIF_MUTE); | |
| 282 | 294 | writel(ctl, priv->io + KIRKWOOD_PLAYCTL); |
| 283 | 295 | break; |
| 284 | 296 | |
| @@ -301,7 +313,13 @@ static int kirkwood_i2s_rec_trigger(struct snd_pcm_substream *substream, · 16 unmodified lines | ||
| 301 | 313 | case SNDRV_PCM_TRIGGER_START: |
| 302 | 314 | /* configure */ |
| 303 | 315 | ctl = priv->ctl_rec; |
| 304 | − value = ctl & ~KIRKWOOD_RECCTL_I2S_EN; | |
| 316 | + if (dai->id == 0) | |
| 317 | + ctl &= ~KIRKWOOD_RECCTL_SPDIF_EN; /* i2s */ | |
| 318 | + else | |
| 319 | + ctl &= ~KIRKWOOD_RECCTL_I2S_EN; /* spdif */ | |
| 320 | + | |
| 321 | + value = ctl & ~(KIRKWOOD_RECCTL_I2S_EN | | |
| 322 | + KIRKWOOD_RECCTL_SPDIF_EN); | |
| 305 | 323 | writel(value, priv->io + KIRKWOOD_RECCTL); |
| 306 | 324 | |
| 307 | 325 | /* enable interrupts */ |
| @@ -361,9 +379,8 @@ static int kirkwood_i2s_trigger(struct snd_pcm_substream *substream, int cmd, · 53 unmodified lines | ||
| 361 | 379 | return 0; |
| 362 | 380 | } |
| 363 | 381 | |
| 364 | −static int kirkwood_i2s_probe(struct snd_soc_dai *dai) | |
| 382 | +static int kirkwood_i2s_init(struct kirkwood_dma_data *priv) | |
| 365 | 383 | { |
| 366 | − struct kirkwood_dma_data *priv = snd_soc_dai_get_drvdata(dai); | |
| 367 | 384 | unsigned long value; |
| 368 | 385 | unsigned int reg_data; |
| 369 | 386 | |
| @@ -404,9 +421,10 @@ static const struct snd_soc_dai_ops kirkwood_i2s_dai_ops = { · 34 unmodified lines | ||
| 404 | 421 | .set_fmt = kirkwood_i2s_set_fmt, |
| 405 | 422 | }; |
| 406 | 423 | |
| 407 | − | |
| 408 | −static struct snd_soc_dai_driver kirkwood_i2s_dai = { | |
| 409 | − .probe = kirkwood_i2s_probe, | |
| 424 | +static struct snd_soc_dai_driver kirkwood_i2s_dai[2] = { | |
| 425 | + { | |
| 426 | + .name = "i2s", | |
| 427 | + .id = 0, | |
| 410 | 428 | .playback = { |
| 411 | 429 | .channels_min = 1, |
| 412 | 430 | .channels_max = 2, |
| @@ -422,10 +440,53 @@ static struct snd_soc_dai_driver kirkwood_i2s_dai = { · 9 unmodified lines | ||
| 422 | 440 | .formats = KIRKWOOD_I2S_FORMATS, |
| 423 | 441 | }, |
| 424 | 442 | .ops = &kirkwood_i2s_dai_ops, |
| 443 | + }, | |
| 444 | + { | |
| 445 | + .name = "spdif", | |
| 446 | + .id = 1, | |
| 447 | + .playback = { | |
| 448 | + .channels_min = 1, | |
| 449 | + .channels_max = 2, | |
| 450 | + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | | |
| 451 | + SNDRV_PCM_RATE_96000, | |
| 452 | + .formats = KIRKWOOD_I2S_FORMATS, | |
| 453 | + }, | |
| 454 | + .capture = { | |
| 455 | + .channels_min = 1, | |
| 456 | + .channels_max = 2, | |
| 457 | + .rates = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | | |
| 458 | + SNDRV_PCM_RATE_96000, | |
| 459 | + .formats = KIRKWOOD_I2S_FORMATS, | |
| 460 | + }, | |
| 461 | + .ops = &kirkwood_i2s_dai_ops, | |
| 462 | + }, | |
| 425 | 463 | }; |
| 426 | 464 | |
| 427 | −static struct snd_soc_dai_driver kirkwood_i2s_dai_extclk = { | |
| 428 | − .probe = kirkwood_i2s_probe, | |
| 465 | +static struct snd_soc_dai_driver kirkwood_i2s_dai_extclk[2] = { | |
| 466 | + { | |
| 467 | + .name = "i2s", | |
| 468 | + .id = 0, | |
| 469 | + .playback = { | |
| 470 | + .channels_min = 1, | |
| 471 | + .channels_max = 2, | |
| 472 | + .rates = SNDRV_PCM_RATE_8000_192000 | | |
| 473 | + SNDRV_PCM_RATE_CONTINUOUS | | |
| 474 | + SNDRV_PCM_RATE_KNOT, | |
| 475 | + .formats = KIRKWOOD_I2S_FORMATS, | |
| 476 | + }, | |
| 477 | + .capture = { | |
| 478 | + .channels_min = 1, | |
| 479 | + .channels_max = 2, | |
| 480 | + .rates = SNDRV_PCM_RATE_8000_192000 | | |
| 481 | + SNDRV_PCM_RATE_CONTINUOUS | | |
| 482 | + SNDRV_PCM_RATE_KNOT, | |
| 483 | + .formats = KIRKWOOD_I2S_FORMATS, | |
| 484 | + }, | |
| 485 | + .ops = &kirkwood_i2s_dai_ops, | |
| 486 | + }, | |
| 487 | + { | |
| 488 | + .name = "spdif", | |
| 489 | + .id = 1, | |
| 429 | 490 | .playback = { |
| 430 | 491 | .channels_min = 1, |
| 431 | 492 | .channels_max = 2, |
| @@ -443,6 +504,7 @@ static struct snd_soc_dai_driver kirkwood_i2s_dai_extclk = { · 11 unmodified lines | ||
| 443 | 504 | .formats = KIRKWOOD_I2S_FORMATS, |
| 444 | 505 | }, |
| 445 | 506 | .ops = &kirkwood_i2s_dai_ops, |
| 507 | + }, | |
| 446 | 508 | }; |
| 447 | 509 | |
| 448 | 510 | static const struct snd_soc_component_driver kirkwood_i2s_component = { |
| @@ -452,7 +514,7 @@ static const struct snd_soc_component_driver kirkwood_i2s_component = { · 3 unmodified lines | ||
| 452 | 514 | static int kirkwood_i2s_dev_probe(struct platform_device *pdev) |
| 453 | 515 | { |
| 454 | 516 | struct kirkwood_asoc_platform_data *data = pdev->dev.platform_data; |
| 455 | − struct snd_soc_dai_driver *soc_dai = &kirkwood_i2s_dai; | |
| 517 | + struct snd_soc_dai_driver *soc_dai = kirkwood_i2s_dai; | |
| 456 | 518 | struct kirkwood_dma_data *priv; |
| 457 | 519 | struct resource *mem; |
| 458 | 520 | struct device_node *np = pdev->dev.of_node; |
| @@ -496,14 +558,17 @@ static int kirkwood_i2s_dev_probe(struct platform_device *pdev) · 37 unmodified lines | ||
| 496 | 558 | return err; |
| 497 | 559 | |
| 498 | 560 | priv->extclk = devm_clk_get(&pdev->dev, "extclk"); |
| 499 | − if (!IS_ERR(priv->extclk)) { | |
| 561 | + if (IS_ERR(priv->extclk)) { | |
| 562 | + if (PTR_ERR(priv->extclk) == -EPROBE_DEFER) | |
| 563 | + return -EPROBE_DEFER; | |
| 564 | + } else { | |
| 500 | 565 | if (priv->extclk == priv->clk) { |
| 501 | 566 | devm_clk_put(&pdev->dev, priv->extclk); |
| 502 | 567 | priv->extclk = ERR_PTR(-EINVAL); |
| 503 | 568 | } else { |
| 504 | 569 | dev_info(&pdev->dev, "found external clock\n"); |
| 505 | 570 | clk_prepare_enable(priv->extclk); |
| 506 | − soc_dai = &kirkwood_i2s_dai_extclk; | |
| 571 | + soc_dai = kirkwood_i2s_dai_extclk; | |
| 507 | 572 | } |
| 508 | 573 | } |
| 509 | 574 | |
| @@ -521,7 +586,7 @@ static int kirkwood_i2s_dev_probe(struct platform_device *pdev) · 11 unmodified lines | ||
| 521 | 586 | } |
| 522 | 587 | |
| 523 | 588 | err = snd_soc_register_component(&pdev->dev, &kirkwood_i2s_component, |
| 524 | − soc_dai, 1); | |
| 589 | + soc_dai, 2); | |
| 525 | 590 | if (err) { |
| 526 | 591 | dev_err(&pdev->dev, "snd_soc_register_component failed\n"); |
| 527 | 592 | goto err_component; |
| @@ -532,6 +597,9 @@ static int kirkwood_i2s_dev_probe(struct platform_device *pdev) · 4 unmodified lines | ||
| 532 | 597 | dev_err(&pdev->dev, "snd_soc_register_platform failed\n"); |
| 533 | 598 | goto err_platform; |
| 534 | 599 | } |
| 600 | + | |
| 601 | + kirkwood_i2s_init(priv); | |
| 602 | + | |
| 535 | 603 | return 0; |
| 536 | 604 | err_platform: |
| 537 | 605 | snd_soc_unregister_component(&pdev->dev); |
| @@ -52,7 +52,7 @@ static struct snd_soc_dai_link openrd_client_dai[] = { · 51 unmodified lines | ||
| 52 | 52 | { |
| 53 | 53 | .name = "CS42L51", |
| 54 | 54 | .stream_name = "CS42L51 HiFi", |
| 55 | − .cpu_dai_name = "mvebu-audio", | |
| 55 | + .cpu_dai_name = "i2s", | |
| 56 | 56 | .platform_name = "mvebu-audio", |
| 57 | 57 | .codec_dai_name = "cs42l51-hifi", |
| 58 | 58 | .codec_name = "cs42l51-codec.0-004a", |
| @@ -68,7 +68,7 @@ static struct snd_soc_dai_link t5325_dai[] = { · 67 unmodified lines | ||
| 68 | 68 | { |
| 69 | 69 | .name = "ALC5621", |
| 70 | 70 | .stream_name = "ALC5621 HiFi", |
| 71 | − .cpu_dai_name = "mvebu-audio", | |
| 71 | + .cpu_dai_name = "i2s", | |
| 72 | 72 | .platform_name = "mvebu-audio", |
| 73 | 73 | .codec_dai_name = "alc5621-hifi", |
| 74 | 74 | .codec_name = "alc562x-codec.0-001a", |
| @@ -123,8 +123,8 @@ · 122 unmodified lines | ||
| 123 | 123 | /* need to find where they come from */ |
| 124 | 124 | #define KIRKWOOD_SND_MIN_PERIODS 8 |
| 125 | 125 | #define KIRKWOOD_SND_MAX_PERIODS 16 |
| 126 | −#define KIRKWOOD_SND_MIN_PERIOD_BYTES 0x4000 | |
| 127 | −#define KIRKWOOD_SND_MAX_PERIOD_BYTES 0x4000 | |
| 126 | +#define KIRKWOOD_SND_MIN_PERIOD_BYTES 0x800 | |
| 127 | +#define KIRKWOOD_SND_MAX_PERIOD_BYTES 0x8000 | |
| 128 | 128 | #define KIRKWOOD_SND_MAX_BUFFER_BYTES (KIRKWOOD_SND_MAX_PERIOD_BYTES \ |
| 129 | 129 | * KIRKWOOD_SND_MAX_PERIODS) |
| 130 | 130 | |
| @@ -400,7 +400,7 @@ static int snd_mfld_mc_probe(struct platform_device *pdev) · 399 unmodified lines | ||
| 400 | 400 | } |
| 401 | 401 | /* register the soc card */ |
| 402 | 402 | snd_soc_card_mfld.dev = &pdev->dev; |
| 403 | − ret_val = snd_soc_register_card(&snd_soc_card_mfld); | |
| 403 | + ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_mfld); | |
| 404 | 404 | if (ret_val) { |
| 405 | 405 | pr_debug("snd_soc_register_card failed %d\n", ret_val); |
| 406 | 406 | return ret_val; |
| @@ -410,20 +410,12 @@ static int snd_mfld_mc_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 410 | 410 | return 0; |
| 411 | 411 | } |
| 412 | 412 | |
| 413 | −static int snd_mfld_mc_remove(struct platform_device *pdev) | |
| 414 | −{ | |
| 415 | − pr_debug("snd_mfld_mc_remove called\n"); | |
| 416 | − snd_soc_unregister_card(&snd_soc_card_mfld); | |
| 417 | − return 0; | |
| 418 | −} | |
| 419 | − | |
| 420 | 413 | static struct platform_driver snd_mfld_mc_driver = { |
| 421 | 414 | .driver = { |
| 422 | 415 | .owner = THIS_MODULE, |
| 423 | 416 | .name = "msic_audio", |
| 424 | 417 | }, |
| 425 | 418 | .probe = snd_mfld_mc_probe, |
| 426 | − .remove = snd_mfld_mc_remove, | |
| 427 | 419 | }; |
| 428 | 420 | |
| 429 | 421 | module_platform_driver(snd_mfld_mc_driver); |
| @@ -40,7 +40,8 @@ static DEFINE_MUTEX(sst_lock); · 39 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | int sst_register_dsp(struct sst_device *dev) |
| 42 | 42 | { |
| 43 | − BUG_ON(!dev); | |
| 43 | + if (WARN_ON(!dev)) | |
| 44 | + return -EINVAL; | |
| 44 | 45 | if (!try_module_get(dev->dev->driver->owner)) |
| 45 | 46 | return -ENODEV; |
| 46 | 47 | mutex_lock(&sst_lock); |
| @@ -59,7 +60,8 @@ EXPORT_SYMBOL_GPL(sst_register_dsp); · 12 unmodified lines | ||
| 59 | 60 | |
| 60 | 61 | int sst_unregister_dsp(struct sst_device *dev) |
| 61 | 62 | { |
| 62 | − BUG_ON(!dev); | |
| 63 | + if (WARN_ON(!dev)) | |
| 64 | + return -EINVAL; | |
| 63 | 65 | if (dev != sst) |
| 64 | 66 | return -EINVAL; |
| 65 | 67 | |
| @@ -494,6 +494,7 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, · 493 unmodified lines | ||
| 494 | 494 | struct mxs_saif *saif = snd_soc_dai_get_drvdata(cpu_dai); |
| 495 | 495 | struct mxs_saif *master_saif; |
| 496 | 496 | u32 delay; |
| 497 | + int ret; | |
| 497 | 498 | |
| 498 | 499 | master_saif = mxs_saif_get_master(saif); |
| 499 | 500 | if (!master_saif) |
| @@ -503,23 +504,37 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, · 3 unmodified lines | ||
| 503 | 504 | case SNDRV_PCM_TRIGGER_START: |
| 504 | 505 | case SNDRV_PCM_TRIGGER_RESUME: |
| 505 | 506 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 507 | + if (saif->state == MXS_SAIF_STATE_RUNNING) | |
| 508 | + return 0; | |
| 509 | + | |
| 506 | 510 | dev_dbg(cpu_dai->dev, "start\n"); |
| 507 | 511 | |
| 508 | − clk_enable(master_saif->clk); | |
| 509 | − if (!master_saif->mclk_in_use) | |
| 510 | − __raw_writel(BM_SAIF_CTRL_RUN, | |
| 511 | − master_saif->base + SAIF_CTRL + MXS_SET_ADDR); | |
| 512 | + ret = clk_enable(master_saif->clk); | |
| 513 | + if (ret) { | |
| 514 | + dev_err(saif->dev, "Failed to enable master clock\n"); | |
| 515 | + return ret; | |
| 516 | + } | |
| 512 | 517 | |
| 513 | 518 | /* |
| 514 | 519 | * If the saif's master is not himself, we also need to enable |
| 515 | 520 | * itself clk for its internal basic logic to work. |
| 516 | 521 | */ |
| 517 | 522 | if (saif != master_saif) { |
| 518 | − clk_enable(saif->clk); | |
| 523 | + ret = clk_enable(saif->clk); | |
| 524 | + if (ret) { | |
| 525 | + dev_err(saif->dev, "Failed to enable master clock\n"); | |
| 526 | + clk_disable(master_saif->clk); | |
| 527 | + return ret; | |
| 528 | + } | |
| 529 | + | |
| 519 | 530 | __raw_writel(BM_SAIF_CTRL_RUN, |
| 520 | 531 | saif->base + SAIF_CTRL + MXS_SET_ADDR); |
| 521 | 532 | } |
| 522 | 533 | |
| 534 | + if (!master_saif->mclk_in_use) | |
| 535 | + __raw_writel(BM_SAIF_CTRL_RUN, | |
| 536 | + master_saif->base + SAIF_CTRL + MXS_SET_ADDR); | |
| 537 | + | |
| 523 | 538 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 524 | 539 | /* |
| 525 | 540 | * write data to saif data register to trigger |
| @@ -543,6 +558,7 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, · 17 unmodified lines | ||
| 543 | 558 | } |
| 544 | 559 | |
| 545 | 560 | master_saif->ongoing = 1; |
| 561 | + saif->state = MXS_SAIF_STATE_RUNNING; | |
| 546 | 562 | |
| 547 | 563 | dev_dbg(saif->dev, "CTRL 0x%x STAT 0x%x\n", |
| 548 | 564 | __raw_readl(saif->base + SAIF_CTRL), |
| @@ -555,6 +571,9 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, · 6 unmodified lines | ||
| 555 | 571 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 556 | 572 | case SNDRV_PCM_TRIGGER_STOP: |
| 557 | 573 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 574 | + if (saif->state == MXS_SAIF_STATE_STOPPED) | |
| 575 | + return 0; | |
| 576 | + | |
| 558 | 577 | dev_dbg(cpu_dai->dev, "stop\n"); |
| 559 | 578 | |
| 560 | 579 | /* wait a while for the current sample to complete */ |
| @@ -575,6 +594,7 @@ static int mxs_saif_trigger(struct snd_pcm_substream *substream, int cmd, · 14 unmodified lines | ||
| 575 | 594 | } |
| 576 | 595 | |
| 577 | 596 | master_saif->ongoing = 0; |
| 597 | + saif->state = MXS_SAIF_STATE_STOPPED; | |
| 578 | 598 | |
| 579 | 599 | break; |
| 580 | 600 | default: |
| @@ -768,8 +788,8 @@ static int mxs_saif_probe(struct platform_device *pdev) · 187 unmodified lines | ||
| 768 | 788 | dev_warn(&pdev->dev, "failed to init clocks\n"); |
| 769 | 789 | } |
| 770 | 790 | |
| 771 | − ret = snd_soc_register_component(&pdev->dev, &mxs_saif_component, | |
| 772 | − &mxs_saif_dai, 1); | |
| 791 | + ret = devm_snd_soc_register_component(&pdev->dev, &mxs_saif_component, | |
| 792 | + &mxs_saif_dai, 1); | |
| 773 | 793 | if (ret) { |
| 774 | 794 | dev_err(&pdev->dev, "register DAI failed\n"); |
| 775 | 795 | return ret; |
| @@ -778,21 +798,15 @@ static int mxs_saif_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 778 | 798 | ret = mxs_pcm_platform_register(&pdev->dev); |
| 779 | 799 | if (ret) { |
| 780 | 800 | dev_err(&pdev->dev, "register PCM failed: %d\n", ret); |
| 781 | − goto failed_pdev_alloc; | |
| 801 | + return ret; | |
| 782 | 802 | } |
| 783 | 803 | |
| 784 | 804 | return 0; |
| 785 | − | |
| 786 | −failed_pdev_alloc: | |
| 787 | − snd_soc_unregister_component(&pdev->dev); | |
| 788 | − | |
| 789 | − return ret; | |
| 790 | 805 | } |
| 791 | 806 | |
| 792 | 807 | static int mxs_saif_remove(struct platform_device *pdev) |
| 793 | 808 | { |
| 794 | 809 | mxs_pcm_platform_unregister(&pdev->dev); |
| 795 | − snd_soc_unregister_component(&pdev->dev); | |
| 796 | 810 | |
| 797 | 811 | return 0; |
| 798 | 812 | } |
| @@ -124,6 +124,11 @@ struct mxs_saif { · 123 unmodified lines | ||
| 124 | 124 | |
| 125 | 125 | u32 fifo_underrun; |
| 126 | 126 | u32 fifo_overrun; |
| 127 | + | |
| 128 | + enum { | |
| 129 | + MXS_SAIF_STATE_STOPPED, | |
| 130 | + MXS_SAIF_STATE_RUNNING, | |
| 131 | + } state; | |
| 127 | 132 | }; |
| 128 | 133 | |
| 129 | 134 | extern int mxs_saif_put_mclk(unsigned int saif_id); |
| @@ -122,14 +122,12 @@ static struct snd_soc_card mxs_sgtl5000 = { · 121 unmodified lines | ||
| 122 | 122 | .num_links = ARRAY_SIZE(mxs_sgtl5000_dai), |
| 123 | 123 | }; |
| 124 | 124 | |
| 125 | −static int mxs_sgtl5000_probe_dt(struct platform_device *pdev) | |
| 125 | +static int mxs_sgtl5000_probe(struct platform_device *pdev) | |
| 126 | 126 | { |
| 127 | + struct snd_soc_card *card = &mxs_sgtl5000; | |
| 128 | + int ret, i; | |
| 127 | 129 | struct device_node *np = pdev->dev.of_node; |
| 128 | 130 | struct device_node *saif_np[2], *codec_np; |
| 129 | − int i; | |
| 130 | − | |
| 131 | − if (!np) | |
| 132 | − return 1; /* no device tree */ | |
| 133 | 131 | |
| 134 | 132 | saif_np[0] = of_parse_phandle(np, "saif-controllers", 0); |
| 135 | 133 | saif_np[1] = of_parse_phandle(np, "saif-controllers", 1); |
| @@ -152,18 +150,6 @@ static int mxs_sgtl5000_probe_dt(struct platform_device *pdev) · 16 unmodified lines | ||
| 152 | 150 | of_node_put(saif_np[0]); |
| 153 | 151 | of_node_put(saif_np[1]); |
| 154 | 152 | |
| 155 | − return 0; | |
| 156 | −} | |
| 157 | − | |
| 158 | −static int mxs_sgtl5000_probe(struct platform_device *pdev) | |
| 159 | −{ | |
| 160 | − struct snd_soc_card *card = &mxs_sgtl5000; | |
| 161 | − int ret; | |
| 162 | − | |
| 163 | − ret = mxs_sgtl5000_probe_dt(pdev); | |
| 164 | − if (ret < 0) | |
| 165 | − return ret; | |
| 166 | − | |
| 167 | 153 | /* |
| 168 | 154 | * Set an init clock(11.28Mhz) for sgtl5000 initialization(i2c r/w). |
| 169 | 155 | * The Sgtl5000 sysclk is derived from saif0 mclk and it's range |
| @@ -344,8 +344,11 @@ static int __init n810_soc_init(void) · 343 unmodified lines | ||
| 344 | 344 | clk_set_parent(sys_clkout2_src, func96m_clk); |
| 345 | 345 | clk_set_rate(sys_clkout2, 12000000); |
| 346 | 346 | |
| 347 | − BUG_ON((gpio_request(N810_HEADSET_AMP_GPIO, "hs_amp") < 0) || | |
| 348 | − (gpio_request(N810_SPEAKER_AMP_GPIO, "spk_amp") < 0)); | |
| 347 | + if (WARN_ON((gpio_request(N810_HEADSET_AMP_GPIO, "hs_amp") < 0) || | |
| 348 | + (gpio_request(N810_SPEAKER_AMP_GPIO, "spk_amp") < 0))) { | |
| 349 | + err = -EINVAL; | |
| 350 | + goto err4; | |
| 351 | + } | |
| 349 | 352 | |
| 350 | 353 | gpio_direction_output(N810_HEADSET_AMP_GPIO, 0); |
| 351 | 354 | gpio_direction_output(N810_SPEAKER_AMP_GPIO, 0); |
| @@ -490,14 +490,9 @@ static int asoc_mcpdm_probe(struct platform_device *pdev) · 489 unmodified lines | ||
| 490 | 490 | |
| 491 | 491 | mcpdm->dev = &pdev->dev; |
| 492 | 492 | |
| 493 | − return snd_soc_register_component(&pdev->dev, &omap_mcpdm_component, | |
| 494 | − &omap_mcpdm_dai, 1); | |
| 495 | −} | |
| 496 | − | |
| 497 | −static int asoc_mcpdm_remove(struct platform_device *pdev) | |
| 498 | −{ | |
| 499 | − snd_soc_unregister_component(&pdev->dev); | |
| 500 | − return 0; | |
| 493 | + return devm_snd_soc_register_component(&pdev->dev, | |
| 494 | + &omap_mcpdm_component, | |
| 495 | + &omap_mcpdm_dai, 1); | |
| 501 | 496 | } |
| 502 | 497 | |
| 503 | 498 | static const struct of_device_id omap_mcpdm_of_match[] = { |
| @@ -514,7 +509,6 @@ static struct platform_driver asoc_mcpdm_driver = { · 10 unmodified lines | ||
| 514 | 509 | }, |
| 515 | 510 | |
| 516 | 511 | .probe = asoc_mcpdm_probe, |
| 517 | − .remove = asoc_mcpdm_remove, | |
| 518 | 512 | }; |
| 519 | 513 | |
| 520 | 514 | module_platform_driver(asoc_mcpdm_driver); |
| @@ -338,9 +338,9 @@ static int omap_twl4030_probe(struct platform_device *pdev) · 337 unmodified lines | ||
| 338 | 338 | } |
| 339 | 339 | |
| 340 | 340 | snd_soc_card_set_drvdata(card, priv); |
| 341 | − ret = snd_soc_register_card(card); | |
| 341 | + ret = devm_snd_soc_register_card(&pdev->dev, card); | |
| 342 | 342 | if (ret) { |
| 343 | − dev_err(&pdev->dev, "snd_soc_register_card() failed: %d\n", | |
| 343 | + dev_err(&pdev->dev, "devm_snd_soc_register_card() failed: %d\n", | |
| 344 | 344 | ret); |
| 345 | 345 | return ret; |
| 346 | 346 | } |
| @@ -357,7 +357,6 @@ static int omap_twl4030_remove(struct platform_device *pdev) · 10 unmodified lines | ||
| 357 | 357 | snd_soc_jack_free_gpios(&priv->hs_jack, |
| 358 | 358 | ARRAY_SIZE(hs_jack_gpios), |
| 359 | 359 | hs_jack_gpios); |
| 360 | − snd_soc_unregister_card(card); | |
| 361 | 360 | |
| 362 | 361 | return 0; |
| 363 | 362 | } |
| @@ -163,6 +163,7 @@ static struct platform_driver mmp_driver = { · 162 unmodified lines | ||
| 163 | 163 | .driver = { |
| 164 | 164 | .name = "brownstone-audio", |
| 165 | 165 | .owner = THIS_MODULE, |
| 166 | + .pm = &snd_soc_pm_ops, | |
| 166 | 167 | }, |
| 167 | 168 | .probe = brownstone_probe, |
| 168 | 169 | .remove = brownstone_remove, |
| @@ -329,6 +329,7 @@ static struct platform_driver corgi_driver = { · 328 unmodified lines | ||
| 329 | 329 | .driver = { |
| 330 | 330 | .name = "corgi-audio", |
| 331 | 331 | .owner = THIS_MODULE, |
| 332 | + .pm = &snd_soc_pm_ops, | |
| 332 | 333 | }, |
| 333 | 334 | .probe = corgi_probe, |
| 334 | 335 | .remove = corgi_remove, |
| @@ -178,6 +178,7 @@ static struct platform_driver e740_driver = { · 177 unmodified lines | ||
| 178 | 178 | .driver = { |
| 179 | 179 | .name = "e740-audio", |
| 180 | 180 | .owner = THIS_MODULE, |
| 181 | + .pm = &snd_soc_pm_ops, | |
| 181 | 182 | }, |
| 182 | 183 | .probe = e740_probe, |
| 183 | 184 | .remove = e740_remove, |
| @@ -160,6 +160,7 @@ static struct platform_driver e750_driver = { · 159 unmodified lines | ||
| 160 | 160 | .driver = { |
| 161 | 161 | .name = "e750-audio", |
| 162 | 162 | .owner = THIS_MODULE, |
| 163 | + .pm = &snd_soc_pm_ops, | |
| 163 | 164 | }, |
| 164 | 165 | .probe = e750_probe, |
| 165 | 166 | .remove = e750_remove, |
| @@ -150,6 +150,7 @@ static struct platform_driver e800_driver = { · 149 unmodified lines | ||
| 150 | 150 | .driver = { |
| 151 | 151 | .name = "e800-audio", |
| 152 | 152 | .owner = THIS_MODULE, |
| 153 | + .pm = &snd_soc_pm_ops, | |
| 153 | 154 | }, |
| 154 | 155 | .probe = e800_probe, |
| 155 | 156 | .remove = e800_remove, |
| @@ -91,6 +91,7 @@ static struct platform_driver imote2_driver = { · 90 unmodified lines | ||
| 91 | 91 | .driver = { |
| 92 | 92 | .name = "imote2-audio", |
| 93 | 93 | .owner = THIS_MODULE, |
| 94 | + .pm = &snd_soc_pm_ops, | |
| 94 | 95 | }, |
| 95 | 96 | .probe = imote2_probe, |
| 96 | 97 | .remove = imote2_remove, |
| @@ -215,6 +215,7 @@ static struct platform_driver mioa701_wm9713_driver = { · 214 unmodified lines | ||
| 215 | 215 | .driver = { |
| 216 | 216 | .name = "mioa701-wm9713", |
| 217 | 217 | .owner = THIS_MODULE, |
| 218 | + .pm = &snd_soc_pm_ops, | |
| 218 | 219 | }, |
| 219 | 220 | }; |
| 220 | 221 | |
| @@ -455,8 +455,8 @@ static int asoc_mmp_sspa_probe(struct platform_device *pdev) · 454 unmodified lines | ||
| 455 | 455 | priv->dai_fmt = (unsigned int) -1; |
| 456 | 456 | platform_set_drvdata(pdev, priv); |
| 457 | 457 | |
| 458 | − return snd_soc_register_component(&pdev->dev, &mmp_sspa_component, | |
| 459 | − &mmp_sspa_dai, 1); | |
| 458 | + return devm_snd_soc_register_component(&pdev->dev, &mmp_sspa_component, | |
| 459 | + &mmp_sspa_dai, 1); | |
| 460 | 460 | } |
| 461 | 461 | |
| 462 | 462 | static int asoc_mmp_sspa_remove(struct platform_device *pdev) |
| @@ -466,7 +466,6 @@ static int asoc_mmp_sspa_remove(struct platform_device *pdev) · 3 unmodified lines | ||
| 466 | 466 | clk_disable(priv->audio_clk); |
| 467 | 467 | clk_put(priv->audio_clk); |
| 468 | 468 | clk_put(priv->sysclk); |
| 469 | − snd_soc_unregister_component(&pdev->dev); | |
| 470 | 469 | return 0; |
| 471 | 470 | } |
| 472 | 471 | |
| @@ -181,6 +181,7 @@ static struct platform_driver palm27x_wm9712_driver = { · 180 unmodified lines | ||
| 181 | 181 | .driver = { |
| 182 | 182 | .name = "palm27x-asoc", |
| 183 | 183 | .owner = THIS_MODULE, |
| 184 | + .pm = &snd_soc_pm_ops, | |
| 184 | 185 | }, |
| 185 | 186 | }; |
| 186 | 187 | |
| @@ -303,6 +303,7 @@ static struct platform_driver poodle_driver = { · 302 unmodified lines | ||
| 303 | 303 | .driver = { |
| 304 | 304 | .name = "poodle-audio", |
| 305 | 305 | .owner = THIS_MODULE, |
| 306 | + .pm = &snd_soc_pm_ops, | |
| 306 | 307 | }, |
| 307 | 308 | .probe = poodle_probe, |
| 308 | 309 | .remove = poodle_remove, |
| @@ -89,33 +89,6 @@ static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_mic_mono_in = { · 88 unmodified lines | ||
| 89 | 89 | .filter_data = &pxa2xx_ac97_pcm_aux_mic_mono_req, |
| 90 | 90 | }; |
| 91 | 91 | |
| 92 | −#ifdef CONFIG_PM | |
| 93 | −static int pxa2xx_ac97_suspend(struct snd_soc_dai *dai) | |
| 94 | −{ | |
| 95 | − return pxa2xx_ac97_hw_suspend(); | |
| 96 | −} | |
| 97 | − | |
| 98 | −static int pxa2xx_ac97_resume(struct snd_soc_dai *dai) | |
| 99 | −{ | |
| 100 | − return pxa2xx_ac97_hw_resume(); | |
| 101 | −} | |
| 102 | − | |
| 103 | −#else | |
| 104 | −#define pxa2xx_ac97_suspend NULL | |
| 105 | −#define pxa2xx_ac97_resume NULL | |
| 106 | −#endif | |
| 107 | − | |
| 108 | −static int pxa2xx_ac97_probe(struct snd_soc_dai *dai) | |
| 109 | −{ | |
| 110 | − return pxa2xx_ac97_hw_probe(to_platform_device(dai->dev)); | |
| 111 | −} | |
| 112 | − | |
| 113 | −static int pxa2xx_ac97_remove(struct snd_soc_dai *dai) | |
| 114 | −{ | |
| 115 | − pxa2xx_ac97_hw_remove(to_platform_device(dai->dev)); | |
| 116 | − return 0; | |
| 117 | −} | |
| 118 | − | |
| 119 | 92 | static int pxa2xx_ac97_hw_params(struct snd_pcm_substream *substream, |
| 120 | 93 | struct snd_pcm_hw_params *params, |
| 121 | 94 | struct snd_soc_dai *cpu_dai) |
| @@ -185,10 +158,6 @@ static struct snd_soc_dai_driver pxa_ac97_dai_driver[] = { · 63 unmodified lines | ||
| 185 | 158 | { |
| 186 | 159 | .name = "pxa2xx-ac97", |
| 187 | 160 | .ac97_control = 1, |
| 188 | − .probe = pxa2xx_ac97_probe, | |
| 189 | − .remove = pxa2xx_ac97_remove, | |
| 190 | − .suspend = pxa2xx_ac97_suspend, | |
| 191 | − .resume = pxa2xx_ac97_resume, | |
| 192 | 161 | .playback = { |
| 193 | 162 | .stream_name = "AC97 Playback", |
| 194 | 163 | .channels_min = 2, |
| @@ -246,6 +215,12 @@ static int pxa2xx_ac97_dev_probe(struct platform_device *pdev) · 51 unmodified lines | ||
| 246 | 215 | return -ENXIO; |
| 247 | 216 | } |
| 248 | 217 | |
| 218 | + ret = pxa2xx_ac97_hw_probe(pdev); | |
| 219 | + if (ret) { | |
| 220 | + dev_err(&pdev->dev, "PXA2xx AC97 hw probe error (%d)\n", ret); | |
| 221 | + return ret; | |
| 222 | + } | |
| 223 | + | |
| 249 | 224 | ret = snd_soc_set_ac97_ops(&pxa2xx_ac97_ops); |
| 250 | 225 | if (ret != 0) |
| 251 | 226 | return ret; |
| @@ -262,15 +237,34 @@ static int pxa2xx_ac97_dev_remove(struct platform_device *pdev) · 10 unmodified lines | ||
| 262 | 237 | { |
| 263 | 238 | snd_soc_unregister_component(&pdev->dev); |
| 264 | 239 | snd_soc_set_ac97_ops(NULL); |
| 240 | + pxa2xx_ac97_hw_remove(pdev); | |
| 265 | 241 | return 0; |
| 266 | 242 | } |
| 267 | 243 | |
| 244 | +#ifdef CONFIG_PM_SLEEP | |
| 245 | +static int pxa2xx_ac97_dev_suspend(struct device *dev) | |
| 246 | +{ | |
| 247 | + return pxa2xx_ac97_hw_suspend(); | |
| 248 | +} | |
| 249 | + | |
| 250 | +static int pxa2xx_ac97_dev_resume(struct device *dev) | |
| 251 | +{ | |
| 252 | + return pxa2xx_ac97_hw_resume(); | |
| 253 | +} | |
| 254 | + | |
| 255 | +static SIMPLE_DEV_PM_OPS(pxa2xx_ac97_pm_ops, | |
| 256 | + pxa2xx_ac97_dev_suspend, pxa2xx_ac97_dev_resume); | |
| 257 | +#endif | |
| 258 | + | |
| 268 | 259 | static struct platform_driver pxa2xx_ac97_driver = { |
| 269 | 260 | .probe = pxa2xx_ac97_dev_probe, |
| 270 | 261 | .remove = pxa2xx_ac97_dev_remove, |
| 271 | 262 | .driver = { |
| 272 | 263 | .name = "pxa2xx-ac97", |
| 273 | 264 | .owner = THIS_MODULE, |
| 265 | +#ifdef CONFIG_PM_SLEEP | |
| 266 | + .pm = &pxa2xx_ac97_pm_ops, | |
| 267 | +#endif | |
| 274 | 268 | }, |
| 275 | 269 | }; |
| 276 | 270 | |
| @@ -165,7 +165,8 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, · 164 unmodified lines | ||
| 165 | 165 | { |
| 166 | 166 | struct snd_dmaengine_dai_dma_data *dma_data; |
| 167 | 167 | |
| 168 | − BUG_ON(IS_ERR(clk_i2s)); | |
| 168 | + if (WARN_ON(IS_ERR(clk_i2s))) | |
| 169 | + return -EINVAL; | |
| 169 | 170 | clk_prepare_enable(clk_i2s); |
| 170 | 171 | clk_ena = 1; |
| 171 | 172 | pxa_i2s_wait(); |
| @@ -275,6 +275,7 @@ static struct platform_driver tosa_driver = { · 274 unmodified lines | ||
| 275 | 275 | .driver = { |
| 276 | 276 | .name = "tosa-audio", |
| 277 | 277 | .owner = THIS_MODULE, |
| 278 | + .pm = &snd_soc_pm_ops, | |
| 278 | 279 | }, |
| 279 | 280 | .probe = tosa_probe, |
| 280 | 281 | .remove = tosa_remove, |
| @@ -160,6 +160,7 @@ static struct platform_driver ttc_dkb_driver = { · 159 unmodified lines | ||
| 160 | 160 | .driver = { |
| 161 | 161 | .name = "ttc-dkb-audio", |
| 162 | 162 | .owner = THIS_MODULE, |
| 163 | + .pm = &snd_soc_pm_ops, | |
| 163 | 164 | }, |
| 164 | 165 | .probe = ttc_dkb_probe, |
| 165 | 166 | .remove = ttc_dkb_remove, |
| @@ -90,7 +90,8 @@ static void s6000_pcm_enqueue_dma(struct snd_pcm_substream *substream) · 89 unmodified lines | ||
| 90 | 90 | return; |
| 91 | 91 | } |
| 92 | 92 | |
| 93 | − BUG_ON(period_size & 15); | |
| 93 | + if (WARN_ON(period_size & 15)) | |
| 94 | + return; | |
| 94 | 95 | s6dmac_put_fifo(DMA_MASK_DMAC(channel), DMA_INDEX_CHNL(channel), |
| 95 | 96 | src, dst, period_size); |
| 96 | 97 | |
| @@ -356,6 +356,7 @@ static struct snd_soc_dapm_widget bells_widgets[] = { · 355 unmodified lines | ||
| 356 | 356 | |
| 357 | 357 | static struct snd_soc_dapm_route bells_routes[] = { |
| 358 | 358 | { "Sub CLK_SYS", NULL, "OPCLK" }, |
| 359 | + { "CLKIN", NULL, "OPCLK" }, | |
| 359 | 360 | |
| 360 | 361 | { "DMIC", NULL, "MICBIAS2" }, |
| 361 | 362 | { "IN2L", NULL, "DMIC" }, |
| @@ -702,13 +702,6 @@ static int i2s_hw_params(struct snd_pcm_substream *substream, · 701 unmodified lines | ||
| 702 | 702 | } |
| 703 | 703 | writel(mod, i2s->addr + I2SMOD); |
| 704 | 704 | |
| 705 | − if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | |
| 706 | − snd_soc_dai_set_dma_data(dai, substream, | |
| 707 | − (void *)&i2s->dma_playback); | |
| 708 | − else | |
| 709 | − snd_soc_dai_set_dma_data(dai, substream, | |
| 710 | − (void *)&i2s->dma_capture); | |
| 711 | − | |
| 712 | 705 | i2s->frmclk = params_rate(params); |
| 713 | 706 | |
| 714 | 707 | return 0; |
| @@ -970,6 +963,8 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai) · 255 unmodified lines | ||
| 970 | 963 | } |
| 971 | 964 | clk_prepare_enable(i2s->clk); |
| 972 | 965 | |
| 966 | + snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture); | |
| 967 | + | |
| 973 | 968 | if (other) { |
| 974 | 969 | other->addr = i2s->addr; |
| 975 | 970 | other->clk = i2s->clk; |
| @@ -1060,7 +1055,7 @@ static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) · 84 unmodified lines | ||
| 1060 | 1055 | i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops; |
| 1061 | 1056 | i2s->i2s_dai_drv.suspend = i2s_suspend; |
| 1062 | 1057 | i2s->i2s_dai_drv.resume = i2s_resume; |
| 1063 | − i2s->i2s_dai_drv.playback.channels_min = 2; | |
| 1058 | + i2s->i2s_dai_drv.playback.channels_min = 1; | |
| 1064 | 1059 | i2s->i2s_dai_drv.playback.channels_max = 2; |
| 1065 | 1060 | i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES; |
| 1066 | 1061 | i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS; |
| @@ -1073,7 +1068,7 @@ static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec) · 6 unmodified lines | ||
| 1073 | 1068 | dev_set_drvdata(&i2s->pdev->dev, i2s); |
| 1074 | 1069 | } else { /* Create a new platform_device for Secondary */ |
| 1075 | 1070 | i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1); |
| 1076 | − if (IS_ERR(i2s->pdev)) | |
| 1071 | + if (!i2s->pdev) | |
| 1077 | 1072 | return NULL; |
| 1078 | 1073 | |
| 1079 | 1074 | i2s->pdev->dev.parent = &pdev->dev; |
| @@ -1143,9 +1138,9 @@ static int samsung_i2s_probe(struct platform_device *pdev) · 63 unmodified lines | ||
| 1143 | 1138 | dev_err(&pdev->dev, "Unable to get drvdata\n"); |
| 1144 | 1139 | return -EFAULT; |
| 1145 | 1140 | } |
| 1146 | − snd_soc_register_component(&sec_dai->pdev->dev, | |
| 1147 | − &samsung_i2s_component, | |
| 1148 | − &sec_dai->i2s_dai_drv, 1); | |
| 1141 | + devm_snd_soc_register_component(&sec_dai->pdev->dev, | |
| 1142 | + &samsung_i2s_component, | |
| 1143 | + &sec_dai->i2s_dai_drv, 1); | |
| 1149 | 1144 | samsung_asoc_dma_platform_register(&pdev->dev); |
| 1150 | 1145 | return 0; |
| 1151 | 1146 | } |
| @@ -1258,8 +1253,9 @@ static int samsung_i2s_probe(struct platform_device *pdev) · 106 unmodified lines | ||
| 1258 | 1253 | goto err; |
| 1259 | 1254 | } |
| 1260 | 1255 | |
| 1261 | − snd_soc_register_component(&pri_dai->pdev->dev, &samsung_i2s_component, | |
| 1262 | − &pri_dai->i2s_dai_drv, 1); | |
| 1256 | + devm_snd_soc_register_component(&pri_dai->pdev->dev, | |
| 1257 | + &samsung_i2s_component, | |
| 1258 | + &pri_dai->i2s_dai_drv, 1); | |
| 1263 | 1259 | |
| 1264 | 1260 | pm_runtime_enable(&pdev->dev); |
| 1265 | 1261 | |
| @@ -1294,7 +1290,6 @@ static int samsung_i2s_remove(struct platform_device *pdev) · 28 unmodified lines | ||
| 1294 | 1290 | i2s->sec_dai = NULL; |
| 1295 | 1291 | |
| 1296 | 1292 | samsung_asoc_dma_platform_unregister(&pdev->dev); |
| 1297 | − snd_soc_unregister_component(&pdev->dev); | |
| 1298 | 1293 | |
| 1299 | 1294 | return 0; |
| 1300 | 1295 | } |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include "../codecs/wm8994.h" |
| 11 | 11 | #include <sound/pcm_params.h> |
| 12 | +#include <sound/soc.h> | |
| 12 | 13 | #include <linux/module.h> |
| 13 | 14 | #include <linux/of.h> |
| 14 | 15 | #include <linux/of_device.h> |
| @@ -193,7 +194,7 @@ static int smdk_audio_probe(struct platform_device *pdev) · 178 unmodified lines | ||
| 193 | 194 | |
| 194 | 195 | platform_set_drvdata(pdev, board); |
| 195 | 196 | |
| 196 | − ret = snd_soc_register_card(card); | |
| 197 | + ret = devm_snd_soc_register_card(&pdev->dev, card); | |
| 197 | 198 | |
| 198 | 199 | if (ret) |
| 199 | 200 | dev_err(&pdev->dev, "snd_soc_register_card() failed:%d\n", ret); |
| @@ -201,23 +202,14 @@ static int smdk_audio_probe(struct platform_device *pdev) · 1 unmodified line | ||
| 201 | 202 | return ret; |
| 202 | 203 | } |
| 203 | 204 | |
| 204 | −static int smdk_audio_remove(struct platform_device *pdev) | |
| 205 | −{ | |
| 206 | − struct snd_soc_card *card = platform_get_drvdata(pdev); | |
| 207 | − | |
| 208 | − snd_soc_unregister_card(card); | |
| 209 | − | |
| 210 | − return 0; | |
| 211 | −} | |
| 212 | − | |
| 213 | 205 | static struct platform_driver smdk_audio_driver = { |
| 214 | 206 | .driver = { |
| 215 | 207 | .name = "smdk-audio-wm8894", |
| 216 | 208 | .owner = THIS_MODULE, |
| 217 | 209 | .of_match_table = of_match_ptr(samsung_wm8994_of_match), |
| 210 | + .pm = &snd_soc_pm_ops, | |
| 218 | 211 | }, |
| 219 | 212 | .probe = smdk_audio_probe, |
| 220 | − .remove = smdk_audio_remove, | |
| 221 | 213 | }; |
| 222 | 214 | |
| 223 | 215 | module_platform_driver(smdk_audio_driver); |
| @@ -37,7 +37,6 @@ config SND_SOC_SH4_SIU · 36 unmodified lines | ||
| 37 | 37 | config SND_SOC_RCAR |
| 38 | 38 | tristate "R-Car series SRU/SCU/SSIU/SSI support" |
| 39 | 39 | select SND_SIMPLE_CARD |
| 40 | − select RCAR_CLK_ADG | |
| 41 | 40 | help |
| 42 | 41 | This option enables R-Car SUR/SCU/SSIU/SSI sound support |
| 43 | 42 | |
| @@ -8,7 +8,6 @@ · 7 unmodified lines | ||
| 8 | 8 | * for more details. |
| 9 | 9 | */ |
| 10 | 10 | #include <linux/sh_clk.h> |
| 11 | −#include <mach/clock.h> | |
| 12 | 11 | #include "rsnd.h" |
| 13 | 12 | |
| 14 | 13 | #define CLKA 0 |
| @@ -22,6 +21,7 @@ struct rsnd_adg { · 7 unmodified lines | ||
| 22 | 21 | |
| 23 | 22 | int rate_of_441khz_div_6; |
| 24 | 23 | int rate_of_48khz_div_6; |
| 24 | + u32 ckr; | |
| 25 | 25 | }; |
| 26 | 26 | |
| 27 | 27 | #define for_each_rsnd_clk(pos, adg, i) \ |
| @@ -116,6 +116,11 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate) · 88 unmodified lines | ||
| 116 | 116 | |
| 117 | 117 | found_clock: |
| 118 | 118 | |
| 119 | + /* see rsnd_adg_ssi_clk_init() */ | |
| 120 | + rsnd_mod_bset(mod, SSICKR, 0x00FF0000, adg->ckr); | |
| 121 | + rsnd_mod_write(mod, BRRA, 0x00000002); /* 1/6 */ | |
| 122 | + rsnd_mod_write(mod, BRRB, 0x00000002); /* 1/6 */ | |
| 123 | + | |
| 119 | 124 | /* |
| 120 | 125 | * This "mod" = "ssi" here. |
| 121 | 126 | * we can get "ssi id" from mod |
| @@ -182,9 +187,7 @@ static void rsnd_adg_ssi_clk_init(struct rsnd_priv *priv, struct rsnd_adg *adg) · 60 unmodified lines | ||
| 182 | 187 | } |
| 183 | 188 | } |
| 184 | 189 | |
| 185 | − rsnd_priv_bset(priv, SSICKR, 0x00FF0000, ckr); | |
| 186 | − rsnd_priv_write(priv, BRRA, 0x00000002); /* 1/6 */ | |
| 187 | − rsnd_priv_write(priv, BRRB, 0x00000002); /* 1/6 */ | |
| 190 | + adg->ckr = ckr; | |
| 188 | 191 | } |
| 189 | 192 | |
| 190 | 193 | int rsnd_adg_probe(struct platform_device *pdev, |
| @@ -94,6 +94,7 @@ · 93 unmodified lines | ||
| 94 | 94 | * |
| 95 | 95 | */ |
| 96 | 96 | #include <linux/pm_runtime.h> |
| 97 | +#include <linux/shdma-base.h> | |
| 97 | 98 | #include "rsnd.h" |
| 98 | 99 | |
| 99 | 100 | #define RSND_RATES SNDRV_PCM_RATE_8000_96000 |
| @@ -103,54 +104,9 @@ · 3 unmodified lines | ||
| 103 | 104 | * rsnd_platform functions |
| 104 | 105 | */ |
| 105 | 106 | #define rsnd_platform_call(priv, dai, func, param...) \ |
| 106 | − (!(priv->info->func) ? -ENODEV : \ | |
| 107 | + (!(priv->info->func) ? 0 : \ | |
| 107 | 108 | priv->info->func(param)) |
| 108 | 109 | |
| 109 | − | |
| 110 | −/* | |
| 111 | − * basic function | |
| 112 | − */ | |
| 113 | −u32 rsnd_read(struct rsnd_priv *priv, | |
| 114 | − struct rsnd_mod *mod, enum rsnd_reg reg) | |
| 115 | −{ | |
| 116 | − void __iomem *base = rsnd_gen_reg_get(priv, mod, reg); | |
| 117 | − | |
| 118 | − BUG_ON(!base); | |
| 119 | − | |
| 120 | − return ioread32(base); | |
| 121 | −} | |
| 122 | − | |
| 123 | −void rsnd_write(struct rsnd_priv *priv, | |
| 124 | − struct rsnd_mod *mod, | |
| 125 | − enum rsnd_reg reg, u32 data) | |
| 126 | −{ | |
| 127 | − void __iomem *base = rsnd_gen_reg_get(priv, mod, reg); | |
| 128 | − struct device *dev = rsnd_priv_to_dev(priv); | |
| 129 | − | |
| 130 | − BUG_ON(!base); | |
| 131 | − | |
| 132 | − dev_dbg(dev, "w %p : %08x\n", base, data); | |
| 133 | − | |
| 134 | − iowrite32(data, base); | |
| 135 | −} | |
| 136 | − | |
| 137 | −void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, | |
| 138 | − enum rsnd_reg reg, u32 mask, u32 data) | |
| 139 | −{ | |
| 140 | − void __iomem *base = rsnd_gen_reg_get(priv, mod, reg); | |
| 141 | − struct device *dev = rsnd_priv_to_dev(priv); | |
| 142 | − u32 val; | |
| 143 | − | |
| 144 | − BUG_ON(!base); | |
| 145 | − | |
| 146 | − val = ioread32(base); | |
| 147 | − val &= ~mask; | |
| 148 | − val |= data & mask; | |
| 149 | − iowrite32(val, base); | |
| 150 | − | |
| 151 | − dev_dbg(dev, "s %p : %08x\n", base, val); | |
| 152 | −} | |
| 153 | − | |
| 154 | 110 | /* |
| 155 | 111 | * rsnd_mod functions |
| 156 | 112 | */ |
| @@ -254,13 +210,6 @@ int rsnd_dma_available(struct rsnd_dma *dma) · 97 unmodified lines | ||
| 254 | 210 | return !!dma->chan; |
| 255 | 211 | } |
| 256 | 212 | |
| 257 | −static bool rsnd_dma_filter(struct dma_chan *chan, void *param) | |
| 258 | −{ | |
| 259 | − chan->private = param; | |
| 260 | − | |
| 261 | − return true; | |
| 262 | −} | |
| 263 | − | |
| 264 | 213 | int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma, |
| 265 | 214 | int is_play, int id, |
| 266 | 215 | int (*inquiry)(struct rsnd_dma *dma, |
| @@ -268,7 +217,9 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma, · 1 unmodified line | ||
| 268 | 217 | int (*complete)(struct rsnd_dma *dma)) |
| 269 | 218 | { |
| 270 | 219 | struct device *dev = rsnd_priv_to_dev(priv); |
| 220 | + struct dma_slave_config cfg; | |
| 271 | 221 | dma_cap_mask_t mask; |
| 222 | + int ret; | |
| 272 | 223 | |
| 273 | 224 | if (dma->chan) { |
| 274 | 225 | dev_err(dev, "it already has dma channel\n"); |
| @@ -278,15 +229,23 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma, · 3 unmodified lines | ||
| 278 | 229 | dma_cap_zero(mask); |
| 279 | 230 | dma_cap_set(DMA_SLAVE, mask); |
| 280 | 231 | |
| 281 | − dma->slave.shdma_slave.slave_id = id; | |
| 282 | − | |
| 283 | − dma->chan = dma_request_channel(mask, rsnd_dma_filter, | |
| 284 | − &dma->slave.shdma_slave); | |
| 232 | + dma->chan = dma_request_slave_channel_compat(mask, shdma_chan_filter, | |
| 233 | + (void *)id, dev, | |
| 234 | + is_play ? "tx" : "rx"); | |
| 285 | 235 | if (!dma->chan) { |
| 286 | 236 | dev_err(dev, "can't get dma channel\n"); |
| 287 | 237 | return -EIO; |
| 288 | 238 | } |
| 289 | 239 | |
| 240 | + cfg.slave_id = id; | |
| 241 | + cfg.dst_addr = 0; /* use default addr when playback */ | |
| 242 | + cfg.src_addr = 0; /* use default addr when capture */ | |
| 243 | + cfg.direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; | |
| 244 | + | |
| 245 | + ret = dmaengine_slave_config(dma->chan, &cfg); | |
| 246 | + if (ret < 0) | |
| 247 | + goto rsnd_dma_init_err; | |
| 248 | + | |
| 290 | 249 | dma->dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE; |
| 291 | 250 | dma->priv = priv; |
| 292 | 251 | dma->inquiry = inquiry; |
| @@ -294,6 +253,11 @@ int rsnd_dma_init(struct rsnd_priv *priv, struct rsnd_dma *dma, · 1 unmodified line | ||
| 294 | 253 | INIT_WORK(&dma->work, rsnd_dma_do_work); |
| 295 | 254 | |
| 296 | 255 | return 0; |
| 256 | + | |
| 257 | +rsnd_dma_init_err: | |
| 258 | + rsnd_dma_quit(priv, dma); | |
| 259 | + | |
| 260 | + return ret; | |
| 297 | 261 | } |
| 298 | 262 | |
| 299 | 263 | void rsnd_dma_quit(struct rsnd_priv *priv, |
| @@ -363,6 +327,9 @@ int rsnd_dai_id(struct rsnd_priv *priv, struct rsnd_dai *rdai) · 63 unmodified lines | ||
| 363 | 327 | |
| 364 | 328 | struct rsnd_dai *rsnd_dai_get(struct rsnd_priv *priv, int id) |
| 365 | 329 | { |
| 330 | + if ((id < 0) || (id >= rsnd_dai_nr(priv))) | |
| 331 | + return NULL; | |
| 332 | + | |
| 366 | 333 | return priv->rdai + id; |
| 367 | 334 | } |
| 368 | 335 | |
| @@ -11,6 +11,11 @@ · 10 unmodified lines | ||
| 11 | 11 | #include "rsnd.h" |
| 12 | 12 | |
| 13 | 13 | struct rsnd_gen_ops { |
| 14 | + int (*probe)(struct platform_device *pdev, | |
| 15 | + struct rcar_snd_info *info, | |
| 16 | + struct rsnd_priv *priv); | |
| 17 | + void (*remove)(struct platform_device *pdev, | |
| 18 | + struct rsnd_priv *priv); | |
| 14 | 19 | int (*path_init)(struct rsnd_priv *priv, |
| 15 | 20 | struct rsnd_dai *rdai, |
| 16 | 21 | struct rsnd_dai_stream *io); |
| @@ -19,21 +24,97 @@ struct rsnd_gen_ops { · 2 unmodified lines | ||
| 19 | 24 | struct rsnd_dai_stream *io); |
| 20 | 25 | }; |
| 21 | 26 | |
| 22 | −struct rsnd_gen_reg_map { | |
| 23 | − int index; /* -1 : not supported */ | |
| 24 | − u32 offset_id; /* offset of ssi0, ssi1, ssi2... */ | |
| 25 | − u32 offset_adr; /* offset of SSICR, SSISR, ... */ | |
| 26 | −}; | |
| 27 | − | |
| 28 | 27 | struct rsnd_gen { |
| 29 | 28 | void __iomem *base[RSND_BASE_MAX]; |
| 30 | 29 | |
| 31 | − struct rsnd_gen_reg_map reg_map[RSND_REG_MAX]; | |
| 32 | 30 | struct rsnd_gen_ops *ops; |
| 31 | + | |
| 32 | + struct regmap *regmap; | |
| 33 | + struct regmap_field *regs[RSND_REG_MAX]; | |
| 33 | 34 | }; |
| 34 | 35 | |
| 35 | 36 | #define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen) |
| 36 | 37 | |
| 38 | +#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size) \ | |
| 39 | + [id] = { \ | |
| 40 | + .reg = (unsigned int)gen->base[reg_id] + offset, \ | |
| 41 | + .lsb = 0, \ | |
| 42 | + .msb = 31, \ | |
| 43 | + .id_size = _id_size, \ | |
| 44 | + .id_offset = _id_offset, \ | |
| 45 | + } | |
| 46 | + | |
| 47 | +/* | |
| 48 | + * basic function | |
| 49 | + */ | |
| 50 | +static int rsnd_regmap_write32(void *context, const void *_data, size_t count) | |
| 51 | +{ | |
| 52 | + struct rsnd_priv *priv = context; | |
| 53 | + struct device *dev = rsnd_priv_to_dev(priv); | |
| 54 | + u32 *data = (u32 *)_data; | |
| 55 | + u32 val = data[1]; | |
| 56 | + void __iomem *reg = (void *)data[0]; | |
| 57 | + | |
| 58 | + iowrite32(val, reg); | |
| 59 | + | |
| 60 | + dev_dbg(dev, "w %p : %08x\n", reg, val); | |
| 61 | + | |
| 62 | + return 0; | |
| 63 | +} | |
| 64 | + | |
| 65 | +static int rsnd_regmap_read32(void *context, | |
| 66 | + const void *_data, size_t reg_size, | |
| 67 | + void *_val, size_t val_size) | |
| 68 | +{ | |
| 69 | + struct rsnd_priv *priv = context; | |
| 70 | + struct device *dev = rsnd_priv_to_dev(priv); | |
| 71 | + u32 *data = (u32 *)_data; | |
| 72 | + u32 *val = (u32 *)_val; | |
| 73 | + void __iomem *reg = (void *)data[0]; | |
| 74 | + | |
| 75 | + *val = ioread32(reg); | |
| 76 | + | |
| 77 | + dev_dbg(dev, "r %p : %08x\n", reg, *val); | |
| 78 | + | |
| 79 | + return 0; | |
| 80 | +} | |
| 81 | + | |
| 82 | +static struct regmap_bus rsnd_regmap_bus = { | |
| 83 | + .write = rsnd_regmap_write32, | |
| 84 | + .read = rsnd_regmap_read32, | |
| 85 | + .reg_format_endian_default = REGMAP_ENDIAN_NATIVE, | |
| 86 | + .val_format_endian_default = REGMAP_ENDIAN_NATIVE, | |
| 87 | +}; | |
| 88 | + | |
| 89 | +u32 rsnd_read(struct rsnd_priv *priv, | |
| 90 | + struct rsnd_mod *mod, enum rsnd_reg reg) | |
| 91 | +{ | |
| 92 | + struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | |
| 93 | + u32 val; | |
| 94 | + | |
| 95 | + regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val); | |
| 96 | + | |
| 97 | + return val; | |
| 98 | +} | |
| 99 | + | |
| 100 | +void rsnd_write(struct rsnd_priv *priv, | |
| 101 | + struct rsnd_mod *mod, | |
| 102 | + enum rsnd_reg reg, u32 data) | |
| 103 | +{ | |
| 104 | + struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | |
| 105 | + | |
| 106 | + regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); | |
| 107 | +} | |
| 108 | + | |
| 109 | +void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, | |
| 110 | + enum rsnd_reg reg, u32 mask, u32 data) | |
| 111 | +{ | |
| 112 | + struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | |
| 113 | + | |
| 114 | + regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod), | |
| 115 | + mask, data); | |
| 116 | +} | |
| 117 | + | |
| 37 | 118 | /* |
| 38 | 119 | * Gen2 |
| 39 | 120 | * will be filled in the future |
| @@ -98,44 +179,64 @@ static int rsnd_gen1_path_exit(struct rsnd_priv *priv, · 58 unmodified lines | ||
| 98 | 179 | return ret; |
| 99 | 180 | } |
| 100 | 181 | |
| 101 | −static struct rsnd_gen_ops rsnd_gen1_ops = { | |
| 102 | − .path_init = rsnd_gen1_path_init, | |
| 103 | − .path_exit = rsnd_gen1_path_exit, | |
| 104 | −}; | |
| 182 | +/* single address mapping */ | |
| 183 | +#define RSND_GEN1_S_REG(gen, reg, id, offset) \ | |
| 184 | + RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9) | |
| 105 | 185 | |
| 106 | −#define RSND_GEN1_REG_MAP(g, s, i, oi, oa) \ | |
| 107 | − do { \ | |
| 108 | − (g)->reg_map[RSND_REG_##i].index = RSND_GEN1_##s; \ | |
| 109 | − (g)->reg_map[RSND_REG_##i].offset_id = oi; \ | |
| 110 | − (g)->reg_map[RSND_REG_##i].offset_adr = oa; \ | |
| 111 | − } while (0) | |
| 186 | +/* multi address mapping */ | |
| 187 | +#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset) \ | |
| 188 | + RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9) | |
| 112 | 189 | |
| 113 | −static void rsnd_gen1_reg_map_init(struct rsnd_gen *gen) | |
| 190 | +static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen) | |
| 114 | 191 | { |
| 115 | − RSND_GEN1_REG_MAP(gen, SRU, SRC_ROUTE_SEL, 0x0, 0x00); | |
| 116 | − RSND_GEN1_REG_MAP(gen, SRU, SRC_TMG_SEL0, 0x0, 0x08); | |
| 117 | − RSND_GEN1_REG_MAP(gen, SRU, SRC_TMG_SEL1, 0x0, 0x0c); | |
| 118 | − RSND_GEN1_REG_MAP(gen, SRU, SRC_TMG_SEL2, 0x0, 0x10); | |
| 119 | − RSND_GEN1_REG_MAP(gen, SRU, SRC_CTRL, 0x0, 0xc0); | |
| 120 | − RSND_GEN1_REG_MAP(gen, SRU, SSI_MODE0, 0x0, 0xD0); | |
| 121 | − RSND_GEN1_REG_MAP(gen, SRU, SSI_MODE1, 0x0, 0xD4); | |
| 122 | − RSND_GEN1_REG_MAP(gen, SRU, BUSIF_MODE, 0x4, 0x20); | |
| 123 | − RSND_GEN1_REG_MAP(gen, SRU, BUSIF_ADINR, 0x40, 0x214); | |
| 124 | − | |
| 125 | − RSND_GEN1_REG_MAP(gen, ADG, BRRA, 0x0, 0x00); | |
| 126 | − RSND_GEN1_REG_MAP(gen, ADG, BRRB, 0x0, 0x04); | |
| 127 | − RSND_GEN1_REG_MAP(gen, ADG, SSICKR, 0x0, 0x08); | |
| 128 | − RSND_GEN1_REG_MAP(gen, ADG, AUDIO_CLK_SEL0, 0x0, 0x0c); | |
| 129 | − RSND_GEN1_REG_MAP(gen, ADG, AUDIO_CLK_SEL1, 0x0, 0x10); | |
| 130 | − RSND_GEN1_REG_MAP(gen, ADG, AUDIO_CLK_SEL3, 0x0, 0x18); | |
| 131 | − RSND_GEN1_REG_MAP(gen, ADG, AUDIO_CLK_SEL4, 0x0, 0x1c); | |
| 132 | − RSND_GEN1_REG_MAP(gen, ADG, AUDIO_CLK_SEL5, 0x0, 0x20); | |
| 133 | − | |
| 134 | − RSND_GEN1_REG_MAP(gen, SSI, SSICR, 0x40, 0x00); | |
| 135 | − RSND_GEN1_REG_MAP(gen, SSI, SSISR, 0x40, 0x04); | |
| 136 | − RSND_GEN1_REG_MAP(gen, SSI, SSITDR, 0x40, 0x08); | |
| 137 | − RSND_GEN1_REG_MAP(gen, SSI, SSIRDR, 0x40, 0x0c); | |
| 138 | − RSND_GEN1_REG_MAP(gen, SSI, SSIWSR, 0x40, 0x20); | |
| 192 | + int i; | |
| 193 | + struct device *dev = rsnd_priv_to_dev(priv); | |
| 194 | + struct regmap_config regc; | |
| 195 | + struct reg_field regf[RSND_REG_MAX] = { | |
| 196 | + RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00), | |
| 197 | + RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08), | |
| 198 | + RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c), | |
| 199 | + RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10), | |
| 200 | + RSND_GEN1_S_REG(gen, SRU, SRC_CTRL, 0xc0), | |
| 201 | + RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0), | |
| 202 | + RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4), | |
| 203 | + RSND_GEN1_M_REG(gen, SRU, BUSIF_MODE, 0x20, 0x4), | |
| 204 | + RSND_GEN1_M_REG(gen, SRU, BUSIF_ADINR, 0x214, 0x40), | |
| 205 | + | |
| 206 | + RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00), | |
| 207 | + RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04), | |
| 208 | + RSND_GEN1_S_REG(gen, ADG, SSICKR, 0x08), | |
| 209 | + RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c), | |
| 210 | + RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10), | |
| 211 | + RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL3, 0x18), | |
| 212 | + RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL4, 0x1c), | |
| 213 | + RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL5, 0x20), | |
| 214 | + | |
| 215 | + RSND_GEN1_M_REG(gen, SSI, SSICR, 0x00, 0x40), | |
| 216 | + RSND_GEN1_M_REG(gen, SSI, SSISR, 0x04, 0x40), | |
| 217 | + RSND_GEN1_M_REG(gen, SSI, SSITDR, 0x08, 0x40), | |
| 218 | + RSND_GEN1_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40), | |
| 219 | + RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40), | |
| 220 | + }; | |
| 221 | + | |
| 222 | + memset(®c, 0, sizeof(regc)); | |
| 223 | + regc.reg_bits = 32; | |
| 224 | + regc.val_bits = 32; | |
| 225 | + | |
| 226 | + gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, ®c); | |
| 227 | + if (IS_ERR(gen->regmap)) { | |
| 228 | + dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap)); | |
| 229 | + return PTR_ERR(gen->regmap); | |
| 230 | + } | |
| 231 | + | |
| 232 | + for (i = 0; i < RSND_REG_MAX; i++) { | |
| 233 | + gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]); | |
| 234 | + if (IS_ERR(gen->regs[i])) | |
| 235 | + return PTR_ERR(gen->regs[i]); | |
| 236 | + | |
| 237 | + } | |
| 238 | + | |
| 239 | + return 0; | |
| 139 | 240 | } |
| 140 | 241 | |
| 141 | 242 | static int rsnd_gen1_probe(struct platform_device *pdev, |
| @@ -147,6 +248,7 @@ static int rsnd_gen1_probe(struct platform_device *pdev, · 5 unmodified lines | ||
| 147 | 248 | struct resource *sru_res; |
| 148 | 249 | struct resource *adg_res; |
| 149 | 250 | struct resource *ssi_res; |
| 251 | + int ret; | |
| 150 | 252 | |
| 151 | 253 | /* |
| 152 | 254 | * map address |
| @@ -163,8 +265,9 @@ static int rsnd_gen1_probe(struct platform_device *pdev, · 10 unmodified lines | ||
| 163 | 265 | IS_ERR(gen->base[RSND_GEN1_SSI])) |
| 164 | 266 | return -ENODEV; |
| 165 | 267 | |
| 166 | − gen->ops = &rsnd_gen1_ops; | |
| 167 | − rsnd_gen1_reg_map_init(gen); | |
| 268 | + ret = rsnd_gen1_regmap_init(priv, gen); | |
| 269 | + if (ret < 0) | |
| 270 | + return ret; | |
| 168 | 271 | |
| 169 | 272 | dev_dbg(dev, "Gen1 device probed\n"); |
| 170 | 273 | dev_dbg(dev, "SRU : %08x => %p\n", sru_res->start, |
| @@ -183,6 +286,13 @@ static void rsnd_gen1_remove(struct platform_device *pdev, · 12 unmodified lines | ||
| 183 | 286 | { |
| 184 | 287 | } |
| 185 | 288 | |
| 289 | +static struct rsnd_gen_ops rsnd_gen1_ops = { | |
| 290 | + .probe = rsnd_gen1_probe, | |
| 291 | + .remove = rsnd_gen1_remove, | |
| 292 | + .path_init = rsnd_gen1_path_init, | |
| 293 | + .path_exit = rsnd_gen1_path_exit, | |
| 294 | +}; | |
| 295 | + | |
| 186 | 296 | /* |
| 187 | 297 | * Gen |
| 188 | 298 | */ |
| @@ -204,46 +314,12 @@ int rsnd_gen_path_exit(struct rsnd_priv *priv, · 15 unmodified lines | ||
| 204 | 314 | return gen->ops->path_exit(priv, rdai, io); |
| 205 | 315 | } |
| 206 | 316 | |
| 207 | −void __iomem *rsnd_gen_reg_get(struct rsnd_priv *priv, | |
| 208 | − struct rsnd_mod *mod, | |
| 209 | − enum rsnd_reg reg) | |
| 210 | −{ | |
| 211 | − struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | |
| 212 | − struct device *dev = rsnd_priv_to_dev(priv); | |
| 213 | − int index; | |
| 214 | − u32 offset_id, offset_adr; | |
| 215 | − | |
| 216 | − if (reg >= RSND_REG_MAX) { | |
| 217 | − dev_err(dev, "rsnd_reg reg error\n"); | |
| 218 | − return NULL; | |
| 219 | − } | |
| 220 | − | |
| 221 | − index = gen->reg_map[reg].index; | |
| 222 | − offset_id = gen->reg_map[reg].offset_id; | |
| 223 | − offset_adr = gen->reg_map[reg].offset_adr; | |
| 224 | − | |
| 225 | − if (index < 0) { | |
| 226 | − dev_err(dev, "unsupported reg access %d\n", reg); | |
| 227 | − return NULL; | |
| 228 | − } | |
| 229 | − | |
| 230 | − if (offset_id && mod) | |
| 231 | − offset_id *= rsnd_mod_id(mod); | |
| 232 | − | |
| 233 | − /* | |
| 234 | − * index/offset were set on gen1/gen2 | |
| 235 | − */ | |
| 236 | − | |
| 237 | − return gen->base[index] + offset_id + offset_adr; | |
| 238 | −} | |
| 239 | − | |
| 240 | 317 | int rsnd_gen_probe(struct platform_device *pdev, |
| 241 | 318 | struct rcar_snd_info *info, |
| 242 | 319 | struct rsnd_priv *priv) |
| 243 | 320 | { |
| 244 | 321 | struct device *dev = rsnd_priv_to_dev(priv); |
| 245 | 322 | struct rsnd_gen *gen; |
| 246 | − int i; | |
| 247 | 323 | |
| 248 | 324 | gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL); |
| 249 | 325 | if (!gen) { |
| @@ -251,30 +327,23 @@ int rsnd_gen_probe(struct platform_device *pdev, · 1 unmodified line | ||
| 251 | 327 | return -ENOMEM; |
| 252 | 328 | } |
| 253 | 329 | |
| 254 | − priv->gen = gen; | |
| 255 | − | |
| 256 | − /* | |
| 257 | − * see | |
| 258 | − * rsnd_reg_get() | |
| 259 | − * rsnd_gen_probe() | |
| 260 | − */ | |
| 261 | − for (i = 0; i < RSND_REG_MAX; i++) | |
| 262 | − gen->reg_map[i].index = -1; | |
| 263 | − | |
| 264 | − /* | |
| 265 | − * init each module | |
| 266 | − */ | |
| 267 | 330 | if (rsnd_is_gen1(priv)) |
| 268 | − return rsnd_gen1_probe(pdev, info, priv); | |
| 331 | + gen->ops = &rsnd_gen1_ops; | |
| 269 | 332 | |
| 270 | − dev_err(dev, "unknown generation R-Car sound device\n"); | |
| 333 | + if (!gen->ops) { | |
| 334 | + dev_err(dev, "unknown generation R-Car sound device\n"); | |
| 335 | + return -ENODEV; | |
| 336 | + } | |
| 271 | 337 | |
| 272 | − return -ENODEV; | |
| 338 | + priv->gen = gen; | |
| 339 | + | |
| 340 | + return gen->ops->probe(pdev, info, priv); | |
| 273 | 341 | } |
| 274 | 342 | |
| 275 | 343 | void rsnd_gen_remove(struct platform_device *pdev, |
| 276 | 344 | struct rsnd_priv *priv) |
| 277 | 345 | { |
| 278 | − if (rsnd_is_gen1(priv)) | |
| 279 | − rsnd_gen1_remove(pdev, priv); | |
| 346 | + struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | |
| 347 | + | |
| 348 | + gen->ops->remove(pdev, priv); | |
| 280 | 349 | } |
| @@ -78,10 +78,6 @@ struct rsnd_dai_stream; · 77 unmodified lines | ||
| 78 | 78 | #define rsnd_mod_bset(m, r, s, d) \ |
| 79 | 79 | rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d) |
| 80 | 80 | |
| 81 | −#define rsnd_priv_read(p, r) rsnd_read(p, NULL, RSND_REG_##r) | |
| 82 | −#define rsnd_priv_write(p, r, d) rsnd_write(p, NULL, RSND_REG_##r, d) | |
| 83 | −#define rsnd_priv_bset(p, r, s, d) rsnd_bset(p, NULL, RSND_REG_##r, s, d) | |
| 84 | − | |
| 85 | 81 | u32 rsnd_read(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg); |
| 86 | 82 | void rsnd_write(struct rsnd_priv *priv, struct rsnd_mod *mod, |
| 87 | 83 | enum rsnd_reg reg, u32 data); |
| @@ -285,6 +281,7 @@ int rsnd_scu_probe(struct platform_device *pdev, · 197 unmodified lines | ||
| 285 | 281 | void rsnd_scu_remove(struct platform_device *pdev, |
| 286 | 282 | struct rsnd_priv *priv); |
| 287 | 283 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id); |
| 284 | +bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod); | |
| 288 | 285 | #define rsnd_scu_nr(priv) ((priv)->scu_nr) |
| 289 | 286 | |
| 290 | 287 | /* |
| @@ -146,20 +146,26 @@ static int rsnd_scu_set_hpbif(struct rsnd_priv *priv, · 145 unmodified lines | ||
| 146 | 146 | return 0; |
| 147 | 147 | } |
| 148 | 148 | |
| 149 | +bool rsnd_scu_hpbif_is_enable(struct rsnd_mod *mod) | |
| 150 | +{ | |
| 151 | + struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | |
| 152 | + u32 flags = rsnd_scu_mode_flags(scu); | |
| 153 | + | |
| 154 | + return !!(flags & RSND_SCU_USE_HPBIF); | |
| 155 | +} | |
| 156 | + | |
| 149 | 157 | static int rsnd_scu_start(struct rsnd_mod *mod, |
| 150 | 158 | struct rsnd_dai *rdai, |
| 151 | 159 | struct rsnd_dai_stream *io) |
| 152 | 160 | { |
| 153 | 161 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
| 154 | − struct rsnd_scu *scu = rsnd_mod_to_scu(mod); | |
| 155 | 162 | struct device *dev = rsnd_priv_to_dev(priv); |
| 156 | − u32 flags = rsnd_scu_mode_flags(scu); | |
| 157 | 163 | int ret; |
| 158 | 164 | |
| 159 | 165 | /* |
| 160 | 166 | * SCU will be used if it has RSND_SCU_USE_HPBIF flags |
| 161 | 167 | */ |
| 162 | − if (!(flags & RSND_SCU_USE_HPBIF)) { | |
| 168 | + if (!rsnd_scu_hpbif_is_enable(mod)) { | |
| 163 | 169 | /* it use PIO transter */ |
| 164 | 170 | dev_dbg(dev, "%s%d is not used\n", |
| 165 | 171 | rsnd_mod_name(mod), rsnd_mod_id(mod)); |
| @@ -192,7 +198,8 @@ static struct rsnd_mod_ops rsnd_scu_ops = { · 26 unmodified lines | ||
| 192 | 198 | |
| 193 | 199 | struct rsnd_mod *rsnd_scu_mod_get(struct rsnd_priv *priv, int id) |
| 194 | 200 | { |
| 195 | − BUG_ON(id < 0 || id >= rsnd_scu_nr(priv)); | |
| 201 | + if (WARN_ON(id < 0 || id >= rsnd_scu_nr(priv))) | |
| 202 | + id = 0; | |
| 196 | 203 | |
| 197 | 204 | return &((struct rsnd_scu *)(priv->scu) + id)->mod; |
| 198 | 205 | } |
| @@ -101,29 +101,30 @@ struct rsnd_ssiu { · 100 unmodified lines | ||
| 101 | 101 | #define rsnd_ssi_to_ssiu(ssi)\ |
| 102 | 102 | (((struct rsnd_ssiu *)((ssi) - rsnd_mod_id(&(ssi)->mod))) - 1) |
| 103 | 103 | |
| 104 | −static void rsnd_ssi_mode_init(struct rsnd_priv *priv, | |
| 105 | − struct rsnd_ssiu *ssiu) | |
| 104 | +static void rsnd_ssi_mode_set(struct rsnd_priv *priv, | |
| 105 | + struct rsnd_dai *rdai, | |
| 106 | + struct rsnd_ssi *ssi) | |
| 106 | 107 | { |
| 107 | 108 | struct device *dev = rsnd_priv_to_dev(priv); |
| 108 | − struct rsnd_ssi *ssi; | |
| 109 | + struct rsnd_mod *scu; | |
| 110 | + struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi); | |
| 111 | + int id = rsnd_mod_id(&ssi->mod); | |
| 109 | 112 | u32 flags; |
| 110 | 113 | u32 val; |
| 111 | − int i; | |
| 114 | + | |
| 115 | + scu = rsnd_scu_mod_get(priv, rsnd_mod_id(&ssi->mod)); | |
| 112 | 116 | |
| 113 | 117 | /* |
| 114 | 118 | * SSI_MODE0 |
| 115 | 119 | */ |
| 116 | − ssiu->ssi_mode0 = 0; | |
| 117 | − for_each_rsnd_ssi(ssi, priv, i) { | |
| 118 | − flags = rsnd_ssi_mode_flags(ssi); | |
| 119 | − | |
| 120 | − /* see also BUSIF_MODE */ | |
| 121 | − if (!(flags & RSND_SSI_DEPENDENT)) { | |
| 122 | − ssiu->ssi_mode0 |= (1 << i); | |
| 123 | − dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", i); | |
| 124 | − } else { | |
| 125 | − dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", i); | |
| 126 | − } | |
| 120 | + | |
| 121 | + /* see also BUSIF_MODE */ | |
| 122 | + if (rsnd_scu_hpbif_is_enable(scu)) { | |
| 123 | + ssiu->ssi_mode0 &= ~(1 << id); | |
| 124 | + dev_dbg(dev, "SSI%d uses DEPENDENT mode\n", id); | |
| 125 | + } else { | |
| 126 | + ssiu->ssi_mode0 |= (1 << id); | |
| 127 | + dev_dbg(dev, "SSI%d uses INDEPENDENT mode\n", id); | |
| 127 | 128 | } |
| 128 | 129 | |
| 129 | 130 | /* |
| @@ -132,7 +133,7 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv, · 2 unmodified lines | ||
| 132 | 133 | #define ssi_parent_set(p, sync, adg, ext) \ |
| 133 | 134 | do { \ |
| 134 | 135 | ssi->parent = ssiu->ssi + p; \ |
| 135 | − if (flags & RSND_SSI_CLK_FROM_ADG) \ | |
| 136 | + if (rsnd_rdai_is_clk_master(rdai)) \ | |
| 136 | 137 | val = adg; \ |
| 137 | 138 | else \ |
| 138 | 139 | val = ext; \ |
| @@ -140,15 +141,11 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv, · 1 unmodified line | ||
| 140 | 141 | val |= sync; \ |
| 141 | 142 | } while (0) |
| 142 | 143 | |
| 143 | − ssiu->ssi_mode1 = 0; | |
| 144 | − for_each_rsnd_ssi(ssi, priv, i) { | |
| 145 | − flags = rsnd_ssi_mode_flags(ssi); | |
| 146 | − | |
| 147 | − if (!(flags & RSND_SSI_CLK_PIN_SHARE)) | |
| 148 | − continue; | |
| 144 | + flags = rsnd_ssi_mode_flags(ssi); | |
| 145 | + if (flags & RSND_SSI_CLK_PIN_SHARE) { | |
| 149 | 146 | |
| 150 | 147 | val = 0; |
| 151 | − switch (i) { | |
| 148 | + switch (id) { | |
| 152 | 149 | case 1: |
| 153 | 150 | ssi_parent_set(0, (1 << 4), (0x2 << 0), (0x1 << 0)); |
| 154 | 151 | break; |
| @@ -165,11 +162,6 @@ static void rsnd_ssi_mode_init(struct rsnd_priv *priv, · 10 unmodified lines | ||
| 165 | 162 | |
| 166 | 163 | ssiu->ssi_mode1 |= val; |
| 167 | 164 | } |
| 168 | −} | |
| 169 | − | |
| 170 | −static void rsnd_ssi_mode_set(struct rsnd_ssi *ssi) | |
| 171 | −{ | |
| 172 | − struct rsnd_ssiu *ssiu = rsnd_ssi_to_ssiu(ssi); | |
| 173 | 165 | |
| 174 | 166 | rsnd_mod_write(&ssi->mod, SSI_MODE0, ssiu->ssi_mode0); |
| 175 | 167 | rsnd_mod_write(&ssi->mod, SSI_MODE1, ssiu->ssi_mode1); |
| @@ -379,7 +371,7 @@ static int rsnd_ssi_init(struct rsnd_mod *mod, · 203 unmodified lines | ||
| 379 | 371 | ssi->cr_own = cr; |
| 380 | 372 | ssi->err = -1; /* ignore 1st error */ |
| 381 | 373 | |
| 382 | − rsnd_ssi_mode_set(ssi); | |
| 374 | + rsnd_ssi_mode_set(priv, rdai, ssi); | |
| 383 | 375 | |
| 384 | 376 | dev_dbg(dev, "%s.%d init\n", rsnd_mod_name(mod), rsnd_mod_id(mod)); |
| 385 | 377 | |
| @@ -619,7 +611,8 @@ struct rsnd_mod *rsnd_ssi_mod_get_frm_dai(struct rsnd_priv *priv, · 233 unmodified lines | ||
| 619 | 611 | |
| 620 | 612 | struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id) |
| 621 | 613 | { |
| 622 | − BUG_ON(id < 0 || id >= rsnd_ssi_nr(priv)); | |
| 614 | + if (WARN_ON(id < 0 || id >= rsnd_ssi_nr(priv))) | |
| 615 | + id = 0; | |
| 623 | 616 | |
| 624 | 617 | return &(((struct rsnd_ssiu *)(priv->ssiu))->ssi + id)->mod; |
| 625 | 618 | } |
| @@ -706,8 +699,6 @@ int rsnd_ssi_probe(struct platform_device *pdev, · 80 unmodified lines | ||
| 706 | 699 | rsnd_mod_init(priv, &ssi->mod, ops, i); |
| 707 | 700 | } |
| 708 | 701 | |
| 709 | − rsnd_ssi_mode_init(priv, ssiu); | |
| 710 | − | |
| 711 | 702 | dev_dbg(dev, "ssi probed\n"); |
| 712 | 703 | |
| 713 | 704 | return 0; |
| @@ -543,7 +543,8 @@ static void siu_dai_shutdown(struct snd_pcm_substream *substream, · 542 unmodified lines | ||
| 543 | 543 | /* Stop the siu if the other stream is not using it */ |
| 544 | 544 | if (!port_info->play_cap) { |
| 545 | 545 | /* during stmread or stmwrite ? */ |
| 546 | − BUG_ON(port_info->playback.rw_flg || port_info->capture.rw_flg); | |
| 546 | + if (WARN_ON(port_info->playback.rw_flg || port_info->capture.rw_flg)) | |
| 547 | + return; | |
| 547 | 548 | siu_dai_spbstop(port_info); |
| 548 | 549 | siu_dai_stop(port_info); |
| 549 | 550 | } |
| @@ -11,12 +11,9 @@ · 10 unmodified lines | ||
| 11 | 11 | * option) any later version. |
| 12 | 12 | */ |
| 13 | 13 | |
| 14 | −#include <linux/i2c.h> | |
| 15 | −#include <linux/spi/spi.h> | |
| 16 | 14 | #include <sound/soc.h> |
| 17 | −#include <linux/bitmap.h> | |
| 18 | −#include <linux/rbtree.h> | |
| 19 | 15 | #include <linux/export.h> |
| 16 | +#include <linux/slab.h> | |
| 20 | 17 | |
| 21 | 18 | #include <trace/events/asoc.h> |
| 22 | 19 | |
| @@ -39,7 +36,8 @@ static bool snd_soc_set_cache_val(void *base, unsigned int idx, · 16 unmodified lines | ||
| 39 | 36 | break; |
| 40 | 37 | } |
| 41 | 38 | default: |
| 42 | − BUG(); | |
| 39 | + WARN(1, "Invalid word_size %d\n", word_size); | |
| 40 | + break; | |
| 43 | 41 | } |
| 44 | 42 | return false; |
| 45 | 43 | } |
| @@ -60,132 +58,49 @@ static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx, · 14 unmodified lines | ||
| 60 | 58 | return cache[idx]; |
| 61 | 59 | } |
| 62 | 60 | default: |
| 63 | − BUG(); | |
| 61 | + WARN(1, "Invalid word_size %d\n", word_size); | |
| 62 | + break; | |
| 64 | 63 | } |
| 65 | 64 | /* unreachable */ |
| 66 | 65 | return -1; |
| 67 | 66 | } |
| 68 | 67 | |
| 69 | −static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec) | |
| 68 | +int snd_soc_cache_init(struct snd_soc_codec *codec) | |
| 70 | 69 | { |
| 71 | − int i; | |
| 72 | − int ret; | |
| 73 | − const struct snd_soc_codec_driver *codec_drv; | |
| 74 | − unsigned int val; | |
| 70 | + const struct snd_soc_codec_driver *codec_drv = codec->driver; | |
| 71 | + size_t reg_size; | |
| 75 | 72 | |
| 76 | − codec_drv = codec->driver; | |
| 77 | − for (i = 0; i < codec_drv->reg_cache_size; ++i) { | |
| 78 | − ret = snd_soc_cache_read(codec, i, &val); | |
| 79 | − if (ret) | |
| 80 | − return ret; | |
| 81 | − if (codec->reg_def_copy) | |
| 82 | − if (snd_soc_get_cache_val(codec->reg_def_copy, | |
| 83 | − i, codec_drv->reg_word_size) == val) | |
| 84 | − continue; | |
| 85 | − | |
| 86 | − WARN_ON(!snd_soc_codec_writable_register(codec, i)); | |
| 73 | + reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size; | |
| 87 | 74 | |
| 88 | − ret = snd_soc_write(codec, i, val); | |
| 89 | − if (ret) | |
| 90 | − return ret; | |
| 91 | − dev_dbg(codec->dev, "ASoC: Synced register %#x, value = %#x\n", | |
| 92 | − i, val); | |
| 93 | − } | |
| 94 | − return 0; | |
| 95 | −} | |
| 96 | − | |
| 97 | −static int snd_soc_flat_cache_write(struct snd_soc_codec *codec, | |
| 98 | − unsigned int reg, unsigned int value) | |
| 99 | −{ | |
| 100 | − snd_soc_set_cache_val(codec->reg_cache, reg, value, | |
| 101 | − codec->driver->reg_word_size); | |
| 102 | − return 0; | |
| 103 | −} | |
| 104 | − | |
| 105 | −static int snd_soc_flat_cache_read(struct snd_soc_codec *codec, | |
| 106 | − unsigned int reg, unsigned int *value) | |
| 107 | −{ | |
| 108 | − *value = snd_soc_get_cache_val(codec->reg_cache, reg, | |
| 109 | − codec->driver->reg_word_size); | |
| 110 | − return 0; | |
| 111 | −} | |
| 75 | + mutex_init(&codec->cache_rw_mutex); | |
| 112 | 76 | |
| 113 | −static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec) | |
| 114 | −{ | |
| 115 | − if (!codec->reg_cache) | |
| 116 | − return 0; | |
| 117 | − kfree(codec->reg_cache); | |
| 118 | − codec->reg_cache = NULL; | |
| 119 | − return 0; | |
| 120 | −} | |
| 77 | + dev_dbg(codec->dev, "ASoC: Initializing cache for %s codec\n", | |
| 78 | + codec->name); | |
| 121 | 79 | |
| 122 | −static int snd_soc_flat_cache_init(struct snd_soc_codec *codec) | |
| 123 | −{ | |
| 124 | − if (codec->reg_def_copy) | |
| 125 | − codec->reg_cache = kmemdup(codec->reg_def_copy, | |
| 126 | − codec->reg_size, GFP_KERNEL); | |
| 80 | + if (codec_drv->reg_cache_default) | |
| 81 | + codec->reg_cache = kmemdup(codec_drv->reg_cache_default, | |
| 82 | + reg_size, GFP_KERNEL); | |
| 127 | 83 | else |
| 128 | − codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL); | |
| 84 | + codec->reg_cache = kzalloc(reg_size, GFP_KERNEL); | |
| 129 | 85 | if (!codec->reg_cache) |
| 130 | 86 | return -ENOMEM; |
| 131 | 87 | |
| 132 | 88 | return 0; |
| 133 | 89 | } |
| 134 | 90 | |
| 135 | −/* an array of all supported compression types */ | |
| 136 | −static const struct snd_soc_cache_ops cache_types[] = { | |
| 137 | − /* Flat *must* be the first entry for fallback */ | |
| 138 | − { | |
| 139 | − .id = SND_SOC_FLAT_COMPRESSION, | |
| 140 | − .name = "flat", | |
| 141 | − .init = snd_soc_flat_cache_init, | |
| 142 | − .exit = snd_soc_flat_cache_exit, | |
| 143 | − .read = snd_soc_flat_cache_read, | |
| 144 | − .write = snd_soc_flat_cache_write, | |
| 145 | − .sync = snd_soc_flat_cache_sync | |
| 146 | − }, | |
| 147 | −}; | |
| 148 | − | |
| 149 | −int snd_soc_cache_init(struct snd_soc_codec *codec) | |
| 150 | −{ | |
| 151 | − int i; | |
| 152 | − | |
| 153 | − for (i = 0; i < ARRAY_SIZE(cache_types); ++i) | |
| 154 | − if (cache_types[i].id == codec->compress_type) | |
| 155 | − break; | |
| 156 | − | |
| 157 | − /* Fall back to flat compression */ | |
| 158 | − if (i == ARRAY_SIZE(cache_types)) { | |
| 159 | − dev_warn(codec->dev, "ASoC: Could not match compress type: %d\n", | |
| 160 | − codec->compress_type); | |
| 161 | − i = 0; | |
| 162 | − } | |
| 163 | − | |
| 164 | − mutex_init(&codec->cache_rw_mutex); | |
| 165 | − codec->cache_ops = &cache_types[i]; | |
| 166 | − | |
| 167 | − if (codec->cache_ops->init) { | |
| 168 | − if (codec->cache_ops->name) | |
| 169 | − dev_dbg(codec->dev, "ASoC: Initializing %s cache for %s codec\n", | |
| 170 | − codec->cache_ops->name, codec->name); | |
| 171 | − return codec->cache_ops->init(codec); | |
| 172 | − } | |
| 173 | − return -ENOSYS; | |
| 174 | −} | |
| 175 | − | |
| 176 | 91 | /* |
| 177 | 92 | * NOTE: keep in mind that this function might be called |
| 178 | 93 | * multiple times. |
| 179 | 94 | */ |
| 180 | 95 | int snd_soc_cache_exit(struct snd_soc_codec *codec) |
| 181 | 96 | { |
| 182 | − if (codec->cache_ops && codec->cache_ops->exit) { | |
| 183 | − if (codec->cache_ops->name) | |
| 184 | − dev_dbg(codec->dev, "ASoC: Destroying %s cache for %s codec\n", | |
| 185 | − codec->cache_ops->name, codec->name); | |
| 186 | − return codec->cache_ops->exit(codec); | |
| 187 | − } | |
| 188 | − return -ENOSYS; | |
| 97 | + dev_dbg(codec->dev, "ASoC: Destroying cache for %s codec\n", | |
| 98 | + codec->name); | |
| 99 | + if (!codec->reg_cache) | |
| 100 | + return 0; | |
| 101 | + kfree(codec->reg_cache); | |
| 102 | + codec->reg_cache = NULL; | |
| 103 | + return 0; | |
| 189 | 104 | } |
| 190 | 105 | |
| 191 | 106 | /** |
| @@ -198,18 +113,15 @@ int snd_soc_cache_exit(struct snd_soc_codec *codec) · 6 unmodified lines | ||
| 198 | 113 | int snd_soc_cache_read(struct snd_soc_codec *codec, |
| 199 | 114 | unsigned int reg, unsigned int *value) |
| 200 | 115 | { |
| 201 | − int ret; | |
| 116 | + if (!value) | |
| 117 | + return -EINVAL; | |
| 202 | 118 | |
| 203 | 119 | mutex_lock(&codec->cache_rw_mutex); |
| 204 | − | |
| 205 | − if (value && codec->cache_ops && codec->cache_ops->read) { | |
| 206 | − ret = codec->cache_ops->read(codec, reg, value); | |
| 207 | − mutex_unlock(&codec->cache_rw_mutex); | |
| 208 | − return ret; | |
| 209 | − } | |
| 210 | − | |
| 120 | + *value = snd_soc_get_cache_val(codec->reg_cache, reg, | |
| 121 | + codec->driver->reg_word_size); | |
| 211 | 122 | mutex_unlock(&codec->cache_rw_mutex); |
| 212 | − return -ENOSYS; | |
| 123 | + | |
| 124 | + return 0; | |
| 213 | 125 | } |
| 214 | 126 | EXPORT_SYMBOL_GPL(snd_soc_cache_read); |
| 215 | 127 | |
| @@ -223,20 +135,42 @@ EXPORT_SYMBOL_GPL(snd_soc_cache_read); · 7 unmodified lines | ||
| 223 | 135 | int snd_soc_cache_write(struct snd_soc_codec *codec, |
| 224 | 136 | unsigned int reg, unsigned int value) |
| 225 | 137 | { |
| 138 | + mutex_lock(&codec->cache_rw_mutex); | |
| 139 | + snd_soc_set_cache_val(codec->reg_cache, reg, value, | |
| 140 | + codec->driver->reg_word_size); | |
| 141 | + mutex_unlock(&codec->cache_rw_mutex); | |
| 142 | + | |
| 143 | + return 0; | |
| 144 | +} | |
| 145 | +EXPORT_SYMBOL_GPL(snd_soc_cache_write); | |
| 146 | + | |
| 147 | +static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec) | |
| 148 | +{ | |
| 149 | + int i; | |
| 226 | 150 | int ret; |
| 151 | + const struct snd_soc_codec_driver *codec_drv; | |
| 152 | + unsigned int val; | |
| 227 | 153 | |
| 228 | − mutex_lock(&codec->cache_rw_mutex); | |
| 154 | + codec_drv = codec->driver; | |
| 155 | + for (i = 0; i < codec_drv->reg_cache_size; ++i) { | |
| 156 | + ret = snd_soc_cache_read(codec, i, &val); | |
| 157 | + if (ret) | |
| 158 | + return ret; | |
| 159 | + if (codec_drv->reg_cache_default) | |
| 160 | + if (snd_soc_get_cache_val(codec_drv->reg_cache_default, | |
| 161 | + i, codec_drv->reg_word_size) == val) | |
| 162 | + continue; | |
| 229 | 163 | |
| 230 | − if (codec->cache_ops && codec->cache_ops->write) { | |
| 231 | − ret = codec->cache_ops->write(codec, reg, value); | |
| 232 | − mutex_unlock(&codec->cache_rw_mutex); | |
| 233 | − return ret; | |
| 234 | − } | |
| 164 | + WARN_ON(!snd_soc_codec_writable_register(codec, i)); | |
| 235 | 165 | |
| 236 | − mutex_unlock(&codec->cache_rw_mutex); | |
| 237 | − return -ENOSYS; | |
| 166 | + ret = snd_soc_write(codec, i, val); | |
| 167 | + if (ret) | |
| 168 | + return ret; | |
| 169 | + dev_dbg(codec->dev, "ASoC: Synced register %#x, value = %#x\n", | |
| 170 | + i, val); | |
| 171 | + } | |
| 172 | + return 0; | |
| 238 | 173 | } |
| 239 | −EXPORT_SYMBOL_GPL(snd_soc_cache_write); | |
| 240 | 174 | |
| 241 | 175 | /** |
| 242 | 176 | * snd_soc_cache_sync: Sync the register cache with the hardware. |
| @@ -249,92 +183,19 @@ EXPORT_SYMBOL_GPL(snd_soc_cache_write); · 6 unmodified lines | ||
| 249 | 183 | */ |
| 250 | 184 | int snd_soc_cache_sync(struct snd_soc_codec *codec) |
| 251 | 185 | { |
| 186 | + const char *name = "flat"; | |
| 252 | 187 | int ret; |
| 253 | − const char *name; | |
| 254 | 188 | |
| 255 | − if (!codec->cache_sync) { | |
| 189 | + if (!codec->cache_sync) | |
| 256 | 190 | return 0; |
| 257 | − } | |
| 258 | − | |
| 259 | − if (!codec->cache_ops || !codec->cache_ops->sync) | |
| 260 | − return -ENOSYS; | |
| 261 | 191 | |
| 262 | − if (codec->cache_ops->name) | |
| 263 | − name = codec->cache_ops->name; | |
| 264 | − else | |
| 265 | − name = "unknown"; | |
| 266 | − | |
| 267 | − if (codec->cache_ops->name) | |
| 268 | − dev_dbg(codec->dev, "ASoC: Syncing %s cache for %s codec\n", | |
| 269 | − codec->cache_ops->name, codec->name); | |
| 192 | + dev_dbg(codec->dev, "ASoC: Syncing cache for %s codec\n", | |
| 193 | + codec->name); | |
| 270 | 194 | trace_snd_soc_cache_sync(codec, name, "start"); |
| 271 | − ret = codec->cache_ops->sync(codec); | |
| 195 | + ret = snd_soc_flat_cache_sync(codec); | |
| 272 | 196 | if (!ret) |
| 273 | 197 | codec->cache_sync = 0; |
| 274 | 198 | trace_snd_soc_cache_sync(codec, name, "end"); |
| 275 | 199 | return ret; |
| 276 | 200 | } |
| 277 | 201 | EXPORT_SYMBOL_GPL(snd_soc_cache_sync); |
| 278 | − | |
| 279 | −static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec, | |
| 280 | − unsigned int reg) | |
| 281 | −{ | |
| 282 | − const struct snd_soc_codec_driver *codec_drv; | |
| 283 | − unsigned int min, max, index; | |
| 284 | − | |
| 285 | − codec_drv = codec->driver; | |
| 286 | − min = 0; | |
| 287 | − max = codec_drv->reg_access_size - 1; | |
| 288 | − do { | |
| 289 | − index = (min + max) / 2; | |
| 290 | − if (codec_drv->reg_access_default[index].reg == reg) | |
| 291 | − return index; | |
| 292 | − if (codec_drv->reg_access_default[index].reg < reg) | |
| 293 | − min = index + 1; | |
| 294 | − else | |
| 295 | − max = index; | |
| 296 | − } while (min <= max); | |
| 297 | − return -1; | |
| 298 | −} | |
| 299 | − | |
| 300 | −int snd_soc_default_volatile_register(struct snd_soc_codec *codec, | |
| 301 | − unsigned int reg) | |
| 302 | −{ | |
| 303 | − int index; | |
| 304 | − | |
| 305 | − if (reg >= codec->driver->reg_cache_size) | |
| 306 | − return 1; | |
| 307 | − index = snd_soc_get_reg_access_index(codec, reg); | |
| 308 | − if (index < 0) | |
| 309 | − return 0; | |
| 310 | − return codec->driver->reg_access_default[index].vol; | |
| 311 | −} | |
| 312 | −EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register); | |
| 313 | − | |
| 314 | −int snd_soc_default_readable_register(struct snd_soc_codec *codec, | |
| 315 | − unsigned int reg) | |
| 316 | −{ | |
| 317 | − int index; | |
| 318 | − | |
| 319 | − if (reg >= codec->driver->reg_cache_size) | |
| 320 | − return 1; | |
| 321 | − index = snd_soc_get_reg_access_index(codec, reg); | |
| 322 | − if (index < 0) | |
| 323 | − return 0; | |
| 324 | − return codec->driver->reg_access_default[index].read; | |
| 325 | −} | |
| 326 | −EXPORT_SYMBOL_GPL(snd_soc_default_readable_register); | |
| 327 | − | |
| 328 | −int snd_soc_default_writable_register(struct snd_soc_codec *codec, | |
| 329 | − unsigned int reg) | |
| 330 | −{ | |
| 331 | − int index; | |
| 332 | − | |
| 333 | − if (reg >= codec->driver->reg_cache_size) | |
| 334 | − return 1; | |
| 335 | − index = snd_soc_get_reg_access_index(codec, reg); | |
| 336 | − if (index < 0) | |
| 337 | − return 0; | |
| 338 | − return codec->driver->reg_access_default[index].write; | |
| 339 | −} | |
| 340 | −EXPORT_SYMBOL_GPL(snd_soc_default_writable_register); | |
| @@ -662,6 +662,8 @@ int snd_soc_suspend(struct device *dev) · 661 unmodified lines | ||
| 662 | 662 | codec->cache_sync = 1; |
| 663 | 663 | if (codec->using_regmap) |
| 664 | 664 | regcache_mark_dirty(codec->control_data); |
| 665 | + /* deactivate pins to sleep state */ | |
| 666 | + pinctrl_pm_select_sleep_state(codec->dev); | |
| 665 | 667 | break; |
| 666 | 668 | default: |
| 667 | 669 | dev_dbg(codec->dev, |
| @@ -679,6 +681,9 @@ int snd_soc_suspend(struct device *dev) · 11 unmodified lines | ||
| 679 | 681 | |
| 680 | 682 | if (cpu_dai->driver->suspend && cpu_dai->driver->ac97_control) |
| 681 | 683 | cpu_dai->driver->suspend(cpu_dai); |
| 684 | + | |
| 685 | + /* deactivate pins to sleep state */ | |
| 686 | + pinctrl_pm_select_sleep_state(cpu_dai->dev); | |
| 682 | 687 | } |
| 683 | 688 | |
| 684 | 689 | if (card->suspend_post) |
| @@ -807,6 +812,16 @@ int snd_soc_resume(struct device *dev) · 122 unmodified lines | ||
| 807 | 812 | if (list_empty(&card->codec_dev_list)) |
| 808 | 813 | return 0; |
| 809 | 814 | |
| 815 | + /* activate pins from sleep state */ | |
| 816 | + for (i = 0; i < card->num_rtd; i++) { | |
| 817 | + struct snd_soc_dai *cpu_dai = card->rtd[i].cpu_dai; | |
| 818 | + struct snd_soc_dai *codec_dai = card->rtd[i].codec_dai; | |
| 819 | + if (cpu_dai->active) | |
| 820 | + pinctrl_pm_select_default_state(cpu_dai->dev); | |
| 821 | + if (codec_dai->active) | |
| 822 | + pinctrl_pm_select_default_state(codec_dai->dev); | |
| 823 | + } | |
| 824 | + | |
| 810 | 825 | /* AC97 devices might have other drivers hanging off them so |
| 811 | 826 | * need to resume immediately. Other drivers don't have that |
| 812 | 827 | * problem and may take a substantial amount of time to resume |
| @@ -1589,17 +1604,13 @@ static void soc_remove_aux_dev(struct snd_soc_card *card, int num) · 776 unmodified lines | ||
| 1589 | 1604 | soc_remove_codec(codec); |
| 1590 | 1605 | } |
| 1591 | 1606 | |
| 1592 | −static int snd_soc_init_codec_cache(struct snd_soc_codec *codec, | |
| 1593 | − enum snd_soc_compress_type compress_type) | |
| 1607 | +static int snd_soc_init_codec_cache(struct snd_soc_codec *codec) | |
| 1594 | 1608 | { |
| 1595 | 1609 | int ret; |
| 1596 | 1610 | |
| 1597 | 1611 | if (codec->cache_init) |
| 1598 | 1612 | return 0; |
| 1599 | 1613 | |
| 1600 | − /* override the compress_type if necessary */ | |
| 1601 | − if (compress_type && codec->compress_type != compress_type) | |
| 1602 | − codec->compress_type = compress_type; | |
| 1603 | 1614 | ret = snd_soc_cache_init(codec); |
| 1604 | 1615 | if (ret < 0) { |
| 1605 | 1616 | dev_err(codec->dev, |
| @@ -1614,8 +1625,6 @@ static int snd_soc_init_codec_cache(struct snd_soc_codec *codec, · 8 unmodified lines | ||
| 1614 | 1625 | static int snd_soc_instantiate_card(struct snd_soc_card *card) |
| 1615 | 1626 | { |
| 1616 | 1627 | struct snd_soc_codec *codec; |
| 1617 | − struct snd_soc_codec_conf *codec_conf; | |
| 1618 | − enum snd_soc_compress_type compress_type; | |
| 1619 | 1628 | struct snd_soc_dai_link *dai_link; |
| 1620 | 1629 | int ret, i, order, dai_fmt; |
| 1621 | 1630 | |
| @@ -1639,19 +1648,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card) · 17 unmodified lines | ||
| 1639 | 1648 | list_for_each_entry(codec, &codec_list, list) { |
| 1640 | 1649 | if (codec->cache_init) |
| 1641 | 1650 | continue; |
| 1642 | − /* by default we don't override the compress_type */ | |
| 1643 | − compress_type = 0; | |
| 1644 | − /* check to see if we need to override the compress_type */ | |
| 1645 | − for (i = 0; i < card->num_configs; ++i) { | |
| 1646 | − codec_conf = &card->codec_conf[i]; | |
| 1647 | − if (!strcmp(codec->name, codec_conf->dev_name)) { | |
| 1648 | − compress_type = codec_conf->compress_type; | |
| 1649 | − if (compress_type && compress_type | |
| 1650 | − != codec->compress_type) | |
| 1651 | − break; | |
| 1652 | − } | |
| 1653 | − } | |
| 1654 | − ret = snd_soc_init_codec_cache(codec, compress_type); | |
| 1651 | + ret = snd_soc_init_codec_cache(codec); | |
| 1655 | 1652 | if (ret < 0) |
| 1656 | 1653 | goto base_error; |
| 1657 | 1654 | } |
| @@ -1947,6 +1944,14 @@ int snd_soc_poweroff(struct device *dev) · 289 unmodified lines | ||
| 1947 | 1944 | |
| 1948 | 1945 | snd_soc_dapm_shutdown(card); |
| 1949 | 1946 | |
| 1947 | + /* deactivate pins to sleep state */ | |
| 1948 | + for (i = 0; i < card->num_rtd; i++) { | |
| 1949 | + struct snd_soc_dai *cpu_dai = card->rtd[i].cpu_dai; | |
| 1950 | + struct snd_soc_dai *codec_dai = card->rtd[i].codec_dai; | |
| 1951 | + pinctrl_pm_select_sleep_state(codec_dai->dev); | |
| 1952 | + pinctrl_pm_select_sleep_state(cpu_dai->dev); | |
| 1953 | + } | |
| 1954 | + | |
| 1950 | 1955 | return 0; |
| 1951 | 1956 | } |
| 1952 | 1957 | EXPORT_SYMBOL_GPL(snd_soc_poweroff); |
| @@ -2297,13 +2302,6 @@ unsigned int snd_soc_write(struct snd_soc_codec *codec, · 344 unmodified lines | ||
| 2297 | 2302 | } |
| 2298 | 2303 | EXPORT_SYMBOL_GPL(snd_soc_write); |
| 2299 | 2304 | |
| 2300 | −unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec, | |
| 2301 | − unsigned int reg, const void *data, size_t len) | |
| 2302 | −{ | |
| 2303 | − return codec->bulk_write_raw(codec, reg, data, len); | |
| 2304 | −} | |
| 2305 | −EXPORT_SYMBOL_GPL(snd_soc_bulk_write_raw); | |
| 2306 | − | |
| 2307 | 2305 | /** |
| 2308 | 2306 | * snd_soc_update_bits - update codec register bits |
| 2309 | 2307 | * @codec: audio codec |
| @@ -2576,8 +2574,9 @@ int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, · 266 unmodified lines | ||
| 2576 | 2574 | |
| 2577 | 2575 | if (uinfo->value.enumerated.item > e->max - 1) |
| 2578 | 2576 | uinfo->value.enumerated.item = e->max - 1; |
| 2579 | − strcpy(uinfo->value.enumerated.name, | |
| 2580 | − e->texts[uinfo->value.enumerated.item]); | |
| 2577 | + strlcpy(uinfo->value.enumerated.name, | |
| 2578 | + e->texts[uinfo->value.enumerated.item], | |
| 2579 | + sizeof(uinfo->value.enumerated.name)); | |
| 2581 | 2580 | return 0; |
| 2582 | 2581 | } |
| 2583 | 2582 | EXPORT_SYMBOL_GPL(snd_soc_info_enum_double); |
| @@ -3575,6 +3574,22 @@ int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source, · 991 unmodified lines | ||
| 3575 | 3574 | } |
| 3576 | 3575 | EXPORT_SYMBOL_GPL(snd_soc_codec_set_pll); |
| 3577 | 3576 | |
| 3577 | +/** | |
| 3578 | + * snd_soc_dai_set_bclk_ratio - configure BCLK to sample rate ratio. | |
| 3579 | + * @dai: DAI | |
| 3580 | + * @ratio Ratio of BCLK to Sample rate. | |
| 3581 | + * | |
| 3582 | + * Configures the DAI for a preset BCLK to sample rate ratio. | |
| 3583 | + */ | |
| 3584 | +int snd_soc_dai_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) | |
| 3585 | +{ | |
| 3586 | + if (dai->driver && dai->driver->ops->set_bclk_ratio) | |
| 3587 | + return dai->driver->ops->set_bclk_ratio(dai, ratio); | |
| 3588 | + else | |
| 3589 | + return -EINVAL; | |
| 3590 | +} | |
| 3591 | +EXPORT_SYMBOL_GPL(snd_soc_dai_set_bclk_ratio); | |
| 3592 | + | |
| 3578 | 3593 | /** |
| 3579 | 3594 | * snd_soc_dai_set_fmt - configure DAI hardware audio format. |
| 3580 | 3595 | * @dai: DAI |
| @@ -3775,6 +3790,16 @@ int snd_soc_register_card(struct snd_soc_card *card) · 194 unmodified lines | ||
| 3775 | 3790 | if (ret != 0) |
| 3776 | 3791 | soc_cleanup_card_debugfs(card); |
| 3777 | 3792 | |
| 3793 | + /* deactivate pins to sleep state */ | |
| 3794 | + for (i = 0; i < card->num_rtd; i++) { | |
| 3795 | + struct snd_soc_dai *cpu_dai = card->rtd[i].cpu_dai; | |
| 3796 | + struct snd_soc_dai *codec_dai = card->rtd[i].codec_dai; | |
| 3797 | + if (!codec_dai->active) | |
| 3798 | + pinctrl_pm_select_sleep_state(codec_dai->dev); | |
| 3799 | + if (!cpu_dai->active) | |
| 3800 | + pinctrl_pm_select_sleep_state(cpu_dai->dev); | |
| 3801 | + } | |
| 3802 | + | |
| 3778 | 3803 | return ret; |
| 3779 | 3804 | } |
| 3780 | 3805 | EXPORT_SYMBOL_GPL(snd_soc_register_card); |
| @@ -4019,6 +4044,113 @@ static void snd_soc_unregister_dais(struct device *dev, size_t count) · 238 unmodified lines | ||
| 4019 | 4044 | snd_soc_unregister_dai(dev); |
| 4020 | 4045 | } |
| 4021 | 4046 | |
| 4047 | +/** | |
| 4048 | + * snd_soc_register_component - Register a component with the ASoC core | |
| 4049 | + * | |
| 4050 | + */ | |
| 4051 | +static int | |
| 4052 | +__snd_soc_register_component(struct device *dev, | |
| 4053 | + struct snd_soc_component *cmpnt, | |
| 4054 | + const struct snd_soc_component_driver *cmpnt_drv, | |
| 4055 | + struct snd_soc_dai_driver *dai_drv, | |
| 4056 | + int num_dai, bool allow_single_dai) | |
| 4057 | +{ | |
| 4058 | + int ret; | |
| 4059 | + | |
| 4060 | + dev_dbg(dev, "component register %s\n", dev_name(dev)); | |
| 4061 | + | |
| 4062 | + if (!cmpnt) { | |
| 4063 | + dev_err(dev, "ASoC: Failed to connecting component\n"); | |
| 4064 | + return -ENOMEM; | |
| 4065 | + } | |
| 4066 | + | |
| 4067 | + cmpnt->name = fmt_single_name(dev, &cmpnt->id); | |
| 4068 | + if (!cmpnt->name) { | |
| 4069 | + dev_err(dev, "ASoC: Failed to simplifying name\n"); | |
| 4070 | + return -ENOMEM; | |
| 4071 | + } | |
| 4072 | + | |
| 4073 | + cmpnt->dev = dev; | |
| 4074 | + cmpnt->driver = cmpnt_drv; | |
| 4075 | + cmpnt->dai_drv = dai_drv; | |
| 4076 | + cmpnt->num_dai = num_dai; | |
| 4077 | + | |
| 4078 | + /* | |
| 4079 | + * snd_soc_register_dai() uses fmt_single_name(), and | |
| 4080 | + * snd_soc_register_dais() uses fmt_multiple_name() | |
| 4081 | + * for dai->name which is used for name based matching | |
| 4082 | + * | |
| 4083 | + * this function is used from cpu/codec. | |
| 4084 | + * allow_single_dai flag can ignore "codec" driver reworking | |
| 4085 | + * since it had been used snd_soc_register_dais(), | |
| 4086 | + */ | |
| 4087 | + if ((1 == num_dai) && allow_single_dai) | |
| 4088 | + ret = snd_soc_register_dai(dev, dai_drv); | |
| 4089 | + else | |
| 4090 | + ret = snd_soc_register_dais(dev, dai_drv, num_dai); | |
| 4091 | + if (ret < 0) { | |
| 4092 | + dev_err(dev, "ASoC: Failed to regster DAIs: %d\n", ret); | |
| 4093 | + goto error_component_name; | |
| 4094 | + } | |
| 4095 | + | |
| 4096 | + mutex_lock(&client_mutex); | |
| 4097 | + list_add(&cmpnt->list, &component_list); | |
| 4098 | + mutex_unlock(&client_mutex); | |
| 4099 | + | |
| 4100 | + dev_dbg(cmpnt->dev, "ASoC: Registered component '%s'\n", cmpnt->name); | |
| 4101 | + | |
| 4102 | + return ret; | |
| 4103 | + | |
| 4104 | +error_component_name: | |
| 4105 | + kfree(cmpnt->name); | |
| 4106 | + | |
| 4107 | + return ret; | |
| 4108 | +} | |
| 4109 | + | |
| 4110 | +int snd_soc_register_component(struct device *dev, | |
| 4111 | + const struct snd_soc_component_driver *cmpnt_drv, | |
| 4112 | + struct snd_soc_dai_driver *dai_drv, | |
| 4113 | + int num_dai) | |
| 4114 | +{ | |
| 4115 | + struct snd_soc_component *cmpnt; | |
| 4116 | + | |
| 4117 | + cmpnt = devm_kzalloc(dev, sizeof(*cmpnt), GFP_KERNEL); | |
| 4118 | + if (!cmpnt) { | |
| 4119 | + dev_err(dev, "ASoC: Failed to allocate memory\n"); | |
| 4120 | + return -ENOMEM; | |
| 4121 | + } | |
| 4122 | + | |
| 4123 | + return __snd_soc_register_component(dev, cmpnt, cmpnt_drv, | |
| 4124 | + dai_drv, num_dai, true); | |
| 4125 | +} | |
| 4126 | +EXPORT_SYMBOL_GPL(snd_soc_register_component); | |
| 4127 | + | |
| 4128 | +/** | |
| 4129 | + * snd_soc_unregister_component - Unregister a component from the ASoC core | |
| 4130 | + * | |
| 4131 | + */ | |
| 4132 | +void snd_soc_unregister_component(struct device *dev) | |
| 4133 | +{ | |
| 4134 | + struct snd_soc_component *cmpnt; | |
| 4135 | + | |
| 4136 | + list_for_each_entry(cmpnt, &component_list, list) { | |
| 4137 | + if (dev == cmpnt->dev) | |
| 4138 | + goto found; | |
| 4139 | + } | |
| 4140 | + return; | |
| 4141 | + | |
| 4142 | +found: | |
| 4143 | + snd_soc_unregister_dais(dev, cmpnt->num_dai); | |
| 4144 | + | |
| 4145 | + mutex_lock(&client_mutex); | |
| 4146 | + list_del(&cmpnt->list); | |
| 4147 | + mutex_unlock(&client_mutex); | |
| 4148 | + | |
| 4149 | + dev_dbg(dev, "ASoC: Unregistered component '%s'\n", cmpnt->name); | |
| 4150 | + kfree(cmpnt->name); | |
| 4151 | +} | |
| 4152 | +EXPORT_SYMBOL_GPL(snd_soc_unregister_component); | |
| 4153 | + | |
| 4022 | 4154 | /** |
| 4023 | 4155 | * snd_soc_add_platform - Add a platform to the ASoC core |
| 4024 | 4156 | * @dev: The parent device for the platform |
| @@ -4165,7 +4297,6 @@ int snd_soc_register_codec(struct device *dev, · 140 unmodified lines | ||
| 4165 | 4297 | struct snd_soc_dai_driver *dai_drv, |
| 4166 | 4298 | int num_dai) |
| 4167 | 4299 | { |
| 4168 | − size_t reg_size; | |
| 4169 | 4300 | struct snd_soc_codec *codec; |
| 4170 | 4301 | int ret, i; |
| 4171 | 4302 | |
| @@ -4182,11 +4313,6 @@ int snd_soc_register_codec(struct device *dev, · 10 unmodified lines | ||
| 4182 | 4313 | goto fail_codec; |
| 4183 | 4314 | } |
| 4184 | 4315 | |
| 4185 | − if (codec_drv->compress_type) | |
| 4186 | − codec->compress_type = codec_drv->compress_type; | |
| 4187 | − else | |
| 4188 | − codec->compress_type = SND_SOC_FLAT_COMPRESSION; | |
| 4189 | − | |
| 4190 | 4316 | codec->write = codec_drv->write; |
| 4191 | 4317 | codec->read = codec_drv->read; |
| 4192 | 4318 | codec->volatile_register = codec_drv->volatile_register; |
| @@ -4203,35 +4329,6 @@ int snd_soc_register_codec(struct device *dev, · 10 unmodified lines | ||
| 4203 | 4329 | codec->num_dai = num_dai; |
| 4204 | 4330 | mutex_init(&codec->mutex); |
| 4205 | 4331 | |
| 4206 | − /* allocate CODEC register cache */ | |
| 4207 | − if (codec_drv->reg_cache_size && codec_drv->reg_word_size) { | |
| 4208 | − reg_size = codec_drv->reg_cache_size * codec_drv->reg_word_size; | |
| 4209 | − codec->reg_size = reg_size; | |
| 4210 | − /* it is necessary to make a copy of the default register cache | |
| 4211 | − * because in the case of using a compression type that requires | |
| 4212 | − * the default register cache to be marked as the | |
| 4213 | − * kernel might have freed the array by the time we initialize | |
| 4214 | − * the cache. | |
| 4215 | − */ | |
| 4216 | − if (codec_drv->reg_cache_default) { | |
| 4217 | − codec->reg_def_copy = kmemdup(codec_drv->reg_cache_default, | |
| 4218 | − reg_size, GFP_KERNEL); | |
| 4219 | − if (!codec->reg_def_copy) { | |
| 4220 | − ret = -ENOMEM; | |
| 4221 | − goto fail_codec_name; | |
| 4222 | − } | |
| 4223 | − } | |
| 4224 | − } | |
| 4225 | − | |
| 4226 | − if (codec_drv->reg_access_size && codec_drv->reg_access_default) { | |
| 4227 | − if (!codec->volatile_register) | |
| 4228 | − codec->volatile_register = snd_soc_default_volatile_register; | |
| 4229 | − if (!codec->readable_register) | |
| 4230 | − codec->readable_register = snd_soc_default_readable_register; | |
| 4231 | − if (!codec->writable_register) | |
| 4232 | − codec->writable_register = snd_soc_default_writable_register; | |
| 4233 | − } | |
| 4234 | − | |
| 4235 | 4332 | for (i = 0; i < num_dai; i++) { |
| 4236 | 4333 | fixup_codec_formats(&dai_drv[i].playback); |
| 4237 | 4334 | fixup_codec_formats(&dai_drv[i].capture); |
| @@ -4241,10 +4338,12 @@ int snd_soc_register_codec(struct device *dev, · 3 unmodified lines | ||
| 4241 | 4338 | list_add(&codec->list, &codec_list); |
| 4242 | 4339 | mutex_unlock(&client_mutex); |
| 4243 | 4340 | |
| 4244 | − /* register any DAIs */ | |
| 4245 | − ret = snd_soc_register_dais(dev, dai_drv, num_dai); | |
| 4341 | + /* register component */ | |
| 4342 | + ret = __snd_soc_register_component(dev, &codec->component, | |
| 4343 | + &codec_drv->component_driver, | |
| 4344 | + dai_drv, num_dai, false); | |
| 4246 | 4345 | if (ret < 0) { |
| 4247 | − dev_err(codec->dev, "ASoC: Failed to regster DAIs: %d\n", ret); | |
| 4346 | + dev_err(codec->dev, "ASoC: Failed to regster component: %d\n", ret); | |
| 4248 | 4347 | goto fail_codec_name; |
| 4249 | 4348 | } |
| 4250 | 4349 | |
| @@ -4279,7 +4378,7 @@ void snd_soc_unregister_codec(struct device *dev) · 28 unmodified lines | ||
| 4279 | 4378 | return; |
| 4280 | 4379 | |
| 4281 | 4380 | found: |
| 4282 | − snd_soc_unregister_dais(dev, codec->num_dai); | |
| 4381 | + snd_soc_unregister_component(dev); | |
| 4283 | 4382 | |
| 4284 | 4383 | mutex_lock(&client_mutex); |
| 4285 | 4384 | list_del(&codec->list); |
| @@ -4288,98 +4387,11 @@ found: · 2 unmodified lines | ||
| 4288 | 4387 | dev_dbg(codec->dev, "ASoC: Unregistered codec '%s'\n", codec->name); |
| 4289 | 4388 | |
| 4290 | 4389 | snd_soc_cache_exit(codec); |
| 4291 | − kfree(codec->reg_def_copy); | |
| 4292 | 4390 | kfree(codec->name); |
| 4293 | 4391 | kfree(codec); |
| 4294 | 4392 | } |
| 4295 | 4393 | EXPORT_SYMBOL_GPL(snd_soc_unregister_codec); |
| 4296 | 4394 | |
| 4297 | − | |
| 4298 | −/** | |
| 4299 | − * snd_soc_register_component - Register a component with the ASoC core | |
| 4300 | − * | |
| 4301 | − */ | |
| 4302 | −int snd_soc_register_component(struct device *dev, | |
| 4303 | − const struct snd_soc_component_driver *cmpnt_drv, | |
| 4304 | − struct snd_soc_dai_driver *dai_drv, | |
| 4305 | − int num_dai) | |
| 4306 | −{ | |
| 4307 | − struct snd_soc_component *cmpnt; | |
| 4308 | − int ret; | |
| 4309 | − | |
| 4310 | − dev_dbg(dev, "component register %s\n", dev_name(dev)); | |
| 4311 | − | |
| 4312 | − cmpnt = devm_kzalloc(dev, sizeof(*cmpnt), GFP_KERNEL); | |
| 4313 | − if (!cmpnt) { | |
| 4314 | − dev_err(dev, "ASoC: Failed to allocate memory\n"); | |
| 4315 | − return -ENOMEM; | |
| 4316 | − } | |
| 4317 | − | |
| 4318 | − cmpnt->name = fmt_single_name(dev, &cmpnt->id); | |
| 4319 | − if (!cmpnt->name) { | |
| 4320 | − dev_err(dev, "ASoC: Failed to simplifying name\n"); | |
| 4321 | − return -ENOMEM; | |
| 4322 | − } | |
| 4323 | − | |
| 4324 | − cmpnt->dev = dev; | |
| 4325 | − cmpnt->driver = cmpnt_drv; | |
| 4326 | − cmpnt->num_dai = num_dai; | |
| 4327 | − | |
| 4328 | − /* | |
| 4329 | − * snd_soc_register_dai() uses fmt_single_name(), and | |
| 4330 | − * snd_soc_register_dais() uses fmt_multiple_name() | |
| 4331 | − * for dai->name which is used for name based matching | |
| 4332 | − */ | |
| 4333 | − if (1 == num_dai) | |
| 4334 | − ret = snd_soc_register_dai(dev, dai_drv); | |
| 4335 | − else | |
| 4336 | − ret = snd_soc_register_dais(dev, dai_drv, num_dai); | |
| 4337 | − if (ret < 0) { | |
| 4338 | − dev_err(dev, "ASoC: Failed to regster DAIs: %d\n", ret); | |
| 4339 | − goto error_component_name; | |
| 4340 | − } | |
| 4341 | − | |
| 4342 | − mutex_lock(&client_mutex); | |
| 4343 | − list_add(&cmpnt->list, &component_list); | |
| 4344 | − mutex_unlock(&client_mutex); | |
| 4345 | − | |
| 4346 | − dev_dbg(cmpnt->dev, "ASoC: Registered component '%s'\n", cmpnt->name); | |
| 4347 | − | |
| 4348 | − return ret; | |
| 4349 | − | |
| 4350 | −error_component_name: | |
| 4351 | − kfree(cmpnt->name); | |
| 4352 | − | |
| 4353 | − return ret; | |
| 4354 | −} | |
| 4355 | −EXPORT_SYMBOL_GPL(snd_soc_register_component); | |
| 4356 | − | |
| 4357 | −/** | |
| 4358 | − * snd_soc_unregister_component - Unregister a component from the ASoC core | |
| 4359 | − * | |
| 4360 | − */ | |
| 4361 | −void snd_soc_unregister_component(struct device *dev) | |
| 4362 | −{ | |
| 4363 | − struct snd_soc_component *cmpnt; | |
| 4364 | − | |
| 4365 | − list_for_each_entry(cmpnt, &component_list, list) { | |
| 4366 | − if (dev == cmpnt->dev) | |
| 4367 | − goto found; | |
| 4368 | − } | |
| 4369 | − return; | |
| 4370 | − | |
| 4371 | −found: | |
| 4372 | − snd_soc_unregister_dais(dev, cmpnt->num_dai); | |
| 4373 | − | |
| 4374 | − mutex_lock(&client_mutex); | |
| 4375 | − list_del(&cmpnt->list); | |
| 4376 | − mutex_unlock(&client_mutex); | |
| 4377 | − | |
| 4378 | − dev_dbg(dev, "ASoC: Unregistered component '%s'\n", cmpnt->name); | |
| 4379 | − kfree(cmpnt->name); | |
| 4380 | −} | |
| 4381 | −EXPORT_SYMBOL_GPL(snd_soc_unregister_component); | |
| 4382 | − | |
| 4383 | 4395 | /* Retrieve a card's name from device tree */ |
| 4384 | 4396 | int snd_soc_of_parse_card_name(struct snd_soc_card *card, |
| 4385 | 4397 | const char *propname) |
| @@ -4567,6 +4579,60 @@ unsigned int snd_soc_of_parse_daifmt(struct device_node *np, · 181 unmodified lines | ||
| 4567 | 4579 | } |
| 4568 | 4580 | EXPORT_SYMBOL_GPL(snd_soc_of_parse_daifmt); |
| 4569 | 4581 | |
| 4582 | +int snd_soc_of_get_dai_name(struct device_node *of_node, | |
| 4583 | + const char **dai_name) | |
| 4584 | +{ | |
| 4585 | + struct snd_soc_component *pos; | |
| 4586 | + struct of_phandle_args args; | |
| 4587 | + int ret; | |
| 4588 | + | |
| 4589 | + ret = of_parse_phandle_with_args(of_node, "sound-dai", | |
| 4590 | + "#sound-dai-cells", 0, &args); | |
| 4591 | + if (ret) | |
| 4592 | + return ret; | |
| 4593 | + | |
| 4594 | + ret = -EPROBE_DEFER; | |
| 4595 | + | |
| 4596 | + mutex_lock(&client_mutex); | |
| 4597 | + list_for_each_entry(pos, &component_list, list) { | |
| 4598 | + if (pos->dev->of_node != args.np) | |
| 4599 | + continue; | |
| 4600 | + | |
| 4601 | + if (pos->driver->of_xlate_dai_name) { | |
| 4602 | + ret = pos->driver->of_xlate_dai_name(pos, &args, dai_name); | |
| 4603 | + } else { | |
| 4604 | + int id = -1; | |
| 4605 | + | |
| 4606 | + switch (args.args_count) { | |
| 4607 | + case 0: | |
| 4608 | + id = 0; /* same as dai_drv[0] */ | |
| 4609 | + break; | |
| 4610 | + case 1: | |
| 4611 | + id = args.args[0]; | |
| 4612 | + break; | |
| 4613 | + default: | |
| 4614 | + /* not supported */ | |
| 4615 | + break; | |
| 4616 | + } | |
| 4617 | + | |
| 4618 | + if (id < 0 || id >= pos->num_dai) { | |
| 4619 | + ret = -EINVAL; | |
| 4620 | + } else { | |
| 4621 | + *dai_name = pos->dai_drv[id].name; | |
| 4622 | + ret = 0; | |
| 4623 | + } | |
| 4624 | + } | |
| 4625 | + | |
| 4626 | + break; | |
| 4627 | + } | |
| 4628 | + mutex_unlock(&client_mutex); | |
| 4629 | + | |
| 4630 | + of_node_put(args.np); | |
| 4631 | + | |
| 4632 | + return ret; | |
| 4633 | +} | |
| 4634 | +EXPORT_SYMBOL_GPL(snd_soc_of_get_dai_name); | |
| 4635 | + | |
| 4570 | 4636 | static int __init snd_soc_init(void) |
| 4571 | 4637 | { |
| 4572 | 4638 | #ifdef CONFIG_DEBUG_FS |
| @@ -59,31 +59,31 @@ snd_soc_dapm_new_control(struct snd_soc_dapm_context *dapm, · 58 unmodified lines | ||
| 59 | 59 | /* dapm power sequences - make this per codec in the future */ |
| 60 | 60 | static int dapm_up_seq[] = { |
| 61 | 61 | [snd_soc_dapm_pre] = 0, |
| 62 | − [snd_soc_dapm_supply] = 1, | |
| 63 | 62 | [snd_soc_dapm_regulator_supply] = 1, |
| 64 | 63 | [snd_soc_dapm_clock_supply] = 1, |
| 65 | − [snd_soc_dapm_micbias] = 2, | |
| 64 | + [snd_soc_dapm_supply] = 2, | |
| 65 | + [snd_soc_dapm_micbias] = 3, | |
| 66 | 66 | [snd_soc_dapm_dai_link] = 2, |
| 67 | − [snd_soc_dapm_dai_in] = 3, | |
| 68 | − [snd_soc_dapm_dai_out] = 3, | |
| 69 | − [snd_soc_dapm_aif_in] = 3, | |
| 70 | − [snd_soc_dapm_aif_out] = 3, | |
| 71 | − [snd_soc_dapm_mic] = 4, | |
| 72 | − [snd_soc_dapm_mux] = 5, | |
| 73 | − [snd_soc_dapm_virt_mux] = 5, | |
| 74 | − [snd_soc_dapm_value_mux] = 5, | |
| 75 | − [snd_soc_dapm_dac] = 6, | |
| 76 | − [snd_soc_dapm_switch] = 7, | |
| 77 | − [snd_soc_dapm_mixer] = 7, | |
| 78 | − [snd_soc_dapm_mixer_named_ctl] = 7, | |
| 79 | − [snd_soc_dapm_pga] = 8, | |
| 80 | − [snd_soc_dapm_adc] = 9, | |
| 81 | − [snd_soc_dapm_out_drv] = 10, | |
| 82 | − [snd_soc_dapm_hp] = 10, | |
| 83 | − [snd_soc_dapm_spk] = 10, | |
| 84 | − [snd_soc_dapm_line] = 10, | |
| 85 | − [snd_soc_dapm_kcontrol] = 11, | |
| 86 | − [snd_soc_dapm_post] = 12, | |
| 67 | + [snd_soc_dapm_dai_in] = 4, | |
| 68 | + [snd_soc_dapm_dai_out] = 4, | |
| 69 | + [snd_soc_dapm_aif_in] = 4, | |
| 70 | + [snd_soc_dapm_aif_out] = 4, | |
| 71 | + [snd_soc_dapm_mic] = 5, | |
| 72 | + [snd_soc_dapm_mux] = 6, | |
| 73 | + [snd_soc_dapm_virt_mux] = 6, | |
| 74 | + [snd_soc_dapm_value_mux] = 6, | |
| 75 | + [snd_soc_dapm_dac] = 7, | |
| 76 | + [snd_soc_dapm_switch] = 8, | |
| 77 | + [snd_soc_dapm_mixer] = 8, | |
| 78 | + [snd_soc_dapm_mixer_named_ctl] = 8, | |
| 79 | + [snd_soc_dapm_pga] = 9, | |
| 80 | + [snd_soc_dapm_adc] = 10, | |
| 81 | + [snd_soc_dapm_out_drv] = 11, | |
| 82 | + [snd_soc_dapm_hp] = 11, | |
| 83 | + [snd_soc_dapm_spk] = 11, | |
| 84 | + [snd_soc_dapm_line] = 11, | |
| 85 | + [snd_soc_dapm_kcontrol] = 12, | |
| 86 | + [snd_soc_dapm_post] = 13, | |
| 87 | 87 | }; |
| 88 | 88 | |
| 89 | 89 | static int dapm_down_seq[] = { |
| @@ -109,10 +109,10 @@ static int dapm_down_seq[] = { · 19 unmodified lines | ||
| 109 | 109 | [snd_soc_dapm_dai_in] = 10, |
| 110 | 110 | [snd_soc_dapm_dai_out] = 10, |
| 111 | 111 | [snd_soc_dapm_dai_link] = 11, |
| 112 | − [snd_soc_dapm_clock_supply] = 12, | |
| 113 | − [snd_soc_dapm_regulator_supply] = 12, | |
| 114 | 112 | [snd_soc_dapm_supply] = 12, |
| 115 | − [snd_soc_dapm_post] = 13, | |
| 113 | + [snd_soc_dapm_clock_supply] = 13, | |
| 114 | + [snd_soc_dapm_regulator_supply] = 13, | |
| 115 | + [snd_soc_dapm_post] = 14, | |
| 116 | 116 | }; |
| 117 | 117 | |
| 118 | 118 | static void pop_wait(u32 pop_time) |
| @@ -409,6 +409,12 @@ static inline void soc_widget_unlock(struct snd_soc_dapm_widget *w) · 290 unmodified lines | ||
| 409 | 409 | mutex_unlock(&w->platform->mutex); |
| 410 | 410 | } |
| 411 | 411 | |
| 412 | +static void soc_dapm_async_complete(struct snd_soc_dapm_context *dapm) | |
| 413 | +{ | |
| 414 | + if (dapm->codec && dapm->codec->using_regmap) | |
| 415 | + regmap_async_complete(dapm->codec->control_data); | |
| 416 | +} | |
| 417 | + | |
| 412 | 418 | static int soc_widget_update_bits_locked(struct snd_soc_dapm_widget *w, |
| 413 | 419 | unsigned short reg, unsigned int mask, unsigned int value) |
| 414 | 420 | { |
| @@ -417,8 +423,9 @@ static int soc_widget_update_bits_locked(struct snd_soc_dapm_widget *w, · 2 unmodified lines | ||
| 417 | 423 | int ret; |
| 418 | 424 | |
| 419 | 425 | if (w->codec && w->codec->using_regmap) { |
| 420 | − ret = regmap_update_bits_check(w->codec->control_data, | |
| 421 | − reg, mask, value, &change); | |
| 426 | + ret = regmap_update_bits_check_async(w->codec->control_data, | |
| 427 | + reg, mask, value, | |
| 428 | + &change); | |
| 422 | 429 | if (ret != 0) |
| 423 | 430 | return ret; |
| 424 | 431 | } else { |
| @@ -499,18 +506,22 @@ static void dapm_set_path_status(struct snd_soc_dapm_widget *w, · 74 unmodified lines | ||
| 499 | 506 | int val; |
| 500 | 507 | struct soc_mixer_control *mc = (struct soc_mixer_control *) |
| 501 | 508 | w->kcontrol_news[i].private_value; |
| 502 | − unsigned int reg = mc->reg; | |
| 509 | + int reg = mc->reg; | |
| 503 | 510 | unsigned int shift = mc->shift; |
| 504 | 511 | int max = mc->max; |
| 505 | 512 | unsigned int mask = (1 << fls(max)) - 1; |
| 506 | 513 | unsigned int invert = mc->invert; |
| 507 | 514 | |
| 508 | − val = soc_widget_read(w, reg); | |
| 509 | − val = (val >> shift) & mask; | |
| 510 | − if (invert) | |
| 511 | − val = max - val; | |
| 515 | + if (reg != SND_SOC_NOPM) { | |
| 516 | + val = soc_widget_read(w, reg); | |
| 517 | + val = (val >> shift) & mask; | |
| 518 | + if (invert) | |
| 519 | + val = max - val; | |
| 520 | + p->connect = !!val; | |
| 521 | + } else { | |
| 522 | + p->connect = 0; | |
| 523 | + } | |
| 512 | 524 | |
| 513 | − p->connect = !!val; | |
| 514 | 525 | } |
| 515 | 526 | break; |
| 516 | 527 | case snd_soc_dapm_mux: { |
| @@ -1197,6 +1208,8 @@ int dapm_regulator_event(struct snd_soc_dapm_widget *w, · 680 unmodified lines | ||
| 1197 | 1208 | { |
| 1198 | 1209 | int ret; |
| 1199 | 1210 | |
| 1211 | + soc_dapm_async_complete(w->dapm); | |
| 1212 | + | |
| 1200 | 1213 | if (SND_SOC_DAPM_EVENT_ON(event)) { |
| 1201 | 1214 | if (w->on_val & SND_SOC_DAPM_REGULATOR_BYPASS) { |
| 1202 | 1215 | ret = regulator_allow_bypass(w->regulator, false); |
| @@ -1230,6 +1243,8 @@ int dapm_clock_event(struct snd_soc_dapm_widget *w, · 27 unmodified lines | ||
| 1230 | 1243 | if (!w->clk) |
| 1231 | 1244 | return -EIO; |
| 1232 | 1245 | |
| 1246 | + soc_dapm_async_complete(w->dapm); | |
| 1247 | + | |
| 1233 | 1248 | #ifdef CONFIG_HAVE_CLK |
| 1234 | 1249 | if (SND_SOC_DAPM_EVENT_ON(event)) { |
| 1235 | 1250 | return clk_prepare_enable(w->clk); |
| @@ -1412,7 +1427,7 @@ static void dapm_seq_check_event(struct snd_soc_card *card, · 176 unmodified lines | ||
| 1412 | 1427 | power = 0; |
| 1413 | 1428 | break; |
| 1414 | 1429 | default: |
| 1415 | − BUG(); | |
| 1430 | + WARN(1, "Unknown event %d\n", event); | |
| 1416 | 1431 | return; |
| 1417 | 1432 | } |
| 1418 | 1433 | |
| @@ -1422,6 +1437,7 @@ static void dapm_seq_check_event(struct snd_soc_card *card, · 3 unmodified lines | ||
| 1422 | 1437 | if (w->event && (w->event_flags & event)) { |
| 1423 | 1438 | pop_dbg(w->dapm->dev, card->pop_time, "pop test : %s %s\n", |
| 1424 | 1439 | w->name, ev_name); |
| 1440 | + soc_dapm_async_complete(w->dapm); | |
| 1425 | 1441 | trace_snd_soc_dapm_widget_event_start(w, event); |
| 1426 | 1442 | ret = w->event(w, NULL, event); |
| 1427 | 1443 | trace_snd_soc_dapm_widget_event_done(w, event); |
| @@ -1444,7 +1460,7 @@ static void dapm_seq_run_coalesced(struct snd_soc_card *card, · 16 unmodified lines | ||
| 1444 | 1460 | power_list)->reg; |
| 1445 | 1461 | |
| 1446 | 1462 | list_for_each_entry(w, pending, power_list) { |
| 1447 | − BUG_ON(reg != w->reg); | |
| 1463 | + WARN_ON(reg != w->reg); | |
| 1448 | 1464 | w->power = w->new_power; |
| 1449 | 1465 | |
| 1450 | 1466 | mask |= w->mask << w->shift; |
| @@ -1494,6 +1510,7 @@ static void dapm_seq_run(struct snd_soc_card *card, · 43 unmodified lines | ||
| 1494 | 1510 | struct list_head *list, int event, bool power_up) |
| 1495 | 1511 | { |
| 1496 | 1512 | struct snd_soc_dapm_widget *w, *n; |
| 1513 | + struct snd_soc_dapm_context *d; | |
| 1497 | 1514 | LIST_HEAD(pending); |
| 1498 | 1515 | int cur_sort = -1; |
| 1499 | 1516 | int cur_subseq = -1; |
| @@ -1524,6 +1541,9 @@ static void dapm_seq_run(struct snd_soc_card *card, · 24 unmodified lines | ||
| 1524 | 1541 | cur_subseq); |
| 1525 | 1542 | } |
| 1526 | 1543 | |
| 1544 | + if (cur_dapm && w->dapm != cur_dapm) | |
| 1545 | + soc_dapm_async_complete(cur_dapm); | |
| 1546 | + | |
| 1527 | 1547 | INIT_LIST_HEAD(&pending); |
| 1528 | 1548 | cur_sort = -1; |
| 1529 | 1549 | cur_subseq = INT_MIN; |
| @@ -1582,6 +1602,10 @@ static void dapm_seq_run(struct snd_soc_card *card, · 52 unmodified lines | ||
| 1582 | 1602 | cur_dapm->seq_notifier(cur_dapm, |
| 1583 | 1603 | i, cur_subseq); |
| 1584 | 1604 | } |
| 1605 | + | |
| 1606 | + list_for_each_entry(d, &card->dapm_list, list) { | |
| 1607 | + soc_dapm_async_complete(d); | |
| 1608 | + } | |
| 1585 | 1609 | } |
| 1586 | 1610 | |
| 1587 | 1611 | static void dapm_widget_update(struct snd_soc_card *card) |
| @@ -1840,6 +1864,7 @@ static int dapm_power_widgets(struct snd_soc_card *card, int event) · 252 unmodified lines | ||
| 1840 | 1864 | */ |
| 1841 | 1865 | switch (w->id) { |
| 1842 | 1866 | case snd_soc_dapm_siggen: |
| 1867 | + case snd_soc_dapm_vmid: | |
| 1843 | 1868 | break; |
| 1844 | 1869 | case snd_soc_dapm_supply: |
| 1845 | 1870 | case snd_soc_dapm_regulator_supply: |
| @@ -2001,7 +2026,7 @@ static ssize_t dapm_bias_read_file(struct file *file, char __user *user_buf, · 155 unmodified lines | ||
| 2001 | 2026 | level = "Off\n"; |
| 2002 | 2027 | break; |
| 2003 | 2028 | default: |
| 2004 | − BUG(); | |
| 2029 | + WARN(1, "Unknown bias_level %d\n", dapm->bias_level); | |
| 2005 | 2030 | level = "Unknown\n"; |
| 2006 | 2031 | break; |
| 2007 | 2032 | } |
| @@ -2791,7 +2816,7 @@ int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, · 783 unmodified lines | ||
| 2791 | 2816 | struct snd_soc_card *card = codec->card; |
| 2792 | 2817 | struct soc_mixer_control *mc = |
| 2793 | 2818 | (struct soc_mixer_control *)kcontrol->private_value; |
| 2794 | − unsigned int reg = mc->reg; | |
| 2819 | + int reg = mc->reg; | |
| 2795 | 2820 | unsigned int shift = mc->shift; |
| 2796 | 2821 | int max = mc->max; |
| 2797 | 2822 | unsigned int mask = (1 << fls(max)) - 1; |
| @@ -2804,7 +2829,7 @@ int snd_soc_dapm_get_volsw(struct snd_kcontrol *kcontrol, · 6 unmodified lines | ||
| 2804 | 2829 | kcontrol->id.name); |
| 2805 | 2830 | |
| 2806 | 2831 | mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); |
| 2807 | − if (dapm_kcontrol_is_powered(kcontrol)) | |
| 2832 | + if (dapm_kcontrol_is_powered(kcontrol) && reg != SND_SOC_NOPM) | |
| 2808 | 2833 | val = (snd_soc_read(codec, reg) >> shift) & mask; |
| 2809 | 2834 | else |
| 2810 | 2835 | val = dapm_kcontrol_get_value(kcontrol); |
| @@ -2835,7 +2860,7 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, · 24 unmodified lines | ||
| 2835 | 2860 | struct snd_soc_card *card = codec->card; |
| 2836 | 2861 | struct soc_mixer_control *mc = |
| 2837 | 2862 | (struct soc_mixer_control *)kcontrol->private_value; |
| 2838 | − unsigned int reg = mc->reg; | |
| 2863 | + int reg = mc->reg; | |
| 2839 | 2864 | unsigned int shift = mc->shift; |
| 2840 | 2865 | int max = mc->max; |
| 2841 | 2866 | unsigned int mask = (1 << fls(max)) - 1; |
| @@ -2857,19 +2882,24 @@ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, · 15 unmodified lines | ||
| 2857 | 2882 | |
| 2858 | 2883 | mutex_lock_nested(&card->dapm_mutex, SND_SOC_DAPM_CLASS_RUNTIME); |
| 2859 | 2884 | |
| 2860 | − dapm_kcontrol_set_value(kcontrol, val); | |
| 2885 | + change = dapm_kcontrol_set_value(kcontrol, val); | |
| 2861 | 2886 | |
| 2862 | − mask = mask << shift; | |
| 2863 | − val = val << shift; | |
| 2887 | + if (reg != SND_SOC_NOPM) { | |
| 2888 | + mask = mask << shift; | |
| 2889 | + val = val << shift; | |
| 2890 | + | |
| 2891 | + change = snd_soc_test_bits(codec, reg, mask, val); | |
| 2892 | + } | |
| 2864 | 2893 | |
| 2865 | − change = snd_soc_test_bits(codec, reg, mask, val); | |
| 2866 | 2894 | if (change) { |
| 2867 | − update.kcontrol = kcontrol; | |
| 2868 | − update.reg = reg; | |
| 2869 | − update.mask = mask; | |
| 2870 | − update.val = val; | |
| 2895 | + if (reg != SND_SOC_NOPM) { | |
| 2896 | + update.kcontrol = kcontrol; | |
| 2897 | + update.reg = reg; | |
| 2898 | + update.mask = mask; | |
| 2899 | + update.val = val; | |
| 2871 | 2900 | |
| 2872 | − card->update = &update; | |
| 2901 | + card->update = &update; | |
| 2902 | + } | |
| 2873 | 2903 | |
| 2874 | 2904 | soc_dapm_mixer_update_power(card, kcontrol, connect); |
| 2875 | 2905 | |
| @@ -3329,8 +3359,9 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w, · 453 unmodified lines | ||
| 3329 | 3359 | u64 fmt; |
| 3330 | 3360 | int ret; |
| 3331 | 3361 | |
| 3332 | − BUG_ON(!config); | |
| 3333 | − BUG_ON(list_empty(&w->sources) || list_empty(&w->sinks)); | |
| 3362 | + if (WARN_ON(!config) || | |
| 3363 | + WARN_ON(list_empty(&w->sources) || list_empty(&w->sinks))) | |
| 3364 | + return -EINVAL; | |
| 3334 | 3365 | |
| 3335 | 3366 | /* We only support a single source and sink, pick the first */ |
| 3336 | 3367 | source_p = list_first_entry(&w->sources, struct snd_soc_dapm_path, |
| @@ -3338,9 +3369,10 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w, · 1 unmodified line | ||
| 3338 | 3369 | sink_p = list_first_entry(&w->sinks, struct snd_soc_dapm_path, |
| 3339 | 3370 | list_source); |
| 3340 | 3371 | |
| 3341 | − BUG_ON(!source_p || !sink_p); | |
| 3342 | − BUG_ON(!sink_p->source || !source_p->sink); | |
| 3343 | − BUG_ON(!source_p->source || !sink_p->sink); | |
| 3372 | + if (WARN_ON(!source_p || !sink_p) || | |
| 3373 | + WARN_ON(!sink_p->source || !source_p->sink) || | |
| 3374 | + WARN_ON(!source_p->source || !sink_p->sink)) | |
| 3375 | + return -EINVAL; | |
| 3344 | 3376 | |
| 3345 | 3377 | source = source_p->source->priv; |
| 3346 | 3378 | sink = sink_p->sink->priv; |
| @@ -3416,7 +3448,7 @@ static int snd_soc_dai_link_event(struct snd_soc_dapm_widget *w, · 69 unmodified lines | ||
| 3416 | 3448 | break; |
| 3417 | 3449 | |
| 3418 | 3450 | default: |
| 3419 | − BUG(); | |
| 3451 | + WARN(1, "Unknown event %d\n", event); | |
| 3420 | 3452 | return -EINVAL; |
| 3421 | 3453 | } |
| 3422 | 3454 | |
| @@ -0,0 +1,86 @@ | ||
| 1 | +/* | |
| 2 | + * soc-devres.c -- ALSA SoC Audio Layer devres functions | |
| 3 | + * | |
| 4 | + * Copyright (C) 2013 Linaro Ltd | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify it | |
| 7 | + * under the terms of the GNU General Public License as published by the | |
| 8 | + * Free Software Foundation; either version 2 of the License, or (at your | |
| 9 | + * option) any later version. | |
| 10 | + */ | |
| 11 | + | |
| 12 | +#include <linux/module.h> | |
| 13 | +#include <linux/moduleparam.h> | |
| 14 | +#include <sound/soc.h> | |
| 15 | + | |
| 16 | +static void devm_component_release(struct device *dev, void *res) | |
| 17 | +{ | |
| 18 | + snd_soc_unregister_component(*(struct device **)res); | |
| 19 | +} | |
| 20 | + | |
| 21 | +/** | |
| 22 | + * devm_snd_soc_register_component - resource managed component registration | |
| 23 | + * @dev: Device used to manage component | |
| 24 | + * @cmpnt_drv: Component driver | |
| 25 | + * @dai_drv: DAI driver | |
| 26 | + * @num_dai: Number of DAIs to register | |
| 27 | + * | |
| 28 | + * Register a component with automatic unregistration when the device is | |
| 29 | + * unregistered. | |
| 30 | + */ | |
| 31 | +int devm_snd_soc_register_component(struct device *dev, | |
| 32 | + const struct snd_soc_component_driver *cmpnt_drv, | |
| 33 | + struct snd_soc_dai_driver *dai_drv, int num_dai) | |
| 34 | +{ | |
| 35 | + struct device **ptr; | |
| 36 | + int ret; | |
| 37 | + | |
| 38 | + ptr = devres_alloc(devm_component_release, sizeof(*ptr), GFP_KERNEL); | |
| 39 | + if (!ptr) | |
| 40 | + return -ENOMEM; | |
| 41 | + | |
| 42 | + ret = snd_soc_register_component(dev, cmpnt_drv, dai_drv, num_dai); | |
| 43 | + if (ret == 0) { | |
| 44 | + *ptr = dev; | |
| 45 | + devres_add(dev, ptr); | |
| 46 | + } else { | |
| 47 | + devres_free(ptr); | |
| 48 | + } | |
| 49 | + | |
| 50 | + return ret; | |
| 51 | +} | |
| 52 | +EXPORT_SYMBOL_GPL(devm_snd_soc_register_component); | |
| 53 | + | |
| 54 | +static void devm_card_release(struct device *dev, void *res) | |
| 55 | +{ | |
| 56 | + snd_soc_unregister_card(*(struct snd_soc_card **)res); | |
| 57 | +} | |
| 58 | + | |
| 59 | +/** | |
| 60 | + * devm_snd_soc_register_card - resource managed card registration | |
| 61 | + * @dev: Device used to manage card | |
| 62 | + * @card: Card to register | |
| 63 | + * | |
| 64 | + * Register a card with automatic unregistration when the device is | |
| 65 | + * unregistered. | |
| 66 | + */ | |
| 67 | +int devm_snd_soc_register_card(struct device *dev, struct snd_soc_card *card) | |
| 68 | +{ | |
| 69 | + struct device **ptr; | |
| 70 | + int ret; | |
| 71 | + | |
| 72 | + ptr = devres_alloc(devm_card_release, sizeof(*ptr), GFP_KERNEL); | |
| 73 | + if (!ptr) | |
| 74 | + return -ENOMEM; | |
| 75 | + | |
| 76 | + ret = snd_soc_register_card(card); | |
| 77 | + if (ret == 0) { | |
| 78 | + *ptr = dev; | |
| 79 | + devres_add(dev, ptr); | |
| 80 | + } else { | |
| 81 | + devres_free(ptr); | |
| 82 | + } | |
| 83 | + | |
| 84 | + return ret; | |
| 85 | +} | |
| 86 | +EXPORT_SYMBOL_GPL(devm_snd_soc_register_card); | |
| @@ -25,7 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <sound/dmaengine_pcm.h> |
| 26 | 26 | |
| 27 | 27 | struct dmaengine_pcm { |
| 28 | − struct dma_chan *chan[SNDRV_PCM_STREAM_CAPTURE + 1]; | |
| 28 | + struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1]; | |
| 29 | 29 | const struct snd_dmaengine_pcm_config *config; |
| 30 | 30 | struct snd_soc_platform platform; |
| 31 | 31 | unsigned int flags; |
| @@ -36,6 +36,15 @@ static struct dmaengine_pcm *soc_platform_to_pcm(struct snd_soc_platform *p) · 4 unmodified lines | ||
| 36 | 36 | return container_of(p, struct dmaengine_pcm, platform); |
| 37 | 37 | } |
| 38 | 38 | |
| 39 | +static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, | |
| 40 | + struct snd_pcm_substream *substream) | |
| 41 | +{ | |
| 42 | + if (!pcm->chan[substream->stream]) | |
| 43 | + return NULL; | |
| 44 | + | |
| 45 | + return pcm->chan[substream->stream]->device->dev; | |
| 46 | +} | |
| 47 | + | |
| 39 | 48 | /** |
| 40 | 49 | * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback |
| 41 | 50 | * @substream: PCM substream |
| @@ -75,12 +84,21 @@ static int dmaengine_pcm_hw_params(struct snd_pcm_substream *substream, · 33 unmodified lines | ||
| 75 | 84 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 76 | 85 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); |
| 77 | 86 | struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); |
| 87 | + int (*prepare_slave_config)(struct snd_pcm_substream *substream, | |
| 88 | + struct snd_pcm_hw_params *params, | |
| 89 | + struct dma_slave_config *slave_config); | |
| 78 | 90 | struct dma_slave_config slave_config; |
| 79 | 91 | int ret; |
| 80 | 92 | |
| 81 | − if (pcm->config->prepare_slave_config) { | |
| 82 | − ret = pcm->config->prepare_slave_config(substream, params, | |
| 83 | − &slave_config); | |
| 93 | + memset(&slave_config, 0, sizeof(slave_config)); | |
| 94 | + | |
| 95 | + if (!pcm->config) | |
| 96 | + prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config; | |
| 97 | + else | |
| 98 | + prepare_slave_config = pcm->config->prepare_slave_config; | |
| 99 | + | |
| 100 | + if (prepare_slave_config) { | |
| 101 | + ret = prepare_slave_config(substream, params, &slave_config); | |
| 84 | 102 | if (ret) |
| 85 | 103 | return ret; |
| 86 | 104 | |
| @@ -92,28 +110,54 @@ static int dmaengine_pcm_hw_params(struct snd_pcm_substream *substream, · 5 unmodified lines | ||
| 92 | 110 | return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); |
| 93 | 111 | } |
| 94 | 112 | |
| 95 | −static int dmaengine_pcm_open(struct snd_pcm_substream *substream) | |
| 113 | +static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substream) | |
| 96 | 114 | { |
| 97 | 115 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 98 | 116 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); |
| 117 | + struct device *dma_dev = dmaengine_dma_dev(pcm, substream); | |
| 99 | 118 | struct dma_chan *chan = pcm->chan[substream->stream]; |
| 119 | + struct snd_dmaengine_dai_dma_data *dma_data; | |
| 120 | + struct dma_slave_caps dma_caps; | |
| 121 | + struct snd_pcm_hardware hw; | |
| 100 | 122 | int ret; |
| 101 | 123 | |
| 102 | − ret = snd_soc_set_runtime_hwparams(substream, | |
| 124 | + if (pcm->config && pcm->config->pcm_hardware) | |
| 125 | + return snd_soc_set_runtime_hwparams(substream, | |
| 103 | 126 | pcm->config->pcm_hardware); |
| 104 | − if (ret) | |
| 105 | − return ret; | |
| 106 | 127 | |
| 107 | − return snd_dmaengine_pcm_open(substream, chan); | |
| 128 | + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | |
| 129 | + | |
| 130 | + memset(&hw, 0, sizeof(hw)); | |
| 131 | + hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | | |
| 132 | + SNDRV_PCM_INFO_INTERLEAVED; | |
| 133 | + hw.periods_min = 2; | |
| 134 | + hw.periods_max = UINT_MAX; | |
| 135 | + hw.period_bytes_min = 256; | |
| 136 | + hw.period_bytes_max = dma_get_max_seg_size(dma_dev); | |
| 137 | + hw.buffer_bytes_max = SIZE_MAX; | |
| 138 | + hw.fifo_size = dma_data->fifo_size; | |
| 139 | + | |
| 140 | + ret = dma_get_slave_caps(chan, &dma_caps); | |
| 141 | + if (ret == 0) { | |
| 142 | + if (dma_caps.cmd_pause) | |
| 143 | + hw.info |= SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME; | |
| 144 | + } | |
| 145 | + | |
| 146 | + return snd_soc_set_runtime_hwparams(substream, &hw); | |
| 108 | 147 | } |
| 109 | 148 | |
| 110 | −static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm, | |
| 111 | − struct snd_pcm_substream *substream) | |
| 149 | +static int dmaengine_pcm_open(struct snd_pcm_substream *substream) | |
| 112 | 150 | { |
| 113 | − if (!pcm->chan[substream->stream]) | |
| 114 | − return NULL; | |
| 151 | + struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
| 152 | + struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); | |
| 153 | + struct dma_chan *chan = pcm->chan[substream->stream]; | |
| 154 | + int ret; | |
| 115 | 155 | |
| 116 | − return pcm->chan[substream->stream]->device->dev; | |
| 156 | + ret = dmaengine_pcm_set_runtime_hwparams(substream); | |
| 157 | + if (ret) | |
| 158 | + return ret; | |
| 159 | + | |
| 160 | + return snd_dmaengine_pcm_open(substream, chan); | |
| 117 | 161 | } |
| 118 | 162 | |
| 119 | 163 | static void dmaengine_pcm_free(struct snd_pcm *pcm) |
| @@ -126,6 +170,9 @@ static struct dma_chan *dmaengine_pcm_compat_request_channel( · 6 unmodified lines | ||
| 126 | 170 | struct snd_pcm_substream *substream) |
| 127 | 171 | { |
| 128 | 172 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); |
| 173 | + struct snd_dmaengine_dai_dma_data *dma_data; | |
| 174 | + | |
| 175 | + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | |
| 129 | 176 | |
| 130 | 177 | if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0]) |
| 131 | 178 | return pcm->chan[0]; |
| @@ -134,22 +181,42 @@ static struct dma_chan *dmaengine_pcm_compat_request_channel( · 2 unmodified lines | ||
| 134 | 181 | return pcm->config->compat_request_channel(rtd, substream); |
| 135 | 182 | |
| 136 | 183 | return snd_dmaengine_pcm_request_channel(pcm->config->compat_filter_fn, |
| 137 | − snd_soc_dai_get_dma_data(rtd->cpu_dai, substream)); | |
| 184 | + dma_data->filter_data); | |
| 138 | 185 | } |
| 139 | 186 | |
| 140 | 187 | static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) |
| 141 | 188 | { |
| 142 | 189 | struct dmaengine_pcm *pcm = soc_platform_to_pcm(rtd->platform); |
| 143 | 190 | const struct snd_dmaengine_pcm_config *config = pcm->config; |
| 191 | + struct device *dev = rtd->platform->dev; | |
| 192 | + struct snd_dmaengine_dai_dma_data *dma_data; | |
| 144 | 193 | struct snd_pcm_substream *substream; |
| 194 | + size_t prealloc_buffer_size; | |
| 195 | + size_t max_buffer_size; | |
| 145 | 196 | unsigned int i; |
| 146 | 197 | int ret; |
| 147 | 198 | |
| 199 | + if (config && config->prealloc_buffer_size) { | |
| 200 | + prealloc_buffer_size = config->prealloc_buffer_size; | |
| 201 | + max_buffer_size = config->pcm_hardware->buffer_bytes_max; | |
| 202 | + } else { | |
| 203 | + prealloc_buffer_size = 512 * 1024; | |
| 204 | + max_buffer_size = SIZE_MAX; | |
| 205 | + } | |
| 206 | + | |
| 207 | + | |
| 148 | 208 | for (i = SNDRV_PCM_STREAM_PLAYBACK; i <= SNDRV_PCM_STREAM_CAPTURE; i++) { |
| 149 | 209 | substream = rtd->pcm->streams[i].substream; |
| 150 | 210 | if (!substream) |
| 151 | 211 | continue; |
| 152 | 212 | |
| 213 | + dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream); | |
| 214 | + | |
| 215 | + if (!pcm->chan[i] && | |
| 216 | + (pcm->flags & SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) | |
| 217 | + pcm->chan[i] = dma_request_slave_channel(dev, | |
| 218 | + dma_data->chan_name); | |
| 219 | + | |
| 153 | 220 | if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) { |
| 154 | 221 | pcm->chan[i] = dmaengine_pcm_compat_request_channel(rtd, |
| 155 | 222 | substream); |
| @@ -163,10 +230,10 @@ static int dmaengine_pcm_new(struct snd_soc_pcm_runtime *rtd) · 7 unmodified lines | ||
| 163 | 230 | } |
| 164 | 231 | |
| 165 | 232 | ret = snd_pcm_lib_preallocate_pages(substream, |
| 166 | − SNDRV_DMA_TYPE_DEV, | |
| 233 | + SNDRV_DMA_TYPE_DEV_IRAM, | |
| 167 | 234 | dmaengine_dma_dev(pcm, substream), |
| 168 | − config->prealloc_buffer_size, | |
| 169 | − config->pcm_hardware->buffer_bytes_max); | |
| 235 | + prealloc_buffer_size, | |
| 236 | + max_buffer_size); | |
| 170 | 237 | if (ret) |
| 171 | 238 | goto err_free; |
| 172 | 239 | } |
| @@ -222,7 +289,9 @@ static void dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm, · 49 unmodified lines | ||
| 222 | 289 | { |
| 223 | 290 | unsigned int i; |
| 224 | 291 | |
| 225 | − if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || !dev->of_node) | |
| 292 | + if ((pcm->flags & (SND_DMAENGINE_PCM_FLAG_NO_DT | | |
| 293 | + SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME)) || | |
| 294 | + !dev->of_node) | |
| 226 | 295 | return; |
| 227 | 296 | |
| 228 | 297 | if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) { |
| @@ -65,31 +65,6 @@ static unsigned int hw_read(struct snd_soc_codec *codec, unsigned int reg) · 64 unmodified lines | ||
| 65 | 65 | return val; |
| 66 | 66 | } |
| 67 | 67 | |
| 68 | −/* Primitive bulk write support for soc-cache. The data pointed to by | |
| 69 | − * `data' needs to already be in the form the hardware expects. Any | |
| 70 | − * data written through this function will not go through the cache as | |
| 71 | − * it only handles writing to volatile or out of bounds registers. | |
| 72 | − * | |
| 73 | − * This is currently only supported for devices using the regmap API | |
| 74 | − * wrappers. | |
| 75 | − */ | |
| 76 | −static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, | |
| 77 | − unsigned int reg, | |
| 78 | − const void *data, size_t len) | |
| 79 | −{ | |
| 80 | − /* To ensure that we don't get out of sync with the cache, check | |
| 81 | − * whether the base register is volatile or if we've directly asked | |
| 82 | − * to bypass the cache. Out of bounds registers are considered | |
| 83 | − * volatile. | |
| 84 | − */ | |
| 85 | − if (!codec->cache_bypass | |
| 86 | − && !snd_soc_codec_volatile_register(codec, reg) | |
| 87 | − && reg < codec->driver->reg_cache_size) | |
| 88 | − return -EINVAL; | |
| 89 | − | |
| 90 | − return regmap_raw_write(codec->control_data, reg, data, len); | |
| 91 | −} | |
| 92 | − | |
| 93 | 68 | /** |
| 94 | 69 | * snd_soc_codec_set_cache_io: Set up standard I/O functions. |
| 95 | 70 | * |
| @@ -119,7 +94,6 @@ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, · 23 unmodified lines | ||
| 119 | 94 | memset(&config, 0, sizeof(config)); |
| 120 | 95 | codec->write = hw_write; |
| 121 | 96 | codec->read = hw_read; |
| 122 | − codec->bulk_write_raw = snd_soc_hw_bulk_write_raw; | |
| 123 | 97 | |
| 124 | 98 | config.reg_bits = addr_bits; |
| 125 | 99 | config.val_bits = data_bits; |
| @@ -65,6 +65,7 @@ void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask) · 64 unmodified lines | ||
| 65 | 65 | struct snd_soc_codec *codec; |
| 66 | 66 | struct snd_soc_dapm_context *dapm; |
| 67 | 67 | struct snd_soc_jack_pin *pin; |
| 68 | + unsigned int sync = 0; | |
| 68 | 69 | int enable; |
| 69 | 70 | |
| 70 | 71 | trace_snd_soc_jack_report(jack, mask, status); |
| @@ -92,12 +93,16 @@ void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask) · 21 unmodified lines | ||
| 92 | 93 | snd_soc_dapm_enable_pin(dapm, pin->pin); |
| 93 | 94 | else |
| 94 | 95 | snd_soc_dapm_disable_pin(dapm, pin->pin); |
| 96 | + | |
| 97 | + /* we need to sync for this case only */ | |
| 98 | + sync = 1; | |
| 95 | 99 | } |
| 96 | 100 | |
| 97 | 101 | /* Report before the DAPM sync to help users updating micbias status */ |
| 98 | 102 | blocking_notifier_call_chain(&jack->notifier, jack->status, jack); |
| 99 | 103 | |
| 100 | − snd_soc_dapm_sync(dapm); | |
| 104 | + if (sync) | |
| 105 | + snd_soc_dapm_sync(dapm); | |
| 101 | 106 | |
| 102 | 107 | snd_jack_report(jack->jack, jack->status); |
| 103 | 108 | |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/kernel.h> |
| 20 | 20 | #include <linux/init.h> |
| 21 | 21 | #include <linux/delay.h> |
| 22 | +#include <linux/pinctrl/consumer.h> | |
| 22 | 23 | #include <linux/pm_runtime.h> |
| 23 | 24 | #include <linux/slab.h> |
| 24 | 25 | #include <linux/workqueue.h> |
| @@ -183,6 +184,8 @@ static int soc_pcm_open(struct snd_pcm_substream *substream) · 158 unmodified lines | ||
| 183 | 184 | struct snd_soc_dai_driver *codec_dai_drv = codec_dai->driver; |
| 184 | 185 | int ret = 0; |
| 185 | 186 | |
| 187 | + pinctrl_pm_select_default_state(cpu_dai->dev); | |
| 188 | + pinctrl_pm_select_default_state(codec_dai->dev); | |
| 186 | 189 | pm_runtime_get_sync(cpu_dai->dev); |
| 187 | 190 | pm_runtime_get_sync(codec_dai->dev); |
| 188 | 191 | pm_runtime_get_sync(platform->dev); |
| @@ -190,7 +193,7 @@ static int soc_pcm_open(struct snd_pcm_substream *substream) · 1 unmodified line | ||
| 190 | 193 | mutex_lock_nested(&rtd->pcm_mutex, rtd->pcm_subclass); |
| 191 | 194 | |
| 192 | 195 | /* startup the audio subsystem */ |
| 193 | − if (cpu_dai->driver->ops->startup) { | |
| 196 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->startup) { | |
| 194 | 197 | ret = cpu_dai->driver->ops->startup(substream, cpu_dai); |
| 195 | 198 | if (ret < 0) { |
| 196 | 199 | dev_err(cpu_dai->dev, "ASoC: can't open interface" |
| @@ -208,7 +211,7 @@ static int soc_pcm_open(struct snd_pcm_substream *substream) · 11 unmodified lines | ||
| 208 | 211 | } |
| 209 | 212 | } |
| 210 | 213 | |
| 211 | − if (codec_dai->driver->ops->startup) { | |
| 214 | + if (codec_dai->driver->ops && codec_dai->driver->ops->startup) { | |
| 212 | 215 | ret = codec_dai->driver->ops->startup(substream, codec_dai); |
| 213 | 216 | if (ret < 0) { |
| 214 | 217 | dev_err(codec_dai->dev, "ASoC: can't open codec" |
| @@ -317,6 +320,10 @@ out: · 102 unmodified lines | ||
| 317 | 320 | pm_runtime_put(platform->dev); |
| 318 | 321 | pm_runtime_put(codec_dai->dev); |
| 319 | 322 | pm_runtime_put(cpu_dai->dev); |
| 323 | + if (!codec_dai->active) | |
| 324 | + pinctrl_pm_select_sleep_state(codec_dai->dev); | |
| 325 | + if (!cpu_dai->active) | |
| 326 | + pinctrl_pm_select_sleep_state(cpu_dai->dev); | |
| 320 | 327 | |
| 321 | 328 | return ret; |
| 322 | 329 | } |
| @@ -426,6 +433,10 @@ static int soc_pcm_close(struct snd_pcm_substream *substream) · 103 unmodified lines | ||
| 426 | 433 | pm_runtime_put(platform->dev); |
| 427 | 434 | pm_runtime_put(codec_dai->dev); |
| 428 | 435 | pm_runtime_put(cpu_dai->dev); |
| 436 | + if (!codec_dai->active) | |
| 437 | + pinctrl_pm_select_sleep_state(codec_dai->dev); | |
| 438 | + if (!cpu_dai->active) | |
| 439 | + pinctrl_pm_select_sleep_state(cpu_dai->dev); | |
| 429 | 440 | |
| 430 | 441 | return 0; |
| 431 | 442 | } |
| @@ -463,7 +474,7 @@ static int soc_pcm_prepare(struct snd_pcm_substream *substream) · 31 unmodified lines | ||
| 463 | 474 | } |
| 464 | 475 | } |
| 465 | 476 | |
| 466 | − if (codec_dai->driver->ops->prepare) { | |
| 477 | + if (codec_dai->driver->ops && codec_dai->driver->ops->prepare) { | |
| 467 | 478 | ret = codec_dai->driver->ops->prepare(substream, codec_dai); |
| 468 | 479 | if (ret < 0) { |
| 469 | 480 | dev_err(codec_dai->dev, "ASoC: DAI prepare error: %d\n", |
| @@ -472,7 +483,7 @@ static int soc_pcm_prepare(struct snd_pcm_substream *substream) · 2 unmodified lines | ||
| 472 | 483 | } |
| 473 | 484 | } |
| 474 | 485 | |
| 475 | − if (cpu_dai->driver->ops->prepare) { | |
| 486 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->prepare) { | |
| 476 | 487 | ret = cpu_dai->driver->ops->prepare(substream, cpu_dai); |
| 477 | 488 | if (ret < 0) { |
| 478 | 489 | dev_err(cpu_dai->dev, "ASoC: DAI prepare error: %d\n", |
| @@ -523,7 +534,7 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, · 44 unmodified lines | ||
| 523 | 534 | } |
| 524 | 535 | } |
| 525 | 536 | |
| 526 | − if (codec_dai->driver->ops->hw_params) { | |
| 537 | + if (codec_dai->driver->ops && codec_dai->driver->ops->hw_params) { | |
| 527 | 538 | ret = codec_dai->driver->ops->hw_params(substream, params, codec_dai); |
| 528 | 539 | if (ret < 0) { |
| 529 | 540 | dev_err(codec_dai->dev, "ASoC: can't set %s hw params:" |
| @@ -532,7 +543,7 @@ static int soc_pcm_hw_params(struct snd_pcm_substream *substream, · 2 unmodified lines | ||
| 532 | 543 | } |
| 533 | 544 | } |
| 534 | 545 | |
| 535 | − if (cpu_dai->driver->ops->hw_params) { | |
| 546 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->hw_params) { | |
| 536 | 547 | ret = cpu_dai->driver->ops->hw_params(substream, params, cpu_dai); |
| 537 | 548 | if (ret < 0) { |
| 538 | 549 | dev_err(cpu_dai->dev, "ASoC: %s hw params failed: %d\n", |
| @@ -559,11 +570,11 @@ out: · 20 unmodified lines | ||
| 559 | 570 | return ret; |
| 560 | 571 | |
| 561 | 572 | platform_err: |
| 562 | − if (cpu_dai->driver->ops->hw_free) | |
| 573 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->hw_free) | |
| 563 | 574 | cpu_dai->driver->ops->hw_free(substream, cpu_dai); |
| 564 | 575 | |
| 565 | 576 | interface_err: |
| 566 | − if (codec_dai->driver->ops->hw_free) | |
| 577 | + if (codec_dai->driver->ops && codec_dai->driver->ops->hw_free) | |
| 567 | 578 | codec_dai->driver->ops->hw_free(substream, codec_dai); |
| 568 | 579 | |
| 569 | 580 | codec_err: |
| @@ -600,10 +611,10 @@ static int soc_pcm_hw_free(struct snd_pcm_substream *substream) · 30 unmodified lines | ||
| 600 | 611 | platform->driver->ops->hw_free(substream); |
| 601 | 612 | |
| 602 | 613 | /* now free hw params for the DAIs */ |
| 603 | − if (codec_dai->driver->ops->hw_free) | |
| 614 | + if (codec_dai->driver->ops && codec_dai->driver->ops->hw_free) | |
| 604 | 615 | codec_dai->driver->ops->hw_free(substream, codec_dai); |
| 605 | 616 | |
| 606 | − if (cpu_dai->driver->ops->hw_free) | |
| 617 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->hw_free) | |
| 607 | 618 | cpu_dai->driver->ops->hw_free(substream, cpu_dai); |
| 608 | 619 | |
| 609 | 620 | mutex_unlock(&rtd->pcm_mutex); |
| @@ -618,7 +629,7 @@ static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd) · 8 unmodified lines | ||
| 618 | 629 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 619 | 630 | int ret; |
| 620 | 631 | |
| 621 | − if (codec_dai->driver->ops->trigger) { | |
| 632 | + if (codec_dai->driver->ops && codec_dai->driver->ops->trigger) { | |
| 622 | 633 | ret = codec_dai->driver->ops->trigger(substream, cmd, codec_dai); |
| 623 | 634 | if (ret < 0) |
| 624 | 635 | return ret; |
| @@ -630,7 +641,7 @@ static int soc_pcm_trigger(struct snd_pcm_substream *substream, int cmd) · 5 unmodified lines | ||
| 630 | 641 | return ret; |
| 631 | 642 | } |
| 632 | 643 | |
| 633 | − if (cpu_dai->driver->ops->trigger) { | |
| 644 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->trigger) { | |
| 634 | 645 | ret = cpu_dai->driver->ops->trigger(substream, cmd, cpu_dai); |
| 635 | 646 | if (ret < 0) |
| 636 | 647 | return ret; |
| @@ -647,19 +658,20 @@ static int soc_pcm_bespoke_trigger(struct snd_pcm_substream *substream, · 10 unmodified lines | ||
| 647 | 658 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
| 648 | 659 | int ret; |
| 649 | 660 | |
| 650 | − if (codec_dai->driver->ops->bespoke_trigger) { | |
| 661 | + if (codec_dai->driver->ops && | |
| 662 | + codec_dai->driver->ops->bespoke_trigger) { | |
| 651 | 663 | ret = codec_dai->driver->ops->bespoke_trigger(substream, cmd, codec_dai); |
| 652 | 664 | if (ret < 0) |
| 653 | 665 | return ret; |
| 654 | 666 | } |
| 655 | 667 | |
| 656 | − if (platform->driver->bespoke_trigger) { | |
| 668 | + if (platform->driver->ops && platform->driver->bespoke_trigger) { | |
| 657 | 669 | ret = platform->driver->bespoke_trigger(substream, cmd); |
| 658 | 670 | if (ret < 0) |
| 659 | 671 | return ret; |
| 660 | 672 | } |
| 661 | 673 | |
| 662 | − if (cpu_dai->driver->ops->bespoke_trigger) { | |
| 674 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->bespoke_trigger) { | |
| 663 | 675 | ret = cpu_dai->driver->ops->bespoke_trigger(substream, cmd, cpu_dai); |
| 664 | 676 | if (ret < 0) |
| 665 | 677 | return ret; |
| @@ -684,10 +696,10 @@ static snd_pcm_uframes_t soc_pcm_pointer(struct snd_pcm_substream *substream) · 18 unmodified lines | ||
| 684 | 696 | if (platform->driver->ops && platform->driver->ops->pointer) |
| 685 | 697 | offset = platform->driver->ops->pointer(substream); |
| 686 | 698 | |
| 687 | − if (cpu_dai->driver->ops->delay) | |
| 699 | + if (cpu_dai->driver->ops && cpu_dai->driver->ops->delay) | |
| 688 | 700 | delay += cpu_dai->driver->ops->delay(substream, cpu_dai); |
| 689 | 701 | |
| 690 | − if (codec_dai->driver->ops->delay) | |
| 702 | + if (codec_dai->driver->ops && codec_dai->driver->ops->delay) | |
| 691 | 703 | delay += codec_dai->driver->ops->delay(substream, codec_dai); |
| 692 | 704 | |
| 693 | 705 | if (platform->driver->delay) |
| @@ -721,7 +733,7 @@ static int dpcm_be_connect(struct snd_soc_pcm_runtime *fe, · 27 unmodified lines | ||
| 721 | 733 | list_add(&dpcm->list_be, &fe->dpcm[stream].be_clients); |
| 722 | 734 | list_add(&dpcm->list_fe, &be->dpcm[stream].fe_clients); |
| 723 | 735 | |
| 724 | − dev_dbg(fe->dev, " connected new DPCM %s path %s %s %s\n", | |
| 736 | + dev_dbg(fe->dev, "connected new DPCM %s path %s %s %s\n", | |
| 725 | 737 | stream ? "capture" : "playback", fe->dai_link->name, |
| 726 | 738 | stream ? "<-" : "->", be->dai_link->name); |
| 727 | 739 | |
| @@ -749,7 +761,7 @@ static void dpcm_be_reparent(struct snd_soc_pcm_runtime *fe, · 21 unmodified lines | ||
| 749 | 761 | if (dpcm->fe == fe) |
| 750 | 762 | continue; |
| 751 | 763 | |
| 752 | − dev_dbg(fe->dev, " reparent %s path %s %s %s\n", | |
| 764 | + dev_dbg(fe->dev, "reparent %s path %s %s %s\n", | |
| 753 | 765 | stream ? "capture" : "playback", |
| 754 | 766 | dpcm->fe->dai_link->name, |
| 755 | 767 | stream ? "<-" : "->", dpcm->be->dai_link->name); |
| @@ -773,7 +785,7 @@ static void dpcm_be_disconnect(struct snd_soc_pcm_runtime *fe, int stream) · 17 unmodified lines | ||
| 773 | 785 | if (dpcm->state != SND_SOC_DPCM_LINK_STATE_FREE) |
| 774 | 786 | continue; |
| 775 | 787 | |
| 776 | − dev_dbg(fe->dev, " freed DSP %s path %s %s %s\n", | |
| 788 | + dev_dbg(fe->dev, "freed DSP %s path %s %s %s\n", | |
| 777 | 789 | stream ? "capture" : "playback", fe->dai_link->name, |
| 778 | 790 | stream ? "<-" : "->", dpcm->be->dai_link->name); |
| 779 | 791 | |
| @@ -1037,6 +1049,12 @@ static int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) · 257 unmodified lines | ||
| 1037 | 1049 | struct snd_pcm_substream *be_substream = |
| 1038 | 1050 | snd_soc_dpcm_get_substream(be, stream); |
| 1039 | 1051 | |
| 1052 | + if (!be_substream) { | |
| 1053 | + dev_err(be->dev, "ASoC: no backend %s stream\n", | |
| 1054 | + stream ? "capture" : "playback"); | |
| 1055 | + continue; | |
| 1056 | + } | |
| 1057 | + | |
| 1040 | 1058 | /* is this op for this BE ? */ |
| 1041 | 1059 | if (!snd_soc_dpcm_be_can_update(fe, be, stream)) |
| 1042 | 1060 | continue; |
| @@ -1054,7 +1072,8 @@ static int dpcm_be_dai_startup(struct snd_soc_pcm_runtime *fe, int stream) · 11 unmodified lines | ||
| 1054 | 1072 | (be->dpcm[stream].state != SND_SOC_DPCM_STATE_CLOSE)) |
| 1055 | 1073 | continue; |
| 1056 | 1074 | |
| 1057 | − dev_dbg(be->dev, "ASoC: open BE %s\n", be->dai_link->name); | |
| 1075 | + dev_dbg(be->dev, "ASoC: open %s BE %s\n", | |
| 1076 | + stream ? "capture" : "playback", be->dai_link->name); | |
| 1058 | 1077 | |
| 1059 | 1078 | be_substream->runtime = be->dpcm[stream].runtime; |
| 1060 | 1079 | err = soc_pcm_open(be_substream); |
| @@ -1673,7 +1692,7 @@ static int soc_pcm_ioctl(struct snd_pcm_substream *substream, · 612 unmodified lines | ||
| 1673 | 1692 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 1674 | 1693 | struct snd_soc_platform *platform = rtd->platform; |
| 1675 | 1694 | |
| 1676 | − if (platform->driver->ops->ioctl) | |
| 1695 | + if (platform->driver->ops && platform->driver->ops->ioctl) | |
| 1677 | 1696 | return platform->driver->ops->ioctl(substream, cmd, arg); |
| 1678 | 1697 | return snd_pcm_lib_ioctl(substream, cmd, arg); |
| 1679 | 1698 | } |
| @@ -1934,8 +1953,8 @@ int soc_dpcm_be_digital_mute(struct snd_soc_pcm_runtime *fe, int mute) · 254 unmodified lines | ||
| 1934 | 1953 | |
| 1935 | 1954 | dev_dbg(be->dev, "ASoC: BE digital mute %s\n", be->dai_link->name); |
| 1936 | 1955 | |
| 1937 | − if (drv->ops->digital_mute && dai->playback_active) | |
| 1938 | − drv->ops->digital_mute(dai, mute); | |
| 1956 | + if (drv->ops && drv->ops->digital_mute && dai->playback_active) | |
| 1957 | + drv->ops->digital_mute(dai, mute); | |
| 1939 | 1958 | } |
| 1940 | 1959 | |
| 1941 | 1960 | return 0; |
| @@ -2116,7 +2135,7 @@ int soc_new_pcm(struct snd_soc_pcm_runtime *rtd, int num) · 174 unmodified lines | ||
| 2116 | 2135 | |
| 2117 | 2136 | pcm->private_free = platform->driver->pcm_free; |
| 2118 | 2137 | out: |
| 2119 | − dev_info(rtd->card->dev, " %s <-> %s mapping ok\n", codec_dai->name, | |
| 2138 | + dev_info(rtd->card->dev, "%s <-> %s mapping ok\n", codec_dai->name, | |
| 2120 | 2139 | cpu_dai->name); |
| 2121 | 2140 | return ret; |
| 2122 | 2141 | } |
| @@ -2224,7 +2243,7 @@ EXPORT_SYMBOL_GPL(snd_soc_dpcm_can_be_params); · 101 unmodified lines | ||
| 2224 | 2243 | int snd_soc_platform_trigger(struct snd_pcm_substream *substream, |
| 2225 | 2244 | int cmd, struct snd_soc_platform *platform) |
| 2226 | 2245 | { |
| 2227 | − if (platform->driver->ops->trigger) | |
| 2246 | + if (platform->driver->ops && platform->driver->ops->trigger) | |
| 2228 | 2247 | return platform->driver->ops->trigger(substream, cmd); |
| 2229 | 2248 | return 0; |
| 2230 | 2249 | } |
| @@ -75,7 +75,11 @@ static const struct snd_pcm_hardware dummy_dma_hardware = { · 74 unmodified lines | ||
| 75 | 75 | |
| 76 | 76 | static int dummy_dma_open(struct snd_pcm_substream *substream) |
| 77 | 77 | { |
| 78 | − snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware); | |
| 78 | + struct snd_soc_pcm_runtime *rtd = substream->private_data; | |
| 79 | + | |
| 80 | + /* BE's dont need dummy params */ | |
| 81 | + if (!rtd->dai_link->no_pcm) | |
| 82 | + snd_soc_set_runtime_hwparams(substream, &dummy_dma_hardware); | |
| 79 | 83 | |
| 80 | 84 | return 0; |
| 81 | 85 | } |
| @@ -257,20 +257,12 @@ static int spdif_in_probe(struct platform_device *pdev) · 256 unmodified lines | ||
| 257 | 257 | return ret; |
| 258 | 258 | } |
| 259 | 259 | |
| 260 | − return snd_soc_register_component(&pdev->dev, &spdif_in_component, | |
| 261 | − &spdif_in_dai, 1); | |
| 262 | −} | |
| 263 | − | |
| 264 | −static int spdif_in_remove(struct platform_device *pdev) | |
| 265 | −{ | |
| 266 | − snd_soc_unregister_component(&pdev->dev); | |
| 267 | − | |
| 268 | − return 0; | |
| 260 | + return devm_snd_soc_register_component(&pdev->dev, &spdif_in_component, | |
| 261 | + &spdif_in_dai, 1); | |
| 269 | 262 | } |
| 270 | 263 | |
| 271 | 264 | static struct platform_driver spdif_in_driver = { |
| 272 | 265 | .probe = spdif_in_probe, |
| 273 | − .remove = spdif_in_remove, | |
| 274 | 266 | .driver = { |
| 275 | 267 | .name = "spdif-in", |
| 276 | 268 | .owner = THIS_MODULE, |
| @@ -280,7 +280,6 @@ static int spdif_out_probe(struct platform_device *pdev) · 279 unmodified lines | ||
| 280 | 280 | struct spdif_out_dev *host; |
| 281 | 281 | struct spear_spdif_platform_data *pdata; |
| 282 | 282 | struct resource *res; |
| 283 | − int ret; | |
| 284 | 283 | |
| 285 | 284 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); |
| 286 | 285 | if (!host) { |
| @@ -307,16 +306,8 @@ static int spdif_out_probe(struct platform_device *pdev) · 20 unmodified lines | ||
| 307 | 306 | |
| 308 | 307 | dev_set_drvdata(&pdev->dev, host); |
| 309 | 308 | |
| 310 | − ret = snd_soc_register_component(&pdev->dev, &spdif_out_component, | |
| 311 | − &spdif_out_dai, 1); | |
| 312 | − return ret; | |
| 313 | −} | |
| 314 | − | |
| 315 | −static int spdif_out_remove(struct platform_device *pdev) | |
| 316 | −{ | |
| 317 | − snd_soc_unregister_component(&pdev->dev); | |
| 318 | − | |
| 319 | − return 0; | |
| 309 | + return devm_snd_soc_register_component(&pdev->dev, &spdif_out_component, | |
| 310 | + &spdif_out_dai, 1); | |
| 320 | 311 | } |
| 321 | 312 | |
| 322 | 313 | #ifdef CONFIG_PM |
| @@ -357,7 +348,6 @@ static SIMPLE_DEV_PM_OPS(spdif_out_dev_pm_ops, spdif_out_suspend, \ · 34 unmodified lines | ||
| 357 | 348 | |
| 358 | 349 | static struct platform_driver spdif_out_driver = { |
| 359 | 350 | .probe = spdif_out_probe, |
| 360 | − .remove = spdif_out_remove, | |
| 361 | 351 | .driver = { |
| 362 | 352 | .name = "spdif-out", |
| 363 | 353 | .owner = THIS_MODULE, |
| @@ -297,7 +297,7 @@ static bool tegra20_i2s_wr_rd_reg(struct device *dev, unsigned int reg) · 296 unmodified lines | ||
| 297 | 297 | return true; |
| 298 | 298 | default: |
| 299 | 299 | return false; |
| 300 | − }; | |
| 300 | + } | |
| 301 | 301 | } |
| 302 | 302 | |
| 303 | 303 | static bool tegra20_i2s_volatile_reg(struct device *dev, unsigned int reg) |
| @@ -310,7 +310,7 @@ static bool tegra20_i2s_volatile_reg(struct device *dev, unsigned int reg) · 6 unmodified lines | ||
| 310 | 310 | return true; |
| 311 | 311 | default: |
| 312 | 312 | return false; |
| 313 | − }; | |
| 313 | + } | |
| 314 | 314 | } |
| 315 | 315 | |
| 316 | 316 | static bool tegra20_i2s_precious_reg(struct device *dev, unsigned int reg) |
| @@ -321,7 +321,7 @@ static bool tegra20_i2s_precious_reg(struct device *dev, unsigned int reg) · 4 unmodified lines | ||
| 321 | 321 | return true; |
| 322 | 322 | default: |
| 323 | 323 | return false; |
| 324 | − }; | |
| 324 | + } | |
| 325 | 325 | } |
| 326 | 326 | |
| 327 | 327 | static const struct regmap_config tegra20_i2s_regmap_config = { |
| @@ -213,7 +213,7 @@ static bool tegra20_spdif_wr_rd_reg(struct device *dev, unsigned int reg) · 212 unmodified lines | ||
| 213 | 213 | return true; |
| 214 | 214 | default: |
| 215 | 215 | return false; |
| 216 | − }; | |
| 216 | + } | |
| 217 | 217 | } |
| 218 | 218 | |
| 219 | 219 | static bool tegra20_spdif_volatile_reg(struct device *dev, unsigned int reg) |
| @@ -234,7 +234,7 @@ static bool tegra20_spdif_volatile_reg(struct device *dev, unsigned int reg) · 14 unmodified lines | ||
| 234 | 234 | return true; |
| 235 | 235 | default: |
| 236 | 236 | return false; |
| 237 | − }; | |
| 237 | + } | |
| 238 | 238 | } |
| 239 | 239 | |
| 240 | 240 | static bool tegra20_spdif_precious_reg(struct device *dev, unsigned int reg) |
| @@ -247,7 +247,7 @@ static bool tegra20_spdif_precious_reg(struct device *dev, unsigned int reg) · 6 unmodified lines | ||
| 247 | 247 | return true; |
| 248 | 248 | default: |
| 249 | 249 | return false; |
| 250 | − }; | |
| 250 | + } | |
| 251 | 251 | } |
| 252 | 252 | |
| 253 | 253 | static const struct regmap_config tegra20_spdif_regmap_config = { |
| @@ -100,6 +100,7 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif, · 99 unmodified lines | ||
| 100 | 100 | { |
| 101 | 101 | int channel; |
| 102 | 102 | u32 reg, val; |
| 103 | + struct tegra30_ahub_cif_conf cif_conf; | |
| 103 | 104 | |
| 104 | 105 | channel = find_first_zero_bit(ahub->rx_usage, |
| 105 | 106 | TEGRA30_AHUB_CHANNEL_CTRL_COUNT); |
| @@ -123,15 +124,21 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif, · 17 unmodified lines | ||
| 123 | 124 | TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; |
| 124 | 125 | tegra30_apbif_write(reg, val); |
| 125 | 126 | |
| 127 | + cif_conf.threshold = 0; | |
| 128 | + cif_conf.audio_channels = 2; | |
| 129 | + cif_conf.client_channels = 2; | |
| 130 | + cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 131 | + cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 132 | + cif_conf.expand = 0; | |
| 133 | + cif_conf.stereo_conv = 0; | |
| 134 | + cif_conf.replicate = 0; | |
| 135 | + cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX; | |
| 136 | + cif_conf.truncate = 0; | |
| 137 | + cif_conf.mono_conv = 0; | |
| 138 | + | |
| 126 | 139 | reg = TEGRA30_AHUB_CIF_RX_CTRL + |
| 127 | 140 | (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE); |
| 128 | − val = (0 << TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | | |
| 129 | − (1 << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | | |
| 130 | − (1 << TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | | |
| 131 | − TEGRA30_AUDIOCIF_CTRL_AUDIO_BITS_16 | | |
| 132 | − TEGRA30_AUDIOCIF_CTRL_CLIENT_BITS_16 | | |
| 133 | − TEGRA30_AUDIOCIF_CTRL_DIRECTION_RX; | |
| 134 | − tegra30_apbif_write(reg, val); | |
| 141 | + ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf); | |
| 135 | 142 | |
| 136 | 143 | return 0; |
| 137 | 144 | } |
| @@ -183,6 +190,7 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif, · 45 unmodified lines | ||
| 183 | 190 | { |
| 184 | 191 | int channel; |
| 185 | 192 | u32 reg, val; |
| 193 | + struct tegra30_ahub_cif_conf cif_conf; | |
| 186 | 194 | |
| 187 | 195 | channel = find_first_zero_bit(ahub->tx_usage, |
| 188 | 196 | TEGRA30_AHUB_CHANNEL_CTRL_COUNT); |
| @@ -206,15 +214,21 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif, · 17 unmodified lines | ||
| 206 | 214 | TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16; |
| 207 | 215 | tegra30_apbif_write(reg, val); |
| 208 | 216 | |
| 217 | + cif_conf.threshold = 0; | |
| 218 | + cif_conf.audio_channels = 2; | |
| 219 | + cif_conf.client_channels = 2; | |
| 220 | + cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 221 | + cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 222 | + cif_conf.expand = 0; | |
| 223 | + cif_conf.stereo_conv = 0; | |
| 224 | + cif_conf.replicate = 0; | |
| 225 | + cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_TX; | |
| 226 | + cif_conf.truncate = 0; | |
| 227 | + cif_conf.mono_conv = 0; | |
| 228 | + | |
| 209 | 229 | reg = TEGRA30_AHUB_CIF_TX_CTRL + |
| 210 | 230 | (channel * TEGRA30_AHUB_CIF_TX_CTRL_STRIDE); |
| 211 | − val = (0 << TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | | |
| 212 | − (1 << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | | |
| 213 | − (1 << TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | | |
| 214 | − TEGRA30_AUDIOCIF_CTRL_AUDIO_BITS_16 | | |
| 215 | − TEGRA30_AUDIOCIF_CTRL_CLIENT_BITS_16 | | |
| 216 | − TEGRA30_AUDIOCIF_CTRL_DIRECTION_TX; | |
| 217 | − tegra30_apbif_write(reg, val); | |
| 231 | + ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf); | |
| 218 | 232 | |
| 219 | 233 | return 0; |
| 220 | 234 | } |
| @@ -346,7 +360,7 @@ static bool tegra30_ahub_apbif_wr_rd_reg(struct device *dev, unsigned int reg) · 125 unmodified lines | ||
| 346 | 360 | return true; |
| 347 | 361 | default: |
| 348 | 362 | break; |
| 349 | − }; | |
| 363 | + } | |
| 350 | 364 | |
| 351 | 365 | if (REG_IN_ARRAY(reg, CHANNEL_CTRL) || |
| 352 | 366 | REG_IN_ARRAY(reg, CHANNEL_CLEAR) || |
| @@ -381,7 +395,7 @@ static bool tegra30_ahub_apbif_volatile_reg(struct device *dev, · 28 unmodified lines | ||
| 381 | 395 | return true; |
| 382 | 396 | default: |
| 383 | 397 | break; |
| 384 | − }; | |
| 398 | + } | |
| 385 | 399 | |
| 386 | 400 | if (REG_IN_ARRAY(reg, CHANNEL_CLEAR) || |
| 387 | 401 | REG_IN_ARRAY(reg, CHANNEL_STATUS) || |
| @@ -437,13 +451,21 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = { · 49 unmodified lines | ||
| 437 | 451 | |
| 438 | 452 | static struct tegra30_ahub_soc_data soc_data_tegra30 = { |
| 439 | 453 | .clk_list_mask = CLK_LIST_MASK_TEGRA30, |
| 454 | + .set_audio_cif = tegra30_ahub_set_cif, | |
| 440 | 455 | }; |
| 441 | 456 | |
| 442 | 457 | static struct tegra30_ahub_soc_data soc_data_tegra114 = { |
| 443 | 458 | .clk_list_mask = CLK_LIST_MASK_TEGRA114, |
| 459 | + .set_audio_cif = tegra30_ahub_set_cif, | |
| 460 | +}; | |
| 461 | + | |
| 462 | +static struct tegra30_ahub_soc_data soc_data_tegra124 = { | |
| 463 | + .clk_list_mask = CLK_LIST_MASK_TEGRA114, | |
| 464 | + .set_audio_cif = tegra124_ahub_set_cif, | |
| 444 | 465 | }; |
| 445 | 466 | |
| 446 | 467 | static const struct of_device_id tegra30_ahub_of_match[] = { |
| 468 | + { .compatible = "nvidia,tegra124-ahub", .data = &soc_data_tegra124 }, | |
| 447 | 469 | { .compatible = "nvidia,tegra114-ahub", .data = &soc_data_tegra114 }, |
| 448 | 470 | { .compatible = "nvidia,tegra30-ahub", .data = &soc_data_tegra30 }, |
| 449 | 471 | {}, |
| @@ -497,6 +519,7 @@ static int tegra30_ahub_probe(struct platform_device *pdev) · 47 unmodified lines | ||
| 497 | 519 | } |
| 498 | 520 | dev_set_drvdata(&pdev->dev, ahub); |
| 499 | 521 | |
| 522 | + ahub->soc_data = soc_data; | |
| 500 | 523 | ahub->dev = &pdev->dev; |
| 501 | 524 | |
| 502 | 525 | ahub->clk_d_audio = clk_get(&pdev->dev, "d_audio"); |
| @@ -669,6 +692,70 @@ static struct platform_driver tegra30_ahub_driver = { · 166 unmodified lines | ||
| 669 | 692 | }; |
| 670 | 693 | module_platform_driver(tegra30_ahub_driver); |
| 671 | 694 | |
| 695 | +void tegra30_ahub_set_cif(struct regmap *regmap, unsigned int reg, | |
| 696 | + struct tegra30_ahub_cif_conf *conf) | |
| 697 | +{ | |
| 698 | + unsigned int value; | |
| 699 | + | |
| 700 | + value = (conf->threshold << | |
| 701 | + TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | | |
| 702 | + ((conf->audio_channels - 1) << | |
| 703 | + TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | | |
| 704 | + ((conf->client_channels - 1) << | |
| 705 | + TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | | |
| 706 | + (conf->audio_bits << | |
| 707 | + TEGRA30_AUDIOCIF_CTRL_AUDIO_BITS_SHIFT) | | |
| 708 | + (conf->client_bits << | |
| 709 | + TEGRA30_AUDIOCIF_CTRL_CLIENT_BITS_SHIFT) | | |
| 710 | + (conf->expand << | |
| 711 | + TEGRA30_AUDIOCIF_CTRL_EXPAND_SHIFT) | | |
| 712 | + (conf->stereo_conv << | |
| 713 | + TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_SHIFT) | | |
| 714 | + (conf->replicate << | |
| 715 | + TEGRA30_AUDIOCIF_CTRL_REPLICATE_SHIFT) | | |
| 716 | + (conf->direction << | |
| 717 | + TEGRA30_AUDIOCIF_CTRL_DIRECTION_SHIFT) | | |
| 718 | + (conf->truncate << | |
| 719 | + TEGRA30_AUDIOCIF_CTRL_TRUNCATE_SHIFT) | | |
| 720 | + (conf->mono_conv << | |
| 721 | + TEGRA30_AUDIOCIF_CTRL_MONO_CONV_SHIFT); | |
| 722 | + | |
| 723 | + regmap_write(regmap, reg, value); | |
| 724 | +} | |
| 725 | +EXPORT_SYMBOL_GPL(tegra30_ahub_set_cif); | |
| 726 | + | |
| 727 | +void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg, | |
| 728 | + struct tegra30_ahub_cif_conf *conf) | |
| 729 | +{ | |
| 730 | + unsigned int value; | |
| 731 | + | |
| 732 | + value = (conf->threshold << | |
| 733 | + TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | | |
| 734 | + ((conf->audio_channels - 1) << | |
| 735 | + TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | | |
| 736 | + ((conf->client_channels - 1) << | |
| 737 | + TEGRA124_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | | |
| 738 | + (conf->audio_bits << | |
| 739 | + TEGRA30_AUDIOCIF_CTRL_AUDIO_BITS_SHIFT) | | |
| 740 | + (conf->client_bits << | |
| 741 | + TEGRA30_AUDIOCIF_CTRL_CLIENT_BITS_SHIFT) | | |
| 742 | + (conf->expand << | |
| 743 | + TEGRA30_AUDIOCIF_CTRL_EXPAND_SHIFT) | | |
| 744 | + (conf->stereo_conv << | |
| 745 | + TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_SHIFT) | | |
| 746 | + (conf->replicate << | |
| 747 | + TEGRA30_AUDIOCIF_CTRL_REPLICATE_SHIFT) | | |
| 748 | + (conf->direction << | |
| 749 | + TEGRA30_AUDIOCIF_CTRL_DIRECTION_SHIFT) | | |
| 750 | + (conf->truncate << | |
| 751 | + TEGRA30_AUDIOCIF_CTRL_TRUNCATE_SHIFT) | | |
| 752 | + (conf->mono_conv << | |
| 753 | + TEGRA30_AUDIOCIF_CTRL_MONO_CONV_SHIFT); | |
| 754 | + | |
| 755 | + regmap_write(regmap, reg, value); | |
| 756 | +} | |
| 757 | +EXPORT_SYMBOL_GPL(tegra124_ahub_set_cif); | |
| 758 | + | |
| 672 | 759 | MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>"); |
| 673 | 760 | MODULE_DESCRIPTION("Tegra30 AHUB driver"); |
| 674 | 761 | MODULE_LICENSE("GPL v2"); |
| @@ -25,16 +25,30 @@ · 24 unmodified lines | ||
| 25 | 25 | #define TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US 0xf |
| 26 | 26 | #define TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK (TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US << TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) |
| 27 | 27 | |
| 28 | +#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT 24 | |
| 29 | +#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US 0x3f | |
| 30 | +#define TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK (TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_MASK_US << TEGRA124_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | |
| 31 | + | |
| 28 | 32 | /* Channel count minus 1 */ |
| 29 | 33 | #define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT 24 |
| 30 | 34 | #define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US 7 |
| 31 | 35 | #define TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK (TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) |
| 32 | 36 | |
| 37 | +/* Channel count minus 1 */ | |
| 38 | +#define TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT 20 | |
| 39 | +#define TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US 0xf | |
| 40 | +#define TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK (TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_MASK_US << TEGRA124_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | |
| 41 | + | |
| 33 | 42 | /* Channel count minus 1 */ |
| 34 | 43 | #define TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT 16 |
| 35 | 44 | #define TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK_US 7 |
| 36 | 45 | #define TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK (TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) |
| 37 | 46 | |
| 47 | +/* Channel count minus 1 */ | |
| 48 | +#define TEGRA124_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT 16 | |
| 49 | +#define TEGRA124_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK_US 0xf | |
| 50 | +#define TEGRA124_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK (TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_MASK_US << TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | |
| 51 | + | |
| 38 | 52 | #define TEGRA30_AUDIOCIF_BITS_4 0 |
| 39 | 53 | #define TEGRA30_AUDIOCIF_BITS_8 1 |
| 40 | 54 | #define TEGRA30_AUDIOCIF_BITS_12 2 |
| @@ -86,7 +100,7 @@ · 45 unmodified lines | ||
| 86 | 100 | #define TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_CH1 (TEGRA30_AUDIOCIF_STEREO_CONV_CH1 << TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_SHIFT) |
| 87 | 101 | #define TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_AVG (TEGRA30_AUDIOCIF_STEREO_CONV_AVG << TEGRA30_AUDIOCIF_CTRL_STEREO_CONV_SHIFT) |
| 88 | 102 | |
| 89 | −#define TEGRA30_AUDIOCIF_CTRL_REPLICATE 3 | |
| 103 | +#define TEGRA30_AUDIOCIF_CTRL_REPLICATE_SHIFT 3 | |
| 90 | 104 | |
| 91 | 105 | #define TEGRA30_AUDIOCIF_DIRECTION_TX 0 |
| 92 | 106 | #define TEGRA30_AUDIOCIF_DIRECTION_RX 1 |
| @@ -468,8 +482,30 @@ extern int tegra30_ahub_set_rx_cif_source(enum tegra30_ahub_rxcif rxcif, · 375 unmodified lines | ||
| 468 | 482 | enum tegra30_ahub_txcif txcif); |
| 469 | 483 | extern int tegra30_ahub_unset_rx_cif_source(enum tegra30_ahub_rxcif rxcif); |
| 470 | 484 | |
| 485 | +struct tegra30_ahub_cif_conf { | |
| 486 | + unsigned int threshold; | |
| 487 | + unsigned int audio_channels; | |
| 488 | + unsigned int client_channels; | |
| 489 | + unsigned int audio_bits; | |
| 490 | + unsigned int client_bits; | |
| 491 | + unsigned int expand; | |
| 492 | + unsigned int stereo_conv; | |
| 493 | + unsigned int replicate; | |
| 494 | + unsigned int direction; | |
| 495 | + unsigned int truncate; | |
| 496 | + unsigned int mono_conv; | |
| 497 | +}; | |
| 498 | + | |
| 499 | +void tegra30_ahub_set_cif(struct regmap *regmap, unsigned int reg, | |
| 500 | + struct tegra30_ahub_cif_conf *conf); | |
| 501 | +void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg, | |
| 502 | + struct tegra30_ahub_cif_conf *conf); | |
| 503 | + | |
| 471 | 504 | struct tegra30_ahub_soc_data { |
| 472 | 505 | u32 clk_list_mask; |
| 506 | + void (*set_audio_cif)(struct regmap *regmap, | |
| 507 | + unsigned int reg, | |
| 508 | + struct tegra30_ahub_cif_conf *conf); | |
| 473 | 509 | /* |
| 474 | 510 | * FIXME: There are many more differences in HW, such as: |
| 475 | 511 | * - More APBIF channels. |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/io.h> |
| 31 | 31 | #include <linux/module.h> |
| 32 | 32 | #include <linux/of.h> |
| 33 | +#include <linux/of_device.h> | |
| 33 | 34 | #include <linux/platform_device.h> |
| 34 | 35 | #include <linux/pm_runtime.h> |
| 35 | 36 | #include <linux/regmap.h> |
| @@ -179,6 +180,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream, · 143 unmodified lines | ||
| 179 | 180 | struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai); |
| 180 | 181 | unsigned int mask, val, reg; |
| 181 | 182 | int ret, sample_size, srate, i2sclock, bitcnt; |
| 183 | + struct tegra30_ahub_cif_conf cif_conf; | |
| 182 | 184 | |
| 183 | 185 | if (params_channels(params) != 2) |
| 184 | 186 | return -EINVAL; |
| @@ -217,21 +219,26 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream, · 32 unmodified lines | ||
| 217 | 219 | |
| 218 | 220 | regmap_write(i2s->regmap, TEGRA30_I2S_TIMING, val); |
| 219 | 221 | |
| 220 | − val = (0 << TEGRA30_AUDIOCIF_CTRL_FIFO_THRESHOLD_SHIFT) | | |
| 221 | − (1 << TEGRA30_AUDIOCIF_CTRL_AUDIO_CHANNELS_SHIFT) | | |
| 222 | − (1 << TEGRA30_AUDIOCIF_CTRL_CLIENT_CHANNELS_SHIFT) | | |
| 223 | − TEGRA30_AUDIOCIF_CTRL_AUDIO_BITS_16 | | |
| 224 | − TEGRA30_AUDIOCIF_CTRL_CLIENT_BITS_16; | |
| 222 | + cif_conf.threshold = 0; | |
| 223 | + cif_conf.audio_channels = 2; | |
| 224 | + cif_conf.client_channels = 2; | |
| 225 | + cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 226 | + cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16; | |
| 227 | + cif_conf.expand = 0; | |
| 228 | + cif_conf.stereo_conv = 0; | |
| 229 | + cif_conf.replicate = 0; | |
| 230 | + cif_conf.truncate = 0; | |
| 231 | + cif_conf.mono_conv = 0; | |
| 225 | 232 | |
| 226 | 233 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 227 | − val |= TEGRA30_AUDIOCIF_CTRL_DIRECTION_RX; | |
| 234 | + cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX; | |
| 228 | 235 | reg = TEGRA30_I2S_CIF_RX_CTRL; |
| 229 | 236 | } else { |
| 230 | − val |= TEGRA30_AUDIOCIF_CTRL_DIRECTION_TX; | |
| 237 | + cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_TX; | |
| 231 | 238 | reg = TEGRA30_I2S_CIF_TX_CTRL; |
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