History

Merge tag 'kvm-arm-for-4.3-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into kvm-master

Second set of KVM/ARM changes for 4.3-rc2 - Workaround for a Cortex-A57 erratum - Bug fix for the debugging infrastructure - Fix for 32bit guests with more than 4GB of address space on a 32bit host - A number of fixes for the (unusual) case when we don't use the in-kernel GIC emulation - Removal of ThumbEE handling on arm64, since these have been dropped from the architecture before anyone actually ever built a CPU - Remove the KVM_ARM_MAX_VCPUS limitation which has become fairly pointless

Paolo Bonzini committed 11 years ago

Commit efe4d362 parents 9bf9fde ef7489113 files · +30 −81Browse files

Unified · Split

13 files
  1. arch/arm/include/asm/kvm_host.h +2 −6
  2. arch/arm/kvm/Kconfig +0 −11
  3. arch/arm/kvm/arm.c +1 −1
  4. arch/arm/kvm/interrupts_head.S +4 −2
  5. arch/arm/kvm/mmu.c +4 −2
  6. arch/arm64/include/asm/kvm_arm.h +0 −1
  7. arch/arm64/include/asm/kvm_asm.h +1 −3
  8. arch/arm64/include/asm/kvm_host.h +2 −6
  9. arch/arm64/kvm/Kconfig +0 −11
  10. arch/arm64/kvm/hyp.S +10 −21
  11. arch/arm64/kvm/sys_regs.c +4 −11
  12. include/kvm/arm_vgic.h +1 −5
  13. virt/kvm/arm/vgic-v3.c +1 −1
arch/arm/include/asm/kvm_host.h+2−6
@@ -29,12 +29,6 @@ · 28 unmodified lines
29 29
30#define __KVM_HAVE_ARCH_INTC_INITIALIZED30#define __KVM_HAVE_ARCH_INTC_INITIALIZED
31 31
32#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
33#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
34#else
35#define KVM_MAX_VCPUS 0
36#endif
37
38#define KVM_USER_MEM_SLOTS 3232#define KVM_USER_MEM_SLOTS 32
39#define KVM_PRIVATE_MEM_SLOTS 433#define KVM_PRIVATE_MEM_SLOTS 4
40#define KVM_COALESCED_MMIO_PAGE_OFFSET 134#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -44,6 +38,8 @@ · 3 unmodified lines
44 38
45#include <kvm/arm_vgic.h>39#include <kvm/arm_vgic.h>
46 40
41#define KVM_MAX_VCPUS VGIC_V2_MAX_CPUS
42
47u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);43u32 *kvm_vcpu_reg(struct kvm_vcpu *vcpu, u8 reg_num, u32 mode);
48int __attribute_const__ kvm_target_cpu(void);44int __attribute_const__ kvm_target_cpu(void);
49int kvm_reset_vcpu(struct kvm_vcpu *vcpu);45int kvm_reset_vcpu(struct kvm_vcpu *vcpu);
arch/arm/kvm/Kconfig+0−11
@@ -45,15 +45,4 @@ config KVM_ARM_HOST · 44 unmodified lines
45 ---help---45 ---help---
46 Provides host support for ARM processors.46 Provides host support for ARM processors.
47 47
48config KVM_ARM_MAX_VCPUS
49 int "Number maximum supported virtual CPUs per VM"
50 depends on KVM_ARM_HOST
51 default 4
52 help
53 Static number of max supported virtual CPUs per VM.
54
55 If you choose a high number, the vcpu structures will be quite
56 large, so only choose a reasonable number that you expect to
57 actually use.
58
59endif # VIRTUALIZATION48endif # VIRTUALIZATION
arch/arm/kvm/arm.c+1−1
@@ -446,7 +446,7 @@ static int kvm_vcpu_first_run_init(struct kvm_vcpu *vcpu) · 445 unmodified lines
446 * Map the VGIC hardware resources before running a vcpu the first446 * Map the VGIC hardware resources before running a vcpu the first
447 * time on this VM.447 * time on this VM.
448 */448 */
449 if (unlikely(!vgic_ready(kvm))) {449 if (unlikely(irqchip_in_kernel(kvm) && !vgic_ready(kvm))) {
450 ret = kvm_vgic_map_resources(kvm);450 ret = kvm_vgic_map_resources(kvm);
451 if (ret)451 if (ret)
452 return ret;452 return ret;
arch/arm/kvm/interrupts_head.S+4−2
@@ -515,8 +515,7 @@ ARM_BE8(rev r6, r6 ) · 514 unmodified lines
515 515
516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL516 mrc p15, 0, r2, c14, c3, 1 @ CNTV_CTL
517 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]517 str r2, [vcpu, #VCPU_TIMER_CNTV_CTL]
518 bic r2, #1 @ Clear ENABLE518
519 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
520 isb519 isb
521 520
522 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL521 mrrc p15, 3, rr_lo_hi(r2, r3), c14 @ CNTV_CVAL
@@ -529,6 +528,9 @@ ARM_BE8(rev r6, r6 ) · 6 unmodified lines
529 mcrr p15, 4, r2, r2, c14 @ CNTVOFF528 mcrr p15, 4, r2, r2, c14 @ CNTVOFF
530 529
5311:5301:
531 mov r2, #0 @ Clear ENABLE
532 mcr p15, 0, r2, c14, c3, 1 @ CNTV_CTL
533
532 @ Allow physical timer/counter access for the host534 @ Allow physical timer/counter access for the host
533 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL535 mrc p15, 4, r2, c14, c1, 0 @ CNTHCTL
534 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)536 orr r2, r2, #(CNTHCTL_PL1PCEN | CNTHCTL_PL1PCTEN)
arch/arm/kvm/mmu.c+4−2
@@ -1792,8 +1792,10 @@ int kvm_arch_prepare_memory_region(struct kvm *kvm, · 1791 unmodified lines
1792 if (vma->vm_flags & VM_PFNMAP) {1792 if (vma->vm_flags & VM_PFNMAP) {
1793 gpa_t gpa = mem->guest_phys_addr +1793 gpa_t gpa = mem->guest_phys_addr +
1794 (vm_start - mem->userspace_addr);1794 (vm_start - mem->userspace_addr);
1795 phys_addr_t pa = (vma->vm_pgoff << PAGE_SHIFT) +1795 phys_addr_t pa;
1796 vm_start - vma->vm_start;1796
1797 pa = (phys_addr_t)vma->vm_pgoff << PAGE_SHIFT;
1798 pa += vm_start - vma->vm_start;
1797 1799
1798 /* IO region dirty page logging not allowed */1800 /* IO region dirty page logging not allowed */
1799 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)1801 if (memslot->flags & KVM_MEM_LOG_DIRTY_PAGES)
arch/arm64/include/asm/kvm_arm.h+0−1
@@ -172,7 +172,6 @@ · 171 unmodified lines
172#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)172#define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)
173 173
174/* Hyp System Trap Register */174/* Hyp System Trap Register */
175#define HSTR_EL2_TTEE (1 << 16)
176#define HSTR_EL2_T(x) (1 << x)175#define HSTR_EL2_T(x) (1 << x)
177 176
178/* Hyp Coproccessor Trap Register Shifts */177/* Hyp Coproccessor Trap Register Shifts */
arch/arm64/include/asm/kvm_asm.h+1−3
@@ -53,9 +53,7 @@ · 52 unmodified lines
53#define IFSR32_EL2 25 /* Instruction Fault Status Register */53#define IFSR32_EL2 25 /* Instruction Fault Status Register */
54#define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */54#define FPEXC32_EL2 26 /* Floating-Point Exception Control Register */
55#define DBGVCR32_EL2 27 /* Debug Vector Catch Register */55#define DBGVCR32_EL2 27 /* Debug Vector Catch Register */
56#define TEECR32_EL1 28 /* ThumbEE Configuration Register */56#define NR_SYS_REGS 28
57#define TEEHBR32_EL1 29 /* ThumbEE Handler Base Register */
58#define NR_SYS_REGS 30
59 57
60/* 32bit mapping */58/* 32bit mapping */
61#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */59#define c0_MPIDR (MPIDR_EL1 * 2) /* MultiProcessor ID Register */
arch/arm64/include/asm/kvm_host.h+2−6
@@ -30,12 +30,6 @@ · 29 unmodified lines
30 30
31#define __KVM_HAVE_ARCH_INTC_INITIALIZED31#define __KVM_HAVE_ARCH_INTC_INITIALIZED
32 32
33#if defined(CONFIG_KVM_ARM_MAX_VCPUS)
34#define KVM_MAX_VCPUS CONFIG_KVM_ARM_MAX_VCPUS
35#else
36#define KVM_MAX_VCPUS 0
37#endif
38
39#define KVM_USER_MEM_SLOTS 3233#define KVM_USER_MEM_SLOTS 32
40#define KVM_PRIVATE_MEM_SLOTS 434#define KVM_PRIVATE_MEM_SLOTS 4
41#define KVM_COALESCED_MMIO_PAGE_OFFSET 135#define KVM_COALESCED_MMIO_PAGE_OFFSET 1
@@ -43,6 +37,8 @@ · 1 unmodified line
43#include <kvm/arm_vgic.h>37#include <kvm/arm_vgic.h>
44#include <kvm/arm_arch_timer.h>38#include <kvm/arm_arch_timer.h>
45 39
40#define KVM_MAX_VCPUS VGIC_V3_MAX_CPUS
41
46#define KVM_VCPU_MAX_FEATURES 342#define KVM_VCPU_MAX_FEATURES 3
47 43
48int __attribute_const__ kvm_target_cpu(void);44int __attribute_const__ kvm_target_cpu(void);
arch/arm64/kvm/Kconfig+0−11
@@ -41,15 +41,4 @@ config KVM_ARM_HOST · 40 unmodified lines
41 ---help---41 ---help---
42 Provides host support for ARM processors.42 Provides host support for ARM processors.
43 43
44config KVM_ARM_MAX_VCPUS
45 int "Number maximum supported virtual CPUs per VM"
46 depends on KVM_ARM_HOST
47 default 4
48 help
49 Static number of max supported virtual CPUs per VM.
50
51 If you choose a high number, the vcpu structures will be quite
52 large, so only choose a reasonable number that you expect to
53 actually use.
54
55endif # VIRTUALIZATION44endif # VIRTUALIZATION
arch/arm64/kvm/hyp.S+10−21
@@ -433,20 +433,13 @@ · 432 unmodified lines
433 mrs x5, ifsr32_el2433 mrs x5, ifsr32_el2
434 stp x4, x5, [x3]434 stp x4, x5, [x3]
435 435
436 skip_fpsimd_state x8, 3f436 skip_fpsimd_state x8, 2f
437 mrs x6, fpexc32_el2437 mrs x6, fpexc32_el2
438 str x6, [x3, #16]438 str x6, [x3, #16]
4393:4392:
440 skip_debug_state x8, 2f440 skip_debug_state x8, 1f
441 mrs x7, dbgvcr32_el2441 mrs x7, dbgvcr32_el2
442 str x7, [x3, #24]442 str x7, [x3, #24]
4432:
444 skip_tee_state x8, 1f
445
446 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
447 mrs x4, teecr32_el1
448 mrs x5, teehbr32_el1
449 stp x4, x5, [x3]
4501:4431:
451.endm444.endm
452 445
@@ -466,16 +459,9 @@ · 13 unmodified lines
466 msr dacr32_el2, x4459 msr dacr32_el2, x4
467 msr ifsr32_el2, x5460 msr ifsr32_el2, x5
468 461
469 skip_debug_state x8, 2f462 skip_debug_state x8, 1f
470 ldr x7, [x3, #24]463 ldr x7, [x3, #24]
471 msr dbgvcr32_el2, x7464 msr dbgvcr32_el2, x7
4722:
473 skip_tee_state x8, 1f
474
475 add x3, x2, #CPU_SYSREG_OFFSET(TEECR32_EL1)
476 ldp x4, x5, [x3]
477 msr teecr32_el1, x4
478 msr teehbr32_el1, x5
4791:4651:
480.endm466.endm
481 467
@@ -570,8 +556,6 @@ alternative_endif · 88 unmodified lines
570 mrs x3, cntv_ctl_el0556 mrs x3, cntv_ctl_el0
571 and x3, x3, #3557 and x3, x3, #3
572 str w3, [x0, #VCPU_TIMER_CNTV_CTL]558 str w3, [x0, #VCPU_TIMER_CNTV_CTL]
573 bic x3, x3, #1 // Clear Enable
574 msr cntv_ctl_el0, x3
575 559
576 isb560 isb
577 561
@@ -579,6 +563,9 @@ alternative_endif · 1 unmodified line
579 str x3, [x0, #VCPU_TIMER_CNTV_CVAL]563 str x3, [x0, #VCPU_TIMER_CNTV_CVAL]
580 564
5811:5651:
566 // Disable the virtual timer
567 msr cntv_ctl_el0, xzr
568
582 // Allow physical timer/counter access for the host569 // Allow physical timer/counter access for the host
583 mrs x2, cnthctl_el2570 mrs x2, cnthctl_el2
584 orr x2, x2, #3571 orr x2, x2, #3
@@ -753,6 +740,9 @@ ENTRY(__kvm_vcpu_run) · 168 unmodified lines
753 // Guest context740 // Guest context
754 add x2, x0, #VCPU_CONTEXT741 add x2, x0, #VCPU_CONTEXT
755 742
743 // We must restore the 32-bit state before the sysregs, thanks
744 // to Cortex-A57 erratum #852523.
745 restore_guest_32bit_state
756 bl __restore_sysregs746 bl __restore_sysregs
757 747
758 skip_debug_state x3, 1f748 skip_debug_state x3, 1f
@@ -760,7 +750,6 @@ ENTRY(__kvm_vcpu_run) · 1 unmodified line
760 kern_hyp_va x3750 kern_hyp_va x3
761 bl __restore_debug751 bl __restore_debug
7621:7521:
763 restore_guest_32bit_state
764 restore_guest_regs753 restore_guest_regs
765 754
766 // That's it, no more messing around.755 // That's it, no more messing around.
arch/arm64/kvm/sys_regs.c+4−11
@@ -272,7 +272,7 @@ static int set_bvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 271 unmodified lines
272{272{
273 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];273 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->reg];
274 274
275 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)275 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
276 return -EFAULT;276 return -EFAULT;
277 return 0;277 return 0;
278}278}
@@ -314,7 +314,7 @@ static int set_bcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 35 unmodified lines
314{314{
315 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];315 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->reg];
316 316
317 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)317 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
318 return -EFAULT;318 return -EFAULT;
319 319
320 return 0;320 return 0;
@@ -358,7 +358,7 @@ static int set_wvr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 37 unmodified lines
358{358{
359 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];359 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->reg];
360 360
361 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)361 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
362 return -EFAULT;362 return -EFAULT;
363 return 0;363 return 0;
364}364}
@@ -400,7 +400,7 @@ static int set_wcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, · 35 unmodified lines
400{400{
401 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];401 __u64 *r = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->reg];
402 402
403 if (copy_from_user(uaddr, r, KVM_REG_SIZE(reg->id)) != 0)403 if (copy_from_user(r, uaddr, KVM_REG_SIZE(reg->id)) != 0)
404 return -EFAULT;404 return -EFAULT;
405 return 0;405 return 0;
406}406}
@@ -539,13 +539,6 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 132 unmodified lines
539 { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),539 { Op0(0b10), Op1(0b000), CRn(0b0111), CRm(0b1110), Op2(0b110),
540 trap_dbgauthstatus_el1 },540 trap_dbgauthstatus_el1 },
541 541
542 /* TEECR32_EL1 */
543 { Op0(0b10), Op1(0b010), CRn(0b0000), CRm(0b0000), Op2(0b000),
544 NULL, reset_val, TEECR32_EL1, 0 },
545 /* TEEHBR32_EL1 */
546 { Op0(0b10), Op1(0b010), CRn(0b0001), CRm(0b0000), Op2(0b000),
547 NULL, reset_val, TEEHBR32_EL1, 0 },
548
549 /* MDCCSR_EL1 */542 /* MDCCSR_EL1 */
550 { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),543 { Op0(0b10), Op1(0b011), CRn(0b0000), CRm(0b0001), Op2(0b000),
551 trap_raz_wi },544 trap_raz_wi },
include/kvm/arm_vgic.h+1−5
@@ -35,11 +35,7 @@ · 34 unmodified lines
35#define VGIC_V3_MAX_LRS 1635#define VGIC_V3_MAX_LRS 16
36#define VGIC_MAX_IRQS 102436#define VGIC_MAX_IRQS 1024
37#define VGIC_V2_MAX_CPUS 837#define VGIC_V2_MAX_CPUS 8
38 38#define VGIC_V3_MAX_CPUS 255
39/* Sanity checks... */
40#if (KVM_MAX_VCPUS > 255)
41#error Too many KVM VCPUs, the VGIC only supports up to 255 VCPUs for now
42#endif
43 39
44#if (VGIC_NR_IRQS_LEGACY & 31)40#if (VGIC_NR_IRQS_LEGACY & 31)
45#error "VGIC_NR_IRQS must be a multiple of 32"41#error "VGIC_NR_IRQS must be a multiple of 32"
virt/kvm/arm/vgic-v3.c+1−1
@@ -288,7 +288,7 @@ int vgic_v3_probe(struct device_node *vgic_node, · 287 unmodified lines
288 288
289 vgic->vctrl_base = NULL;289 vgic->vctrl_base = NULL;
290 vgic->type = VGIC_V3;290 vgic->type = VGIC_V3;
291 vgic->max_gic_vcpus = KVM_MAX_VCPUS;291 vgic->max_gic_vcpus = VGIC_V3_MAX_CPUS;
292 292
293 kvm_info("%s@%llx IRQ%d\n", vgic_node->name,293 kvm_info("%s@%llx IRQ%d\n", vgic_node->name,
294 vcpu_res.start, vgic->maint_irq);294 vcpu_res.start, vgic->maint_irq);

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