Pull x86 platform updates from Borislav Petkov: - Make sure PCI function 4 IDs of AMD family 0x19, models 0x60-0x7f are actually used in the amd_nb.c enumeration - Add support for extracting NUMA information from devicetree for Hyper-V usages - Add PCI device IDs for the new AMD MI300 AI accelerators - Annotate an array in struct uv_rtc_timer_head with the new __counted_by attribute - Rework UV's NMI action parameter handling * tag 'x86_platform_for_6.7_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/amd_nb: Use Family 19h Models 60h-7Fh Function 4 IDs x86/numa: Add Devicetree support x86/of: Move the x86_flattree_get_config() call out of x86_dtb_init() x86/amd_nb: Add AMD Family MI300 PCI IDs x86/platform/uv: Annotate struct uv_rtc_timer_head with __counted_by x86/platform/uv: Rework NMI "action" modparam handling
Unified · Split
| @@ -1534,6 +1534,7 @@ config NUMA · 1533 unmodified lines | ||
| 1534 | 1534 | depends on X86_64 || (X86_32 && HIGHMEM64G && X86_BIGSMP) |
| 1535 | 1535 | default y if X86_BIGSMP |
| 1536 | 1536 | select USE_PERCPU_NUMA_NODE_ID |
| 1537 | + select OF_NUMA if OF | |
| 1537 | 1538 | help |
| 1538 | 1539 | Enable NUMA (Non-Uniform Memory Access) support. |
| 1539 | 1540 | |
| @@ -31,6 +31,11 @@ static inline void x86_dtb_init(void) { } · 30 unmodified lines | ||
| 31 | 31 | #define of_ioapic 0 |
| 32 | 32 | #endif |
| 33 | 33 | |
| 34 | +#ifdef CONFIG_OF_EARLY_FLATTREE | |
| 35 | +void x86_flattree_get_config(void); | |
| 36 | +#else | |
| 37 | +static inline void x86_flattree_get_config(void) { } | |
| 38 | +#endif | |
| 34 | 39 | extern char cmd_line[COMMAND_LINE_SIZE]; |
| 35 | 40 | |
| 36 | 41 | #endif /* __ASSEMBLY__ */ |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | #define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a |
| 28 | 28 | #define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 |
| 29 | 29 | #define PCI_DEVICE_ID_AMD_MI200_ROOT 0x14bb |
| 30 | +#define PCI_DEVICE_ID_AMD_MI300_ROOT 0x14f8 | |
| 30 | 31 | |
| 31 | 32 | #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464 |
| 32 | 33 | #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec |
| @@ -43,6 +44,7 @@ · 10 unmodified lines | ||
| 43 | 44 | #define PCI_DEVICE_ID_AMD_19H_M78H_DF_F4 0x12fc |
| 44 | 45 | #define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4 0x12c4 |
| 45 | 46 | #define PCI_DEVICE_ID_AMD_MI200_DF_F4 0x14d4 |
| 47 | +#define PCI_DEVICE_ID_AMD_MI300_DF_F4 0x152c | |
| 46 | 48 | |
| 47 | 49 | /* Protect the PCI config register pairs used for SMN. */ |
| 48 | 50 | static DEFINE_MUTEX(smn_mutex); |
| @@ -62,6 +64,7 @@ static const struct pci_device_id amd_root_ids[] = { · 13 unmodified lines | ||
| 62 | 64 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_ROOT) }, |
| 63 | 65 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_ROOT) }, |
| 64 | 66 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_ROOT) }, |
| 67 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_ROOT) }, | |
| 65 | 68 | {} |
| 66 | 69 | }; |
| 67 | 70 | |
| @@ -93,6 +96,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = { · 25 unmodified lines | ||
| 93 | 96 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3) }, |
| 94 | 97 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3) }, |
| 95 | 98 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F3) }, |
| 99 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F3) }, | |
| 96 | 100 | {} |
| 97 | 101 | }; |
| 98 | 102 | |
| @@ -112,9 +116,13 @@ static const struct pci_device_id amd_nb_link_ids[] = { · 13 unmodified lines | ||
| 112 | 116 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) }, |
| 113 | 117 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) }, |
| 114 | 118 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) }, |
| 119 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F4) }, | |
| 120 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F4) }, | |
| 121 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M78H_DF_F4) }, | |
| 115 | 122 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) }, |
| 116 | 123 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_1AH_M00H_DF_F4) }, |
| 117 | 124 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI200_DF_F4) }, |
| 125 | + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_MI300_DF_F4) }, | |
| 118 | 126 | {} |
| 119 | 127 | }; |
| 120 | 128 | |
| @@ -278,7 +278,7 @@ static void __init dtb_apic_setup(void) · 277 unmodified lines | ||
| 278 | 278 | } |
| 279 | 279 | |
| 280 | 280 | #ifdef CONFIG_OF_EARLY_FLATTREE |
| 281 | −static void __init x86_flattree_get_config(void) | |
| 281 | +void __init x86_flattree_get_config(void) | |
| 282 | 282 | { |
| 283 | 283 | u32 size, map_len; |
| 284 | 284 | void *dt; |
| @@ -300,14 +300,10 @@ static void __init x86_flattree_get_config(void) · 15 unmodified lines | ||
| 300 | 300 | unflatten_and_copy_device_tree(); |
| 301 | 301 | early_memunmap(dt, map_len); |
| 302 | 302 | } |
| 303 | −#else | |
| 304 | −static inline void x86_flattree_get_config(void) { } | |
| 305 | 303 | #endif |
| 306 | 304 | |
| 307 | 305 | void __init x86_dtb_init(void) |
| 308 | 306 | { |
| 309 | − x86_flattree_get_config(); | |
| 310 | − | |
| 311 | 307 | if (!of_have_populated_dt()) |
| 312 | 308 | return; |
| 313 | 309 | |
| @@ -1217,6 +1217,8 @@ void __init setup_arch(char **cmdline_p) · 1216 unmodified lines | ||
| 1217 | 1217 | |
| 1218 | 1218 | early_acpi_boot_init(); |
| 1219 | 1219 | |
| 1220 | + x86_flattree_get_config(); | |
| 1221 | + | |
| 1220 | 1222 | initmem_init(); |
| 1221 | 1223 | dma_contiguous_reserve(max_pfn_mapped << PAGE_SHIFT); |
| 1222 | 1224 | |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #include <linux/acpi.h> |
| 4 | 4 | #include <linux/kernel.h> |
| 5 | 5 | #include <linux/mm.h> |
| 6 | +#include <linux/of.h> | |
| 6 | 7 | #include <linux/string.h> |
| 7 | 8 | #include <linux/init.h> |
| 8 | 9 | #include <linux/memblock.h> |
| @@ -733,6 +734,8 @@ void __init x86_numa_init(void) · 724 unmodified lines | ||
| 733 | 734 | if (!numa_init(amd_numa_init)) |
| 734 | 735 | return; |
| 735 | 736 | #endif |
| 737 | + if (acpi_disabled && !numa_init(of_numa_init)) | |
| 738 | + return; | |
| 736 | 739 | } |
| 737 | 740 | |
| 738 | 741 | numa_init(dummy_numa_init); |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <linux/sched.h> |
| 18 | 18 | #include <linux/sched/debug.h> |
| 19 | 19 | #include <linux/slab.h> |
| 20 | +#include <linux/string.h> | |
| 20 | 21 | #include <linux/clocksource.h> |
| 21 | 22 | |
| 22 | 23 | #include <asm/apic.h> |
| @@ -178,49 +179,56 @@ module_param_named(debug, uv_nmi_debug, int, 0644); · 155 unmodified lines | ||
| 178 | 179 | } while (0) |
| 179 | 180 | |
| 180 | 181 | /* Valid NMI Actions */ |
| 181 | −#define ACTION_LEN 16 | |
| 182 | −static struct nmi_action { | |
| 183 | − char *action; | |
| 184 | − char *desc; | |
| 185 | −} valid_acts[] = { | |
| 186 | − { "kdump", "do kernel crash dump" }, | |
| 187 | − { "dump", "dump process stack for each cpu" }, | |
| 188 | − { "ips", "dump Inst Ptr info for each cpu" }, | |
| 189 | − { "kdb", "enter KDB (needs kgdboc= assignment)" }, | |
| 190 | − { "kgdb", "enter KGDB (needs gdb target remote)" }, | |
| 191 | − { "health", "check if CPUs respond to NMI" }, | |
| 182 | +enum action_t { | |
| 183 | + nmi_act_kdump, | |
| 184 | + nmi_act_dump, | |
| 185 | + nmi_act_ips, | |
| 186 | + nmi_act_kdb, | |
| 187 | + nmi_act_kgdb, | |
| 188 | + nmi_act_health, | |
| 189 | + nmi_act_max | |
| 192 | 190 | }; |
| 193 | −typedef char action_t[ACTION_LEN]; | |
| 194 | −static action_t uv_nmi_action = { "dump" }; | |
| 191 | + | |
| 192 | +static const char * const actions[nmi_act_max] = { | |
| 193 | + [nmi_act_kdump] = "kdump", | |
| 194 | + [nmi_act_dump] = "dump", | |
| 195 | + [nmi_act_ips] = "ips", | |
| 196 | + [nmi_act_kdb] = "kdb", | |
| 197 | + [nmi_act_kgdb] = "kgdb", | |
| 198 | + [nmi_act_health] = "health", | |
| 199 | +}; | |
| 200 | + | |
| 201 | +static const char * const actions_desc[nmi_act_max] = { | |
| 202 | + [nmi_act_kdump] = "do kernel crash dump", | |
| 203 | + [nmi_act_dump] = "dump process stack for each cpu", | |
| 204 | + [nmi_act_ips] = "dump Inst Ptr info for each cpu", | |
| 205 | + [nmi_act_kdb] = "enter KDB (needs kgdboc= assignment)", | |
| 206 | + [nmi_act_kgdb] = "enter KGDB (needs gdb target remote)", | |
| 207 | + [nmi_act_health] = "check if CPUs respond to NMI", | |
| 208 | +}; | |
| 209 | + | |
| 210 | +static enum action_t uv_nmi_action = nmi_act_dump; | |
| 195 | 211 | |
| 196 | 212 | static int param_get_action(char *buffer, const struct kernel_param *kp) |
| 197 | 213 | { |
| 198 | − return sprintf(buffer, "%s\n", uv_nmi_action); | |
| 214 | + return sprintf(buffer, "%s\n", actions[uv_nmi_action]); | |
| 199 | 215 | } |
| 200 | 216 | |
| 201 | 217 | static int param_set_action(const char *val, const struct kernel_param *kp) |
| 202 | 218 | { |
| 203 | − int i; | |
| 204 | − int n = ARRAY_SIZE(valid_acts); | |
| 205 | − char arg[ACTION_LEN]; | |
| 206 | − | |
| 207 | − /* (remove possible '\n') */ | |
| 208 | − strscpy(arg, val, strnchrnul(val, sizeof(arg)-1, '\n') - val + 1); | |
| 209 | − | |
| 210 | − for (i = 0; i < n; i++) | |
| 211 | − if (!strcmp(arg, valid_acts[i].action)) | |
| 212 | − break; | |
| 219 | + int i, n = ARRAY_SIZE(actions); | |
| 213 | 220 | |
| 214 | − if (i < n) { | |
| 215 | − strscpy(uv_nmi_action, arg, sizeof(uv_nmi_action)); | |
| 216 | − pr_info("UV: New NMI action:%s\n", uv_nmi_action); | |
| 221 | + i = sysfs_match_string(actions, val); | |
| 222 | + if (i >= 0) { | |
| 223 | + uv_nmi_action = i; | |
| 224 | + pr_info("UV: New NMI action:%s\n", actions[i]); | |
| 217 | 225 | return 0; |
| 218 | 226 | } |
| 219 | 227 | |
| 220 | − pr_err("UV: Invalid NMI action:%s, valid actions are:\n", arg); | |
| 228 | + pr_err("UV: Invalid NMI action. Valid actions are:\n"); | |
| 221 | 229 | for (i = 0; i < n; i++) |
| 222 | − pr_err("UV: %-8s - %s\n", | |
| 223 | − valid_acts[i].action, valid_acts[i].desc); | |
| 230 | + pr_err("UV: %-8s - %s\n", actions[i], actions_desc[i]); | |
| 231 | + | |
| 224 | 232 | return -EINVAL; |
| 225 | 233 | } |
| 226 | 234 | |
| @@ -228,15 +236,10 @@ static const struct kernel_param_ops param_ops_action = { · 1 unmodified line | ||
| 228 | 236 | .get = param_get_action, |
| 229 | 237 | .set = param_set_action, |
| 230 | 238 | }; |
| 231 | −#define param_check_action(name, p) __param_check(name, p, action_t) | |
| 239 | +#define param_check_action(name, p) __param_check(name, p, enum action_t) | |
| 232 | 240 | |
| 233 | 241 | module_param_named(action, uv_nmi_action, action, 0644); |
| 234 | 242 | |
| 235 | −static inline bool uv_nmi_action_is(const char *action) | |
| 236 | −{ | |
| 237 | − return (strncmp(uv_nmi_action, action, strlen(action)) == 0); | |
| 238 | −} | |
| 239 | − | |
| 240 | 243 | /* Setup which NMI support is present in system */ |
| 241 | 244 | static void uv_nmi_setup_mmrs(void) |
| 242 | 245 | { |
| @@ -727,10 +730,10 @@ static void uv_nmi_dump_state_cpu(int cpu, struct pt_regs *regs) · 484 unmodified lines | ||
| 727 | 730 | if (cpu == 0) |
| 728 | 731 | uv_nmi_dump_cpu_ip_hdr(); |
| 729 | 732 | |
| 730 | − if (current->pid != 0 || !uv_nmi_action_is("ips")) | |
| 733 | + if (current->pid != 0 || uv_nmi_action != nmi_act_ips) | |
| 731 | 734 | uv_nmi_dump_cpu_ip(cpu, regs); |
| 732 | 735 | |
| 733 | − if (uv_nmi_action_is("dump")) { | |
| 736 | + if (uv_nmi_action == nmi_act_dump) { | |
| 734 | 737 | pr_info("UV:%sNMI process trace for CPU %d\n", dots, cpu); |
| 735 | 738 | show_regs(regs); |
| 736 | 739 | } |
| @@ -798,7 +801,7 @@ static void uv_nmi_dump_state(int cpu, struct pt_regs *regs, int master) · 61 unmodified lines | ||
| 798 | 801 | int saved_console_loglevel = console_loglevel; |
| 799 | 802 | |
| 800 | 803 | pr_alert("UV: tracing %s for %d CPUs from CPU %d\n", |
| 801 | − uv_nmi_action_is("ips") ? "IPs" : "processes", | |
| 804 | + uv_nmi_action == nmi_act_ips ? "IPs" : "processes", | |
| 802 | 805 | atomic_read(&uv_nmi_cpus_in_nmi), cpu); |
| 803 | 806 | |
| 804 | 807 | console_loglevel = uv_nmi_loglevel; |
| @@ -874,7 +877,7 @@ static inline int uv_nmi_kdb_reason(void) · 69 unmodified lines | ||
| 874 | 877 | static inline int uv_nmi_kdb_reason(void) |
| 875 | 878 | { |
| 876 | 879 | /* Ensure user is expecting to attach gdb remote */ |
| 877 | − if (uv_nmi_action_is("kgdb")) | |
| 880 | + if (uv_nmi_action == nmi_act_kgdb) | |
| 878 | 881 | return 0; |
| 879 | 882 | |
| 880 | 883 | pr_err("UV: NMI error: KDB is not enabled in this kernel\n"); |
| @@ -950,28 +953,35 @@ static int uv_handle_nmi(unsigned int reason, struct pt_regs *regs) · 69 unmodified lines | ||
| 950 | 953 | master = (atomic_read(&uv_nmi_cpu) == cpu); |
| 951 | 954 | |
| 952 | 955 | /* If NMI action is "kdump", then attempt to do it */ |
| 953 | − if (uv_nmi_action_is("kdump")) { | |
| 956 | + if (uv_nmi_action == nmi_act_kdump) { | |
| 954 | 957 | uv_nmi_kdump(cpu, master, regs); |
| 955 | 958 | |
| 956 | 959 | /* Unexpected return, revert action to "dump" */ |
| 957 | 960 | if (master) |
| 958 | − strscpy(uv_nmi_action, "dump", sizeof(uv_nmi_action)); | |
| 961 | + uv_nmi_action = nmi_act_dump; | |
| 959 | 962 | } |
| 960 | 963 | |
| 961 | 964 | /* Pause as all CPU's enter the NMI handler */ |
| 962 | 965 | uv_nmi_wait(master); |
| 963 | 966 | |
| 964 | 967 | /* Process actions other than "kdump": */ |
| 965 | − if (uv_nmi_action_is("health")) { | |
| 968 | + switch (uv_nmi_action) { | |
| 969 | + case nmi_act_health: | |
| 966 | 970 | uv_nmi_action_health(cpu, regs, master); |
| 967 | − } else if (uv_nmi_action_is("ips") || uv_nmi_action_is("dump")) { | |
| 971 | + break; | |
| 972 | + case nmi_act_ips: | |
| 973 | + case nmi_act_dump: | |
| 968 | 974 | uv_nmi_dump_state(cpu, regs, master); |
| 969 | − } else if (uv_nmi_action_is("kdb") || uv_nmi_action_is("kgdb")) { | |
| 975 | + break; | |
| 976 | + case nmi_act_kdb: | |
| 977 | + case nmi_act_kgdb: | |
| 970 | 978 | uv_call_kgdb_kdb(cpu, regs, master); |
| 971 | − } else { | |
| 979 | + break; | |
| 980 | + default: | |
| 972 | 981 | if (master) |
| 973 | − pr_alert("UV: unknown NMI action: %s\n", uv_nmi_action); | |
| 982 | + pr_alert("UV: unknown NMI action: %d\n", uv_nmi_action); | |
| 974 | 983 | uv_nmi_sync_exit(master); |
| 984 | + break; | |
| 975 | 985 | } |
| 976 | 986 | |
| 977 | 987 | /* Clear per_cpu "in_nmi" flag */ |
| @@ -53,7 +53,7 @@ struct uv_rtc_timer_head { · 52 unmodified lines | ||
| 53 | 53 | struct { |
| 54 | 54 | int lcpu; /* systemwide logical cpu number */ |
| 55 | 55 | u64 expires; /* next timer expiration for this cpu */ |
| 56 | − } cpu[]; | |
| 56 | + } cpu[] __counted_by(ncpus); | |
| 57 | 57 | }; |
| 58 | 58 | |
| 59 | 59 | /* |
| @@ -579,6 +579,7 @@ · 578 unmodified lines | ||
| 579 | 579 | #define PCI_DEVICE_ID_AMD_1AH_M00H_DF_F3 0x12c3 |
| 580 | 580 | #define PCI_DEVICE_ID_AMD_1AH_M20H_DF_F3 0x16fb |
| 581 | 581 | #define PCI_DEVICE_ID_AMD_MI200_DF_F3 0x14d3 |
| 582 | +#define PCI_DEVICE_ID_AMD_MI300_DF_F3 0x152b | |
| 582 | 583 | #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703 |
| 583 | 584 | #define PCI_DEVICE_ID_AMD_LANCE 0x2000 |
| 584 | 585 | #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001 |