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PCI/DPC: Add eDPC support

Add eDPC support. Get and print the RP PIO error information when the trigger condition is RP PIO error. For more information on eDPC, please see PCI Express Base Specification Revision 3.1, section 6.2.10.3, or view the PCI-SIG eDPC ECN here: https://pcisig.com/sites/default/files/specification_documents/ECN_Enhanced_DPC_2012-11-19_final.pdf

Dongdong Liu committed 9 years ago

Commit f20c4ea1 parent 16f73eb2 files · +172 −0Browse files

Showing the changes to include/uapi/linux (1 of 2 files). Show all

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include/uapi/linux/pci_regs.h+10−0
@@ -967,6 +967,7 @@ · 966 unmodified lines
967#define PCI_EXP_DPC_CAP_RP_EXT 0x20 /* Root Port Extensions for DPC */967#define PCI_EXP_DPC_CAP_RP_EXT 0x20 /* Root Port Extensions for DPC */
968#define PCI_EXP_DPC_CAP_POISONED_TLP 0x40 /* Poisoned TLP Egress Blocking Supported */968#define PCI_EXP_DPC_CAP_POISONED_TLP 0x40 /* Poisoned TLP Egress Blocking Supported */
969#define PCI_EXP_DPC_CAP_SW_TRIGGER 0x80 /* Software Triggering Supported */969#define PCI_EXP_DPC_CAP_SW_TRIGGER 0x80 /* Software Triggering Supported */
970#define PCI_EXP_DPC_RP_PIO_LOG_SIZE 0xF00 /* RP PIO log size */
970#define PCI_EXP_DPC_CAP_DL_ACTIVE 0x1000 /* ERR_COR signal on DL_Active supported */971#define PCI_EXP_DPC_CAP_DL_ACTIVE 0x1000 /* ERR_COR signal on DL_Active supported */
971 972
972#define PCI_EXP_DPC_CTL 6 /* DPC control */973#define PCI_EXP_DPC_CTL 6 /* DPC control */
@@ -980,6 +981,15 @@ · 7 unmodified lines
980 981
981#define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */982#define PCI_EXP_DPC_SOURCE_ID 10 /* DPC Source Identifier */
982 983
984#define PCI_EXP_DPC_RP_PIO_STATUS 0x0C /* RP PIO Status */
985#define PCI_EXP_DPC_RP_PIO_MASK 0x10 /* RP PIO MASK */
986#define PCI_EXP_DPC_RP_PIO_SEVERITY 0x14 /* RP PIO Severity */
987#define PCI_EXP_DPC_RP_PIO_SYSERROR 0x18 /* RP PIO SysError */
988#define PCI_EXP_DPC_RP_PIO_EXCEPTION 0x1C /* RP PIO Exception */
989#define PCI_EXP_DPC_RP_PIO_HEADER_LOG 0x20 /* RP PIO Header Log */
990#define PCI_EXP_DPC_RP_PIO_IMPSPEC_LOG 0x30 /* RP PIO ImpSpec Log */
991#define PCI_EXP_DPC_RP_PIO_TLPPREFIX_LOG 0x34 /* RP PIO TLP Prefix Log */
992
983/* Precision Time Measurement */993/* Precision Time Measurement */
984#define PCI_PTM_CAP 0x04 /* PTM Capability */994#define PCI_PTM_CAP 0x04 /* PTM Capability */
985#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */995#define PCI_PTM_CAP_REQ 0x00000001 /* Requester capable */

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