| @@ -7,6 +7,7 @@ · 6 unmodified lines |
| 7 | 7 | #include <linux/clk.h> |
| 8 | 8 | #include <linux/clkdev.h> |
| 9 | 9 | #include <linux/delay.h> |
| 10 | +#include <linux/list.h> |
| 10 | 11 | #include <linux/module.h> |
| 11 | 12 | #include <linux/platform_device.h> |
| 12 | 13 | #include <linux/pm_domain.h> |
| @@ -15,15 +16,47 @@ · 2 unmodified lines |
| 15 | 16 | #include <linux/of_address.h> |
| 16 | 17 | #include <linux/of_platform.h> |
| 17 | 18 | #include <linux/slab.h> |
| 19 | +#include <linux/sys_soc.h> |
| 18 | 20 | #include <linux/iopoll.h> |
| 19 | 21 | |
| 20 | 22 | #include <linux/platform_data/ti-sysc.h> |
| 21 | 23 | |
| 22 | 24 | #include <dt-bindings/bus/ti-sysc.h> |
| 23 | 25 | |
| 26 | +#define DIS_ISP BIT(2) |
| 27 | +#define DIS_IVA BIT(1) |
| 28 | +#define DIS_SGX BIT(0) |
| 29 | + |
| 30 | +#define SOC_FLAG(match, flag) { .machine = match, .data = (void *)(flag), } |
| 31 | + |
| 24 | 32 | #define MAX_MODULE_SOFTRESET_WAIT 10000 |
| 25 | 33 | |
| 26 | | −static const char * const reg_names[] = { "rev", "sysc", "syss", }; |
| 34 | +enum sysc_soc { |
| 35 | + SOC_UNKNOWN, |
| 36 | + SOC_2420, |
| 37 | + SOC_2430, |
| 38 | + SOC_3430, |
| 39 | + SOC_3630, |
| 40 | + SOC_4430, |
| 41 | + SOC_4460, |
| 42 | + SOC_4470, |
| 43 | + SOC_5430, |
| 44 | + SOC_AM3, |
| 45 | + SOC_AM4, |
| 46 | + SOC_DRA7, |
| 47 | +}; |
| 48 | + |
| 49 | +struct sysc_address { |
| 50 | + unsigned long base; |
| 51 | + struct list_head node; |
| 52 | +}; |
| 53 | + |
| 54 | +struct sysc_soc_info { |
| 55 | + unsigned long general_purpose:1; |
| 56 | + enum sysc_soc soc; |
| 57 | + struct mutex list_lock; /* disabled modules list lock */ |
| 58 | + struct list_head disabled_modules; |
| 59 | +}; |
| 27 | 60 | |
| 28 | 61 | enum sysc_clocks { |
| 29 | 62 | SYSC_FCK, |
| @@ -39,6 +72,8 @@ enum sysc_clocks { · 9 unmodified lines |
| 39 | 72 | SYSC_MAX_CLOCKS, |
| 40 | 73 | }; |
| 41 | 74 | |
| 75 | +static struct sysc_soc_info *sysc_soc; |
| 76 | +static const char * const reg_names[] = { "rev", "sysc", "syss", }; |
| 42 | 77 | static const char * const clock_names[SYSC_MAX_CLOCKS] = { |
| 43 | 78 | "fck", "ick", "opt0", "opt1", "opt2", "opt3", "opt4", |
| 44 | 79 | "opt5", "opt6", "opt7", |
| @@ -70,11 +105,13 @@ static const char * const clock_names[SYSC_MAX_CLOCKS] = { · 25 unmodified lines |
| 70 | 105 | * @child_needs_resume: runtime resume needed for child on resume from suspend |
| 71 | 106 | * @disable_on_idle: status flag used for disabling modules with resets |
| 72 | 107 | * @idle_work: work structure used to perform delayed idle on a module |
| 73 | | − * @clk_enable_quirk: module specific clock enable quirk |
| 74 | | − * @clk_disable_quirk: module specific clock disable quirk |
| 108 | + * @pre_reset_quirk: module specific pre-reset quirk |
| 109 | + * @post_reset_quirk: module specific post-reset quirk |
| 75 | 110 | * @reset_done_quirk: module specific reset done quirk |
| 76 | 111 | * @module_enable_quirk: module specific enable quirk |
| 77 | 112 | * @module_disable_quirk: module specific disable quirk |
| 113 | + * @module_unlock_quirk: module specific sysconfig unlock quirk |
| 114 | + * @module_lock_quirk: module specific sysconfig lock quirk |
| 78 | 115 | */ |
| 79 | 116 | struct sysc { |
| 80 | 117 | struct device *dev; |
| @@ -97,11 +134,13 @@ struct sysc { · 16 unmodified lines |
| 97 | 134 | unsigned int needs_resume:1; |
| 98 | 135 | unsigned int child_needs_resume:1; |
| 99 | 136 | struct delayed_work idle_work; |
| 100 | | − void (*clk_enable_quirk)(struct sysc *sysc); |
| 101 | | − void (*clk_disable_quirk)(struct sysc *sysc); |
| 137 | + void (*pre_reset_quirk)(struct sysc *sysc); |
| 138 | + void (*post_reset_quirk)(struct sysc *sysc); |
| 102 | 139 | void (*reset_done_quirk)(struct sysc *sysc); |
| 103 | 140 | void (*module_enable_quirk)(struct sysc *sysc); |
| 104 | 141 | void (*module_disable_quirk)(struct sysc *sysc); |
| 142 | + void (*module_unlock_quirk)(struct sysc *sysc); |
| 143 | + void (*module_lock_quirk)(struct sysc *sysc); |
| 105 | 144 | }; |
| 106 | 145 | |
| 107 | 146 | static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np, |
| @@ -624,7 +663,7 @@ static void sysc_check_one_child(struct sysc *ddata, · 516 unmodified lines |
| 624 | 663 | const char *name; |
| 625 | 664 | |
| 626 | 665 | name = of_get_property(np, "ti,hwmods", NULL); |
| 627 | | − if (name) |
| 666 | + if (name && !of_device_is_compatible(np, "ti,sysc")) |
| 628 | 667 | dev_warn(ddata->dev, "really a child ti,hwmods property?"); |
| 629 | 668 | |
| 630 | 669 | sysc_check_quirk_stdout(ddata, np); |
| @@ -861,6 +900,22 @@ static void sysc_show_registers(struct sysc *ddata) · 230 unmodified lines |
| 861 | 900 | buf); |
| 862 | 901 | } |
| 863 | 902 | |
| 903 | +/** |
| 904 | + * sysc_write_sysconfig - handle sysconfig quirks for register write |
| 905 | + * @ddata: device driver data |
| 906 | + * @value: register value |
| 907 | + */ |
| 908 | +static void sysc_write_sysconfig(struct sysc *ddata, u32 value) |
| 909 | +{ |
| 910 | + if (ddata->module_unlock_quirk) |
| 911 | + ddata->module_unlock_quirk(ddata); |
| 912 | + |
| 913 | + sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], value); |
| 914 | + |
| 915 | + if (ddata->module_lock_quirk) |
| 916 | + ddata->module_lock_quirk(ddata); |
| 917 | +} |
| 918 | + |
| 864 | 919 | #define SYSC_IDLE_MASK (SYSC_NR_IDLEMODES - 1) |
| 865 | 920 | #define SYSC_CLOCACT_ICK 2 |
| 866 | 921 | |
| @@ -907,7 +962,7 @@ static int sysc_enable_module(struct device *dev) · 40 unmodified lines |
| 907 | 962 | |
| 908 | 963 | reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift); |
| 909 | 964 | reg |= best_mode << regbits->sidle_shift; |
| 910 | | − sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 965 | + sysc_write_sysconfig(ddata, reg); |
| 911 | 966 | |
| 912 | 967 | set_midle: |
| 913 | 968 | /* Set MIDLE mode */ |
| @@ -926,14 +981,14 @@ set_midle: · 12 unmodified lines |
| 926 | 981 | |
| 927 | 982 | reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift); |
| 928 | 983 | reg |= best_mode << regbits->midle_shift; |
| 929 | | − sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 984 | + sysc_write_sysconfig(ddata, reg); |
| 930 | 985 | |
| 931 | 986 | set_autoidle: |
| 932 | 987 | /* Autoidle bit must enabled separately if available */ |
| 933 | 988 | if (regbits->autoidle_shift >= 0 && |
| 934 | 989 | ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) { |
| 935 | 990 | reg |= 1 << regbits->autoidle_shift; |
| 936 | | − sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 991 | + sysc_write_sysconfig(ddata, reg); |
| 937 | 992 | } |
| 938 | 993 | |
| 939 | 994 | if (ddata->module_enable_quirk) |
| @@ -991,7 +1046,7 @@ static int sysc_disable_module(struct device *dev) · 51 unmodified lines |
| 991 | 1046 | |
| 992 | 1047 | reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift); |
| 993 | 1048 | reg |= best_mode << regbits->midle_shift; |
| 994 | | − sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 1049 | + sysc_write_sysconfig(ddata, reg); |
| 995 | 1050 | |
| 996 | 1051 | set_sidle: |
| 997 | 1052 | /* Set SIDLE mode */ |
| @@ -1014,7 +1069,7 @@ set_sidle: · 16 unmodified lines |
| 1014 | 1069 | if (regbits->autoidle_shift >= 0 && |
| 1015 | 1070 | ddata->cfg.sysc_val & BIT(regbits->autoidle_shift)) |
| 1016 | 1071 | reg |= 1 << regbits->autoidle_shift; |
| 1017 | | − sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 1072 | + sysc_write_sysconfig(ddata, reg); |
| 1018 | 1073 | |
| 1019 | 1074 | return 0; |
| 1020 | 1075 | } |
| @@ -1216,16 +1271,16 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { · 195 unmodified lines |
| 1216 | 1271 | SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET), |
| 1217 | 1272 | SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff, |
| 1218 | 1273 | SYSC_QUIRK_LEGACY_IDLE), |
| 1219 | | − SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff, |
| 1274 | + SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x24, -ENODEV, 0x00000000, 0xffffffff, |
| 1220 | 1275 | SYSC_QUIRK_LEGACY_IDLE), |
| 1221 | | − SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff, |
| 1276 | + SYSC_QUIRK("smartreflex", 0, -ENODEV, 0x38, -ENODEV, 0x00000000, 0xffffffff, |
| 1222 | 1277 | SYSC_QUIRK_LEGACY_IDLE), |
| 1223 | 1278 | SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, |
| 1224 | 1279 | 0), |
| 1225 | 1280 | /* Some timers on omap4 and later */ |
| 1226 | | − SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff, |
| 1281 | + SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x50002100, 0xffffffff, |
| 1227 | 1282 | 0), |
| 1228 | | − SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff, |
| 1283 | + SYSC_QUIRK("timer", 0, 0, 0x10, -ENODEV, 0x4fff1301, 0xffff00ff, |
| 1229 | 1284 | 0), |
| 1230 | 1285 | SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff, |
| 1231 | 1286 | SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), |
| @@ -1238,19 +1293,27 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { · 6 unmodified lines |
| 1238 | 1293 | SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), |
| 1239 | 1294 | |
| 1240 | 1295 | /* Quirks that need to be set based on the module address */ |
| 1241 | | − SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -1, 0x50000800, 0xffffffff, |
| 1296 | + SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff, |
| 1242 | 1297 | SYSC_QUIRK_EXT_OPT_CLOCK | SYSC_QUIRK_NO_RESET_ON_INIT | |
| 1243 | 1298 | SYSC_QUIRK_SWSUP_SIDLE), |
| 1244 | 1299 | |
| 1245 | 1300 | /* Quirks that need to be set based on detected module */ |
| 1246 | | − SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, |
| 1301 | + SYSC_QUIRK("aess", 0, 0, 0x10, -ENODEV, 0x40000000, 0xffffffff, |
| 1247 | 1302 | SYSC_MODULE_QUIRK_AESS), |
| 1248 | | − SYSC_QUIRK("dcan", 0x48480000, 0x20, -1, -1, 0xa3170504, 0xffffffff, |
| 1303 | + SYSC_QUIRK("dcan", 0x48480000, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, |
| 1249 | 1304 | SYSC_QUIRK_CLKDM_NOAUTO), |
| 1250 | | − SYSC_QUIRK("dwc3", 0x48880000, 0, 0x10, -1, 0x500a0200, 0xffffffff, |
| 1305 | + SYSC_QUIRK("dss", 0x4832a000, 0, 0x10, 0x14, 0x00000020, 0xffffffff, |
| 1306 | + SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET), |
| 1307 | + SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000040, 0xffffffff, |
| 1308 | + SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET), |
| 1309 | + SYSC_QUIRK("dss", 0x58000000, 0, -ENODEV, 0x14, 0x00000061, 0xffffffff, |
| 1310 | + SYSC_QUIRK_OPT_CLKS_IN_RESET | SYSC_MODULE_QUIRK_DSS_RESET), |
| 1311 | + SYSC_QUIRK("dwc3", 0x48880000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff, |
| 1251 | 1312 | SYSC_QUIRK_CLKDM_NOAUTO), |
| 1252 | | − SYSC_QUIRK("dwc3", 0x488c0000, 0, 0x10, -1, 0x500a0200, 0xffffffff, |
| 1313 | + SYSC_QUIRK("dwc3", 0x488c0000, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff, |
| 1253 | 1314 | SYSC_QUIRK_CLKDM_NOAUTO), |
| 1315 | + SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50030200, 0xffffffff, |
| 1316 | + SYSC_QUIRK_OPT_CLKS_NEEDED), |
| 1254 | 1317 | SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, |
| 1255 | 1318 | SYSC_MODULE_QUIRK_HDQ1W), |
| 1256 | 1319 | SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff, |
| @@ -1263,71 +1326,91 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { · 6 unmodified lines |
| 1263 | 1326 | SYSC_MODULE_QUIRK_I2C), |
| 1264 | 1327 | SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffff0f0, |
| 1265 | 1328 | SYSC_MODULE_QUIRK_I2C), |
| 1266 | | − SYSC_QUIRK("gpu", 0x50000000, 0x14, -1, -1, 0x00010201, 0xffffffff, 0), |
| 1267 | | − SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, |
| 1329 | + SYSC_QUIRK("gpu", 0x50000000, 0x14, -ENODEV, -ENODEV, 0x00010201, 0xffffffff, 0), |
| 1330 | + SYSC_QUIRK("gpu", 0x50000000, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff, |
| 1268 | 1331 | SYSC_MODULE_QUIRK_SGX), |
| 1332 | + SYSC_QUIRK("rtc", 0, 0x74, 0x78, -ENODEV, 0x4eb01908, 0xffff00f0, |
| 1333 | + SYSC_MODULE_QUIRK_RTC_UNLOCK), |
| 1334 | + SYSC_QUIRK("tptc", 0, 0, 0x10, -ENODEV, 0x40006c00, 0xffffefff, |
| 1335 | + SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), |
| 1336 | + SYSC_QUIRK("tptc", 0, 0, -ENODEV, -ENODEV, 0x40007c00, 0xffffffff, |
| 1337 | + SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), |
| 1269 | 1338 | SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050, |
| 1270 | 1339 | 0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), |
| 1271 | | − SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -1, 0x4ea2080d, 0xffffffff, |
| 1340 | + SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff, |
| 1272 | 1341 | SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), |
| 1273 | 1342 | SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, |
| 1274 | 1343 | SYSC_MODULE_QUIRK_WDT), |
| 1344 | + /* PRUSS on am3, am4 and am5 */ |
| 1345 | + SYSC_QUIRK("pruss", 0, 0x26000, 0x26004, -ENODEV, 0x47000000, 0xff000000, |
| 1346 | + SYSC_MODULE_QUIRK_PRUSS), |
| 1275 | 1347 | /* Watchdog on am3 and am4 */ |
| 1276 | 1348 | SYSC_QUIRK("wdt", 0x44e35000, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, |
| 1277 | 1349 | SYSC_MODULE_QUIRK_WDT | SYSC_QUIRK_SWSUP_SIDLE), |
| 1278 | 1350 | |
| 1279 | 1351 | #ifdef DEBUG |
| 1280 | | − SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0), |
| 1281 | | − SYSC_QUIRK("atl", 0, 0, -1, -1, 0x0a070100, 0xffffffff, 0), |
| 1282 | | − SYSC_QUIRK("cm", 0, 0, -1, -1, 0x40000301, 0xffffffff, 0), |
| 1283 | | − SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0), |
| 1352 | + SYSC_QUIRK("adc", 0, 0, 0x10, -ENODEV, 0x47300001, 0xffffffff, 0), |
| 1353 | + SYSC_QUIRK("atl", 0, 0, -ENODEV, -ENODEV, 0x0a070100, 0xffffffff, 0), |
| 1354 | + SYSC_QUIRK("cm", 0, 0, -ENODEV, -ENODEV, 0x40000301, 0xffffffff, 0), |
| 1355 | + SYSC_QUIRK("control", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0), |
| 1284 | 1356 | SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902, |
| 1285 | 1357 | 0xffff00f0, 0), |
| 1286 | | − SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0xa3170504, 0xffffffff, 0), |
| 1287 | | − SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0), |
| 1288 | | − SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0), |
| 1289 | | − SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), |
| 1358 | + SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0xa3170504, 0xffffffff, 0), |
| 1359 | + SYSC_QUIRK("dcan", 0, 0x20, -ENODEV, -ENODEV, 0x4edb1902, 0xffffffff, 0), |
| 1360 | + SYSC_QUIRK("dispc", 0x4832a400, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0), |
| 1361 | + SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0), |
| 1362 | + SYSC_QUIRK("dispc", 0x58001000, 0, 0x10, 0x14, 0x00000051, 0xffffffff, 0), |
| 1363 | + SYSC_QUIRK("dmic", 0, 0, 0x10, -ENODEV, 0x50010000, 0xffffffff, 0), |
| 1364 | + SYSC_QUIRK("dsi", 0x58004000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0), |
| 1365 | + SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000030, 0xffffffff, 0), |
| 1366 | + SYSC_QUIRK("dsi", 0x58005000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0), |
| 1367 | + SYSC_QUIRK("dsi", 0x58009000, 0, 0x10, 0x14, 0x00000040, 0xffffffff, 0), |
| 1368 | + SYSC_QUIRK("dwc3", 0, 0, 0x10, -ENODEV, 0x500a0200, 0xffffffff, 0), |
| 1290 | 1369 | SYSC_QUIRK("d2d", 0x4a0b6000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0), |
| 1291 | 1370 | SYSC_QUIRK("d2d", 0x4a0cd000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0), |
| 1292 | | − SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0), |
| 1293 | | − SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0), |
| 1294 | | − SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -1, 0x40000000 , 0xffffffff, 0), |
| 1371 | + SYSC_QUIRK("epwmss", 0, 0, 0x4, -ENODEV, 0x47400001, 0xffffffff, 0), |
| 1372 | + SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -ENODEV, 0, 0, 0), |
| 1373 | + SYSC_QUIRK("gpu", 0, 0xfe00, 0xfe10, -ENODEV, 0x40000000 , 0xffffffff, 0), |
| 1374 | + SYSC_QUIRK("hdmi", 0, 0, 0x10, -ENODEV, 0x50031d00, 0xffffffff, 0), |
| 1295 | 1375 | SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0), |
| 1296 | | − SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0), |
| 1297 | | − SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0), |
| 1298 | | − SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0), |
| 1299 | | − SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44307b02, 0xffffffff, 0), |
| 1300 | | − SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0), |
| 1301 | | − SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffff00ff, 0), |
| 1376 | + SYSC_QUIRK("iss", 0, 0, 0x10, -ENODEV, 0x40000101, 0xffffffff, 0), |
| 1377 | + SYSC_QUIRK("lcdc", 0, 0, 0x54, -ENODEV, 0x4f201000, 0xffffffff, 0), |
| 1378 | + SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44306302, 0xffffffff, 0), |
| 1379 | + SYSC_QUIRK("mcasp", 0, 0, 0x4, -ENODEV, 0x44307b02, 0xffffffff, 0), |
| 1380 | + SYSC_QUIRK("mcbsp", 0, -ENODEV, 0x8c, -ENODEV, 0, 0, 0), |
| 1381 | + SYSC_QUIRK("mcspi", 0, 0, 0x10, -ENODEV, 0x40300a0b, 0xffff00ff, 0), |
| 1302 | 1382 | SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0), |
| 1303 | | − SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0), |
| 1304 | | − SYSC_QUIRK("m3", 0, 0, -1, -1, 0x5f580105, 0x0fff0f00, 0), |
| 1383 | + SYSC_QUIRK("mailbox", 0, 0, 0x10, -ENODEV, 0x00000400, 0xffffffff, 0), |
| 1384 | + SYSC_QUIRK("m3", 0, 0, -ENODEV, -ENODEV, 0x5f580105, 0x0fff0f00, 0), |
| 1305 | 1385 | SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xfffffff0, 0), |
| 1306 | | − SYSC_QUIRK("ocp2scp", 0, 0, -1, -1, 0x50060007, 0xffffffff, 0), |
| 1307 | | − SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 0), |
| 1308 | | − SYSC_QUIRK("padconf", 0, 0, -1, -1, 0x40001100, 0xffffffff, 0), |
| 1309 | | − SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 0), |
| 1310 | | − SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x00004102, 0xffffffff, 0), |
| 1311 | | − SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000400, 0xffffffff, 0), |
| 1312 | | − SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0), |
| 1313 | | − SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4e8b0100, 0xffffffff, 0), |
| 1314 | | − SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4f000100, 0xffffffff, 0), |
| 1315 | | − SYSC_QUIRK("scm", 0, 0, -1, -1, 0x40000900, 0xffffffff, 0), |
| 1316 | | − SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 0), |
| 1317 | | − SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffff0ff0, 0), |
| 1386 | + SYSC_QUIRK("ocp2scp", 0, 0, -ENODEV, -ENODEV, 0x50060007, 0xffffffff, 0), |
| 1387 | + SYSC_QUIRK("padconf", 0, 0, 0x10, -ENODEV, 0x4fff0800, 0xffffffff, 0), |
| 1388 | + SYSC_QUIRK("padconf", 0, 0, -ENODEV, -ENODEV, 0x40001100, 0xffffffff, 0), |
| 1389 | + SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000100, 0xffffffff, 0), |
| 1390 | + SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x00004102, 0xffffffff, 0), |
| 1391 | + SYSC_QUIRK("prcm", 0, 0, -ENODEV, -ENODEV, 0x40000400, 0xffffffff, 0), |
| 1392 | + SYSC_QUIRK("rfbi", 0x4832a800, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0), |
| 1393 | + SYSC_QUIRK("rfbi", 0x58002000, 0, 0x10, 0x14, 0x00000010, 0xffffffff, 0), |
| 1394 | + SYSC_QUIRK("scm", 0, 0, 0x10, -ENODEV, 0x40000900, 0xffffffff, 0), |
| 1395 | + SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4e8b0100, 0xffffffff, 0), |
| 1396 | + SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x4f000100, 0xffffffff, 0), |
| 1397 | + SYSC_QUIRK("scm", 0, 0, -ENODEV, -ENODEV, 0x40000900, 0xffffffff, 0), |
| 1398 | + SYSC_QUIRK("scrm", 0, 0, -ENODEV, -ENODEV, 0x00000010, 0xffffffff, 0), |
| 1399 | + SYSC_QUIRK("sdio", 0, 0, 0x10, -ENODEV, 0x40202301, 0xffff0ff0, 0), |
| 1318 | 1400 | SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0), |
| 1319 | 1401 | SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0), |
| 1320 | | − SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0), |
| 1321 | | − SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0), |
| 1322 | | − SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0), |
| 1323 | | − SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -1, 0x00000020, 0xffffffff, 0), |
| 1324 | | − SYSC_QUIRK("rtc", 0, 0x74, 0x78, -1, 0x4eb01908, 0xffff00f0, 0), |
| 1325 | | − SYSC_QUIRK("timer32k", 0, 0, 0x4, -1, 0x00000060, 0xffffffff, 0), |
| 1402 | + SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40000902, 0xffffffff, 0), |
| 1403 | + SYSC_QUIRK("slimbus", 0, 0, 0x10, -ENODEV, 0x40002903, 0xffffffff, 0), |
| 1404 | + SYSC_QUIRK("spinlock", 0, 0, 0x10, -ENODEV, 0x50020000, 0xffffffff, 0), |
| 1405 | + SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -ENODEV, 0x00000020, 0xffffffff, 0), |
| 1406 | + SYSC_QUIRK("timer32k", 0, 0, 0x4, -ENODEV, 0x00000060, 0xffffffff, 0), |
| 1407 | + SYSC_QUIRK("tpcc", 0, 0, -ENODEV, -ENODEV, 0x40014c00, 0xffffffff, 0), |
| 1326 | 1408 | SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0), |
| 1327 | 1409 | SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000008, 0xffffffff, 0), |
| 1328 | 1410 | SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0), |
| 1329 | | − SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -1, 0x50700101, 0xffffffff, 0), |
| 1330 | | − SYSC_QUIRK("vfpe", 0, 0, 0x104, -1, 0x4d001200, 0xffffffff, 0), |
| 1411 | + SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, -ENODEV, 0x50700101, 0xffffffff, 0), |
| 1412 | + SYSC_QUIRK("venc", 0x58003000, 0, -ENODEV, -ENODEV, 0x00000002, 0xffffffff, 0), |
| 1413 | + SYSC_QUIRK("vfpe", 0, 0, 0x104, -ENODEV, 0x4d001200, 0xffffffff, 0), |
| 1331 | 1414 | #endif |
| 1332 | 1415 | }; |
| 1333 | 1416 | |
| @@ -1349,16 +1432,13 @@ static void sysc_init_early_quirks(struct sysc *ddata) · 15 unmodified lines |
| 1349 | 1432 | if (q->base != ddata->module_pa) |
| 1350 | 1433 | continue; |
| 1351 | 1434 | |
| 1352 | | − if (q->rev_offset >= 0 && |
| 1353 | | − q->rev_offset != ddata->offsets[SYSC_REVISION]) |
| 1435 | + if (q->rev_offset != ddata->offsets[SYSC_REVISION]) |
| 1354 | 1436 | continue; |
| 1355 | 1437 | |
| 1356 | | − if (q->sysc_offset >= 0 && |
| 1357 | | − q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) |
| 1438 | + if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) |
| 1358 | 1439 | continue; |
| 1359 | 1440 | |
| 1360 | | − if (q->syss_offset >= 0 && |
| 1361 | | − q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) |
| 1441 | + if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) |
| 1362 | 1442 | continue; |
| 1363 | 1443 | |
| 1364 | 1444 | ddata->name = q->name; |
| @@ -1378,16 +1458,13 @@ static void sysc_init_revision_quirks(struct sysc *ddata) · 13 unmodified lines |
| 1378 | 1458 | if (q->base && q->base != ddata->module_pa) |
| 1379 | 1459 | continue; |
| 1380 | 1460 | |
| 1381 | | − if (q->rev_offset >= 0 && |
| 1382 | | − q->rev_offset != ddata->offsets[SYSC_REVISION]) |
| 1461 | + if (q->rev_offset != ddata->offsets[SYSC_REVISION]) |
| 1383 | 1462 | continue; |
| 1384 | 1463 | |
| 1385 | | − if (q->sysc_offset >= 0 && |
| 1386 | | − q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) |
| 1464 | + if (q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) |
| 1387 | 1465 | continue; |
| 1388 | 1466 | |
| 1389 | | − if (q->syss_offset >= 0 && |
| 1390 | | − q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) |
| 1467 | + if (q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) |
| 1391 | 1468 | continue; |
| 1392 | 1469 | |
| 1393 | 1470 | if (q->revision == ddata->revision || |
| @@ -1399,8 +1476,130 @@ static void sysc_init_revision_quirks(struct sysc *ddata) · 5 unmodified lines |
| 1399 | 1476 | } |
| 1400 | 1477 | } |
| 1401 | 1478 | |
| 1479 | +/* |
| 1480 | + * DSS needs dispc outputs disabled to reset modules. Returns mask of |
| 1481 | + * enabled DSS interrupts. Eventually we may be able to do this on |
| 1482 | + * dispc init rather than top-level DSS init. |
| 1483 | + */ |
| 1484 | +static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset, |
| 1485 | + bool disable) |
| 1486 | +{ |
| 1487 | + bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false; |
| 1488 | + const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1); |
| 1489 | + int manager_count; |
| 1490 | + bool framedonetv_irq; |
| 1491 | + u32 val, irq_mask = 0; |
| 1492 | + |
| 1493 | + switch (sysc_soc->soc) { |
| 1494 | + case SOC_2420 ... SOC_3630: |
| 1495 | + manager_count = 2; |
| 1496 | + framedonetv_irq = false; |
| 1497 | + break; |
| 1498 | + case SOC_4430 ... SOC_4470: |
| 1499 | + manager_count = 3; |
| 1500 | + break; |
| 1501 | + case SOC_5430: |
| 1502 | + case SOC_DRA7: |
| 1503 | + manager_count = 4; |
| 1504 | + break; |
| 1505 | + case SOC_AM4: |
| 1506 | + manager_count = 1; |
| 1507 | + break; |
| 1508 | + case SOC_UNKNOWN: |
| 1509 | + default: |
| 1510 | + return 0; |
| 1511 | + }; |
| 1512 | + |
| 1513 | + /* Remap the whole module range to be able to reset dispc outputs */ |
| 1514 | + devm_iounmap(ddata->dev, ddata->module_va); |
| 1515 | + ddata->module_va = devm_ioremap(ddata->dev, |
| 1516 | + ddata->module_pa, |
| 1517 | + ddata->module_size); |
| 1518 | + if (!ddata->module_va) |
| 1519 | + return -EIO; |
| 1520 | + |
| 1521 | + /* DISP_CONTROL */ |
| 1522 | + val = sysc_read(ddata, dispc_offset + 0x40); |
| 1523 | + lcd_en = val & lcd_en_mask; |
| 1524 | + digit_en = val & digit_en_mask; |
| 1525 | + if (lcd_en) |
| 1526 | + irq_mask |= BIT(0); /* FRAMEDONE */ |
| 1527 | + if (digit_en) { |
| 1528 | + if (framedonetv_irq) |
| 1529 | + irq_mask |= BIT(24); /* FRAMEDONETV */ |
| 1530 | + else |
| 1531 | + irq_mask |= BIT(2) | BIT(3); /* EVSYNC bits */ |
| 1532 | + } |
| 1533 | + if (disable & (lcd_en | digit_en)) |
| 1534 | + sysc_write(ddata, dispc_offset + 0x40, |
| 1535 | + val & ~(lcd_en_mask | digit_en_mask)); |
| 1536 | + |
| 1537 | + if (manager_count <= 2) |
| 1538 | + return irq_mask; |
| 1539 | + |
| 1540 | + /* DISPC_CONTROL2 */ |
| 1541 | + val = sysc_read(ddata, dispc_offset + 0x238); |
| 1542 | + lcd2_en = val & lcd_en_mask; |
| 1543 | + if (lcd2_en) |
| 1544 | + irq_mask |= BIT(22); /* FRAMEDONE2 */ |
| 1545 | + if (disable && lcd2_en) |
| 1546 | + sysc_write(ddata, dispc_offset + 0x238, |
| 1547 | + val & ~lcd_en_mask); |
| 1548 | + |
| 1549 | + if (manager_count <= 3) |
| 1550 | + return irq_mask; |
| 1551 | + |
| 1552 | + /* DISPC_CONTROL3 */ |
| 1553 | + val = sysc_read(ddata, dispc_offset + 0x848); |
| 1554 | + lcd3_en = val & lcd_en_mask; |
| 1555 | + if (lcd3_en) |
| 1556 | + irq_mask |= BIT(30); /* FRAMEDONE3 */ |
| 1557 | + if (disable && lcd3_en) |
| 1558 | + sysc_write(ddata, dispc_offset + 0x848, |
| 1559 | + val & ~lcd_en_mask); |
| 1560 | + |
| 1561 | + return irq_mask; |
| 1562 | +} |
| 1563 | + |
| 1564 | +/* DSS needs child outputs disabled and SDI registers cleared for reset */ |
| 1565 | +static void sysc_pre_reset_quirk_dss(struct sysc *ddata) |
| 1566 | +{ |
| 1567 | + const int dispc_offset = 0x1000; |
| 1568 | + int error; |
| 1569 | + u32 irq_mask, val; |
| 1570 | + |
| 1571 | + /* Get enabled outputs */ |
| 1572 | + irq_mask = sysc_quirk_dispc(ddata, dispc_offset, false); |
| 1573 | + if (!irq_mask) |
| 1574 | + return; |
| 1575 | + |
| 1576 | + /* Clear IRQSTATUS */ |
| 1577 | + sysc_write(ddata, dispc_offset + 0x18, irq_mask); |
| 1578 | + |
| 1579 | + /* Disable outputs */ |
| 1580 | + val = sysc_quirk_dispc(ddata, dispc_offset, true); |
| 1581 | + |
| 1582 | + /* Poll IRQSTATUS */ |
| 1583 | + error = readl_poll_timeout(ddata->module_va + dispc_offset + 0x18, |
| 1584 | + val, val != irq_mask, 100, 50); |
| 1585 | + if (error) |
| 1586 | + dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n", |
| 1587 | + __func__, val, irq_mask); |
| 1588 | + |
| 1589 | + if (sysc_soc->soc == SOC_3430) { |
| 1590 | + /* Clear DSS_SDI_CONTROL */ |
| 1591 | + sysc_write(ddata, 0x44, 0); |
| 1592 | + |
| 1593 | + /* Clear DSS_PLL_CONTROL */ |
| 1594 | + sysc_write(ddata, 0x48, 0); |
| 1595 | + } |
| 1596 | + |
| 1597 | + /* Clear DSS_CONTROL to switch DSS clock sources to PRCM if not */ |
| 1598 | + sysc_write(ddata, 0x40, 0); |
| 1599 | +} |
| 1600 | + |
| 1402 | 1601 | /* 1-wire needs module's internal clocks enabled for reset */ |
| 1403 | | −static void sysc_clk_enable_quirk_hdq1w(struct sysc *ddata) |
| 1602 | +static void sysc_pre_reset_quirk_hdq1w(struct sysc *ddata) |
| 1404 | 1603 | { |
| 1405 | 1604 | int offset = 0x0c; /* HDQ_CTRL_STATUS */ |
| 1406 | 1605 | u16 val; |
| @@ -1418,7 +1617,7 @@ static void sysc_module_enable_quirk_aess(struct sysc *ddata) · 11 unmodified lines |
| 1418 | 1617 | sysc_write(ddata, offset, 1); |
| 1419 | 1618 | } |
| 1420 | 1619 | |
| 1421 | | −/* I2C needs extra enable bit toggling for reset */ |
| 1620 | +/* I2C needs to be disabled for reset */ |
| 1422 | 1621 | static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable) |
| 1423 | 1622 | { |
| 1424 | 1623 | int offset; |
| @@ -1439,14 +1638,48 @@ static void sysc_clk_quirk_i2c(struct sysc *ddata, bool enable) · 14 unmodified lines |
| 1439 | 1638 | sysc_write(ddata, offset, val); |
| 1440 | 1639 | } |
| 1441 | 1640 | |
| 1442 | | −static void sysc_clk_enable_quirk_i2c(struct sysc *ddata) |
| 1641 | +static void sysc_pre_reset_quirk_i2c(struct sysc *ddata) |
| 1642 | +{ |
| 1643 | + sysc_clk_quirk_i2c(ddata, false); |
| 1644 | +} |
| 1645 | + |
| 1646 | +static void sysc_post_reset_quirk_i2c(struct sysc *ddata) |
| 1443 | 1647 | { |
| 1444 | 1648 | sysc_clk_quirk_i2c(ddata, true); |
| 1445 | 1649 | } |
| 1446 | 1650 | |
| 1447 | | −static void sysc_clk_disable_quirk_i2c(struct sysc *ddata) |
| 1651 | +/* RTC on am3 and 4 needs to be unlocked and locked for sysconfig */ |
| 1652 | +static void sysc_quirk_rtc(struct sysc *ddata, bool lock) |
| 1448 | 1653 | { |
| 1449 | | − sysc_clk_quirk_i2c(ddata, false); |
| 1654 | + u32 val, kick0_val = 0, kick1_val = 0; |
| 1655 | + unsigned long flags; |
| 1656 | + int error; |
| 1657 | + |
| 1658 | + if (!lock) { |
| 1659 | + kick0_val = 0x83e70b13; |
| 1660 | + kick1_val = 0x95a4f1e0; |
| 1661 | + } |
| 1662 | + |
| 1663 | + local_irq_save(flags); |
| 1664 | + /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */ |
| 1665 | + error = readl_poll_timeout(ddata->module_va + 0x44, val, |
| 1666 | + !(val & BIT(0)), 100, 50); |
| 1667 | + if (error) |
| 1668 | + dev_warn(ddata->dev, "rtc busy timeout\n"); |
| 1669 | + /* Now we have ~15 microseconds to read/write various registers */ |
| 1670 | + sysc_write(ddata, 0x6c, kick0_val); |
| 1671 | + sysc_write(ddata, 0x70, kick1_val); |
| 1672 | + local_irq_restore(flags); |
| 1673 | +} |
| 1674 | + |
| 1675 | +static void sysc_module_unlock_quirk_rtc(struct sysc *ddata) |
| 1676 | +{ |
| 1677 | + sysc_quirk_rtc(ddata, false); |
| 1678 | +} |
| 1679 | + |
| 1680 | +static void sysc_module_lock_quirk_rtc(struct sysc *ddata) |
| 1681 | +{ |
| 1682 | + sysc_quirk_rtc(ddata, true); |
| 1450 | 1683 | } |
| 1451 | 1684 | |
| 1452 | 1685 | /* 36xx SGX needs a quirk for to bypass OCP IPG interrupt logic */ |
| @@ -1482,20 +1715,30 @@ static void sysc_reset_done_quirk_wdt(struct sysc *ddata) · 29 unmodified lines |
| 1482 | 1715 | dev_warn(ddata->dev, "wdt disable step2 failed\n"); |
| 1483 | 1716 | } |
| 1484 | 1717 | |
| 1718 | +/* PRUSS needs to set MSTANDBY_INIT inorder to idle properly */ |
| 1719 | +static void sysc_module_disable_quirk_pruss(struct sysc *ddata) |
| 1720 | +{ |
| 1721 | + u32 reg; |
| 1722 | + |
| 1723 | + reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); |
| 1724 | + reg |= SYSC_PRUSS_STANDBY_INIT; |
| 1725 | + sysc_write(ddata, ddata->offsets[SYSC_SYSCONFIG], reg); |
| 1726 | +} |
| 1727 | + |
| 1485 | 1728 | static void sysc_init_module_quirks(struct sysc *ddata) |
| 1486 | 1729 | { |
| 1487 | 1730 | if (ddata->legacy_mode || !ddata->name) |
| 1488 | 1731 | return; |
| 1489 | 1732 | |
| 1490 | 1733 | if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_HDQ1W) { |
| 1491 | | − ddata->clk_enable_quirk = sysc_clk_enable_quirk_hdq1w; |
| 1734 | + ddata->pre_reset_quirk = sysc_pre_reset_quirk_hdq1w; |
| 1492 | 1735 | |
| 1493 | 1736 | return; |
| 1494 | 1737 | } |
| 1495 | 1738 | |
| 1496 | 1739 | if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_I2C) { |
| 1497 | | − ddata->clk_enable_quirk = sysc_clk_enable_quirk_i2c; |
| 1498 | | − ddata->clk_disable_quirk = sysc_clk_disable_quirk_i2c; |
| 1740 | + ddata->pre_reset_quirk = sysc_pre_reset_quirk_i2c; |
| 1741 | + ddata->post_reset_quirk = sysc_post_reset_quirk_i2c; |
| 1499 | 1742 | |
| 1500 | 1743 | return; |
| 1501 | 1744 | } |
| @@ -1503,6 +1746,16 @@ static void sysc_init_module_quirks(struct sysc *ddata) · 1 unmodified line |
| 1503 | 1746 | if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_AESS) |
| 1504 | 1747 | ddata->module_enable_quirk = sysc_module_enable_quirk_aess; |
| 1505 | 1748 | |
| 1749 | + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_DSS_RESET) |
| 1750 | + ddata->pre_reset_quirk = sysc_pre_reset_quirk_dss; |
| 1751 | + |
| 1752 | + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_RTC_UNLOCK) { |
| 1753 | + ddata->module_unlock_quirk = sysc_module_unlock_quirk_rtc; |
| 1754 | + ddata->module_lock_quirk = sysc_module_lock_quirk_rtc; |
| 1755 | + |
| 1756 | + return; |
| 1757 | + } |
| 1758 | + |
| 1506 | 1759 | if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_SGX) |
| 1507 | 1760 | ddata->module_enable_quirk = sysc_module_enable_quirk_sgx; |
| 1508 | 1761 | |
| @@ -1510,6 +1763,9 @@ static void sysc_init_module_quirks(struct sysc *ddata) · 1 unmodified line |
| 1510 | 1763 | ddata->reset_done_quirk = sysc_reset_done_quirk_wdt; |
| 1511 | 1764 | ddata->module_disable_quirk = sysc_reset_done_quirk_wdt; |
| 1512 | 1765 | } |
| 1766 | + |
| 1767 | + if (ddata->cfg.quirks & SYSC_MODULE_QUIRK_PRUSS) |
| 1768 | + ddata->module_disable_quirk = sysc_module_disable_quirk_pruss; |
| 1513 | 1769 | } |
| 1514 | 1770 | |
| 1515 | 1771 | static int sysc_clockdomain_init(struct sysc *ddata) |
| @@ -1571,7 +1827,7 @@ static int sysc_reset(struct sysc *ddata) · 55 unmodified lines |
| 1571 | 1827 | sysc_offset = ddata->offsets[SYSC_SYSCONFIG]; |
| 1572 | 1828 | syss_offset = ddata->offsets[SYSC_SYSSTATUS]; |
| 1573 | 1829 | |
| 1574 | | − if (ddata->legacy_mode || sysc_offset < 0 || |
| 1830 | + if (ddata->legacy_mode || |
| 1575 | 1831 | ddata->cap->regbits->srst_shift < 0 || |
| 1576 | 1832 | ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) |
| 1577 | 1833 | return 0; |
| @@ -1583,19 +1839,21 @@ static int sysc_reset(struct sysc *ddata) · 5 unmodified lines |
| 1583 | 1839 | else |
| 1584 | 1840 | syss_done = ddata->cfg.syss_mask; |
| 1585 | 1841 | |
| 1586 | | − if (ddata->clk_disable_quirk) |
| 1587 | | − ddata->clk_disable_quirk(ddata); |
| 1842 | + if (ddata->pre_reset_quirk) |
| 1843 | + ddata->pre_reset_quirk(ddata); |
| 1588 | 1844 | |
| 1589 | | − sysc_val = sysc_read_sysconfig(ddata); |
| 1590 | | − sysc_val |= sysc_mask; |
| 1591 | | − sysc_write(ddata, sysc_offset, sysc_val); |
| 1845 | + if (sysc_offset >= 0) { |
| 1846 | + sysc_val = sysc_read_sysconfig(ddata); |
| 1847 | + sysc_val |= sysc_mask; |
| 1848 | + sysc_write(ddata, sysc_offset, sysc_val); |
| 1849 | + } |
| 1592 | 1850 | |
| 1593 | 1851 | if (ddata->cfg.srst_udelay) |
| 1594 | 1852 | usleep_range(ddata->cfg.srst_udelay, |
| 1595 | 1853 | ddata->cfg.srst_udelay * 2); |
| 1596 | 1854 | |
| 1597 | | − if (ddata->clk_enable_quirk) |
| 1598 | | − ddata->clk_enable_quirk(ddata); |
| 1855 | + if (ddata->post_reset_quirk) |
| 1856 | + ddata->post_reset_quirk(ddata); |
| 1599 | 1857 | |
| 1600 | 1858 | /* Poll on reset status */ |
| 1601 | 1859 | if (syss_offset >= 0) { |
| @@ -2313,6 +2571,16 @@ static const struct sysc_capabilities sysc_dra7_mcan = { · 711 unmodified lines |
| 2313 | 2571 | .mod_quirks = SYSS_QUIRK_RESETDONE_INVERTED, |
| 2314 | 2572 | }; |
| 2315 | 2573 | |
| 2574 | +/* |
| 2575 | + * PRUSS found on some AM33xx, AM437x and AM57xx SoCs |
| 2576 | + */ |
| 2577 | +static const struct sysc_capabilities sysc_pruss = { |
| 2578 | + .type = TI_SYSC_PRUSS, |
| 2579 | + .sysc_mask = SYSC_PRUSS_STANDBY_INIT | SYSC_PRUSS_SUB_MWAIT, |
| 2580 | + .regbits = &sysc_regbits_omap4_simple, |
| 2581 | + .mod_quirks = SYSC_MODULE_QUIRK_PRUSS, |
| 2582 | +}; |
| 2583 | + |
| 2316 | 2584 | static int sysc_init_pdata(struct sysc *ddata) |
| 2317 | 2585 | { |
| 2318 | 2586 | struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); |
| @@ -2386,6 +2654,154 @@ static void ti_sysc_idle(struct work_struct *work) · 67 unmodified lines |
| 2386 | 2654 | pm_runtime_put_sync(ddata->dev); |
| 2387 | 2655 | } |
| 2388 | 2656 | |
| 2657 | +/* |
| 2658 | + * SoC model and features detection. Only needed for SoCs that need |
| 2659 | + * special handling for quirks, no need to list others. |
| 2660 | + */ |
| 2661 | +static const struct soc_device_attribute sysc_soc_match[] = { |
| 2662 | + SOC_FLAG("OMAP242*", SOC_2420), |
| 2663 | + SOC_FLAG("OMAP243*", SOC_2430), |
| 2664 | + SOC_FLAG("OMAP3[45]*", SOC_3430), |
| 2665 | + SOC_FLAG("OMAP3[67]*", SOC_3630), |
| 2666 | + SOC_FLAG("OMAP443*", SOC_4430), |
| 2667 | + SOC_FLAG("OMAP446*", SOC_4460), |
| 2668 | + SOC_FLAG("OMAP447*", SOC_4470), |
| 2669 | + SOC_FLAG("OMAP54*", SOC_5430), |
| 2670 | + SOC_FLAG("AM433", SOC_AM3), |
| 2671 | + SOC_FLAG("AM43*", SOC_AM4), |
| 2672 | + SOC_FLAG("DRA7*", SOC_DRA7), |
| 2673 | + |
| 2674 | + { /* sentinel */ }, |
| 2675 | +}; |
| 2676 | + |
| 2677 | +/* |
| 2678 | + * List of SoCs variants with disabled features. By default we assume all |
| 2679 | + * devices in the device tree are available so no need to list those SoCs. |
| 2680 | + */ |
| 2681 | +static const struct soc_device_attribute sysc_soc_feat_match[] = { |
| 2682 | + /* OMAP3430/3530 and AM3517 variants with some accelerators disabled */ |
| 2683 | + SOC_FLAG("AM3505", DIS_SGX), |
| 2684 | + SOC_FLAG("OMAP3525", DIS_SGX), |
| 2685 | + SOC_FLAG("OMAP3515", DIS_IVA | DIS_SGX), |
| 2686 | + SOC_FLAG("OMAP3503", DIS_ISP | DIS_IVA | DIS_SGX), |
| 2687 | + |
| 2688 | + /* OMAP3630/DM3730 variants with some accelerators disabled */ |
| 2689 | + SOC_FLAG("AM3703", DIS_IVA | DIS_SGX), |
| 2690 | + SOC_FLAG("DM3725", DIS_SGX), |
| 2691 | + SOC_FLAG("OMAP3611", DIS_ISP | DIS_IVA | DIS_SGX), |
| 2692 | + SOC_FLAG("OMAP3615/AM3715", DIS_IVA), |
| 2693 | + SOC_FLAG("OMAP3621", DIS_ISP), |
| 2694 | + |
| 2695 | + { /* sentinel */ }, |
| 2696 | +}; |
| 2697 | + |
| 2698 | +static int sysc_add_disabled(unsigned long base) |
| 2699 | +{ |
| 2700 | + struct sysc_address *disabled_module; |
| 2701 | + |
| 2702 | + disabled_module = kzalloc(sizeof(*disabled_module), GFP_KERNEL); |
| 2703 | + if (!disabled_module) |
| 2704 | + return -ENOMEM; |
| 2705 | + |
| 2706 | + disabled_module->base = base; |
| 2707 | + |
| 2708 | + mutex_lock(&sysc_soc->list_lock); |
| 2709 | + list_add(&disabled_module->node, &sysc_soc->disabled_modules); |
| 2710 | + mutex_unlock(&sysc_soc->list_lock); |
| 2711 | + |
| 2712 | + return 0; |
| 2713 | +} |
| 2714 | + |
| 2715 | +/* |
| 2716 | + * One time init to detect the booted SoC and disable unavailable features. |
| 2717 | + * Note that we initialize static data shared across all ti-sysc instances |
| 2718 | + * so ddata is only used for SoC type. This can be called from module_init |
| 2719 | + * once we no longer need to rely on platform data. |
| 2720 | + */ |
| 2721 | +static int sysc_init_soc(struct sysc *ddata) |
| 2722 | +{ |
| 2723 | + const struct soc_device_attribute *match; |
| 2724 | + struct ti_sysc_platform_data *pdata; |
| 2725 | + unsigned long features = 0; |
| 2726 | + |
| 2727 | + if (sysc_soc) |
| 2728 | + return 0; |
| 2729 | + |
| 2730 | + sysc_soc = kzalloc(sizeof(*sysc_soc), GFP_KERNEL); |
| 2731 | + if (!sysc_soc) |
| 2732 | + return -ENOMEM; |
| 2733 | + |
| 2734 | + mutex_init(&sysc_soc->list_lock); |
| 2735 | + INIT_LIST_HEAD(&sysc_soc->disabled_modules); |
| 2736 | + sysc_soc->general_purpose = true; |
| 2737 | + |
| 2738 | + pdata = dev_get_platdata(ddata->dev); |
| 2739 | + if (pdata && pdata->soc_type_gp) |
| 2740 | + sysc_soc->general_purpose = pdata->soc_type_gp(); |
| 2741 | + |
| 2742 | + match = soc_device_match(sysc_soc_match); |
| 2743 | + if (match && match->data) |
| 2744 | + sysc_soc->soc = (int)match->data; |
| 2745 | + |
| 2746 | + match = soc_device_match(sysc_soc_feat_match); |
| 2747 | + if (!match) |
| 2748 | + return 0; |
| 2749 | + |
| 2750 | + if (match->data) |
| 2751 | + features = (unsigned long)match->data; |
| 2752 | + |
| 2753 | + /* |
| 2754 | + * Add disabled devices to the list based on the module base. |
| 2755 | + * Note that this must be done before we attempt to access the |
| 2756 | + * device and have module revision checks working. |
| 2757 | + */ |
| 2758 | + if (features & DIS_ISP) |
| 2759 | + sysc_add_disabled(0x480bd400); |
| 2760 | + if (features & DIS_IVA) |
| 2761 | + sysc_add_disabled(0x5d000000); |
| 2762 | + if (features & DIS_SGX) |
| 2763 | + sysc_add_disabled(0x50000000); |
| 2764 | + |
| 2765 | + return 0; |
| 2766 | +} |
| 2767 | + |
| 2768 | +static void sysc_cleanup_soc(void) |
| 2769 | +{ |
| 2770 | + struct sysc_address *disabled_module; |
| 2771 | + struct list_head *pos, *tmp; |
| 2772 | + |
| 2773 | + if (!sysc_soc) |
| 2774 | + return; |
| 2775 | + |
| 2776 | + mutex_lock(&sysc_soc->list_lock); |
| 2777 | + list_for_each_safe(pos, tmp, &sysc_soc->disabled_modules) { |
| 2778 | + disabled_module = list_entry(pos, struct sysc_address, node); |
| 2779 | + list_del(pos); |
| 2780 | + kfree(disabled_module); |
| 2781 | + } |
| 2782 | + mutex_unlock(&sysc_soc->list_lock); |
| 2783 | +} |
| 2784 | + |
| 2785 | +static int sysc_check_disabled_devices(struct sysc *ddata) |
| 2786 | +{ |
| 2787 | + struct sysc_address *disabled_module; |
| 2788 | + struct list_head *pos; |
| 2789 | + int error = 0; |
| 2790 | + |
| 2791 | + mutex_lock(&sysc_soc->list_lock); |
| 2792 | + list_for_each(pos, &sysc_soc->disabled_modules) { |
| 2793 | + disabled_module = list_entry(pos, struct sysc_address, node); |
| 2794 | + if (ddata->module_pa == disabled_module->base) { |
| 2795 | + dev_dbg(ddata->dev, "module disabled for this SoC\n"); |
| 2796 | + error = -ENODEV; |
| 2797 | + break; |
| 2798 | + } |
| 2799 | + } |
| 2800 | + mutex_unlock(&sysc_soc->list_lock); |
| 2801 | + |
| 2802 | + return error; |
| 2803 | +} |
| 2804 | + |
| 2389 | 2805 | static const struct of_device_id sysc_match_table[] = { |
| 2390 | 2806 | { .compatible = "simple-bus", }, |
| 2391 | 2807 | { /* sentinel */ }, |
| @@ -2404,6 +2820,10 @@ static int sysc_probe(struct platform_device *pdev) · 12 unmodified lines |
| 2404 | 2820 | ddata->dev = &pdev->dev; |
| 2405 | 2821 | platform_set_drvdata(pdev, ddata); |
| 2406 | 2822 | |
| 2823 | + error = sysc_init_soc(ddata); |
| 2824 | + if (error) |
| 2825 | + return error; |
| 2826 | + |
| 2407 | 2827 | error = sysc_init_match(ddata); |
| 2408 | 2828 | if (error) |
| 2409 | 2829 | return error; |
| @@ -2434,6 +2854,10 @@ static int sysc_probe(struct platform_device *pdev) · 24 unmodified lines |
| 2434 | 2854 | |
| 2435 | 2855 | sysc_init_early_quirks(ddata); |
| 2436 | 2856 | |
| 2857 | + error = sysc_check_disabled_devices(ddata); |
| 2858 | + if (error) |
| 2859 | + return error; |
| 2860 | + |
| 2437 | 2861 | error = sysc_get_clocks(ddata); |
| 2438 | 2862 | if (error) |
| 2439 | 2863 | return error; |
| @@ -2538,6 +2962,7 @@ static const struct of_device_id sysc_match[] = { · 98 unmodified lines |
| 2538 | 2962 | { .compatible = "ti,sysc-usb-host-fs", |
| 2539 | 2963 | .data = &sysc_omap4_usb_host_fs, }, |
| 2540 | 2964 | { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, }, |
| 2965 | + { .compatible = "ti,sysc-pruss", .data = &sysc_pruss, }, |
| 2541 | 2966 | { }, |
| 2542 | 2967 | }; |
| 2543 | 2968 | MODULE_DEVICE_TABLE(of, sysc_match); |
| @@ -2564,6 +2989,7 @@ static void __exit sysc_exit(void) · 20 unmodified lines |
| 2564 | 2989 | { |
| 2565 | 2990 | bus_unregister_notifier(&platform_bus_type, &sysc_nb); |
| 2566 | 2991 | platform_driver_unregister(&sysc_driver); |
| 2992 | + sysc_cleanup_soc(); |
| 2567 | 2993 | } |
| 2568 | 2994 | module_exit(sysc_exit); |
| 2569 | 2995 | |