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usb: ch9: Add USB 3.2 SSP attributes

In preparation for USB 3.2 dual-lane support, add sublink speed attribute macros and enum usb_ssp_rate. A USB device that operates in SuperSpeed Plus may operate at different speed and lane count. These additional macros and enum values help specifying that.

Thinh Nguyen committed 5 years ago

Commit f2fc9ff1 parent 7766caf2 files · +22 −0Browse files

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2 files
  1. include/linux/usb/ch9.h +9 −0
  2. include/uapi/linux/usb/ch9.h +13 −0
include/linux/usb/ch9.h+9−0
@@ -36,6 +36,15 @@ · 35 unmodified lines
36#include <linux/device.h>36#include <linux/device.h>
37#include <uapi/linux/usb/ch9.h>37#include <uapi/linux/usb/ch9.h>
38 38
39/* USB 3.2 SuperSpeed Plus phy signaling rate generation and lane count */
40
41enum usb_ssp_rate {
42 USB_SSP_GEN_UNKNOWN = 0,
43 USB_SSP_GEN_2x1,
44 USB_SSP_GEN_1x2,
45 USB_SSP_GEN_2x2,
46};
47
39/**48/**
40 * usb_ep_type_string() - Returns human readable-name of the endpoint type.49 * usb_ep_type_string() - Returns human readable-name of the endpoint type.
41 * @ep_type: The endpoint type to return human-readable name for. If it's not50 * @ep_type: The endpoint type to return human-readable name for. If it's not
include/uapi/linux/usb/ch9.h+13−0
@@ -968,9 +968,22 @@ struct usb_ssp_cap_descriptor { · 967 unmodified lines
968 __le32 bmSublinkSpeedAttr[1]; /* list of sublink speed attrib entries */968 __le32 bmSublinkSpeedAttr[1]; /* list of sublink speed attrib entries */
969#define USB_SSP_SUBLINK_SPEED_SSID (0xf) /* sublink speed ID */969#define USB_SSP_SUBLINK_SPEED_SSID (0xf) /* sublink speed ID */
970#define USB_SSP_SUBLINK_SPEED_LSE (0x3 << 4) /* Lanespeed exponent */970#define USB_SSP_SUBLINK_SPEED_LSE (0x3 << 4) /* Lanespeed exponent */
971#define USB_SSP_SUBLINK_SPEED_LSE_BPS 0
972#define USB_SSP_SUBLINK_SPEED_LSE_KBPS 1
973#define USB_SSP_SUBLINK_SPEED_LSE_MBPS 2
974#define USB_SSP_SUBLINK_SPEED_LSE_GBPS 3
975
971#define USB_SSP_SUBLINK_SPEED_ST (0x3 << 6) /* Sublink type */976#define USB_SSP_SUBLINK_SPEED_ST (0x3 << 6) /* Sublink type */
977#define USB_SSP_SUBLINK_SPEED_ST_SYM_RX 0
978#define USB_SSP_SUBLINK_SPEED_ST_ASYM_RX 1
979#define USB_SSP_SUBLINK_SPEED_ST_SYM_TX 2
980#define USB_SSP_SUBLINK_SPEED_ST_ASYM_TX 3
981
972#define USB_SSP_SUBLINK_SPEED_RSVD (0x3f << 8) /* Reserved */982#define USB_SSP_SUBLINK_SPEED_RSVD (0x3f << 8) /* Reserved */
973#define USB_SSP_SUBLINK_SPEED_LP (0x3 << 14) /* Link protocol */983#define USB_SSP_SUBLINK_SPEED_LP (0x3 << 14) /* Link protocol */
984#define USB_SSP_SUBLINK_SPEED_LP_SS 0
985#define USB_SSP_SUBLINK_SPEED_LP_SSP 1
986
974#define USB_SSP_SUBLINK_SPEED_LSM (0xff << 16) /* Lanespeed mantissa */987#define USB_SSP_SUBLINK_SPEED_LSM (0xff << 16) /* Lanespeed mantissa */
975} __attribute__((packed));988} __attribute__((packed));
976 989

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