Pull drm updates from Dave Airlie: "This is the main pull request for the drm for 4.3. Nouveau is probably the biggest amount of changes in here, since it missed 4.2. Highlights below, along with the usual bunch of fixes. All stuff outside drm should have applicable acks. Highlights: - new drivers: freescale dcu kms driver - core: more atomic fixes disable some dri1 interfaces on kms drivers drop fb panic handling, this was just getting more broken, as more locking was required. new core fbdev Kconfig support - instead of each driver enable/disabling it struct_mutex cleanups - panel: more new panels cleanup Kconfig - i915: Skylake support enabled by default legacy modesetting using atomic infrastructure Skylake fixes GEN9 workarounds - amdgpu: Fiji support CGS support for amdgpu Initial GPU scheduler - off by default Lots of bug fixes and optimisations. - radeon: DP fixes misc fixes - amdkfd: Add Carrizo support for amdkfd using amdgpu. - nouveau: long pending cleanup to complete driver, fully bisectable which makes it larger, perfmon work more reclocking improvements maxwell displayport fixes - vmwgfx: new DX device support, supports OpenGL 3.3 screen targets support - mgag200: G200eW support G200e new revision support - msm: dragonboard 410c support, msm8x94 support, msm8x74v1 support yuv format support dma plane support mdp5 rotation initial hdcp - sti: atomic support - exynos: lots of cleanups atomic modesetting/pageflipping support render node support - tegra: tegra210 support (dc, dsi, dp/hdmi) dpms with atomic modesetting support - atmel: support for 3 more atmel SoCs new input formats, PRIME support. - dwhdmi: preparing to add audio support - rockchip: yuv plane support" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (1369 commits) drm/amdgpu: rename gmc_v8_0_init_compute_vmid drm/amdgpu: fix vce3 instance handling drm/amdgpu: remove ib test for the second VCE Ring drm/amdgpu: properly enable VM fault interrupts drm/amdgpu: fix warning in scheduler drm/amdgpu: fix buffer placement under memory pressure drm/amdgpu/cz: fix cz_dpm_update_low_memory_pstate logic drm/amdgpu: fix typo in dce11 watermark setup drm/amdgpu: fix typo in dce10 watermark setup drm/amdgpu: use top down allocation for non-CPU accessible vram drm/amdgpu: be explicit about cpu vram access for driver BOs (v2) drm/amdgpu: set MEC doorbell range for Fiji drm/amdgpu: implement burst NOP for SDMA drm/amdgpu: add insert_nop ring func and default implementation drm/amdgpu: add amdgpu_get_sdma_instance helper function drm/amdgpu: add AMDGPU_MAX_SDMA_INSTANCES drm/amdgpu: add burst_nop flag for sdma drm/amdgpu: add count field for the SDMA NOP packet v2 drm/amdgpu: use PT for VM sync on unmap drm/amdgpu: make wait_event uninterruptible in push_job ...
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| @@ -34,6 +34,13 @@ · 33 unmodified lines | ||
| 34 | 34 | /* color index */ |
| 35 | 35 | #define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') /* [7:0] C */ |
| 36 | 36 | |
| 37 | +/* 8 bpp Red */ | |
| 38 | +#define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') /* [7:0] R */ | |
| 39 | + | |
| 40 | +/* 16 bpp RG */ | |
| 41 | +#define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') /* [15:0] R:G 8:8 little endian */ | |
| 42 | +#define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') /* [15:0] G:R 8:8 little endian */ | |
| 43 | + | |
| 37 | 44 | /* 8 bpp RGB */ |
| 38 | 45 | #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') /* [7:0] R:G:B 3:3:2 */ |
| 39 | 46 | #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') /* [7:0] B:G:R 2:3:3 */ |
| @@ -354,9 +354,15 @@ typedef struct drm_i915_irq_wait { · 353 unmodified lines | ||
| 354 | 354 | #define I915_PARAM_REVISION 32 |
| 355 | 355 | #define I915_PARAM_SUBSLICE_TOTAL 33 |
| 356 | 356 | #define I915_PARAM_EU_TOTAL 34 |
| 357 | +#define I915_PARAM_HAS_GPU_RESET 35 | |
| 358 | +#define I915_PARAM_HAS_RESOURCE_STREAMER 36 | |
| 357 | 359 | |
| 358 | 360 | typedef struct drm_i915_getparam { |
| 359 | − int param; | |
| 361 | + s32 param; | |
| 362 | + /* | |
| 363 | + * WARNING: Using pointers instead of fixed-size u64 means we need to write | |
| 364 | + * compat32 code. Don't repeat this mistake. | |
| 365 | + */ | |
| 360 | 366 | int __user *value; |
| 361 | 367 | } drm_i915_getparam_t; |
| 362 | 368 | |
| @@ -764,7 +770,12 @@ struct drm_i915_gem_execbuffer2 { · 401 unmodified lines | ||
| 764 | 770 | #define I915_EXEC_BSD_RING1 (1<<13) |
| 765 | 771 | #define I915_EXEC_BSD_RING2 (2<<13) |
| 766 | 772 | |
| 767 | −#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15) | |
| 773 | +/** Tell the kernel that the batchbuffer is processed by | |
| 774 | + * the resource streamer. | |
| 775 | + */ | |
| 776 | +#define I915_EXEC_RESOURCE_STREAMER (1<<15) | |
| 777 | + | |
| 778 | +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER<<1) | |
| 768 | 779 | |
| 769 | 780 | #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) |
| 770 | 781 | #define i915_execbuffer2_set_context_id(eb2, context) \ |
| @@ -1114,6 +1125,7 @@ struct drm_i915_gem_context_param { · 343 unmodified lines | ||
| 1114 | 1125 | __u32 size; |
| 1115 | 1126 | __u64 param; |
| 1116 | 1127 | #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 |
| 1128 | +#define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 | |
| 1117 | 1129 | __u64 value; |
| 1118 | 1130 | }; |
| 1119 | 1131 | |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | /************************************************************************** |
| 2 | 2 | * |
| 3 | − * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA | |
| 3 | + * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA | |
| 4 | 4 | * All Rights Reserved. |
| 5 | 5 | * |
| 6 | 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| @@ -64,6 +64,7 @@ · 57 unmodified lines | ||
| 64 | 64 | #define DRM_VMW_GB_SURFACE_CREATE 23 |
| 65 | 65 | #define DRM_VMW_GB_SURFACE_REF 24 |
| 66 | 66 | #define DRM_VMW_SYNCCPU 25 |
| 67 | +#define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 | |
| 67 | 68 | |
| 68 | 69 | /*************************************************************************/ |
| 69 | 70 | /** |
| @@ -88,6 +89,8 @@ · 18 unmodified lines | ||
| 88 | 89 | #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 |
| 89 | 90 | #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 |
| 90 | 91 | #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 |
| 92 | +#define DRM_VMW_PARAM_SCREEN_TARGET 11 | |
| 93 | +#define DRM_VMW_PARAM_DX 12 | |
| 91 | 94 | |
| 92 | 95 | /** |
| 93 | 96 | * enum drm_vmw_handle_type - handle type for ref ioctls |
| @@ -296,7 +299,7 @@ union drm_vmw_surface_reference_arg { · 202 unmodified lines | ||
| 296 | 299 | * Argument to the DRM_VMW_EXECBUF Ioctl. |
| 297 | 300 | */ |
| 298 | 301 | |
| 299 | −#define DRM_VMW_EXECBUF_VERSION 1 | |
| 302 | +#define DRM_VMW_EXECBUF_VERSION 2 | |
| 300 | 303 | |
| 301 | 304 | struct drm_vmw_execbuf_arg { |
| 302 | 305 | uint64_t commands; |
| @@ -305,6 +308,8 @@ struct drm_vmw_execbuf_arg { · 2 unmodified lines | ||
| 305 | 308 | uint64_t fence_rep; |
| 306 | 309 | uint32_t version; |
| 307 | 310 | uint32_t flags; |
| 311 | + uint32_t context_handle; | |
| 312 | + uint32_t pad64; | |
| 308 | 313 | }; |
| 309 | 314 | |
| 310 | 315 | /** |
| @@ -825,7 +830,6 @@ struct drm_vmw_update_layout_arg { · 514 unmodified lines | ||
| 825 | 830 | enum drm_vmw_shader_type { |
| 826 | 831 | drm_vmw_shader_type_vs = 0, |
| 827 | 832 | drm_vmw_shader_type_ps, |
| 828 | − drm_vmw_shader_type_gs | |
| 829 | 833 | }; |
| 830 | 834 | |
| 831 | 835 | |
| @@ -907,6 +911,8 @@ enum drm_vmw_surface_flags { · 75 unmodified lines | ||
| 907 | 911 | * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID |
| 908 | 912 | * if none. |
| 909 | 913 | * @base_size Size of the base mip level for all faces. |
| 914 | + * @array_size Must be zero for non-DX hardware, and if non-zero | |
| 915 | + * svga3d_flags must have proper bind flags setup. | |
| 910 | 916 | * |
| 911 | 917 | * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. |
| 912 | 918 | * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. |
| @@ -919,7 +925,7 @@ struct drm_vmw_gb_surface_create_req { · 6 unmodified lines | ||
| 919 | 925 | uint32_t multisample_count; |
| 920 | 926 | uint32_t autogen_filter; |
| 921 | 927 | uint32_t buffer_handle; |
| 922 | − uint32_t pad64; | |
| 928 | + uint32_t array_size; | |
| 923 | 929 | struct drm_vmw_size base_size; |
| 924 | 930 | }; |
| 925 | 931 | |
| @@ -1059,4 +1065,28 @@ struct drm_vmw_synccpu_arg { · 133 unmodified lines | ||
| 1059 | 1065 | uint32_t pad64; |
| 1060 | 1066 | }; |
| 1061 | 1067 | |
| 1068 | +/*************************************************************************/ | |
| 1069 | +/** | |
| 1070 | + * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context. | |
| 1071 | + * | |
| 1072 | + * Allocates a device unique context id, and queues a create context command | |
| 1073 | + * for the host. Does not wait for host completion. | |
| 1074 | + */ | |
| 1075 | +enum drm_vmw_extended_context { | |
| 1076 | + drm_vmw_context_legacy, | |
| 1077 | + drm_vmw_context_dx | |
| 1078 | +}; | |
| 1079 | + | |
| 1080 | +/** | |
| 1081 | + * union drm_vmw_extended_context_arg | |
| 1082 | + * | |
| 1083 | + * @req: Context type. | |
| 1084 | + * @rep: Context identifier. | |
| 1085 | + * | |
| 1086 | + * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl. | |
| 1087 | + */ | |
| 1088 | +union drm_vmw_extended_context_arg { | |
| 1089 | + enum drm_vmw_extended_context req; | |
| 1090 | + struct drm_vmw_context_arg rep; | |
| 1091 | +}; | |
| 1062 | 1092 | #endif |