Assuming a uniform mask across all slices, this enables userspace to determine the specific sub slices can be enabled. This information is required, for example, to be able to analyse some OA counter reports where the counter configuration depends on the HW sub slice configuration.
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| @@ -421,6 +421,11 @@ typedef struct drm_i915_irq_wait { · 420 unmodified lines | ||
| 421 | 421 | /* Query the mask of slices available for this system */ |
| 422 | 422 | #define I915_PARAM_SLICE_MASK 46 |
| 423 | 423 | |
| 424 | +/* Assuming it's uniform for each slice, this queries the mask of subslices | |
| 425 | + * per-slice for this system. | |
| 426 | + */ | |
| 427 | +#define I915_PARAM_SUBSLICE_MASK 47 | |
| 428 | + | |
| 424 | 429 | typedef struct drm_i915_getparam { |
| 425 | 430 | __s32 param; |
| 426 | 431 | /* |