History

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon: - Fix bogus KASAN splat on EFI runtime stack - Select JUMP_LABEL unconditionally to avoid boot failure with pKVM and the legacy implementation of static keys - Avoid touching GCS registers when 'arm64.nogcs' has been passed on the command-line - Move a 'cpumask_t' off the stack in smp_send_stop() - Don't advertise SME-related hwcaps to userspace when ID_AA64PFR1_EL1 indicates that SME is not implemented - Always check the VMA when handling an Overlay fault - Avoid corrupting TCR2_EL1 during boot * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64/mm: Drop wrong writes into TCR2_EL1 arm64: poe: Handle spurious Overlay faults arm64: Filter out SME hwcaps when FEAT_SME isn't implemented arm64: move smp_send_stop() cpu mask off stack arm64/gcs: Don't try to access GCS registers if arm64.nogcs is enabled arm64: Unconditionally select CONFIG_JUMP_LABEL arm64: efi: Fix KASAN false positive for EFI runtime stack

Linus Torvalds committed 1 year ago

Commit f69f5aa2 parents 9adf143 9dd17579 files · +76 −53Browse files

Unified · Split

9 files
  1. arch/arm64/Kconfig +1 −0
  2. arch/arm64/include/asm/el2_setup.h +7 −12
  3. arch/arm64/kernel/Makefile +1 −2
  4. arch/arm64/kernel/cpufeature.c +32 −25
  5. arch/arm64/kernel/efi.c +8 −3
  6. arch/arm64/kernel/process.c +5 −0
  7. arch/arm64/kernel/smp.c +1 −1
  8. arch/arm64/mm/fault.c +21 −9
  9. arch/arm64/mm/proc.S +0 −1
arch/arm64/Kconfig+1−0
@@ -256,6 +256,7 @@ config ARM64 · 255 unmodified lines
256 select HOTPLUG_SMT if HOTPLUG_CPU256 select HOTPLUG_SMT if HOTPLUG_CPU
257 select IRQ_DOMAIN257 select IRQ_DOMAIN
258 select IRQ_FORCED_THREADING258 select IRQ_FORCED_THREADING
259 select JUMP_LABEL
259 select KASAN_VMALLOC if KASAN260 select KASAN_VMALLOC if KASAN
260 select LOCK_MM_AND_FIND_VMA261 select LOCK_MM_AND_FIND_VMA
261 select MODULES_USE_ELF_RELA262 select MODULES_USE_ELF_RELA
arch/arm64/include/asm/el2_setup.h+7−12
@@ -287,17 +287,6 @@ · 286 unmodified lines
287.Lskip_fgt2_\@:287.Lskip_fgt2_\@:
288.endm288.endm
289 289
290.macro __init_el2_gcs
291 mrs_s x1, SYS_ID_AA64PFR1_EL1
292 ubfx x1, x1, #ID_AA64PFR1_EL1_GCS_SHIFT, #4
293 cbz x1, .Lskip_gcs_\@
294
295 /* Ensure GCS is not enabled when we start trying to do BLs */
296 msr_s SYS_GCSCR_EL1, xzr
297 msr_s SYS_GCSCRE0_EL1, xzr
298.Lskip_gcs_\@:
299.endm
300
301/**290/**
302 * Initialize EL2 registers to sane values. This should be called early on all291 * Initialize EL2 registers to sane values. This should be called early on all
303 * cores that were booted in EL2. Note that everything gets initialised as292 * cores that were booted in EL2. Note that everything gets initialised as
@@ -319,7 +308,6 @@ · 15 unmodified lines
319 __init_el2_cptr308 __init_el2_cptr
320 __init_el2_fgt309 __init_el2_fgt
321 __init_el2_fgt2310 __init_el2_fgt2
322 __init_el2_gcs
323.endm311.endm
324 312
325#ifndef __KVM_NVHE_HYPERVISOR__313#ifndef __KVM_NVHE_HYPERVISOR__
@@ -371,6 +359,13 @@ · 45 unmodified lines
371 msr_s SYS_MPAMHCR_EL2, xzr // clear TRAP_MPAMIDR_EL1 -> EL2359 msr_s SYS_MPAMHCR_EL2, xzr // clear TRAP_MPAMIDR_EL1 -> EL2
372 360
373.Lskip_mpam_\@:361.Lskip_mpam_\@:
362 check_override id_aa64pfr1, ID_AA64PFR1_EL1_GCS_SHIFT, .Linit_gcs_\@, .Lskip_gcs_\@, x1, x2
363
364.Linit_gcs_\@:
365 msr_s SYS_GCSCR_EL1, xzr
366 msr_s SYS_GCSCRE0_EL1, xzr
367
368.Lskip_gcs_\@:
374 check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2369 check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2
375 370
376.Linit_sve_\@: /* SVE register access */371.Linit_sve_\@: /* SVE register access */
arch/arm64/kernel/Makefile+1−2
@@ -34,7 +34,7 @@ obj-y := debug-monitors.o entry.o irq.o fpsimd.o \ · 33 unmodified lines
34 cpufeature.o alternative.o cacheinfo.o \34 cpufeature.o alternative.o cacheinfo.o \
35 smp.o smp_spin_table.o topology.o smccc-call.o \35 smp.o smp_spin_table.o topology.o smccc-call.o \
36 syscall.o proton-pack.o idle.o patching.o pi/ \36 syscall.o proton-pack.o idle.o patching.o pi/ \
37 rsi.o37 rsi.o jump_label.o
38 38
39obj-$(CONFIG_COMPAT) += sys32.o signal32.o \39obj-$(CONFIG_COMPAT) += sys32.o signal32.o \
40 sys_compat.o40 sys_compat.o
@@ -47,7 +47,6 @@ obj-$(CONFIG_PERF_EVENTS) += perf_regs.o perf_callchain.o · 6 unmodified lines
47obj-$(CONFIG_HARDLOCKUP_DETECTOR_PERF) += watchdog_hld.o47obj-$(CONFIG_HARDLOCKUP_DETECTOR_PERF) += watchdog_hld.o
48obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o48obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
49obj-$(CONFIG_CPU_PM) += sleep.o suspend.o49obj-$(CONFIG_CPU_PM) += sleep.o suspend.o
50obj-$(CONFIG_JUMP_LABEL) += jump_label.o
51obj-$(CONFIG_KGDB) += kgdb.o50obj-$(CONFIG_KGDB) += kgdb.o
52obj-$(CONFIG_EFI) += efi.o efi-rt-wrapper.o51obj-$(CONFIG_EFI) += efi.o efi-rt-wrapper.o
53obj-$(CONFIG_PCI) += pci.o52obj-$(CONFIG_PCI) += pci.o
arch/arm64/kernel/cpufeature.c+32−25
@@ -3135,6 +3135,13 @@ static bool has_sve_feature(const struct arm64_cpu_capabilities *cap, int scope) · 3134 unmodified lines
3135}3135}
3136#endif3136#endif
3137 3137
3138#ifdef CONFIG_ARM64_SME
3139static bool has_sme_feature(const struct arm64_cpu_capabilities *cap, int scope)
3140{
3141 return system_supports_sme() && has_user_cpuid_feature(cap, scope);
3142}
3143#endif
3144
3138static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {3145static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = {
3139 HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),3146 HWCAP_CAP(ID_AA64ISAR0_EL1, AES, PMULL, CAP_HWCAP, KERNEL_HWCAP_PMULL),
3140 HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES),3147 HWCAP_CAP(ID_AA64ISAR0_EL1, AES, AES, CAP_HWCAP, KERNEL_HWCAP_AES),
@@ -3223,31 +3230,31 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { · 82 unmodified lines
3223 HWCAP_CAP(ID_AA64ISAR2_EL1, BC, IMP, CAP_HWCAP, KERNEL_HWCAP_HBC),3230 HWCAP_CAP(ID_AA64ISAR2_EL1, BC, IMP, CAP_HWCAP, KERNEL_HWCAP_HBC),
3224#ifdef CONFIG_ARM64_SME3231#ifdef CONFIG_ARM64_SME
3225 HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),3232 HWCAP_CAP(ID_AA64PFR1_EL1, SME, IMP, CAP_HWCAP, KERNEL_HWCAP_SME),
3226 HWCAP_CAP(ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),3233 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, FA64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_FA64),
3227 HWCAP_CAP(ID_AA64SMFR0_EL1, LUTv2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_LUTV2),3234 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, LUTv2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_LUTV2),
3228 HWCAP_CAP(ID_AA64SMFR0_EL1, SMEver, SME2p2, CAP_HWCAP, KERNEL_HWCAP_SME2P2),3235 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2p2, CAP_HWCAP, KERNEL_HWCAP_SME2P2),
3229 HWCAP_CAP(ID_AA64SMFR0_EL1, SMEver, SME2p1, CAP_HWCAP, KERNEL_HWCAP_SME2P1),3236 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2p1, CAP_HWCAP, KERNEL_HWCAP_SME2P1),
3230 HWCAP_CAP(ID_AA64SMFR0_EL1, SMEver, SME2, CAP_HWCAP, KERNEL_HWCAP_SME2),3237 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMEver, SME2, CAP_HWCAP, KERNEL_HWCAP_SME2),
3231 HWCAP_CAP(ID_AA64SMFR0_EL1, I16I64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),3238 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I16I64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I64),
3232 HWCAP_CAP(ID_AA64SMFR0_EL1, F64F64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),3239 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F64F64, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F64F64),
3233 HWCAP_CAP(ID_AA64SMFR0_EL1, I16I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I32),3240 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I16I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I16I32),
3234 HWCAP_CAP(ID_AA64SMFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16B16),3241 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, B16B16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16B16),
3235 HWCAP_CAP(ID_AA64SMFR0_EL1, F16F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F16),3242 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F16F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F16),
3236 HWCAP_CAP(ID_AA64SMFR0_EL1, F8F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F16),3243 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F8F16, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F16),
3237 HWCAP_CAP(ID_AA64SMFR0_EL1, F8F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F32),3244 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F8F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F8F32),
3238 HWCAP_CAP(ID_AA64SMFR0_EL1, I8I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),3245 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, I8I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_I8I32),
3239 HWCAP_CAP(ID_AA64SMFR0_EL1, F16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),3246 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F16F32),
3240 HWCAP_CAP(ID_AA64SMFR0_EL1, B16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),3247 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, B16F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_B16F32),
3241 HWCAP_CAP(ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32),3248 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32),
3242 HWCAP_CAP(ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),3249 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32),
3243 HWCAP_CAP(ID_AA64SMFR0_EL1, SF8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8FMA),3250 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8FMA),
3244 HWCAP_CAP(ID_AA64SMFR0_EL1, SF8DP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP4),3251 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8DP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP4),
3245 HWCAP_CAP(ID_AA64SMFR0_EL1, SF8DP2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP2),3252 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SF8DP2, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SF8DP2),
3246 HWCAP_CAP(ID_AA64SMFR0_EL1, SBitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SBITPERM),3253 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SBitPerm, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SBITPERM),
3247 HWCAP_CAP(ID_AA64SMFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_AES),3254 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, AES, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_AES),
3248 HWCAP_CAP(ID_AA64SMFR0_EL1, SFEXPA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SFEXPA),3255 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SFEXPA, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SFEXPA),
3249 HWCAP_CAP(ID_AA64SMFR0_EL1, STMOP, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_STMOP),3256 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, STMOP, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_STMOP),
3250 HWCAP_CAP(ID_AA64SMFR0_EL1, SMOP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SMOP4),3257 HWCAP_CAP_MATCH_ID(has_sme_feature, ID_AA64SMFR0_EL1, SMOP4, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_SMOP4),
3251#endif /* CONFIG_ARM64_SME */3258#endif /* CONFIG_ARM64_SME */
3252 HWCAP_CAP(ID_AA64FPFR0_EL1, F8CVT, IMP, CAP_HWCAP, KERNEL_HWCAP_F8CVT),3259 HWCAP_CAP(ID_AA64FPFR0_EL1, F8CVT, IMP, CAP_HWCAP, KERNEL_HWCAP_F8CVT),
3253 HWCAP_CAP(ID_AA64FPFR0_EL1, F8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_F8FMA),3260 HWCAP_CAP(ID_AA64FPFR0_EL1, F8FMA, IMP, CAP_HWCAP, KERNEL_HWCAP_F8FMA),
arch/arm64/kernel/efi.c+8−3
@@ -15,6 +15,7 @@ · 14 unmodified lines
15 15
16#include <asm/efi.h>16#include <asm/efi.h>
17#include <asm/stacktrace.h>17#include <asm/stacktrace.h>
18#include <asm/vmap_stack.h>
18 19
19static bool region_is_misaligned(const efi_memory_desc_t *md)20static bool region_is_misaligned(const efi_memory_desc_t *md)
20{21{
@@ -214,9 +215,13 @@ static int __init arm64_efi_rt_init(void) · 193 unmodified lines
214 if (!efi_enabled(EFI_RUNTIME_SERVICES))215 if (!efi_enabled(EFI_RUNTIME_SERVICES))
215 return 0;216 return 0;
216 217
217 p = __vmalloc_node(THREAD_SIZE, THREAD_ALIGN, GFP_KERNEL,218 if (!IS_ENABLED(CONFIG_VMAP_STACK)) {
218 NUMA_NO_NODE, &&l);219 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);
219l: if (!p) {220 return -ENOMEM;
221 }
222
223 p = arch_alloc_vmap_stack(THREAD_SIZE, NUMA_NO_NODE);
224 if (!p) {
220 pr_warn("Failed to allocate EFI runtime stack\n");225 pr_warn("Failed to allocate EFI runtime stack\n");
221 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);226 clear_bit(EFI_RUNTIME_SERVICES, &efi.flags);
222 return -ENOMEM;227 return -ENOMEM;
arch/arm64/kernel/process.c+5−0
@@ -673,6 +673,11 @@ static void permission_overlay_switch(struct task_struct *next) · 672 unmodified lines
673 current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);673 current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0);
674 if (current->thread.por_el0 != next->thread.por_el0) {674 if (current->thread.por_el0 != next->thread.por_el0) {
675 write_sysreg_s(next->thread.por_el0, SYS_POR_EL0);675 write_sysreg_s(next->thread.por_el0, SYS_POR_EL0);
676 /*
677 * No ISB required as we can tolerate spurious Overlay faults -
678 * the fault handler will check again based on the new value
679 * of POR_EL0.
680 */
676 }681 }
677}682}
678 683
arch/arm64/kernel/smp.c+1−1
@@ -1143,7 +1143,7 @@ static inline unsigned int num_other_online_cpus(void) · 1142 unmodified lines
1143void smp_send_stop(void)1143void smp_send_stop(void)
1144{1144{
1145 static unsigned long stop_in_progress;1145 static unsigned long stop_in_progress;
1146 cpumask_t mask;1146 static cpumask_t mask;
1147 unsigned long timeout;1147 unsigned long timeout;
1148 1148
1149 /*1149 /*
arch/arm64/mm/fault.c+21−9
@@ -487,17 +487,29 @@ static void do_bad_area(unsigned long far, unsigned long esr, · 486 unmodified lines
487 }487 }
488}488}
489 489
490static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma,490static bool fault_from_pkey(struct vm_area_struct *vma, unsigned int mm_flags)
491 unsigned int mm_flags)
492{491{
493 unsigned long iss2 = ESR_ELx_ISS2(esr);
494
495 if (!system_supports_poe())492 if (!system_supports_poe())
496 return false;493 return false;
497 494
498 if (esr_fsc_is_permission_fault(esr) && (iss2 & ESR_ELx_Overlay))495 /*
499 return true;496 * We do not check whether an Overlay fault has occurred because we
500 497 * cannot make a decision based solely on its value:
498 *
499 * - If Overlay is set, a fault did occur due to POE, but it may be
500 * spurious in those cases where we update POR_EL0 without ISB (e.g.
501 * on context-switch). We would then need to manually check POR_EL0
502 * against vma_pkey(vma), which is exactly what
503 * arch_vma_access_permitted() does.
504 *
505 * - If Overlay is not set, we may still need to report a pkey fault.
506 * This is the case if an access was made within a mapping but with no
507 * page mapped, and POR_EL0 forbids the access (according to
508 * vma_pkey()). Such access will result in a SIGSEGV regardless
509 * because core code checks arch_vma_access_permitted(), but in order
510 * to report the correct error code - SEGV_PKUERR - we must handle
511 * that case here.
512 */
501 return !arch_vma_access_permitted(vma,513 return !arch_vma_access_permitted(vma,
502 mm_flags & FAULT_FLAG_WRITE,514 mm_flags & FAULT_FLAG_WRITE,
503 mm_flags & FAULT_FLAG_INSTRUCTION,515 mm_flags & FAULT_FLAG_INSTRUCTION,
@@ -635,7 +647,7 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr, · 131 unmodified lines
635 goto bad_area;647 goto bad_area;
636 }648 }
637 649
638 if (fault_from_pkey(esr, vma, mm_flags)) {650 if (fault_from_pkey(vma, mm_flags)) {
639 pkey = vma_pkey(vma);651 pkey = vma_pkey(vma);
640 vma_end_read(vma);652 vma_end_read(vma);
641 fault = 0;653 fault = 0;
@@ -679,7 +691,7 @@ retry: · 37 unmodified lines
679 goto bad_area;691 goto bad_area;
680 }692 }
681 693
682 if (fault_from_pkey(esr, vma, mm_flags)) {694 if (fault_from_pkey(vma, mm_flags)) {
683 pkey = vma_pkey(vma);695 pkey = vma_pkey(vma);
684 mmap_read_unlock(mm);696 mmap_read_unlock(mm);
685 fault = 0;697 fault = 0;
arch/arm64/mm/proc.S+0−1
@@ -518,7 +518,6 @@ alternative_else_nop_endif · 517 unmodified lines
518 msr REG_PIR_EL1, x0518 msr REG_PIR_EL1, x0
519 519
520 orr tcr2, tcr2, TCR2_EL1_PIE520 orr tcr2, tcr2, TCR2_EL1_PIE
521 msr REG_TCR2_EL1, x0
522 521
523.Lskip_indirection:522.Lskip_indirection:
524 523

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