Fix typos in drivers/pci. Comment and whitespace changes only.
Unified · Split
| @@ -432,7 +432,7 @@ EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); · 431 unmodified lines | ||
| 432 | 432 | * @pdev: PCI device structure |
| 433 | 433 | * |
| 434 | 434 | * Returns negative value when PASID capability is not present. |
| 435 | − * Otherwise it returns the numer of supported PASIDs. | |
| 435 | + * Otherwise it returns the number of supported PASIDs. | |
| 436 | 436 | */ |
| 437 | 437 | int pci_max_pasids(struct pci_dev *pdev) |
| 438 | 438 | { |
| @@ -55,7 +55,7 @@ struct armada8k_pcie { · 54 unmodified lines | ||
| 55 | 55 | #define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C) |
| 56 | 56 | #define PCIE_AWUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x60) |
| 57 | 57 | /* |
| 58 | − * AR/AW Cache defauls: Normal memory, Write-Back, Read / Write | |
| 58 | + * AR/AW Cache defaults: Normal memory, Write-Back, Read / Write | |
| 59 | 59 | * allocate |
| 60 | 60 | */ |
| 61 | 61 | #define ARCACHE_DEFAULT_VALUE 0x3511 |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | /* |
| 3 | 3 | * PCIe host controller driver for Kirin Phone SoCs |
| 4 | 4 | * |
| 5 | − * Copyright (C) 2017 Hilisicon Electronics Co., Ltd. | |
| 5 | + * Copyright (C) 2017 HiSilicon Electronics Co., Ltd. | |
| 6 | 6 | * http://www.huawei.com |
| 7 | 7 | * |
| 8 | 8 | * Author: Xiaowei Song <songxiaowei@huawei.com> |
| @@ -308,7 +308,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) · 307 unmodified lines | ||
| 308 | 308 | |
| 309 | 309 | advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); |
| 310 | 310 | |
| 311 | − /* Unmask all MSI's */ | |
| 311 | + /* Unmask all MSIs */ | |
| 312 | 312 | advk_writel(pcie, 0, PCIE_MSI_MASK_REG); |
| 313 | 313 | |
| 314 | 314 | /* Enable summary interrupt for GIC SPI source */ |
| @@ -87,7 +87,7 @@ static int iproc_pcie_pltfm_probe(struct platform_device *pdev) · 86 unmodified lines | ||
| 87 | 87 | |
| 88 | 88 | /* |
| 89 | 89 | * DT nodes are not used by all platforms that use the iProc PCIe |
| 90 | − * core driver. For platforms that require explict inbound mapping | |
| 90 | + * core driver. For platforms that require explicit inbound mapping | |
| 91 | 91 | * configuration, "dma-ranges" would have been present in DT |
| 92 | 92 | */ |
| 93 | 93 | pcie->need_ib_cfg = of_property_read_bool(np, "dma-ranges"); |
| @@ -163,7 +163,7 @@ enum iproc_pcie_ib_map_type { · 162 unmodified lines | ||
| 163 | 163 | * @size_unit: inbound mapping region size unit, could be SZ_1K, SZ_1M, or |
| 164 | 164 | * SZ_1G |
| 165 | 165 | * @region_sizes: list of supported inbound mapping region sizes in KB, MB, or |
| 166 | − * GB, depedning on the size unit | |
| 166 | + * GB, depending on the size unit | |
| 167 | 167 | * @nr_sizes: number of supported inbound mapping region sizes |
| 168 | 168 | * @nr_windows: number of supported inbound mapping windows for the region |
| 169 | 169 | * @imap_addr_offset: register offset between the upper and lower 32-bit |
| @@ -627,7 +627,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) · 626 unmodified lines | ||
| 627 | 627 | * 32-bit resources. __pci_assign_resource() enforces that |
| 628 | 628 | * artificial restriction to make sure everything will fit. |
| 629 | 629 | * |
| 630 | − * The only way we could use a 64-bit non-prefechable MEMBAR is | |
| 630 | + * The only way we could use a 64-bit non-prefetchable MEMBAR is | |
| 631 | 631 | * if its address is <4GB so that we can convert it to a 32-bit |
| 632 | 632 | * resource. To be visible to the host OS, all VMD endpoints must |
| 633 | 633 | * be initially configured by platform BIOS, which includes setting |
| @@ -73,7 +73,7 @@ int pci_mmap_resource_range(struct pci_dev *pdev, int bar, · 72 unmodified lines | ||
| 73 | 73 | #elif defined(HAVE_PCI_MMAP) /* && !ARCH_GENERIC_PCI_MMAP_RESOURCE */ |
| 74 | 74 | |
| 75 | 75 | /* |
| 76 | − * Legacy setup: Impement pci_mmap_resource_range() as a wrapper around | |
| 76 | + * Legacy setup: Implement pci_mmap_resource_range() as a wrapper around | |
| 77 | 77 | * the architecture's pci_mmap_page_range(), converting to "user visible" |
| 78 | 78 | * addresses as necessary. |
| 79 | 79 | */ |
| @@ -237,7 +237,7 @@ static void msi_set_mask_bit(struct irq_data *data, u32 flag) · 236 unmodified lines | ||
| 237 | 237 | } |
| 238 | 238 | |
| 239 | 239 | /** |
| 240 | − * pci_msi_mask_irq - Generic irq chip callback to mask PCI/MSI interrupts | |
| 240 | + * pci_msi_mask_irq - Generic IRQ chip callback to mask PCI/MSI interrupts | |
| 241 | 241 | * @data: pointer to irqdata associated to that interrupt |
| 242 | 242 | */ |
| 243 | 243 | void pci_msi_mask_irq(struct irq_data *data) |
| @@ -247,7 +247,7 @@ void pci_msi_mask_irq(struct irq_data *data) · 3 unmodified lines | ||
| 247 | 247 | EXPORT_SYMBOL_GPL(pci_msi_mask_irq); |
| 248 | 248 | |
| 249 | 249 | /** |
| 250 | − * pci_msi_unmask_irq - Generic irq chip callback to unmask PCI/MSI interrupts | |
| 250 | + * pci_msi_unmask_irq - Generic IRQ chip callback to unmask PCI/MSI interrupts | |
| 251 | 251 | * @data: pointer to irqdata associated to that interrupt |
| 252 | 252 | */ |
| 253 | 253 | void pci_msi_unmask_irq(struct irq_data *data) |
| @@ -588,11 +588,11 @@ static int msi_verify_entries(struct pci_dev *dev) · 334 unmodified lines | ||
| 588 | 588 | * msi_capability_init - configure device's MSI capability structure |
| 589 | 589 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 590 | 590 | * @nvec: number of interrupts to allocate |
| 591 | − * @affd: description of automatic irq affinity assignments (may be %NULL) | |
| 591 | + * @affd: description of automatic IRQ affinity assignments (may be %NULL) | |
| 592 | 592 | * |
| 593 | 593 | * Setup the MSI capability structure of the device with the requested |
| 594 | 594 | * number of interrupts. A return value of zero indicates the successful |
| 595 | − * setup of an entry with the new MSI irq. A negative return value indicates | |
| 595 | + * setup of an entry with the new MSI IRQ. A negative return value indicates | |
| 596 | 596 | * an error, and a positive return value indicates the number of interrupts |
| 597 | 597 | * which could have been allocated. |
| 598 | 598 | */ |
| @@ -609,7 +609,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, · 10 unmodified lines | ||
| 609 | 609 | if (!entry) |
| 610 | 610 | return -ENOMEM; |
| 611 | 611 | |
| 612 | − /* All MSIs are unmasked by default, Mask them all */ | |
| 612 | + /* All MSIs are unmasked by default; mask them all */ | |
| 613 | 613 | mask = msi_mask(entry->msi_attrib.multi_cap); |
| 614 | 614 | msi_mask_irq(entry, mask, mask); |
| 615 | 615 | |
| @@ -637,7 +637,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec, · 21 unmodified lines | ||
| 637 | 637 | return ret; |
| 638 | 638 | } |
| 639 | 639 | |
| 640 | − /* Set MSI enabled bits */ | |
| 640 | + /* Set MSI enabled bits */ | |
| 641 | 641 | pci_intx_for_msi(dev, 0); |
| 642 | 642 | pci_msi_set_enable(dev, 1); |
| 643 | 643 | dev->msi_enabled = 1; |
| @@ -729,11 +729,11 @@ static void msix_program_entries(struct pci_dev *dev, · 85 unmodified lines | ||
| 729 | 729 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
| 730 | 730 | * @entries: pointer to an array of struct msix_entry entries |
| 731 | 731 | * @nvec: number of @entries |
| 732 | − * @affd: Optional pointer to enable automatic affinity assignement | |
| 732 | + * @affd: Optional pointer to enable automatic affinity assignment | |
| 733 | 733 | * |
| 734 | 734 | * Setup the MSI-X capability structure of device function with a |
| 735 | − * single MSI-X irq. A return of zero indicates the successful setup of | |
| 736 | − * requested MSI-X entries with allocated irqs or non-zero for otherwise. | |
| 735 | + * single MSI-X IRQ. A return of zero indicates the successful setup of | |
| 736 | + * requested MSI-X entries with allocated IRQs or non-zero for otherwise. | |
| 737 | 737 | **/ |
| 738 | 738 | static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries, |
| 739 | 739 | int nvec, struct irq_affinity *affd) |
| @@ -789,7 +789,7 @@ static int msix_capability_init(struct pci_dev *dev, struct msix_entry *entries, · 49 unmodified lines | ||
| 789 | 789 | out_avail: |
| 790 | 790 | if (ret < 0) { |
| 791 | 791 | /* |
| 792 | − * If we had some success, report the number of irqs | |
| 792 | + * If we had some success, report the number of IRQs | |
| 793 | 793 | * we succeeded in setting up. |
| 794 | 794 | */ |
| 795 | 795 | struct msi_desc *entry; |
| @@ -812,7 +812,7 @@ out_free: · 16 unmodified lines | ||
| 812 | 812 | /** |
| 813 | 813 | * pci_msi_supported - check whether MSI may be enabled on a device |
| 814 | 814 | * @dev: pointer to the pci_dev data structure of MSI device function |
| 815 | − * @nvec: how many MSIs have been requested ? | |
| 815 | + * @nvec: how many MSIs have been requested? | |
| 816 | 816 | * |
| 817 | 817 | * Look at global flags, the device itself, and its parent buses |
| 818 | 818 | * to determine if MSI/-X are supported for the device. If MSI/-X is |
| @@ -896,7 +896,7 @@ static void pci_msi_shutdown(struct pci_dev *dev) · 77 unmodified lines | ||
| 896 | 896 | /* Keep cached state to be restored */ |
| 897 | 897 | __pci_msi_desc_mask_irq(desc, mask, ~mask); |
| 898 | 898 | |
| 899 | − /* Restore dev->irq to its default pin-assertion irq */ | |
| 899 | + /* Restore dev->irq to its default pin-assertion IRQ */ | |
| 900 | 900 | dev->irq = desc->msi_attrib.default_irq; |
| 901 | 901 | pcibios_alloc_irq(dev); |
| 902 | 902 | } |
| @@ -958,7 +958,7 @@ static int __pci_enable_msix(struct pci_dev *dev, struct msix_entry *entries, · 55 unmodified lines | ||
| 958 | 958 | } |
| 959 | 959 | } |
| 960 | 960 | |
| 961 | − /* Check whether driver already requested for MSI irq */ | |
| 961 | + /* Check whether driver already requested for MSI IRQ */ | |
| 962 | 962 | if (dev->msi_enabled) { |
| 963 | 963 | pci_info(dev, "can't enable MSI-X (MSI IRQ already assigned)\n"); |
| 964 | 964 | return -EINVAL; |
| @@ -1026,7 +1026,7 @@ static int __pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec, · 61 unmodified lines | ||
| 1026 | 1026 | if (!pci_msi_supported(dev, minvec)) |
| 1027 | 1027 | return -EINVAL; |
| 1028 | 1028 | |
| 1029 | − /* Check whether driver already requested MSI-X irqs */ | |
| 1029 | + /* Check whether driver already requested MSI-X IRQs */ | |
| 1030 | 1030 | if (dev->msix_enabled) { |
| 1031 | 1031 | pci_info(dev, "can't enable MSI (MSI-X already enabled)\n"); |
| 1032 | 1032 | return -EINVAL; |
| @@ -1113,8 +1113,8 @@ static int __pci_enable_msix_range(struct pci_dev *dev, · 80 unmodified lines | ||
| 1113 | 1113 | * pci_enable_msix_range - configure device's MSI-X capability structure |
| 1114 | 1114 | * @dev: pointer to the pci_dev data structure of MSI-X device function |
| 1115 | 1115 | * @entries: pointer to an array of MSI-X entries |
| 1116 | − * @minvec: minimum number of MSI-X irqs requested | |
| 1117 | − * @maxvec: maximum number of MSI-X irqs requested | |
| 1116 | + * @minvec: minimum number of MSI-X IRQs requested | |
| 1117 | + * @maxvec: maximum number of MSI-X IRQs requested | |
| 1118 | 1118 | * |
| 1119 | 1119 | * Setup the MSI-X capability structure of device function with a maximum |
| 1120 | 1120 | * possible number of interrupts in the range between @minvec and @maxvec |
| @@ -1179,7 +1179,7 @@ int pci_alloc_irq_vectors_affinity(struct pci_dev *dev, unsigned int min_vecs, · 58 unmodified lines | ||
| 1179 | 1179 | return msi_vecs; |
| 1180 | 1180 | } |
| 1181 | 1181 | |
| 1182 | − /* use legacy irq if allowed */ | |
| 1182 | + /* use legacy IRQ if allowed */ | |
| 1183 | 1183 | if (flags & PCI_IRQ_LEGACY) { |
| 1184 | 1184 | if (min_vecs == 1 && dev->irq) { |
| 1185 | 1185 | /* |
| @@ -1248,7 +1248,7 @@ int pci_irq_vector(struct pci_dev *dev, unsigned int nr) · 62 unmodified lines | ||
| 1248 | 1248 | EXPORT_SYMBOL(pci_irq_vector); |
| 1249 | 1249 | |
| 1250 | 1250 | /** |
| 1251 | − * pci_irq_get_affinity - return the affinity of a particular msi vector | |
| 1251 | + * pci_irq_get_affinity - return the affinity of a particular MSI vector | |
| 1252 | 1252 | * @dev: PCI device to operate on |
| 1253 | 1253 | * @nr: device-relative interrupt vector index (0-based). |
| 1254 | 1254 | */ |
| @@ -1280,7 +1280,7 @@ const struct cpumask *pci_irq_get_affinity(struct pci_dev *dev, int nr) · 25 unmodified lines | ||
| 1280 | 1280 | EXPORT_SYMBOL(pci_irq_get_affinity); |
| 1281 | 1281 | |
| 1282 | 1282 | /** |
| 1283 | − * pci_irq_get_node - return the numa node of a particular msi vector | |
| 1283 | + * pci_irq_get_node - return the NUMA node of a particular MSI vector | |
| 1284 | 1284 | * @pdev: PCI device to operate on |
| 1285 | 1285 | * @vec: device-relative interrupt vector index (0-based). |
| 1286 | 1286 | */ |
| @@ -1330,7 +1330,7 @@ void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg) · 43 unmodified lines | ||
| 1330 | 1330 | /** |
| 1331 | 1331 | * pci_msi_domain_calc_hwirq - Generate a unique ID for an MSI source |
| 1332 | 1332 | * @dev: Pointer to the PCI device |
| 1333 | − * @desc: Pointer to the msi descriptor | |
| 1333 | + * @desc: Pointer to the MSI descriptor | |
| 1334 | 1334 | * |
| 1335 | 1335 | * The ID number is only used within the irqdomain. |
| 1336 | 1336 | */ |
| @@ -1348,7 +1348,8 @@ static inline bool pci_msi_desc_is_multi_msi(struct msi_desc *desc) · 11 unmodified lines | ||
| 1348 | 1348 | } |
| 1349 | 1349 | |
| 1350 | 1350 | /** |
| 1351 | − * pci_msi_domain_check_cap - Verify that @domain supports the capabilities for @dev | |
| 1351 | + * pci_msi_domain_check_cap - Verify that @domain supports the capabilities | |
| 1352 | + * for @dev | |
| 1352 | 1353 | * @domain: The interrupt domain to check |
| 1353 | 1354 | * @info: The domain info for verification |
| 1354 | 1355 | * @dev: The device to check |
| @@ -223,7 +223,7 @@ EXPORT_SYMBOL_GPL(pci_p2pdma_add_resource); · 222 unmodified lines | ||
| 223 | 223 | |
| 224 | 224 | /* |
| 225 | 225 | * Note this function returns the parent PCI device with a |
| 226 | − * reference taken. It is the caller's responsibily to drop | |
| 226 | + * reference taken. It is the caller's responsibility to drop | |
| 227 | 227 | * the reference. |
| 228 | 228 | */ |
| 229 | 229 | static struct pci_dev *find_parent_pci_dev(struct device *dev) |
| @@ -380,7 +380,7 @@ static int upstream_bridge_distance(struct pci_dev *provider, · 150 unmodified lines | ||
| 380 | 380 | |
| 381 | 381 | /* |
| 382 | 382 | * Allow the connection if both devices are on a whitelisted root |
| 383 | − * complex, but add an arbitary large value to the distance. | |
| 383 | + * complex, but add an arbitrary large value to the distance. | |
| 384 | 384 | */ |
| 385 | 385 | if (root_complex_whitelist(provider) && |
| 386 | 386 | root_complex_whitelist(client)) |
| @@ -439,7 +439,7 @@ static int upstream_bridge_distance_warn(struct pci_dev *provider, · 52 unmodified lines | ||
| 439 | 439 | } |
| 440 | 440 | |
| 441 | 441 | /** |
| 442 | − * pci_p2pdma_distance_many - Determive the cumulative distance between | |
| 442 | + * pci_p2pdma_distance_many - Determine the cumulative distance between | |
| 443 | 443 | * a p2pdma provider and the clients in use. |
| 444 | 444 | * @provider: p2pdma provider to check against the client list |
| 445 | 445 | * @clients: array of devices to check (NULL-terminated) |
| @@ -305,7 +305,7 @@ int pci_bridge_emul_init(struct pci_bridge_emul *bridge, · 304 unmodified lines | ||
| 305 | 305 | } |
| 306 | 306 | |
| 307 | 307 | /* |
| 308 | − * Cleanup a pci_bridge_emul structure that was previously initilized | |
| 308 | + * Cleanup a pci_bridge_emul structure that was previously initialized | |
| 309 | 309 | * using pci_bridge_emul_init(). |
| 310 | 310 | */ |
| 311 | 311 | void pci_bridge_emul_cleanup(struct pci_bridge_emul *bridge) |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | /* pci-pf-stub - simple stub driver for PCI SR-IOV PF device |
| 3 | 3 | * |
| 4 | − * This driver is meant to act as a "whitelist" for devices that provde | |
| 4 | + * This driver is meant to act as a "whitelist" for devices that provide | |
| 5 | 5 | * SR-IOV functionality while at the same time not actually needing a |
| 6 | 6 | * driver of their own. |
| 7 | 7 | */ |
| @@ -4501,7 +4501,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) · 4500 unmodified lines | ||
| 4501 | 4501 | |
| 4502 | 4502 | /* |
| 4503 | 4503 | * Wait for Transaction Pending bit to clear. A word-aligned test |
| 4504 | − * is used, so we use the conrol offset rather than status and shift | |
| 4504 | + * is used, so we use the control offset rather than status and shift | |
| 4505 | 4505 | * the test bit to match. |
| 4506 | 4506 | */ |
| 4507 | 4507 | if (!pci_wait_for_pending(dev, pos + PCI_AF_CTRL, |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | /* |
| 3 | 3 | * PCIe AER software error injection support. |
| 4 | 4 | * |
| 5 | − * Debuging PCIe AER code is quite difficult because it is hard to | |
| 5 | + * Debugging PCIe AER code is quite difficult because it is hard to | |
| 6 | 6 | * trigger various real hardware errors. Software based error |
| 7 | 7 | * injection can fake almost all kinds of errors with the help of a |
| 8 | 8 | * user space helper tool aer-inject, which can be gotten from: |
| @@ -382,7 +382,7 @@ struct pci_dev { · 381 unmodified lines | ||
| 382 | 382 | |
| 383 | 383 | unsigned int is_busmaster:1; /* Is busmaster */ |
| 384 | 384 | unsigned int no_msi:1; /* May not use MSI */ |
| 385 | − unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ | |
| 385 | + unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ | |
| 386 | 386 | unsigned int block_cfg_access:1; /* Config space access blocked */ |
| 387 | 387 | unsigned int broken_parity_status:1; /* Generates false positive parity */ |
| 388 | 388 | unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */ |
| @@ -1112,7 +1112,7 @@ · 1111 unmodified lines | ||
| 1112 | 1112 | |
| 1113 | 1113 | #define PCI_VENDOR_ID_AL 0x10b9 |
| 1114 | 1114 | #define PCI_DEVICE_ID_AL_M1533 0x1533 |
| 1115 | −#define PCI_DEVICE_ID_AL_M1535 0x1535 | |
| 1115 | +#define PCI_DEVICE_ID_AL_M1535 0x1535 | |
| 1116 | 1116 | #define PCI_DEVICE_ID_AL_M1541 0x1541 |
| 1117 | 1117 | #define PCI_DEVICE_ID_AL_M1563 0x1563 |
| 1118 | 1118 | #define PCI_DEVICE_ID_AL_M1621 0x1621 |
| @@ -1752,7 +1752,7 @@ · 633 unmodified lines | ||
| 1752 | 1752 | #define PCI_VENDOR_ID_STALLION 0x124d |
| 1753 | 1753 | |
| 1754 | 1754 | /* Allied Telesyn */ |
| 1755 | −#define PCI_VENDOR_ID_AT 0x1259 | |
| 1755 | +#define PCI_VENDOR_ID_AT 0x1259 | |
| 1756 | 1756 | #define PCI_SUBDEVICE_ID_AT_2700FX 0x2701 |
| 1757 | 1757 | #define PCI_SUBDEVICE_ID_AT_2701FX 0x2703 |
| 1758 | 1758 | |
| @@ -2550,7 +2550,7 @@ · 791 unmodified lines | ||
| 2550 | 2550 | #define PCI_DEVICE_ID_KORENIX_JETCARDF2 0x1700 |
| 2551 | 2551 | #define PCI_DEVICE_ID_KORENIX_JETCARDF3 0x17ff |
| 2552 | 2552 | |
| 2553 | −#define PCI_VENDOR_ID_HUAWEI 0x19e5 | |
| 2553 | +#define PCI_VENDOR_ID_HUAWEI 0x19e5 | |
| 2554 | 2554 | |
| 2555 | 2555 | #define PCI_VENDOR_ID_NETRONOME 0x19ee |
| 2556 | 2556 | #define PCI_DEVICE_ID_NETRONOME_NFP4000 0x4000 |