| @@ -75,7 +75,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) · 74 unmodified lines |
| 75 | unsigned long context_id; | 75 | unsigned long context_id; |
| 76 | phys_addr_t target_pc; | 76 | phys_addr_t target_pc; |
| 77 | | 77 | |
| 78 | cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK; | 78 | cpu_id = vcpu_get_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK; |
| 79 | if (vcpu_mode_is_32bit(source_vcpu)) | 79 | if (vcpu_mode_is_32bit(source_vcpu)) |
| 80 | cpu_id &= ~((u32) 0); | 80 | cpu_id &= ~((u32) 0); |
| 81 | | 81 | |
| @@ -94,8 +94,8 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) · 12 unmodified lines |
| 94 | return PSCI_RET_INVALID_PARAMS; | 94 | return PSCI_RET_INVALID_PARAMS; |
| 95 | } | 95 | } |
| 96 | | 96 | |
| 97 | target_pc = *vcpu_reg(source_vcpu, 2); | 97 | target_pc = vcpu_get_reg(source_vcpu, 2); |
| 98 | context_id = *vcpu_reg(source_vcpu, 3); | 98 | context_id = vcpu_get_reg(source_vcpu, 3); |
| 99 | | 99 | |
| 100 | kvm_reset_vcpu(vcpu); | 100 | kvm_reset_vcpu(vcpu); |
| 101 | | 101 | |
| @@ -114,7 +114,7 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu) · 12 unmodified lines |
| 114 | * NOTE: We always update r0 (or x0) because for PSCI v0.1 | 114 | * NOTE: We always update r0 (or x0) because for PSCI v0.1 |
| 115 | * the general puspose registers are undefined upon CPU_ON. | 115 | * the general puspose registers are undefined upon CPU_ON. |
| 116 | */ | 116 | */ |
| 117 | *vcpu_reg(vcpu, 0) = context_id; | 117 | vcpu_set_reg(vcpu, 0, context_id); |
| 118 | vcpu->arch.power_off = false; | 118 | vcpu->arch.power_off = false; |
| 119 | smp_mb(); /* Make sure the above is visible */ | 119 | smp_mb(); /* Make sure the above is visible */ |
| 120 | | 120 | |
| @@ -134,8 +134,8 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu) · 13 unmodified lines |
| 134 | struct kvm *kvm = vcpu->kvm; | 134 | struct kvm *kvm = vcpu->kvm; |
| 135 | struct kvm_vcpu *tmp; | 135 | struct kvm_vcpu *tmp; |
| 136 | | 136 | |
| 137 | target_affinity = *vcpu_reg(vcpu, 1); | 137 | target_affinity = vcpu_get_reg(vcpu, 1); |
| 138 | lowest_affinity_level = *vcpu_reg(vcpu, 2); | 138 | lowest_affinity_level = vcpu_get_reg(vcpu, 2); |
| 139 | | 139 | |
| 140 | /* Determine target affinity mask */ | 140 | /* Determine target affinity mask */ |
| 141 | target_affinity_mask = psci_affinity_mask(lowest_affinity_level); | 141 | target_affinity_mask = psci_affinity_mask(lowest_affinity_level); |
| @@ -209,7 +209,7 @@ int kvm_psci_version(struct kvm_vcpu *vcpu) · 67 unmodified lines |
| 209 | static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) | 209 | static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) |
| 210 | { | 210 | { |
| 211 | int ret = 1; | 211 | int ret = 1; |
| 212 | unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); | 212 | unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0); |
| 213 | unsigned long val; | 213 | unsigned long val; |
| 214 | | 214 | |
| 215 | switch (psci_fn) { | 215 | switch (psci_fn) { |
| @@ -273,13 +273,13 @@ static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu) · 57 unmodified lines |
| 273 | break; | 273 | break; |
| 274 | } | 274 | } |
| 275 | | 275 | |
| 276 | *vcpu_reg(vcpu, 0) = val; | 276 | vcpu_set_reg(vcpu, 0, val); |
| 277 | return ret; | 277 | return ret; |
| 278 | } | 278 | } |
| 279 | | 279 | |
| 280 | static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) | 280 | static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) |
| 281 | { | 281 | { |
| 282 | unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0); | 282 | unsigned long psci_fn = vcpu_get_reg(vcpu, 0) & ~((u32) 0); |
| 283 | unsigned long val; | 283 | unsigned long val; |
| 284 | | 284 | |
| 285 | switch (psci_fn) { | 285 | switch (psci_fn) { |
| @@ -295,7 +295,7 @@ static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu) · 9 unmodified lines |
| 295 | break; | 295 | break; |
| 296 | } | 296 | } |
| 297 | | 297 | |
| 298 | *vcpu_reg(vcpu, 0) = val; | 298 | vcpu_set_reg(vcpu, 0, val); |
| 299 | return 1; | 299 | return 1; |
| 300 | } | 300 | } |
| 301 | | 301 | |