History

Merge tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM OMAP fixes from Arnd Bergmann: "The OMAP developers are particularly active at hunting down regressions, so this is a separate branch with OMAP specific fixes for v5.8: As Tony explains "The recent display subsystem (DSS) related platform data changes caused display related regressions for suspend and resume. Looks like I only tested suspend and resume before dropping the legacy platform data, and forgot to test it after dropping it. Turns out the main issue was that we no longer have platform code calling pm_runtime_suspend for DSS like we did for the legacy platform data case, and that fix is still being discussed on the dri-devel list and will get merged separately. The DSS related testing exposed a pile other other display related issues that also need fixing though": - Fix ti-sysc optional clock handling and reset status checks for devices that reset automatically in idle like DSS - Ignore ti-sysc clockactivity bit unless separately requested to avoid unexpected performance issues - Init ti-sysc framedonetv_irq to true and disable for am4 - Avoid duplicate DSS reset for legacy mode with dts data - Remove LCD timings for am4 as they cause warnings now that we're using generic panels Other OMAP changes from Tony include: - Fix omap_prm reset deassert as we still have drivers setting the pm_runtime_irq_safe() flag - Flush posted write for ti-sysc enable and disable - Fix droid4 spi related errors with spi flags - Fix am335x USB range and a typo for softreset - Fix dra7 timer nodes for clocks for IPU and DSP - Drop duplicate mailboxes after mismerge for dra7 - Prevent pocketgeagle header line signal from accidentally setting micro-SD write protection signal by removing the default mux - Fix NFSroot flakeyness after resume for duover by switching the smsc911x gpio interrupt to back to level sensitive - Fix regression for omap4 clockevent source after recent system timer changes - Yet another ethernet regression fix for the "rgmii" vs "rgmii-rxid" phy-mode - One patch to convert am3/am4 DT files to use the regular sdhci-omap driver instead of the old hsmmc driver, this was meant for the merge window but got lost in the process" * tag 'arm-omap-fixes-5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits) ARM: dts: am5729: beaglebone-ai: fix rgmii phy-mode ARM: dts: Fix omap4 system timer source clocks ARM: dts: Fix duovero smsc interrupt for suspend ARM: dts: am335x-pocketbeagle: Fix mmc0 Write Protect Revert "bus: ti-sysc: Increase max softreset wait" ARM: dts: am437x-epos-evm: remove lcd timings ARM: dts: am437x-gp-evm: remove lcd timings ARM: dts: am437x-sk-evm: remove lcd timings ARM: dts: dra7-evm-common: Fix duplicate mailbox nodes ARM: dts: dra7: Fix timer nodes properly for timer_sys_ck clocks ARM: dts: Fix am33xx.dtsi ti,sysc-mask wrong softreset flag ARM: dts: Fix am33xx.dtsi USB ranges length bus: ti-sysc: Increase max softreset wait ARM: OMAP2+: Fix legacy mode dss_reset bus: ti-sysc: Fix uninitialized framedonetv_irq bus: ti-sysc: Ignore clockactivity unless specified as a quirk bus: ti-sysc: Use optional clocks on for enable and wait for softreset bit ARM: dts: omap4-droid4: Fix spi configuration and increase rate bus: ti-sysc: Flush posted write on enable and disable soc: ti: omap-prm: use atomic iopoll instead of sleeping one ...

Linus Torvalds committed 6 years ago

Commit f7db1922 parents e44b59c d52894530 files · +125 −148Browse files

Unified · Split

30 files
  1. arch/arm/boot/dts/am335x-baltos.dtsi +1 −1
  2. arch/arm/boot/dts/am335x-boneblack-common.dtsi +1 −0
  3. arch/arm/boot/dts/am335x-boneblack-wireless.dts +0 −1
  4. arch/arm/boot/dts/am335x-boneblue.dts +0 −1
  5. arch/arm/boot/dts/am335x-bonegreen-wireless.dts +0 −1
  6. arch/arm/boot/dts/am335x-evm.dts +1 −2
  7. arch/arm/boot/dts/am335x-evmsk.dts +1 −1
  8. arch/arm/boot/dts/am335x-lxm.dts +1 −1
  9. arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi +1 −1
  10. arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts +1 −1
  11. arch/arm/boot/dts/am335x-pepper.dts +2 −2
  12. arch/arm/boot/dts/am335x-phycore-som.dtsi +1 −1
  13. arch/arm/boot/dts/am335x-pocketbeagle.dts +0 −1
  14. arch/arm/boot/dts/am33xx-l4.dtsi +2 −4
  15. arch/arm/boot/dts/am33xx.dtsi +4 −3
  16. arch/arm/boot/dts/am4372.dtsi +2 −1
  17. arch/arm/boot/dts/am437x-cm-t43.dts +1 −1
  18. arch/arm/boot/dts/am437x-gp-evm.dts +2 −18
  19. arch/arm/boot/dts/am437x-l4.dtsi +2 −3
  20. arch/arm/boot/dts/am437x-sk-evm.dts +1 −17
  21. arch/arm/boot/dts/am43x-epos-evm.dts +0 −16
  22. arch/arm/boot/dts/am5729-beagleboneai.dts +1 −1
  23. arch/arm/boot/dts/dra7-evm-common.dtsi +0 −20
  24. arch/arm/boot/dts/dra7-l4.dtsi +16 −18
  25. arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi +3 −1
  26. arch/arm/boot/dts/omap4-duovero-parlor.dts +1 −1
  27. arch/arm/boot/dts/omap4.dtsi +1 −1
  28. arch/arm/mach-omap2/omap_hwmod.c +1 −1
  29. drivers/bus/ti-sysc.c +74 −24
  30. drivers/soc/ti/omap_prm.c +4 −4
arch/arm/boot/dts/am335x-baltos.dtsi+1−1
@@ -369,7 +369,7 @@ · 368 unmodified lines
369&mmc2 {369&mmc2 {
370 status = "okay";370 status = "okay";
371 vmmc-supply = <&wl12xx_vmmc>;371 vmmc-supply = <&wl12xx_vmmc>;
372 ti,non-removable;372 non-removable;
373 bus-width = <4>;373 bus-width = <4>;
374 cap-power-off-card;374 cap-power-off-card;
375 pinctrl-names = "default";375 pinctrl-names = "default";
arch/arm/boot/dts/am335x-boneblack-common.dtsi+1−0
@@ -22,6 +22,7 @@ · 21 unmodified lines
22 pinctrl-0 = <&emmc_pins>;22 pinctrl-0 = <&emmc_pins>;
23 bus-width = <8>;23 bus-width = <8>;
24 status = "okay";24 status = "okay";
25 non-removable;
25};26};
26 27
27&am33xx_pinmux {28&am33xx_pinmux {
arch/arm/boot/dts/am335x-boneblack-wireless.dts+0−1
@@ -75,7 +75,6 @@ · 74 unmodified lines
75 bus-width = <4>;75 bus-width = <4>;
76 non-removable;76 non-removable;
77 cap-power-off-card;77 cap-power-off-card;
78 ti,needs-special-hs-handling;
79 keep-power-in-suspend;78 keep-power-in-suspend;
80 pinctrl-names = "default";79 pinctrl-names = "default";
81 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;80 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
arch/arm/boot/dts/am335x-boneblue.dts+0−1
@@ -367,7 +367,6 @@ · 366 unmodified lines
367 bus-width = <4>;367 bus-width = <4>;
368 non-removable;368 non-removable;
369 cap-power-off-card;369 cap-power-off-card;
370 ti,needs-special-hs-handling;
371 keep-power-in-suspend;370 keep-power-in-suspend;
372 pinctrl-names = "default";371 pinctrl-names = "default";
373 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;372 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
arch/arm/boot/dts/am335x-bonegreen-wireless.dts+0−1
@@ -75,7 +75,6 @@ · 74 unmodified lines
75 bus-width = <4>;75 bus-width = <4>;
76 non-removable;76 non-removable;
77 cap-power-off-card;77 cap-power-off-card;
78 ti,needs-special-hs-handling;
79 keep-power-in-suspend;78 keep-power-in-suspend;
80 pinctrl-names = "default";79 pinctrl-names = "default";
81 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;80 pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
arch/arm/boot/dts/am335x-evm.dts+1−2
@@ -743,8 +743,7 @@ · 742 unmodified lines
743 bus-width = <4>;743 bus-width = <4>;
744 pinctrl-names = "default";744 pinctrl-names = "default";
745 pinctrl-0 = <&mmc3_pins &wlan_pins>;745 pinctrl-0 = <&mmc3_pins &wlan_pins>;
746 ti,non-removable;746 non-removable;
747 ti,needs-special-hs-handling;
748 cap-power-off-card;747 cap-power-off-card;
749 keep-power-in-suspend;748 keep-power-in-suspend;
750 749
arch/arm/boot/dts/am335x-evmsk.dts+1−1
@@ -655,7 +655,7 @@ · 654 unmodified lines
655&mmc2 {655&mmc2 {
656 status = "okay";656 status = "okay";
657 vmmc-supply = <&wl12xx_vmmc>;657 vmmc-supply = <&wl12xx_vmmc>;
658 ti,non-removable;658 non-removable;
659 bus-width = <4>;659 bus-width = <4>;
660 cap-power-off-card;660 cap-power-off-card;
661 keep-power-in-suspend;661 keep-power-in-suspend;
arch/arm/boot/dts/am335x-lxm.dts+1−1
@@ -339,7 +339,7 @@ · 338 unmodified lines
339 pinctrl-0 = <&emmc_pins>;339 pinctrl-0 = <&emmc_pins>;
340 vmmc-supply = <&vmmcsd_fixed>;340 vmmc-supply = <&vmmcsd_fixed>;
341 bus-width = <8>;341 bus-width = <8>;
342 ti,non-removable;342 non-removable;
343 status = "okay";343 status = "okay";
344};344};
345 345
arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi+1−1
@@ -159,7 +159,7 @@ · 158 unmodified lines
159 vmmc-supply = <&vmmcsd_fixed>;159 vmmc-supply = <&vmmcsd_fixed>;
160 bus-width = <8>;160 bus-width = <8>;
161 pinctrl-0 = <&mmc1_pins_default>;161 pinctrl-0 = <&mmc1_pins_default>;
162 ti,non-removable;162 non-removable;
163 status = "okay";163 status = "okay";
164};164};
165 165
arch/arm/boot/dts/am335x-moxa-uc-8100-me-t.dts+1−1
@@ -451,7 +451,7 @@ · 450 unmodified lines
451 vmmc-supply = <&vmmcsd_fixed>;451 vmmc-supply = <&vmmcsd_fixed>;
452 bus-width = <8>;452 bus-width = <8>;
453 pinctrl-0 = <&mmc2_pins_default>;453 pinctrl-0 = <&mmc2_pins_default>;
454 ti,non-removable;454 non-removable;
455 status = "okay";455 status = "okay";
456};456};
457 457
arch/arm/boot/dts/am335x-pepper.dts+2−2
@@ -341,7 +341,7 @@ · 340 unmodified lines
341 pinctrl-0 = <&emmc_pins>;341 pinctrl-0 = <&emmc_pins>;
342 vmmc-supply = <&ldo3_reg>;342 vmmc-supply = <&ldo3_reg>;
343 bus-width = <8>;343 bus-width = <8>;
344 ti,non-removable;344 non-removable;
345};345};
346 346
347&mmc3 {347&mmc3 {
@@ -351,7 +351,7 @@ · 3 unmodified lines
351 pinctrl-0 = <&wireless_pins>;351 pinctrl-0 = <&wireless_pins>;
352 vmmmc-supply = <&v3v3c_reg>;352 vmmmc-supply = <&v3v3c_reg>;
353 bus-width = <4>;353 bus-width = <4>;
354 ti,non-removable;354 non-removable;
355 dmas = <&edma_xbar 12 0 1355 dmas = <&edma_xbar 12 0 1
356 &edma_xbar 13 0 2>;356 &edma_xbar 13 0 2>;
357 dma-names = "tx", "rx";357 dma-names = "tx", "rx";
arch/arm/boot/dts/am335x-phycore-som.dtsi+1−1
@@ -69,7 +69,7 @@ · 68 unmodified lines
69 pinctrl-0 = <&emmc_pins>;69 pinctrl-0 = <&emmc_pins>;
70 vmmc-supply = <&vmmc_reg>;70 vmmc-supply = <&vmmc_reg>;
71 bus-width = <8>;71 bus-width = <8>;
72 ti,non-removable;72 non-removable;
73 status = "disabled";73 status = "disabled";
74};74};
75 75
arch/arm/boot/dts/am335x-pocketbeagle.dts+0−1
@@ -88,7 +88,6 @@ · 87 unmodified lines
88 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)88 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
89 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)89 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
90 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)90 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
91 AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
92 >;91 >;
93 };92 };
94 93
arch/arm/boot/dts/am33xx-l4.dtsi+2−4
@@ -1335,10 +1335,8 @@ · 1334 unmodified lines
1335 ranges = <0x0 0x60000 0x1000>;1335 ranges = <0x0 0x60000 0x1000>;
1336 1336
1337 mmc1: mmc@0 {1337 mmc1: mmc@0 {
1338 compatible = "ti,omap4-hsmmc";1338 compatible = "ti,am335-sdhci";
1339 ti,dual-volt;
1340 ti,needs-special-reset;1339 ti,needs-special-reset;
1341 ti,needs-special-hs-handling;
1342 dmas = <&edma_xbar 24 0 01340 dmas = <&edma_xbar 24 0 0
1343 &edma_xbar 25 0 0>;1341 &edma_xbar 25 0 0>;
1344 dma-names = "tx", "rx";1342 dma-names = "tx", "rx";
@@ -1816,7 +1814,7 @@ · 471 unmodified lines
1816 ranges = <0x0 0xd8000 0x1000>;1814 ranges = <0x0 0xd8000 0x1000>;
1817 1815
1818 mmc2: mmc@0 {1816 mmc2: mmc@0 {
1819 compatible = "ti,omap4-hsmmc";1817 compatible = "ti,am335-sdhci";
1820 ti,needs-special-reset;1818 ti,needs-special-reset;
1821 dmas = <&edma 2 01819 dmas = <&edma 2 0
1822 &edma 3 0>;1820 &edma 3 0>;
arch/arm/boot/dts/am33xx.dtsi+4−3
@@ -322,10 +322,11 @@ · 321 unmodified lines
322 ranges = <0x0 0x47810000 0x1000>;322 ranges = <0x0 0x47810000 0x1000>;
323 323
324 mmc3: mmc@0 {324 mmc3: mmc@0 {
325 compatible = "ti,omap4-hsmmc";325 compatible = "ti,am335-sdhci";
326 ti,needs-special-reset;326 ti,needs-special-reset;
327 interrupts = <29>;327 interrupts = <29>;
328 reg = <0x0 0x1000>;328 reg = <0x0 0x1000>;
329 status = "disabled";
329 };330 };
330 };331 };
331 332
@@ -335,7 +336,7 @@ · 3 unmodified lines
335 <0x47400010 0x4>;336 <0x47400010 0x4>;
336 reg-names = "rev", "sysc";337 reg-names = "rev", "sysc";
337 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |338 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
338 SYSC_OMAP2_SOFTRESET)>;339 SYSC_OMAP4_SOFTRESET)>;
339 ti,sysc-midle = <SYSC_IDLE_FORCE>,340 ti,sysc-midle = <SYSC_IDLE_FORCE>,
340 <SYSC_IDLE_NO>,341 <SYSC_IDLE_NO>,
341 <SYSC_IDLE_SMART>;342 <SYSC_IDLE_SMART>;
@@ -347,7 +348,7 @@ · 5 unmodified lines
347 clock-names = "fck";348 clock-names = "fck";
348 #address-cells = <1>;349 #address-cells = <1>;
349 #size-cells = <1>;350 #size-cells = <1>;
350 ranges = <0x0 0x47400000 0x5000>;351 ranges = <0x0 0x47400000 0x8000>;
351 352
352 usb0_phy: usb-phy@1300 {353 usb0_phy: usb-phy@1300 {
353 compatible = "ti,am335x-usb-phy";354 compatible = "ti,am335x-usb-phy";
arch/arm/boot/dts/am4372.dtsi+2−1
@@ -316,10 +316,11 @@ · 315 unmodified lines
316 ranges = <0x0 0x47810000 0x1000>;316 ranges = <0x0 0x47810000 0x1000>;
317 317
318 mmc3: mmc@0 {318 mmc3: mmc@0 {
319 compatible = "ti,omap4-hsmmc";319 compatible = "ti,am437-sdhci";
320 ti,needs-special-reset;320 ti,needs-special-reset;
321 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;321 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
322 reg = <0x0 0x1000>;322 reg = <0x0 0x1000>;
323 status = "disabled";
323 };324 };
324 };325 };
325 326
arch/arm/boot/dts/am437x-cm-t43.dts+1−1
@@ -291,7 +291,7 @@ · 290 unmodified lines
291 pinctrl-0 = <&emmc_pins>;291 pinctrl-0 = <&emmc_pins>;
292 vmmc-supply = <&vmmc_3v3>;292 vmmc-supply = <&vmmc_3v3>;
293 bus-width = <8>;293 bus-width = <8>;
294 ti,non-removable;294 non-removable;
295};295};
296 296
297&spi0 {297&spi0 {
arch/arm/boot/dts/am437x-gp-evm.dts+2−18
@@ -91,22 +91,6 @@ · 90 unmodified lines
91 91
92 backlight = <&lcd_bl>;92 backlight = <&lcd_bl>;
93 93
94 panel-timing {
95 clock-frequency = <33000000>;
96 hactive = <800>;
97 vactive = <480>;
98 hfront-porch = <210>;
99 hback-porch = <16>;
100 hsync-len = <30>;
101 vback-porch = <10>;
102 vfront-porch = <22>;
103 vsync-len = <13>;
104 hsync-active = <0>;
105 vsync-active = <0>;
106 de-active = <1>;
107 pixelclk-active = <1>;
108 };
109
110 port {94 port {
111 lcd_in: endpoint {95 lcd_in: endpoint {
112 remote-endpoint = <&dpi_out>;96 remote-endpoint = <&dpi_out>;
@@ -869,7 +853,7 @@ · 756 unmodified lines
869 pinctrl-names = "default", "sleep";853 pinctrl-names = "default", "sleep";
870 pinctrl-0 = <&emmc_pins_default>;854 pinctrl-0 = <&emmc_pins_default>;
871 pinctrl-1 = <&emmc_pins_sleep>;855 pinctrl-1 = <&emmc_pins_sleep>;
872 ti,non-removable;856 non-removable;
873};857};
874 858
875&mmc3 {859&mmc3 {
@@ -886,7 +870,7 @@ · 10 unmodified lines
886 pinctrl-1 = <&mmc3_pins_sleep>;870 pinctrl-1 = <&mmc3_pins_sleep>;
887 cap-power-off-card;871 cap-power-off-card;
888 keep-power-in-suspend;872 keep-power-in-suspend;
889 ti,non-removable;873 non-removable;
890 874
891 #address-cells = <1>;875 #address-cells = <1>;
892 #size-cells = <0>;876 #size-cells = <0>;
arch/arm/boot/dts/am437x-l4.dtsi+2−3
@@ -1083,9 +1083,8 @@ · 1082 unmodified lines
1083 ranges = <0x0 0x60000 0x1000>;1083 ranges = <0x0 0x60000 0x1000>;
1084 1084
1085 mmc1: mmc@0 {1085 mmc1: mmc@0 {
1086 compatible = "ti,omap4-hsmmc";1086 compatible = "ti,am437-sdhci";
1087 reg = <0x0 0x1000>;1087 reg = <0x0 0x1000>;
1088 ti,dual-volt;
1089 ti,needs-special-reset;1088 ti,needs-special-reset;
1090 dmas = <&edma 24 0>,1089 dmas = <&edma 24 0>,
1091 <&edma 25 0>;1090 <&edma 25 0>;
@@ -1598,7 +1597,7 @@ · 506 unmodified lines
1598 ranges = <0x0 0xd8000 0x1000>;1597 ranges = <0x0 0xd8000 0x1000>;
1599 1598
1600 mmc2: mmc@0 {1599 mmc2: mmc@0 {
1601 compatible = "ti,omap4-hsmmc";1600 compatible = "ti,am437-sdhci";
1602 reg = <0x0 0x1000>;1601 reg = <0x0 0x1000>;
1603 ti,needs-special-reset;1602 ti,needs-special-reset;
1604 dmas = <&edma 2 0>,1603 dmas = <&edma 2 0>,
arch/arm/boot/dts/am437x-sk-evm.dts+1−17
@@ -134,22 +134,6 @@ · 133 unmodified lines
134 134
135 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;135 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
136 136
137 panel-timing {
138 clock-frequency = <9000000>;
139 hactive = <480>;
140 vactive = <272>;
141 hfront-porch = <2>;
142 hback-porch = <2>;
143 hsync-len = <41>;
144 vfront-porch = <2>;
145 vback-porch = <2>;
146 vsync-len = <10>;
147 hsync-active = <0>;
148 vsync-active = <0>;
149 de-active = <1>;
150 pixelclk-active = <1>;
151 };
152
153 port {137 port {
154 lcd_in: endpoint {138 lcd_in: endpoint {
155 remote-endpoint = <&dpi_out>;139 remote-endpoint = <&dpi_out>;
@@ -719,7 +703,7 @@ · 563 unmodified lines
719 pinctrl-1 = <&mmc3_pins_sleep>;703 pinctrl-1 = <&mmc3_pins_sleep>;
720 cap-power-off-card;704 cap-power-off-card;
721 keep-power-in-suspend;705 keep-power-in-suspend;
722 ti,non-removable;706 non-removable;
723 707
724 #address-cells = <1>;708 #address-cells = <1>;
725 #size-cells = <0>;709 #size-cells = <0>;
arch/arm/boot/dts/am43x-epos-evm.dts+0−16
@@ -47,22 +47,6 @@ · 46 unmodified lines
47 47
48 backlight = <&lcd_bl>;48 backlight = <&lcd_bl>;
49 49
50 panel-timing {
51 clock-frequency = <33000000>;
52 hactive = <800>;
53 vactive = <480>;
54 hfront-porch = <210>;
55 hback-porch = <16>;
56 hsync-len = <30>;
57 vback-porch = <10>;
58 vfront-porch = <22>;
59 vsync-len = <13>;
60 hsync-active = <0>;
61 vsync-active = <0>;
62 de-active = <1>;
63 pixelclk-active = <1>;
64 };
65
66 port {50 port {
67 lcd_in: endpoint {51 lcd_in: endpoint {
68 remote-endpoint = <&dpi_out>;52 remote-endpoint = <&dpi_out>;
arch/arm/boot/dts/am5729-beagleboneai.dts+1−1
@@ -505,7 +505,7 @@ · 504 unmodified lines
505 505
506&cpsw_emac0 {506&cpsw_emac0 {
507 phy-handle = <&phy0>;507 phy-handle = <&phy0>;
508 phy-mode = "rgmii";508 phy-mode = "rgmii-rxid";
509};509};
510 510
511&ocp {511&ocp {
arch/arm/boot/dts/dra7-evm-common.dtsi+0−20
@@ -245,26 +245,6 @@ · 244 unmodified lines
245 rx-num-evt = <32>;245 rx-num-evt = <32>;
246};246};
247 247
248&mailbox5 {
249 status = "okay";
250 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
251 status = "okay";
252 };
253 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
254 status = "okay";
255 };
256};
257
258&mailbox6 {
259 status = "okay";
260 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
261 status = "okay";
262 };
263 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
264 status = "okay";
265 };
266};
267
268&pcie1_rc {248&pcie1_rc {
269 status = "okay";249 status = "okay";
270};250};
arch/arm/boot/dts/dra7-l4.dtsi+16−18
@@ -1207,9 +1207,8 @@ · 1206 unmodified lines
1207 <SYSC_IDLE_SMART>,1207 <SYSC_IDLE_SMART>,
1208 <SYSC_IDLE_SMART_WKUP>;1208 <SYSC_IDLE_SMART_WKUP>;
1209 /* Domains (P, C): l4per_pwrdm, l4per_clkdm */1209 /* Domains (P, C): l4per_pwrdm, l4per_clkdm */
1210 clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>,1210 clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>;
1211 <&timer_sys_clk_div>;1211 clock-names = "fck";
1212 clock-names = "fck", "timer_sys_ck";
1213 #address-cells = <1>;1212 #address-cells = <1>;
1214 #size-cells = <1>;1213 #size-cells = <1>;
1215 ranges = <0x0 0x36000 0x1000>;1214 ranges = <0x0 0x36000 0x1000>;
@@ -3352,8 +3351,8 @@ · 2136 unmodified lines
3352 <SYSC_IDLE_SMART>,3351 <SYSC_IDLE_SMART>,
3353 <SYSC_IDLE_SMART_WKUP>;3352 <SYSC_IDLE_SMART_WKUP>;
3354 /* Domains (P, C): ipu_pwrdm, ipu_clkdm */3353 /* Domains (P, C): ipu_pwrdm, ipu_clkdm */
3355 clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>;3354 clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>;
3356 clock-names = "fck", "timer_sys_ck";3355 clock-names = "fck";
3357 #address-cells = <1>;3356 #address-cells = <1>;
3358 #size-cells = <1>;3357 #size-cells = <1>;
3359 ranges = <0x0 0x20000 0x1000>;3358 ranges = <0x0 0x20000 0x1000>;
@@ -3361,8 +3360,8 @@ · 1 unmodified line
3361 timer5: timer@0 {3360 timer5: timer@0 {
3362 compatible = "ti,omap5430-timer";3361 compatible = "ti,omap5430-timer";
3363 reg = <0x0 0x80>;3362 reg = <0x0 0x80>;
3364 clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>;3363 clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>, <&timer_sys_clk_div>;
3365 clock-names = "fck";3364 clock-names = "fck", "timer_sys_ck";
3366 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;3365 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
3367 };3366 };
3368 };3367 };
@@ -3379,9 +3378,8 @@ · 10 unmodified lines
3379 <SYSC_IDLE_SMART>,3378 <SYSC_IDLE_SMART>,
3380 <SYSC_IDLE_SMART_WKUP>;3379 <SYSC_IDLE_SMART_WKUP>;
3381 /* Domains (P, C): ipu_pwrdm, ipu_clkdm */3380 /* Domains (P, C): ipu_pwrdm, ipu_clkdm */
3382 clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>,3381 clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>;
3383 <&timer_sys_clk_div>;3382 clock-names = "fck";
3384 clock-names = "fck", "timer_sys_ck";
3385 #address-cells = <1>;3383 #address-cells = <1>;
3386 #size-cells = <1>;3384 #size-cells = <1>;
3387 ranges = <0x0 0x22000 0x1000>;3385 ranges = <0x0 0x22000 0x1000>;
@@ -3389,8 +3387,8 @@ · 1 unmodified line
3389 timer6: timer@0 {3387 timer6: timer@0 {
3390 compatible = "ti,omap5430-timer";3388 compatible = "ti,omap5430-timer";
3391 reg = <0x0 0x80>;3389 reg = <0x0 0x80>;
3392 clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>;3390 clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>, <&timer_sys_clk_div>;
3393 clock-names = "fck";3391 clock-names = "fck", "timer_sys_ck";
3394 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;3392 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
3395 };3393 };
3396 };3394 };
@@ -3498,8 +3496,8 @@ · 101 unmodified lines
3498 timer14: timer@0 {3496 timer14: timer@0 {
3499 compatible = "ti,omap5430-timer";3497 compatible = "ti,omap5430-timer";
3500 reg = <0x0 0x80>;3498 reg = <0x0 0x80>;
3501 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>;3499 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>, <&timer_sys_clk_div>;
3502 clock-names = "fck";3500 clock-names = "fck", "timer_sys_ck";
3503 interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;3501 interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
3504 ti,timer-pwm;3502 ti,timer-pwm;
3505 };3503 };
@@ -3526,8 +3524,8 @@ · 20 unmodified lines
3526 timer15: timer@0 {3524 timer15: timer@0 {
3527 compatible = "ti,omap5430-timer";3525 compatible = "ti,omap5430-timer";
3528 reg = <0x0 0x80>;3526 reg = <0x0 0x80>;
3529 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>;3527 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>, <&timer_sys_clk_div>;
3530 clock-names = "fck";3528 clock-names = "fck", "timer_sys_ck";
3531 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;3529 interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
3532 ti,timer-pwm;3530 ti,timer-pwm;
3533 };3531 };
@@ -3554,8 +3552,8 @@ · 20 unmodified lines
3554 timer16: timer@0 {3552 timer16: timer@0 {
3555 compatible = "ti,omap5430-timer";3553 compatible = "ti,omap5430-timer";
3556 reg = <0x0 0x80>;3554 reg = <0x0 0x80>;
3557 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>;3555 clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>, <&timer_sys_clk_div>;
3558 clock-names = "fck";3556 clock-names = "fck", "timer_sys_ck";
3559 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;3557 interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>;
3560 ti,timer-pwm;3558 ti,timer-pwm;
3561 };3559 };
arch/arm/boot/dts/motorola-cpcap-mapphone.dtsi+3−1
@@ -13,8 +13,10 @@ · 12 unmodified lines
13 #interrupt-cells = <2>;13 #interrupt-cells = <2>;
14 #address-cells = <1>;14 #address-cells = <1>;
15 #size-cells = <0>;15 #size-cells = <0>;
16 spi-max-frequency = <3000000>;16 spi-max-frequency = <9600000>;
17 spi-cs-high;17 spi-cs-high;
18 spi-cpol;
19 spi-cpha;
18 20
19 cpcap_adc: adc {21 cpcap_adc: adc {
20 compatible = "motorola,mapphone-cpcap-adc";22 compatible = "motorola,mapphone-cpcap-adc";
arch/arm/boot/dts/omap4-duovero-parlor.dts+1−1
@@ -139,7 +139,7 @@ · 138 unmodified lines
139 ethernet@gpmc {139 ethernet@gpmc {
140 reg = <5 0 0xff>;140 reg = <5 0 0xff>;
141 interrupt-parent = <&gpio2>;141 interrupt-parent = <&gpio2>;
142 interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */142 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */
143 143
144 phy-mode = "mii";144 phy-mode = "mii";
145 145
arch/arm/boot/dts/omap4.dtsi+1−1
@@ -662,6 +662,6 @@ · 661 unmodified lines
662 ti,no-idle;662 ti,no-idle;
663 timer@0 {663 timer@0 {
664 assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;664 assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>;
665 assigned-clock-parents = <&sys_clkin_ck>;665 assigned-clock-parents = <&sys_32k_ck>;
666 };666 };
667};667};
arch/arm/mach-omap2/omap_hwmod.c+1−1
@@ -3489,7 +3489,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = { · 3488 unmodified lines
3489};3489};
3490 3490
3491static const struct omap_hwmod_reset omap_reset_quirks[] = {3491static const struct omap_hwmod_reset omap_reset_quirks[] = {
3492 { .match = "dss", .len = 3, .reset = omap_dss_reset, },3492 { .match = "dss_core", .len = 8, .reset = omap_dss_reset, },
3493 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },3493 { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, },
3494 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },3494 { .match = "i2c", .len = 3, .reset = omap_i2c_reset, },
3495 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },3495 { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, },
drivers/bus/ti-sysc.c+74−24
@@ -221,6 +221,35 @@ static u32 sysc_read_sysstatus(struct sysc *ddata) · 220 unmodified lines
221 return sysc_read(ddata, offset);221 return sysc_read(ddata, offset);
222}222}
223 223
224/* Poll on reset status */
225static int sysc_wait_softreset(struct sysc *ddata)
226{
227 u32 sysc_mask, syss_done, rstval;
228 int syss_offset, error = 0;
229
230 syss_offset = ddata->offsets[SYSC_SYSSTATUS];
231 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
232
233 if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED)
234 syss_done = 0;
235 else
236 syss_done = ddata->cfg.syss_mask;
237
238 if (syss_offset >= 0) {
239 error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval,
240 (rstval & ddata->cfg.syss_mask) ==
241 syss_done,
242 100, MAX_MODULE_SOFTRESET_WAIT);
243
244 } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {
245 error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval,
246 !(rstval & sysc_mask),
247 100, MAX_MODULE_SOFTRESET_WAIT);
248 }
249
250 return error;
251}
252
224static int sysc_add_named_clock_from_child(struct sysc *ddata,253static int sysc_add_named_clock_from_child(struct sysc *ddata,
225 const char *name,254 const char *name,
226 const char *optfck_name)255 const char *optfck_name)
@@ -925,18 +954,47 @@ static int sysc_enable_module(struct device *dev) · 698 unmodified lines
925 struct sysc *ddata;954 struct sysc *ddata;
926 const struct sysc_regbits *regbits;955 const struct sysc_regbits *regbits;
927 u32 reg, idlemodes, best_mode;956 u32 reg, idlemodes, best_mode;
957 int error;
928 958
929 ddata = dev_get_drvdata(dev);959 ddata = dev_get_drvdata(dev);
960
961 /*
962 * Some modules like DSS reset automatically on idle. Enable optional
963 * reset clocks and wait for OCP softreset to complete.
964 */
965 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) {
966 error = sysc_enable_opt_clocks(ddata);
967 if (error) {
968 dev_err(ddata->dev,
969 "Optional clocks failed for enable: %i\n",
970 error);
971 return error;
972 }
973 }
974 error = sysc_wait_softreset(ddata);
975 if (error)
976 dev_warn(ddata->dev, "OCP softreset timed out\n");
977 if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET)
978 sysc_disable_opt_clocks(ddata);
979
980 /*
981 * Some subsystem private interconnects, like DSS top level module,
982 * need only the automatic OCP softreset handling with no sysconfig
983 * register bits to configure.
984 */
930 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)985 if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV)
931 return 0;986 return 0;
932 987
933 regbits = ddata->cap->regbits;988 regbits = ddata->cap->regbits;
934 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);989 reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
935 990
936 /* Set CLOCKACTIVITY, we only use it for ick */991 /*
992 * Set CLOCKACTIVITY, we only use it for ick. And we only configure it
993 * based on the SYSC_QUIRK_USE_CLOCKACT flag, not based on the hardware
994 * capabilities. See the old HWMOD_SET_DEFAULT_CLOCKACT flag.
995 */
937 if (regbits->clkact_shift >= 0 &&996 if (regbits->clkact_shift >= 0 &&
938 (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT ||997 (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT))
939 ddata->cfg.sysc_val & BIT(regbits->clkact_shift)))
940 reg |= SYSC_CLOCACT_ICK << regbits->clkact_shift;998 reg |= SYSC_CLOCACT_ICK << regbits->clkact_shift;
941 999
942 /* Set SIDLE mode */1000 /* Set SIDLE mode */
@@ -991,6 +1049,9 @@ set_autoidle: · 48 unmodified lines
991 sysc_write_sysconfig(ddata, reg);1049 sysc_write_sysconfig(ddata, reg);
992 }1050 }
993 1051
1052 /* Flush posted write */
1053 sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1054
994 if (ddata->module_enable_quirk)1055 if (ddata->module_enable_quirk)
995 ddata->module_enable_quirk(ddata);1056 ddata->module_enable_quirk(ddata);
996 1057
@@ -1071,6 +1132,9 @@ set_sidle: · 74 unmodified lines
1071 reg |= 1 << regbits->autoidle_shift;1132 reg |= 1 << regbits->autoidle_shift;
1072 sysc_write_sysconfig(ddata, reg);1133 sysc_write_sysconfig(ddata, reg);
1073 1134
1135 /* Flush posted write */
1136 sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]);
1137
1074 return 0;1138 return 0;
1075}1139}
1076 1140
@@ -1488,7 +1552,7 @@ static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset, · 411 unmodified lines
1488 bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;1552 bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;
1489 const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1);1553 const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1);
1490 int manager_count;1554 int manager_count;
1491 bool framedonetv_irq;1555 bool framedonetv_irq = true;
1492 u32 val, irq_mask = 0;1556 u32 val, irq_mask = 0;
1493 1557
1494 switch (sysc_soc->soc) {1558 switch (sysc_soc->soc) {
@@ -1505,6 +1569,7 @@ static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset, · 10 unmodified lines
1505 break;1569 break;
1506 case SOC_AM4:1570 case SOC_AM4:
1507 manager_count = 1;1571 manager_count = 1;
1572 framedonetv_irq = false;
1508 break;1573 break;
1509 case SOC_UNKNOWN:1574 case SOC_UNKNOWN:
1510 default:1575 default:
@@ -1822,11 +1887,10 @@ static int sysc_legacy_init(struct sysc *ddata) · 311 unmodified lines
1822 */1887 */
1823static int sysc_reset(struct sysc *ddata)1888static int sysc_reset(struct sysc *ddata)
1824{1889{
1825 int sysc_offset, syss_offset, sysc_val, rstval, error = 0;1890 int sysc_offset, sysc_val, error;
1826 u32 sysc_mask, syss_done;1891 u32 sysc_mask;
1827 1892
1828 sysc_offset = ddata->offsets[SYSC_SYSCONFIG];1893 sysc_offset = ddata->offsets[SYSC_SYSCONFIG];
1829 syss_offset = ddata->offsets[SYSC_SYSSTATUS];
1830 1894
1831 if (ddata->legacy_mode ||1895 if (ddata->legacy_mode ||
1832 ddata->cap->regbits->srst_shift < 0 ||1896 ddata->cap->regbits->srst_shift < 0 ||
@@ -1835,11 +1899,6 @@ static int sysc_reset(struct sysc *ddata) · 2 unmodified lines
1835 1899
1836 sysc_mask = BIT(ddata->cap->regbits->srst_shift);1900 sysc_mask = BIT(ddata->cap->regbits->srst_shift);
1837 1901
1838 if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED)
1839 syss_done = 0;
1840 else
1841 syss_done = ddata->cfg.syss_mask;
1842
1843 if (ddata->pre_reset_quirk)1902 if (ddata->pre_reset_quirk)
1844 ddata->pre_reset_quirk(ddata);1903 ddata->pre_reset_quirk(ddata);
1845 1904
@@ -1856,18 +1915,9 @@ static int sysc_reset(struct sysc *ddata) · 10 unmodified lines
1856 if (ddata->post_reset_quirk)1915 if (ddata->post_reset_quirk)
1857 ddata->post_reset_quirk(ddata);1916 ddata->post_reset_quirk(ddata);
1858 1917
1859 /* Poll on reset status */1918 error = sysc_wait_softreset(ddata);
1860 if (syss_offset >= 0) {1919 if (error)
1861 error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval,1920 dev_warn(ddata->dev, "OCP softreset timed out\n");
1862 (rstval & ddata->cfg.syss_mask) ==
1863 syss_done,
1864 100, MAX_MODULE_SOFTRESET_WAIT);
1865
1866 } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {
1867 error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval,
1868 !(rstval & sysc_mask),
1869 100, MAX_MODULE_SOFTRESET_WAIT);
1870 }
1871 1921
1872 if (ddata->reset_done_quirk)1922 if (ddata->reset_done_quirk)
1873 ddata->reset_done_quirk(ddata);1923 ddata->reset_done_quirk(ddata);
drivers/soc/ti/omap_prm.c+4−4
@@ -256,10 +256,10 @@ static int omap_reset_deassert(struct reset_controller_dev *rcdev, · 255 unmodified lines
256 goto exit;256 goto exit;
257 257
258 /* wait for the status to be set */258 /* wait for the status to be set */
259 ret = readl_relaxed_poll_timeout(reset->prm->base +259 ret = readl_relaxed_poll_timeout_atomic(reset->prm->base +
260 reset->prm->data->rstst,260 reset->prm->data->rstst,
261 v, v & BIT(st_bit), 1,261 v, v & BIT(st_bit), 1,
262 OMAP_RESET_MAX_WAIT);262 OMAP_RESET_MAX_WAIT);
263 if (ret)263 if (ret)
264 pr_err("%s: timedout waiting for %s:%lu\n", __func__,264 pr_err("%s: timedout waiting for %s:%lu\n", __func__,
265 reset->prm->data->name, id);265 reset->prm->data->name, id);

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