lael-labs/linux

.clang-format+14−4

   - 'for_each_card_auxs'
   - 'for_each_card_auxs_safe'
   - 'for_each_card_components'
+  - 'for_each_card_dapms'
   - 'for_each_card_pre_auxs'
   - 'for_each_card_prelinks'
   - 'for_each_card_rtds'
   - 'for_each_card_rtds_safe'
+  - 'for_each_card_widgets'
+  - 'for_each_card_widgets_safe'
   - 'for_each_cgroup_storage_type'
   - 'for_each_child_of_node'
   - 'for_each_clear_bit'
   - 'for_each_cpu_and'
   - 'for_each_cpu_not'
   - 'for_each_cpu_wrap'
+  - 'for_each_dapm_widgets'
   - 'for_each_dev_addr'
   - 'for_each_dev_scope'
   - 'for_each_displayid_db'
   - 'for_each_dpcm_fe'
   - 'for_each_drhd_unit'
   - 'for_each_dss_dev'
-  - 'for_each_efi_handle'
   - 'for_each_efi_memory_desc'
   - 'for_each_efi_memory_desc_in_map'
   - 'for_each_element'
   - 'for_each_ip_tunnel_rcu'
   - 'for_each_irq_nr'
   - 'for_each_link_codecs'
+  - 'for_each_link_cpus'
   - 'for_each_link_platforms'
   - 'for_each_lru'
   - 'for_each_matching_node'
   - 'for_each_pci_bridge'
   - 'for_each_pci_dev'
   - 'for_each_pci_msi_entry'
+  - 'for_each_pcm_streams'
   - 'for_each_populated_zone'
   - 'for_each_possible_cpu'
   - 'for_each_present_cpu'
   - 'for_each_property_of_node'
   - 'for_each_registered_fb'
   - 'for_each_reserved_mem_region'
-  - 'for_each_rtd_codec_dai'
+  - 'for_each_rtd_codec_dais'
-  - 'for_each_rtd_codec_dai_rollback'
+  - 'for_each_rtd_codec_dais_rollback'
   - 'for_each_rtd_components'
+  - 'for_each_rtd_cpu_dais'
+  - 'for_each_rtd_cpu_dais_rollback'
+  - 'for_each_rtd_dais'
   - 'for_each_set_bit'
   - 'for_each_set_bit_from'
   - 'for_each_set_clump8'
   - 'klp_for_each_object'
   - 'klp_for_each_object_safe'
   - 'klp_for_each_object_static'
+  - 'kunit_suite_for_each_test_case'
   - 'kvm_for_each_memslot'
   - 'kvm_for_each_vcpu'
   - 'list_for_each'
   - 'of_property_for_each_string'
   - 'of_property_for_each_u32'
   - 'pci_bus_for_each_resource'
+  - 'pcm_for_each_format'
   - 'ping_portaddr_for_each_entry'
   - 'plist_for_each'
   - 'plist_for_each_continue'
 MacroBlockBegin: ''
 MacroBlockEnd: ''
 MaxEmptyLinesToKeep: 1
-NamespaceIndentation: Inner
+NamespaceIndentation: None
 #ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
 ObjCBlockIndentWidth: 8
 ObjCSpaceAfterProperty: true

.mailmap+2−0

 Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
 Takashi YOSHII <takashi.yoshii.zj@renesas.com>
 Will Deacon <will@kernel.org> <will.deacon@arm.com>
+Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
+Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de>
 Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
 Yusuke Goda <goda.yusuke@renesas.com>
 Gustavo Padovan <gustavo@las.ic.unicamp.br>

Documentation/admin-guide/device-mapper/dm-integrity.rst+9−6

@@ -182,12 +182,15 @@ fix_padding · 181 unmodified lines
182	space-efficient. If this option is not present, large padding is	182	space-efficient. If this option is not present, large padding is
183	used - that is for compatibility with older kernels.	183	used - that is for compatibility with older kernels.
184		184
185		185	allow_discards
186	The journal mode (D/J), buffer_sectors, journal_watermark, commit_time can	186	Allow block discard requests (a.k.a. TRIM) for the integrity device.
187	be changed when reloading the target (load an inactive table and swap the	187	Discards are only allowed to devices using internal hash.
188	tables with suspend and resume). The other arguments should not be changed	188
189	when reloading the target because the layout of disk data depend on them	189	The journal mode (D/J), buffer_sectors, journal_watermark, commit_time and
190	and the reloaded target would be non-functional.	190	allow_discards can be changed when reloading the target (load an inactive
		191	table and swap the tables with suspend and resume). The other arguments
		192	should not be changed when reloading the target because the layout of disk
		193	data depend on them and the reloaded target would be non-functional.
191		194
192		195
193	The layout of the formatted block device:	196	The layout of the formatted block device:

Documentation/admin-guide/kernel-parameters.txt+1−2

@@ -5187,8 +5187,7 @@ · 5186 unmodified lines
5187		5187
5188	usbcore.old_scheme_first=	5188	usbcore.old_scheme_first=
5189	[USB] Start with the old device initialization	5189	[USB] Start with the old device initialization
5190	scheme, applies only to low and full-speed devices	5190	scheme (default 0 = off).
5191	(default 0 = off).
5192		5191
5193	usbcore.usbfs_memory_mb=	5192	usbcore.usbfs_memory_mb=
5194	[USB] Memory limit (in MB) for buffers allocated by	5193	[USB] Memory limit (in MB) for buffers allocated by

Documentation/admin-guide/sysctl/kernel.rst+19−28

 modprobe
 ========
-This gives the full path of the modprobe command which the kernel will
+The full path to the usermode helper for autoloading kernel modules,
-use to load modules. This can be used to debug module loading
+by default "/sbin/modprobe".  This binary is executed when the kernel
-requests::
+requests a module.  For example, if userspace passes an unknown
+filesystem type to mount(), then the kernel will automatically request
+the corresponding filesystem module by executing this usermode helper.
+This usermode helper should insert the needed module into the kernel.
+This sysctl only affects module autoloading.  It has no effect on the
+ability to explicitly insert modules.
+This sysctl can be used to debug module loading requests::
     echo '#! /bin/sh' > /tmp/modprobe
     echo 'echo "$@" >> /tmp/modprobe.log' >> /tmp/modprobe
     chmod a+x /tmp/modprobe
     echo /tmp/modprobe > /proc/sys/kernel/modprobe
-This only applies when the *kernel* is requesting that the module be
+Alternatively, if this sysctl is set to the empty string, then module
-loaded; it won't have any effect if the module is being loaded
+autoloading is completely disabled.  The kernel will not try to
-explicitly using ``modprobe`` from userspace.
+execute a usermode helper at all, nor will it call the
+kernel_module_request LSM hook.
+If CONFIG_STATIC_USERMODEHELPER=y is set in the kernel configuration,
+then the configured static usermode helper overrides this sysctl,
+except that the empty string is still accepted to completely disable
+module autoloading as described above.
 modules_disabled
 ================
      successful IPC object allocation. If an IPC object allocation syscall
      fails, it is undefined if the value remains unmodified or is reset to -1.
-modprobe:
-=========
-The path to the usermode helper for autoloading kernel modules, by
-default "/sbin/modprobe".  This binary is executed when the kernel
-requests a module.  For example, if userspace passes an unknown
-filesystem type to mount(), then the kernel will automatically request
-the corresponding filesystem module by executing this usermode helper.
-This usermode helper should insert the needed module into the kernel.
-This sysctl only affects module autoloading.  It has no effect on the
-ability to explicitly insert modules.
-If this sysctl is set to the empty string, then module autoloading is
-completely disabled.  The kernel will not try to execute a usermode
-helper at all, nor will it call the kernel_module_request LSM hook.
-If CONFIG_STATIC_USERMODEHELPER=y is set in the kernel configuration,
-then the configured static usermode helper overrides this sysctl,
-except that the empty string is still accepted to completely disable
-module autoloading as described above.
 nmi_watchdog
 ============

Documentation/arm64/amu.rst+26−21

@@ -23,13 +23,14 @@ optional external memory-mapped interface. · 22 unmodified lines
23		23
24	Version 1 of the Activity Monitors architecture implements a counter group	24	Version 1 of the Activity Monitors architecture implements a counter group
25	of four fixed and architecturally defined 64-bit event counters.	25	of four fixed and architecturally defined 64-bit event counters.
26	- CPU cycle counter: increments at the frequency of the CPU.	26
27	- Constant counter: increments at the fixed frequency of the system	27	- CPU cycle counter: increments at the frequency of the CPU.
28	clock.	28	- Constant counter: increments at the fixed frequency of the system
29	- Instructions retired: increments with every architecturally executed	29	clock.
30	instruction.	30	- Instructions retired: increments with every architecturally executed
31	- Memory stall cycles: counts instruction dispatch stall cycles caused by	31	instruction.
32	misses in the last level cache within the clock domain.	32	- Memory stall cycles: counts instruction dispatch stall cycles caused by
		33	misses in the last level cache within the clock domain.
33		34
34	When in WFI or WFE these counters do not increment.	35	When in WFI or WFE these counters do not increment.
35		36
@@ -57,11 +58,12 @@ counters, only the presence of the extension. · 21 unmodified lines
57		58
58	Firmware (code running at higher exception levels, e.g. arm-tf) support is	59	Firmware (code running at higher exception levels, e.g. arm-tf) support is
59	needed to:	60	needed to:
60	- Enable access for lower exception levels (EL2 and EL1) to the AMU	61
61	registers.	62	- Enable access for lower exception levels (EL2 and EL1) to the AMU
62	- Enable the counters. If not enabled these will read as 0.	63	registers.
63	- Save/restore the counters before/after the CPU is being put/brought up	64	- Enable the counters. If not enabled these will read as 0.
64	from the 'off' power state.	65	- Save/restore the counters before/after the CPU is being put/brought up
		66	from the 'off' power state.
65		67
66	When using kernels that have this feature enabled but boot with broken	68	When using kernels that have this feature enabled but boot with broken
67	firmware the user may experience panics or lockups when accessing the	69	firmware the user may experience panics or lockups when accessing the
@@ -78,10 +80,11 @@ are not trapped in EL2/EL3. · 10 unmodified lines
78		80
79	The fixed counters of AMUv1 are accessible though the following system	81	The fixed counters of AMUv1 are accessible though the following system
80	register definitions:	82	register definitions:
81	- SYS_AMEVCNTR0_CORE_EL0	83
82	- SYS_AMEVCNTR0_CONST_EL0	84	- SYS_AMEVCNTR0_CORE_EL0
83	- SYS_AMEVCNTR0_INST_RET_EL0	85	- SYS_AMEVCNTR0_CONST_EL0
84	- SYS_AMEVCNTR0_MEM_STALL_EL0	86	- SYS_AMEVCNTR0_INST_RET_EL0
		87	- SYS_AMEVCNTR0_MEM_STALL_EL0
85		88
86	Auxiliary platform specific counters can be accessed using	89	Auxiliary platform specific counters can be accessed using
87	SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15.	90	SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15.
@@ -93,9 +96,10 @@ Userspace access · 5 unmodified lines
93	----------------	96	----------------
94		97
95	Currently, access from userspace to the AMU registers is disabled due to:	98	Currently, access from userspace to the AMU registers is disabled due to:
96	- Security reasons: they might expose information about code executed in	99
97	secure mode.	100	- Security reasons: they might expose information about code executed in
98	- Purpose: AMU counters are intended for system management use.	101	secure mode.
		102	- Purpose: AMU counters are intended for system management use.
99		103
100	Also, the presence of the feature is not visible to userspace.	104	Also, the presence of the feature is not visible to userspace.
101		105
@@ -105,8 +109,9 @@ Virtualization · 3 unmodified lines
105		109
106	Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM	110	Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM
107	guest side is disabled due to:	111	guest side is disabled due to:
108	- Security reasons: they might expose information about code executed	112
109	by other guests or the host.	113	- Security reasons: they might expose information about code executed
		114	by other guests or the host.
110		115
111	Any attempt to access the AMU registers will result in an UNDEFINED	116	Any attempt to access the AMU registers will result in an UNDEFINED
112	exception being injected into the guest.	117	exception being injected into the guest.

Documentation/core-api/timekeeping.rst+3−3

@@ -154,9 +154,9 @@ architectures. These are the recommended replacements: · 153 unmodified lines
154		154
155	Use ktime_get() or ktime_get_ts64() instead.	155	Use ktime_get() or ktime_get_ts64() instead.
156		156
157	.. c:function:: struct timeval do_gettimeofday( void )	157	.. c:function:: void do_gettimeofday( struct timeval * )
158	struct timespec getnstimeofday( void )	158	void getnstimeofday( struct timespec * )
159	struct timespec64 getnstimeofday64( void )	159	void getnstimeofday64( struct timespec64 * )
160	void ktime_get_real_ts( struct timespec * )	160	void ktime_get_real_ts( struct timespec * )
161		161
162	ktime_get_real_ts64() is a direct replacement, but consider using	162	ktime_get_real_ts64() is a direct replacement, but consider using

Documentation/devicetree/bindings/Makefile+12−9

 DT_DOC_CHECKER ?= dt-doc-validate
 DT_EXTRACT_EX ?= dt-extract-example
 DT_MK_SCHEMA ?= dt-mk-schema
+DT_MK_SCHEMA_USERONLY_FLAG := $(if $(DT_SCHEMA_FILES), -u)
 quiet_cmd_chk_binding = CHKDT   $(patsubst $(srctree)/%,%,$<)
       cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \
 # Use full schemas when checking %.example.dts
 DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml
+find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \
+		-name 'processed-schema*' ! \
+		-name '*.example.dt.yaml' \)
 quiet_cmd_mk_schema = SCHEMA  $@
-      cmd_mk_schema = $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) -o $@ $(real-prereqs)
+      cmd_mk_schema = rm -f $@ ; \
+                      $(if $(DT_MK_SCHEMA_FLAGS), \
+                           echo $(real-prereqs), \
+                           $(find_cmd)) | \
+                      xargs $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) >> $@
-DT_DOCS = $(addprefix $(src)/, \
+DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||')
-	$(shell \
-	cd $(srctree)/$(src) && \
-	find * \( -name '*.yaml' ! \
-		-name 'processed-schema*' ! \
-		-name '*.example.dt.yaml' \) \
-	))
 DT_SCHEMA_FILES ?= $(DT_DOCS)
 $(obj)/processed-schema-examples.yaml: $(DT_DOCS) FORCE
 	$(call if_changed,mk_schema)
-$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u
+$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := $(DT_MK_SCHEMA_USERONLY_FLAG)
 $(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) FORCE
 	$(call if_changed,mk_schema)

Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml+6−0

     description:
       See section 2.3.9 of the DeviceTree Specification.
+  '#address-cells': true
+  '#size-cells': true
 required:
   - "#interconnect-cells"
   - compatible
         compatible = "allwinner,sun5i-a13-mbus";
         reg = <0x01c01000 0x1000>;
         clocks = <&ccu CLK_MBUS>;
+        #address-cells = <1>;
+        #size-cells = <1>;
         dma-ranges = <0x00000000 0x40000000 0x20000000>;
         #interconnect-cells = <1>;
     };

Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml+1−1

@@ -91,7 +91,7 @@ required: · 90 unmodified lines
91		91
92	examples:	92	examples:
93	- \|	93	- \|
94	vco1: clock@00 {	94	vco1: clock {
95	compatible = "arm,impd1-vco1";	95	compatible = "arm,impd1-vco1";
96	#clock-cells = <0>;	96	#clock-cells = <0>;
97	lock-offset = <0x08>;	97	lock-offset = <0x08>;

Documentation/devicetree/bindings/display/bridge/adi,adv7123.txt+2−2

@@ -1,5 +1,5 @@
1	Analog Device ADV7123 Video DAC	1	Analog Devices ADV7123 Video DAC
2	-------------------------------	2	--------------------------------
3		3
4	The ADV7123 is a digital-to-analog converter that outputs VGA signals from a	4	The ADV7123 is a digital-to-analog converter that outputs VGA signals from a
5	parallel video input.	5	parallel video input.

Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt+2−2

@@ -1,5 +1,5 @@
1	Analog Device ADV7511(W)/13/33/35 HDMI Encoders	1	Analog Devices ADV7511(W)/13/33/35 HDMI Encoders
2	-----------------------------------------	2	------------------------------------------------
3		3
4	The ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video	4	The ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video
5	transmitters compatible with HDMI 1.4 and DVI 1.0. They support color space	5	transmitters compatible with HDMI 1.4 and DVI 1.0. They support color space

Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml+0−1

@@ -37,7 +37,6 @@ examples: · 36 unmodified lines
37	dsi {	37	dsi {
38	#address-cells = <1>;	38	#address-cells = <1>;
39	#size-cells = <0>;	39	#size-cells = <0>;
40	reg = <0xff450000 0x1000>;
41		40
42	panel@0 {	41	panel@0 {
43	compatible = "leadtek,ltk500hd1829";	42	compatible = "leadtek,ltk500hd1829";

Documentation/devicetree/bindings/display/panel/lvds.yaml+9−1

@@ -96,12 +96,20 @@ properties: · 95 unmodified lines
96	If set, reverse the bit order described in the data mappings below on all	96	If set, reverse the bit order described in the data mappings below on all
97	data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.	97	data lanes, transmitting bits for slots 6 to 0 instead of 0 to 6.
98		98
		99	port: true
		100	ports: true
		101
99	required:	102	required:
100	- compatible	103	- compatible
101	- data-mapping	104	- data-mapping
102	- width-mm	105	- width-mm
103	- height-mm	106	- height-mm
104	- panel-timing	107	- panel-timing
105	- port	108
		109	oneOf:
		110	- required:
		111	- port
		112	- required:
		113	- ports
106		114
107	...	115	...

Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml+0−1

@@ -37,7 +37,6 @@ examples: · 36 unmodified lines
37	dsi {	37	dsi {
38	#address-cells = <1>;	38	#address-cells = <1>;
39	#size-cells = <0>;	39	#size-cells = <0>;
40	reg = <0xff450000 0x1000>;
41		40
42	panel@0 {	41	panel@0 {
43	compatible = "xinpeng,xpp055c272";	42	compatible = "xinpeng,xpp055c272";

Documentation/devicetree/bindings/dma/adi,axi-dmac.txt+1−1

@@ -1,4 +1,4 @@
1	Analog Device AXI-DMAC DMA controller	1	Analog Devices AXI-DMAC DMA controller
2		2
3	Required properties:	3	Required properties:
4	- compatible: Must be "adi,axi-dmac-1.00.a".	4	- compatible: Must be "adi,axi-dmac-1.00.a".

Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml+3−4

     const: socionext,uniphier-xdmac
   reg:
-    items:
+    maxItems: 1
-      - description: XDMAC base register region (offset and length)
-      - description: XDMAC extension register region (offset and length)
   interrupts:
     maxItems: 1
   - reg
   - interrupts
   - "#dma-cells"
+  - dma-channels
 examples:
   - |
     xdmac: dma-controller@5fc10000 {
         compatible = "socionext,uniphier-xdmac";
-        reg = <0x5fc10000 0x1000>, <0x5fc20000 0x800>;
+        reg = <0x5fc10000 0x5300>;
         interrupts = <0 188 4>;
         #dma-cells = <2>;
         dma-channels = <16>;

Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml+2−2

@@ -2,7 +2,7 @@ · 1 unmodified line
2	# Copyright 2019 Analog Devices Inc.	2	# Copyright 2019 Analog Devices Inc.
3	%YAML 1.2	3	%YAML 1.2
4	---	4	---
5	$id: http://devicetree.org/schemas/bindings/hwmon/adi,axi-fan-control.yaml#	5	$id: http://devicetree.org/schemas/hwmon/adi,axi-fan-control.yaml#
6	$schema: http://devicetree.org/meta-schemas/core.yaml#	6	$schema: http://devicetree.org/meta-schemas/core.yaml#
7		7
8	title: Analog Devices AXI FAN Control Device Tree Bindings	8	title: Analog Devices AXI FAN Control Device Tree Bindings
@@ -47,7 +47,7 @@ required: · 38 unmodified lines
47		47
48	examples:	48	examples:
49	- \|	49	- \|
50	fpga_axi: fpga-axi@0 {	50	fpga_axi: fpga-axi {
51	#address-cells = <0x2>;	51	#address-cells = <0x2>;
52	#size-cells = <0x1>;	52	#size-cells = <0x1>;
53		53

Documentation/devicetree/bindings/hwmon/adt7475.yaml+1−1

@@ -1,7 +1,7 @@
1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2	%YAML 1.2	2	%YAML 1.2
3	---	3	---
4	$id: http://devicetree.org/schemas/adt7475.yaml#	4	$id: http://devicetree.org/schemas/hwmon/adt7475.yaml#
5	$schema: http://devicetree.org/meta-schemas/core.yaml#	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
6		6
7	title: ADT7475 hwmon sensor	7	title: ADT7475 hwmon sensor

Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml+1−1

@@ -1,7 +1,7 @@
1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2	%YAML 1.2	2	%YAML 1.2
3	---	3	---
4	$id: "http://devicetree.org/schemas/bindings/iio/adc/st,stm32-adc.yaml#"	4	$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
5	$schema: "http://devicetree.org/meta-schemas/core.yaml#"	5	$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6		6
7	title: STMicroelectronics STM32 ADC bindings	7	title: STMicroelectronics STM32 ADC bindings

Documentation/devicetree/bindings/iio/dac/ad5755.txt+1−1

@@ -1,4 +1,4 @@
1	* Analog Device AD5755 IIO Multi-Channel DAC Linux Driver	1	* Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
2		2
3	Required properties:	3	Required properties:
4	- compatible: Has to contain one of the following:	4	- compatible: Has to contain one of the following:

Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml+46−51

 # Copyright 2020 Analog Devices Inc.
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/bindings/iio/dac/adi,ad5770r.yaml#
+$id: http://devicetree.org/schemas/iio/dac/adi,ad5770r.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Analog Devices AD5770R DAC device driver
       asserted during driver probe.
     maxItems: 1
-  channel0:
+  channel@0:
     description: Represents an external channel which are
       connected to the DAC. Channel 0 can act both as a current
       source and sink.
     type: object
     properties:
-      num:
+      reg:
         description: This represents the channel number.
-        items:
+        const: 0
-          const: 0
       adi,range-microamp:
           description: Output range of the channel.
           oneOf:
-            - $ref: /schemas/types.yaml#/definitions/int32-array
             - items:
-                - enum: [0 300000]
+                - const: 0
-                - enum: [-60000 0]
+                - const: 300000
-                - enum: [-60000 300000]
+            - items:
+                - const: -60000
+                - const: 0
+            - items:
+                - const: -60000
+                - const: 300000
-  channel1:
+  channel@1:
     description: Represents an external channel which are
       connected to the DAC.
     type: object
     properties:
-      num:
+      reg:
         description: This represents the channel number.
-        items:
+        const: 1
-          const: 1
       adi,range-microamp:
           description: Output range of the channel.
-          oneOf:
+          items:
-            - $ref: /schemas/types.yaml#/definitions/uint32-array
+            - const: 0
-            - items:
+            - enum: [ 140000, 250000 ]
-                - enum: [0 140000]
-                - enum: [0 250000]
-  channel2:
+  channel@2:
     description: Represents an external channel which are
       connected to the DAC.
     type: object
     properties:
-      num:
+      reg:
         description: This represents the channel number.
-        items:
+        const: 2
-          const: 2
       adi,range-microamp:
           description: Output range of the channel.
-          oneOf:
+          items:
-            - $ref: /schemas/types.yaml#/definitions/uint32-array
+            - const: 0
-            - items:
+            - enum: [ 55000, 150000 ]
-                - enum: [0 140000]
-                - enum: [0 250000]
 patternProperties:
   "^channel@([3-5])$":
     type: object
     description: Represents the external channels which are connected to the DAC.
     properties:
-      num:
+      reg:
         description: This represents the channel number.
-        items:
+        minimum: 3
-          minimum: 3
+        maximum: 5
-          maximum: 5
       adi,range-microamp:
           description: Output range of the channel.
-          oneOf:
+          items:
-            - $ref: /schemas/types.yaml#/definitions/uint32-array
+            - const: 0
-            - items:
+            - enum: [ 45000, 100000 ]
-                - enum: [0 45000]
-                - enum: [0 100000]
 required:
 - reg
-- diff-channels
+- channel@0
-- channel0
+- channel@1
-- channel1
+- channel@2
-- channel2
+- channel@3
-- channel3
+- channel@4
-- channel4
+- channel@5
-- channel5
 examples:
   - |
                 #size-cells = <0>;
                 ad5770r@0 {
-                        compatible = "ad5770r";
+                        compatible = "adi,ad5770r";
                         reg = <0>;
                         spi-max-frequency = <1000000>;
                         vref-supply = <&vref>;
                         adi,external-resistor;
                         reset-gpios = <&gpio 22 0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
                         channel@0 {
-                                num = <0>;
+                                reg = <0>;
-                                adi,range-microamp = <(-60000) 300000>;
+                                adi,range-microamp = <0 300000>;
                         };
                         channel@1 {
-                                num = <1>;
+                                reg = <1>;
                                 adi,range-microamp = <0 140000>;
                         };
                         channel@2 {
-                                num = <2>;
+                                reg = <2>;
                                 adi,range-microamp = <0 55000>;
                         };
                         channel@3 {
-                                num = <3>;
+                                reg = <3>;
                                 adi,range-microamp = <0 45000>;
                         };
                         channel@4 {
-                                num = <4>;
+                                reg = <4>;
                                 adi,range-microamp = <0 45000>;
                         };
                         channel@5 {
-                                num = <5>;
+                                reg = <5>;
                                 adi,range-microamp = <0 45000>;
                         };
                 };

Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml+1−1

@@ -109,7 +109,7 @@ examples: · 108 unmodified lines
109	- \|	109	- \|
110	#include <dt-bindings/gpio/gpio.h>	110	#include <dt-bindings/gpio/gpio.h>
111	#include <dt-bindings/interrupt-controller/arm-gic.h>	111	#include <dt-bindings/interrupt-controller/arm-gic.h>
112	i2c@00000000 {	112	i2c {
113	#address-cells = <1>;	113	#address-cells = <1>;
114	#size-cells = <0>;	114	#size-cells = <0>;
115	edt-ft5x06@38 {	115	edt-ft5x06@38 {

Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml+2−3

@@ -56,9 +56,8 @@ properties: · 55 unmodified lines
56	cell with zero.	56	cell with zero.
57	allOf:	57	allOf:
58	- $ref: /schemas/types.yaml#/definitions/uint32-array	58	- $ref: /schemas/types.yaml#/definitions/uint32-array
59	- items:	59	- minItems: 4
60	minItems: 4	60	maxItems: 4
61	maxItems: 4
62		61
63		62
64	required:	63	required:

Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml+23−18

@@ -97,30 +97,35 @@ examples: · 96 unmodified lines
97	#include <dt-bindings/clock/tegra186-clock.h>	97	#include <dt-bindings/clock/tegra186-clock.h>
98	#include <dt-bindings/interrupt-controller/arm-gic.h>	98	#include <dt-bindings/interrupt-controller/arm-gic.h>
99		99
100	memory-controller@2c00000 {	100	bus {
101	compatible = "nvidia,tegra186-mc";
102	reg = <0x0 0x02c00000 0x0 0xb0000>;
103	interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
104
105	#address-cells = <2>;	101	#address-cells = <2>;
106	#size-cells = <2>;	102	#size-cells = <2>;
107		103
108	ranges = <0x0 0x02c00000 0x02c00000 0x0 0xb0000>;	104	memory-controller@2c00000 {
		105	compatible = "nvidia,tegra186-mc";
		106	reg = <0x0 0x02c00000 0x0 0xb0000>;
		107	interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
		108
		109	#address-cells = <2>;
		110	#size-cells = <2>;
		111
		112	ranges = <0x0 0x02c00000 0x0 0x02c00000 0x0 0xb0000>;
109		113
110	/*	114	/*
111	* Memory clients have access to all 40 bits that the memory	115	* Memory clients have access to all 40 bits that the memory
112	* controller can address.	116	* controller can address.
113	*/	117	*/
114	dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;	118	dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
115		119
116	external-memory-controller@2c60000 {	120	external-memory-controller@2c60000 {
117	compatible = "nvidia,tegra186-emc";	121	compatible = "nvidia,tegra186-emc";
118	reg = <0x0 0x02c60000 0x0 0x50000>;	122	reg = <0x0 0x02c60000 0x0 0x50000>;
119	interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;	123	interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
120	clocks = <&bpmp TEGRA186_CLK_EMC>;	124	clocks = <&bpmp TEGRA186_CLK_EMC>;
121	clock-names = "emc";	125	clock-names = "emc";
122		126
123	nvidia,bpmp = <&bpmp>;	127	nvidia,bpmp = <&bpmp>;
		128	};
124	};	129	};
125	};	130	};
126		131

Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml+3−1

     #include <dt-bindings/leds/common.h>
     i2c {
-      pmic: pmic@4b {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        pmic: pmic@4b {
             compatible = "rohm,bd71837";
             reg = <0x4b>;
             interrupt-parent = <&gpio1>;

Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml+3−1

     #include <dt-bindings/leds/common.h>
     i2c {
-      pmic: pmic@4b {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        pmic: pmic@4b {
             compatible = "rohm,bd71847";
             reg = <0x4b>;
             interrupt-parent = <&gpio1>;

Documentation/devicetree/bindings/mfd/st,stpmic1.yaml+1−3

     additionalProperties: false
-  additionalProperties: false
 additionalProperties: false
 required:
   - |
     #include <dt-bindings/mfd/st,stpmic1.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
-    i2c@0 {
+    i2c {
       #address-cells = <1>;
       #size-cells = <0>;
       pmic@33 {

Documentation/devicetree/bindings/net/ethernet-phy.yaml+3−0

           second group of digits is the Phy Identifier 2 register,
           this is the chip vendor OUI bits 19:24, followed by 10
           bits of a vendor specific ID.
+      - items:
+          - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
+          - const: ethernet-phy-ieee802.3-c22
       - items:
           - pattern: "^ethernet-phy-id[a-f0-9]{4}\\.[a-f0-9]{4}$"
           - const: ethernet-phy-ieee802.3-c45

Documentation/devicetree/bindings/net/fsl-fec.txt+2−0

 - fsl,err006687-workaround-present: If present indicates that the system has
   the hardware workaround for ERR006687 applied and does not need a software
   workaround.
+- gpr: phandle of SoC general purpose register mode. Required for wake on LAN
+  on some SoCs
  -interrupt-names:  names of the interrupts listed in interrupts property in
   the same order. The defaults if not specified are
   __Number of interrupts__   __Default__

Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml+1−0

@@ -48,6 +48,7 @@ examples: · 47 unmodified lines
48		48
49	switch@10 {	49	switch@10 {
50	compatible = "qca,qca8337";	50	compatible = "qca,qca8337";
		51	reg = <0x10>;
51	/* ... */	52	/* ... */
52	};	53	};
53	};	54	};

Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt+1−1

@@ -29,7 +29,7 @@ Required properties for compatible string qcom,wcn399x-bt: · 28 unmodified lines
29		29
30	Optional properties for compatible string qcom,wcn399x-bt:	30	Optional properties for compatible string qcom,wcn399x-bt:
31		31
32	- max-speed: see Documentation/devicetree/bindings/serial/slave-device.txt	32	- max-speed: see Documentation/devicetree/bindings/serial/serial.yaml
33	- firmware-name: specify the name of nvm firmware to load	33	- firmware-name: specify the name of nvm firmware to load
34	- clocks: clock provided to the controller	34	- clocks: clock provided to the controller
35		35

Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml+3−3

@@ -97,7 +97,7 @@ then: · 96 unmodified lines
97	- $ref: /schemas/types.yaml#/definitions/uint32	97	- $ref: /schemas/types.yaml#/definitions/uint32
98	- minimum: 0	98	- minimum: 0
99	maximum: 63	99	maximum: 63
100	default: 0	100	default: 32
101		101
102	qcom,charge-ctrl-value:	102	qcom,charge-ctrl-value:
103	description:	103	description:
@@ -130,7 +130,7 @@ then: · 26 unmodified lines
130	- $ref: /schemas/types.yaml#/definitions/uint32	130	- $ref: /schemas/types.yaml#/definitions/uint32
131	- minimum: 0	131	- minimum: 0
132	maximum: 3	132	maximum: 3
133	default: 2	133	default: 0
134		134
135	qcom,preemphasis-width:	135	qcom,preemphasis-width:
136	description:	136	description:
@@ -152,7 +152,7 @@ then: · 15 unmodified lines
152	- $ref: /schemas/types.yaml#/definitions/uint32	152	- $ref: /schemas/types.yaml#/definitions/uint32
153	- minimum: 0	153	- minimum: 0
154	maximum: 3	154	maximum: 3
155	default: 0	155	default: 1
156		156
157	required:	157	required:
158	- compatible	158	- compatible

Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml+1−1

@@ -146,7 +146,7 @@ patternProperties: · 145 unmodified lines
146	bindings specified in	146	bindings specified in
147	Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt	147	Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt
148	Torrent SERDES should follow the bindings specified in	148	Torrent SERDES should follow the bindings specified in
149	Documentation/devicetree/bindings/phy/phy-cadence-dp.txt	149	Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
150		150
151	required:	151	required:
152	- compatible	152	- compatible

Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml+12−5

@@ -31,10 +31,17 @@ additionalProperties: false · 30 unmodified lines
31		31
32	examples:	32	examples:
33	- \|	33	- \|
34	cros-ec@0 {	34	spi {
35	compatible = "google,cros-ec-spi";	35	#address-cells = <1>;
36	cros_ec_pwm: ec-pwm {	36	#size-cells = <0>;
37	compatible = "google,cros-ec-pwm";	37
38	#pwm-cells = <1>;	38	cros-ec@0 {
		39	compatible = "google,cros-ec-spi";
		40	reg = <0>;
		41
		42	cros_ec_pwm: ec-pwm {
		43	compatible = "google,cros-ec-pwm";
		44	#pwm-cells = <1>;
		45	};
39	};	46	};
40	};	47	};

Documentation/devicetree/bindings/regulator/mps,mp5416.yaml+0−1

@@ -37,7 +37,6 @@ properties: · 36 unmodified lines
37	type: object	37	type: object
38		38
39	additionalProperties: false	39	additionalProperties: false
40	additionalProperties: false
41		40
42	required:	41	required:
43	- compatible	42	- compatible

Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml+2−1

@@ -75,7 +75,8 @@ properties: · 74 unmodified lines
75	description: \|	75	description: \|
76	disables over voltage protection of this buck	76	disables over voltage protection of this buck
77		77
78	additionalProperties: false	78	unevaluatedProperties: false
		79
79	additionalProperties: false	80	additionalProperties: false
80		81
81	required:	82	required:

Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml+5−1

@@ -35,6 +35,8 @@ patternProperties: · 34 unmodified lines
35	description:	35	description:
36	should be "ldo1", ..., "ldo7"	36	should be "ldo1", ..., "ldo7"
37		37
		38	unevaluatedProperties: false
		39
38	"^BUCK[1-7]$":	40	"^BUCK[1-7]$":
39	type: object	41	type: object
40	allOf:	42	allOf:
@@ -103,5 +105,7 @@ patternProperties: · 62 unmodified lines
103		105
104	required:	106	required:
105	- regulator-name	107	- regulator-name
106	additionalProperties: false	108
		109	unevaluatedProperties: false
		110
107	additionalProperties: false	111	additionalProperties: false

Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml+5−1

@@ -41,6 +41,8 @@ patternProperties: · 40 unmodified lines
41	description:	41	description:
42	should be "ldo1", ..., "ldo7"	42	should be "ldo1", ..., "ldo7"
43		43
		44	unevaluatedProperties: false
		45
44	"^BUCK[1-8]$":	46	"^BUCK[1-8]$":
45	type: object	47	type: object
46	allOf:	48	allOf:
@@ -99,5 +101,7 @@ patternProperties: · 52 unmodified lines
99		101
100	required:	102	required:
101	- regulator-name	103	- regulator-name
102	additionalProperties: false	104
		105	unevaluatedProperties: false
		106
103	additionalProperties: false	107	additionalProperties: false

Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml+5−1

@@ -40,6 +40,8 @@ patternProperties: · 39 unmodified lines
40	description:	40	description:
41	should be "ldo1", ..., "ldo6"	41	should be "ldo1", ..., "ldo6"
42		42
		43	unevaluatedProperties: false
		44
43	"^BUCK[1-6]$":	45	"^BUCK[1-6]$":
44	type: object	46	type: object
45	allOf:	47	allOf:
@@ -93,5 +95,7 @@ patternProperties: · 47 unmodified lines
93		95
94	required:	96	required:
95	- regulator-name	97	- regulator-name
96	additionalProperties: false	98
		99	unevaluatedProperties: false
		100
97	additionalProperties: false	101	additionalProperties: false

Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml+1−1

@@ -39,7 +39,7 @@ additionalProperties: false · 38 unmodified lines
39		39
40	examples:	40	examples:
41	- \|	41	- \|
42	rng {	42	rng@7e104000 {
43	compatible = "brcm,bcm2835-rng";	43	compatible = "brcm,bcm2835-rng";
44	reg = <0x7e104000 0x10>;	44	reg = <0x7e104000 0x10>;
45	interrupts = <2 29>;	45	interrupts = <2 29>;

Documentation/devicetree/bindings/sound/rockchip-i2s.yaml+3−0

@@ -56,6 +56,9 @@ properties: · 55 unmodified lines
56	- const: tx	56	- const: tx
57	- const: rx	57	- const: rx
58		58
		59	power-domains:
		60	maxItems: 1
		61
59	rockchip,capture-channels:	62	rockchip,capture-channels:
60	allOf:	63	allOf:
61	- $ref: /schemas/types.yaml#/definitions/uint32	64	- $ref: /schemas/types.yaml#/definitions/uint32

Documentation/devicetree/bindings/sound/rockchip-spdif.txt+0−45

@@ -1,45 +0,0 @@
1	* Rockchip SPDIF transceiver
2
3	The S/PDIF audio block is a stereo transceiver that allows the
4	processor to receive and transmit digital audio via an coaxial cable or
5	a fibre cable.
6
7	Required properties:
8
9	- compatible: should be one of the following:
10	- "rockchip,rk3066-spdif"
11	- "rockchip,rk3188-spdif"
12	- "rockchip,rk3228-spdif"
13	- "rockchip,rk3288-spdif"
14	- "rockchip,rk3328-spdif"
15	- "rockchip,rk3366-spdif"
16	- "rockchip,rk3368-spdif"
17	- "rockchip,rk3399-spdif"
18	- reg: physical base address of the controller and length of memory mapped
19	region.
20	- interrupts: should contain the SPDIF interrupt.
21	- dmas: DMA specifiers for tx dma. See the DMA client binding,
22	Documentation/devicetree/bindings/dma/dma.txt
23	- dma-names: should be "tx"
24	- clocks: a list of phandle + clock-specifier pairs, one for each entry
25	in clock-names.
26	- clock-names: should contain following:
27	- "hclk": clock for SPDIF controller
28	- "mclk" : clock for SPDIF bus
29
30	Required properties on RK3288:
31	- rockchip,grf: the phandle of the syscon node for the general register
32	file (GRF)
33
34	Example for the rk3188 SPDIF controller:
35
36	spdif: spdif@1011e000 {
37	compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
38	reg = <0x1011e000 0x2000>;
39	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
40	dmas = <&dmac1_s 8>;
41	dma-names = "tx";
42	clock-names = "hclk", "mclk";
43	clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
44	#sound-dai-cells = <0>;
45	};

Documentation/devicetree/bindings/sound/rockchip-spdif.yaml+101−0

@@ -0,0 +1,101 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Rockchip SPDIF transceiver
	8
	9	description:
	10	The S/PDIF audio block is a stereo transceiver that allows the
	11	processor to receive and transmit digital audio via a coaxial or
	12	fibre cable.
	13
	14	maintainers:
	15	- Heiko Stuebner <heiko@sntech.de>
	16
	17	properties:
	18	compatible:
	19	oneOf:
	20	- const: rockchip,rk3066-spdif
	21	- const: rockchip,rk3228-spdif
	22	- const: rockchip,rk3328-spdif
	23	- const: rockchip,rk3366-spdif
	24	- const: rockchip,rk3368-spdif
	25	- const: rockchip,rk3399-spdif
	26	- items:
	27	- enum:
	28	- rockchip,rk3188-spdif
	29	- rockchip,rk3288-spdif
	30	- const: rockchip,rk3066-spdif
	31
	32	reg:
	33	maxItems: 1
	34
	35	interrupts:
	36	maxItems: 1
	37
	38	clocks:
	39	items:
	40	- description: clock for SPDIF bus
	41	- description: clock for SPDIF controller
	42
	43	clock-names:
	44	items:
	45	- const: mclk
	46	- const: hclk
	47
	48	dmas:
	49	maxItems: 1
	50
	51	dma-names:
	52	const: tx
	53
	54	power-domains:
	55	maxItems: 1
	56
	57	rockchip,grf:
	58	$ref: /schemas/types.yaml#/definitions/phandle
	59	description:
	60	The phandle of the syscon node for the GRF register.
	61	Required property on RK3288.
	62
	63	"#sound-dai-cells":
	64	const: 0
	65
	66	required:
	67	- compatible
	68	- reg
	69	- interrupts
	70	- clocks
	71	- clock-names
	72	- dmas
	73	- dma-names
	74	- "#sound-dai-cells"
	75
	76	if:
	77	properties:
	78	compatible:
	79	contains:
	80	const: rockchip,rk3288-spdif
	81
	82	then:
	83	required:
	84	- rockchip,grf
	85
	86	additionalProperties: false
	87
	88	examples:
	89	- \|
	90	#include <dt-bindings/clock/rk3188-cru.h>
	91	#include <dt-bindings/interrupt-controller/arm-gic.h>
	92	spdif: spdif@1011e000 {
	93	compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
	94	reg = <0x1011e000 0x2000>;
	95	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
	96	clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
	97	clock-names = "mclk", "hclk";
	98	dmas = <&dmac1_s 8>;
	99	dma-names = "tx";
	100	#sound-dai-cells = <0>;
	101	};

Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml+1−1

@@ -61,7 +61,7 @@ examples: · 60 unmodified lines
61	#include <dt-bindings/clock/qcom,gcc-sdm845.h>	61	#include <dt-bindings/clock/qcom,gcc-sdm845.h>
62	#include <dt-bindings/interrupt-controller/arm-gic.h>	62	#include <dt-bindings/interrupt-controller/arm-gic.h>
63		63
64	soc: soc@0 {	64	soc: soc {
65	#address-cells = <2>;	65	#address-cells = <2>;
66	#size-cells = <2>;	66	#size-cells = <2>;
67		67

Documentation/devicetree/bindings/usb/ingenic,musb.yaml+1−1

@@ -56,7 +56,7 @@ additionalProperties: false · 55 unmodified lines
56	examples:	56	examples:
57	- \|	57	- \|
58	#include <dt-bindings/clock/jz4740-cgu.h>	58	#include <dt-bindings/clock/jz4740-cgu.h>
59	usb_phy: usb-phy@0 {	59	usb_phy: usb-phy {
60	compatible = "usb-nop-xceiv";	60	compatible = "usb-nop-xceiv";
61	#phy-cells = <0>;	61	#phy-cells = <0>;
62	};	62	};

Documentation/devicetree/bindings/usb/qcom,dwc3.txt+2−2

@@ -52,8 +52,8 @@ A child node must exist to represent the core DWC3 IP block. The name of · 51 unmodified lines
52	the node is not important. The content of the node is defined in dwc3.txt.	52	the node is not important. The content of the node is defined in dwc3.txt.
53		53
54	Phy documentation is provided in the following places:	54	Phy documentation is provided in the following places:
55	Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt - USB3 QMP PHY	55	Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt - USB3 QMP PHY
56	Documentation/devicetree/bindings/phy/qcom-qusb2-phy.txt - USB2 QUSB2 PHY	56	Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml - USB2 QUSB2 PHY
57		57
58	Example device nodes:	58	Example device nodes:
59		59

Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml+1−0

@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18	- renesas,r8a774c0-usb3-peri # RZ/G2E	18	- renesas,r8a774c0-usb3-peri # RZ/G2E
19	- renesas,r8a7795-usb3-peri # R-Car H3	19	- renesas,r8a7795-usb3-peri # R-Car H3
20	- renesas,r8a7796-usb3-peri # R-Car M3-W	20	- renesas,r8a7796-usb3-peri # R-Car M3-W
		21	- renesas,r8a77961-usb3-peri # R-Car M3-W+
21	- renesas,r8a77965-usb3-peri # R-Car M3-N	22	- renesas,r8a77965-usb3-peri # R-Car M3-N
22	- renesas,r8a77990-usb3-peri # R-Car E3	23	- renesas,r8a77990-usb3-peri # R-Car E3
23	- const: renesas,rcar-gen3-usb3-peri	24	- const: renesas,rcar-gen3-usb3-peri

Documentation/devicetree/bindings/usb/renesas,usbhs.yaml+1−0

@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40	- renesas,usbhs-r8a774c0 # RZ/G2E	40	- renesas,usbhs-r8a774c0 # RZ/G2E
41	- renesas,usbhs-r8a7795 # R-Car H3	41	- renesas,usbhs-r8a7795 # R-Car H3
42	- renesas,usbhs-r8a7796 # R-Car M3-W	42	- renesas,usbhs-r8a7796 # R-Car M3-W
		43	- renesas,usbhs-r8a77961 # R-Car M3-W+
43	- renesas,usbhs-r8a77965 # R-Car M3-N	44	- renesas,usbhs-r8a77965 # R-Car M3-N
44	- renesas,usbhs-r8a77990 # R-Car E3	45	- renesas,usbhs-r8a77990 # R-Car E3
45	- renesas,usbhs-r8a77995 # R-Car D3	46	- renesas,usbhs-r8a77995 # R-Car D3

Documentation/devicetree/bindings/usb/rockchip,dwc3.txt+1−1

@@ -16,7 +16,7 @@ A child node must exist to represent the core DWC3 IP block. The name of · 15 unmodified lines
16	the node is not important. The content of the node is defined in dwc3.txt.	16	the node is not important. The content of the node is defined in dwc3.txt.
17		17
18	Phy documentation is provided in the following places:	18	Phy documentation is provided in the following places:
19	Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt - USB2.0 PHY	19	Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml - USB2.0 PHY
20	Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY	20	Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY
21		21
22	Example device nodes:	22	Example device nodes:

Documentation/devicetree/bindings/usb/usb-xhci.txt+2−1

     - "renesas,xhci-r8a7791" for r8a7791 SoC
     - "renesas,xhci-r8a7793" for r8a7793 SoC
     - "renesas,xhci-r8a7795" for r8a7795 SoC
-    - "renesas,xhci-r8a7796" for r8a7796 SoC
+    - "renesas,xhci-r8a7796" for r8a77960 SoC
+    - "renesas,xhci-r8a77961" for r8a77961 SoC
     - "renesas,xhci-r8a77965" for r8a77965 SoC
     - "renesas,xhci-r8a77990" for r8a77990 SoC
     - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible

Documentation/filesystems/debugfs.rst+2−2

@@ -79,8 +79,8 @@ created with any of:: · 78 unmodified lines
79	struct dentry parent, u8 value);	79	struct dentry parent, u8 value);
80	void debugfs_create_u16(const char *name, umode_t mode,	80	void debugfs_create_u16(const char *name, umode_t mode,
81	struct dentry parent, u16 value);	81	struct dentry parent, u16 value);
82	struct dentry debugfs_create_u32(const char name, umode_t mode,	82	void debugfs_create_u32(const char *name, umode_t mode,
83	struct dentry parent, u32 value);	83	struct dentry parent, u32 value);
84	void debugfs_create_u64(const char *name, umode_t mode,	84	void debugfs_create_u64(const char *name, umode_t mode,
85	struct dentry parent, u64 value);	85	struct dentry parent, u64 value);
86		86

Documentation/hwmon/isl68137.rst+38−38

@@ -16,7 +16,7 @@ Supported chips: · 15 unmodified lines
16		16
17	* Renesas ISL68220	17	* Renesas ISL68220
18		18
19	Prefix: 'raa_dmpvr2_2rail'	19	Prefix: 'isl68220'
20		20
21	Addresses scanned: -	21	Addresses scanned: -
22		22
@@ -26,7 +26,7 @@ Supported chips: · 3 unmodified lines
26		26
27	* Renesas ISL68221	27	* Renesas ISL68221
28		28
29	Prefix: 'raa_dmpvr2_3rail'	29	Prefix: 'isl68221'
30		30
31	Addresses scanned: -	31	Addresses scanned: -
32		32
@@ -36,7 +36,7 @@ Supported chips: · 3 unmodified lines
36		36
37	* Renesas ISL68222	37	* Renesas ISL68222
38		38
39	Prefix: 'raa_dmpvr2_2rail'	39	Prefix: 'isl68222'
40		40
41	Addresses scanned: -	41	Addresses scanned: -
42		42
@@ -46,7 +46,7 @@ Supported chips: · 3 unmodified lines
46		46
47	* Renesas ISL68223	47	* Renesas ISL68223
48		48
49	Prefix: 'raa_dmpvr2_2rail'	49	Prefix: 'isl68223'
50		50
51	Addresses scanned: -	51	Addresses scanned: -
52		52
@@ -56,7 +56,7 @@ Supported chips: · 3 unmodified lines
56		56
57	* Renesas ISL68224	57	* Renesas ISL68224
58		58
59	Prefix: 'raa_dmpvr2_3rail'	59	Prefix: 'isl68224'
60		60
61	Addresses scanned: -	61	Addresses scanned: -
62		62
@@ -66,7 +66,7 @@ Supported chips: · 3 unmodified lines
66		66
67	* Renesas ISL68225	67	* Renesas ISL68225
68		68
69	Prefix: 'raa_dmpvr2_2rail'	69	Prefix: 'isl68225'
70		70
71	Addresses scanned: -	71	Addresses scanned: -
72		72
@@ -76,7 +76,7 @@ Supported chips: · 3 unmodified lines
76		76
77	* Renesas ISL68226	77	* Renesas ISL68226
78		78
79	Prefix: 'raa_dmpvr2_3rail'	79	Prefix: 'isl68226'
80		80
81	Addresses scanned: -	81	Addresses scanned: -
82		82
@@ -86,7 +86,7 @@ Supported chips: · 3 unmodified lines
86		86
87	* Renesas ISL68227	87	* Renesas ISL68227
88		88
89	Prefix: 'raa_dmpvr2_1rail'	89	Prefix: 'isl68227'
90		90
91	Addresses scanned: -	91	Addresses scanned: -
92		92
@@ -96,7 +96,7 @@ Supported chips: · 3 unmodified lines
96		96
97	* Renesas ISL68229	97	* Renesas ISL68229
98		98
99	Prefix: 'raa_dmpvr2_3rail'	99	Prefix: 'isl68229'
100		100
101	Addresses scanned: -	101	Addresses scanned: -
102		102
@@ -106,7 +106,7 @@ Supported chips: · 3 unmodified lines
106		106
107	* Renesas ISL68233	107	* Renesas ISL68233
108		108
109	Prefix: 'raa_dmpvr2_2rail'	109	Prefix: 'isl68233'
110		110
111	Addresses scanned: -	111	Addresses scanned: -
112		112
@@ -116,7 +116,7 @@ Supported chips: · 3 unmodified lines
116		116
117	* Renesas ISL68239	117	* Renesas ISL68239
118		118
119	Prefix: 'raa_dmpvr2_3rail'	119	Prefix: 'isl68239'
120		120
121	Addresses scanned: -	121	Addresses scanned: -
122		122
@@ -126,7 +126,7 @@ Supported chips: · 3 unmodified lines
126		126
127	* Renesas ISL69222	127	* Renesas ISL69222
128		128
129	Prefix: 'raa_dmpvr2_2rail'	129	Prefix: 'isl69222'
130		130
131	Addresses scanned: -	131	Addresses scanned: -
132		132
@@ -136,7 +136,7 @@ Supported chips: · 3 unmodified lines
136		136
137	* Renesas ISL69223	137	* Renesas ISL69223
138		138
139	Prefix: 'raa_dmpvr2_3rail'	139	Prefix: 'isl69223'
140		140
141	Addresses scanned: -	141	Addresses scanned: -
142		142
@@ -146,7 +146,7 @@ Supported chips: · 3 unmodified lines
146		146
147	* Renesas ISL69224	147	* Renesas ISL69224
148		148
149	Prefix: 'raa_dmpvr2_2rail'	149	Prefix: 'isl69224'
150		150
151	Addresses scanned: -	151	Addresses scanned: -
152		152
@@ -156,7 +156,7 @@ Supported chips: · 3 unmodified lines
156		156
157	* Renesas ISL69225	157	* Renesas ISL69225
158		158
159	Prefix: 'raa_dmpvr2_2rail'	159	Prefix: 'isl69225'
160		160
161	Addresses scanned: -	161	Addresses scanned: -
162		162
@@ -166,7 +166,7 @@ Supported chips: · 3 unmodified lines
166		166
167	* Renesas ISL69227	167	* Renesas ISL69227
168		168
169	Prefix: 'raa_dmpvr2_3rail'	169	Prefix: 'isl69227'
170		170
171	Addresses scanned: -	171	Addresses scanned: -
172		172
@@ -176,7 +176,7 @@ Supported chips: · 3 unmodified lines
176		176
177	* Renesas ISL69228	177	* Renesas ISL69228
178		178
179	Prefix: 'raa_dmpvr2_3rail'	179	Prefix: 'isl69228'
180		180
181	Addresses scanned: -	181	Addresses scanned: -
182		182
@@ -186,7 +186,7 @@ Supported chips: · 3 unmodified lines
186		186
187	* Renesas ISL69234	187	* Renesas ISL69234
188		188
189	Prefix: 'raa_dmpvr2_2rail'	189	Prefix: 'isl69234'
190		190
191	Addresses scanned: -	191	Addresses scanned: -
192		192
@@ -196,7 +196,7 @@ Supported chips: · 3 unmodified lines
196		196
197	* Renesas ISL69236	197	* Renesas ISL69236
198		198
199	Prefix: 'raa_dmpvr2_2rail'	199	Prefix: 'isl69236'
200		200
201	Addresses scanned: -	201	Addresses scanned: -
202		202
@@ -206,7 +206,7 @@ Supported chips: · 3 unmodified lines
206		206
207	* Renesas ISL69239	207	* Renesas ISL69239
208		208
209	Prefix: 'raa_dmpvr2_3rail'	209	Prefix: 'isl69239'
210		210
211	Addresses scanned: -	211	Addresses scanned: -
212		212
@@ -216,7 +216,7 @@ Supported chips: · 3 unmodified lines
216		216
217	* Renesas ISL69242	217	* Renesas ISL69242
218		218
219	Prefix: 'raa_dmpvr2_2rail'	219	Prefix: 'isl69242'
220		220
221	Addresses scanned: -	221	Addresses scanned: -
222		222
@@ -226,7 +226,7 @@ Supported chips: · 3 unmodified lines
226		226
227	* Renesas ISL69243	227	* Renesas ISL69243
228		228
229	Prefix: 'raa_dmpvr2_1rail'	229	Prefix: 'isl69243'
230		230
231	Addresses scanned: -	231	Addresses scanned: -
232		232
@@ -236,7 +236,7 @@ Supported chips: · 3 unmodified lines
236		236
237	* Renesas ISL69247	237	* Renesas ISL69247
238		238
239	Prefix: 'raa_dmpvr2_2rail'	239	Prefix: 'isl69247'
240		240
241	Addresses scanned: -	241	Addresses scanned: -
242		242
@@ -246,7 +246,7 @@ Supported chips: · 3 unmodified lines
246		246
247	* Renesas ISL69248	247	* Renesas ISL69248
248		248
249	Prefix: 'raa_dmpvr2_2rail'	249	Prefix: 'isl69248'
250		250
251	Addresses scanned: -	251	Addresses scanned: -
252		252
@@ -256,7 +256,7 @@ Supported chips: · 3 unmodified lines
256		256
257	* Renesas ISL69254	257	* Renesas ISL69254
258		258
259	Prefix: 'raa_dmpvr2_2rail'	259	Prefix: 'isl69254'
260		260
261	Addresses scanned: -	261	Addresses scanned: -
262		262
@@ -266,7 +266,7 @@ Supported chips: · 3 unmodified lines
266		266
267	* Renesas ISL69255	267	* Renesas ISL69255
268		268
269	Prefix: 'raa_dmpvr2_2rail'	269	Prefix: 'isl69255'
270		270
271	Addresses scanned: -	271	Addresses scanned: -
272		272
@@ -276,7 +276,7 @@ Supported chips: · 3 unmodified lines
276		276
277	* Renesas ISL69256	277	* Renesas ISL69256
278		278
279	Prefix: 'raa_dmpvr2_2rail'	279	Prefix: 'isl69256'
280		280
281	Addresses scanned: -	281	Addresses scanned: -
282		282
@@ -286,7 +286,7 @@ Supported chips: · 3 unmodified lines
286		286
287	* Renesas ISL69259	287	* Renesas ISL69259
288		288
289	Prefix: 'raa_dmpvr2_2rail'	289	Prefix: 'isl69259'
290		290
291	Addresses scanned: -	291	Addresses scanned: -
292		292
@@ -296,7 +296,7 @@ Supported chips: · 3 unmodified lines
296		296
297	* Renesas ISL69260	297	* Renesas ISL69260
298		298
299	Prefix: 'raa_dmpvr2_2rail'	299	Prefix: 'isl69260'
300		300
301	Addresses scanned: -	301	Addresses scanned: -
302		302
@@ -306,7 +306,7 @@ Supported chips: · 3 unmodified lines
306		306
307	* Renesas ISL69268	307	* Renesas ISL69268
308		308
309	Prefix: 'raa_dmpvr2_2rail'	309	Prefix: 'isl69268'
310		310
311	Addresses scanned: -	311	Addresses scanned: -
312		312
@@ -316,7 +316,7 @@ Supported chips: · 3 unmodified lines
316		316
317	* Renesas ISL69269	317	* Renesas ISL69269
318		318
319	Prefix: 'raa_dmpvr2_3rail'	319	Prefix: 'isl69269'
320		320
321	Addresses scanned: -	321	Addresses scanned: -
322		322
@@ -326,7 +326,7 @@ Supported chips: · 3 unmodified lines
326		326
327	* Renesas ISL69298	327	* Renesas ISL69298
328		328
329	Prefix: 'raa_dmpvr2_2rail'	329	Prefix: 'isl69298'
330		330
331	Addresses scanned: -	331	Addresses scanned: -
332		332
@@ -336,7 +336,7 @@ Supported chips: · 3 unmodified lines
336		336
337	* Renesas RAA228000	337	* Renesas RAA228000
338		338
339	Prefix: 'raa_dmpvr2_hv'	339	Prefix: 'raa228000'
340		340
341	Addresses scanned: -	341	Addresses scanned: -
342		342
@@ -346,7 +346,7 @@ Supported chips: · 3 unmodified lines
346		346
347	* Renesas RAA228004	347	* Renesas RAA228004
348		348
349	Prefix: 'raa_dmpvr2_hv'	349	Prefix: 'raa228004'
350		350
351	Addresses scanned: -	351	Addresses scanned: -
352		352
@@ -356,7 +356,7 @@ Supported chips: · 3 unmodified lines
356		356
357	* Renesas RAA228006	357	* Renesas RAA228006
358		358
359	Prefix: 'raa_dmpvr2_hv'	359	Prefix: 'raa228006'
360		360
361	Addresses scanned: -	361	Addresses scanned: -
362		362
@@ -366,7 +366,7 @@ Supported chips: · 3 unmodified lines
366		366
367	* Renesas RAA228228	367	* Renesas RAA228228
368		368
369	Prefix: 'raa_dmpvr2_2rail'	369	Prefix: 'raa228228'
370		370
371	Addresses scanned: -	371	Addresses scanned: -
372		372
@@ -376,7 +376,7 @@ Supported chips: · 3 unmodified lines
376		376
377	* Renesas RAA229001	377	* Renesas RAA229001
378		378
379	Prefix: 'raa_dmpvr2_2rail'	379	Prefix: 'raa229001'
380		380
381	Addresses scanned: -	381	Addresses scanned: -
382		382
@@ -386,7 +386,7 @@ Supported chips: · 3 unmodified lines
386		386
387	* Renesas RAA229004	387	* Renesas RAA229004
388		388
389	Prefix: 'raa_dmpvr2_2rail'	389	Prefix: 'raa229004'
390		390
391	Addresses scanned: -	391	Addresses scanned: -
392		392

Documentation/kbuild/makefiles.rst+2−1

@@ -1241,7 +1241,8 @@ When kbuild executes, the following steps are followed (roughly): · 1240 unmodified lines
1241	will be displayed with "make KBUILD_VERBOSE=0".	1241	will be displayed with "make KBUILD_VERBOSE=0".
1242		1242
1243		1243
1244	--- 6.9 Preprocessing linker scripts	1244	6.9 Preprocessing linker scripts
		1245	--------------------------------
1245		1246
1246	When the vmlinux image is built, the linker script	1247	When the vmlinux image is built, the linker script
1247	arch/$(ARCH)/kernel/vmlinux.lds is used.	1248	arch/$(ARCH)/kernel/vmlinux.lds is used.

Documentation/networking/devlink/devlink-trap.rst+2−0

@@ -257,6 +257,8 @@ drivers: · 256 unmodified lines
257	* :doc:`netdevsim`	257	* :doc:`netdevsim`
258	* :doc:`mlxsw`	258	* :doc:`mlxsw`
259		259
		260	.. _Generic-Packet-Trap-Groups:
		261
260	Generic Packet Trap Groups	262	Generic Packet Trap Groups
261	==========================	263	==========================
262		264

Documentation/networking/index.rst+1−0

@@ -22,6 +22,7 @@ Contents: · 21 unmodified lines
22	z8530book	22	z8530book
23	msg_zerocopy	23	msg_zerocopy
24	failover	24	failover
		25	net_dim
25	net_failover	26	net_failover
26	phy	27	phy
27	sfp-phylink	28	sfp-phylink

Documentation/networking/ip-sysctl.txt+8−1

 tcp_challenge_ack_limit - INTEGER
 	Limits number of Challenge ACK sent per second, as recommended
 	in RFC 5961 (Improving TCP's Robustness to Blind In-Window Attacks)
-	Default: 100
+	Default: 1000
 tcp_rx_skb_cache - BOOLEAN
 	Controls a per TCP socket cache of one skb, that might help
 	reduces overall throughput, in such case you should disable it.
 	Default: 1
+ping_group_range - 2 INTEGERS
+	Restrict ICMP_PROTO datagram sockets to users in the group range.
+	The default is "1 0", meaning, that nobody (not even root) may
+	create ping sockets.  Setting it to "100 100" would grant permissions
+	to the single group. "0 4294967295" would enable it for the world, "100
+	4294967295" would enable it for the users, but not daemons.
 tcp_early_demux - BOOLEAN
 	Enable early demux for established TCP sockets.
 	Default: 1

Documentation/networking/net_dim.rstrenamed from Documentation/networking/net_dim.txt+49−47

@@ -1,28 +1,20 @@
		1	======================================================
1	Net DIM - Generic Network Dynamic Interrupt Moderation	2	Net DIM - Generic Network Dynamic Interrupt Moderation
2	======================================================	3	======================================================
3		4
4	Author:	5	:Author: Tal Gilboa <talgi@mellanox.com>
5	Tal Gilboa <talgi@mellanox.com>
6
7
8	Contents
9	=========
10		6
11	- Assumptions	7	.. contents:: :depth: 2
12	- Introduction
13	- The Net DIM Algorithm
14	- Registering a Network Device to DIM
15	- Example
16		8
17	Part 0: Assumptions	9	Assumptions
18	======================	10	===========
19		11
20	This document assumes the reader has basic knowledge in network drivers	12	This document assumes the reader has basic knowledge in network drivers
21	and in general interrupt moderation.	13	and in general interrupt moderation.
22		14
23		15
24	Part I: Introduction	16	Introduction
25	======================	17	============
26		18
27	Dynamic Interrupt Moderation (DIM) (in networking) refers to changing the	19	Dynamic Interrupt Moderation (DIM) (in networking) refers to changing the
28	interrupt moderation configuration of a channel in order to optimize packet	20	interrupt moderation configuration of a channel in order to optimize packet
@@ -41,14 +33,15 @@ number of wanted packets per event. The Net DIM algorithm ascribes importance to · 12 unmodified lines
41	increase bandwidth over reducing interrupt rate.	33	increase bandwidth over reducing interrupt rate.
42		34
43		35
44	Part II: The Net DIM Algorithm	36	Net DIM Algorithm
45	===============================	37	=================
46		38
47	Each iteration of the Net DIM algorithm follows these steps:	39	Each iteration of the Net DIM algorithm follows these steps:
48	1. Calculates new data sample.	40
49	2. Compares it to previous sample.	41	#. Calculates new data sample.
50	3. Makes a decision - suggests interrupt moderation configuration fields.	42	#. Compares it to previous sample.
51	4. Applies a schedule work function, which applies suggested configuration.	43	#. Makes a decision - suggests interrupt moderation configuration fields.
		44	#. Applies a schedule work function, which applies suggested configuration.
52		45
53	The first two steps are straightforward, both the new and the previous data are	46	The first two steps are straightforward, both the new and the previous data are
54	supplied by the driver registered to Net DIM. The previous data is the new data	47	supplied by the driver registered to Net DIM. The previous data is the new data
@@ -89,19 +82,21 @@ manoeuvre as it may provide partial data or ignore the algorithm suggestion · 34 unmodified lines
89	under some conditions.	82	under some conditions.
90		83
91		84
92	Part III: Registering a Network Device to DIM	85	Registering a Network Device to DIM
93	==============================================	86	===================================
94		87
95	Net DIM API exposes the main function net_dim(struct dim *dim,	88	Net DIM API exposes the main function net_dim().
96	struct dim_sample end_sample). This function is the entry point to the Net	89	This function is the entry point to the Net
97	DIM algorithm and has to be called every time the driver would like to check if	90	DIM algorithm and has to be called every time the driver would like to check if
98	it should change interrupt moderation parameters. The driver should provide two	91	it should change interrupt moderation parameters. The driver should provide two
99	data structures: struct dim and struct dim_sample. Struct dim	92	data structures: :c:type:`struct dim <dim>` and
		93	:c:type:`struct dim_sample <dim_sample>`. :c:type:`struct dim <dim>`
100	describes the state of DIM for a specific object (RX queue, TX queue,	94	describes the state of DIM for a specific object (RX queue, TX queue,
101	other queues, etc.). This includes the current selected profile, previous data	95	other queues, etc.). This includes the current selected profile, previous data
102	samples, the callback function provided by the driver and more.	96	samples, the callback function provided by the driver and more.
103	Struct dim_sample describes a data sample, which will be compared to the	97	:c:type:`struct dim_sample <dim_sample>` describes a data sample,
104	data sample stored in struct dim in order to decide on the algorithm's next	98	which will be compared to the data sample stored in :c:type:`struct dim <dim>`
		99	in order to decide on the algorithm's next
105	step. The sample should include bytes, packets and interrupts, measured by	100	step. The sample should include bytes, packets and interrupts, measured by
106	the driver.	101	the driver.
107		102
@@ -110,9 +105,10 @@ main net_dim() function. The recommended method is to call net_dim() on each · 2 unmodified lines
110	interrupt. Since Net DIM has a built-in moderation and it might decide to skip	105	interrupt. Since Net DIM has a built-in moderation and it might decide to skip
111	iterations under certain conditions, there is no need to moderate the net_dim()	106	iterations under certain conditions, there is no need to moderate the net_dim()
112	calls as well. As mentioned above, the driver needs to provide an object of type	107	calls as well. As mentioned above, the driver needs to provide an object of type
113	struct dim to the net_dim() function call. It is advised for each entity	108	:c:type:`struct dim <dim>` to the net_dim() function call. It is advised for
114	using Net DIM to hold a struct dim as part of its data structure and use it	109	each entity using Net DIM to hold a :c:type:`struct dim <dim>` as part of its
115	as the main Net DIM API object. The struct dim_sample should hold the latest	110	data structure and use it as the main Net DIM API object.
		111	The :c:type:`struct dim_sample <dim_sample>` should hold the latest
116	bytes, packets and interrupts count. No need to perform any calculations, just	112	bytes, packets and interrupts count. No need to perform any calculations, just
117	include the raw data.	113	include the raw data.
118		114
@@ -124,19 +120,19 @@ the data flow. After the work is done, Net DIM algorithm needs to be set to · 5 unmodified lines
124	the proper state in order to move to the next iteration.	120	the proper state in order to move to the next iteration.
125		121
126		122
127	Part IV: Example	123	Example
128	=================	124	=======
129		125
130	The following code demonstrates how to register a driver to Net DIM. The actual	126	The following code demonstrates how to register a driver to Net DIM. The actual
131	usage is not complete but it should make the outline of the usage clear.	127	usage is not complete but it should make the outline of the usage clear.
132		128
133	my_driver.c:	129	.. code-block:: c
134		130
135	#include <linux/dim.h>	131	#include <linux/dim.h>
136		132
137	/* Callback for net DIM to schedule on a decision to change moderation */	133	/* Callback for net DIM to schedule on a decision to change moderation */
138	void my_driver_do_dim_work(struct work_struct *work)	134	void my_driver_do_dim_work(struct work_struct *work)
139	{	135	{
140	/* Get struct dim from struct work_struct */	136	/* Get struct dim from struct work_struct */
141	struct dim *dim = container_of(work, struct dim,	137	struct dim *dim = container_of(work, struct dim,
142	work);	138	work);
@@ -145,11 +141,11 @@ void my_driver_do_dim_work(struct work_struct *work) · 2 unmodified lines
145		141
146	/* Signal net DIM work is done and it should move to next iteration */	142	/* Signal net DIM work is done and it should move to next iteration */
147	dim->state = DIM_START_MEASURE;	143	dim->state = DIM_START_MEASURE;
148	}	144	}
149		145
150	/* My driver's interrupt handler */	146	/* My driver's interrupt handler */
151	int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...)	147	int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...)
152	{	148	{
153	...	149	...
154	/* A struct to hold current measured data */	150	/* A struct to hold current measured data */
155	struct dim_sample dim_sample;	151	struct dim_sample dim_sample;
@@ -162,13 +158,19 @@ int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...) · 6 unmodified lines
162	/* Call net DIM */	158	/* Call net DIM */
163	net_dim(&my_entity->dim, dim_sample);	159	net_dim(&my_entity->dim, dim_sample);
164	...	160	...
165	}	161	}
166		162
167	/* My entity's initialization function (my_entity was already allocated) */	163	/* My entity's initialization function (my_entity was already allocated) */
168	int my_driver_init_my_entity(struct my_driver_entity *my_entity, ...)	164	int my_driver_init_my_entity(struct my_driver_entity *my_entity, ...)
169	{	165	{
170	...	166	...
171	/* Initiate struct work_struct with my driver's callback function */	167	/* Initiate struct work_struct with my driver's callback function */
172	INIT_WORK(&my_entity->dim.work, my_driver_do_dim_work);	168	INIT_WORK(&my_entity->dim.work, my_driver_do_dim_work);
173	...	169	...
174	}	170	}
		171
		172	Dynamic Interrupt Moderation (DIM) library API
		173	==============================================
		174
		175	.. kernel-doc:: include/linux/dim.h
		176	:internal:

Documentation/x86/boot.rst+18−3

 must be __BOOT_DS; interrupt must be disabled; %rsi must hold the base
 address of the struct boot_params.
-EFI Handover Protocol
+EFI Handover Protocol (deprecated)
-=====================
+==================================
 This protocol allows boot loaders to defer initialisation to the EFI
 boot stub. The boot loader is required to load the kernel/initrd(s)
 which is hdr->handover_offset bytes from the beginning of
 startup_{32,64}.
+The boot loader MUST respect the kernel's PE/COFF metadata when it comes
+to section alignment, the memory footprint of the executable image beyond
+the size of the file itself, and any other aspect of the PE/COFF header
+that may affect correct operation of the image as a PE/COFF binary in the
+execution context provided by the EFI firmware.
 The function prototype for the handover entry point looks like this::
     efi_main(void *handle, efi_system_table_t *table, struct boot_params *bp)
 The boot loader *must* fill out the following fields in bp::
-  - hdr.code32_start
   - hdr.cmd_line_ptr
   - hdr.ramdisk_image (if applicable)
   - hdr.ramdisk_size  (if applicable)
 All other fields should be zero.
+NOTE: The EFI Handover Protocol is deprecated in favour of the ordinary PE/COFF
+      entry point, combined with the LINUX_EFI_INITRD_MEDIA_GUID based initrd
+      loading protocol (refer to [0] for an example of the bootloader side of
+      this), which removes the need for any knowledge on the part of the EFI
+      bootloader regarding the internal representation of boot_params or any
+      requirements/limitations regarding the placement of the command line
+      and ramdisk in memory, or the placement of the kernel image itself.
+[0] https://github.com/u-boot/u-boot/commit/ec80b4735a593961fe701cc3a5d717d4739b0fd0

MAINTAINERS+55−37

@@ -189,7 +189,7 @@ F: drivers/net/hamradio/6pack.c · 188 unmodified lines
189	M: Johannes Berg <johannes@sipsolutions.net>	189	M: Johannes Berg <johannes@sipsolutions.net>
190	L: linux-wireless@vger.kernel.org	190	L: linux-wireless@vger.kernel.org
191	S: Maintained	191	S: Maintained
192	W: http://wireless.kernel.org/	192	W: https://wireless.wiki.kernel.org/
193	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	193	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
195	F: Documentation/driver-api/80211/cfg80211.rst	195	F: Documentation/driver-api/80211/cfg80211.rst
@@ -505,7 +505,7 @@ F: drivers/hwmon/adm1029.c · 309 unmodified lines
505	ADM8211 WIRELESS DRIVER	505	ADM8211 WIRELESS DRIVER
506	L: linux-wireless@vger.kernel.org	506	L: linux-wireless@vger.kernel.org
507	S: Orphan	507	S: Orphan
508	W: http://wireless.kernel.org/	508	W: https://wireless.wiki.kernel.org/
509	F: drivers/net/wireless/admtek/adm8211.*	509	F: drivers/net/wireless/admtek/adm8211.*
510		510
511	ADP1653 FLASH CONTROLLER DRIVER	511	ADP1653 FLASH CONTROLLER DRIVER
@@ -570,7 +570,7 @@ F: Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml · 58 unmodified lines
570	F: drivers/input/misc/adxl34x.c	570	F: drivers/input/misc/adxl34x.c
571		571
572	ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER	572	ADXL372 THREE-AXIS DIGITAL ACCELEROMETER DRIVER
573	M: Stefan Popa <stefan.popa@analog.com>	573	M: Michael Hennerich <michael.hennerich@analog.com>
574	S: Supported	574	S: Supported
575	W: http://ez.analog.com/community/linux-device-drivers	575	W: http://ez.analog.com/community/linux-device-drivers
576	F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml	576	F: Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml
@@ -922,7 +922,7 @@ F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi · 345 unmodified lines
922	F: drivers/net/ethernet/amd/xgbe/	922	F: drivers/net/ethernet/amd/xgbe/
923		923
924	ANALOG DEVICES INC AD5686 DRIVER	924	ANALOG DEVICES INC AD5686 DRIVER
925	M: Stefan Popa <stefan.popa@analog.com>	925	M: Michael Hennerich <Michael.Hennerich@analog.com>
926	L: linux-pm@vger.kernel.org	926	L: linux-pm@vger.kernel.org
927	S: Supported	927	S: Supported
928	W: http://ez.analog.com/community/linux-device-drivers	928	W: http://ez.analog.com/community/linux-device-drivers
@@ -930,7 +930,7 @@ F: drivers/iio/dac/ad5686* · 1 unmodified line
930	F: drivers/iio/dac/ad5696*	930	F: drivers/iio/dac/ad5696*
931		931
932	ANALOG DEVICES INC AD5758 DRIVER	932	ANALOG DEVICES INC AD5758 DRIVER
933	M: Stefan Popa <stefan.popa@analog.com>	933	M: Michael Hennerich <Michael.Hennerich@analog.com>
934	L: linux-iio@vger.kernel.org	934	L: linux-iio@vger.kernel.org
935	S: Supported	935	S: Supported
936	W: http://ez.analog.com/community/linux-device-drivers	936	W: http://ez.analog.com/community/linux-device-drivers
@@ -946,7 +946,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml · 9 unmodified lines
946	F: drivers/iio/adc/ad7091r5.c	946	F: drivers/iio/adc/ad7091r5.c
947		947
948	ANALOG DEVICES INC AD7124 DRIVER	948	ANALOG DEVICES INC AD7124 DRIVER
949	M: Stefan Popa <stefan.popa@analog.com>	949	M: Michael Hennerich <Michael.Hennerich@analog.com>
950	L: linux-iio@vger.kernel.org	950	L: linux-iio@vger.kernel.org
951	S: Supported	951	S: Supported
952	W: http://ez.analog.com/community/linux-device-drivers	952	W: http://ez.analog.com/community/linux-device-drivers
@@ -970,7 +970,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml · 17 unmodified lines
970	F: drivers/iio/adc/ad7292.c	970	F: drivers/iio/adc/ad7292.c
971		971
972	ANALOG DEVICES INC AD7606 DRIVER	972	ANALOG DEVICES INC AD7606 DRIVER
973	M: Stefan Popa <stefan.popa@analog.com>	973	M: Michael Hennerich <Michael.Hennerich@analog.com>
974	M: Beniamin Bia <beniamin.bia@analog.com>	974	M: Beniamin Bia <beniamin.bia@analog.com>
975	L: linux-iio@vger.kernel.org	975	L: linux-iio@vger.kernel.org
976	S: Supported	976	S: Supported
@@ -979,7 +979,7 @@ F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml · 2 unmodified lines
979	F: drivers/iio/adc/ad7606.c	979	F: drivers/iio/adc/ad7606.c
980		980
981	ANALOG DEVICES INC AD7768-1 DRIVER	981	ANALOG DEVICES INC AD7768-1 DRIVER
982	M: Stefan Popa <stefan.popa@analog.com>	982	M: Michael Hennerich <Michael.Hennerich@analog.com>
983	L: linux-iio@vger.kernel.org	983	L: linux-iio@vger.kernel.org
984	S: Supported	984	S: Supported
985	W: http://ez.analog.com/community/linux-device-drivers	985	W: http://ez.analog.com/community/linux-device-drivers
@@ -1040,7 +1040,7 @@ F: Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml · 54 unmodified lines
1040	F: drivers/hwmon/adm1177.c	1040	F: drivers/hwmon/adm1177.c
1041		1041
1042	ANALOG DEVICES INC ADP5061 DRIVER	1042	ANALOG DEVICES INC ADP5061 DRIVER
1043	M: Stefan Popa <stefan.popa@analog.com>	1043	M: Michael Hennerich <Michael.Hennerich@analog.com>
1044	L: linux-pm@vger.kernel.org	1044	L: linux-pm@vger.kernel.org
1045	S: Supported	1045	S: Supported
1046	W: http://ez.analog.com/community/linux-device-drivers	1046	W: http://ez.analog.com/community/linux-device-drivers
@@ -1109,7 +1109,6 @@ F: drivers/iio/amplifiers/hmc425a.c · 62 unmodified lines
1109	ANALOG DEVICES INC IIO DRIVERS	1109	ANALOG DEVICES INC IIO DRIVERS
1110	M: Lars-Peter Clausen <lars@metafoo.de>	1110	M: Lars-Peter Clausen <lars@metafoo.de>
1111	M: Michael Hennerich <Michael.Hennerich@analog.com>	1111	M: Michael Hennerich <Michael.Hennerich@analog.com>
1112	M: Stefan Popa <stefan.popa@analog.com>
1113	S: Supported	1112	S: Supported
1114	W: http://wiki.analog.com/	1113	W: http://wiki.analog.com/
1115	W: http://ez.analog.com/community/linux-device-drivers	1114	W: http://ez.analog.com/community/linux-device-drivers
@@ -1323,7 +1322,10 @@ ARM INTEGRATOR, VERSATILE AND REALVIEW SUPPORT · 207 unmodified lines
1323	M: Linus Walleij <linus.walleij@linaro.org>	1322	M: Linus Walleij <linus.walleij@linaro.org>
1324	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	1323	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1325	S: Maintained	1324	S: Maintained
1326	F: Documentation/devicetree/bindings/arm/arm-boards	1325	F: Documentation/devicetree/bindings/arm/arm,integrator.yaml
		1326	F: Documentation/devicetree/bindings/arm/arm,realview.yaml
		1327	F: Documentation/devicetree/bindings/arm/arm,versatile.yaml
		1328	F: Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml
1327	F: Documentation/devicetree/bindings/auxdisplay/arm-charlcd.txt	1329	F: Documentation/devicetree/bindings/auxdisplay/arm-charlcd.txt
1328	F: Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml	1330	F: Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml
1329	F: Documentation/devicetree/bindings/i2c/i2c-versatile.txt	1331	F: Documentation/devicetree/bindings/i2c/i2c-versatile.txt
@@ -2847,14 +2849,14 @@ M: Nick Kossifidis <mickflemm@gmail.com> · 1517 unmodified lines
2847	M: Luis Chamberlain <mcgrof@kernel.org>	2849	M: Luis Chamberlain <mcgrof@kernel.org>
2848	L: linux-wireless@vger.kernel.org	2850	L: linux-wireless@vger.kernel.org
2849	S: Maintained	2851	S: Maintained
2850	W: http://wireless.kernel.org/en/users/Drivers/ath5k	2852	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath5k
2851	F: drivers/net/wireless/ath/ath5k/	2853	F: drivers/net/wireless/ath/ath5k/
2852		2854
2853	ATHEROS ATH6KL WIRELESS DRIVER	2855	ATHEROS ATH6KL WIRELESS DRIVER
2854	M: Kalle Valo <kvalo@codeaurora.org>	2856	M: Kalle Valo <kvalo@codeaurora.org>
2855	L: linux-wireless@vger.kernel.org	2857	L: linux-wireless@vger.kernel.org
2856	S: Supported	2858	S: Supported
2857	W: http://wireless.kernel.org/en/users/Drivers/ath6kl	2859	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath6kl
2858	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git	2860	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
2859	F: drivers/net/wireless/ath/ath6kl/	2861	F: drivers/net/wireless/ath/ath6kl/
2860		2862
@@ -3017,7 +3019,7 @@ B43 WIRELESS DRIVER · 156 unmodified lines
3017	L: linux-wireless@vger.kernel.org	3019	L: linux-wireless@vger.kernel.org
3018	L: b43-dev@lists.infradead.org	3020	L: b43-dev@lists.infradead.org
3019	S: Odd Fixes	3021	S: Odd Fixes
3020	W: http://wireless.kernel.org/en/users/Drivers/b43	3022	W: https://wireless.wiki.kernel.org/en/users/Drivers/b43
3021	F: drivers/net/wireless/broadcom/b43/	3023	F: drivers/net/wireless/broadcom/b43/
3022		3024
3023	B43LEGACY WIRELESS DRIVER	3025	B43LEGACY WIRELESS DRIVER
@@ -3025,7 +3027,7 @@ M: Larry Finger <Larry.Finger@lwfinger.net> · 1 unmodified line
3025	L: linux-wireless@vger.kernel.org	3027	L: linux-wireless@vger.kernel.org
3026	L: b43-dev@lists.infradead.org	3028	L: b43-dev@lists.infradead.org
3027	S: Maintained	3029	S: Maintained
3028	W: http://wireless.kernel.org/en/users/Drivers/b43	3030	W: https://wireless.wiki.kernel.org/en/users/Drivers/b43
3029	F: drivers/net/wireless/broadcom/b43legacy/	3031	F: drivers/net/wireless/broadcom/b43legacy/
3030		3032
3031	BACKLIGHT CLASS/SUBSYSTEM	3033	BACKLIGHT CLASS/SUBSYSTEM
@@ -3655,7 +3657,7 @@ L: linux-btrfs@vger.kernel.org · 623 unmodified lines
3655	S: Maintained	3657	S: Maintained
3656	W: http://btrfs.wiki.kernel.org/	3658	W: http://btrfs.wiki.kernel.org/
3657	Q: http://patchwork.kernel.org/project/linux-btrfs/list/	3659	Q: http://patchwork.kernel.org/project/linux-btrfs/list/
3658	T: git git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs.git	3660	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git
3659	F: Documentation/filesystems/btrfs.rst	3661	F: Documentation/filesystems/btrfs.rst
3660	F: fs/btrfs/	3662	F: fs/btrfs/
3661	F: include/linux/btrfs*	3663	F: include/linux/btrfs*
@@ -3840,7 +3842,7 @@ CARL9170 LINUX COMMUNITY WIRELESS DRIVER · 178 unmodified lines
3840	M: Christian Lamparter <chunkeey@googlemail.com>	3842	M: Christian Lamparter <chunkeey@googlemail.com>
3841	L: linux-wireless@vger.kernel.org	3843	L: linux-wireless@vger.kernel.org
3842	S: Maintained	3844	S: Maintained
3843	W: http://wireless.kernel.org/en/users/Drivers/carl9170	3845	W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170
3844	F: drivers/net/wireless/ath/carl9170/	3846	F: drivers/net/wireless/ath/carl9170/
3845		3847
3846	CAVIUM I2C DRIVER	3848	CAVIUM I2C DRIVER
@@ -5173,6 +5175,7 @@ S: Maintained · 1326 unmodified lines
5173	F: drivers/soc/fsl/dpio	5175	F: drivers/soc/fsl/dpio
5174		5176
5175	DPAA2 ETHERNET DRIVER	5177	DPAA2 ETHERNET DRIVER
		5178	M: Ioana Ciornei <ioana.ciornei@nxp.com>
5176	M: Ioana Radulescu <ruxandra.radulescu@nxp.com>	5179	M: Ioana Radulescu <ruxandra.radulescu@nxp.com>
5177	L: netdev@vger.kernel.org	5180	L: netdev@vger.kernel.org
5178	S: Maintained	5181	S: Maintained
@@ -5552,7 +5555,7 @@ M: Chen-Yu Tsai <wens@csie.org> · 373 unmodified lines
5552	L: dri-devel@lists.freedesktop.org	5555	L: dri-devel@lists.freedesktop.org
5553	S: Supported	5556	S: Supported
5554	T: git git://anongit.freedesktop.org/drm/drm-misc	5557	T: git git://anongit.freedesktop.org/drm/drm-misc
5555	F: Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt	5558	F: Documentation/devicetree/bindings/display/allwinner*
5556	F: drivers/gpu/drm/sun4i/	5559	F: drivers/gpu/drm/sun4i/
5557		5560
5558	DRM DRIVERS FOR AMLOGIC SOCS	5561	DRM DRIVERS FOR AMLOGIC SOCS
@@ -5934,6 +5937,7 @@ M: Tal Gilboa <talgi@mellanox.com> · 375 unmodified lines
5934	S: Maintained	5937	S: Maintained
5935	F: include/linux/dim.h	5938	F: include/linux/dim.h
5936	F: lib/dim/	5939	F: lib/dim/
		5940	F: Documentation/networking/net_dim.rst
5937		5941
5938	DZ DECSTATION DZ11 SERIAL DRIVER	5942	DZ DECSTATION DZ11 SERIAL DRIVER
5939	M: "Maciej W. Rozycki" <macro@linux-mips.org>	5943	M: "Maciej W. Rozycki" <macro@linux-mips.org>
@@ -7945,7 +7949,7 @@ F: Documentation/i2c/busses/i2c-parport.rst · 2005 unmodified lines
7945	F: drivers/i2c/busses/i2c-parport.c	7949	F: drivers/i2c/busses/i2c-parport.c
7946		7950
7947	I2C SUBSYSTEM	7951	I2C SUBSYSTEM
7948	M: Wolfram Sang <wsa@the-dreams.de>	7952	M: Wolfram Sang <wsa@kernel.org>
7949	L: linux-i2c@vger.kernel.org	7953	L: linux-i2c@vger.kernel.org
7950	S: Maintained	7954	S: Maintained
7951	W: https://i2c.wiki.kernel.org/	7955	W: https://i2c.wiki.kernel.org/
@@ -9325,6 +9329,7 @@ M: Christian Borntraeger <borntraeger@de.ibm.com> · 1373 unmodified lines
9325	M: Janosch Frank <frankja@linux.ibm.com>	9329	M: Janosch Frank <frankja@linux.ibm.com>
9326	R: David Hildenbrand <david@redhat.com>	9330	R: David Hildenbrand <david@redhat.com>
9327	R: Cornelia Huck <cohuck@redhat.com>	9331	R: Cornelia Huck <cohuck@redhat.com>
		9332	R: Claudio Imbrenda <imbrenda@linux.ibm.com>
9328	L: kvm@vger.kernel.org	9333	L: kvm@vger.kernel.org
9329	S: Supported	9334	S: Supported
9330	W: http://www.ibm.com/developerworks/linux/linux390/	9335	W: http://www.ibm.com/developerworks/linux/linux390/
@@ -9412,6 +9417,13 @@ F: include/linux/keyctl.h · 81 unmodified lines
9412	F: include/uapi/linux/keyctl.h	9417	F: include/uapi/linux/keyctl.h
9413	F: security/keys/	9418	F: security/keys/
9414		9419
		9420	KFIFO
		9421	M: Stefani Seibold <stefani@seibold.net>
		9422	S: Maintained
		9423	F: include/linux/kfifo.h
		9424	F: lib/kfifo.c
		9425	F: samples/kfifo/
		9426
9415	KGDB / KDB /debug_core	9427	KGDB / KDB /debug_core
9416	M: Jason Wessel <jason.wessel@windriver.com>	9428	M: Jason Wessel <jason.wessel@windriver.com>
9417	M: Daniel Thompson <daniel.thompson@linaro.org>	9429	M: Daniel Thompson <daniel.thompson@linaro.org>
@@ -10063,7 +10075,7 @@ MAC80211 · 645 unmodified lines
10063	M: Johannes Berg <johannes@sipsolutions.net>	10075	M: Johannes Berg <johannes@sipsolutions.net>
10064	L: linux-wireless@vger.kernel.org	10076	L: linux-wireless@vger.kernel.org
10065	S: Maintained	10077	S: Maintained
10066	W: http://wireless.kernel.org/	10078	W: https://wireless.wiki.kernel.org/
10067	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	10079	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
10068	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	10080	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
10069	F: Documentation/networking/mac80211-injection.txt	10081	F: Documentation/networking/mac80211-injection.txt
@@ -10658,6 +10670,13 @@ L: netdev@vger.kernel.org · 588 unmodified lines
10658	S: Maintained	10670	S: Maintained
10659	F: drivers/net/ethernet/mediatek/	10671	F: drivers/net/ethernet/mediatek/
10660		10672
		10673	MEDIATEK I2C CONTROLLER DRIVER
		10674	M: Qii Wang <qii.wang@mediatek.com>
		10675	L: linux-i2c@vger.kernel.org
		10676	S: Maintained
		10677	F: Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
		10678	F: drivers/i2c/busses/i2c-mt65xx.c
		10679
10661	MEDIATEK JPEG DRIVER	10680	MEDIATEK JPEG DRIVER
10662	M: Rick Chang <rick.chang@mediatek.com>	10681	M: Rick Chang <rick.chang@mediatek.com>
10663	M: Bin Liu <bin.liu@mediatek.com>	10682	M: Bin Liu <bin.liu@mediatek.com>
@@ -10693,7 +10712,6 @@ MEDIATEK MT76 WIRELESS LAN DRIVER · 29 unmodified lines
10693	M: Felix Fietkau <nbd@nbd.name>	10712	M: Felix Fietkau <nbd@nbd.name>
10694	M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>	10713	M: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
10695	R: Ryder Lee <ryder.lee@mediatek.com>	10714	R: Ryder Lee <ryder.lee@mediatek.com>
10696	R: Roy Luo <royluo@google.com>
10697	L: linux-wireless@vger.kernel.org	10715	L: linux-wireless@vger.kernel.org
10698	S: Maintained	10716	S: Maintained
10699	F: drivers/net/wireless/mediatek/mt76/	10717	F: drivers/net/wireless/mediatek/mt76/
@@ -12644,7 +12662,7 @@ F: fs/orangefs/ · 1944 unmodified lines
12644	ORINOCO DRIVER	12662	ORINOCO DRIVER
12645	L: linux-wireless@vger.kernel.org	12663	L: linux-wireless@vger.kernel.org
12646	S: Orphan	12664	S: Orphan
12647	W: http://wireless.kernel.org/en/users/Drivers/orinoco	12665	W: https://wireless.wiki.kernel.org/en/users/Drivers/orinoco
12648	W: http://www.nongnu.org/orinoco/	12666	W: http://www.nongnu.org/orinoco/
12649	F: drivers/net/wireless/intersil/orinoco/	12667	F: drivers/net/wireless/intersil/orinoco/
12650		12668
@@ -12670,7 +12688,7 @@ P54 WIRELESS DRIVER · 19 unmodified lines
12670	M: Christian Lamparter <chunkeey@googlemail.com>	12688	M: Christian Lamparter <chunkeey@googlemail.com>
12671	L: linux-wireless@vger.kernel.org	12689	L: linux-wireless@vger.kernel.org
12672	S: Maintained	12690	S: Maintained
12673	W: http://wireless.kernel.org/en/users/Drivers/p54	12691	W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
12674	F: drivers/net/wireless/intersil/p54/	12692	F: drivers/net/wireless/intersil/p54/
12675		12693
12676	PACKING	12694	PACKING
@@ -13038,7 +13056,7 @@ F: drivers/pci/controller/pci-xgene-msi.c · 361 unmodified lines
13038		13056
13039	PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS	13057	PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
13040	M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>	13058	M: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13041	R: Andrew Murray <amurray@thegoodpenguin.co.uk>	13059	R: Rob Herring <robh@kernel.org>
13042	L: linux-pci@vger.kernel.org	13060	L: linux-pci@vger.kernel.org
13043	S: Supported	13061	S: Supported
13044	Q: http://patchwork.ozlabs.org/project/linux-pci/list/	13062	Q: http://patchwork.ozlabs.org/project/linux-pci/list/
@@ -13591,7 +13609,7 @@ PRISM54 WIRELESS DRIVER · 546 unmodified lines
13591	M: Luis Chamberlain <mcgrof@kernel.org>	13609	M: Luis Chamberlain <mcgrof@kernel.org>
13592	L: linux-wireless@vger.kernel.org	13610	L: linux-wireless@vger.kernel.org
13593	S: Obsolete	13611	S: Obsolete
13594	W: http://wireless.kernel.org/en/users/Drivers/p54	13612	W: https://wireless.wiki.kernel.org/en/users/Drivers/p54
13595	F: drivers/net/wireless/intersil/prism54/	13613	F: drivers/net/wireless/intersil/prism54/
13596		13614
13597	PROC FILESYSTEM	13615	PROC FILESYSTEM
@@ -13853,7 +13871,8 @@ S: Maintained · 255 unmodified lines
13853	F: drivers/scsi/qla1280.[ch]	13871	F: drivers/scsi/qla1280.[ch]
13854		13872
13855	QLOGIC QLA2XXX FC-SCSI DRIVER	13873	QLOGIC QLA2XXX FC-SCSI DRIVER
13856	M: hmadhani@marvell.com	13874	M: Nilesh Javali <njavali@marvell.com>
		13875	M: GR-QLogic-Storage-Upstream@marvell.com
13857	L: linux-scsi@vger.kernel.org	13876	L: linux-scsi@vger.kernel.org
13858	S: Supported	13877	S: Supported
13859	F: Documentation/scsi/LICENSE.qla2xxx	13878	F: Documentation/scsi/LICENSE.qla2xxx
@@ -13931,7 +13950,7 @@ QUALCOMM ATHEROS ATH10K WIRELESS DRIVER · 71 unmodified lines
13931	M: Kalle Valo <kvalo@codeaurora.org>	13950	M: Kalle Valo <kvalo@codeaurora.org>
13932	L: ath10k@lists.infradead.org	13951	L: ath10k@lists.infradead.org
13933	S: Supported	13952	S: Supported
13934	W: http://wireless.kernel.org/en/users/Drivers/ath10k	13953	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
13935	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git	13954	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
13936	F: drivers/net/wireless/ath/ath10k/	13955	F: drivers/net/wireless/ath/ath10k/
13937		13956
@@ -13946,7 +13965,7 @@ QUALCOMM ATHEROS ATH9K WIRELESS DRIVER · 8 unmodified lines
13946	M: QCA ath9k Development <ath9k-devel@qca.qualcomm.com>	13965	M: QCA ath9k Development <ath9k-devel@qca.qualcomm.com>
13947	L: linux-wireless@vger.kernel.org	13966	L: linux-wireless@vger.kernel.org
13948	S: Supported	13967	S: Supported
13949	W: http://wireless.kernel.org/en/users/Drivers/ath9k	13968	W: https://wireless.wiki.kernel.org/en/users/Drivers/ath9k
13950	F: drivers/net/wireless/ath/ath9k/	13969	F: drivers/net/wireless/ath/ath9k/
13951		13970
13952	QUALCOMM CAMERA SUBSYSTEM DRIVER	13971	QUALCOMM CAMERA SUBSYSTEM DRIVER
@@ -14043,13 +14062,12 @@ QUALCOMM WCN36XX WIRELESS DRIVER · 90 unmodified lines
14043	M: Kalle Valo <kvalo@codeaurora.org>	14062	M: Kalle Valo <kvalo@codeaurora.org>
14044	L: wcn36xx@lists.infradead.org	14063	L: wcn36xx@lists.infradead.org
14045	S: Supported	14064	S: Supported
14046	W: http://wireless.kernel.org/en/users/Drivers/wcn36xx	14065	W: https://wireless.wiki.kernel.org/en/users/Drivers/wcn36xx
14047	T: git git://github.com/KrasnikovEugene/wcn36xx.git	14066	T: git git://github.com/KrasnikovEugene/wcn36xx.git
14048	F: drivers/net/wireless/ath/wcn36xx/	14067	F: drivers/net/wireless/ath/wcn36xx/
14049		14068
14050	QUANTENNA QTNFMAC WIRELESS DRIVER	14069	QUANTENNA QTNFMAC WIRELESS DRIVER
14051	M: Igor Mitsyanko <imitsyanko@quantenna.com>	14070	M: Igor Mitsyanko <imitsyanko@quantenna.com>
14052	M: Avinash Patil <avinashp@quantenna.com>
14053	M: Sergey Matyukevich <smatyukevich@quantenna.com>	14071	M: Sergey Matyukevich <smatyukevich@quantenna.com>
14054	L: linux-wireless@vger.kernel.org	14072	L: linux-wireless@vger.kernel.org
14055	S: Maintained	14073	S: Maintained
@@ -14271,7 +14289,7 @@ REALTEK WIRELESS DRIVER (rtlwifi family) · 215 unmodified lines
14271	M: Ping-Ke Shih <pkshih@realtek.com>	14289	M: Ping-Ke Shih <pkshih@realtek.com>
14272	L: linux-wireless@vger.kernel.org	14290	L: linux-wireless@vger.kernel.org
14273	S: Maintained	14291	S: Maintained
14274	W: http://wireless.kernel.org/	14292	W: https://wireless.wiki.kernel.org/
14275	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14293	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14276	F: drivers/net/wireless/realtek/rtlwifi/	14294	F: drivers/net/wireless/realtek/rtlwifi/
14277		14295
@@ -14406,7 +14424,7 @@ RFKILL · 128 unmodified lines
14406	M: Johannes Berg <johannes@sipsolutions.net>	14424	M: Johannes Berg <johannes@sipsolutions.net>
14407	L: linux-wireless@vger.kernel.org	14425	L: linux-wireless@vger.kernel.org
14408	S: Maintained	14426	S: Maintained
14409	W: http://wireless.kernel.org/	14427	W: https://wireless.wiki.kernel.org/
14410	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	14428	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git
14411	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	14429	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git
14412	F: Documentation/ABI/stable/sysfs-class-rfkill	14430	F: Documentation/ABI/stable/sysfs-class-rfkill
@@ -14555,7 +14573,7 @@ F: drivers/media/dvb-frontends/rtl2832_sdr* · 142 unmodified lines
14555	RTL8180 WIRELESS DRIVER	14573	RTL8180 WIRELESS DRIVER
14556	L: linux-wireless@vger.kernel.org	14574	L: linux-wireless@vger.kernel.org
14557	S: Orphan	14575	S: Orphan
14558	W: http://wireless.kernel.org/	14576	W: https://wireless.wiki.kernel.org/
14559	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14577	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14560	F: drivers/net/wireless/realtek/rtl818x/rtl8180/	14578	F: drivers/net/wireless/realtek/rtl818x/rtl8180/
14561		14579
@@ -14565,7 +14583,7 @@ M: Hin-Tak Leung <htl10@users.sourceforge.net> · 3 unmodified lines
14565	M: Larry Finger <Larry.Finger@lwfinger.net>	14583	M: Larry Finger <Larry.Finger@lwfinger.net>
14566	L: linux-wireless@vger.kernel.org	14584	L: linux-wireless@vger.kernel.org
14567	S: Maintained	14585	S: Maintained
14568	W: http://wireless.kernel.org/	14586	W: https://wireless.wiki.kernel.org/
14569	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git	14587	T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
14570	F: drivers/net/wireless/realtek/rtl818x/rtl8187/	14588	F: drivers/net/wireless/realtek/rtl818x/rtl8187/
14571		14589
@@ -16920,8 +16938,8 @@ F: drivers/media/platform/ti-vpe/ · 2348 unmodified lines
16920	TI WILINK WIRELESS DRIVERS	16938	TI WILINK WIRELESS DRIVERS
16921	L: linux-wireless@vger.kernel.org	16939	L: linux-wireless@vger.kernel.org
16922	S: Orphan	16940	S: Orphan
16923	W: http://wireless.kernel.org/en/users/Drivers/wl12xx	16941	W: https://wireless.wiki.kernel.org/en/users/Drivers/wl12xx
16924	W: http://wireless.kernel.org/en/users/Drivers/wl1251	16942	W: https://wireless.wiki.kernel.org/en/users/Drivers/wl1251
16925	T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git	16943	T: git git://git.kernel.org/pub/scm/linux/kernel/git/luca/wl12xx.git
16926	F: drivers/net/wireless/ti/	16944	F: drivers/net/wireless/ti/
16927	F: include/linux/wl12xx.h	16945	F: include/linux/wl12xx.h
@@ -18203,7 +18221,7 @@ M: Maya Erez <merez@codeaurora.org> · 1275 unmodified lines
18203	L: linux-wireless@vger.kernel.org	18221	L: linux-wireless@vger.kernel.org
18204	L: wil6210@qti.qualcomm.com	18222	L: wil6210@qti.qualcomm.com
18205	S: Supported	18223	S: Supported
18206	W: http://wireless.kernel.org/en/users/Drivers/wil6210	18224	W: https://wireless.wiki.kernel.org/en/users/Drivers/wil6210
18207	F: drivers/net/wireless/ath/wil6210/	18225	F: drivers/net/wireless/ath/wil6210/
18208		18226
18209	WIMAX STACK	18227	WIMAX STACK

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 7	3	PATCHLEVEL = 7
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc1	5	EXTRAVERSION = -rc4
6	NAME = Kleptomaniac Octopus	6	NAME = Kleptomaniac Octopus
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arc/include/asm/module.h+0−5

  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  *
  * Amit Bhor, Sameer Dhavale: Codito Technologies 2004
  */
 #ifndef _ASM_ARC_MODULE_H
 	const char *secstr;
 };
-#define MODULE_PROC_FAMILY "ARC700"
-#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
 #endif /* _ASM_ARC_MODULE_H */

arch/arc/include/asm/vermagic.h+8−0

@@ -0,0 +1,8 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#define MODULE_ARCH_VERMAGIC "ARC700"
	7
	8	#endif /* _ASM_VERMAGIC_H */

arch/arm/boot/compressed/head.S+2−1

 		@ running beyond the PoU, and so calling cache_off below from
 		@ inside the PE/COFF loader allocated region is unsafe unless
 		@ we explicitly clean it to the PoC.
-		adr	r0, call_cache_fn		@ region of code we will
+ ARM(		adrl	r0, call_cache_fn	)
+ THUMB(		adr	r0, call_cache_fn	)	@ region of code we will
 		adr	r1, 0f				@ run with MMU off
 		bl	cache_clean_flush
 		bl	cache_off

arch/arm/boot/dts/bcm2835-rpi.dtsi+3−0

 	soc {
 		firmware: firmware {
 			compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
 			mboxes = <&mailbox>;
 			dma-ranges;
 		};

arch/arm/boot/dts/bcm283x.dtsi+1−0

@@ -372,6 +372,7 @@ · 371 unmodified lines
372	"dsi0_ddr2",	372	"dsi0_ddr2",
373	"dsi0_ddr";	373	"dsi0_ddr";
374		374
		375	status = "disabled";
375	};	376	};
376		377
377	aux: aux@7e215000 {	378	aux: aux@7e215000 {

arch/arm/boot/dts/imx6qdl.dtsi+3−3

 				compatible = "fsl,imx6q-fec";
 				reg = <0x02188000 0x4000>;
 				interrupt-names = "int0", "pps";
-				interrupts-extended =
+				interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
-					<&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
+					     <0 119 IRQ_TYPE_LEVEL_HIGH>;
-					<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clks IMX6QDL_CLK_ENET>,
 					 <&clks IMX6QDL_CLK_ENET>,
 					 <&clks IMX6QDL_CLK_ENET_REF>;
 				clock-names = "ipg", "ahb", "ptp";
+				gpr = <&gpr>;
 				status = "disabled";
 			};

arch/arm/boot/dts/imx6qp.dtsi+0−1

@@ -77,7 +77,6 @@ · 76 unmodified lines
77	};	77	};
78		78
79	&fec {	79	&fec {
80	/delete-property/interrupts-extended;
81	interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,	80	interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>,
82	<0 119 IRQ_TYPE_LEVEL_HIGH>;	81	<0 119 IRQ_TYPE_LEVEL_HIGH>;
83	};	82	};

arch/arm/boot/dts/omap3-n950-n9.dtsi+5−0

 	status = "disabled";
 };
+/* RNG not directly accessible on N950/N9. */
+&rng_target {
+	status = "disabled";
+};
 &usb_otg_hs {
 	interface-type = <0>;
 	usb-phy = <&usb2_phy>;

arch/arm/include/asm/module.h+0−24

@@ -37,30 +37,6 @@ struct mod_arch_specific { · 36 unmodified lines
37	struct module;	37	struct module;
38	u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);	38	u32 get_module_plt(struct module *mod, unsigned long loc, Elf32_Addr val);
39		39
40	/*
41	* Add the ARM architecture version to the version magic string
42	*/
43	#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
44
45	/* Add __virt_to_phys patching state as well */
46	#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
47	#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
48	#else
49	#define MODULE_ARCH_VERMAGIC_P2V ""
50	#endif
51
52	/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */
53	#ifdef CONFIG_THUMB2_KERNEL
54	#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 "
55	#else
56	#define MODULE_ARCH_VERMAGIC_ARMTHUMB ""
57	#endif
58
59	#define MODULE_ARCH_VERMAGIC \
60	MODULE_ARCH_VERMAGIC_ARMVSN \
61	MODULE_ARCH_VERMAGIC_ARMTHUMB \
62	MODULE_ARCH_VERMAGIC_P2V
63
64	#ifdef CONFIG_THUMB2_KERNEL	40	#ifdef CONFIG_THUMB2_KERNEL
65	#define HAVE_ARCH_KALLSYMS_SYMBOL_VALUE	41	#define HAVE_ARCH_KALLSYMS_SYMBOL_VALUE
66	static inline unsigned long kallsyms_symbol_value(const Elf_Sym *sym)	42	static inline unsigned long kallsyms_symbol_value(const Elf_Sym *sym)

arch/arm/include/asm/vermagic.h+31−0

@@ -0,0 +1,31 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#include <linux/stringify.h>
	6
	7	/*
	8	* Add the ARM architecture version to the version magic string
	9	*/
	10	#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
	11
	12	/* Add __virt_to_phys patching state as well */
	13	#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
	14	#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
	15	#else
	16	#define MODULE_ARCH_VERMAGIC_P2V ""
	17	#endif
	18
	19	/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */
	20	#ifdef CONFIG_THUMB2_KERNEL
	21	#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 "
	22	#else
	23	#define MODULE_ARCH_VERMAGIC_ARMTHUMB ""
	24	#endif
	25
	26	#define MODULE_ARCH_VERMAGIC \
	27	MODULE_ARCH_VERMAGIC_ARMVSN \
	28	MODULE_ARCH_VERMAGIC_ARMTHUMB \
	29	MODULE_ARCH_VERMAGIC_P2V
	30
	31	#endif /* _ASM_VERMAGIC_H */

arch/arm/mach-imx/Makefile+2−0

 obj-$(CONFIG_SOC_IMX6) += suspend-imx6.o
 obj-$(CONFIG_SOC_IMX53) += suspend-imx53.o
 endif
+ifeq ($(CONFIG_ARM_CPU_SUSPEND),y)
 AFLAGS_resume-imx6.o :=-Wa,-march=armv7-a
 obj-$(CONFIG_SOC_IMX6) += resume-imx6.o
+endif
 obj-$(CONFIG_SOC_IMX6) += pm-imx6.o
 obj-$(CONFIG_SOC_IMX1) += mach-imx1.o

arch/arm/net/bpf_jit_32.c+34−18

 	rd = arm_bpf_get_reg64(dst, tmp, ctx);
 	/* Do LSR operation */
-	if (val < 32) {
+	if (val == 0) {
+		/* An immediate value of 0 encodes a shift amount of 32
+		 * for LSR. To shift by 0, don't do anything.
+		 */
+	} else if (val < 32) {
 		emit(ARM_MOV_SI(tmp2[1], rd[1], SRTYPE_LSR, val), ctx);
 		emit(ARM_ORR_SI(rd[1], tmp2[1], rd[0], SRTYPE_ASL, 32 - val), ctx);
 		emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_LSR, val), ctx);
 	rd = arm_bpf_get_reg64(dst, tmp, ctx);
 	/* Do ARSH operation */
-	if (val < 32) {
+	if (val == 0) {
+		/* An immediate value of 0 encodes a shift amount of 32
+		 * for ASR. To shift by 0, don't do anything.
+		 */
+	} else if (val < 32) {
 		emit(ARM_MOV_SI(tmp2[1], rd[1], SRTYPE_LSR, val), ctx);
 		emit(ARM_ORR_SI(rd[1], tmp2[1], rd[0], SRTYPE_ASL, 32 - val), ctx);
 		emit(ARM_MOV_SI(rd[0], rd[0], SRTYPE_ASR, val), ctx);
 	arm_bpf_put_reg32(dst_hi, rd[0], ctx);
 }
+static bool is_ldst_imm(s16 off, const u8 size)
+{
+	s16 off_max = 0;
+	switch (size) {
+	case BPF_B:
+	case BPF_W:
+		off_max = 0xfff;
+		break;
+	case BPF_H:
+		off_max = 0xff;
+		break;
+	case BPF_DW:
+		/* Need to make sure off+4 does not overflow. */
+		off_max = 0xfff - 4;
+		break;
+	}
+	return -off_max <= off && off <= off_max;
+}
 /* *(size *)(dst + off) = src */
 static inline void emit_str_r(const s8 dst, const s8 src[],
-			      s32 off, struct jit_ctx *ctx, const u8 sz){
+			      s16 off, struct jit_ctx *ctx, const u8 sz){
 	const s8 *tmp = bpf2a32[TMP_REG_1];
-	s32 off_max;
 	s8 rd;
 	rd = arm_bpf_get_reg32(dst, tmp[1], ctx);
-	if (sz == BPF_H)
+	if (!is_ldst_imm(off, sz)) {
-		off_max = 0xff;
-	else
-		off_max = 0xfff;
-	if (off < 0 || off > off_max) {
 		emit_a32_mov_i(tmp[0], off, ctx);
 		emit(ARM_ADD_R(tmp[0], tmp[0], rd), ctx);
 		rd = tmp[0];
 /* dst = *(size*)(src + off) */
 static inline void emit_ldx_r(const s8 dst[], const s8 src,
-			      s32 off, struct jit_ctx *ctx, const u8 sz){
+			      s16 off, struct jit_ctx *ctx, const u8 sz){
 	const s8 *tmp = bpf2a32[TMP_REG_1];
 	const s8 *rd = is_stacked(dst_lo) ? tmp : dst;
 	s8 rm = src;
-	s32 off_max;
-	if (sz == BPF_H)
-		off_max = 0xff;
-	else
-		off_max = 0xfff;
-	if (off < 0 || off > off_max) {
+	if (!is_ldst_imm(off, sz)) {
 		emit_a32_mov_i(tmp[0], off, ctx);
 		emit(ARM_ADD_R(tmp[0], tmp[0], src), ctx);
 		rm = tmp[0];

arch/arm/xen/enlighten.c+1−1

@@ -36,7 +36,7 @@ · 35 unmodified lines
36		36
37	#include <linux/mm.h>	37	#include <linux/mm.h>
38		38
39	struct start_info _xen_start_info;	39	static struct start_info _xen_start_info;
40	struct start_info *xen_start_info = &_xen_start_info;	40	struct start_info *xen_start_info = &_xen_start_info;
41	EXPORT_SYMBOL(xen_start_info);	41	EXPORT_SYMBOL(xen_start_info);
42		42

arch/arm64/include/asm/module.h+0−2

@@ -7,8 +7,6 @@ · 6 unmodified lines
7		7
8	#include <asm-generic/module.h>	8	#include <asm-generic/module.h>
9		9
10	#define MODULE_ARCH_VERMAGIC "aarch64"
11
12	#ifdef CONFIG_ARM64_MODULE_PLTS	10	#ifdef CONFIG_ARM64_MODULE_PLTS
13	struct mod_plt_sec {	11	struct mod_plt_sec {
14	int plt_shndx;	12	int plt_shndx;

arch/arm64/include/asm/pointer_auth.h+6−3

 		get_random_bytes(&keys->apga, sizeof(keys->apga));
 }
-#define __ptrauth_key_install(k, v)				\
+#define __ptrauth_key_install_nosync(k, v)			\
 do {								\
 	struct ptrauth_key __pki_v = (v);			\
 	write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1);	\
 static __always_inline void ptrauth_keys_switch_kernel(struct ptrauth_keys_kernel *keys)
 {
-	if (system_supports_address_auth())
+	if (!system_supports_address_auth())
-		__ptrauth_key_install(APIA, keys->apia);
+		return;
+	__ptrauth_key_install_nosync(APIA, keys->apia);
+	isb();
 }
 extern int ptrauth_prctl_reset_keys(struct task_struct *tsk, unsigned long arg);

arch/arm64/include/asm/sysreg.h+3−1

 #ifndef CONFIG_BROKEN_GAS_INST
 #ifdef __ASSEMBLY__
-#define __emit_inst(x)			.inst (x)
+// The space separator is omitted so that __emit_inst(x) can be parsed as
+// either an assembler directive or an assembler macro argument.
+#define __emit_inst(x)			.inst(x)
 #else
 #define __emit_inst(x)			".inst " __stringify((x)) "\n\t"
 #endif

arch/arm64/include/asm/vermagic.h+10−0

@@ -0,0 +1,10 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2	/*
	3	* Copyright (C) 2012 ARM Ltd.
	4	*/
	5	#ifndef _ASM_VERMAGIC_H
	6	#define _ASM_VERMAGIC_H
	7
	8	#define MODULE_ARCH_VERMAGIC "aarch64"
	9
	10	#endif /* _ASM_VERMAGIC_H */

arch/arm64/kernel/vdso.c+1−12

@@ -260,18 +260,7 @@ static int __aarch32_alloc_vdso_pages(void) · 259 unmodified lines
260	if (ret)	260	if (ret)
261	return ret;	261	return ret;
262		262
263	ret = aarch32_alloc_kuser_vdso_page();	263	return aarch32_alloc_kuser_vdso_page();
264	if (ret) {
265	unsigned long c_vvar =
266	(unsigned long)page_to_virt(aarch32_vdso_pages[C_VVAR]);
267	unsigned long c_vdso =
268	(unsigned long)page_to_virt(aarch32_vdso_pages[C_VDSO]);
269
270	free_page(c_vvar);
271	free_page(c_vdso);
272	}
273
274	return ret;
275	}	264	}
276	#else	265	#else
277	static int __aarch32_alloc_vdso_pages(void)	266	static int __aarch32_alloc_vdso_pages(void)

arch/arm64/kernel/vdso/Makefile+1−1

@@ -32,7 +32,7 @@ UBSAN_SANITIZE := n · 31 unmodified lines
32	OBJECT_FILES_NON_STANDARD := y	32	OBJECT_FILES_NON_STANDARD := y
33	KCOV_INSTRUMENT := n	33	KCOV_INSTRUMENT := n
34		34
35	CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny	35	CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny -fasynchronous-unwind-tables
36		36
37	ifneq ($(c-gettimeofday-y),)	37	ifneq ($(c-gettimeofday-y),)
38	CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y)	38	CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y)

arch/h8300/kernel/.gitignore+2−0

@@ -0,0 +1,2 @@
	1	# SPDX-License-Identifier: GPL-2.0-only
	2	vmlinux.lds

arch/hexagon/include/asm/vermagic.hrenamed from arch/hexagon/include/asm/module.h+4−4

@@ -3,11 +3,11 @@ · 2 unmodified lines
3	* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.	3	* Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
4	*/	4	*/
5		5
6	#ifndef _ASM_MODULE_H	6	#ifndef _ASM_VERMAGIC_H
7	#define _ASM_MODULE_H	7	#define _ASM_VERMAGIC_H
8		8
9	#include <asm-generic/module.h>	9	#include <linux/stringify.h>
10		10
11	#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "	11	#define MODULE_ARCH_VERMAGIC __stringify(PROCESSOR_MODEL_NAME) " "
12		12
13	#endif	13	#endif /* _ASM_VERMAGIC_H */

arch/ia64/include/asm/module.h+0−4

@@ -26,10 +26,6 @@ struct mod_arch_specific { · 25 unmodified lines
26	unsigned int next_got_entry; /* index of next available got entry */	26	unsigned int next_got_entry; /* index of next available got entry */
27	};	27	};
28		28
29	#define MODULE_PROC_FAMILY "ia64"
30	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \
31	"gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
32
33	#define ARCH_SHF_SMALL SHF_IA_64_SHORT	29	#define ARCH_SHF_SMALL SHF_IA_64_SHORT
34		30
35	#endif /* _ASM_IA64_MODULE_H */	31	#endif /* _ASM_IA64_MODULE_H */

arch/ia64/include/asm/vermagic.h+15−0

@@ -0,0 +1,15 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* Copyright (C) 2003 Hewlett-Packard Co
	4	* David Mosberger-Tang <davidm@hpl.hp.com>
	5	*/
	6
	7	#ifndef _ASM_VERMAGIC_H
	8	#define _ASM_VERMAGIC_H
	9
	10	#include <linux/stringify.h>
	11
	12	#define MODULE_ARCH_VERMAGIC "ia64" \
	13	"gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__)
	14
	15	#endif /* _ASM_VERMAGIC_H */

arch/m68k/include/asm/Kbuild+0−1

@@ -1,7 +1,6 @@
1	# SPDX-License-Identifier: GPL-2.0	1	# SPDX-License-Identifier: GPL-2.0
2	generated-y += syscall_table.h	2	generated-y += syscall_table.h
3	generic-y += extable.h	3	generic-y += extable.h
4	generic-y += hardirq.h
5	generic-y += kvm_para.h	4	generic-y += kvm_para.h
6	generic-y += local64.h	5	generic-y += local64.h
7	generic-y += mcs_spinlock.h	6	generic-y += mcs_spinlock.h

arch/mips/include/asm/module.h+0−61

@@ -83,65 +83,4 @@ search_module_dbetables(unsigned long addr) · 82 unmodified lines
83	}	83	}
84	#endif	84	#endif
85		85
86	#ifdef CONFIG_CPU_BMIPS
87	#define MODULE_PROC_FAMILY "BMIPS "
88	#elif defined CONFIG_CPU_MIPS32_R1
89	#define MODULE_PROC_FAMILY "MIPS32_R1 "
90	#elif defined CONFIG_CPU_MIPS32_R2
91	#define MODULE_PROC_FAMILY "MIPS32_R2 "
92	#elif defined CONFIG_CPU_MIPS32_R6
93	#define MODULE_PROC_FAMILY "MIPS32_R6 "
94	#elif defined CONFIG_CPU_MIPS64_R1
95	#define MODULE_PROC_FAMILY "MIPS64_R1 "
96	#elif defined CONFIG_CPU_MIPS64_R2
97	#define MODULE_PROC_FAMILY "MIPS64_R2 "
98	#elif defined CONFIG_CPU_MIPS64_R6
99	#define MODULE_PROC_FAMILY "MIPS64_R6 "
100	#elif defined CONFIG_CPU_R3000
101	#define MODULE_PROC_FAMILY "R3000 "
102	#elif defined CONFIG_CPU_TX39XX
103	#define MODULE_PROC_FAMILY "TX39XX "
104	#elif defined CONFIG_CPU_VR41XX
105	#define MODULE_PROC_FAMILY "VR41XX "
106	#elif defined CONFIG_CPU_R4X00
107	#define MODULE_PROC_FAMILY "R4X00 "
108	#elif defined CONFIG_CPU_TX49XX
109	#define MODULE_PROC_FAMILY "TX49XX "
110	#elif defined CONFIG_CPU_R5000
111	#define MODULE_PROC_FAMILY "R5000 "
112	#elif defined CONFIG_CPU_R5500
113	#define MODULE_PROC_FAMILY "R5500 "
114	#elif defined CONFIG_CPU_NEVADA
115	#define MODULE_PROC_FAMILY "NEVADA "
116	#elif defined CONFIG_CPU_R10000
117	#define MODULE_PROC_FAMILY "R10000 "
118	#elif defined CONFIG_CPU_RM7000
119	#define MODULE_PROC_FAMILY "RM7000 "
120	#elif defined CONFIG_CPU_SB1
121	#define MODULE_PROC_FAMILY "SB1 "
122	#elif defined CONFIG_CPU_LOONGSON32
123	#define MODULE_PROC_FAMILY "LOONGSON32 "
124	#elif defined CONFIG_CPU_LOONGSON2EF
125	#define MODULE_PROC_FAMILY "LOONGSON2EF "
126	#elif defined CONFIG_CPU_LOONGSON64
127	#define MODULE_PROC_FAMILY "LOONGSON64 "
128	#elif defined CONFIG_CPU_CAVIUM_OCTEON
129	#define MODULE_PROC_FAMILY "OCTEON "
130	#elif defined CONFIG_CPU_XLR
131	#define MODULE_PROC_FAMILY "XLR "
132	#elif defined CONFIG_CPU_XLP
133	#define MODULE_PROC_FAMILY "XLP "
134	#else
135	#error MODULE_PROC_FAMILY undefined for your processor configuration
136	#endif
137
138	#ifdef CONFIG_32BIT
139	#define MODULE_KERNEL_TYPE "32BIT "
140	#elif defined CONFIG_64BIT
141	#define MODULE_KERNEL_TYPE "64BIT "
142	#endif
143
144	#define MODULE_ARCH_VERMAGIC \
145	MODULE_PROC_FAMILY MODULE_KERNEL_TYPE
146
147	#endif /* _ASM_MODULE_H */	86	#endif /* _ASM_MODULE_H */

arch/mips/include/asm/vermagic.h+66−0

@@ -0,0 +1,66 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#ifdef CONFIG_CPU_BMIPS
	6	#define MODULE_PROC_FAMILY "BMIPS "
	7	#elif defined CONFIG_CPU_MIPS32_R1
	8	#define MODULE_PROC_FAMILY "MIPS32_R1 "
	9	#elif defined CONFIG_CPU_MIPS32_R2
	10	#define MODULE_PROC_FAMILY "MIPS32_R2 "
	11	#elif defined CONFIG_CPU_MIPS32_R6
	12	#define MODULE_PROC_FAMILY "MIPS32_R6 "
	13	#elif defined CONFIG_CPU_MIPS64_R1
	14	#define MODULE_PROC_FAMILY "MIPS64_R1 "
	15	#elif defined CONFIG_CPU_MIPS64_R2
	16	#define MODULE_PROC_FAMILY "MIPS64_R2 "
	17	#elif defined CONFIG_CPU_MIPS64_R6
	18	#define MODULE_PROC_FAMILY "MIPS64_R6 "
	19	#elif defined CONFIG_CPU_R3000
	20	#define MODULE_PROC_FAMILY "R3000 "
	21	#elif defined CONFIG_CPU_TX39XX
	22	#define MODULE_PROC_FAMILY "TX39XX "
	23	#elif defined CONFIG_CPU_VR41XX
	24	#define MODULE_PROC_FAMILY "VR41XX "
	25	#elif defined CONFIG_CPU_R4X00
	26	#define MODULE_PROC_FAMILY "R4X00 "
	27	#elif defined CONFIG_CPU_TX49XX
	28	#define MODULE_PROC_FAMILY "TX49XX "
	29	#elif defined CONFIG_CPU_R5000
	30	#define MODULE_PROC_FAMILY "R5000 "
	31	#elif defined CONFIG_CPU_R5500
	32	#define MODULE_PROC_FAMILY "R5500 "
	33	#elif defined CONFIG_CPU_NEVADA
	34	#define MODULE_PROC_FAMILY "NEVADA "
	35	#elif defined CONFIG_CPU_R10000
	36	#define MODULE_PROC_FAMILY "R10000 "
	37	#elif defined CONFIG_CPU_RM7000
	38	#define MODULE_PROC_FAMILY "RM7000 "
	39	#elif defined CONFIG_CPU_SB1
	40	#define MODULE_PROC_FAMILY "SB1 "
	41	#elif defined CONFIG_CPU_LOONGSON32
	42	#define MODULE_PROC_FAMILY "LOONGSON32 "
	43	#elif defined CONFIG_CPU_LOONGSON2EF
	44	#define MODULE_PROC_FAMILY "LOONGSON2EF "
	45	#elif defined CONFIG_CPU_LOONGSON64
	46	#define MODULE_PROC_FAMILY "LOONGSON64 "
	47	#elif defined CONFIG_CPU_CAVIUM_OCTEON
	48	#define MODULE_PROC_FAMILY "OCTEON "
	49	#elif defined CONFIG_CPU_XLR
	50	#define MODULE_PROC_FAMILY "XLR "
	51	#elif defined CONFIG_CPU_XLP
	52	#define MODULE_PROC_FAMILY "XLP "
	53	#else
	54	#error MODULE_PROC_FAMILY undefined for your processor configuration
	55	#endif
	56
	57	#ifdef CONFIG_32BIT
	58	#define MODULE_KERNEL_TYPE "32BIT "
	59	#elif defined CONFIG_64BIT
	60	#define MODULE_KERNEL_TYPE "64BIT "
	61	#endif
	62
	63	#define MODULE_ARCH_VERMAGIC \
	64	MODULE_PROC_FAMILY MODULE_KERNEL_TYPE
	65
	66	#endif /* _ASM_VERMAGIC_H */

arch/nds32/include/asm/vermagic.hrenamed from arch/nds32/include/asm/module.h+3−5

@@ -1,11 +1,9 @@
1	/* SPDX-License-Identifier: GPL-2.0 */	1	/* SPDX-License-Identifier: GPL-2.0 */
2	// Copyright (C) 2005-2017 Andes Technology Corporation	2	// Copyright (C) 2005-2017 Andes Technology Corporation
3		3
4	#ifndef _ASM_NDS32_MODULE_H	4	#ifndef _ASM_VERMAGIC_H
5	#define _ASM_NDS32_MODULE_H	5	#define _ASM_VERMAGIC_H
6
7	#include <asm-generic/module.h>
8		6
9	#define MODULE_ARCH_VERMAGIC "NDS32v3"	7	#define MODULE_ARCH_VERMAGIC "NDS32v3"
10		8
11	#endif /* _ASM_NDS32_MODULE_H */	9	#endif /* _ASM_VERMAGIC_H */

arch/powerpc/include/asm/module.h+0−18

@@ -3,28 +3,10 @@ · 2 unmodified lines
3	#define _ASM_POWERPC_MODULE_H	3	#define _ASM_POWERPC_MODULE_H
4	#ifdef __KERNEL__	4	#ifdef __KERNEL__
5		5
6	/*
7	*/
8
9	#include <linux/list.h>	6	#include <linux/list.h>
10	#include <asm/bug.h>	7	#include <asm/bug.h>
11	#include <asm-generic/module.h>	8	#include <asm-generic/module.h>
12		9
13
14	#ifdef CONFIG_MPROFILE_KERNEL
15	#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel "
16	#else
17	#define MODULE_ARCH_VERMAGIC_FTRACE ""
18	#endif
19
20	#ifdef CONFIG_RELOCATABLE
21	#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable "
22	#else
23	#define MODULE_ARCH_VERMAGIC_RELOCATABLE ""
24	#endif
25
26	#define MODULE_ARCH_VERMAGIC MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE
27
28	#ifndef __powerpc64__	10	#ifndef __powerpc64__
29	/*	11	/*
30	* Thanks to Paul M for explaining this.	12	* Thanks to Paul M for explaining this.

arch/powerpc/include/asm/vermagic.h+20−0

@@ -0,0 +1,20 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_VERMAGIC_H
	3	#define _ASM_VERMAGIC_H
	4
	5	#ifdef CONFIG_MPROFILE_KERNEL
	6	#define MODULE_ARCH_VERMAGIC_FTRACE "mprofile-kernel "
	7	#else
	8	#define MODULE_ARCH_VERMAGIC_FTRACE ""
	9	#endif
	10
	11	#ifdef CONFIG_RELOCATABLE
	12	#define MODULE_ARCH_VERMAGIC_RELOCATABLE "relocatable "
	13	#else
	14	#define MODULE_ARCH_VERMAGIC_RELOCATABLE ""
	15	#endif
	16
	17	#define MODULE_ARCH_VERMAGIC \
	18	MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE
	19
	20	#endif /* _ASM_VERMAGIC_H */

arch/powerpc/kernel/entry_32.S+1−1

@@ -732,7 +732,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPE) · 731 unmodified lines
732	stw r10,_CCR(r1)	732	stw r10,_CCR(r1)
733	stw r1,KSP(r3) /* Set old stack pointer */	733	stw r1,KSP(r3) /* Set old stack pointer */
734		734
735	kuap_check r2, r4	735	kuap_check r2, r0
736	#ifdef CONFIG_SMP	736	#ifdef CONFIG_SMP
737	/* We need a sync somewhere here to make sure that if the	737	/* We need a sync somewhere here to make sure that if the
738	* previous task gets rescheduled on another CPU, it sees all	738	* previous task gets rescheduled on another CPU, it sees all

arch/powerpc/kernel/setup_64.c+2−0

 	lsizep = of_get_property(np, propnames[3], NULL);
 	if (bsizep == NULL)
 		bsizep = lsizep;
+	if (lsizep == NULL)
+		lsizep = bsizep;
 	if (lsizep != NULL)
 		lsize = be32_to_cpu(*lsizep);
 	if (bsizep != NULL)

arch/powerpc/kvm/book3s_64_mmu_hv.c+5−4

 	 */
 	local_irq_disable();
 	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
+	pte = __pte(0);
+	if (ptep)
+		pte = *ptep;
+	local_irq_enable();
 	/*
 	 * If the PTE disappeared temporarily due to a THP
 	 * collapse, just return and let the guest try again.
 	 */
-	if (!ptep) {
+	if (!pte_present(pte)) {
-		local_irq_enable();
 		if (page)
 			put_page(page);
 		return RESUME_GUEST;
 	}
-	pte = *ptep;
-	local_irq_enable();
 	hpa = pte_pfn(pte) << PAGE_SHIFT;
 	pte_size = PAGE_SIZE;
 	if (shift)

arch/powerpc/kvm/book3s_64_mmu_radix.c+5−4

 	 */
 	local_irq_disable();
 	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
+	pte = __pte(0);
+	if (ptep)
+		pte = *ptep;
+	local_irq_enable();
 	/*
 	 * If the PTE disappeared temporarily due to a THP
 	 * collapse, just return and let the guest try again.
 	 */
-	if (!ptep) {
+	if (!pte_present(pte)) {
-		local_irq_enable();
 		if (page)
 			put_page(page);
 		return RESUME_GUEST;
 	}
-	pte = *ptep;
-	local_irq_enable();
 	/* If we're logging dirty pages, always map single pages */
 	large_enable = !(memslot->flags & KVM_MEM_LOG_DIRTY_PAGES);

arch/powerpc/mm/nohash/8xx.c+3−0

 			mmu_mapin_ram_chunk(etext8, einittext8, PAGE_KERNEL);
 		}
 	}
+	_tlbil_all();
 }
 #ifdef CONFIG_STRICT_KERNEL_RWX
 				      ~(LARGE_PAGE_SIZE_8M - 1)));
 	mmu_patch_addis(&patch__dtlbmiss_romem_top, -__pa(_sinittext));
+	_tlbil_all();
 	/* Update page tables for PTDUMP and BDI */
 	mmu_mapin_ram_chunk(0, sinittext, __pgprot(0));
 	mmu_mapin_ram_chunk(0, etext, PAGE_KERNEL_ROX);

arch/powerpc/platforms/Kconfig.cputype+1−1

@@ -397,7 +397,7 @@ config PPC_KUAP · 396 unmodified lines
397		397
398	config PPC_KUAP_DEBUG	398	config PPC_KUAP_DEBUG
399	bool "Extra debugging for Kernel Userspace Access Protection"	399	bool "Extra debugging for Kernel Userspace Access Protection"
400	depends on PPC_KUAP && (PPC_RADIX_MMU \|\| PPC_32)	400	depends on PPC_KUAP && (PPC_RADIX_MMU \|\| PPC32)
401	help	401	help
402	Add extra debugging for Kernel Userspace Access Protection (KUAP)	402	Add extra debugging for Kernel Userspace Access Protection (KUAP)
403	If you're unsure, say N.	403	If you're unsure, say N.

arch/riscv/Kconfig+2−2

@@ -55,12 +55,12 @@ config RISCV · 54 unmodified lines
55	select ARCH_HAS_PTE_SPECIAL	55	select ARCH_HAS_PTE_SPECIAL
56	select ARCH_HAS_MMIOWB	56	select ARCH_HAS_MMIOWB
57	select ARCH_HAS_DEBUG_VIRTUAL	57	select ARCH_HAS_DEBUG_VIRTUAL
58	select HAVE_EBPF_JIT	58	select HAVE_EBPF_JIT if MMU
59	select EDAC_SUPPORT	59	select EDAC_SUPPORT
60	select ARCH_HAS_GIGANTIC_PAGE	60	select ARCH_HAS_GIGANTIC_PAGE
61	select ARCH_HAS_SET_DIRECT_MAP	61	select ARCH_HAS_SET_DIRECT_MAP
62	select ARCH_HAS_SET_MEMORY	62	select ARCH_HAS_SET_MEMORY
63	select ARCH_HAS_STRICT_KERNEL_RWX	63	select ARCH_HAS_STRICT_KERNEL_RWX if MMU
64	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT	64	select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
65	select SPARSEMEM_STATIC if 32BIT	65	select SPARSEMEM_STATIC if 32BIT
66	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU	66	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU

arch/riscv/include/asm/module.h+0−2

@@ -6,8 +6,6 @@ · 5 unmodified lines
6		6
7	#include <asm-generic/module.h>	7	#include <asm-generic/module.h>
8		8
9	#define MODULE_ARCH_VERMAGIC "riscv"
10
11	struct module;	9	struct module;
12	unsigned long module_emit_got_entry(struct module *mod, unsigned long val);	10	unsigned long module_emit_got_entry(struct module *mod, unsigned long val);
13	unsigned long module_emit_plt_entry(struct module *mod, unsigned long val);	11	unsigned long module_emit_plt_entry(struct module *mod, unsigned long val);

arch/riscv/include/asm/vermagic.h+9−0

@@ -0,0 +1,9 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/* Copyright (C) 2017 Andes Technology Corporation */
	3
	4	#ifndef _ASM_VERMAGIC_H
	5	#define _ASM_VERMAGIC_H
	6
	7	#define MODULE_ARCH_VERMAGIC "riscv"
	8
	9	#endif /* _ASM_VERMAGIC_H */

arch/riscv/kernel/sbi.c+10−7

 {
 	sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
 }
-EXPORT_SYMBOL(sbi_set_timer);
+EXPORT_SYMBOL(sbi_shutdown);
 /**
  * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
 {
 	sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
 }
-EXPORT_SYMBOL(sbi_shutdown);
+EXPORT_SYMBOL(sbi_clear_ipi);
 /**
  * sbi_set_timer_v01() - Program the timer for next timer event.
 	return result;
 }
+static void sbi_set_power_off(void)
+{
+	pm_power_off = sbi_shutdown;
+}
 #else
 static void __sbi_set_timer_v01(uint64_t stime_value)
 {
 	return 0;
 }
+static void sbi_set_power_off(void) {}
 #endif /* CONFIG_RISCV_SBI_V01 */
 static void __sbi_set_timer_v02(uint64_t stime_value)
 	return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
 }
-static void sbi_power_off(void)
-{
-	sbi_shutdown();
-}
 int __init sbi_init(void)
 {
 	int ret;
-	pm_power_off = sbi_power_off;
+	sbi_set_power_off();
 	ret = sbi_get_spec_version();
 	if (ret > 0)
 		sbi_spec_version = ret;

arch/riscv/kernel/stacktrace.c+2−2

 #include <linux/stacktrace.h>
 #include <linux/ftrace.h>
+register unsigned long sp_in_global __asm__("sp");
 #ifdef CONFIG_FRAME_POINTER
 struct stackframe {
 	unsigned long ra;
 };
-register unsigned long sp_in_global __asm__("sp");
 void notrace walk_stackframe(struct task_struct *task, struct pt_regs *regs,
 			     bool (*fn)(unsigned long, void *), void *arg)
 {

arch/riscv/kernel/vdso/Makefile+3−3

@@ -33,15 +33,15 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE · 32 unmodified lines
33	$(call if_changed,vdsold)	33	$(call if_changed,vdsold)
34		34
35	# We also create a special relocatable object that should mirror the symbol	35	# We also create a special relocatable object that should mirror the symbol
36	# table and layout of the linked DSO. With ld -R we can then refer to	36	# table and layout of the linked DSO. With ld --just-symbols we can then
37	# these symbols in the kernel code rather than hand-coded addresses.	37	# refer to these symbols in the kernel code rather than hand-coded addresses.
38		38
39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \	39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \
40	-Wl,--build-id -Wl,--hash-style=both	40	-Wl,--build-id -Wl,--hash-style=both
41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE	41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE
42	$(call if_changed,vdsold)	42	$(call if_changed,vdsold)
43		43
44	LDFLAGS_vdso-syms.o := -r -R	44	LDFLAGS_vdso-syms.o := -r --just-symbols
45	$(obj)/vdso-syms.o: $(obj)/vdso-dummy.o FORCE	45	$(obj)/vdso-syms.o: $(obj)/vdso-dummy.o FORCE
46	$(call if_changed,ld)	46	$(call if_changed,ld)
47		47

arch/riscv/net/bpf_jit_comp64.c+32−17

 	return -(1L << 31) <= val && val < (1L << 31);
 }
+static bool in_auipc_jalr_range(s64 val)
+{
+	/*
+	 * auipc+jalr can reach any signed PC-relative offset in the range
+	 * [-2^31 - 2^11, 2^31 - 2^11).
+	 */
+	return (-(1L << 31) - (1L << 11)) <= val &&
+		val < ((1L << 31) - (1L << 11));
+}
 static void emit_imm(u8 rd, s64 val, struct rv_jit_context *ctx)
 {
 	/* Note that the immediate from the add is sign-extended,
 	*rd = RV_REG_T2;
 }
-static void emit_jump_and_link(u8 rd, s64 rvoff, bool force_jalr,
+static int emit_jump_and_link(u8 rd, s64 rvoff, bool force_jalr,
-			       struct rv_jit_context *ctx)
+			      struct rv_jit_context *ctx)
 {
 	s64 upper, lower;
 	if (rvoff && is_21b_int(rvoff) && !force_jalr) {
 		emit(rv_jal(rd, rvoff >> 1), ctx);
-		return;
+		return 0;
+	} else if (in_auipc_jalr_range(rvoff)) {
+		upper = (rvoff + (1 << 11)) >> 12;
+		lower = rvoff & 0xfff;
+		emit(rv_auipc(RV_REG_T1, upper), ctx);
+		emit(rv_jalr(rd, RV_REG_T1, lower), ctx);
+		return 0;
 	}
-	upper = (rvoff + (1 << 11)) >> 12;
+	pr_err("bpf-jit: target offset 0x%llx is out of range\n", rvoff);
-	lower = rvoff & 0xfff;
+	return -ERANGE;
-	emit(rv_auipc(RV_REG_T1, upper), ctx);
-	emit(rv_jalr(rd, RV_REG_T1, lower), ctx);
 }
 static bool is_signed_bpf_cond(u8 cond)
 	s64 off = 0;
 	u64 ip;
 	u8 rd;
+	int ret;
 	if (addr && ctx->insns) {
 		ip = (u64)(long)(ctx->insns + ctx->ninsns);
 		off = addr - ip;
-		if (!is_32b_int(off)) {
-			pr_err("bpf-jit: target call addr %pK is out of range\n",
-			       (void *)addr);
-			return -ERANGE;
-		}
 	}
-	emit_jump_and_link(RV_REG_RA, off, !fixed, ctx);
+	ret = emit_jump_and_link(RV_REG_RA, off, !fixed, ctx);
+	if (ret)
+		return ret;
 	rd = bpf_to_rv_reg(BPF_REG_0, ctx);
 	emit(rv_addi(rd, RV_REG_A0, 0), ctx);
 	return 0;
 {
 	bool is64 = BPF_CLASS(insn->code) == BPF_ALU64 ||
 		    BPF_CLASS(insn->code) == BPF_JMP;
-	int s, e, rvoff, i = insn - ctx->prog->insnsi;
+	int s, e, rvoff, ret, i = insn - ctx->prog->insnsi;
 	struct bpf_prog_aux *aux = ctx->prog->aux;
 	u8 rd = -1, rs = -1, code = insn->code;
 	s16 off = insn->off;
 	/* JUMP off */
 	case BPF_JMP | BPF_JA:
 		rvoff = rv_offset(i, off, ctx);
-		emit_jump_and_link(RV_REG_ZERO, rvoff, false, ctx);
+		ret = emit_jump_and_link(RV_REG_ZERO, rvoff, false, ctx);
+		if (ret)
+			return ret;
 		break;
 	/* IF (dst COND src) JUMP off */
 	case BPF_JMP | BPF_CALL:
 	{
 		bool fixed;
-		int ret;
 		u64 addr;
 		mark_call(ctx);
 			break;
 		rvoff = epilogue_offset(ctx);
-		emit_jump_and_link(RV_REG_ZERO, rvoff, false, ctx);
+		ret = emit_jump_and_link(RV_REG_ZERO, rvoff, false, ctx);
+		if (ret)
+			return ret;
 		break;
 	/* dst = imm64 */

arch/s390/boot/uv.c+0−2

 #ifdef CONFIG_PROTECTED_VIRTUALIZATION_GUEST
 int __bootdata_preserved(prot_virt_guest);
 #endif
-#if IS_ENABLED(CONFIG_KVM)
 struct uv_info __bootdata_preserved(uv_info);
-#endif
 void uv_query_info(void)
 {

arch/s390/kernel/diag.c+1−1

@@ -133,7 +133,7 @@ void diag_stat_inc(enum diag_stat_enum nr) · 132 unmodified lines
133	}	133	}
134	EXPORT_SYMBOL(diag_stat_inc);	134	EXPORT_SYMBOL(diag_stat_inc);
135		135
136	void diag_stat_inc_norecursion(enum diag_stat_enum nr)	136	void notrace diag_stat_inc_norecursion(enum diag_stat_enum nr)
137	{	137	{
138	this_cpu_inc(diag_stat.counter[nr]);	138	this_cpu_inc(diag_stat.counter[nr]);
139	trace_s390_diagnose_norecursion(diag_map[nr].code);	139	trace_s390_diagnose_norecursion(diag_map[nr].code);

arch/s390/kernel/smp.c+2−2

@@ -403,7 +403,7 @@ int smp_find_processor_id(u16 address) · 402 unmodified lines
403	return -1;	403	return -1;
404	}	404	}
405		405
406	bool arch_vcpu_is_preempted(int cpu)	406	bool notrace arch_vcpu_is_preempted(int cpu)
407	{	407	{
408	if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))	408	if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
409	return false;	409	return false;
@@ -413,7 +413,7 @@ bool arch_vcpu_is_preempted(int cpu) · 3 unmodified lines
413	}	413	}
414	EXPORT_SYMBOL(arch_vcpu_is_preempted);	414	EXPORT_SYMBOL(arch_vcpu_is_preempted);
415		415
416	void smp_yield_cpu(int cpu)	416	void notrace smp_yield_cpu(int cpu)
417	{	417	{
418	if (!MACHINE_HAS_DIAG9C)	418	if (!MACHINE_HAS_DIAG9C)
419	return;	419	return;

arch/s390/kernel/trace.c+1−1

@@ -14,7 +14,7 @@ EXPORT_TRACEPOINT_SYMBOL(s390_diagnose); · 13 unmodified lines
14		14
15	static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);	15	static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);
16		16
17	void trace_s390_diagnose_norecursion(int diag_nr)	17	void notrace trace_s390_diagnose_norecursion(int diag_nr)
18	{	18	{
19	unsigned long flags;	19	unsigned long flags;
20	unsigned int *depth;	20	unsigned int *depth;

arch/s390/kernel/uv.c+2−1

 int __bootdata_preserved(prot_virt_guest);
 #endif
+struct uv_info __bootdata_preserved(uv_info);
 #if IS_ENABLED(CONFIG_KVM)
 int prot_virt_host;
 EXPORT_SYMBOL(prot_virt_host);
-struct uv_info __bootdata_preserved(uv_info);
 EXPORT_SYMBOL(uv_info);
 static int __init prot_virt_setup(char *val)

arch/s390/kvm/interrupt.c+1−1

@@ -393,7 +393,7 @@ static unsigned long deliverable_irqs(struct kvm_vcpu *vcpu) · 392 unmodified lines
393	if (psw_mchk_disabled(vcpu))	393	if (psw_mchk_disabled(vcpu))
394	active_mask &= ~IRQ_PEND_MCHK_MASK;	394	active_mask &= ~IRQ_PEND_MCHK_MASK;
395	/* PV guest cpus can have a single interruption injected at a time. */	395	/* PV guest cpus can have a single interruption injected at a time. */
396	if (kvm_s390_pv_cpu_is_protected(vcpu) &&	396	if (kvm_s390_pv_cpu_get_handle(vcpu) &&
397	vcpu->arch.sie_block->iictl != IICTL_CODE_NONE)	397	vcpu->arch.sie_block->iictl != IICTL_CODE_NONE)
398	active_mask &= ~(IRQ_PEND_EXT_II_MASK \|	398	active_mask &= ~(IRQ_PEND_EXT_II_MASK \|
399	IRQ_PEND_IO_MASK \|	399	IRQ_PEND_IO_MASK \|

arch/s390/kvm/kvm-s390.c+3−0

@@ -1939,6 +1939,9 @@ static int gfn_to_memslot_approx(struct kvm_memslots *slots, gfn_t gfn) · 1938 unmodified lines
1939	start = slot + 1;	1939	start = slot + 1;
1940	}	1940	}
1941		1941
		1942	if (start >= slots->used_slots)
		1943	return slots->used_slots - 1;
		1944
1942	if (gfn >= memslots[start].base_gfn &&	1945	if (gfn >= memslots[start].base_gfn &&
1943	gfn < memslots[start].base_gfn + memslots[start].npages) {	1946	gfn < memslots[start].base_gfn + memslots[start].npages) {
1944	atomic_set(&slots->lru_slot, start);	1947	atomic_set(&slots->lru_slot, start);

arch/s390/lib/uaccess.c+4−0

 {
 	mm_segment_t old_fs;
 	unsigned long asce, cr;
+	unsigned long flags;
 	old_fs = current->thread.mm_segment;
 	if (old_fs & 1)
 		return old_fs;
+	/* protect against a concurrent page table upgrade */
+	local_irq_save(flags);
 	current->thread.mm_segment |= 1;
 	asce = S390_lowcore.kernel_asce;
 	if (likely(old_fs == USER_DS)) {
 		__ctl_load(asce, 7, 7);
 		set_cpu_flag(CIF_ASCE_SECONDARY);
 	}
+	local_irq_restore(flags);
 	return old_fs;
 }
 EXPORT_SYMBOL(enable_sacf_uaccess);

arch/s390/mm/pgalloc.c+14−2

@@ -70,8 +70,20 @@ static void __crst_table_upgrade(void *arg) · 69 unmodified lines
70	{	70	{
71	struct mm_struct *mm = arg;	71	struct mm_struct *mm = arg;
72		72
73	if (current->active_mm == mm)	73	/* we must change all active ASCEs to avoid the creation of new TLBs */
74	set_user_asce(mm);	74	if (current->active_mm == mm) {
		75	S390_lowcore.user_asce = mm->context.asce;
		76	if (current->thread.mm_segment == USER_DS) {
		77	__ctl_load(S390_lowcore.user_asce, 1, 1);
		78	/* Mark user-ASCE present in CR1 */
		79	clear_cpu_flag(CIF_ASCE_PRIMARY);
		80	}
		81	if (current->thread.mm_segment == USER_DS_SACF) {
		82	__ctl_load(S390_lowcore.user_asce, 7, 7);
		83	/* enable_sacf_uaccess does all or nothing */
		84	WARN_ON(!test_cpu_flag(CIF_ASCE_SECONDARY));
		85	}
		86	}
75	__tlb_flush_local();	87	__tlb_flush_local();
76	}	88	}
77		89

arch/s390/pci/pci_irq.c+3−2

 	.name = "PCI-MSI",
 	.irq_unmask = pci_msi_unmask_irq,
 	.irq_mask = pci_msi_mask_irq,
-	.irq_set_affinity = zpci_set_irq_affinity,
 };
 static void zpci_handle_cpu_local_irq(bool rescan)
 		rc = -EIO;
 		if (hwirq - bit >= msi_vecs)
 			break;
-		irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE, msi->affinity);
+		irq = __irq_alloc_descs(-1, 0, 1, 0, THIS_MODULE,
+				(irq_delivery == DIRECTED) ?
+				msi->affinity : NULL);
 		if (irq < 0)
 			return -ENOMEM;
 		rc = irq_set_msi_desc(irq, msi);

arch/sh/include/asm/module.h+0−28

@@ -11,32 +11,4 @@ struct mod_arch_specific { · 10 unmodified lines
11	};	11	};
12	#endif	12	#endif
13		13
14	#ifdef CONFIG_CPU_LITTLE_ENDIAN
15	# ifdef CONFIG_CPU_SH2
16	# define MODULE_PROC_FAMILY "SH2LE "
17	# elif defined CONFIG_CPU_SH3
18	# define MODULE_PROC_FAMILY "SH3LE "
19	# elif defined CONFIG_CPU_SH4
20	# define MODULE_PROC_FAMILY "SH4LE "
21	# elif defined CONFIG_CPU_SH5
22	# define MODULE_PROC_FAMILY "SH5LE "
23	# else
24	# error unknown processor family
25	# endif
26	#else
27	# ifdef CONFIG_CPU_SH2
28	# define MODULE_PROC_FAMILY "SH2BE "
29	# elif defined CONFIG_CPU_SH3
30	# define MODULE_PROC_FAMILY "SH3BE "
31	# elif defined CONFIG_CPU_SH4
32	# define MODULE_PROC_FAMILY "SH4BE "
33	# elif defined CONFIG_CPU_SH5
34	# define MODULE_PROC_FAMILY "SH5BE "
35	# else
36	# error unknown processor family
37	# endif
38	#endif
39
40	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
41
42	#endif /* _ASM_SH_MODULE_H */	14	#endif /* _ASM_SH_MODULE_H */

arch/sh/include/asm/vermagic.h+34−0

@@ -0,0 +1,34 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#ifdef CONFIG_CPU_LITTLE_ENDIAN
	7	# ifdef CONFIG_CPU_SH2
	8	# define MODULE_PROC_FAMILY "SH2LE "
	9	# elif defined CONFIG_CPU_SH3
	10	# define MODULE_PROC_FAMILY "SH3LE "
	11	# elif defined CONFIG_CPU_SH4
	12	# define MODULE_PROC_FAMILY "SH4LE "
	13	# elif defined CONFIG_CPU_SH5
	14	# define MODULE_PROC_FAMILY "SH5LE "
	15	# else
	16	# error unknown processor family
	17	# endif
	18	#else
	19	# ifdef CONFIG_CPU_SH2
	20	# define MODULE_PROC_FAMILY "SH2BE "
	21	# elif defined CONFIG_CPU_SH3
	22	# define MODULE_PROC_FAMILY "SH3BE "
	23	# elif defined CONFIG_CPU_SH4
	24	# define MODULE_PROC_FAMILY "SH4BE "
	25	# elif defined CONFIG_CPU_SH5
	26	# define MODULE_PROC_FAMILY "SH5BE "
	27	# else
	28	# error unknown processor family
	29	# endif
	30	#endif
	31
	32	#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
	33
	34	#endif /* _ASM_VERMAGIC_H */

arch/sh/mm/init.c+1−1

@@ -412,7 +412,7 @@ int arch_add_memory(int nid, u64 start, u64 size, · 411 unmodified lines
412	unsigned long nr_pages = size >> PAGE_SHIFT;	412	unsigned long nr_pages = size >> PAGE_SHIFT;
413	int ret;	413	int ret;
414		414
415	if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot)	415	if (WARN_ON_ONCE(params->pgprot.pgprot != PAGE_KERNEL.pgprot))
416	return -EINVAL;	416	return -EINVAL;
417		417
418	/* We only have ZONE_NORMAL, so this is easy.. */	418	/* We only have ZONE_NORMAL, so this is easy.. */

arch/um/Makefile+1−0

@@ -140,6 +140,7 @@ export CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE) · 139 unmodified lines
140	# When cleaning we don't include .config, so we don't include	140	# When cleaning we don't include .config, so we don't include
141	# TT or skas makefiles and don't clean skas_ptregs.h.	141	# TT or skas makefiles and don't clean skas_ptregs.h.
142	CLEAN_FILES += linux x.i gmon.out	142	CLEAN_FILES += linux x.i gmon.out
		143	MRPROPER_DIRS += arch/$(SUBARCH)/include/generated
143		144
144	archclean:	145	archclean:
145	@find . \( -name '.bb' -o -name '.bbg' -o -name '*.da' \	146	@find . \( -name '.bb' -o -name '.bbg' -o -name '*.da' \

arch/x86/Kconfig+1−1

@@ -149,7 +149,7 @@ config X86 · 148 unmodified lines
149	select HAVE_ARCH_TRACEHOOK	149	select HAVE_ARCH_TRACEHOOK
150	select HAVE_ARCH_TRANSPARENT_HUGEPAGE	150	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
151	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64	151	select HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD if X86_64
152	select HAVE_ARCH_USERFAULTFD_WP if USERFAULTFD	152	select HAVE_ARCH_USERFAULTFD_WP if X86_64 && USERFAULTFD
153	select HAVE_ARCH_VMAP_STACK if X86_64	153	select HAVE_ARCH_VMAP_STACK if X86_64
154	select HAVE_ARCH_WITHIN_STACK_FRAMES	154	select HAVE_ARCH_WITHIN_STACK_FRAMES
155	select HAVE_ASM_MODVERSIONS	155	select HAVE_ASM_MODVERSIONS

arch/x86/events/intel/cstate.c+1−0

@@ -643,6 +643,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 642 unmodified lines
643	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),	643	X86_MATCH_INTEL_FAM6_MODEL(ATOM_GOLDMONT_PLUS, &glm_cstates),
644	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),	644	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, &glm_cstates),
645	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),	645	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, &glm_cstates),
		646	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, &glm_cstates),
646		647
647	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),	648	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, &icl_cstates),
648	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),	649	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE, &icl_cstates),

arch/x86/hyperv/hv_init.c+15−3

 #include <linux/mm.h>
 #include <linux/hyperv.h>
 #include <linux/slab.h>
+#include <linux/kernel.h>
 #include <linux/cpuhotplug.h>
 #include <linux/syscore_ops.h>
 #include <clocksource/hyperv_timer.h>
 	struct page *pg;
 	input_arg = (void **)this_cpu_ptr(hyperv_pcpu_input_arg);
-	pg = alloc_page(GFP_KERNEL);
+	/* hv_cpu_init() can be called with IRQs disabled from hv_resume() */
+	pg = alloc_page(irqs_disabled() ? GFP_ATOMIC : GFP_KERNEL);
 	if (unlikely(!pg))
 		return -ENOMEM;
 	*input_arg = page_address(pg);
 static int hv_suspend(void)
 {
 	union hv_x64_msr_hypercall_contents hypercall_msr;
+	int ret;
 	/*
 	 * Reset the hypercall page as it is going to be invalidated
 	hypercall_msr.enable = 0;
 	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
-	return 0;
+	ret = hv_cpu_die(0);
+	return ret;
 }
 static void hv_resume(void)
 {
 	union hv_x64_msr_hypercall_contents hypercall_msr;
+	int ret;
+	ret = hv_cpu_init(0);
+	WARN_ON(ret);
 	/* Re-enable the hypercall page */
 	rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
 	hv_hypercall_pg_saved = NULL;
 }
+/* Note: when the ops are called, only CPU0 is online and IRQs are disabled. */
 static struct syscore_ops hv_syscore_ops = {
 	.suspend	= hv_suspend,
 	.resume		= hv_resume,
 }
 EXPORT_SYMBOL_GPL(hyperv_cleanup);
-void hyperv_report_panic(struct pt_regs *regs, long err)
+void hyperv_report_panic(struct pt_regs *regs, long err, bool in_die)
 {
 	static bool panic_reported;
 	u64 guest_id;
+	if (in_die && !panic_on_oops)
+		return;
 	/*
 	 * We prefer to report panic on 'die' chain as we have proper
 	 * registers to report, but if we miss it (e.g. on BUG()) we need

arch/x86/include/asm/efi.h+2−0

 extern pgd_t * __init efi_uv1_memmap_phys_prolog(void);
 extern void __init efi_uv1_memmap_phys_epilog(pgd_t *save_pgd);
+/* kexec external ABI */
 struct efi_setup_data {
 	u64 fw_vendor;
+	u64 __unused;
 	u64 tables;
 	u64 smbios;
 	u64 reserved[8];

arch/x86/include/asm/microcode_amd.h+1−1

@@ -41,7 +41,7 @@ struct microcode_amd { · 40 unmodified lines
41	unsigned int mpb[0];	41	unsigned int mpb[0];
42	};	42	};
43		43
44	#define PATCH_MAX_SIZE PAGE_SIZE	44	#define PATCH_MAX_SIZE (3 * PAGE_SIZE)
45		45
46	#ifdef CONFIG_MICROCODE_AMD	46	#ifdef CONFIG_MICROCODE_AMD
47	extern void __init load_ucode_amd_bsp(unsigned int family);	47	extern void __init load_ucode_amd_bsp(unsigned int family);

arch/x86/include/asm/module.h+0−60

@@ -13,64 +13,4 @@ struct mod_arch_specific { · 12 unmodified lines
13	#endif	13	#endif
14	};	14	};
15		15
16	#ifdef CONFIG_X86_64
17	/* X86_64 does not define MODULE_PROC_FAMILY */
18	#elif defined CONFIG_M486SX
19	#define MODULE_PROC_FAMILY "486SX "
20	#elif defined CONFIG_M486
21	#define MODULE_PROC_FAMILY "486 "
22	#elif defined CONFIG_M586
23	#define MODULE_PROC_FAMILY "586 "
24	#elif defined CONFIG_M586TSC
25	#define MODULE_PROC_FAMILY "586TSC "
26	#elif defined CONFIG_M586MMX
27	#define MODULE_PROC_FAMILY "586MMX "
28	#elif defined CONFIG_MCORE2
29	#define MODULE_PROC_FAMILY "CORE2 "
30	#elif defined CONFIG_MATOM
31	#define MODULE_PROC_FAMILY "ATOM "
32	#elif defined CONFIG_M686
33	#define MODULE_PROC_FAMILY "686 "
34	#elif defined CONFIG_MPENTIUMII
35	#define MODULE_PROC_FAMILY "PENTIUMII "
36	#elif defined CONFIG_MPENTIUMIII
37	#define MODULE_PROC_FAMILY "PENTIUMIII "
38	#elif defined CONFIG_MPENTIUMM
39	#define MODULE_PROC_FAMILY "PENTIUMM "
40	#elif defined CONFIG_MPENTIUM4
41	#define MODULE_PROC_FAMILY "PENTIUM4 "
42	#elif defined CONFIG_MK6
43	#define MODULE_PROC_FAMILY "K6 "
44	#elif defined CONFIG_MK7
45	#define MODULE_PROC_FAMILY "K7 "
46	#elif defined CONFIG_MK8
47	#define MODULE_PROC_FAMILY "K8 "
48	#elif defined CONFIG_MELAN
49	#define MODULE_PROC_FAMILY "ELAN "
50	#elif defined CONFIG_MCRUSOE
51	#define MODULE_PROC_FAMILY "CRUSOE "
52	#elif defined CONFIG_MEFFICEON
53	#define MODULE_PROC_FAMILY "EFFICEON "
54	#elif defined CONFIG_MWINCHIPC6
55	#define MODULE_PROC_FAMILY "WINCHIPC6 "
56	#elif defined CONFIG_MWINCHIP3D
57	#define MODULE_PROC_FAMILY "WINCHIP3D "
58	#elif defined CONFIG_MCYRIXIII
59	#define MODULE_PROC_FAMILY "CYRIXIII "
60	#elif defined CONFIG_MVIAC3_2
61	#define MODULE_PROC_FAMILY "VIAC3-2 "
62	#elif defined CONFIG_MVIAC7
63	#define MODULE_PROC_FAMILY "VIAC7 "
64	#elif defined CONFIG_MGEODEGX1
65	#define MODULE_PROC_FAMILY "GEODEGX1 "
66	#elif defined CONFIG_MGEODE_LX
67	#define MODULE_PROC_FAMILY "GEODE "
68	#else
69	#error unknown processor family
70	#endif
71
72	#ifdef CONFIG_X86_32
73	# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
74	#endif
75
76	#endif /* _ASM_X86_MODULE_H */	16	#endif /* _ASM_X86_MODULE_H */

arch/x86/include/asm/mshyperv.h+2−0

@@ -35,6 +35,8 @@ typedef int (*hyperv_fill_flush_list_func)( · 34 unmodified lines
35	rdmsrl(HV_X64_MSR_SINT0 + int_num, val)	35	rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
36	#define hv_set_synint_state(int_num, val) \	36	#define hv_set_synint_state(int_num, val) \
37	wrmsrl(HV_X64_MSR_SINT0 + int_num, val)	37	wrmsrl(HV_X64_MSR_SINT0 + int_num, val)
		38	#define hv_recommend_using_aeoi() \
		39	(!(ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED))
38		40
39	#define hv_get_crash_ctl(val) \	41	#define hv_get_crash_ctl(val) \
40	rdmsrl(HV_X64_MSR_CRASH_CTL, val)	42	rdmsrl(HV_X64_MSR_CRASH_CTL, val)

arch/x86/include/asm/nospec-branch.h+0−21

@@ -237,27 +237,6 @@ enum ssb_mitigation { · 236 unmodified lines
237	extern char __indirect_thunk_start[];	237	extern char __indirect_thunk_start[];
238	extern char __indirect_thunk_end[];	238	extern char __indirect_thunk_end[];
239		239
240	/*
241	* On VMEXIT we must ensure that no RSB predictions learned in the guest
242	* can be followed in the host, by overwriting the RSB completely. Both
243	* retpoline and IBRS mitigations for Spectre v2 need this; only on future
244	* CPUs with IBRS_ALL might it be avoided.
245	*/
246	static inline void vmexit_fill_RSB(void)
247	{
248	#ifdef CONFIG_RETPOLINE
249	unsigned long loops;
250
251	asm volatile (ANNOTATE_NOSPEC_ALTERNATIVE
252	ALTERNATIVE("jmp 910f",
253	__stringify(__FILL_RETURN_BUFFER(%0, RSB_CLEAR_LOOPS, %1)),
254	X86_FEATURE_RETPOLINE)
255	"910:"
256	: "=r" (loops), ASM_CALL_CONSTRAINT
257	: : "memory" );
258	#endif
259	}
260
261	static __always_inline	240	static __always_inline
262	void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)	241	void alternative_msr_write(unsigned int msr, u64 val, unsigned int feature)
263	{	242	{

arch/x86/include/asm/vermagic.h+68−0

@@ -0,0 +1,68 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2
	3	#ifndef _ASM_VERMAGIC_H
	4	#define _ASM_VERMAGIC_H
	5
	6	#ifdef CONFIG_X86_64
	7	/* X86_64 does not define MODULE_PROC_FAMILY */
	8	#elif defined CONFIG_M486SX
	9	#define MODULE_PROC_FAMILY "486SX "
	10	#elif defined CONFIG_M486
	11	#define MODULE_PROC_FAMILY "486 "
	12	#elif defined CONFIG_M586
	13	#define MODULE_PROC_FAMILY "586 "
	14	#elif defined CONFIG_M586TSC
	15	#define MODULE_PROC_FAMILY "586TSC "
	16	#elif defined CONFIG_M586MMX
	17	#define MODULE_PROC_FAMILY "586MMX "
	18	#elif defined CONFIG_MCORE2
	19	#define MODULE_PROC_FAMILY "CORE2 "
	20	#elif defined CONFIG_MATOM
	21	#define MODULE_PROC_FAMILY "ATOM "
	22	#elif defined CONFIG_M686
	23	#define MODULE_PROC_FAMILY "686 "
	24	#elif defined CONFIG_MPENTIUMII
	25	#define MODULE_PROC_FAMILY "PENTIUMII "
	26	#elif defined CONFIG_MPENTIUMIII
	27	#define MODULE_PROC_FAMILY "PENTIUMIII "
	28	#elif defined CONFIG_MPENTIUMM
	29	#define MODULE_PROC_FAMILY "PENTIUMM "
	30	#elif defined CONFIG_MPENTIUM4
	31	#define MODULE_PROC_FAMILY "PENTIUM4 "
	32	#elif defined CONFIG_MK6
	33	#define MODULE_PROC_FAMILY "K6 "
	34	#elif defined CONFIG_MK7
	35	#define MODULE_PROC_FAMILY "K7 "
	36	#elif defined CONFIG_MK8
	37	#define MODULE_PROC_FAMILY "K8 "
	38	#elif defined CONFIG_MELAN
	39	#define MODULE_PROC_FAMILY "ELAN "
	40	#elif defined CONFIG_MCRUSOE
	41	#define MODULE_PROC_FAMILY "CRUSOE "
	42	#elif defined CONFIG_MEFFICEON
	43	#define MODULE_PROC_FAMILY "EFFICEON "
	44	#elif defined CONFIG_MWINCHIPC6
	45	#define MODULE_PROC_FAMILY "WINCHIPC6 "
	46	#elif defined CONFIG_MWINCHIP3D
	47	#define MODULE_PROC_FAMILY "WINCHIP3D "
	48	#elif defined CONFIG_MCYRIXIII
	49	#define MODULE_PROC_FAMILY "CYRIXIII "
	50	#elif defined CONFIG_MVIAC3_2
	51	#define MODULE_PROC_FAMILY "VIAC3-2 "
	52	#elif defined CONFIG_MVIAC7
	53	#define MODULE_PROC_FAMILY "VIAC7 "
	54	#elif defined CONFIG_MGEODEGX1
	55	#define MODULE_PROC_FAMILY "GEODEGX1 "
	56	#elif defined CONFIG_MGEODE_LX
	57	#define MODULE_PROC_FAMILY "GEODE "
	58	#else
	59	#error unknown processor family
	60	#endif
	61
	62	#ifdef CONFIG_X86_32
	63	# define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY
	64	#else
	65	# define MODULE_ARCH_VERMAGIC ""
	66	#endif
	67
	68	#endif /* _ASM_VERMAGIC_H */

arch/x86/kernel/cpu/intel.c+36−18

@@ -1119,35 +1119,53 @@ void switch_to_sld(unsigned long tifn) · 1118 unmodified lines
1119	sld_update_msr(!(tifn & _TIF_SLD));	1119	sld_update_msr(!(tifn & _TIF_SLD));
1120	}	1120	}
1121		1121
1122	#define SPLIT_LOCK_CPU(model) {X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY}
1123
1124	/*	1122	/*
1125	* The following processors have the split lock detection feature. But	1123	* Bits in the IA32_CORE_CAPABILITIES are not architectural, so they should
1126	* since they don't have the IA32_CORE_CAPABILITIES MSR, the feature cannot	1124	* only be trusted if it is confirmed that a CPU model implements a
1127	* be enumerated. Enable it by family and model matching on these	1125	* specific feature at a particular bit position.
1128	* processors.	1126	*
		1127	* The possible driver data field values:
		1128	*
		1129	* - 0: CPU models that are known to have the per-core split-lock detection
		1130	* feature even though they do not enumerate IA32_CORE_CAPABILITIES.
		1131	*
		1132	* - 1: CPU models which may enumerate IA32_CORE_CAPABILITIES and if so use
		1133	* bit 5 to enumerate the per-core split-lock detection feature.
1129	*/	1134	*/
1130	static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {	1135	static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = {
1131	SPLIT_LOCK_CPU(INTEL_FAM6_ICELAKE_X),	1136	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, 0),
1132	SPLIT_LOCK_CPU(INTEL_FAM6_ICELAKE_L),	1137	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_L, 0),
		1138	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT, 1),
		1139	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_D, 1),
		1140	X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1),
1133	{}	1141	{}
1134	};	1142	};
1135		1143
1136	void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c)	1144	void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c)
1137	{	1145	{
1138	u64 ia32_core_caps = 0;	1146	const struct x86_cpu_id *m;
		1147	u64 ia32_core_caps;
		1148
		1149	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
		1150	return;
1139		1151
1140	if (c->x86_vendor != X86_VENDOR_INTEL)	1152	m = x86_match_cpu(split_lock_cpu_ids);
		1153	if (!m)
1141	return;	1154	return;
1142	if (cpu_has(c, X86_FEATURE_CORE_CAPABILITIES)) {	1155
1143	/* Enumerate features reported in IA32_CORE_CAPABILITIES MSR. */	1156	switch (m->driver_data) {
		1157	case 0:
		1158	break;
		1159	case 1:
		1160	if (!cpu_has(c, X86_FEATURE_CORE_CAPABILITIES))
		1161	return;
1144	rdmsrl(MSR_IA32_CORE_CAPS, ia32_core_caps);	1162	rdmsrl(MSR_IA32_CORE_CAPS, ia32_core_caps);
1145	} else if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) {	1163	if (!(ia32_core_caps & MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT))
1146	/* Enumerate split lock detection by family and model. */	1164	return;
1147	if (x86_match_cpu(split_lock_cpu_ids))	1165	break;
1148	ia32_core_caps \|= MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT;	1166	default:
		1167	return;
1149	}	1168	}
1150		1169
1151	if (ia32_core_caps & MSR_IA32_CORE_CAPS_SPLIT_LOCK_DETECT)	1170	split_lock_setup();
1152	split_lock_setup();
1153	}	1171	}

arch/x86/kernel/cpu/mshyperv.c+12−2

 	ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES);
 	ms_hyperv.hints    = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO);
-	pr_info("Hyper-V: features 0x%x, hints 0x%x\n",
+	pr_info("Hyper-V: features 0x%x, hints 0x%x, misc 0x%x\n",
-		ms_hyperv.features, ms_hyperv.hints);
+		ms_hyperv.features, ms_hyperv.hints, ms_hyperv.misc_features);
 	ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS);
 	ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS);
 			cpuid_eax(HYPERV_CPUID_NESTED_FEATURES);
 	}
+	/*
+	 * Hyper-V expects to get crash register data or kmsg when
+	 * crash enlightment is available and system crashes. Set
+	 * crash_kexec_post_notifiers to be true to make sure that
+	 * calling crash enlightment interface before running kdump
+	 * kernel.
+	 */
+	if (ms_hyperv.misc_features & HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE)
+		crash_kexec_post_notifiers = true;
 #ifdef CONFIG_X86_LOCAL_APIC
 	if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS &&
 	    ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) {

arch/x86/kernel/cpu/resctrl/core.c+2−0

@@ -578,6 +578,8 @@ static void domain_add_cpu(int cpu, struct rdt_resource *r) · 577 unmodified lines
578	d->id = id;	578	d->id = id;
579	cpumask_set_cpu(cpu, &d->cpu_mask);	579	cpumask_set_cpu(cpu, &d->cpu_mask);
580		580
		581	rdt_domain_reconfigure_cdp(r);
		582
581	if (r->alloc_capable && domain_setup_ctrlval(r, d)) {	583	if (r->alloc_capable && domain_setup_ctrlval(r, d)) {
582	kfree(d);	584	kfree(d);
583	return;	585	return;

arch/x86/kernel/cpu/resctrl/internal.h+1−0

@@ -601,5 +601,6 @@ bool has_busy_rmid(struct rdt_resource r, struct rdt_domain d); · 600 unmodified lines
601	void __check_limbo(struct rdt_domain *d, bool force_free);	601	void __check_limbo(struct rdt_domain *d, bool force_free);
602	bool cbm_validate_intel(char buf, u32 data, struct rdt_resource *r);	602	bool cbm_validate_intel(char buf, u32 data, struct rdt_resource *r);
603	bool cbm_validate_amd(char buf, u32 data, struct rdt_resource *r);	603	bool cbm_validate_amd(char buf, u32 data, struct rdt_resource *r);
		604	void rdt_domain_reconfigure_cdp(struct rdt_resource *r);
604		605
605	#endif /* _ASM_X86_RESCTRL_INTERNAL_H */	606	#endif /* _ASM_X86_RESCTRL_INTERNAL_H */

arch/x86/kernel/cpu/resctrl/rdtgroup.c+15−1

@@ -1859,6 +1859,19 @@ static int set_cache_qos_cfg(int level, bool enable) · 1858 unmodified lines
1859	return 0;	1859	return 0;
1860	}	1860	}
1861		1861
		1862	/* Restore the qos cfg state when a domain comes online */
		1863	void rdt_domain_reconfigure_cdp(struct rdt_resource *r)
		1864	{
		1865	if (!r->alloc_capable)
		1866	return;
		1867
		1868	if (r == &rdt_resources_all[RDT_RESOURCE_L2DATA])
		1869	l2_qos_cfg_update(&r->alloc_enabled);
		1870
		1871	if (r == &rdt_resources_all[RDT_RESOURCE_L3DATA])
		1872	l3_qos_cfg_update(&r->alloc_enabled);
		1873	}
		1874
1862	/*	1875	/*
1863	* Enable or disable the MBA software controller	1876	* Enable or disable the MBA software controller
1864	* which helps user specify bandwidth in MBps.	1877	* which helps user specify bandwidth in MBps.
@@ -3072,7 +3085,8 @@ static int rdtgroup_rmdir(struct kernfs_node *kn) · 1207 unmodified lines
3072	* If the rdtgroup is a mon group and parent directory	3085	* If the rdtgroup is a mon group and parent directory
3073	* is a valid "mon_groups" directory, remove the mon group.	3086	* is a valid "mon_groups" directory, remove the mon group.
3074	*/	3087	*/
3075	if (rdtgrp->type == RDTCTRL_GROUP && parent_kn == rdtgroup_default.kn) {	3088	if (rdtgrp->type == RDTCTRL_GROUP && parent_kn == rdtgroup_default.kn &&
		3089	rdtgrp != &rdtgroup_default) {
3076	if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP \|\|	3090	if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP \|\|
3077	rdtgrp->mode == RDT_MODE_PSEUDO_LOCKED) {	3091	rdtgrp->mode == RDT_MODE_PSEUDO_LOCKED) {
3078	ret = rdtgroup_ctrl_remove(kn, rdtgrp);	3092	ret = rdtgroup_ctrl_remove(kn, rdtgrp);

arch/x86/kernel/smpboot.c+33−14

 	*((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
 }
-static void init_freq_invariance(void);
+static void init_freq_invariance(bool secondary);
 /*
  * Report back to the Boot Processor during boot time or to the caller processor
 	 */
 	set_cpu_sibling_map(raw_smp_processor_id());
-	init_freq_invariance();
+	init_freq_invariance(true);
 	/*
 	 * Get our bogomips.
 	set_sched_topology(x86_topology);
 	set_cpu_sibling_map(0);
-	init_freq_invariance();
+	init_freq_invariance(false);
 	smp_sanity_check();
 	switch (apic_intr_mode) {
 	int err, i;
 	u64 msr;
-	if (!x86_match_cpu(has_knl_turbo_ratio_limits))
-		return false;
 	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
 	if (err)
 		return false;
 static bool core_set_max_freq_ratio(u64 *base_freq, u64 *turbo_freq)
 {
+	u64 msr;
 	int err;
 	err = rdmsrl_safe(MSR_PLATFORM_INFO, base_freq);
 	if (err)
 		return false;
-	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, turbo_freq);
+	err = rdmsrl_safe(MSR_TURBO_RATIO_LIMIT, &msr);
 	if (err)
 		return false;
-	*base_freq = (*base_freq >> 8) & 0xFF;      /* max P state */
+	*base_freq = (*base_freq >> 8) & 0xFF;    /* max P state */
-	*turbo_freq = (*turbo_freq >> 24) & 0xFF;   /* 4C turbo    */
+	*turbo_freq = (msr >> 24) & 0xFF;         /* 4C turbo    */
+	/* The CPU may have less than 4 cores */
+	if (!*turbo_freq)
+		*turbo_freq = msr & 0xFF;         /* 1C turbo    */
 	return true;
 }
 	    skx_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
 		goto out;
-	if (knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
+	if (x86_match_cpu(has_knl_turbo_ratio_limits) &&
+	    knl_set_max_freq_ratio(&base_freq, &turbo_freq, 1))
 		goto out;
 	if (x86_match_cpu(has_skx_turbo_ratio_limits) &&
 	return false;
 out:
+	/*
+	 * Some hypervisors advertise X86_FEATURE_APERFMPERF
+	 * but then fill all MSR's with zeroes.
+	 */
+	if (!base_freq) {
+		pr_debug("Couldn't determine cpu base frequency, necessary for scale-invariant accounting.\n");
+		return false;
+	}
 	arch_turbo_freq_ratio = div_u64(turbo_freq * SCHED_CAPACITY_SCALE,
 					base_freq);
 	arch_set_max_freq_ratio(turbo_disabled());
 	return true;
 }
-static void init_counter_refs(void *arg)
+static void init_counter_refs(void)
 {
 	u64 aperf, mperf;
 	this_cpu_write(arch_prev_mperf, mperf);
 }
-static void init_freq_invariance(void)
+static void init_freq_invariance(bool secondary)
 {
 	bool ret = false;
-	if (smp_processor_id() != 0 || !boot_cpu_has(X86_FEATURE_APERFMPERF))
+	if (!boot_cpu_has(X86_FEATURE_APERFMPERF))
 		return;
+	if (secondary) {
+		if (static_branch_likely(&arch_scale_freq_key)) {
+			init_counter_refs();
+		}
+		return;
+	}
 	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
 		ret = intel_set_max_freq_ratio();
 	if (ret) {
-		on_each_cpu(init_counter_refs, NULL, 1);
+		init_counter_refs();
 		static_branch_enable(&arch_scale_freq_key);
 	} else {
 		pr_debug("Couldn't determine max cpu frequency, necessary for scale-invariant accounting.\n");

arch/x86/kernel/umip.c+1−1

@@ -81,7 +81,7 @@ · 80 unmodified lines
81	#define UMIP_INST_SLDT 3 /* 0F 00 /0 */	81	#define UMIP_INST_SLDT 3 /* 0F 00 /0 */
82	#define UMIP_INST_STR 4 /* 0F 00 /1 */	82	#define UMIP_INST_STR 4 /* 0F 00 /1 */
83		83
84	const char * const umip_insns[5] = {	84	static const char * const umip_insns[5] = {
85	[UMIP_INST_SGDT] = "SGDT",	85	[UMIP_INST_SGDT] = "SGDT",
86	[UMIP_INST_SIDT] = "SIDT",	86	[UMIP_INST_SIDT] = "SIDT",
87	[UMIP_INST_SMSW] = "SMSW",	87	[UMIP_INST_SMSW] = "SMSW",

arch/x86/kvm/Makefile+4−0

@@ -3,6 +3,10 @@ · 2 unmodified lines
3	ccflags-y += -Iarch/x86/kvm	3	ccflags-y += -Iarch/x86/kvm
4	ccflags-$(CONFIG_KVM_WERROR) += -Werror	4	ccflags-$(CONFIG_KVM_WERROR) += -Werror
5		5
		6	ifeq ($(CONFIG_FRAME_POINTER),y)
		7	OBJECT_FILES_NON_STANDARD_vmenter.o := y
		8	endif
		9
6	KVM := ../../../virt/kvm	10	KVM := ../../../virt/kvm
7		11
8	kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \	12	kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o \

arch/x86/kvm/svm/sev.c+5−1

 #include <linux/kernel.h>
 #include <linux/highmem.h>
 #include <linux/psp-sev.h>
+#include <linux/pagemap.h>
 #include <linux/swap.h>
 #include "x86.h"
 	/* Maximum number of encrypted guests supported simultaneously */
 	max_sev_asid = cpuid_ecx(0x8000001F);
-	if (!max_sev_asid)
+	if (!svm_sev_enabled())
 		return 1;
 	/* Minimum ASID value that should be used for SEV guest */
 void sev_hardware_teardown(void)
 {
+	if (!svm_sev_enabled())
+		return;
 	bitmap_free(sev_asid_bitmap);
 	bitmap_free(sev_reclaim_asid_bitmap);

arch/x86/kvm/svm/svm.c+1−9

 	svm_complete_interrupts(svm);
 }
-bool __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs);
+void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs);
 static void svm_vcpu_run(struct kvm_vcpu *vcpu)
 {
 	 */
 	x86_spec_ctrl_set_guest(svm->spec_ctrl, svm->virt_spec_ctrl);
-	local_irq_enable();
 	__svm_vcpu_run(svm->vmcb_pa, (unsigned long *)&svm->vcpu.arch.regs);
-	/* Eliminate branch target predictions from guest mode */
-	vmexit_fill_RSB();
 #ifdef CONFIG_X86_64
 	wrmsrl(MSR_GS_BASE, svm->host.gs_base);
 #else
 	reload_tss(vcpu);
-	local_irq_disable();
 	x86_spec_ctrl_restore_host(svm->spec_ctrl, svm->virt_spec_ctrl);
 	vcpu->arch.cr2 = svm->vmcb->save.cr2;
 	mark_all_clean(svm->vmcb);
 }
-STACK_FRAME_NON_STANDARD(svm_vcpu_run);
 static void svm_load_mmu_pgd(struct kvm_vcpu *vcpu, unsigned long root)
 {

arch/x86/kvm/svm/vmenter.S+9−1

 #include <asm/asm.h>
 #include <asm/bitsperlong.h>
 #include <asm/kvm_vcpu_regs.h>
+#include <asm/nospec-branch.h>
 #define WORD_SIZE (BITS_PER_LONG / 8)
  */
 SYM_FUNC_START(__svm_vcpu_run)
 	push %_ASM_BP
-	mov  %_ASM_SP, %_ASM_BP
 #ifdef CONFIG_X86_64
 	push %r15
 	push %r14
 	pop %_ASM_AX
 	/* Enter guest mode */
+	sti
 1:	vmload %_ASM_AX
 	jmp 3f
 2:	cmpb $0, kvm_rebooting
 	ud2
 	_ASM_EXTABLE(5b, 6b)
 7:
+	cli
+#ifdef CONFIG_RETPOLINE
+	/* IMPORTANT: Stuff the RSB immediately after VM-Exit, before RET! */
+	FILL_RETURN_BUFFER %_ASM_AX, RSB_CLEAR_LOOPS, X86_FEATURE_RETPOLINE
+#endif
 	/* "POP" @regs to RAX. */
 	pop %_ASM_AX

arch/x86/kvm/vmx/nested.c+19−2

@@ -5533,8 +5533,25 @@ static bool nested_vmx_exit_handled_vmcs_access(struct kvm_vcpu *vcpu, · 5532 unmodified lines
5533	return 1 & (b >> (field & 7));	5533	return 1 & (b >> (field & 7));
5534	}	5534	}
5535		5535
		5536	static bool nested_vmx_exit_handled_mtf(struct vmcs12 *vmcs12)
		5537	{
		5538	u32 entry_intr_info = vmcs12->vm_entry_intr_info_field;
		5539
		5540	if (nested_cpu_has_mtf(vmcs12))
		5541	return true;
		5542
		5543	/*
		5544	* An MTF VM-exit may be injected into the guest by setting the
		5545	* interruption-type to 7 (other event) and the vector field to 0. Such
		5546	* is the case regardless of the 'monitor trap flag' VM-execution
		5547	* control.
		5548	*/
		5549	return entry_intr_info == (INTR_INFO_VALID_MASK
		5550	\| INTR_TYPE_OTHER_EVENT);
		5551	}
		5552
5536	/*	5553	/*
5537	* Return 1 if we should exit from L2 to L1 to handle an exit, or 0 if we	5554	* Return true if we should exit from L2 to L1 to handle an exit, or false if we
5538	* should handle it ourselves in L0 (and then continue L2). Only call this	5555	* should handle it ourselves in L0 (and then continue L2). Only call this
5539	* when in is_guest_mode (L2).	5556	* when in is_guest_mode (L2).
5540	*/	5557	*/
@@ -5633,7 +5650,7 @@ bool nested_vmx_exit_reflected(struct kvm_vcpu *vcpu, u32 exit_reason) · 92 unmodified lines
5633	case EXIT_REASON_MWAIT_INSTRUCTION:	5650	case EXIT_REASON_MWAIT_INSTRUCTION:
5634	return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);	5651	return nested_cpu_has(vmcs12, CPU_BASED_MWAIT_EXITING);
5635	case EXIT_REASON_MONITOR_TRAP_FLAG:	5652	case EXIT_REASON_MONITOR_TRAP_FLAG:
5636	return nested_cpu_has_mtf(vmcs12);	5653	return nested_vmx_exit_handled_mtf(vmcs12);
5637	case EXIT_REASON_MONITOR_INSTRUCTION:	5654	case EXIT_REASON_MONITOR_INSTRUCTION:
5638	return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);	5655	return nested_cpu_has(vmcs12, CPU_BASED_MONITOR_EXITING);
5639	case EXIT_REASON_PAUSE_INSTRUCTION:	5656	case EXIT_REASON_PAUSE_INSTRUCTION:

arch/x86/kvm/vmx/vmx.c+1−1

@@ -4572,7 +4572,7 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, · 4571 unmodified lines
4572	*/	4572	*/
4573	static void kvm_machine_check(void)	4573	static void kvm_machine_check(void)
4574	{	4574	{
4575	#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)	4575	#if defined(CONFIG_X86_MCE)
4576	struct pt_regs regs = {	4576	struct pt_regs regs = {
4577	.cs = 3, /* Fake ring 3 no matter what the guest ran on */	4577	.cs = 3, /* Fake ring 3 no matter what the guest ran on */
4578	.flags = X86_EFLAGS_IF,	4578	.flags = X86_EFLAGS_IF,

arch/x86/kvm/x86.c+19−2

 	case MSR_IA32_PERF_CTL:
 	case MSR_AMD64_DC_CFG:
 	case MSR_F15H_EX_CFG:
+	/*
+	 * Intel Sandy Bridge CPUs must support the RAPL (running average power
+	 * limit) MSRs. Just return 0, as we do not want to expose the host
+	 * data here. Do not conditionalize this on CPUID, as KVM does not do
+	 * so for existing CPU-specific MSRs.
+	 */
+	case MSR_RAPL_POWER_UNIT:
+	case MSR_PP0_ENERGY_STATUS:	/* Power plane 0 (core) */
+	case MSR_PP1_ENERGY_STATUS:	/* Power plane 1 (graphics uncore) */
+	case MSR_PKG_ENERGY_STATUS:	/* Total package */
+	case MSR_DRAM_ENERGY_STATUS:	/* DRAM controller */
 		msr_info->data = 0;
 		break;
 	case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
 		r = -EFAULT;
 		if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
 			goto out;
+		mutex_lock(&kvm->lock);
 		r = -ENXIO;
 		if (!kvm->arch.vpit)
-			goto out;
+			goto set_pit_out;
 		r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
+set_pit_out:
+		mutex_unlock(&kvm->lock);
 		break;
 	}
 	case KVM_GET_PIT2: {
 		r = -EFAULT;
 		if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
 			goto out;
+		mutex_lock(&kvm->lock);
 		r = -ENXIO;
 		if (!kvm->arch.vpit)
-			goto out;
+			goto set_pit2_out;
 		r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
+set_pit2_out:
+		mutex_unlock(&kvm->lock);
 		break;
 	}
 	case KVM_REINJECT_CONTROL: {

arch/x86/net/bpf_jit_comp.c+15−3

 			     BIT(BPF_REG_AX));
 }
+/*
+ * is_ereg_8l() == true if BPF register 'reg' is mapped to access x86-64
+ * lower 8-bit registers dil,sil,bpl,spl,r8b..r15b, which need extra byte
+ * of encoding. al,cl,dl,bl have simpler encoding.
+ */
+static bool is_ereg_8l(u32 reg)
+{
+	return is_ereg(reg) ||
+	    (1 << reg) & (BIT(BPF_REG_1) |
+			  BIT(BPF_REG_2) |
+			  BIT(BPF_REG_FP));
+}
 static bool is_axreg(u32 reg)
 {
 	return reg == BPF_REG_0;
 	switch (size) {
 	case BPF_B:
 		/* Emit 'mov byte ptr [rax + off], al' */
-		if (is_ereg(dst_reg) || is_ereg(src_reg) ||
+		if (is_ereg(dst_reg) || is_ereg_8l(src_reg))
-		    /* We have to add extra byte for x86 SIL, DIL regs */
+			/* Add extra byte for eregs or SIL,DIL,BPL in src_reg */
-		    src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
 			EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
 		else
 			EMIT1(0x88);

arch/x86/net/bpf_jit_comp32.c+22−6

 			case BPF_B:
 			case BPF_H:
 			case BPF_W:
-				if (!bpf_prog->aux->verifier_zext)
+				if (bpf_prog->aux->verifier_zext)
 					break;
 				if (dstk) {
 					EMIT3(0xC7, add_1reg(0x40, IA32_EBP),
 					      STACK_VAR(dst_hi));
 					EMIT(0x0, 4);
 				} else {
-					EMIT3(0xC7, add_1reg(0xC0, dst_hi), 0);
+					/* xor dst_hi,dst_hi */
+					EMIT2(0x33,
+					      add_2reg(0xC0, dst_hi, dst_hi));
 				}
 				break;
 			case BPF_DW:
 		case BPF_JMP | BPF_JSET | BPF_X:
 		case BPF_JMP32 | BPF_JSET | BPF_X: {
 			bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP;
-			u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
+			u8 dreg_lo = IA32_EAX;
-			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
+			u8 dreg_hi = IA32_EDX;
 			u8 sreg_lo = sstk ? IA32_ECX : src_lo;
 			u8 sreg_hi = sstk ? IA32_EBX : src_hi;
 					      add_2reg(0x40, IA32_EBP,
 						       IA32_EDX),
 					      STACK_VAR(dst_hi));
+			} else {
+				/* mov dreg_lo,dst_lo */
+				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
+				if (is_jmp64)
+					/* mov dreg_hi,dst_hi */
+					EMIT2(0x89,
+					      add_2reg(0xC0, dreg_hi, dst_hi));
 			}
 			if (sstk) {
 		case BPF_JMP | BPF_JSET | BPF_K:
 		case BPF_JMP32 | BPF_JSET | BPF_K: {
 			bool is_jmp64 = BPF_CLASS(insn->code) == BPF_JMP;
-			u8 dreg_lo = dstk ? IA32_EAX : dst_lo;
+			u8 dreg_lo = IA32_EAX;
-			u8 dreg_hi = dstk ? IA32_EDX : dst_hi;
+			u8 dreg_hi = IA32_EDX;
 			u8 sreg_lo = IA32_ECX;
 			u8 sreg_hi = IA32_EBX;
 			u32 hi;
 					      add_2reg(0x40, IA32_EBP,
 						       IA32_EDX),
 					      STACK_VAR(dst_hi));
+			} else {
+				/* mov dreg_lo,dst_lo */
+				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));
+				if (is_jmp64)
+					/* mov dreg_hi,dst_hi */
+					EMIT2(0x89,
+					      add_2reg(0xC0, dreg_hi, dst_hi));
 			}
 			/* mov ecx,imm32 */

arch/x86/platform/efi/efi_64.c+12−4

 int __init efi_setup_page_tables(unsigned long pa_memmap, unsigned num_pages)
 {
-	unsigned long pfn, text, pf;
+	unsigned long pfn, text, pf, rodata;
 	struct page *page;
 	unsigned npages;
 	pgd_t *pgd = efi_mm.pgd;
 	efi_scratch.phys_stack = page_to_phys(page + 1); /* stack grows down */
-	npages = (__end_rodata_aligned - _text) >> PAGE_SHIFT;
+	npages = (_etext - _text) >> PAGE_SHIFT;
 	text = __pa(_text);
 	pfn = text >> PAGE_SHIFT;
 		return 1;
 	}
+	npages = (__end_rodata - __start_rodata) >> PAGE_SHIFT;
+	rodata = __pa(__start_rodata);
+	pfn = rodata >> PAGE_SHIFT;
+	if (kernel_map_pages_in_pgd(pgd, pfn, rodata, npages, pf)) {
+		pr_err("Failed to map kernel rodata 1:1\n");
+		return 1;
+	}
 	return 0;
 }
 	phys_vendor = virt_to_phys_or_null(vnd);
 	phys_data = virt_to_phys_or_null_size(data, data_size);
-	if (!phys_name || !phys_data)
+	if (!phys_name || (data && !phys_data))
 		status = EFI_INVALID_PARAMETER;
 	else
 		status = efi_thunk(set_variable, phys_name, phys_vendor,
 	phys_vendor = virt_to_phys_or_null(vnd);
 	phys_data = virt_to_phys_or_null_size(data, data_size);
-	if (!phys_name || !phys_data)
+	if (!phys_name || (data && !phys_data))
 		status = EFI_INVALID_PARAMETER;
 	else
 		status = efi_thunk(set_variable, phys_name, phys_vendor,

arch/xtensa/include/asm/vermagic.hrenamed from arch/xtensa/include/asm/module.h+6−9

 /*
- * include/asm-xtensa/module.h
- *
- * This file contains the module code specific to the Xtensa architecture.
- *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  * Copyright (C) 2001 - 2005 Tensilica Inc.
  */
-#ifndef _XTENSA_MODULE_H
+#ifndef _ASM_VERMAGIC_H
-#define _XTENSA_MODULE_H
+#define _ASM_VERMAGIC_H
-#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " "
+#include <linux/stringify.h>
+#include <variant/core.h>
-#include <asm-generic/module.h>
+#define MODULE_ARCH_VERMAGIC "xtensa-" __stringify(XCHAL_CORE_ID) " "
-#endif	/* _XTENSA_MODULE_H */
+#endif	/* _ASM_VERMAGIC_H */

block/blk-iocost.c+2−2

@@ -1591,7 +1591,7 @@ skip_surplus_transfers: · 1590 unmodified lines
1591	vrate_min, vrate_max);	1591	vrate_min, vrate_max);
1592	}	1592	}
1593		1593
1594	trace_iocost_ioc_vrate_adj(ioc, vrate, &missed_ppm, rq_wait_pct,	1594	trace_iocost_ioc_vrate_adj(ioc, vrate, missed_ppm, rq_wait_pct,
1595	nr_lagging, nr_shortages,	1595	nr_lagging, nr_shortages,
1596	nr_surpluses);	1596	nr_surpluses);
1597		1597
@@ -1600,7 +1600,7 @@ skip_surplus_transfers: · 2 unmodified lines
1600	ioc->period_us * vrate * INUSE_MARGIN_PCT, 100);	1600	ioc->period_us * vrate * INUSE_MARGIN_PCT, 100);
1601	} else if (ioc->busy_level != prev_busy_level \|\| nr_lagging) {	1601	} else if (ioc->busy_level != prev_busy_level \|\| nr_lagging) {
1602	trace_iocost_ioc_vrate_adj(ioc, atomic64_read(&ioc->vtime_rate),	1602	trace_iocost_ioc_vrate_adj(ioc, atomic64_read(&ioc->vtime_rate),
1603	&missed_ppm, rq_wait_pct, nr_lagging,	1603	missed_ppm, rq_wait_pct, nr_lagging,
1604	nr_shortages, nr_surpluses);	1604	nr_shortages, nr_surpluses);
1605	}	1605	}
1606		1606

block/blk-mq.c+3−1

 		rq = list_first_entry(list, struct request, queuelist);
 		hctx = rq->mq_hctx;
-		if (!got_budget && !blk_mq_get_dispatch_budget(hctx))
+		if (!got_budget && !blk_mq_get_dispatch_budget(hctx)) {
+			blk_mq_put_driver_tag(rq);
 			break;
+		}
 		if (!blk_mq_get_driver_tag(rq)) {
 			/*

block/blk-wbt.c+2−2

@@ -313,7 +313,7 @@ static void scale_up(struct rq_wb *rwb) · 312 unmodified lines
313	calc_wb_limits(rwb);	313	calc_wb_limits(rwb);
314	rwb->unknown_cnt = 0;	314	rwb->unknown_cnt = 0;
315	rwb_wake_all(rwb);	315	rwb_wake_all(rwb);
316	rwb_trace_step(rwb, "scale up");	316	rwb_trace_step(rwb, tracepoint_string("scale up"));
317	}	317	}
318		318
319	static void scale_down(struct rq_wb *rwb, bool hard_throttle)	319	static void scale_down(struct rq_wb *rwb, bool hard_throttle)
@@ -322,7 +322,7 @@ static void scale_down(struct rq_wb *rwb, bool hard_throttle) · 2 unmodified lines
322	return;	322	return;
323	calc_wb_limits(rwb);	323	calc_wb_limits(rwb);
324	rwb->unknown_cnt = 0;	324	rwb->unknown_cnt = 0;
325	rwb_trace_step(rwb, "scale down");	325	rwb_trace_step(rwb, tracepoint_string("scale down"));
326	}	326	}
327		327
328	static void rwb_arm_timer(struct rq_wb *rwb)	328	static void rwb_arm_timer(struct rq_wb *rwb)

block/partitions/core.c+1−1

@@ -496,7 +496,7 @@ int blk_drop_partitions(struct gendisk disk, struct block_device bdev) · 495 unmodified lines
496		496
497	if (!disk_part_scan_enabled(disk))	497	if (!disk_part_scan_enabled(disk))
498	return 0;	498	return 0;
499	if (bdev->bd_part_count \|\| bdev->bd_openers > 1)	499	if (bdev->bd_part_count)
500	return -EBUSY;	500	return -EBUSY;
501	res = invalidate_partition(disk, 0);	501	res = invalidate_partition(disk, 0);
502	if (res)	502	if (res)

drivers/acpi/button.c+0−12

@@ -87,18 +87,6 @@ static const struct dmi_system_id dmi_lid_quirks[] = { · 86 unmodified lines
87	},	87	},
88	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_DISABLED,	88	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_DISABLED,
89	},	89	},
90	{
91	/*
92	* Asus T200TA, _LID keeps reporting closed after every second
93	* openening of the lid. Causing immediate re-suspend after
94	* opening every other open. Using LID_INIT_OPEN fixes this.
95	*/
96	.matches = {
97	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
98	DMI_MATCH(DMI_PRODUCT_NAME, "T200TA"),
99	},
100	.driver_data = (void *)(long)ACPI_BUTTON_LID_INIT_OPEN,
101	},
102	{	90	{
103	/* GP-electronic T701, _LID method points to a floating GPIO */	91	/* GP-electronic T701, _LID method points to a floating GPIO */
104	.matches = {	92	.matches = {

drivers/acpi/device_pm.c+2−2

@@ -273,13 +273,13 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 272 unmodified lines
273	end:	273	end:
274	if (result) {	274	if (result) {
275	dev_warn(&device->dev, "Failed to change power state to %s\n",	275	dev_warn(&device->dev, "Failed to change power state to %s\n",
276	acpi_power_state_string(state));	276	acpi_power_state_string(target_state));
277	} else {	277	} else {
278	device->power.state = target_state;	278	device->power.state = target_state;
279	ACPI_DEBUG_PRINT((ACPI_DB_INFO,	279	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
280	"Device [%s] transitioned to %s\n",	280	"Device [%s] transitioned to %s\n",
281	device->pnp.bus_id,	281	device->pnp.bus_id,
282	acpi_power_state_string(state)));	282	acpi_power_state_string(target_state)));
283	}	283	}
284		284
285	return result;	285	return result;

drivers/acpi/pci_link.c+2−2

@@ -322,10 +322,10 @@ static int acpi_pci_link_set(struct acpi_pci_link *link, int irq) · 321 unmodified lines
322	resource->res.data.extended_irq.polarity =	322	resource->res.data.extended_irq.polarity =
323	link->irq.polarity;	323	link->irq.polarity;
324	if (link->irq.triggering == ACPI_EDGE_SENSITIVE)	324	if (link->irq.triggering == ACPI_EDGE_SENSITIVE)
325	resource->res.data.irq.shareable =	325	resource->res.data.extended_irq.shareable =
326	ACPI_EXCLUSIVE;	326	ACPI_EXCLUSIVE;
327	else	327	else
328	resource->res.data.irq.shareable = ACPI_SHARED;	328	resource->res.data.extended_irq.shareable = ACPI_SHARED;
329	resource->res.data.extended_irq.interrupt_count = 1;	329	resource->res.data.extended_irq.interrupt_count = 1;
330	resource->res.data.extended_irq.interrupts[0] = irq;	330	resource->res.data.extended_irq.interrupts[0] = irq;
331	/* ignore resource_source, it's optional */	331	/* ignore resource_source, it's optional */

drivers/ata/ahci.c+1−0

@@ -410,6 +410,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 409 unmodified lines
410	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */	410	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
411	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */	411	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
412	{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */	412	{ PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */
		413	{ PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */
413	{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */	414	{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */
414		415
415	/* JMicron 360/1/3/5/6, match class to avoid IDE function */	416	/* JMicron 360/1/3/5/6, match class to avoid IDE function */

drivers/ata/sata_inic162x.c+1−1

@@ -145,7 +145,7 @@ enum { · 144 unmodified lines
145		145
146	/* PORT_IDMA_CTL bits */	146	/* PORT_IDMA_CTL bits */
147	IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */	147	IDMA_CTL_RST_ATA = (1 << 2), /* hardreset ATA bus */
148	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinary */	148	IDMA_CTL_RST_IDMA = (1 << 5), /* reset IDMA machinery */
149	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */	149	IDMA_CTL_GO = (1 << 7), /* IDMA mode go */
150	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */	150	IDMA_CTL_ATA_NIEN = (1 << 8), /* ATA IRQ disable */
151		151

drivers/base/firmware_loader/fallback_table.c+0−1

@@ -45,5 +45,4 @@ struct ctl_table firmware_config_table[] = { · 44 unmodified lines
45	},	45	},
46	{ }	46	{ }
47	};	47	};
48	EXPORT_SYMBOL_GPL(firmware_config_table);
49	#endif	48	#endif

drivers/base/power/main.c+1−1

@@ -730,7 +730,7 @@ static bool dpm_async_fn(struct device *dev, async_func_t func) · 729 unmodified lines
730		730
731	if (is_async(dev)) {	731	if (is_async(dev)) {
732	get_device(dev);	732	get_device(dev);
733	async_schedule(func, dev);	733	async_schedule_dev(func, dev);
734	return true;	734	return true;
735	}	735	}
736		736

drivers/block/null_blk.h+19−10

 	char disk_name[DISK_NAME_LEN];
 };
+blk_status_t null_process_cmd(struct nullb_cmd *cmd,
+			      enum req_opf op, sector_t sector,
+			      unsigned int nr_sectors);
 #ifdef CONFIG_BLK_DEV_ZONED
-int null_zone_init(struct nullb_device *dev);
+int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q);
-void null_zone_exit(struct nullb_device *dev);
+int null_register_zoned_dev(struct nullb *nullb);
+void null_free_zoned_dev(struct nullb_device *dev);
 int null_report_zones(struct gendisk *disk, sector_t sector,
 		      unsigned int nr_zones, report_zones_cb cb, void *data);
-blk_status_t null_handle_zoned(struct nullb_cmd *cmd,
+blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd,
-				enum req_opf op, sector_t sector,
+				    enum req_opf op, sector_t sector,
-				sector_t nr_sectors);
+				    sector_t nr_sectors);
 size_t null_zone_valid_read_len(struct nullb *nullb,
 				sector_t sector, unsigned int len);
 #else
-static inline int null_zone_init(struct nullb_device *dev)
+static inline int null_init_zoned_dev(struct nullb_device *dev,
+				      struct request_queue *q)
 {
 	pr_err("CONFIG_BLK_DEV_ZONED not enabled\n");
 	return -EINVAL;
 }
-static inline void null_zone_exit(struct nullb_device *dev) {}
+static inline int null_register_zoned_dev(struct nullb *nullb)
-static inline blk_status_t null_handle_zoned(struct nullb_cmd *cmd,
+{
-					     enum req_opf op, sector_t sector,
+	return -ENODEV;
-					     sector_t nr_sectors)
+}
+static inline void null_free_zoned_dev(struct nullb_device *dev) {}
+static inline blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd,
+			enum req_opf op, sector_t sector, sector_t nr_sectors)
 {
 	return BLK_STS_NOTSUPP;
 }

drivers/block/null_blk_main.c+31−31

@@ -580,7 +580,7 @@ static void null_free_dev(struct nullb_device *dev) · 579 unmodified lines
580	if (!dev)	580	if (!dev)
581	return;	581	return;
582		582
583	null_zone_exit(dev);	583	null_free_zoned_dev(dev);
584	badblocks_exit(&dev->badblocks);	584	badblocks_exit(&dev->badblocks);
585	kfree(dev);	585	kfree(dev);
586	}	586	}
@@ -1276,6 +1276,25 @@ static inline void nullb_complete_cmd(struct nullb_cmd *cmd) · 689 unmodified lines
1276	}	1276	}
1277	}	1277	}
1278		1278
		1279	blk_status_t null_process_cmd(struct nullb_cmd *cmd,
		1280	enum req_opf op, sector_t sector,
		1281	unsigned int nr_sectors)
		1282	{
		1283	struct nullb_device *dev = cmd->nq->dev;
		1284	blk_status_t ret;
		1285
		1286	if (dev->badblocks.shift != -1) {
		1287	ret = null_handle_badblocks(cmd, sector, nr_sectors);
		1288	if (ret != BLK_STS_OK)
		1289	return ret;
		1290	}
		1291
		1292	if (dev->memory_backed)
		1293	return null_handle_memory_backed(cmd, op);
		1294
		1295	return BLK_STS_OK;
		1296	}
		1297
1279	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,	1298	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,
1280	sector_t nr_sectors, enum req_opf op)	1299	sector_t nr_sectors, enum req_opf op)
1281	{	1300	{
@@ -1294,17 +1313,11 @@ static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector, · 12 unmodified lines
1294	goto out;	1313	goto out;
1295	}	1314	}
1296		1315
1297	if (nullb->dev->badblocks.shift != -1) {	1316	if (dev->zoned)
1298	cmd->error = null_handle_badblocks(cmd, sector, nr_sectors);	1317	cmd->error = null_process_zoned_cmd(cmd, op,
1299	if (cmd->error != BLK_STS_OK)	1318	sector, nr_sectors);
1300	goto out;	1319	else
1301	}	1320	cmd->error = null_process_cmd(cmd, op, sector, nr_sectors);
1302
1303	if (dev->memory_backed)
1304	cmd->error = null_handle_memory_backed(cmd, op);
1305
1306	if (!cmd->error && dev->zoned)
1307	cmd->error = null_handle_zoned(cmd, op, sector, nr_sectors);
1308		1321
1309	out:	1322	out:
1310	nullb_complete_cmd(cmd);	1323	nullb_complete_cmd(cmd);
@@ -1605,19 +1618,12 @@ static int null_gendisk_register(struct nullb *nullb) · 294 unmodified lines
1605	disk->queue = nullb->q;	1618	disk->queue = nullb->q;
1606	strncpy(disk->disk_name, nullb->disk_name, DISK_NAME_LEN);	1619	strncpy(disk->disk_name, nullb->disk_name, DISK_NAME_LEN);
1607		1620
1608	#ifdef CONFIG_BLK_DEV_ZONED
1609	if (nullb->dev->zoned) {	1621	if (nullb->dev->zoned) {
1610	if (queue_is_mq(nullb->q)) {	1622	int ret = null_register_zoned_dev(nullb);
1611	int ret = blk_revalidate_disk_zones(disk);	1623
1612	if (ret)	1624	if (ret)
1613	return ret;	1625	return ret;
1614	} else {
1615	blk_queue_chunk_sectors(nullb->q,
1616	nullb->dev->zone_size_sects);
1617	nullb->q->nr_zones = blkdev_nr_zones(disk);
1618	}
1619	}	1626	}
1620	#endif
1621		1627
1622	add_disk(disk);	1628	add_disk(disk);
1623	return 0;	1629	return 0;
@@ -1773,14 +1779,9 @@ static int null_add_dev(struct nullb_device *dev) · 149 unmodified lines
1773	}	1779	}
1774		1780
1775	if (dev->zoned) {	1781	if (dev->zoned) {
1776	rv = null_zone_init(dev);	1782	rv = null_init_zoned_dev(dev, nullb->q);
1777	if (rv)	1783	if (rv)
1778	goto out_cleanup_blk_queue;	1784	goto out_cleanup_blk_queue;
1779
1780	nullb->q->limits.zoned = BLK_ZONED_HM;
1781	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, nullb->q);
1782	blk_queue_required_elevator_features(nullb->q,
1783	ELEVATOR_F_ZBD_SEQ_WRITE);
1784	}	1785	}
1785		1786
1786	nullb->q->queuedata = nullb;	1787	nullb->q->queuedata = nullb;
@@ -1809,8 +1810,7 @@ static int null_add_dev(struct nullb_device *dev) · 22 unmodified lines
1809		1810
1810	return 0;	1811	return 0;
1811	out_cleanup_zone:	1812	out_cleanup_zone:
1812	if (dev->zoned)	1813	null_free_zoned_dev(dev);
1813	null_zone_exit(dev);
1814	out_cleanup_blk_queue:	1814	out_cleanup_blk_queue:
1815	blk_cleanup_queue(nullb->q);	1815	blk_cleanup_queue(nullb->q);
1816	out_cleanup_tags:	1816	out_cleanup_tags:

drivers/block/null_blk_zoned.c+33−12

 	return sect >> ilog2(dev->zone_size_sects);
 }
-int null_zone_init(struct nullb_device *dev)
+int null_init_zoned_dev(struct nullb_device *dev, struct request_queue *q)
 {
 	sector_t dev_size = (sector_t)dev->size * 1024 * 1024;
 	sector_t sector = 0;
 		sector += dev->zone_size_sects;
 	}
+	q->limits.zoned = BLK_ZONED_HM;
+	blk_queue_flag_set(QUEUE_FLAG_ZONE_RESETALL, q);
+	blk_queue_required_elevator_features(q, ELEVATOR_F_ZBD_SEQ_WRITE);
+	return 0;
+}
+int null_register_zoned_dev(struct nullb *nullb)
+{
+	struct request_queue *q = nullb->q;
+	if (queue_is_mq(q))
+		return blk_revalidate_disk_zones(nullb->disk);
+	blk_queue_chunk_sectors(q, nullb->dev->zone_size_sects);
+	q->nr_zones = blkdev_nr_zones(nullb->disk);
 	return 0;
 }
-void null_zone_exit(struct nullb_device *dev)
+void null_free_zoned_dev(struct nullb_device *dev)
 {
 	kvfree(dev->zones);
 }
 	struct nullb_device *dev = cmd->nq->dev;
 	unsigned int zno = null_zone_no(dev, sector);
 	struct blk_zone *zone = &dev->zones[zno];
+	blk_status_t ret;
+	trace_nullb_zone_op(cmd, zno, zone->cond);
+	if (zone->type == BLK_ZONE_TYPE_CONVENTIONAL)
+		return null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors);
 	switch (zone->cond) {
 	case BLK_ZONE_COND_FULL:
 		/* Cannot write to a full zone */
-		cmd->error = BLK_STS_IOERR;
 		return BLK_STS_IOERR;
 	case BLK_ZONE_COND_EMPTY:
 	case BLK_ZONE_COND_IMP_OPEN:
 		if (zone->cond != BLK_ZONE_COND_EXP_OPEN)
 			zone->cond = BLK_ZONE_COND_IMP_OPEN;
+		ret = null_process_cmd(cmd, REQ_OP_WRITE, sector, nr_sectors);
+		if (ret != BLK_STS_OK)
+			return ret;
 		zone->wp += nr_sectors;
 		if (zone->wp == zone->start + zone->len)
 			zone->cond = BLK_ZONE_COND_FULL;
-		break;
+		return BLK_STS_OK;
-	case BLK_ZONE_COND_NOT_WP:
-		break;
 	default:
 		/* Invalid zone condition */
 		return BLK_STS_IOERR;
 	}
-	trace_nullb_zone_op(cmd, zno, zone->cond);
-	return BLK_STS_OK;
 }
 static blk_status_t null_zone_mgmt(struct nullb_cmd *cmd, enum req_opf op,
 	return BLK_STS_OK;
 }
-blk_status_t null_handle_zoned(struct nullb_cmd *cmd, enum req_opf op,
+blk_status_t null_process_zoned_cmd(struct nullb_cmd *cmd, enum req_opf op,
-			       sector_t sector, sector_t nr_sectors)
+				    sector_t sector, sector_t nr_sectors)
 {
 	switch (op) {
 	case REQ_OP_WRITE:
 	case REQ_OP_ZONE_FINISH:
 		return null_zone_mgmt(cmd, op, sector);
 	default:
-		return BLK_STS_OK;
+		return null_process_cmd(cmd, op, sector, nr_sectors);
 	}
 }

drivers/block/rbd.c+19−14

 static void rbd_notify_op_lock(struct rbd_device *rbd_dev,
 			       enum rbd_notify_op notify_op)
 {
-	struct page **reply_pages;
+	__rbd_notify_op_lock(rbd_dev, notify_op, NULL, NULL);
-	size_t reply_len;
-	__rbd_notify_op_lock(rbd_dev, notify_op, &reply_pages, &reply_len);
-	ceph_release_page_vector(reply_pages, calc_pages_for(0, reply_len));
 }
 static void rbd_notify_acquired_lock(struct work_struct *work)
 	cancel_work_sync(&rbd_dev->unlock_work);
 }
+/*
+ * header_rwsem must not be held to avoid a deadlock with
+ * rbd_dev_refresh() when flushing notifies.
+ */
 static void rbd_unregister_watch(struct rbd_device *rbd_dev)
 {
 	cancel_tasks_sync(rbd_dev);
 static void rbd_dev_image_release(struct rbd_device *rbd_dev)
 {
-	rbd_dev_unprobe(rbd_dev);
+	if (!rbd_is_ro(rbd_dev))
-	if (rbd_dev->opts)
 		rbd_unregister_watch(rbd_dev);
+	rbd_dev_unprobe(rbd_dev);
 	rbd_dev->image_format = 0;
 	kfree(rbd_dev->spec->image_id);
 	rbd_dev->spec->image_id = NULL;
  * device.  If this image is the one being mapped (i.e., not a
  * parent), initiate a watch on its header object before using that
  * object to get detailed information about the rbd image.
+ *
+ * On success, returns with header_rwsem held for write if called
+ * with @depth == 0.
  */
 static int rbd_dev_image_probe(struct rbd_device *rbd_dev, int depth)
 {
 		}
 	}
+	if (!depth)
+		down_write(&rbd_dev->header_rwsem);
 	ret = rbd_dev_header_info(rbd_dev);
 	if (ret) {
 		if (ret == -ENOENT && !need_watch)
 			rbd_print_dne(rbd_dev, false);
-		goto err_out_watch;
+		goto err_out_probe;
 	}
 	/*
 	return 0;
 err_out_probe:
-	rbd_dev_unprobe(rbd_dev);
+	if (!depth)
-err_out_watch:
+		up_write(&rbd_dev->header_rwsem);
 	if (need_watch)
 		rbd_unregister_watch(rbd_dev);
+	rbd_dev_unprobe(rbd_dev);
 err_out_format:
 	rbd_dev->image_format = 0;
 	kfree(rbd_dev->spec->image_id);
 		goto err_out_rbd_dev;
 	}
-	down_write(&rbd_dev->header_rwsem);
 	rc = rbd_dev_image_probe(rbd_dev, 0);
-	if (rc < 0) {
+	if (rc < 0)
-		up_write(&rbd_dev->header_rwsem);
 		goto err_out_rbd_dev;
-	}
 	if (rbd_dev->opts->alloc_size > rbd_dev->layout.object_size) {
 		rbd_warn(rbd_dev, "alloc_size adjusted to %u",

drivers/block/virtio_blk.c+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/blk-mq.h>	15	#include <linux/blk-mq.h>
16	#include <linux/blk-mq-virtio.h>	16	#include <linux/blk-mq-virtio.h>
17	#include <linux/numa.h>	17	#include <linux/numa.h>
		18	#include <uapi/linux/virtio_ring.h>
18		19
19	#define PART_BITS 4	20	#define PART_BITS 4
20	#define VQ_NAME_LEN 16	21	#define VQ_NAME_LEN 16

drivers/char/hw_random/virtio-rng.c+1−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	#include <linux/virtio.h>	11	#include <linux/virtio.h>
12	#include <linux/virtio_rng.h>	12	#include <linux/virtio_rng.h>
13	#include <linux/module.h>	13	#include <linux/module.h>
		14	#include <linux/slab.h>
14		15
15	static DEFINE_IDA(rng_index_ida);	16	static DEFINE_IDA(rng_index_ida);
16		17

drivers/char/tpm/tpm-interface.c+1−1

@@ -323,7 +323,7 @@ int tpm_pcr_extend(struct tpm_chip *chip, u32 pcr_idx, · 322 unmodified lines
323		323
324	for (i = 0; i < chip->nr_allocated_banks; i++) {	324	for (i = 0; i < chip->nr_allocated_banks; i++) {
325	if (digests[i].alg_id != chip->allocated_banks[i].alg_id) {	325	if (digests[i].alg_id != chip->allocated_banks[i].alg_id) {
326	rc = EINVAL;	326	rc = -EINVAL;
327	goto out;	327	goto out;
328	}	328	}
329	}	329	}

drivers/char/tpm/tpm2-cmd.c+1−0

@@ -681,6 +681,7 @@ out: · 680 unmodified lines
681	rc = -ENODEV;	681	rc = -ENODEV;
682	return rc;	682	return rc;
683	}	683	}
		684	EXPORT_SYMBOL_GPL(tpm2_get_cc_attrs_tbl);
684		685
685	/**	686	/**
686	* tpm2_startup - turn on the TPM	687	* tpm2_startup - turn on the TPM

drivers/char/tpm/tpm_ibmvtpm.c+73−63

 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (C) 2012 IBM Corporation
+ * Copyright (C) 2012-2020 IBM Corporation
  *
  * Author: Ashley Lai <ashleydlai@gmail.com>
  *
 	return len;
 }
+/**
+ * ibmvtpm_crq_send_init - Send a CRQ initialize message
+ * @ibmvtpm:	vtpm device struct
+ *
+ * Return:
+ *	0 on success.
+ *	Non-zero on failure.
+ */
+static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm)
+{
+	int rc;
+	rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD);
+	if (rc != H_SUCCESS)
+		dev_err(ibmvtpm->dev,
+			"%s failed rc=%d\n", __func__, rc);
+	return rc;
+}
+/**
+ * tpm_ibmvtpm_resume - Resume from suspend
+ *
+ * @dev:	device struct
+ *
+ * Return: Always 0.
+ */
+static int tpm_ibmvtpm_resume(struct device *dev)
+{
+	struct tpm_chip *chip = dev_get_drvdata(dev);
+	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
+	int rc = 0;
+	do {
+		if (rc)
+			msleep(100);
+		rc = plpar_hcall_norets(H_ENABLE_CRQ,
+					ibmvtpm->vdev->unit_address);
+	} while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc));
+	if (rc) {
+		dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc);
+		return rc;
+	}
+	rc = vio_enable_interrupts(ibmvtpm->vdev);
+	if (rc) {
+		dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc);
+		return rc;
+	}
+	rc = ibmvtpm_crq_send_init(ibmvtpm);
+	if (rc)
+		dev_err(dev, "Error send_init rc=%d\n", rc);
+	return rc;
+}
 /**
  * tpm_ibmvtpm_send() - Send a TPM command
  * @chip:	tpm chip struct
 static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
 {
 	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
+	bool retry = true;
 	int rc, sig;
 	if (!ibmvtpm->rtce_buf) {
 	 */
 	ibmvtpm->tpm_processing_cmd = true;
+again:
 	rc = ibmvtpm_send_crq(ibmvtpm->vdev,
 			IBMVTPM_VALID_CMD, VTPM_TPM_COMMAND,
 			count, ibmvtpm->rtce_dma_handle);
 	if (rc != H_SUCCESS) {
+		/*
+		 * H_CLOSED can be returned after LPM resume.  Call
+		 * tpm_ibmvtpm_resume() to re-enable the CRQ then retry
+		 * ibmvtpm_send_crq() once before failing.
+		 */
+		if (rc == H_CLOSED && retry) {
+			tpm_ibmvtpm_resume(ibmvtpm->dev);
+			retry = false;
+			goto again;
+		}
 		dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc);
-		rc = 0;
 		ibmvtpm->tpm_processing_cmd = false;
-	} else
+	}
-		rc = 0;
 	spin_unlock(&ibmvtpm->rtce_lock);
-	return rc;
+	return 0;
 }
 static void tpm_ibmvtpm_cancel(struct tpm_chip *chip)
 	return rc;
 }
-/**
- * ibmvtpm_crq_send_init - Send a CRQ initialize message
- * @ibmvtpm:	vtpm device struct
- *
- * Return:
- *	0 on success.
- *	Non-zero on failure.
- */
-static int ibmvtpm_crq_send_init(struct ibmvtpm_dev *ibmvtpm)
-{
-	int rc;
-	rc = ibmvtpm_send_crq_word(ibmvtpm->vdev, INIT_CRQ_CMD);
-	if (rc != H_SUCCESS)
-		dev_err(ibmvtpm->dev,
-			"ibmvtpm_crq_send_init failed rc=%d\n", rc);
-	return rc;
-}
 /**
  * tpm_ibmvtpm_remove - ibm vtpm remove entry point
  * @vdev:	vio device struct
 				  ibmvtpm->crq_dma_handle, CRQ_RES_BUF_SIZE);
 }
-/**
- * tpm_ibmvtpm_resume - Resume from suspend
- *
- * @dev:	device struct
- *
- * Return: Always 0.
- */
-static int tpm_ibmvtpm_resume(struct device *dev)
-{
-	struct tpm_chip *chip = dev_get_drvdata(dev);
-	struct ibmvtpm_dev *ibmvtpm = dev_get_drvdata(&chip->dev);
-	int rc = 0;
-	do {
-		if (rc)
-			msleep(100);
-		rc = plpar_hcall_norets(H_ENABLE_CRQ,
-					ibmvtpm->vdev->unit_address);
-	} while (rc == H_IN_PROGRESS || rc == H_BUSY || H_IS_LONG_BUSY(rc));
-	if (rc) {
-		dev_err(dev, "Error enabling ibmvtpm rc=%d\n", rc);
-		return rc;
-	}
-	rc = vio_enable_interrupts(ibmvtpm->vdev);
-	if (rc) {
-		dev_err(dev, "Error vio_enable_interrupts rc=%d\n", rc);
-		return rc;
-	}
-	rc = ibmvtpm_crq_send_init(ibmvtpm);
-	if (rc)
-		dev_err(dev, "Error send_init rc=%d\n", rc);
-	return rc;
-}
 static bool tpm_ibmvtpm_req_canceled(struct tpm_chip *chip, u8 status)
 {
 	return (status == 0);

drivers/char/tpm/tpm_tis_core.c+7−1

 	u32 intmask;
 	int rc;
+	if (priv->irq == 0)
+		return;
 	rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
 	if (rc < 0)
 		intmask = 0;
 		if (irq) {
 			tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
 						 irq);
-			if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
+			if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
 				dev_err(&chip->dev, FW_BUG
 					"TPM interrupt not working, polling instead\n");
+				disable_interrupts(chip);
+			}
 		} else {
 			tpm_tis_probe_irq(chip, intmask);
 		}

drivers/clk/clk-asm9260.c+1−1

@@ -276,7 +276,7 @@ static void __init asm9260_acc_init(struct device_node *np) · 275 unmodified lines
276		276
277	/* TODO: Convert to DT parent scheme */	277	/* TODO: Convert to DT parent scheme */
278	ref_clk = of_clk_get_parent_name(np, 0);	278	ref_clk = of_clk_get_parent_name(np, 0);
279	hw = __clk_hw_register_fixed_rate_with_accuracy(NULL, NULL, pll_clk,	279	hw = __clk_hw_register_fixed_rate(NULL, NULL, pll_clk,
280	ref_clk, NULL, NULL, 0, rate, 0,	280	ref_clk, NULL, NULL, 0, rate, 0,
281	CLK_FIXED_RATE_PARENT_ACCURACY);	281	CLK_FIXED_RATE_PARENT_ACCURACY);
282		282

drivers/clk/mmp/clk-pll.c+32−1

@@ -97,7 +97,7 @@ static const struct clk_ops mmp_clk_pll_ops = { · 96 unmodified lines
97	.recalc_rate = mmp_clk_pll_recalc_rate,	97	.recalc_rate = mmp_clk_pll_recalc_rate,
98	};	98	};
99		99
100	struct clk mmp_clk_register_pll(char name,	100	static struct clk mmp_clk_register_pll(char name,
101	unsigned long default_rate,	101	unsigned long default_rate,
102	void __iomem *enable_reg, u32 enable,	102	void __iomem *enable_reg, u32 enable,
103	void __iomem *reg, u8 shift,	103	void __iomem *reg, u8 shift,
@@ -137,3 +137,34 @@ struct clk mmp_clk_register_pll(char name, · 33 unmodified lines
137		137
138	return clk;	138	return clk;
139	}	139	}
		140
		141	void mmp_register_pll_clks(struct mmp_clk_unit *unit,
		142	struct mmp_param_pll_clk *clks,
		143	void __iomem *base, int size)
		144	{
		145	struct clk *clk;
		146	int i;
		147
		148	for (i = 0; i < size; i++) {
		149	void __iomem *reg = NULL;
		150
		151	if (clks[i].offset)
		152	reg = base + clks[i].offset;
		153
		154	clk = mmp_clk_register_pll(clks[i].name,
		155	clks[i].default_rate,
		156	base + clks[i].enable_offset,
		157	clks[i].enable,
		158	reg, clks[i].shift,
		159	clks[i].input_rate,
		160	base + clks[i].postdiv_offset,
		161	clks[i].postdiv_shift);
		162	if (IS_ERR(clk)) {
		163	pr_err("%s: failed to register clock %s\n",
		164	__func__, clks[i].name);
		165	continue;
		166	}
		167	if (clks[i].id)
		168	unit->clk_table[clks[i].id] = clk;
		169	}
		170	}

drivers/clk/mmp/clk.c+0−31

@@ -176,37 +176,6 @@ void mmp_register_div_clks(struct mmp_clk_unit *unit, · 175 unmodified lines
176	}	176	}
177	}	177	}
178		178
179	void mmp_register_pll_clks(struct mmp_clk_unit *unit,
180	struct mmp_param_pll_clk *clks,
181	void __iomem *base, int size)
182	{
183	struct clk *clk;
184	int i;
185
186	for (i = 0; i < size; i++) {
187	void __iomem *reg = NULL;
188
189	if (clks[i].offset)
190	reg = base + clks[i].offset;
191
192	clk = mmp_clk_register_pll(clks[i].name,
193	clks[i].default_rate,
194	base + clks[i].enable_offset,
195	clks[i].enable,
196	reg, clks[i].shift,
197	clks[i].input_rate,
198	base + clks[i].postdiv_offset,
199	clks[i].postdiv_shift);
200	if (IS_ERR(clk)) {
201	pr_err("%s: failed to register clock %s\n",
202	__func__, clks[i].name);
203	continue;
204	}
205	if (clks[i].id)
206	unit->clk_table[clks[i].id] = clk;
207	}
208	}
209
210	void mmp_clk_add(struct mmp_clk_unit *unit, unsigned int id,	179	void mmp_clk_add(struct mmp_clk_unit *unit, unsigned int id,
211	struct clk *clk)	180	struct clk *clk)
212	{	181	{

drivers/clk/mmp/clk.h+0−7

@@ -238,13 +238,6 @@ void mmp_register_pll_clks(struct mmp_clk_unit *unit, · 237 unmodified lines
238	struct mmp_param_pll_clk *clks,	238	struct mmp_param_pll_clk *clks,
239	void __iomem *base, int size);	239	void __iomem *base, int size);
240		240
241	extern struct clk mmp_clk_register_pll(char name,
242	unsigned long default_rate,
243	void __iomem *enable_reg, u32 enable,
244	void __iomem *reg, u8 shift,
245	unsigned long input_rate,
246	void __iomem *postdiv_reg, u8 postdiv_shift);
247
248	#define DEFINE_MIX_REG_INFO(w_d, s_d, w_m, s_m, fc) \	241	#define DEFINE_MIX_REG_INFO(w_d, s_d, w_m, s_m, fc) \
249	{ \	242	{ \
250	.width_div = (w_d), \	243	.width_div = (w_d), \

drivers/clk/sprd/sc9863a-clk.c+2−1

 				0x1000, BIT(12), 0, 0);
 static SPRD_SC_GATE_CLK_FW_NAME(uart0_eb,	"uart0-eb",	"ext-26m", 0x0,
 				0x1000, BIT(13), 0, 0);
+/* uart1_eb is for console, don't gate even if unused */
 static SPRD_SC_GATE_CLK_FW_NAME(uart1_eb,	"uart1-eb",	"ext-26m", 0x0,
-				0x1000, BIT(14), 0, 0);
+				0x1000, BIT(14), CLK_IGNORE_UNUSED, 0);
 static SPRD_SC_GATE_CLK_FW_NAME(uart2_eb,	"uart2-eb",	"ext-26m", 0x0,
 				0x1000, BIT(15), 0, 0);
 static SPRD_SC_GATE_CLK_FW_NAME(uart3_eb,	"uart3-eb",	"ext-26m", 0x0,

drivers/counter/104-quad-8.c+160−34

@@ -44,6 +44,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses"); · 43 unmodified lines
44	* @base: base port address of the IIO device	44	* @base: base port address of the IIO device
45	*/	45	*/
46	struct quad8_iio {	46	struct quad8_iio {
		47	struct mutex lock;
47	struct counter_device counter;	48	struct counter_device counter;
48	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];	49	unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];
49	unsigned int preset[QUAD8_NUM_COUNTERS];	50	unsigned int preset[QUAD8_NUM_COUNTERS];
@@ -123,6 +124,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 73 unmodified lines
123	/* Borrow XOR Carry effectively doubles count range */	124	/* Borrow XOR Carry effectively doubles count range */
124	*val = (borrow ^ carry) << 24;	125	*val = (borrow ^ carry) << 24;
125		126
		127	mutex_lock(&priv->lock);
		128
126	/* Reset Byte Pointer; transfer Counter to Output Latch */	129	/* Reset Byte Pointer; transfer Counter to Output Latch */
127	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,	130	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,
128	base_offset + 1);	131	base_offset + 1);
@@ -130,6 +133,8 @@ static int quad8_read_raw(struct iio_dev *indio_dev, · 1 unmodified line
130	for (i = 0; i < 3; i++)	133	for (i = 0; i < 3; i++)
131	val \|= (unsigned int)inb(base_offset) << (8 i);	134	val \|= (unsigned int)inb(base_offset) << (8 i);
132		135
		136	mutex_unlock(&priv->lock);
		137
133	return IIO_VAL_INT;	138	return IIO_VAL_INT;
134	case IIO_CHAN_INFO_ENABLE:	139	case IIO_CHAN_INFO_ENABLE:
135	*val = priv->ab_enable[chan->channel];	140	*val = priv->ab_enable[chan->channel];
@@ -160,6 +165,8 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 24 unmodified lines
160	if ((unsigned int)val > 0xFFFFFF)	165	if ((unsigned int)val > 0xFFFFFF)
161	return -EINVAL;	166	return -EINVAL;
162		167
		168	mutex_lock(&priv->lock);
		169
163	/* Reset Byte Pointer */	170	/* Reset Byte Pointer */
164	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);	171	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
165		172
@@ -183,12 +190,16 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 17 unmodified lines
183	/* Reset Error flag */	190	/* Reset Error flag */
184	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);	191	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);
185		192
		193	mutex_unlock(&priv->lock);
		194
186	return 0;	195	return 0;
187	case IIO_CHAN_INFO_ENABLE:	196	case IIO_CHAN_INFO_ENABLE:
188	/* only boolean values accepted */	197	/* only boolean values accepted */
189	if (val < 0 \|\| val > 1)	198	if (val < 0 \|\| val > 1)
190	return -EINVAL;	199	return -EINVAL;
191		200
		201	mutex_lock(&priv->lock);
		202
192	priv->ab_enable[chan->channel] = val;	203	priv->ab_enable[chan->channel] = val;
193		204
194	ior_cfg = val \| priv->preset_enable[chan->channel] << 1;	205	ior_cfg = val \| priv->preset_enable[chan->channel] << 1;
@@ -196,11 +207,18 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 1 unmodified line
196	/* Load I/O control configuration */	207	/* Load I/O control configuration */
197	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);	208	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);
198		209
		210	mutex_unlock(&priv->lock);
		211
199	return 0;	212	return 0;
200	case IIO_CHAN_INFO_SCALE:	213	case IIO_CHAN_INFO_SCALE:
		214	mutex_lock(&priv->lock);
		215
201	/* Quadrature scaling only available in quadrature mode */	216	/* Quadrature scaling only available in quadrature mode */
202	if (!priv->quadrature_mode[chan->channel] && (val2 \|\| val != 1))	217	if (!priv->quadrature_mode[chan->channel] &&
		218	(val2 \|\| val != 1)) {
		219	mutex_unlock(&priv->lock);
203	return -EINVAL;	220	return -EINVAL;
		221	}
204		222
205	/* Only three gain states (1, 0.5, 0.25) */	223	/* Only three gain states (1, 0.5, 0.25) */
206	if (val == 1 && !val2)	224	if (val == 1 && !val2)
@@ -214,11 +232,15 @@ static int quad8_write_raw(struct iio_dev *indio_dev, · 7 unmodified lines
214	priv->quadrature_scale[chan->channel] = 2;	232	priv->quadrature_scale[chan->channel] = 2;
215	break;	233	break;
216	default:	234	default:
		235	mutex_unlock(&priv->lock);
217	return -EINVAL;	236	return -EINVAL;
218	}	237	}
219	else	238	else {
		239	mutex_unlock(&priv->lock);
220	return -EINVAL;	240	return -EINVAL;
		241	}
221		242
		243	mutex_unlock(&priv->lock);
222	return 0;	244	return 0;
223	}	245	}
224		246
@@ -255,6 +277,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 30 unmodified lines
255	if (preset > 0xFFFFFF)	277	if (preset > 0xFFFFFF)
256	return -EINVAL;	278	return -EINVAL;
257		279
		280	mutex_lock(&priv->lock);
		281
258	priv->preset[chan->channel] = preset;	282	priv->preset[chan->channel] = preset;
259		283
260	/* Reset Byte Pointer */	284	/* Reset Byte Pointer */
@@ -264,6 +288,8 @@ static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private, · 3 unmodified lines
264	for (i = 0; i < 3; i++)	288	for (i = 0; i < 3; i++)
265	outb(preset >> (8 * i), base_offset);	289	outb(preset >> (8 * i), base_offset);
266		290
		291	mutex_unlock(&priv->lock);
		292
267	return len;	293	return len;
268	}	294	}
269		295
@@ -293,6 +319,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 23 unmodified lines
293	/* Preset enable is active low in Input/Output Control register */	319	/* Preset enable is active low in Input/Output Control register */
294	preset_enable = !preset_enable;	320	preset_enable = !preset_enable;
295		321
		322	mutex_lock(&priv->lock);
		323
296	priv->preset_enable[chan->channel] = preset_enable;	324	priv->preset_enable[chan->channel] = preset_enable;
297		325
298	ior_cfg = priv->ab_enable[chan->channel] \|	326	ior_cfg = priv->ab_enable[chan->channel] \|
@@ -301,6 +329,8 @@ static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev, · 2 unmodified lines
301	/* Load I/O control configuration to Input / Output Control Register */	329	/* Load I/O control configuration to Input / Output Control Register */
302	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);	330	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);
303		331
		332	mutex_unlock(&priv->lock);
		333
304	return len;	334	return len;
305	}	335	}
306		336
@@ -358,6 +388,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 51 unmodified lines
358	unsigned int mode_cfg = cnt_mode << 1;	388	unsigned int mode_cfg = cnt_mode << 1;
359	const int base_offset = priv->base + 2 * chan->channel + 1;	389	const int base_offset = priv->base + 2 * chan->channel + 1;
360		390
		391	mutex_lock(&priv->lock);
		392
361	priv->count_mode[chan->channel] = cnt_mode;	393	priv->count_mode[chan->channel] = cnt_mode;
362		394
363	/* Add quadrature mode configuration */	395	/* Add quadrature mode configuration */
@@ -367,6 +399,8 @@ static int quad8_set_count_mode(struct iio_dev *indio_dev, · 3 unmodified lines
367	/* Load mode configuration to Counter Mode Register */	399	/* Load mode configuration to Counter Mode Register */
368	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	400	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
369		401
		402	mutex_unlock(&priv->lock);
		403
370	return 0;	404	return 0;
371	}	405	}
372		406
@@ -394,19 +428,26 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev, · 21 unmodified lines
394	const struct iio_chan_spec *chan, unsigned int synchronous_mode)	428	const struct iio_chan_spec *chan, unsigned int synchronous_mode)
395	{	429	{
396	struct quad8_iio *const priv = iio_priv(indio_dev);	430	struct quad8_iio *const priv = iio_priv(indio_dev);
397	const unsigned int idr_cfg = synchronous_mode \|
398	priv->index_polarity[chan->channel] << 1;
399	const int base_offset = priv->base + 2 * chan->channel + 1;	431	const int base_offset = priv->base + 2 * chan->channel + 1;
		432	unsigned int idr_cfg = synchronous_mode;
		433
		434	mutex_lock(&priv->lock);
		435
		436	idr_cfg \|= priv->index_polarity[chan->channel] << 1;
400		437
401	/* Index function must be non-synchronous in non-quadrature mode */	438	/* Index function must be non-synchronous in non-quadrature mode */
402	if (synchronous_mode && !priv->quadrature_mode[chan->channel])	439	if (synchronous_mode && !priv->quadrature_mode[chan->channel]) {
		440	mutex_unlock(&priv->lock);
403	return -EINVAL;	441	return -EINVAL;
		442	}
404		443
405	priv->synchronous_mode[chan->channel] = synchronous_mode;	444	priv->synchronous_mode[chan->channel] = synchronous_mode;
406		445
407	/* Load Index Control configuration to Index Control Register */	446	/* Load Index Control configuration to Index Control Register */
408	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	447	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
409		448
		449	mutex_unlock(&priv->lock);
		450
410	return 0;	451	return 0;
411	}	452	}
412		453
@@ -434,8 +475,12 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 21 unmodified lines
434	const struct iio_chan_spec *chan, unsigned int quadrature_mode)	475	const struct iio_chan_spec *chan, unsigned int quadrature_mode)
435	{	476	{
436	struct quad8_iio *const priv = iio_priv(indio_dev);	477	struct quad8_iio *const priv = iio_priv(indio_dev);
437	unsigned int mode_cfg = priv->count_mode[chan->channel] << 1;
438	const int base_offset = priv->base + 2 * chan->channel + 1;	478	const int base_offset = priv->base + 2 * chan->channel + 1;
		479	unsigned int mode_cfg;
		480
		481	mutex_lock(&priv->lock);
		482
		483	mode_cfg = priv->count_mode[chan->channel] << 1;
439		484
440	if (quadrature_mode)	485	if (quadrature_mode)
441	mode_cfg \|= (priv->quadrature_scale[chan->channel] + 1) << 3;	486	mode_cfg \|= (priv->quadrature_scale[chan->channel] + 1) << 3;
@@ -453,6 +498,8 @@ static int quad8_set_quadrature_mode(struct iio_dev *indio_dev, · 11 unmodified lines
453	/* Load mode configuration to Counter Mode Register */	498	/* Load mode configuration to Counter Mode Register */
454	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	499	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
455		500
		501	mutex_unlock(&priv->lock);
		502
456	return 0;	503	return 0;
457	}	504	}
458		505
@@ -480,15 +527,20 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev, · 21 unmodified lines
480	const struct iio_chan_spec *chan, unsigned int index_polarity)	527	const struct iio_chan_spec *chan, unsigned int index_polarity)
481	{	528	{
482	struct quad8_iio *const priv = iio_priv(indio_dev);	529	struct quad8_iio *const priv = iio_priv(indio_dev);
483	const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] \|
484	index_polarity << 1;
485	const int base_offset = priv->base + 2 * chan->channel + 1;	530	const int base_offset = priv->base + 2 * chan->channel + 1;
		531	unsigned int idr_cfg = index_polarity << 1;
		532
		533	mutex_lock(&priv->lock);
		534
		535	idr_cfg \|= priv->synchronous_mode[chan->channel];
486		536
487	priv->index_polarity[chan->channel] = index_polarity;	537	priv->index_polarity[chan->channel] = index_polarity;
488		538
489	/* Load Index Control configuration to Index Control Register */	539	/* Load Index Control configuration to Index Control Register */
490	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	540	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
491		541
		542	mutex_unlock(&priv->lock);
		543
492	return 0;	544	return 0;
493	}	545	}
494		546
@@ -589,7 +641,7 @@ static int quad8_signal_read(struct counter_device *counter, · 94 unmodified lines
589	static int quad8_count_read(struct counter_device *counter,	641	static int quad8_count_read(struct counter_device *counter,
590	struct counter_count count, unsigned long val)	642	struct counter_count count, unsigned long val)
591	{	643	{
592	const struct quad8_iio *const priv = counter->priv;	644	struct quad8_iio *const priv = counter->priv;
593	const int base_offset = priv->base + 2 * count->id;	645	const int base_offset = priv->base + 2 * count->id;
594	unsigned int flags;	646	unsigned int flags;
595	unsigned int borrow;	647	unsigned int borrow;
@@ -603,6 +655,8 @@ static int quad8_count_read(struct counter_device *counter, · 7 unmodified lines
603	/* Borrow XOR Carry effectively doubles count range */	655	/* Borrow XOR Carry effectively doubles count range */
604	*val = (unsigned long)(borrow ^ carry) << 24;	656	*val = (unsigned long)(borrow ^ carry) << 24;
605		657
		658	mutex_lock(&priv->lock);
		659
606	/* Reset Byte Pointer; transfer Counter to Output Latch */	660	/* Reset Byte Pointer; transfer Counter to Output Latch */
607	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,	661	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP \| QUAD8_RLD_CNTR_OUT,
608	base_offset + 1);	662	base_offset + 1);
@@ -610,13 +664,15 @@ static int quad8_count_read(struct counter_device *counter, · 1 unmodified line
610	for (i = 0; i < 3; i++)	664	for (i = 0; i < 3; i++)
611	val \|= (unsigned long)inb(base_offset) << (8 i);	665	val \|= (unsigned long)inb(base_offset) << (8 i);
612		666
		667	mutex_unlock(&priv->lock);
		668
613	return 0;	669	return 0;
614	}	670	}
615		671
616	static int quad8_count_write(struct counter_device *counter,	672	static int quad8_count_write(struct counter_device *counter,
617	struct counter_count *count, unsigned long val)	673	struct counter_count *count, unsigned long val)
618	{	674	{
619	const struct quad8_iio *const priv = counter->priv;	675	struct quad8_iio *const priv = counter->priv;
620	const int base_offset = priv->base + 2 * count->id;	676	const int base_offset = priv->base + 2 * count->id;
621	int i;	677	int i;
622		678
@@ -624,6 +680,8 @@ static int quad8_count_write(struct counter_device *counter, · 1 unmodified line
624	if (val > 0xFFFFFF)	680	if (val > 0xFFFFFF)
625	return -EINVAL;	681	return -EINVAL;
626		682
		683	mutex_lock(&priv->lock);
		684
627	/* Reset Byte Pointer */	685	/* Reset Byte Pointer */
628	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);	686	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
629		687
@@ -647,6 +705,8 @@ static int quad8_count_write(struct counter_device *counter, · 17 unmodified lines
647	/* Reset Error flag */	705	/* Reset Error flag */
648	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);	706	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_E, base_offset + 1);
649		707
		708	mutex_unlock(&priv->lock);
		709
650	return 0;	710	return 0;
651	}	711	}
652		712
@@ -667,13 +727,13 @@ static enum counter_count_function quad8_count_functions_list[] = { · 14 unmodified lines
667	static int quad8_function_get(struct counter_device *counter,	727	static int quad8_function_get(struct counter_device *counter,
668	struct counter_count count, size_t function)	728	struct counter_count count, size_t function)
669	{	729	{
670	const struct quad8_iio *const priv = counter->priv;	730	struct quad8_iio *const priv = counter->priv;
671	const int id = count->id;	731	const int id = count->id;
672	const unsigned int quadrature_mode = priv->quadrature_mode[id];
673	const unsigned int scale = priv->quadrature_scale[id];
674		732
675	if (quadrature_mode)	733	mutex_lock(&priv->lock);
676	switch (scale) {	734
		735	if (priv->quadrature_mode[id])
		736	switch (priv->quadrature_scale[id]) {
677	case 0:	737	case 0:
678	*function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;	738	*function = QUAD8_COUNT_FUNCTION_QUADRATURE_X1;
679	break;	739	break;
@@ -687,6 +747,8 @@ static int quad8_function_get(struct counter_device *counter, · 7 unmodified lines
687	else	747	else
688	*function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;	748	*function = QUAD8_COUNT_FUNCTION_PULSE_DIRECTION;
689		749
		750	mutex_unlock(&priv->lock);
		751
690	return 0;	752	return 0;
691	}	753	}
692		754
@@ -697,10 +759,15 @@ static int quad8_function_set(struct counter_device *counter, · 4 unmodified lines
697	const int id = count->id;	759	const int id = count->id;
698	unsigned int *const quadrature_mode = priv->quadrature_mode + id;	760	unsigned int *const quadrature_mode = priv->quadrature_mode + id;
699	unsigned int *const scale = priv->quadrature_scale + id;	761	unsigned int *const scale = priv->quadrature_scale + id;
700	unsigned int mode_cfg = priv->count_mode[id] << 1;
701	unsigned int *const synchronous_mode = priv->synchronous_mode + id;	762	unsigned int *const synchronous_mode = priv->synchronous_mode + id;
702	const unsigned int idr_cfg = priv->index_polarity[id] << 1;
703	const int base_offset = priv->base + 2 * id + 1;	763	const int base_offset = priv->base + 2 * id + 1;
		764	unsigned int mode_cfg;
		765	unsigned int idr_cfg;
		766
		767	mutex_lock(&priv->lock);
		768
		769	mode_cfg = priv->count_mode[id] << 1;
		770	idr_cfg = priv->index_polarity[id] << 1;
704		771
705	if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {	772	if (function == QUAD8_COUNT_FUNCTION_PULSE_DIRECTION) {
706	*quadrature_mode = 0;	773	*quadrature_mode = 0;
@@ -736,6 +803,8 @@ static int quad8_function_set(struct counter_device *counter, · 29 unmodified lines
736	/* Load mode configuration to Counter Mode Register */	803	/* Load mode configuration to Counter Mode Register */
737	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	804	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
738		805
		806	mutex_unlock(&priv->lock);
		807
739	return 0;	808	return 0;
740	}	809	}
741		810
@@ -852,15 +921,20 @@ static int quad8_index_polarity_set(struct counter_device *counter, · 110 unmodified lines
852	{	921	{
853	struct quad8_iio *const priv = counter->priv;	922	struct quad8_iio *const priv = counter->priv;
854	const size_t channel_id = signal->id - 16;	923	const size_t channel_id = signal->id - 16;
855	const unsigned int idr_cfg = priv->synchronous_mode[channel_id] \|
856	index_polarity << 1;
857	const int base_offset = priv->base + 2 * channel_id + 1;	924	const int base_offset = priv->base + 2 * channel_id + 1;
		925	unsigned int idr_cfg = index_polarity << 1;
		926
		927	mutex_lock(&priv->lock);
		928
		929	idr_cfg \|= priv->synchronous_mode[channel_id];
858		930
859	priv->index_polarity[channel_id] = index_polarity;	931	priv->index_polarity[channel_id] = index_polarity;
860		932
861	/* Load Index Control configuration to Index Control Register */	933	/* Load Index Control configuration to Index Control Register */
862	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	934	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
863		935
		936	mutex_unlock(&priv->lock);
		937
864	return 0;	938	return 0;
865	}	939	}
866		940
@@ -887,19 +961,26 @@ static int quad8_synchronous_mode_set(struct counter_device *counter, · 20 unmodified lines
887	{	961	{
888	struct quad8_iio *const priv = counter->priv;	962	struct quad8_iio *const priv = counter->priv;
889	const size_t channel_id = signal->id - 16;	963	const size_t channel_id = signal->id - 16;
890	const unsigned int idr_cfg = synchronous_mode \|
891	priv->index_polarity[channel_id] << 1;
892	const int base_offset = priv->base + 2 * channel_id + 1;	964	const int base_offset = priv->base + 2 * channel_id + 1;
		965	unsigned int idr_cfg = synchronous_mode;
		966
		967	mutex_lock(&priv->lock);
		968
		969	idr_cfg \|= priv->index_polarity[channel_id] << 1;
893		970
894	/* Index function must be non-synchronous in non-quadrature mode */	971	/* Index function must be non-synchronous in non-quadrature mode */
895	if (synchronous_mode && !priv->quadrature_mode[channel_id])	972	if (synchronous_mode && !priv->quadrature_mode[channel_id]) {
		973	mutex_unlock(&priv->lock);
896	return -EINVAL;	974	return -EINVAL;
		975	}
897		976
898	priv->synchronous_mode[channel_id] = synchronous_mode;	977	priv->synchronous_mode[channel_id] = synchronous_mode;
899		978
900	/* Load Index Control configuration to Index Control Register */	979	/* Load Index Control configuration to Index Control Register */
901	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);	980	outb(QUAD8_CTR_IDR \| idr_cfg, base_offset);
902		981
		982	mutex_unlock(&priv->lock);
		983
903	return 0;	984	return 0;
904	}	985	}
905		986
@@ -964,6 +1045,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 58 unmodified lines
964	break;	1045	break;
965	}	1046	}
966		1047
		1048	mutex_lock(&priv->lock);
		1049
967	priv->count_mode[count->id] = cnt_mode;	1050	priv->count_mode[count->id] = cnt_mode;
968		1051
969	/* Set count mode configuration value */	1052	/* Set count mode configuration value */
@@ -976,6 +1059,8 @@ static int quad8_count_mode_set(struct counter_device *counter, · 6 unmodified lines
976	/* Load mode configuration to Counter Mode Register */	1059	/* Load mode configuration to Counter Mode Register */
977	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);	1060	outb(QUAD8_CTR_CMR \| mode_cfg, base_offset);
978		1061
		1062	mutex_unlock(&priv->lock);
		1063
979	return 0;	1064	return 0;
980	}	1065	}
981		1066
@@ -1017,6 +1102,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 35 unmodified lines
1017	if (err)	1102	if (err)
1018	return err;	1103	return err;
1019		1104
		1105	mutex_lock(&priv->lock);
		1106
1020	priv->ab_enable[count->id] = ab_enable;	1107	priv->ab_enable[count->id] = ab_enable;
1021		1108
1022	ior_cfg = ab_enable \| priv->preset_enable[count->id] << 1;	1109	ior_cfg = ab_enable \| priv->preset_enable[count->id] << 1;
@@ -1024,6 +1111,8 @@ static ssize_t quad8_count_enable_write(struct counter_device *counter, · 1 unmodified line
1024	/* Load I/O control configuration */	1111	/* Load I/O control configuration */
1025	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);	1112	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset + 1);
1026		1113
		1114	mutex_unlock(&priv->lock);
		1115
1027	return len;	1116	return len;
1028	}	1117	}
1029		1118
@@ -1052,14 +1141,28 @@ static ssize_t quad8_count_preset_read(struct counter_device *counter, · 22 unmodified lines
1052	return sprintf(buf, "%u\n", priv->preset[count->id]);	1141	return sprintf(buf, "%u\n", priv->preset[count->id]);
1053	}	1142	}
1054		1143
		1144	static void quad8_preset_register_set(struct quad8_iio *quad8iio, int id,
		1145	unsigned int preset)
		1146	{
		1147	const unsigned int base_offset = quad8iio->base + 2 * id;
		1148	int i;
		1149
		1150	quad8iio->preset[id] = preset;
		1151
		1152	/* Reset Byte Pointer */
		1153	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
		1154
		1155	/* Set Preset Register */
		1156	for (i = 0; i < 3; i++)
		1157	outb(preset >> (8 * i), base_offset);
		1158	}
		1159
1055	static ssize_t quad8_count_preset_write(struct counter_device *counter,	1160	static ssize_t quad8_count_preset_write(struct counter_device *counter,
1056	struct counter_count count, void private, const char *buf, size_t len)	1161	struct counter_count count, void private, const char *buf, size_t len)
1057	{	1162	{
1058	struct quad8_iio *const priv = counter->priv;	1163	struct quad8_iio *const priv = counter->priv;
1059	const int base_offset = priv->base + 2 * count->id;
1060	unsigned int preset;	1164	unsigned int preset;
1061	int ret;	1165	int ret;
1062	int i;
1063		1166
1064	ret = kstrtouint(buf, 0, &preset);	1167	ret = kstrtouint(buf, 0, &preset);
1065	if (ret)	1168	if (ret)
@@ -1069,14 +1172,11 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 3 unmodified lines
1069	if (preset > 0xFFFFFF)	1172	if (preset > 0xFFFFFF)
1070	return -EINVAL;	1173	return -EINVAL;
1071		1174
1072	priv->preset[count->id] = preset;	1175	mutex_lock(&priv->lock);
1073		1176
1074	/* Reset Byte Pointer */	1177	quad8_preset_register_set(priv, count->id, preset);
1075	outb(QUAD8_CTR_RLD \| QUAD8_RLD_RESET_BP, base_offset + 1);
1076		1178
1077	/* Set Preset Register */	1179	mutex_unlock(&priv->lock);
1078	for (i = 0; i < 3; i++)
1079	outb(preset >> (8 * i), base_offset);
1080		1180
1081	return len;	1181	return len;
1082	}	1182	}
@@ -1084,15 +1184,20 @@ static ssize_t quad8_count_preset_write(struct counter_device *counter, · 1 unmodified line
1084	static ssize_t quad8_count_ceiling_read(struct counter_device *counter,	1184	static ssize_t quad8_count_ceiling_read(struct counter_device *counter,
1085	struct counter_count count, void private, char *buf)	1185	struct counter_count count, void private, char *buf)
1086	{	1186	{
1087	const struct quad8_iio *const priv = counter->priv;	1187	struct quad8_iio *const priv = counter->priv;
		1188
		1189	mutex_lock(&priv->lock);
1088		1190
1089	/* Range Limit and Modulo-N count modes use preset value as ceiling */	1191	/* Range Limit and Modulo-N count modes use preset value as ceiling */
1090	switch (priv->count_mode[count->id]) {	1192	switch (priv->count_mode[count->id]) {
1091	case 1:	1193	case 1:
1092	case 3:	1194	case 3:
1093	return quad8_count_preset_read(counter, count, private, buf);	1195	mutex_unlock(&priv->lock);
		1196	return sprintf(buf, "%u\n", priv->preset[count->id]);
1094	}	1197	}
1095		1198
		1199	mutex_unlock(&priv->lock);
		1200
1096	/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */	1201	/* By default 0x1FFFFFF (25 bits unsigned) is maximum count */
1097	return sprintf(buf, "33554431\n");	1202	return sprintf(buf, "33554431\n");
1098	}	1203	}
@@ -1101,15 +1206,29 @@ static ssize_t quad8_count_ceiling_write(struct counter_device *counter, · 2 unmodified lines
1101	struct counter_count count, void private, const char *buf, size_t len)	1206	struct counter_count count, void private, const char *buf, size_t len)
1102	{	1207	{
1103	struct quad8_iio *const priv = counter->priv;	1208	struct quad8_iio *const priv = counter->priv;
		1209	unsigned int ceiling;
		1210	int ret;
		1211
		1212	ret = kstrtouint(buf, 0, &ceiling);
		1213	if (ret)
		1214	return ret;
		1215
		1216	/* Only 24-bit values are supported */
		1217	if (ceiling > 0xFFFFFF)
		1218	return -EINVAL;
		1219
		1220	mutex_lock(&priv->lock);
1104		1221
1105	/* Range Limit and Modulo-N count modes use preset value as ceiling */	1222	/* Range Limit and Modulo-N count modes use preset value as ceiling */
1106	switch (priv->count_mode[count->id]) {	1223	switch (priv->count_mode[count->id]) {
1107	case 1:	1224	case 1:
1108	case 3:	1225	case 3:
1109	return quad8_count_preset_write(counter, count, private, buf,	1226	quad8_preset_register_set(priv, count->id, ceiling);
1110	len);	1227	break;
1111	}	1228	}
1112		1229
		1230	mutex_unlock(&priv->lock);
		1231
1113	return len;	1232	return len;
1114	}	1233	}
1115		1234
@@ -1137,6 +1256,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 21 unmodified lines
1137	/* Preset enable is active low in Input/Output Control register */	1256	/* Preset enable is active low in Input/Output Control register */
1138	preset_enable = !preset_enable;	1257	preset_enable = !preset_enable;
1139		1258
		1259	mutex_lock(&priv->lock);
		1260
1140	priv->preset_enable[count->id] = preset_enable;	1261	priv->preset_enable[count->id] = preset_enable;
1141		1262
1142	ior_cfg = priv->ab_enable[count->id] \| (unsigned int)preset_enable << 1;	1263	ior_cfg = priv->ab_enable[count->id] \| (unsigned int)preset_enable << 1;
@@ -1144,6 +1265,8 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter, · 1 unmodified line
1144	/* Load I/O control configuration to Input / Output Control Register */	1265	/* Load I/O control configuration to Input / Output Control Register */
1145	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);	1266	outb(QUAD8_CTR_IOR \| ior_cfg, base_offset);
1146		1267
		1268	mutex_unlock(&priv->lock);
		1269
1147	return len;	1270	return len;
1148	}	1271	}
1149		1272
@@ -1429,6 +1552,9 @@ static int quad8_probe(struct device *dev, unsigned int id) · 279 unmodified lines
1429	quad8iio->counter.priv = quad8iio;	1552	quad8iio->counter.priv = quad8iio;
1430	quad8iio->base = base[id];	1553	quad8iio->base = base[id];
1431		1554
		1555	/* Initialize mutex */
		1556	mutex_init(&quad8iio->lock);
		1557
1432	/* Reset all counters and disable interrupt function */	1558	/* Reset all counters and disable interrupt function */
1433	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);	1559	outb(QUAD8_CHAN_OP_RESET_COUNTERS, base[id] + QUAD8_REG_CHAN_OP);
1434	/* Set initial configuration for all counters */	1560	/* Set initial configuration for all counters */

drivers/cpufreq/intel_pstate.c+1−1

@@ -1059,7 +1059,7 @@ static ssize_t store_no_turbo(struct kobject a, struct kobj_attribute b, · 1058 unmodified lines
1059		1059
1060	update_turbo_state();	1060	update_turbo_state();
1061	if (global.turbo_disabled) {	1061	if (global.turbo_disabled) {
1062	pr_warn("Turbo disabled by BIOS or unavailable on processor\n");	1062	pr_notice_once("Turbo disabled by BIOS or unavailable on processor\n");
1063	mutex_unlock(&intel_pstate_limits_lock);	1063	mutex_unlock(&intel_pstate_limits_lock);
1064	mutex_unlock(&intel_pstate_driver_lock);	1064	mutex_unlock(&intel_pstate_driver_lock);
1065	return -EPERM;	1065	return -EPERM;

drivers/crypto/caam/caamalg.c+7−3

 	struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev);
 	struct aead_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = rctx->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		aead_request_complete(req, ecode);
 	else
 		crypto_finalize_aead_request(jrp->engine, req, ecode);
 	struct caam_drv_private_jr *jrp = dev_get_drvdata(jrdev);
 	int ivsize = crypto_skcipher_ivsize(skcipher);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = rctx->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		skcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_skcipher_request(jrp->engine, req, ecode);
 	if (ivsize || mapped_dst_nents > 1)
 		sg_to_sec4_set_last(edesc->sec4_sg + dst_sg_idx +
-				    mapped_dst_nents);
+				    mapped_dst_nents - 1 + !!ivsize);
 	if (sec4_sg_bytes) {
 		edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,

drivers/crypto/caam/caamhash.c+6−2

 	struct caam_hash_state *state = ahash_request_ctx(req);
 	struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = state->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		req->base.complete(&req->base, ecode);
 	else
 		crypto_finalize_hash_request(jrp->engine, req, ecode);
 	struct caam_hash_state *state = ahash_request_ctx(req);
 	int digestsize = crypto_ahash_digestsize(ahash);
 	int ecode = 0;
+	bool has_bklog;
 	dev_dbg(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
 	edesc = state->edesc;
+	has_bklog = edesc->bklog;
 	if (err)
 		ecode = caam_jr_strstatus(jrdev, err);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		req->base.complete(&req->base, ecode);
 	else
 		crypto_finalize_hash_request(jrp->engine, req, ecode);

drivers/crypto/caam/caampkc.c+6−2

 	struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
 	struct rsa_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	if (err)
 		ecode = caam_jr_strstatus(dev, err);
 	edesc = req_ctx->edesc;
+	has_bklog = edesc->bklog;
 	rsa_pub_unmap(dev, edesc, req);
 	rsa_io_unmap(dev, edesc, req);
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		akcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_akcipher_request(jrp->engine, req, ecode);
 	struct caam_rsa_req_ctx *req_ctx = akcipher_request_ctx(req);
 	struct rsa_edesc *edesc;
 	int ecode = 0;
+	bool has_bklog;
 	if (err)
 		ecode = caam_jr_strstatus(dev, err);
 	edesc = req_ctx->edesc;
+	has_bklog = edesc->bklog;
 	switch (key->priv_form) {
 	case FORM1:
 	 * If no backlog flag, the completion of the request is done
 	 * by CAAM, not crypto engine.
 	 */
-	if (!edesc->bklog)
+	if (!has_bklog)
 		akcipher_request_complete(req, ecode);
 	else
 		crypto_finalize_akcipher_request(jrp->engine, req, ecode);

drivers/crypto/chelsio/chcr_ktls.c+2−4

 static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info,
 					     int new_state)
 {
-	unsigned long flags;
 	/* This function can be called from both rx (interrupt context) and tx
 	 * queue contexts.
 	 */
-	spin_lock_irqsave(&tx_info->lock, flags);
+	spin_lock_bh(&tx_info->lock);
 	switch (tx_info->connection_state) {
 	case KTLS_CONN_CLOSED:
 		tx_info->connection_state = new_state;
 		pr_err("unknown KTLS connection state\n");
 		break;
 	}
-	spin_unlock_irqrestore(&tx_info->lock, flags);
+	spin_unlock_bh(&tx_info->lock);
 	return tx_info->connection_state;
 }

drivers/dma-buf/dma-buf.c+4−3

 		return ret;
-	case DMA_BUF_SET_NAME:
+	case DMA_BUF_SET_NAME_A:
+	case DMA_BUF_SET_NAME_B:
 		return dma_buf_set_name(dmabuf, (const char __user *)arg);
 	default:
  * calls attach() of dma_buf_ops to allow device-specific attach functionality
  * @dmabuf:		[in]	buffer to attach device to.
  * @dev:		[in]	device to be attached.
- * @importer_ops	[in]	importer operations for the attachment
+ * @importer_ops:	[in]	importer operations for the attachment
- * @importer_priv	[in]	importer private pointer for the attachment
+ * @importer_priv:	[in]	importer private pointer for the attachment
  *
  * Returns struct dma_buf_attachment pointer for this attachment. Attachments
  * must be cleaned up by calling dma_buf_detach().

drivers/dma/Kconfig+2−1

@@ -241,7 +241,8 @@ config FSL_RAID · 240 unmodified lines
241		241
242	config HISI_DMA	242	config HISI_DMA
243	tristate "HiSilicon DMA Engine support"	243	tristate "HiSilicon DMA Engine support"
244	depends on ARM64 \|\| (COMPILE_TEST && PCI_MSI)	244	depends on ARM64 \|\| COMPILE_TEST
		245	depends on PCI_MSI
245	select DMA_ENGINE	246	select DMA_ENGINE
246	select DMA_VIRTUAL_CHANNELS	247	select DMA_VIRTUAL_CHANNELS
247	help	248	help

drivers/dma/dmaengine.c+26−34

 	struct dma_chan_dev *chan_dev;
 	chan_dev = container_of(dev, typeof(*chan_dev), device);
-	if (atomic_dec_and_test(chan_dev->idr_ref)) {
-		ida_free(&dma_ida, chan_dev->dev_id);
-		kfree(chan_dev->idr_ref);
-	}
 	kfree(chan_dev);
 }
 }
 static int __dma_async_device_channel_register(struct dma_device *device,
-					       struct dma_chan *chan,
+					       struct dma_chan *chan)
-					       int chan_id)
 {
 	int rc = 0;
-	int chancnt = device->chancnt;
-	atomic_t *idr_ref;
-	struct dma_chan *tchan;
-	tchan = list_first_entry_or_null(&device->channels,
-					 struct dma_chan, device_node);
-	if (!tchan)
-		return -ENODEV;
-	if (tchan->dev) {
-		idr_ref = tchan->dev->idr_ref;
-	} else {
-		idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL);
-		if (!idr_ref)
-			return -ENOMEM;
-		atomic_set(idr_ref, 0);
-	}
 	chan->local = alloc_percpu(typeof(*chan->local));
 	if (!chan->local)
 	 * When the chan_id is a negative value, we are dynamically adding
 	 * the channel. Otherwise we are static enumerating.
 	 */
-	chan->chan_id = chan_id < 0 ? chancnt : chan_id;
+	mutex_lock(&device->chan_mutex);
+	chan->chan_id = ida_alloc(&device->chan_ida, GFP_KERNEL);
+	mutex_unlock(&device->chan_mutex);
+	if (chan->chan_id < 0) {
+		pr_err("%s: unable to alloc ida for chan: %d\n",
+		       __func__, chan->chan_id);
+		goto err_out;
+	}
 	chan->dev->device.class = &dma_devclass;
 	chan->dev->device.parent = device->dev;
 	chan->dev->chan = chan;
-	chan->dev->idr_ref = idr_ref;
 	chan->dev->dev_id = device->dev_id;
-	atomic_inc(idr_ref);
 	dev_set_name(&chan->dev->device, "dma%dchan%d",
 		     device->dev_id, chan->chan_id);
 	rc = device_register(&chan->dev->device);
 	if (rc)
-		goto err_out;
+		goto err_out_ida;
 	chan->client_count = 0;
-	device->chancnt = chan->chan_id + 1;
+	device->chancnt++;
 	return 0;
+ err_out_ida:
+	mutex_lock(&device->chan_mutex);
+	ida_free(&device->chan_ida, chan->chan_id);
+	mutex_unlock(&device->chan_mutex);
  err_out:
 	free_percpu(chan->local);
 	kfree(chan->dev);
-	if (atomic_dec_return(idr_ref) == 0)
-		kfree(idr_ref);
 	return rc;
 }
 {
 	int rc;
-	rc = __dma_async_device_channel_register(device, chan, -1);
+	rc = __dma_async_device_channel_register(device, chan);
 	if (rc < 0)
 		return rc;
 	device->chancnt--;
 	chan->dev->chan = NULL;
 	mutex_unlock(&dma_list_mutex);
+	mutex_lock(&device->chan_mutex);
+	ida_free(&device->chan_ida, chan->chan_id);
+	mutex_unlock(&device->chan_mutex);
 	device_unregister(&chan->dev->device);
 	free_percpu(chan->local);
 }
  */
 int dma_async_device_register(struct dma_device *device)
 {
-	int rc, i = 0;
+	int rc;
 	struct dma_chan* chan;
 	if (!device)
 	if (rc != 0)
 		return rc;
+	mutex_init(&device->chan_mutex);
+	ida_init(&device->chan_ida);
 	/* represent channels in sysfs. Probably want devs too */
 	list_for_each_entry(chan, &device->channels, device_node) {
-		rc = __dma_async_device_channel_register(device, chan, i++);
+		rc = __dma_async_device_channel_register(device, chan);
 		if (rc < 0)
 			goto err_out;
 	}
 	 */
 	dma_cap_set(DMA_PRIVATE, device->cap_mask);
 	dma_channel_rebalance();
+	ida_free(&dma_ida, device->dev_id);
 	dma_device_put(device);
 	mutex_unlock(&dma_list_mutex);
 }

drivers/dma/dmatest.c+3−3

@@ -240,7 +240,7 @@ static bool is_threaded_test_run(struct dmatest_info *info) · 239 unmodified lines
240	struct dmatest_thread *thread;	240	struct dmatest_thread *thread;
241		241
242	list_for_each_entry(thread, &dtc->threads, node) {	242	list_for_each_entry(thread, &dtc->threads, node) {
243	if (!thread->done)	243	if (!thread->done && !thread->pending)
244	return true;	244	return true;
245	}	245	}
246	}	246	}
@@ -662,8 +662,8 @@ static int dmatest_func(void *data) · 415 unmodified lines
662	flags = DMA_CTRL_ACK \| DMA_PREP_INTERRUPT;	662	flags = DMA_CTRL_ACK \| DMA_PREP_INTERRUPT;
663		663
664	ktime = ktime_get();	664	ktime = ktime_get();
665	while (!kthread_should_stop()	665	while (!(kthread_should_stop() \|\|
666	&& !(params->iterations && total_tests >= params->iterations)) {	666	(params->iterations && total_tests >= params->iterations))) {
667	struct dma_async_tx_descriptor *tx = NULL;	667	struct dma_async_tx_descriptor *tx = NULL;
668	struct dmaengine_unmap_data *um;	668	struct dmaengine_unmap_data *um;
669	dma_addr_t *dsts;	669	dma_addr_t *dsts;

drivers/dma/mmp_tdma.c+4−1

 		gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
 				size);
 	tdmac->desc_arr = NULL;
+	if (tdmac->status == DMA_ERROR)
+		tdmac->status = DMA_COMPLETE;
 	return;
 }
 	if (!desc)
 		goto err_out;
-	mmp_tdma_config_write(chan, direction, &tdmac->slave_config);
+	if (mmp_tdma_config_write(chan, direction, &tdmac->slave_config))
+		goto err_out;
 	while (buf < buf_len) {
 		desc = &tdmac->desc_arr[i];

drivers/dma/pch_dma.c+1−1

 	}
 	pci_set_master(pdev);
+	pd->dma.dev = &pdev->dev;
 	err = request_irq(pdev->irq, pd_irq, IRQF_SHARED, DRV_NAME, pd);
 	if (err) {
 		goto err_free_irq;
 	}
-	pd->dma.dev = &pdev->dev;
 	INIT_LIST_HEAD(&pd->dma.channels);

drivers/dma/tegra20-apb-dma.c+9−0

 static void tegra_dma_synchronize(struct dma_chan *dc)
 {
 	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+	int err;
+	err = pm_runtime_get_sync(tdc->tdma->dev);
+	if (err < 0) {
+		dev_err(tdc2dev(tdc), "Failed to synchronize DMA: %d\n", err);
+		return;
+	}
 	/*
 	 * CPU, which handles interrupt, could be busy in
 	wait_event(tdc->wq, tegra_dma_eoc_interrupt_deasserted(tdc));
 	tasklet_kill(&tdc->tasklet);
+	pm_runtime_put(tdc->tdma->dev);
 }
 static unsigned int tegra_dma_sg_bytes_xferred(struct tegra_dma_channel *tdc,

drivers/dma/ti/k3-psil.c+1−0

@@ -27,6 +27,7 @@ struct psil_endpoint_config *psil_get_ep_config(u32 thread_id) · 26 unmodified lines
27	soc_ep_map = &j721e_ep_map;	27	soc_ep_map = &j721e_ep_map;
28	} else {	28	} else {
29	pr_err("PSIL: No compatible machine found for map\n");	29	pr_err("PSIL: No compatible machine found for map\n");
		30	mutex_unlock(&ep_map_mutex);
30	return ERR_PTR(-ENOTSUPP);	31	return ERR_PTR(-ENOTSUPP);
31	}	32	}
32	pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name);	33	pr_debug("%s: Using map for %s\n", __func__, soc_ep_map->name);

drivers/dma/xilinx/xilinx_dma.c+10−10

@@ -1230,16 +1230,16 @@ static enum dma_status xilinx_dma_tx_status(struct dma_chan *dchan, · 1229 unmodified lines
1230	return ret;	1230	return ret;
1231		1231
1232	spin_lock_irqsave(&chan->lock, flags);	1232	spin_lock_irqsave(&chan->lock, flags);
1233		1233	if (!list_empty(&chan->active_list)) {
1234	desc = list_last_entry(&chan->active_list,	1234	desc = list_last_entry(&chan->active_list,
1235	struct xilinx_dma_tx_descriptor, node);	1235	struct xilinx_dma_tx_descriptor, node);
1236	/*	1236	/*
1237	* VDMA and simple mode do not support residue reporting, so the	1237	* VDMA and simple mode do not support residue reporting, so the
1238	* residue field will always be 0.	1238	* residue field will always be 0.
1239	*/	1239	*/
1240	if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA)	1240	if (chan->has_sg && chan->xdev->dma_config->dmatype != XDMA_TYPE_VDMA)
1241	residue = xilinx_dma_get_residue(chan, desc);	1241	residue = xilinx_dma_get_residue(chan, desc);
1242		1242	}
1243	spin_unlock_irqrestore(&chan->lock, flags);	1243	spin_unlock_irqrestore(&chan->lock, flags);
1244		1244
1245	dma_set_residue(txstate, residue);	1245	dma_set_residue(txstate, residue);

drivers/firmware/efi/cper.c+1−1

@@ -101,7 +101,7 @@ void cper_print_bits(const char *pfx, unsigned int bits, · 100 unmodified lines
101	if (!len)	101	if (!len)
102	len = snprintf(buf, sizeof(buf), "%s%s", pfx, str);	102	len = snprintf(buf, sizeof(buf), "%s%s", pfx, str);
103	else	103	else
104	len += snprintf(buf+len, sizeof(buf)-len, ", %s", str);	104	len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str);
105	}	105	}
106	if (len)	106	if (len)
107	printk("%s\n", buf);	107	printk("%s\n", buf);

drivers/firmware/efi/libstub/efistub.h+1−1

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	#define EFI_ALLOC_ALIGN EFI_PAGE_SIZE	25	#define EFI_ALLOC_ALIGN EFI_PAGE_SIZE
26	#endif	26	#endif
27		27
28	#ifdef CONFIG_ARM	28	#if defined(CONFIG_ARM) \|\| defined(CONFIG_X86)
29	#define __efistub_global __section(.data)	29	#define __efistub_global __section(.data)
30	#else	30	#else
31	#define __efistub_global	31	#define __efistub_global

drivers/firmware/efi/libstub/file.c+14−13

  */
 #define EFI_READ_CHUNK_SIZE	SZ_1M
+struct finfo {
+	efi_file_info_t info;
+	efi_char16_t	filename[MAX_FILENAME_SIZE];
+};
 static efi_status_t efi_open_file(efi_file_protocol_t *volume,
-				  efi_char16_t *filename_16,
+				  struct finfo *fi,
 				  efi_file_protocol_t **handle,
 				  unsigned long *file_size)
 {
-	struct {
-		efi_file_info_t info;
-		efi_char16_t	filename[MAX_FILENAME_SIZE];
-	} finfo;
 	efi_guid_t info_guid = EFI_FILE_INFO_ID;
 	efi_file_protocol_t *fh;
 	unsigned long info_sz;
 	efi_status_t status;
-	status = volume->open(volume, &fh, filename_16, EFI_FILE_MODE_READ, 0);
+	status = volume->open(volume, &fh, fi->filename, EFI_FILE_MODE_READ, 0);
 	if (status != EFI_SUCCESS) {
 		pr_efi_err("Failed to open file: ");
-		efi_char16_printk(filename_16);
+		efi_char16_printk(fi->filename);
 		efi_printk("\n");
 		return status;
 	}
-	info_sz = sizeof(finfo);
+	info_sz = sizeof(struct finfo);
-	status = fh->get_info(fh, &info_guid, &info_sz, &finfo);
+	status = fh->get_info(fh, &info_guid, &info_sz, fi);
 	if (status != EFI_SUCCESS) {
 		pr_efi_err("Failed to get file info\n");
 		fh->close(fh);
 	}
 	*handle = fh;
-	*file_size = finfo.info.file_size;
+	*file_size = fi->info.file_size;
 	return EFI_SUCCESS;
 }
 	alloc_addr = alloc_size = 0;
 	do {
-		efi_char16_t filename[MAX_FILENAME_SIZE];
+		struct finfo fi;
 		unsigned long size;
 		void *addr;
 		offset = find_file_option(cmdline, cmdline_len,
 					  optstr, optstr_size,
-					  filename, ARRAY_SIZE(filename));
+					  fi.filename, ARRAY_SIZE(fi.filename));
 		if (!offset)
 			break;
 				return status;
 		}
-		status = efi_open_file(volume, filename, &file, &size);
+		status = efi_open_file(volume, &fi, &file, &size);
 		if (status != EFI_SUCCESS)
 			goto err_close_volume;

drivers/firmware/efi/libstub/x86-stub.c+11−7

 /* Maximum physical address for 64-bit kernel with 4-level paging */
 #define MAXMEM_X86_64_4LEVEL (1ull << 46)
-static efi_system_table_t *sys_table;
+static efi_system_table_t *sys_table __efistub_global;
 extern const bool efi_is64;
 extern u32 image_offset;
 	image_base = efi_table_attr(image, image_base);
 	image_offset = (void *)startup_32 - image_base;
-	hdr = &((struct boot_params *)image_base)->hdr;
 	status = efi_allocate_pages(0x4000, (unsigned long *)&boot_params, ULONG_MAX);
 	if (status != EFI_SUCCESS) {
 		efi_printk("Failed to allocate lowmem for boot params\n");
 	 * now use KERNEL_IMAGE_SIZE, which will be 512MiB, the same as what
 	 * KASLR uses.
 	 *
-	 * Also relocate it if image_offset is zero, i.e. we weren't loaded by
+	 * Also relocate it if image_offset is zero, i.e. the kernel wasn't
-	 * LoadImage, but we are not aligned correctly.
+	 * loaded by LoadImage, but rather by a bootloader that called the
+	 * handover entry. The reason we must always relocate in this case is
+	 * to handle the case of systemd-boot booting a unified kernel image,
+	 * which is a PE executable that contains the bzImage and an initrd as
+	 * COFF sections. The initrd section is placed after the bzImage
+	 * without ensuring that there are at least init_size bytes available
+	 * for the bzImage, and thus the compressed kernel's startup code may
+	 * overwrite the initrd unless it is moved out of the way.
 	 */
 	buffer_start = ALIGN(bzimage_addr - image_offset,
 	if ((buffer_start < LOAD_PHYSICAL_ADDR)				     ||
 	    (IS_ENABLED(CONFIG_X86_32) && buffer_end > KERNEL_IMAGE_SIZE)    ||
 	    (IS_ENABLED(CONFIG_X86_64) && buffer_end > MAXMEM_X86_64_4LEVEL) ||
-	    (image_offset == 0 && !IS_ALIGNED(bzimage_addr,
+	    (image_offset == 0)) {
-					      hdr->kernel_alignment))) {
 		status = efi_relocate_kernel(&bzimage_addr,
 					     hdr->init_size, hdr->init_size,
 					     hdr->pref_address,

drivers/firmware/imx/Kconfig+2−2

@@ -12,7 +12,7 @@ config IMX_DSP · 11 unmodified lines
12		12
13	config IMX_SCU	13	config IMX_SCU
14	bool "IMX SCU Protocol driver"	14	bool "IMX SCU Protocol driver"
15	depends on IMX_MBOX \|\| COMPILE_TEST	15	depends on IMX_MBOX
16	help	16	help
17	The System Controller Firmware (SCFW) is a low-level system function	17	The System Controller Firmware (SCFW) is a low-level system function
18	which runs on a dedicated Cortex-M core to provide power, clock, and	18	which runs on a dedicated Cortex-M core to provide power, clock, and
@@ -24,6 +24,6 @@ config IMX_SCU · 5 unmodified lines
24		24
25	config IMX_SCU_PD	25	config IMX_SCU_PD
26	bool "IMX SCU Power Domain driver"	26	bool "IMX SCU Power Domain driver"
27	depends on IMX_SCU \|\| COMPILE_TEST	27	depends on IMX_SCU
28	help	28	help
29	The System Controller Firmware (SCFW) based power domain driver.	29	The System Controller Firmware (SCFW) based power domain driver.

drivers/firmware/xilinx/zynqmp-debug.c+1−1

@@ -35,7 +35,7 @@ static struct pm_api_info pm_api_list[] = { · 34 unmodified lines
35	PM_API(PM_QUERY_DATA),	35	PM_API(PM_QUERY_DATA),
36	};	36	};
37		37
38	struct dentry *firmware_debugfs_root;	38	static struct dentry *firmware_debugfs_root;
39		39
40	/**	40	/**
41	* zynqmp_pm_argument_value() - Extract argument value from a PM-API request	41	* zynqmp_pm_argument_value() - Extract argument value from a PM-API request

drivers/fpga/dfl-pci.c+4−2

 			return ret;
 		ret = pci_enable_sriov(pcidev, num_vfs);
-		if (ret)
+		if (ret) {
 			dfl_fpga_cdev_config_ports_pf(cdev);
+			return ret;
+		}
 	}
-	return ret;
+	return num_vfs;
 }
 static void cci_pci_remove(struct pci_dev *pcidev)

drivers/fpga/zynq-fpga.c+2−1

@@ -583,7 +583,8 @@ static int zynq_fpga_probe(struct platform_device *pdev) · 582 unmodified lines
583		583
584	priv->clk = devm_clk_get(dev, "ref_clk");	584	priv->clk = devm_clk_get(dev, "ref_clk");
585	if (IS_ERR(priv->clk)) {	585	if (IS_ERR(priv->clk)) {
586	dev_err(dev, "input clock not found\n");	586	if (PTR_ERR(priv->clk) != -EPROBE_DEFER)
		587	dev_err(dev, "input clock not found\n");
587	return PTR_ERR(priv->clk);	588	return PTR_ERR(priv->clk);
588	}	589	}
589		590

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+20−2

@@ -2008,8 +2008,24 @@ static void amdgpu_device_fill_reset_magic(struct amdgpu_device *adev) · 2007 unmodified lines
2008	*/	2008	*/
2009	static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)	2009	static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)
2010	{	2010	{
2011	return !!memcmp(adev->gart.ptr, adev->reset_magic,	2011	if (memcmp(adev->gart.ptr, adev->reset_magic,
2012	AMDGPU_RESET_MAGIC_NUM);	2012	AMDGPU_RESET_MAGIC_NUM))
		2013	return true;
		2014
		2015	if (!adev->in_gpu_reset)
		2016	return false;
		2017
		2018	/*
		2019	* For all ASICs with baco/mode1 reset, the VRAM is
		2020	* always assumed to be lost.
		2021	*/
		2022	switch (amdgpu_asic_reset_method(adev)) {
		2023	case AMD_RESET_METHOD_BACO:
		2024	case AMD_RESET_METHOD_MODE1:
		2025	return true;
		2026	default:
		2027	return false;
		2028	}
2013	}	2029	}
2014		2030
2015	/**	2031	/**
@@ -2340,6 +2356,8 @@ static int amdgpu_device_ip_suspend_phase1(struct amdgpu_device *adev) · 324 unmodified lines
2340	{	2356	{
2341	int i, r;	2357	int i, r;
2342		2358
		2359	amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);
		2360	amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);
2343		2361
2344	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {	2362	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
2345	if (!adev->ip_blocks[i].status.valid)	2363	if (!adev->ip_blocks[i].status.valid)

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+2−1

  * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches
  * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask
  * - 3.36.0 - Allow reading more status registers on si/cik
+ * - 3.37.0 - L2 is invalidated before SDMA IBs, needed for correctness
  */
 #define KMS_DRIVER_MAJOR	3
-#define KMS_DRIVER_MINOR	36
+#define KMS_DRIVER_MINOR	37
 #define KMS_DRIVER_PATCHLEVEL	0
 int amdgpu_vram_limit = 0;

drivers/gpu/drm/amd/amdgpu/cik.c+0−2

@@ -1358,8 +1358,6 @@ static int cik_asic_reset(struct amdgpu_device *adev) · 1357 unmodified lines
1358	int r;	1358	int r;
1359		1359
1360	if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {	1360	if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
1361	if (!adev->in_suspend)
1362	amdgpu_inc_vram_lost(adev);
1363	r = amdgpu_dpm_baco_reset(adev);	1361	r = amdgpu_dpm_baco_reset(adev);
1364	} else {	1362	} else {
1365	r = cik_asic_pci_config_reset(adev);	1363	r = cik_asic_pci_config_reset(adev);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+1−1

@@ -279,7 +279,7 @@ static const struct soc15_reg_golden golden_settings_gc_10_1_2_nv12[] = · 278 unmodified lines
279		279
280	#define DEFAULT_SH_MEM_CONFIG \	280	#define DEFAULT_SH_MEM_CONFIG \
281	((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) \| \	281	((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) \| \
282	(SH_MEM_ALIGNMENT_MODE_DWORD << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) \| \	282	(SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) \| \
283	(SH_MEM_RETRY_MODE_ALL << SH_MEM_CONFIG__RETRY_MODE__SHIFT) \| \	283	(SH_MEM_RETRY_MODE_ALL << SH_MEM_CONFIG__RETRY_MODE__SHIFT) \| \
284	(3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT))	284	(3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT))
285		285

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c+2−0

@@ -1234,6 +1234,8 @@ struct amdgpu_gfxoff_quirk { · 1233 unmodified lines
1234	static const struct amdgpu_gfxoff_quirk amdgpu_gfxoff_quirk_list[] = {	1234	static const struct amdgpu_gfxoff_quirk amdgpu_gfxoff_quirk_list[] = {
1235	/* https://bugzilla.kernel.org/show_bug.cgi?id=204689 */	1235	/* https://bugzilla.kernel.org/show_bug.cgi?id=204689 */
1236	{ 0x1002, 0x15dd, 0x1002, 0x15dd, 0xc8 },	1236	{ 0x1002, 0x15dd, 0x1002, 0x15dd, 0xc8 },
		1237	/* https://bugzilla.kernel.org/show_bug.cgi?id=207171 */
		1238	{ 0x1002, 0x15dd, 0x103c, 0x83e7, 0xd3 },
1237	{ 0, 0, 0, 0, 0 },	1239	{ 0, 0, 0, 0, 0 },
1238	};	1240	};
1239		1241

drivers/gpu/drm/amd/amdgpu/navi10_sdma_pkt_open.h+16−0

@@ -73,6 +73,22 @@ · 72 unmodified lines
73	#define SDMA_OP_AQL_COPY 0	73	#define SDMA_OP_AQL_COPY 0
74	#define SDMA_OP_AQL_BARRIER_OR 0	74	#define SDMA_OP_AQL_BARRIER_OR 0
75		75
		76	#define SDMA_GCR_RANGE_IS_PA (1 << 18)
		77	#define SDMA_GCR_SEQ(x) (((x) & 0x3) << 16)
		78	#define SDMA_GCR_GL2_WB (1 << 15)
		79	#define SDMA_GCR_GL2_INV (1 << 14)
		80	#define SDMA_GCR_GL2_DISCARD (1 << 13)
		81	#define SDMA_GCR_GL2_RANGE(x) (((x) & 0x3) << 11)
		82	#define SDMA_GCR_GL2_US (1 << 10)
		83	#define SDMA_GCR_GL1_INV (1 << 9)
		84	#define SDMA_GCR_GLV_INV (1 << 8)
		85	#define SDMA_GCR_GLK_INV (1 << 7)
		86	#define SDMA_GCR_GLK_WB (1 << 6)
		87	#define SDMA_GCR_GLM_INV (1 << 5)
		88	#define SDMA_GCR_GLM_WB (1 << 4)
		89	#define SDMA_GCR_GL1_RANGE(x) (((x) & 0x3) << 2)
		90	#define SDMA_GCR_GLI_INV(x) (((x) & 0x3) << 0)
		91
76	/define for op field/	92	/define for op field/
77	#define SDMA_PKT_HEADER_op_offset 0	93	#define SDMA_PKT_HEADER_op_offset 0
78	#define SDMA_PKT_HEADER_op_mask 0x000000FF	94	#define SDMA_PKT_HEADER_op_mask 0x000000FF

drivers/gpu/drm/amd/amdgpu/nv.c+0−4

 	struct smu_context *smu = &adev->smu;
 	if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
-		if (!adev->in_suspend)
-			amdgpu_inc_vram_lost(adev);
 		ret = smu_baco_enter(smu);
 		if (ret)
 			return ret;
 		if (ret)
 			return ret;
 	} else {
-		if (!adev->in_suspend)
-			amdgpu_inc_vram_lost(adev);
 		ret = nv_asic_mode1_reset(adev);
 	}

drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c+13−1

 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
 	uint64_t csa_mc_addr = amdgpu_sdma_get_csa_mc_addr(ring, vmid);
+	/* Invalidate L2, because if we don't do it, we might get stale cache
+	 * lines from previous IBs.
+	 */
+	amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_GCR_REQ));
+	amdgpu_ring_write(ring, 0);
+	amdgpu_ring_write(ring, (SDMA_GCR_GL2_INV |
+				 SDMA_GCR_GL2_WB |
+				 SDMA_GCR_GLM_INV |
+				 SDMA_GCR_GLM_WB) << 16);
+	amdgpu_ring_write(ring, 0xffffff80);
+	amdgpu_ring_write(ring, 0xffff);
 	/* An IB packet must end on a 8 DW boundary--the next dword
 	 * must be on a 8-dword boundary. Our IB packet below is 6
 	 * dwords long, thus add x number of NOPs, such that, in
 		SOC15_FLUSH_GPU_TLB_NUM_WREG * 3 +
 		SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 6 * 2 +
 		10 + 10 + 10, /* sdma_v5_0_ring_emit_fence x3 for user fence, vm fence */
-	.emit_ib_size = 7 + 6, /* sdma_v5_0_ring_emit_ib */
+	.emit_ib_size = 5 + 7 + 6, /* sdma_v5_0_ring_emit_ib */
 	.emit_ib = sdma_v5_0_ring_emit_ib,
 	.emit_fence = sdma_v5_0_ring_emit_fence,
 	.emit_pipeline_sync = sdma_v5_0_ring_emit_pipeline_sync,

drivers/gpu/drm/amd/amdgpu/soc15.c+0−4

 	switch (soc15_asic_reset_method(adev)) {
 		case AMD_RESET_METHOD_BACO:
-			if (!adev->in_suspend)
-				amdgpu_inc_vram_lost(adev);
 			return soc15_asic_baco_reset(adev);
 		case AMD_RESET_METHOD_MODE2:
 			return amdgpu_dpm_mode2_reset(adev);
 		default:
-			if (!adev->in_suspend)
-				amdgpu_inc_vram_lost(adev);
 			return soc15_asic_mode1_reset(adev);
 	}
 }

drivers/gpu/drm/amd/amdgpu/vi.c+0−2

@@ -765,8 +765,6 @@ static int vi_asic_reset(struct amdgpu_device *adev) · 764 unmodified lines
765	int r;	765	int r;
766		766
767	if (vi_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {	767	if (vi_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
768	if (!adev->in_suspend)
769	amdgpu_inc_vram_lost(adev);
770	r = amdgpu_dpm_baco_reset(adev);	768	r = amdgpu_dpm_baco_reset(adev);
771	} else {	769	} else {
772	r = vi_asic_pci_config_reset(adev);	770	r = vi_asic_pci_config_reset(adev);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+41−11

 			  const union dc_tiling_info *tiling_info,
 			  const uint64_t info,
 			  struct dc_plane_dcc_param *dcc,
-			  struct dc_plane_address *address)
+			  struct dc_plane_address *address,
+			  bool force_disable_dcc)
 {
 	struct dc *dc = adev->dm.dc;
 	struct dc_dcc_surface_param input;
 	memset(&input, 0, sizeof(input));
 	memset(&output, 0, sizeof(output));
+	if (force_disable_dcc)
+		return 0;
 	if (!offset)
 		return 0;
 			     union dc_tiling_info *tiling_info,
 			     struct plane_size *plane_size,
 			     struct dc_plane_dcc_param *dcc,
-			     struct dc_plane_address *address)
+			     struct dc_plane_address *address,
+			     bool force_disable_dcc)
 {
 	const struct drm_framebuffer *fb = &afb->base;
 	int ret;
 		ret = fill_plane_dcc_attributes(adev, afb, format, rotation,
 						plane_size, tiling_info,
-						tiling_flags, dcc, address);
+						tiling_flags, dcc, address,
+						force_disable_dcc);
 		if (ret)
 			return ret;
 	}
 			    const struct drm_plane_state *plane_state,
 			    const uint64_t tiling_flags,
 			    struct dc_plane_info *plane_info,
-			    struct dc_plane_address *address)
+			    struct dc_plane_address *address,
+			    bool force_disable_dcc)
 {
 	const struct drm_framebuffer *fb = plane_state->fb;
 	const struct amdgpu_framebuffer *afb =
 					   plane_info->rotation, tiling_flags,
 					   &plane_info->tiling_info,
 					   &plane_info->plane_size,
-					   &plane_info->dcc, address);
+					   &plane_info->dcc, address,
+					   force_disable_dcc);
 	if (ret)
 		return ret;
 	struct dc_plane_info plane_info;
 	uint64_t tiling_flags;
 	int ret;
+	bool force_disable_dcc = false;
 	ret = fill_dc_scaling_info(plane_state, &scaling_info);
 	if (ret)
 	if (ret)
 		return ret;
+	force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend;
 	ret = fill_dc_plane_info_and_addr(adev, plane_state, tiling_flags,
 					  &plane_info,
-					  &dc_plane_state->address);
+					  &dc_plane_state->address,
+					  force_disable_dcc);
 	if (ret)
 		return ret;
 		i2c_del_adapter(&aconnector->i2c->base);
 		kfree(aconnector->i2c);
 	}
+	kfree(aconnector->dm_dp_aux.aux.name);
 	kfree(connector);
 }
 static int
 amdgpu_dm_connector_late_register(struct drm_connector *connector)
 {
-#if defined(CONFIG_DEBUG_FS)
 	struct amdgpu_dm_connector *amdgpu_dm_connector =
 		to_amdgpu_dm_connector(connector);
+	int r;
+	if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+	    (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
+		amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev;
+		r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux);
+		if (r)
+			return r;
+	}
+#if defined(CONFIG_DEBUG_FS)
 	connector_debugfs_init(amdgpu_dm_connector);
 #endif
 	uint64_t tiling_flags;
 	uint32_t domain;
 	int r;
+	bool force_disable_dcc = false;
 	dm_plane_state_old = to_dm_plane_state(plane->state);
 	dm_plane_state_new = to_dm_plane_state(new_state);
 			dm_plane_state_old->dc_state != dm_plane_state_new->dc_state) {
 		struct dc_plane_state *plane_state = dm_plane_state_new->dc_state;
+		force_disable_dcc = adev->asic_type == CHIP_RAVEN && adev->in_suspend;
 		fill_plane_buffer_attributes(
 			adev, afb, plane_state->format, plane_state->rotation,
 			tiling_flags, &plane_state->tiling_info,
 			&plane_state->plane_size, &plane_state->dcc,
-			&plane_state->address);
+			&plane_state->address,
+			force_disable_dcc);
 	}
 	return 0;
 	if (connector_type == DRM_MODE_CONNECTOR_DisplayPort
 		|| connector_type == DRM_MODE_CONNECTOR_eDP)
-		amdgpu_dm_initialize_dp_connector(dm, aconnector);
+		amdgpu_dm_initialize_dp_connector(dm, aconnector, link->link_index);
 out_free:
 	if (res) {
 		fill_dc_plane_info_and_addr(
 			dm->adev, new_plane_state, tiling_flags,
 			&bundle->plane_infos[planes_count],
-			&bundle->flip_addrs[planes_count].address);
+			&bundle->flip_addrs[planes_count].address,
+			false);
+		DRM_DEBUG_DRIVER("plane: id=%d dcc_en=%d\n",
+				 new_plane_state->plane->index,
+				 bundle->plane_infos[planes_count].dcc.enable);
 		bundle->surface_updates[planes_count].plane_info =
 			&bundle->plane_infos[planes_count];
 				ret = fill_dc_plane_info_and_addr(
 					dm->adev, new_plane_state, tiling_flags,
 					plane_info,
-					&flip_addr->address);
+					&flip_addr->address,
+					false);
 				if (ret)
 					goto cleanup;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+9−6

 		to_amdgpu_dm_connector(connector);
 	int r;
-	amdgpu_dm_connector->dm_dp_aux.aux.dev = connector->kdev;
+	r = drm_dp_mst_connector_late_register(connector,
-	r = drm_dp_aux_register(&amdgpu_dm_connector->dm_dp_aux.aux);
+					       amdgpu_dm_connector->port);
-	if (r)
+	if (r < 0)
 		return r;
 #if defined(CONFIG_DEBUG_FS)
 	connector_debugfs_init(amdgpu_dm_connector);
 #endif
-	return r;
+	return 0;
 }
 static void
 };
 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
-				       struct amdgpu_dm_connector *aconnector)
+				       struct amdgpu_dm_connector *aconnector,
+				       int link_index)
 {
-	aconnector->dm_dp_aux.aux.name = "dmdc";
+	aconnector->dm_dp_aux.aux.name =
+		kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
+			  link_index);
 	aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 	aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h+2−1

@@ -32,7 +32,8 @@ struct amdgpu_dm_connector; · 31 unmodified lines
32	int dm_mst_get_pbn_divider(struct dc_link *link);	32	int dm_mst_get_pbn_divider(struct dc_link *link);
33		33
34	void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,	34	void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
35	struct amdgpu_dm_connector *aconnector);	35	struct amdgpu_dm_connector *aconnector,
		36	int link_index);
36		37
37	#if defined(CONFIG_DRM_AMD_DC_DCN)	38	#if defined(CONFIG_DRM_AMD_DC_DCN)
38	bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,	39	bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+27−0

@@ -2908,6 +2908,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link link, union hpd_irq_data out_hpd · 2907 unmodified lines
2908	sizeof(hpd_irq_dpcd_data),	2908	sizeof(hpd_irq_dpcd_data),
2909	"Status: ");	2909	"Status: ");
2910		2910
		2911	for (i = 0; i < MAX_PIPES; i++) {
		2912	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
		2913	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
		2914	link->dc->hwss.blank_stream(pipe_ctx);
		2915	}
		2916
2911	for (i = 0; i < MAX_PIPES; i++) {	2917	for (i = 0; i < MAX_PIPES; i++) {
2912	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];	2918	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
2913	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)	2919	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
@@ -2927,6 +2933,12 @@ bool dc_link_handle_hpd_rx_irq(struct dc_link link, union hpd_irq_data out_hpd · 13 unmodified lines
2927	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)	2933	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
2928	dc_link_reallocate_mst_payload(link);	2934	dc_link_reallocate_mst_payload(link);
2929		2935
		2936	for (i = 0; i < MAX_PIPES; i++) {
		2937	pipe_ctx = &link->dc->current_state->res_ctx.pipe_ctx[i];
		2938	if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->link == link)
		2939	link->dc->hwss.unblank_stream(pipe_ctx, &previous_link_settings);
		2940	}
		2941
2930	status = false;	2942	status = false;
2931	if (out_link_loss)	2943	if (out_link_loss)
2932	*out_link_loss = true;	2944	*out_link_loss = true;
@@ -4227,6 +4239,21 @@ void dp_set_fec_enable(struct dc_link *link, bool enable) · 1294 unmodified lines
4227	void dpcd_set_source_specific_data(struct dc_link *link)	4239	void dpcd_set_source_specific_data(struct dc_link *link)
4228	{	4240	{
4229	const uint32_t post_oui_delay = 30; // 30ms	4241	const uint32_t post_oui_delay = 30; // 30ms
		4242	uint8_t dspc = 0;
		4243	enum dc_status ret = DC_ERROR_UNEXPECTED;
		4244
		4245	ret = core_link_read_dpcd(link, DP_DOWN_STREAM_PORT_COUNT, &dspc,
		4246	sizeof(dspc));
		4247
		4248	if (ret != DC_OK) {
		4249	DC_LOG_ERROR("Error in DP aux read transaction,"
		4250	" not writing source specific data\n");
		4251	return;
		4252	}
		4253
		4254	/* Return if OUI unsupported */
		4255	if (!(dspc & DP_OUI_SUPPORT))
		4256	return;
4230		4257
4231	if (!link->dc->vendor_signature.is_valid) {	4258	if (!link->dc->vendor_signature.is_valid) {
4232	struct dpcd_amd_signature amd_signature;	4259	struct dpcd_amd_signature amd_signature;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c+4−36

@@ -231,34 +231,6 @@ struct dc_stream_status *dc_stream_get_status( · 230 unmodified lines
231	return dc_stream_get_status_from_state(dc->current_state, stream);	231	return dc_stream_get_status_from_state(dc->current_state, stream);
232	}	232	}
233		233
234	static void delay_cursor_until_vupdate(struct pipe_ctx pipe_ctx, struct dc dc)
235	{
236	#if defined(CONFIG_DRM_AMD_DC_DCN)
237	unsigned int vupdate_line;
238	unsigned int lines_to_vupdate, us_to_vupdate, vpos, nvpos;
239	struct dc_stream_state *stream = pipe_ctx->stream;
240	unsigned int us_per_line;
241
242	if (stream->ctx->asic_id.chip_family == FAMILY_RV &&
243	ASICREV_IS_RAVEN(stream->ctx->asic_id.hw_internal_rev)) {
244
245	vupdate_line = dc->hwss.get_vupdate_offset_from_vsync(pipe_ctx);
246	if (!dc_stream_get_crtc_position(dc, &stream, 1, &vpos, &nvpos))
247	return;
248
249	if (vpos >= vupdate_line)
250	return;
251
252	us_per_line = stream->timing.h_total * 10000 / stream->timing.pix_clk_100hz;
253	lines_to_vupdate = vupdate_line - vpos;
254	us_to_vupdate = lines_to_vupdate * us_per_line;
255
256	/* 70 us is a conservative estimate of cursor update time*/
257	if (us_to_vupdate < 70)
258	udelay(us_to_vupdate);
259	}
260	#endif
261	}
262		234
263	/**	235	/**
264	* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address	236	* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
@@ -298,9 +270,7 @@ bool dc_stream_set_cursor_attributes( · 33 unmodified lines
298		270
299	if (!pipe_to_program) {	271	if (!pipe_to_program) {
300	pipe_to_program = pipe_ctx;	272	pipe_to_program = pipe_ctx;
301		273	dc->hwss.cursor_lock(dc, pipe_to_program, true);
302	delay_cursor_until_vupdate(pipe_ctx, dc);
303	dc->hwss.pipe_control_lock(dc, pipe_to_program, true);
304	}	274	}
305		275
306	dc->hwss.set_cursor_attribute(pipe_ctx);	276	dc->hwss.set_cursor_attribute(pipe_ctx);
@@ -309,7 +279,7 @@ bool dc_stream_set_cursor_attributes( · 2 unmodified lines
309	}	279	}
310		280
311	if (pipe_to_program)	281	if (pipe_to_program)
312	dc->hwss.pipe_control_lock(dc, pipe_to_program, false);	282	dc->hwss.cursor_lock(dc, pipe_to_program, false);
313		283
314	return true;	284	return true;
315	}	285	}
@@ -349,16 +319,14 @@ bool dc_stream_set_cursor_position( · 33 unmodified lines
349		319
350	if (!pipe_to_program) {	320	if (!pipe_to_program) {
351	pipe_to_program = pipe_ctx;	321	pipe_to_program = pipe_ctx;
352		322	dc->hwss.cursor_lock(dc, pipe_to_program, true);
353	delay_cursor_until_vupdate(pipe_ctx, dc);
354	dc->hwss.pipe_control_lock(dc, pipe_to_program, true);
355	}	323	}
356		324
357	dc->hwss.set_cursor_position(pipe_ctx);	325	dc->hwss.set_cursor_position(pipe_ctx);
358	}	326	}
359		327
360	if (pipe_to_program)	328	if (pipe_to_program)
361	dc->hwss.pipe_control_lock(dc, pipe_to_program, false);	329	dc->hwss.cursor_lock(dc, pipe_to_program, false);
362		330
363	return true;	331	return true;
364	}	332	}

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+1−0

@@ -2757,6 +2757,7 @@ static const struct hw_sequencer_funcs dce110_funcs = { · 2756 unmodified lines
2757	.disable_plane = dce110_power_down_fe,	2757	.disable_plane = dce110_power_down_fe,
2758	.pipe_control_lock = dce_pipe_control_lock,	2758	.pipe_control_lock = dce_pipe_control_lock,
2759	.interdependent_update_lock = NULL,	2759	.interdependent_update_lock = NULL,
		2760	.cursor_lock = dce_pipe_control_lock,
2760	.prepare_bandwidth = dce110_prepare_bandwidth,	2761	.prepare_bandwidth = dce110_prepare_bandwidth,
2761	.optimize_bandwidth = dce110_optimize_bandwidth,	2762	.optimize_bandwidth = dce110_optimize_bandwidth,
2762	.set_drr = set_drr,	2763	.set_drr = set_drr,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c+10−0

@@ -1625,6 +1625,16 @@ void dcn10_pipe_control_lock( · 1624 unmodified lines
1625	hws->funcs.verify_allow_pstate_change_high(dc);	1625	hws->funcs.verify_allow_pstate_change_high(dc);
1626	}	1626	}
1627		1627
		1628	void dcn10_cursor_lock(struct dc dc, struct pipe_ctx pipe, bool lock)
		1629	{
		1630	/* cursor lock is per MPCC tree, so only need to lock one pipe per stream */
		1631	if (!pipe \|\| pipe->top_pipe)
		1632	return;
		1633
		1634	dc->res_pool->mpc->funcs->cursor_lock(dc->res_pool->mpc,
		1635	pipe->stream_res.opp->inst, lock);
		1636	}
		1637
1628	static bool wait_for_reset_trigger_to_occur(	1638	static bool wait_for_reset_trigger_to_occur(
1629	struct dc_context *dc_ctx,	1639	struct dc_context *dc_ctx,
1630	struct timing_generator *tg)	1640	struct timing_generator *tg)

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h+1−0

@@ -49,6 +49,7 @@ void dcn10_pipe_control_lock( · 48 unmodified lines
49	struct dc *dc,	49	struct dc *dc,
50	struct pipe_ctx *pipe,	50	struct pipe_ctx *pipe,
51	bool lock);	51	bool lock);
		52	void dcn10_cursor_lock(struct dc dc, struct pipe_ctx pipe, bool lock);
52	void dcn10_blank_pixel_data(	53	void dcn10_blank_pixel_data(
53	struct dc *dc,	54	struct dc *dc,
54	struct pipe_ctx *pipe_ctx,	55	struct pipe_ctx *pipe_ctx,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_init.c+1−0

@@ -50,6 +50,7 @@ static const struct hw_sequencer_funcs dcn10_funcs = { · 49 unmodified lines
50	.disable_audio_stream = dce110_disable_audio_stream,	50	.disable_audio_stream = dce110_disable_audio_stream,
51	.disable_plane = dcn10_disable_plane,	51	.disable_plane = dcn10_disable_plane,
52	.pipe_control_lock = dcn10_pipe_control_lock,	52	.pipe_control_lock = dcn10_pipe_control_lock,
		53	.cursor_lock = dcn10_cursor_lock,
53	.interdependent_update_lock = dcn10_lock_all_pipes,	54	.interdependent_update_lock = dcn10_lock_all_pipes,
54	.prepare_bandwidth = dcn10_prepare_bandwidth,	55	.prepare_bandwidth = dcn10_prepare_bandwidth,
55	.optimize_bandwidth = dcn10_optimize_bandwidth,	56	.optimize_bandwidth = dcn10_optimize_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c+15−0

 	REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, dpp_id);
 	REG_SET(MPCC_OPP_ID[mpcc_id], 0, MPCC_OPP_ID, tree->opp_id);
+	/* Configure VUPDATE lock set for this MPCC to map to the OPP */
+	REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, tree->opp_id);
 	/* update mpc tree mux setting */
 	if (tree->opp_list == insert_above_mpcc) {
 		/* insert the toppest mpcc */
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 		/* mark this mpcc as not in use */
 		mpc10->mpcc_in_use_mask &= ~(1 << mpcc_id);
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 	}
 }
 		REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 		REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 		REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+		REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 		mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id);
 	}
 	REG_SET(MPCC_TOP_SEL[mpcc_id], 0, MPCC_TOP_SEL, 0xf);
 	REG_SET(MPCC_BOT_SEL[mpcc_id], 0, MPCC_BOT_SEL, 0xf);
 	REG_SET(MPCC_OPP_ID[mpcc_id],  0, MPCC_OPP_ID,  0xf);
+	REG_SET(MPCC_UPDATE_LOCK_SEL[mpcc_id], 0, MPCC_UPDATE_LOCK_SEL, 0xf);
 	mpc1_init_mpcc(&(mpc->mpcc_array[mpcc_id]), mpcc_id);
 			MPCC_BUSY, &s->busy);
 }
+void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock)
+{
+	struct dcn10_mpc *mpc10 = TO_DCN10_MPC(mpc);
+	REG_SET(CUR[opp_id], 0, CUR_VUPDATE_LOCK_SET, lock ? 1 : 0);
+}
 static const struct mpc_funcs dcn10_mpc_funcs = {
 	.read_mpcc_state = mpc1_read_mpcc_state,
 	.insert_plane = mpc1_insert_plane,
 	.assert_mpcc_idle_before_connect = mpc1_assert_mpcc_idle_before_connect,
 	.init_mpcc_list_from_hw = mpc1_init_mpcc_list_from_hw,
 	.update_blending = mpc1_update_blending,
+	.cursor_lock = mpc1_cursor_lock,
 	.set_denorm = NULL,
 	.set_denorm_clamp = NULL,
 	.set_output_csc = NULL,

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.h+14−6

 	SRII(MPCC_BG_G_Y, MPCC, inst),\
 	SRII(MPCC_BG_R_CR, MPCC, inst),\
 	SRII(MPCC_BG_B_CB, MPCC, inst),\
-	SRII(MPCC_BG_B_CB, MPCC, inst),\
+	SRII(MPCC_SM_CONTROL, MPCC, inst),\
-	SRII(MPCC_SM_CONTROL, MPCC, inst)
+	SRII(MPCC_UPDATE_LOCK_SEL, MPCC, inst)
 #define MPC_OUT_MUX_COMMON_REG_LIST_DCN1_0(inst) \
-	SRII(MUX, MPC_OUT, inst)
+	SRII(MUX, MPC_OUT, inst),\
+	VUPDATE_SRII(CUR, VUPDATE_LOCK_SET, inst)
 #define MPC_COMMON_REG_VARIABLE_LIST \
 	uint32_t MPCC_TOP_SEL[MAX_MPCC]; \
 	uint32_t MPCC_BG_R_CR[MAX_MPCC]; \
 	uint32_t MPCC_BG_B_CB[MAX_MPCC]; \
 	uint32_t MPCC_SM_CONTROL[MAX_MPCC]; \
-	uint32_t MUX[MAX_OPP];
+	uint32_t MUX[MAX_OPP]; \
+	uint32_t MPCC_UPDATE_LOCK_SEL[MAX_MPCC]; \
+	uint32_t CUR[MAX_OPP];
 #define MPC_COMMON_MASK_SH_LIST_DCN1_0(mask_sh)\
 	SF(MPCC0_MPCC_TOP_SEL, MPCC_TOP_SEL, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FIELD_ALT, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_FRAME_POL, mask_sh),\
 	SF(MPCC0_MPCC_SM_CONTROL, MPCC_SM_FORCE_NEXT_TOP_POL, mask_sh),\
-	SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh)
+	SF(MPC_OUT0_MUX, MPC_OUT_MUX, mask_sh),\
+	SF(MPCC0_MPCC_UPDATE_LOCK_SEL, MPCC_UPDATE_LOCK_SEL, mask_sh)
 #define MPC_REG_FIELD_LIST(type) \
 	type MPCC_TOP_SEL;\
 	type MPCC_SM_FIELD_ALT;\
 	type MPCC_SM_FORCE_NEXT_FRAME_POL;\
 	type MPCC_SM_FORCE_NEXT_TOP_POL;\
-	type MPC_OUT_MUX;
+	type MPC_OUT_MUX;\
+	type MPCC_UPDATE_LOCK_SEL;\
+	type CUR_VUPDATE_LOCK_SET;
 struct dcn_mpc_registers {
 	MPC_COMMON_REG_VARIABLE_LIST
 		int mpcc_inst,
 		struct mpcc_state *s);
+void mpc1_cursor_lock(struct mpc *mpc, int opp_id, bool lock);
 #endif

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+12−2

 	.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
 					mm ## block ## id ## _ ## reg_name
+#define VUPDATE_SRII(reg_name, block, id)\
+	.reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \
+					mm ## reg_name ## 0 ## _ ## block ## id
+/* set field/register/bitfield name */
+#define SFRB(field_name, reg_name, bitfield, post_fix)\
+	.field_name = reg_name ## __ ## bitfield ## post_fix
 /* NBIO */
 #define NBIO_BASE_INNER(seg) \
 	NBIF_BASE__INST0_SEG ## seg
 };
 static const struct dcn_mpc_shift mpc_shift = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT)
+	MPC_COMMON_MASK_SH_LIST_DCN1_0(__SHIFT),\
+	SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, __SHIFT)
 };
 static const struct dcn_mpc_mask mpc_mask = {
-	MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),
+	MPC_COMMON_MASK_SH_LIST_DCN1_0(_MASK),\
+	SFRB(CUR_VUPDATE_LOCK_SET, CUR0_VUPDATE_LOCK_SET0, CUR0_VUPDATE_LOCK_SET, _MASK)
 };
 #define tg_regs(id)\

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c+2−1

@@ -2294,7 +2294,8 @@ void dcn20_fpga_init_hw(struct dc *dc) · 2293 unmodified lines
2294		2294
2295	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);	2295	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2);
2296	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);	2296	REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1);
2297	REG_WRITE(REFCLK_CNTL, 0);	2297	if (REG(REFCLK_CNTL))
		2298	REG_WRITE(REFCLK_CNTL, 0);
2298	//	2299	//
2299		2300
2300		2301

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_init.c+1−0

@@ -52,6 +52,7 @@ static const struct hw_sequencer_funcs dcn20_funcs = { · 51 unmodified lines
52	.disable_plane = dcn20_disable_plane,	52	.disable_plane = dcn20_disable_plane,
53	.pipe_control_lock = dcn20_pipe_control_lock,	53	.pipe_control_lock = dcn20_pipe_control_lock,
54	.interdependent_update_lock = dcn10_lock_all_pipes,	54	.interdependent_update_lock = dcn10_lock_all_pipes,
		55	.cursor_lock = dcn10_cursor_lock,
55	.prepare_bandwidth = dcn20_prepare_bandwidth,	56	.prepare_bandwidth = dcn20_prepare_bandwidth,
56	.optimize_bandwidth = dcn20_optimize_bandwidth,	57	.optimize_bandwidth = dcn20_optimize_bandwidth,
57	.update_bandwidth = dcn20_update_bandwidth,	58	.update_bandwidth = dcn20_update_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c+1−0

@@ -545,6 +545,7 @@ const struct mpc_funcs dcn20_mpc_funcs = { · 544 unmodified lines
545	.mpc_init = mpc1_mpc_init,	545	.mpc_init = mpc1_mpc_init,
546	.mpc_init_single_inst = mpc1_mpc_init_single_inst,	546	.mpc_init_single_inst = mpc1_mpc_init_single_inst,
547	.update_blending = mpc2_update_blending,	547	.update_blending = mpc2_update_blending,
		548	.cursor_lock = mpc1_cursor_lock,
548	.get_mpcc_for_dpp = mpc2_get_mpcc_for_dpp,	549	.get_mpcc_for_dpp = mpc2_get_mpcc_for_dpp,
549	.wait_for_idle = mpc2_assert_idle_mpcc,	550	.wait_for_idle = mpc2_assert_idle_mpcc,
550	.assert_mpcc_idle_before_connect = mpc2_assert_mpcc_idle_before_connect,	551	.assert_mpcc_idle_before_connect = mpc2_assert_mpcc_idle_before_connect,

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.h+2−1

@@ -179,7 +179,8 @@ · 178 unmodified lines
179	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MAX_G_Y, mask_sh),\	179	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MAX_G_Y, mask_sh),\
180	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MIN_G_Y, mask_sh),\	180	SF(MPC_OUT0_DENORM_CLAMP_G_Y, MPC_OUT_DENORM_CLAMP_MIN_G_Y, mask_sh),\
181	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MAX_B_CB, mask_sh),\	181	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MAX_B_CB, mask_sh),\
182	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh)	182	SF(MPC_OUT0_DENORM_CLAMP_B_CB, MPC_OUT_DENORM_CLAMP_MIN_B_CB, mask_sh),\
		183	SF(CUR_VUPDATE_LOCK_SET0, CUR_VUPDATE_LOCK_SET, mask_sh)
183		184
184	/*	185	/*
185	* DCN2 MPC_OCSC debug status register:	186	* DCN2 MPC_OCSC debug status register:

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c+4−0

 	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
 					mm ## block ## id ## _ ## reg_name
+#define VUPDATE_SRII(reg_name, block, id)\
+	.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
+					mm ## reg_name ## _ ## block ## id
 /* NBIO */
 #define NBIO_BASE_INNER(seg) \
 	NBIO_BASE__INST0_SEG ## seg

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_init.c+1−0

@@ -53,6 +53,7 @@ static const struct hw_sequencer_funcs dcn21_funcs = { · 52 unmodified lines
53	.disable_plane = dcn20_disable_plane,	53	.disable_plane = dcn20_disable_plane,
54	.pipe_control_lock = dcn20_pipe_control_lock,	54	.pipe_control_lock = dcn20_pipe_control_lock,
55	.interdependent_update_lock = dcn10_lock_all_pipes,	55	.interdependent_update_lock = dcn10_lock_all_pipes,
		56	.cursor_lock = dcn10_cursor_lock,
56	.prepare_bandwidth = dcn20_prepare_bandwidth,	57	.prepare_bandwidth = dcn20_prepare_bandwidth,
57	.optimize_bandwidth = dcn20_optimize_bandwidth,	58	.optimize_bandwidth = dcn20_optimize_bandwidth,
58	.update_bandwidth = dcn20_update_bandwidth,	59	.update_bandwidth = dcn20_update_bandwidth,

drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c+33−44

@@ -284,7 +284,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 283 unmodified lines
284	.dram_channel_width_bytes = 4,	284	.dram_channel_width_bytes = 4,
285	.fabric_datapath_to_dcn_data_return_bytes = 32,	285	.fabric_datapath_to_dcn_data_return_bytes = 32,
286	.dcn_downspread_percent = 0.5,	286	.dcn_downspread_percent = 0.5,
287	.downspread_percent = 0.5,	287	.downspread_percent = 0.38,
288	.dram_page_open_time_ns = 50.0,	288	.dram_page_open_time_ns = 50.0,
289	.dram_rw_turnaround_time_ns = 17.5,	289	.dram_rw_turnaround_time_ns = 17.5,
290	.dram_return_buffer_per_channel_bytes = 8192,	290	.dram_return_buffer_per_channel_bytes = 8192,
@@ -340,6 +340,10 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = { · 49 unmodified lines
340	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \	340	.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
341	mm ## block ## id ## _ ## reg_name	341	mm ## block ## id ## _ ## reg_name
342		342
		343	#define VUPDATE_SRII(reg_name, block, id)\
		344	.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
		345	mm ## reg_name ## _ ## block ## id
		346
343	/* NBIO */	347	/* NBIO */
344	#define NBIO_BASE_INNER(seg) \	348	#define NBIO_BASE_INNER(seg) \
345	NBIF0_BASE__INST0_SEG ## seg	349	NBIF0_BASE__INST0_SEG ## seg
@@ -1374,64 +1378,49 @@ static void update_bw_bounding_box(struct dc dc, struct clk_bw_params bw_param · 1028 unmodified lines
1374	{	1378	{
1375	struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool);	1379	struct dcn21_resource_pool *pool = TO_DCN21_RES_POOL(dc->res_pool);
1376	struct clk_limit_table *clk_table = &bw_params->clk_table;	1380	struct clk_limit_table *clk_table = &bw_params->clk_table;
1377	unsigned int i, j, k;	1381	struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];
1378	int closest_clk_lvl;	1382	unsigned int i, j, closest_clk_lvl;
1379		1383
1380	// Default clock levels are used for diags, which may lead to overclocking.	1384	// Default clock levels are used for diags, which may lead to overclocking.
1381	if (!IS_FPGA_MAXIMUS_DC(dc->ctx->dce_environment) && !IS_DIAG_DC(dc->ctx->dce_environment)) {	1385	if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
1382	dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator;	1386	dcn2_1_ip.max_num_otg = pool->base.res_cap->num_timing_generator;
1383	dcn2_1_ip.max_num_dpp = pool->base.pipe_count;	1387	dcn2_1_ip.max_num_dpp = pool->base.pipe_count;
1384	dcn2_1_soc.num_chans = bw_params->num_channels;	1388	dcn2_1_soc.num_chans = bw_params->num_channels;
1385		1389
1386	/* Vmin: leave lowest DCN clocks, override with dcfclk, fclk, memclk from fuse */	1390	ASSERT(clk_table->num_entries);
1387	dcn2_1_soc.clock_limits[0].state = 0;	1391	for (i = 0; i < clk_table->num_entries; i++) {
1388	dcn2_1_soc.clock_limits[0].dcfclk_mhz = clk_table->entries[0].dcfclk_mhz;	1392	/* loop backwards*/
1389	dcn2_1_soc.clock_limits[0].fabricclk_mhz = clk_table->entries[0].fclk_mhz;	1393	for (closest_clk_lvl = 0, j = dcn2_1_soc.num_states - 1; j >= 0; j--) {
1390	dcn2_1_soc.clock_limits[0].socclk_mhz = clk_table->entries[0].socclk_mhz;
1391	dcn2_1_soc.clock_limits[0].dram_speed_mts = clk_table->entries[0].memclk_mhz * 2;
1392
1393	/*
1394	* Other levels: find closest DCN clocks that fit the given clock limit using dcfclk
1395	* as indicator
1396	*/
1397
1398	closest_clk_lvl = -1;
1399	/* index currently being filled */
1400	k = 1;
1401	for (i = 1; i < clk_table->num_entries; i++) {
1402	/* loop backwards, skip duplicate state*/
1403	for (j = dcn2_1_soc.num_states - 1; j >= k; j--) {
1404	if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {	1394	if ((unsigned int) dcn2_1_soc.clock_limits[j].dcfclk_mhz <= clk_table->entries[i].dcfclk_mhz) {
1405	closest_clk_lvl = j;	1395	closest_clk_lvl = j;
1406	break;	1396	break;
1407	}	1397	}
1408	}	1398	}
1409		1399
1410	/* if found a lvl that fits, use the DCN clks from it, if not, go to next clk limit*/	1400	clock_limits[i].state = i;
1411	if (closest_clk_lvl != -1) {	1401	clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;
1412	dcn2_1_soc.clock_limits[k].state = i;	1402	clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz;
1413	dcn2_1_soc.clock_limits[k].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz;	1403	clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz;
1414	dcn2_1_soc.clock_limits[k].fabricclk_mhz = clk_table->entries[i].fclk_mhz;	1404	clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2;
1415	dcn2_1_soc.clock_limits[k].socclk_mhz = clk_table->entries[i].socclk_mhz;	1405
1416	dcn2_1_soc.clock_limits[k].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2;	1406	clock_limits[i].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz;
1417		1407	clock_limits[i].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz;
1418	dcn2_1_soc.clock_limits[k].dispclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz;	1408	clock_limits[i].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;
1419	dcn2_1_soc.clock_limits[k].dppclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz;	1409	clock_limits[i].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz;
1420	dcn2_1_soc.clock_limits[k].dram_bw_per_chan_gbps = dcn2_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps;	1410	clock_limits[i].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;
1421	dcn2_1_soc.clock_limits[k].dscclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz;	1411	clock_limits[i].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;
1422	dcn2_1_soc.clock_limits[k].dtbclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].dtbclk_mhz;	1412	clock_limits[i].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz;
1423	dcn2_1_soc.clock_limits[k].phyclk_d18_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz;	1413	}
1424	dcn2_1_soc.clock_limits[k].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz;	1414	for (i = 0; i < clk_table->num_entries; i++)
1425	k++;	1415	dcn2_1_soc.clock_limits[i] = clock_limits[i];
1426	}	1416	if (clk_table->num_entries) {
		1417	dcn2_1_soc.num_states = clk_table->num_entries;
		1418	/* duplicate last level */
		1419	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1];
		1420	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states;
1427	}	1421	}
1428	dcn2_1_soc.num_states = k;
1429	}	1422	}
1430		1423
1431	/* duplicate last level */
1432	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states] = dcn2_1_soc.clock_limits[dcn2_1_soc.num_states - 1];
1433	dcn2_1_soc.clock_limits[dcn2_1_soc.num_states].state = dcn2_1_soc.num_states;
1434
1435	dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21);	1424	dml_init_instance(&dc->dml, &dcn2_1_soc, &dcn2_1_ip, DML_PROJECT_DCN21);
1436	}	1425	}
1437		1426

drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h+16−0

@@ -210,6 +210,22 @@ struct mpc_funcs { · 209 unmodified lines
210	struct mpcc_blnd_cfg *blnd_cfg,	210	struct mpcc_blnd_cfg *blnd_cfg,
211	int mpcc_id);	211	int mpcc_id);
212		212
		213	/*
		214	* Lock cursor updates for the specified OPP.
		215	* OPP defines the set of MPCC that are locked together for cursor.
		216	*
		217	* Parameters:
		218	* [in] mpc - MPC context.
		219	* [in] opp_id - The OPP to lock cursor updates on
		220	* [in] lock - lock/unlock the OPP
		221	*
		222	* Return: void
		223	*/
		224	void (*cursor_lock)(
		225	struct mpc *mpc,
		226	int opp_id,
		227	bool lock);
		228
213	struct mpcc* (*get_mpcc_for_dpp)(	229	struct mpcc* (*get_mpcc_for_dpp)(
214	struct mpc_tree *tree,	230	struct mpc_tree *tree,
215	int dpp_id);	231	int dpp_id);

drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h+1−0

@@ -86,6 +86,7 @@ struct hw_sequencer_funcs { · 85 unmodified lines
86	struct dc_state *context, bool lock);	86	struct dc_state *context, bool lock);
87	void (set_flip_control_gsl)(struct pipe_ctx pipe_ctx,	87	void (set_flip_control_gsl)(struct pipe_ctx pipe_ctx,
88	bool flip_immediate);	88	bool flip_immediate);
		89	void (cursor_lock)(struct dc dc, struct pipe_ctx *pipe, bool lock);
89		90
90	/* Timing Related */	91	/* Timing Related */
91	void (get_position)(struct pipe_ctx *pipe_ctx, int num_pipes,	92	void (get_position)(struct pipe_ctx *pipe_ctx, int num_pipes,

drivers/gpu/drm/amd/powerplay/amd_powerplay.c+5−4

 	if (!hwmgr)
 		return -EINVAL;
-	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_capability)
+	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+		!hwmgr->hwmgr_func->get_asic_baco_capability)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);
 	if (!hwmgr)
 		return -EINVAL;
-	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->get_asic_baco_state)
-		!hwmgr->hwmgr_func->get_asic_baco_state)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);
 	if (!hwmgr)
 		return -EINVAL;
-	if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_asic_baco_state)
+	if (!(hwmgr->not_vf && amdgpu_dpm) ||
+		!hwmgr->hwmgr_func->set_asic_baco_state)
 		return 0;
 	mutex_lock(&hwmgr->smu_lock);

drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c+26−0

@@ -984,6 +984,32 @@ static int init_thermal_controller( · 983 unmodified lines
984	struct pp_hwmgr *hwmgr,	984	struct pp_hwmgr *hwmgr,
985	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)	985	const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
986	{	986	{
		987	hwmgr->thermal_controller.ucType =
		988	powerplay_table->sThermalController.ucType;
		989	hwmgr->thermal_controller.ucI2cLine =
		990	powerplay_table->sThermalController.ucI2cLine;
		991	hwmgr->thermal_controller.ucI2cAddress =
		992	powerplay_table->sThermalController.ucI2cAddress;
		993
		994	hwmgr->thermal_controller.fanInfo.bNoFan =
		995	(0 != (powerplay_table->sThermalController.ucFanParameters &
		996	ATOM_PP_FANPARAMETERS_NOFAN));
		997
		998	hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution =
		999	powerplay_table->sThermalController.ucFanParameters &
		1000	ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK;
		1001
		1002	hwmgr->thermal_controller.fanInfo.ulMinRPM
		1003	= powerplay_table->sThermalController.ucFanMinRPM * 100UL;
		1004	hwmgr->thermal_controller.fanInfo.ulMaxRPM
		1005	= powerplay_table->sThermalController.ucFanMaxRPM * 100UL;
		1006
		1007	set_hw_cap(hwmgr,
		1008	ATOM_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
		1009	PHM_PlatformCaps_ThermalController);
		1010
		1011	hwmgr->thermal_controller.use_hw_fan_control = 1;
		1012
987	return 0;	1013	return 0;
988	}	1014	}
989		1015

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c+4−1

 {
 	uint32_t i;
+	/* force the trim if mclk_switching is disabled to prevent flicker */
+	bool force_trim = (low_limit == high_limit);
 	for (i = 0; i < dpm_table->count; i++) {
 	/*skip the trim if od is enabled*/
-		if (!hwmgr->od_enabled && (dpm_table->dpm_levels[i].value < low_limit
+		if ((!hwmgr->od_enabled || force_trim)
+			&& (dpm_table->dpm_levels[i].value < low_limit
 			|| dpm_table->dpm_levels[i].value > high_limit))
 			dpm_table->dpm_levels[i].enabled = false;
 		else

drivers/gpu/drm/amd/powerplay/renoir_ppt.c+6−1

 static bool renoir_is_dpm_running(struct smu_context *smu)
 {
+	struct amdgpu_device *adev = smu->adev;
 	/*
 	 * Util now, the pmfw hasn't exported the interface of SMU
 	 * feature mask to APU SKU so just force on all the feature
 	 * at early initial stage.
 	 */
-	return true;
+	if (adev->in_suspend)
+		return false;
+	else
+		return true;
 }

drivers/gpu/drm/amd/powerplay/smu_v11_0.c+6−0

 		if (ret)
 			goto out;
+		if (ras && ras->supported) {
+			ret = smu_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
+			if (ret)
+				goto out;
+		}
 		/* clear vbios scratch 6 and 7 for coming asic reinit */
 		WREG32(adev->bios_scratch_reg_offset + 6, 0);
 		WREG32(adev->bios_scratch_reg_offset + 7, 0);

drivers/gpu/drm/bridge/analogix/analogix-anx6345.c+3−0

@@ -485,6 +485,9 @@ static int anx6345_get_modes(struct drm_connector *connector) · 484 unmodified lines
485		485
486	num_modes += drm_add_edid_modes(connector, anx6345->edid);	486	num_modes += drm_add_edid_modes(connector, anx6345->edid);
487		487
		488	/* Driver currently supports only 6bpc */
		489	connector->display_info.bpc = 6;
		490
488	unlock:	491	unlock:
489	if (power_off)	492	if (power_off)
490	anx6345_poweroff(anx6345);	493	anx6345_poweroff(anx6345);

drivers/gpu/drm/drm_dp_mst_topology.c+7−2

 	drm_dp_queue_down_tx(mgr, txmsg);
 	ret = drm_dp_mst_wait_tx_reply(mstb, txmsg);
-	if (ret > 0 && txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK)
+	if (ret > 0) {
-		ret = -EIO;
+		if (txmsg->reply.reply_type == DP_SIDEBAND_REPLY_NAK)
+			ret = -EIO;
+		else
+			ret = size;
+	}
 	kfree(txmsg);
 fail_put:
 	if (pos->vcpi) {
 		drm_dp_mst_put_port_malloc(port);
 		pos->vcpi = 0;
+		pos->pbn = 0;
 	}
 	return 0;

drivers/gpu/drm/drm_edid.c+1−1

@@ -5111,7 +5111,7 @@ static struct drm_display_mode drm_mode_displayid_detailed(struct drm_device d · 5110 unmodified lines
5111	struct drm_display_mode *mode;	5111	struct drm_display_mode *mode;
5112	unsigned pixel_clock = (timings->pixel_clock[0] \|	5112	unsigned pixel_clock = (timings->pixel_clock[0] \|
5113	(timings->pixel_clock[1] << 8) \|	5113	(timings->pixel_clock[1] << 8) \|
5114	(timings->pixel_clock[2] << 16));	5114	(timings->pixel_clock[2] << 16)) + 1;
5115	unsigned hactive = (timings->hactive[0] \| timings->hactive[1] << 8) + 1;	5115	unsigned hactive = (timings->hactive[0] \| timings->hactive[1] << 8) + 1;
5116	unsigned hblank = (timings->hblank[0] \| timings->hblank[1] << 8) + 1;	5116	unsigned hblank = (timings->hblank[0] \| timings->hblank[1] << 8) + 1;
5117	unsigned hsync = (timings->hsync[0] \| (timings->hsync[1] & 0x7f) << 8) + 1;	5117	unsigned hsync = (timings->hsync[0] \| (timings->hsync[1] & 0x7f) << 8) + 1;

drivers/gpu/drm/i915/display/intel_ddi.c+11−3

 	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
 				 crtc_state->lane_count, is_mst);
-	intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port);
-	intel_dp->regs.dp_tp_status = DP_TP_STATUS(port);
 	intel_edp_panel_on(intel_dp);
 	intel_ddi_clk_select(encoder, crtc_state);
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 	u32 temp, flags = 0;
 	/* XXX: DSI transcoder paranoia */
 	if (drm_WARN_ON(&dev_priv->drm, transcoder_is_dsi(cpu_transcoder)))
 		return;
+	if (INTEL_GEN(dev_priv) >= 12) {
+		intel_dp->regs.dp_tp_ctl = TGL_DP_TP_CTL(cpu_transcoder);
+		intel_dp->regs.dp_tp_status = TGL_DP_TP_STATUS(cpu_transcoder);
+	}
 	intel_dsc_get_config(encoder, pipe_config);
 	temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
 static struct intel_connector *
 intel_ddi_init_dp_connector(struct intel_digital_port *intel_dig_port)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 	struct intel_connector *connector;
 	enum port port = intel_dig_port->base.port;
 	intel_dig_port->dp.output_reg = DDI_BUF_CTL(port);
 	intel_dig_port->dp.prepare_link_retrain =
 		intel_ddi_prepare_link_retrain;
+	if (INTEL_GEN(dev_priv) < 12) {
+		intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port);
+		intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port);
+	}
 	if (!intel_dp_init_connector(intel_dig_port, connector)) {
 		kfree(connector);

drivers/gpu/drm/i915/display/intel_display_power.c+6−6

@@ -4140,7 +4140,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4139 unmodified lines
4140	{	4140	{
4141	.name = "AUX D TBT1",	4141	.name = "AUX D TBT1",
4142	.domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS,	4142	.domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS,
4143	.ops = &hsw_power_well_ops,	4143	.ops = &icl_tc_phy_aux_power_well_ops,
4144	.id = DISP_PW_ID_NONE,	4144	.id = DISP_PW_ID_NONE,
4145	{	4145	{
4146	.hsw.regs = &icl_aux_power_well_regs,	4146	.hsw.regs = &icl_aux_power_well_regs,
@@ -4151,7 +4151,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4151	{	4151	{
4152	.name = "AUX E TBT2",	4152	.name = "AUX E TBT2",
4153	.domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS,	4153	.domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS,
4154	.ops = &hsw_power_well_ops,	4154	.ops = &icl_tc_phy_aux_power_well_ops,
4155	.id = DISP_PW_ID_NONE,	4155	.id = DISP_PW_ID_NONE,
4156	{	4156	{
4157	.hsw.regs = &icl_aux_power_well_regs,	4157	.hsw.regs = &icl_aux_power_well_regs,
@@ -4162,7 +4162,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4162	{	4162	{
4163	.name = "AUX F TBT3",	4163	.name = "AUX F TBT3",
4164	.domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS,	4164	.domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS,
4165	.ops = &hsw_power_well_ops,	4165	.ops = &icl_tc_phy_aux_power_well_ops,
4166	.id = DISP_PW_ID_NONE,	4166	.id = DISP_PW_ID_NONE,
4167	{	4167	{
4168	.hsw.regs = &icl_aux_power_well_regs,	4168	.hsw.regs = &icl_aux_power_well_regs,
@@ -4173,7 +4173,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4173	{	4173	{
4174	.name = "AUX G TBT4",	4174	.name = "AUX G TBT4",
4175	.domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS,	4175	.domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS,
4176	.ops = &hsw_power_well_ops,	4176	.ops = &icl_tc_phy_aux_power_well_ops,
4177	.id = DISP_PW_ID_NONE,	4177	.id = DISP_PW_ID_NONE,
4178	{	4178	{
4179	.hsw.regs = &icl_aux_power_well_regs,	4179	.hsw.regs = &icl_aux_power_well_regs,
@@ -4184,7 +4184,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4184	{	4184	{
4185	.name = "AUX H TBT5",	4185	.name = "AUX H TBT5",
4186	.domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS,	4186	.domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS,
4187	.ops = &hsw_power_well_ops,	4187	.ops = &icl_tc_phy_aux_power_well_ops,
4188	.id = DISP_PW_ID_NONE,	4188	.id = DISP_PW_ID_NONE,
4189	{	4189	{
4190	.hsw.regs = &icl_aux_power_well_regs,	4190	.hsw.regs = &icl_aux_power_well_regs,
@@ -4195,7 +4195,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = { · 4 unmodified lines
4195	{	4195	{
4196	.name = "AUX I TBT6",	4196	.name = "AUX I TBT6",
4197	.domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS,	4197	.domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS,
4198	.ops = &hsw_power_well_ops,	4198	.ops = &icl_tc_phy_aux_power_well_ops,
4199	.id = DISP_PW_ID_NONE,	4199	.id = DISP_PW_ID_NONE,
4200	{	4200	{
4201	.hsw.regs = &icl_aux_power_well_regs,	4201	.hsw.regs = &icl_aux_power_well_regs,

drivers/gpu/drm/i915/display/intel_dp.c+2−3

 				 intel_crtc_has_type(pipe_config,
 						     INTEL_OUTPUT_DP_MST));
-	intel_dp->regs.dp_tp_ctl = DP_TP_CTL(port);
-	intel_dp->regs.dp_tp_status = DP_TP_STATUS(port);
 	/*
 	 * There are four kinds of DP registers:
 	 *
 	intel_dig_port->dp.output_reg = output_reg;
 	intel_dig_port->max_lanes = 4;
+	intel_dig_port->dp.regs.dp_tp_ctl = DP_TP_CTL(port);
+	intel_dig_port->dp.regs.dp_tp_status = DP_TP_STATUS(port);
 	intel_encoder->type = INTEL_OUTPUT_DP;
 	intel_encoder->power_domain = intel_port_to_power_domain(port);

drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c+1−0

@@ -342,6 +342,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *intel_connector) · 341 unmodified lines
342	*/	342	*/
343	if (dev_priv->vbt.backlight.type !=	343	if (dev_priv->vbt.backlight.type !=
344	INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&	344	INTEL_BACKLIGHT_VESA_EDP_AUX_INTERFACE &&
		345	i915_modparams.enable_dpcd_backlight != 1 &&
345	!drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,	346	!drm_dp_has_quirk(&intel_dp->desc, intel_dp->edid_quirks,
346	DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {	347	DP_QUIRK_FORCE_DPCD_BACKLIGHT)) {
347	DRM_DEV_INFO(dev->dev,	348	DRM_DEV_INFO(dev->dev,

drivers/gpu/drm/i915/display/intel_hdmi.c+2−1

@@ -1536,7 +1536,8 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port) · 1535 unmodified lines
1536	intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);	1536	intel_de_write(i915, HDCP_RPRIME(i915, cpu_transcoder, port), ri.reg);
1537		1537
1538	/* Wait for Ri prime match */	1538	/* Wait for Ri prime match */
1539	if (wait_for(intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &	1539	if (wait_for((intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)) &
		1540	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC)) ==
1540	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC), 1)) {	1541	(HDCP_STATUS_RI_MATCH \| HDCP_STATUS_ENC), 1)) {
1541	DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",	1542	DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
1542	intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)));	1543	intel_de_read(i915, HDCP_STATUS(i915, cpu_transcoder, port)));

drivers/gpu/drm/i915/display/intel_sprite.c+12−5

 	}
 }
-static bool gen12_plane_supports_mc_ccs(enum plane_id plane_id)
+static bool gen12_plane_supports_mc_ccs(struct drm_i915_private *dev_priv,
+					enum plane_id plane_id)
 {
+	/* Wa_14010477008:tgl[a0..c0] */
+	if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_C0))
+		return false;
 	return plane_id < PLANE_SPRITE4;
 }
 static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
 					     u32 format, u64 modifier)
 {
+	struct drm_i915_private *dev_priv = to_i915(_plane->dev);
 	struct intel_plane *plane = to_intel_plane(_plane);
 	switch (modifier) {
 	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-		if (!gen12_plane_supports_mc_ccs(plane->id))
+		if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))
 			return false;
 		/* fall through */
 	case DRM_FORMAT_MOD_LINEAR:
 	}
 }
-static const u64 *gen12_get_plane_modifiers(enum plane_id plane_id)
+static const u64 *gen12_get_plane_modifiers(struct drm_i915_private *dev_priv,
+					    enum plane_id plane_id)
 {
-	if (gen12_plane_supports_mc_ccs(plane_id))
+	if (gen12_plane_supports_mc_ccs(dev_priv, plane_id))
 		return gen12_plane_format_modifiers_mc_ccs;
 	else
 		return gen12_plane_format_modifiers_rc_ccs;
 	plane->has_ccs = skl_plane_has_ccs(dev_priv, pipe, plane_id);
 	if (INTEL_GEN(dev_priv) >= 12) {
-		modifiers = gen12_get_plane_modifiers(plane_id);
+		modifiers = gen12_get_plane_modifiers(dev_priv, plane_id);
 		plane_funcs = &gen12_plane_funcs;
 	} else {
 		if (plane->has_ccs)

drivers/gpu/drm/i915/gem/i915_gem_tiling.c+18−2

 			      int tiling_mode, unsigned int stride)
 {
 	struct i915_ggtt *ggtt = &to_i915(obj->base.dev)->ggtt;
-	struct i915_vma *vma;
+	struct i915_vma *vma, *vn;
+	LIST_HEAD(unbind);
 	int ret = 0;
 	if (tiling_mode == I915_TILING_NONE)
 		return 0;
 	mutex_lock(&ggtt->vm.mutex);
+	spin_lock(&obj->vma.lock);
 	for_each_ggtt_vma(vma, obj) {
+		GEM_BUG_ON(vma->vm != &ggtt->vm);
 		if (i915_vma_fence_prepare(vma, tiling_mode, stride))
 			continue;
+		list_move(&vma->vm_link, &unbind);
+	}
+	spin_unlock(&obj->vma.lock);
+	list_for_each_entry_safe(vma, vn, &unbind, vm_link) {
 		ret = __i915_vma_unbind(vma);
-		if (ret)
+		if (ret) {
+			/* Restore the remaining vma on an error */
+			list_splice(&unbind, &ggtt->vm.bound_list);
 			break;
+		}
 	}
 	mutex_unlock(&ggtt->vm.mutex);
 	return ret;
 	}
 	mutex_unlock(&obj->mm.lock);
+	spin_lock(&obj->vma.lock);
 	for_each_ggtt_vma(vma, obj) {
 		vma->fence_size =
 			i915_gem_fence_size(i915, vma->size, tiling, stride);
 		if (vma->fence)
 			vma->fence->dirty = true;
 	}
+	spin_unlock(&obj->vma.lock);
 	obj->tiling_and_stride = tiling | stride;
 	i915_gem_object_unlock(obj);

drivers/gpu/drm/i915/gem/selftests/huge_pages.c+8−4

 		unsigned int page_size = BIT(first);
 		obj = i915_gem_object_create_internal(dev_priv, page_size);
-		if (IS_ERR(obj))
+		if (IS_ERR(obj)) {
-			return PTR_ERR(obj);
+			err = PTR_ERR(obj);
+			goto out_vm;
+		}
 		vma = i915_vma_instance(obj, vm, NULL);
 		if (IS_ERR(vma)) {
 	}
 	obj = i915_gem_object_create_internal(dev_priv, PAGE_SIZE);
-	if (IS_ERR(obj))
+	if (IS_ERR(obj)) {
-		return PTR_ERR(obj);
+		err = PTR_ERR(obj);
+		goto out_vm;
+	}
 	vma = i915_vma_instance(obj, vm, NULL);
 	if (IS_ERR(vma)) {

drivers/gpu/drm/i915/gt/intel_rps.c+6−3

@@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) · 80 unmodified lines
81	events = (GEN6_PM_RP_UP_THRESHOLD \|	81	events = (GEN6_PM_RP_UP_THRESHOLD \|
82	GEN6_PM_RP_DOWN_THRESHOLD \|	82	GEN6_PM_RP_DOWN_THRESHOLD \|
83	GEN6_PM_RP_DOWN_TIMEOUT);	83	GEN6_PM_RP_DOWN_TIMEOUT);
84
85	WRITE_ONCE(rps->pm_events, events);	84	WRITE_ONCE(rps->pm_events, events);
		85
86	spin_lock_irq(&gt->irq_lock);	86	spin_lock_irq(&gt->irq_lock);
87	gen6_gt_pm_enable_irq(gt, rps->pm_events);	87	gen6_gt_pm_enable_irq(gt, rps->pm_events);
88	spin_unlock_irq(&gt->irq_lock);	88	spin_unlock_irq(&gt->irq_lock);
89		89
90	set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq));	90	intel_uncore_write(gt->uncore,
		91	GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq));
91	}	92	}
92		93
93	static void gen6_rps_reset_interrupts(struct intel_rps *rps)	94	static void gen6_rps_reset_interrupts(struct intel_rps *rps)
@@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) · 26 unmodified lines
120	struct intel_gt *gt = rps_to_gt(rps);	121	struct intel_gt *gt = rps_to_gt(rps);
121		122
122	WRITE_ONCE(rps->pm_events, 0);	123	WRITE_ONCE(rps->pm_events, 0);
123	set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));	124
		125	intel_uncore_write(gt->uncore,
		126	GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
124		127
125	spin_lock_irq(&gt->irq_lock);	128	spin_lock_irq(&gt->irq_lock);
126	gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);	129	gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS);

drivers/gpu/drm/i915/gt/intel_timeline.c+2−0

@@ -521,6 +521,8 @@ int intel_timeline_read_hwsp(struct i915_request *from, · 520 unmodified lines
521		521
522	rcu_read_lock();	522	rcu_read_lock();
523	cl = rcu_dereference(from->hwsp_cacheline);	523	cl = rcu_dereference(from->hwsp_cacheline);
		524	if (i915_request_completed(from)) /* confirm cacheline is valid */
		525	goto unlock;
524	if (unlikely(!i915_active_acquire_if_busy(&cl->active)))	526	if (unlikely(!i915_active_acquire_if_busy(&cl->active)))
525	goto unlock; /* seqno wrapped and completed! */	527	goto unlock; /* seqno wrapped and completed! */
526	if (unlikely(i915_request_completed(from)))	528	if (unlikely(i915_request_completed(from)))

drivers/gpu/drm/i915/gvt/kvmgt.c+22−24

 	struct work_struct release_work;
 	atomic_t released;
 	struct vfio_device *vfio_device;
+	struct vfio_group *vfio_group;
 };
 static inline struct kvmgt_vdev *kvmgt_vdev(struct intel_vgpu *vgpu)
 		unsigned long size)
 {
 	struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
+	struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu);
 	int total_pages;
 	int npage;
 	int ret;
 	for (npage = 0; npage < total_pages; npage++) {
 		unsigned long cur_gfn = gfn + npage;
-		ret = vfio_unpin_pages(mdev_dev(kvmgt_vdev(vgpu)->mdev), &cur_gfn, 1);
+		ret = vfio_group_unpin_pages(vdev->vfio_group, &cur_gfn, 1);
 		drm_WARN_ON(&i915->drm, ret != 1);
 	}
 }
 static int gvt_pin_guest_page(struct intel_vgpu *vgpu, unsigned long gfn,
 		unsigned long size, struct page **page)
 {
+	struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu);
 	unsigned long base_pfn = 0;
 	int total_pages;
 	int npage;
 		unsigned long cur_gfn = gfn + npage;
 		unsigned long pfn;
-		ret = vfio_pin_pages(mdev_dev(kvmgt_vdev(vgpu)->mdev), &cur_gfn, 1,
+		ret = vfio_group_pin_pages(vdev->vfio_group, &cur_gfn, 1,
-				     IOMMU_READ | IOMMU_WRITE, &pfn);
+					   IOMMU_READ | IOMMU_WRITE, &pfn);
 		if (ret != 1) {
 			gvt_vgpu_err("vfio_pin_pages failed for gfn 0x%lx, ret %d\n",
 				     cur_gfn, ret);
 	struct kvmgt_vdev *vdev = kvmgt_vdev(vgpu);
 	unsigned long events;
 	int ret;
+	struct vfio_group *vfio_group;
 	vdev->iommu_notifier.notifier_call = intel_vgpu_iommu_notifier;
 	vdev->group_notifier.notifier_call = intel_vgpu_group_notifier;
 		goto undo_iommu;
 	}
+	vfio_group = vfio_group_get_external_user_from_dev(mdev_dev(mdev));
+	if (IS_ERR_OR_NULL(vfio_group)) {
+		ret = !vfio_group ? -EFAULT : PTR_ERR(vfio_group);
+		gvt_vgpu_err("vfio_group_get_external_user_from_dev failed\n");
+		goto undo_register;
+	}
+	vdev->vfio_group = vfio_group;
 	/* Take a module reference as mdev core doesn't take
 	 * a reference for vendor driver.
 	 */
 	return ret;
 undo_group:
+	vfio_group_put_external_user(vdev->vfio_group);
+	vdev->vfio_group = NULL;
+undo_register:
 	vfio_unregister_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY,
 					&vdev->group_notifier);
 	kvmgt_guest_exit(info);
 	intel_vgpu_release_msi_eventfd_ctx(vgpu);
+	vfio_group_put_external_user(vdev->vfio_group);
 	vdev->kvm = NULL;
 	vgpu->handle = 0;
 			void *buf, unsigned long len, bool write)
 {
 	struct kvmgt_guest_info *info;
-	struct kvm *kvm;
-	int idx, ret;
-	bool kthread = current->mm == NULL;
 	if (!handle_valid(handle))
 		return -ESRCH;
 	info = (struct kvmgt_guest_info *)handle;
-	kvm = info->kvm;
-	if (kthread) {
-		if (!mmget_not_zero(kvm->mm))
-			return -EFAULT;
-		use_mm(kvm->mm);
-	}
-	idx = srcu_read_lock(&kvm->srcu);
-	ret = write ? kvm_write_guest(kvm, gpa, buf, len) :
-		      kvm_read_guest(kvm, gpa, buf, len);
-	srcu_read_unlock(&kvm->srcu, idx);
-	if (kthread) {
-		unuse_mm(kvm->mm);
-		mmput(kvm->mm);
-	}
-	return ret;
+	return vfio_dma_rw(kvmgt_vdev(info->vgpu)->vfio_group,
+			   gpa, buf, len, write);
 }
 static int kvmgt_read_gpa(unsigned long handle, unsigned long gpa,

drivers/gpu/drm/i915/i915_drv.h+2−0

@@ -1507,6 +1507,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, · 1506 unmodified lines
1507	(IS_ICELAKE(p) && IS_REVID(p, since, until))	1507	(IS_ICELAKE(p) && IS_REVID(p, since, until))
1508		1508
1509	#define TGL_REVID_A0 0x0	1509	#define TGL_REVID_A0 0x0
		1510	#define TGL_REVID_B0 0x1
		1511	#define TGL_REVID_C0 0x2
1510		1512
1511	#define IS_TGL_REVID(p, since, until) \	1513	#define IS_TGL_REVID(p, since, until) \
1512	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))	1514	(IS_TIGERLAKE(p) && IS_REVID(p, since, until))

drivers/gpu/drm/i915/i915_irq.c+2−4

 {
 	struct intel_uncore *uncore = &dev_priv->uncore;
-	u32 de_pipe_masked = GEN8_PIPE_CDCLK_CRC_DONE;
+	u32 de_pipe_masked = gen8_de_pipe_fault_mask(dev_priv) |
+		GEN8_PIPE_CDCLK_CRC_DONE;
 	u32 de_pipe_enables;
 	u32 de_port_masked = GEN8_AUX_CHANNEL_A;
 	u32 de_port_enables;
 		de_misc_masked |= GEN8_DE_MISC_GSE;
 	if (INTEL_GEN(dev_priv) >= 9) {
-		de_pipe_masked |= GEN9_DE_PIPE_IRQ_FAULT_ERRORS;
 		de_port_masked |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
 				  GEN9_AUX_CHANNEL_D;
 		if (IS_GEN9_LP(dev_priv))
 			de_port_masked |= BXT_DE_PORT_GMBUS;
-	} else {
-		de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
 	}
 	if (INTEL_GEN(dev_priv) >= 11)

drivers/gpu/drm/i915/i915_perf.c+11−54

@@ -2940,49 +2940,6 @@ void i915_oa_init_reg_state(const struct intel_context *ce, · 2939 unmodified lines
2940	gen8_update_reg_state_unlocked(ce, stream);	2940	gen8_update_reg_state_unlocked(ce, stream);
2941	}	2941	}
2942		2942
2943	/**
2944	* i915_perf_read_locked - &i915_perf_stream_ops->read with error normalisation
2945	* @stream: An i915 perf stream
2946	* @file: An i915 perf stream file
2947	* @buf: destination buffer given by userspace
2948	* @count: the number of bytes userspace wants to read
2949	* @ppos: (inout) file seek position (unused)
2950	*
2951	* Besides wrapping &i915_perf_stream_ops->read this provides a common place to
2952	* ensure that if we've successfully copied any data then reporting that takes
2953	* precedence over any internal error status, so the data isn't lost.
2954	*
2955	* For example ret will be -ENOSPC whenever there is more buffered data than
2956	* can be copied to userspace, but that's only interesting if we weren't able
2957	* to copy some data because it implies the userspace buffer is too small to
2958	* receive a single record (and we never split records).
2959	*
2960	* Another case with ret == -EFAULT is more of a grey area since it would seem
2961	* like bad form for userspace to ask us to overrun its buffer, but the user
2962	* knows best:
2963	*
2964	* http://yarchive.net/comp/linux/partial_reads_writes.html
2965	*
2966	* Returns: The number of bytes copied or a negative error code on failure.
2967	*/
2968	static ssize_t i915_perf_read_locked(struct i915_perf_stream *stream,
2969	struct file *file,
2970	char __user *buf,
2971	size_t count,
2972	loff_t *ppos)
2973	{
2974	/* Note we keep the offset (aka bytes read) separate from any
2975	* error status so that the final check for whether we return
2976	* the bytes read with a higher precedence than any error (see
2977	* comment below) doesn't need to be handled/duplicated in
2978	* stream->ops->read() implementations.
2979	*/
2980	size_t offset = 0;
2981	int ret = stream->ops->read(stream, buf, count, &offset);
2982
2983	return offset ?: (ret ?: -EAGAIN);
2984	}
2985
2986	/**	2943	/**
2987	* i915_perf_read - handles read() FOP for i915 perf stream FDs	2944	* i915_perf_read - handles read() FOP for i915 perf stream FDs
2988	* @file: An i915 perf stream file	2945	* @file: An i915 perf stream file
@@ -3008,7 +2965,8 @@ static ssize_t i915_perf_read(struct file *file, · 19 unmodified lines
3008	{	2965	{
3009	struct i915_perf_stream *stream = file->private_data;	2966	struct i915_perf_stream *stream = file->private_data;
3010	struct i915_perf *perf = stream->perf;	2967	struct i915_perf *perf = stream->perf;
3011	ssize_t ret;	2968	size_t offset = 0;
		2969	int ret;
3012		2970
3013	/* To ensure it's handled consistently we simply treat all reads of a	2971	/* To ensure it's handled consistently we simply treat all reads of a
3014	* disabled stream as an error. In particular it might otherwise lead	2972	* disabled stream as an error. In particular it might otherwise lead
@@ -3031,13 +2989,12 @@ static ssize_t i915_perf_read(struct file *file, · 16 unmodified lines
3031	return ret;	2989	return ret;
3032		2990
3033	mutex_lock(&perf->lock);	2991	mutex_lock(&perf->lock);
3034	ret = i915_perf_read_locked(stream, file,	2992	ret = stream->ops->read(stream, buf, count, &offset);
3035	buf, count, ppos);
3036	mutex_unlock(&perf->lock);	2993	mutex_unlock(&perf->lock);
3037	} while (ret == -EAGAIN);	2994	} while (!offset && !ret);
3038	} else {	2995	} else {
3039	mutex_lock(&perf->lock);	2996	mutex_lock(&perf->lock);
3040	ret = i915_perf_read_locked(stream, file, buf, count, ppos);	2997	ret = stream->ops->read(stream, buf, count, &offset);
3041	mutex_unlock(&perf->lock);	2998	mutex_unlock(&perf->lock);
3042	}	2999	}
3043		3000
@@ -3048,15 +3005,15 @@ static ssize_t i915_perf_read(struct file *file, · 4 unmodified lines
3048	* and read() returning -EAGAIN. Clearing the oa.pollin state here	3005	* and read() returning -EAGAIN. Clearing the oa.pollin state here
3049	* effectively ensures we back off until the next hrtimer callback	3006	* effectively ensures we back off until the next hrtimer callback
3050	* before reporting another EPOLLIN event.	3007	* before reporting another EPOLLIN event.
		3008	* The exception to this is if ops->read() returned -ENOSPC which means
		3009	* that more OA data is available than could fit in the user provided
		3010	* buffer. In this case we want the next poll() call to not block.
3051	*/	3011	*/
3052	if (ret >= 0 \|\| ret == -EAGAIN) {	3012	if (ret != -ENOSPC)
3053	/* Maybe make ->pollin per-stream state if we support multiple
3054	* concurrent streams in the future.
3055	*/
3056	stream->pollin = false;	3013	stream->pollin = false;
3057	}
3058		3014
3059	return ret;	3015	/* Possible values for ret are 0, -EFAULT, -ENOSPC, -EIO, ... */
		3016	return offset ?: (ret ?: -EAGAIN);
3060	}	3017	}
3061		3018
3062	static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer)	3019	static enum hrtimer_restart oa_poll_check_timer_cb(struct hrtimer *hrtimer)

drivers/gpu/drm/i915/i915_reg.h+2−2

@@ -34,8 +34,8 @@ · 33 unmodified lines
34	* Follow the style described here for new macros, and while changing existing	34	* Follow the style described here for new macros, and while changing existing
35	* macros. Do not mass change existing definitions just to update the style.	35	* macros. Do not mass change existing definitions just to update the style.
36	*	36	*
37	* Layout	37	* File Layout
38	* ~~~~~~	38	* ~~~~~~~~~~~
39	*	39	*
40	* Keep helper macros near the top. For example, _PIPE() and friends.	40	* Keep helper macros near the top. For example, _PIPE() and friends.
41	*	41	*

drivers/gpu/drm/i915/i915_vma.c+6−4

 	GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
+	spin_lock(&obj->vma.lock);
 	if (i915_is_ggtt(vm)) {
 		if (unlikely(overflows_type(vma->size, u32)))
-			goto err_vma;
+			goto err_unlock;
 		vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
 						      i915_gem_object_get_tiling(obj),
 						      i915_gem_object_get_stride(obj));
 		if (unlikely(vma->fence_size < vma->size || /* overflow */
 			     vma->fence_size > vm->total))
-			goto err_vma;
+			goto err_unlock;
 		GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
 		__set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
 	}
-	spin_lock(&obj->vma.lock);
 	rb = NULL;
 	p = &obj->vma.tree.rb_node;
 	while (*p) {
 	return vma;
+err_unlock:
+	spin_unlock(&obj->vma.lock);
 err_vma:
 	i915_vma_free(vma);
 	return ERR_PTR(-E2BIG);

drivers/gpu/drm/meson/meson_dw_hdmi.c+1−3

 		return PTR_ERR(dw_plat_data->regm);
 	irq = platform_get_irq(pdev, 0);
-	if (irq < 0) {
+	if (irq < 0)
-		dev_err(dev, "Failed to get hdmi top irq\n");
 		return irq;
-	}
 	ret = devm_request_threaded_irq(dev, irq, dw_hdmi_top_irq,
 					dw_hdmi_top_thread_irq, IRQF_SHARED,

drivers/gpu/drm/nouveau/nvkm/engine/sec2/gp108.c+3−0

 MODULE_FIRMWARE("nvidia/gp108/sec2/desc.bin");
 MODULE_FIRMWARE("nvidia/gp108/sec2/image.bin");
 MODULE_FIRMWARE("nvidia/gp108/sec2/sig.bin");
+MODULE_FIRMWARE("nvidia/gv100/sec2/desc.bin");
+MODULE_FIRMWARE("nvidia/gv100/sec2/image.bin");
+MODULE_FIRMWARE("nvidia/gv100/sec2/sig.bin");
 static const struct nvkm_sec2_fwif
 gp108_sec2_fwif[] = {

drivers/gpu/drm/nouveau/nvkm/engine/sec2/tu102.c+16−0

@@ -56,6 +56,22 @@ tu102_sec2_nofw(struct nvkm_sec2 *sec2, int ver, · 55 unmodified lines
56	return 0;	56	return 0;
57	}	57	}
58		58
		59	MODULE_FIRMWARE("nvidia/tu102/sec2/desc.bin");
		60	MODULE_FIRMWARE("nvidia/tu102/sec2/image.bin");
		61	MODULE_FIRMWARE("nvidia/tu102/sec2/sig.bin");
		62	MODULE_FIRMWARE("nvidia/tu104/sec2/desc.bin");
		63	MODULE_FIRMWARE("nvidia/tu104/sec2/image.bin");
		64	MODULE_FIRMWARE("nvidia/tu104/sec2/sig.bin");
		65	MODULE_FIRMWARE("nvidia/tu106/sec2/desc.bin");
		66	MODULE_FIRMWARE("nvidia/tu106/sec2/image.bin");
		67	MODULE_FIRMWARE("nvidia/tu106/sec2/sig.bin");
		68	MODULE_FIRMWARE("nvidia/tu116/sec2/desc.bin");
		69	MODULE_FIRMWARE("nvidia/tu116/sec2/image.bin");
		70	MODULE_FIRMWARE("nvidia/tu116/sec2/sig.bin");
		71	MODULE_FIRMWARE("nvidia/tu117/sec2/desc.bin");
		72	MODULE_FIRMWARE("nvidia/tu117/sec2/image.bin");
		73	MODULE_FIRMWARE("nvidia/tu117/sec2/sig.bin");
		74
59	static const struct nvkm_sec2_fwif	75	static const struct nvkm_sec2_fwif
60	tu102_sec2_fwif[] = {	76	tu102_sec2_fwif[] = {
61	{ 0, gp102_sec2_load, &tu102_sec2, &gp102_sec2_acr_1 },	77	{ 0, gp102_sec2_load, &tu102_sec2, &gp102_sec2_acr_1 },

drivers/gpu/drm/qxl/qxl_cmd.c+5−5

@@ -480,9 +480,10 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 479 unmodified lines
480	return ret;	480	return ret;
481		481
482	ret = qxl_release_reserve_list(release, true);	482	ret = qxl_release_reserve_list(release, true);
483	if (ret)	483	if (ret) {
		484	qxl_release_free(qdev, release);
484	return ret;	485	return ret;
485		486	}
486	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);	487	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
487	cmd->type = QXL_SURFACE_CMD_CREATE;	488	cmd->type = QXL_SURFACE_CMD_CREATE;
488	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;	489	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
@@ -499,8 +500,8 @@ int qxl_hw_surface_alloc(struct qxl_device *qdev, · 10 unmodified lines
499	/* no need to add a release to the fence for this surface bo,	500	/* no need to add a release to the fence for this surface bo,
500	since it is only released when we ask to destroy the surface	501	since it is only released when we ask to destroy the surface
501	and it would never signal otherwise */	502	and it would never signal otherwise */
502	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
503	qxl_release_fence_buffer_objects(release);	503	qxl_release_fence_buffer_objects(release);
		504	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
504		505
505	surf->hw_surf_alloc = true;	506	surf->hw_surf_alloc = true;
506	spin_lock(&qdev->surf_id_idr_lock);	507	spin_lock(&qdev->surf_id_idr_lock);
@@ -542,9 +543,8 @@ int qxl_hw_surface_dealloc(struct qxl_device *qdev, · 35 unmodified lines
542	cmd->surface_id = id;	543	cmd->surface_id = id;
543	qxl_release_unmap(qdev, release, &cmd->release_info);	544	qxl_release_unmap(qdev, release, &cmd->release_info);
544		545
545	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
546
547	qxl_release_fence_buffer_objects(release);	546	qxl_release_fence_buffer_objects(release);
		547	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
548		548
549	return 0;	549	return 0;
550	}	550	}

drivers/gpu/drm/qxl/qxl_display.c+3−3

 	cmd->u.set.visible = 1;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	return ret;
 	cmd->u.position.y = plane->state->crtc_y + fb->hot_y;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	if (old_cursor_bo != NULL)
 		qxl_bo_unpin(old_cursor_bo);
 	cmd->type = QXL_CURSOR_HIDE;
 	qxl_release_unmap(qdev, release, &cmd->release_info);
-	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 	qxl_release_fence_buffer_objects(release);
+	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
 }
 static void qxl_update_dumb_head(struct qxl_device *qdev,

drivers/gpu/drm/qxl/qxl_draw.c+4−3

@@ -209,9 +209,10 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 208 unmodified lines
209	goto out_release_backoff;	209	goto out_release_backoff;
210		210
211	rects = drawable_set_clipping(qdev, num_clips, clips_bo);	211	rects = drawable_set_clipping(qdev, num_clips, clips_bo);
212	if (!rects)	212	if (!rects) {
		213	ret = -EINVAL;
213	goto out_release_backoff;	214	goto out_release_backoff;
214		215	}
215	drawable = (struct qxl_drawable *)qxl_release_map(qdev, release);	216	drawable = (struct qxl_drawable *)qxl_release_map(qdev, release);
216		217
217	drawable->clip.type = SPICE_CLIP_TYPE_RECTS;	218	drawable->clip.type = SPICE_CLIP_TYPE_RECTS;
@@ -242,8 +243,8 @@ void qxl_draw_dirty_fb(struct qxl_device *qdev, · 24 unmodified lines
242	}	243	}
243	qxl_bo_kunmap(clips_bo);	244	qxl_bo_kunmap(clips_bo);
244		245
245	qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false);
246	qxl_release_fence_buffer_objects(release);	246	qxl_release_fence_buffer_objects(release);
		247	qxl_push_command_ring_release(qdev, release, QXL_CMD_DRAW, false);
247		248
248	out_release_backoff:	249	out_release_backoff:
249	if (ret)	250	if (ret)

drivers/gpu/drm/qxl/qxl_image.c+2−1

 		break;
 	default:
 		DRM_ERROR("unsupported image bit depth\n");
-		return -EINVAL; /* TODO: cleanup */
+		qxl_bo_kunmap_atomic_page(qdev, image_bo, ptr);
+		return -EINVAL;
 	}
 	image->u.bitmap.flags = QXL_BITMAP_TOP_DOWN;
 	image->u.bitmap.x = width;

drivers/gpu/drm/qxl/qxl_ioctl.c+1−4

 			apply_surf_reloc(qdev, &reloc_info[i]);
 	}
+	qxl_release_fence_buffer_objects(release);
 	ret = qxl_push_command_ring_release(qdev, release, cmd->type, true);
-	if (ret)
-		qxl_release_backoff_reserve_list(release);
-	else
-		qxl_release_fence_buffer_objects(release);
 out_free_bos:
 out_free_release:

drivers/gpu/drm/scheduler/sched_main.c+1−1

@@ -676,7 +676,7 @@ drm_sched_get_cleanup_job(struct drm_gpu_scheduler *sched) · 675 unmodified lines
676	*/	676	*/
677	if ((sched->timeout != MAX_SCHEDULE_TIMEOUT &&	677	if ((sched->timeout != MAX_SCHEDULE_TIMEOUT &&
678	!cancel_delayed_work(&sched->work_tdr)) \|\|	678	!cancel_delayed_work(&sched->work_tdr)) \|\|
679	__kthread_should_park(sched->thread))	679	kthread_should_park())
680	return NULL;	680	return NULL;
681		681
682	spin_lock(&sched->job_list_lock);	682	spin_lock(&sched->job_list_lock);

drivers/gpu/drm/tidss/tidss_crtc.c+13−3

 	return &state->base;
 }
+static void tidss_crtc_destroy(struct drm_crtc *crtc)
+{
+	struct tidss_crtc *tcrtc = to_tidss_crtc(crtc);
+	drm_crtc_cleanup(crtc);
+	kfree(tcrtc);
+}
 static const struct drm_crtc_funcs tidss_crtc_funcs = {
 	.reset = tidss_crtc_reset,
-	.destroy = drm_crtc_cleanup,
+	.destroy = tidss_crtc_destroy,
 	.set_config = drm_atomic_helper_set_config,
 	.page_flip = drm_atomic_helper_page_flip,
 	.atomic_duplicate_state = tidss_crtc_duplicate_state,
 	bool has_ctm = tidss->feat->vp_feat.color.has_ctm;
 	int ret;
-	tcrtc = devm_kzalloc(tidss->dev, sizeof(*tcrtc), GFP_KERNEL);
+	tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL);
 	if (!tcrtc)
 		return ERR_PTR(-ENOMEM);
 	ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary,
 					NULL, &tidss_crtc_funcs, NULL);
-	if (ret < 0)
+	if (ret < 0) {
+		kfree(tcrtc);
 		return ERR_PTR(ret);
+	}
 	drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs);

drivers/gpu/drm/tidss/tidss_encoder.c+11−3

 	return 0;
 }
+static void tidss_encoder_destroy(struct drm_encoder *encoder)
+{
+	drm_encoder_cleanup(encoder);
+	kfree(encoder);
+}
 static const struct drm_encoder_helper_funcs encoder_helper_funcs = {
 	.atomic_check = tidss_encoder_atomic_check,
 };
 static const struct drm_encoder_funcs encoder_funcs = {
-	.destroy = drm_encoder_cleanup,
+	.destroy = tidss_encoder_destroy,
 };
 struct drm_encoder *tidss_encoder_create(struct tidss_device *tidss,
 	struct drm_encoder *enc;
 	int ret;
-	enc = devm_kzalloc(tidss->dev, sizeof(*enc), GFP_KERNEL);
+	enc = kzalloc(sizeof(*enc), GFP_KERNEL);
 	if (!enc)
 		return ERR_PTR(-ENOMEM);
 	ret = drm_encoder_init(&tidss->ddev, enc, &encoder_funcs,
 			       encoder_type, NULL);
-	if (ret < 0)
+	if (ret < 0) {
+		kfree(enc);
 		return ERR_PTR(ret);
+	}
 	drm_encoder_helper_add(enc, &encoder_helper_funcs);

drivers/gpu/drm/tidss/tidss_plane.c+18−6

 	dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false);
 }
+static void drm_plane_destroy(struct drm_plane *plane)
+{
+	struct tidss_plane *tplane = to_tidss_plane(plane);
+	drm_plane_cleanup(plane);
+	kfree(tplane);
+}
 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = {
 	.atomic_check = tidss_plane_atomic_check,
 	.atomic_update = tidss_plane_atomic_update,
 	.update_plane = drm_atomic_helper_update_plane,
 	.disable_plane = drm_atomic_helper_disable_plane,
 	.reset = drm_atomic_helper_plane_reset,
-	.destroy = drm_plane_cleanup,
+	.destroy = drm_plane_destroy,
 	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
 	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
 };
 			   BIT(DRM_MODE_BLEND_COVERAGE));
 	int ret;
-	tplane = devm_kzalloc(tidss->dev, sizeof(*tplane), GFP_KERNEL);
+	tplane = kzalloc(sizeof(*tplane), GFP_KERNEL);
 	if (!tplane)
 		return ERR_PTR(-ENOMEM);
 				       formats, num_formats,
 				       NULL, type, NULL);
 	if (ret < 0)
-		return ERR_PTR(ret);
+		goto err;
 	drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs);
 						default_encoding,
 						default_range);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	ret = drm_plane_create_alpha_property(&tplane->plane);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes);
 	if (ret)
-		return ERR_PTR(ret);
+		goto err;
 	return tplane;
+err:
+	kfree(tplane);
+	return ERR_PTR(ret);
 }

drivers/gpu/drm/virtio/virtgpu_ioctl.c+1−0

@@ -27,6 +27,7 @@ · 26 unmodified lines
27		27
28	#include <linux/file.h>	28	#include <linux/file.h>
29	#include <linux/sync_file.h>	29	#include <linux/sync_file.h>
		30	#include <linux/uaccess.h>
30		31
31	#include <drm/drm_file.h>	32	#include <drm/drm_file.h>
32	#include <drm/virtgpu_drm.h>	33	#include <drm/virtgpu_drm.h>

drivers/gpu/drm/virtio/virtgpu_kms.c+7−11

 #include <linux/virtio.h>
 #include <linux/virtio_config.h>
+#include <linux/virtio_ring.h>
 #include <drm/drm_file.h>
 		      events_clear, &events_clear);
 }
-static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev,
-				      uint32_t ctx_id)
-{
-	virtio_gpu_cmd_context_destroy(vgdev, ctx_id);
-	virtio_gpu_notify(vgdev);
-	ida_free(&vgdev->ctx_id_ida, ctx_id - 1);
-}
 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
 			       void (*work_func)(struct work_struct *work))
 {
 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
 {
 	struct virtio_gpu_device *vgdev = dev->dev_private;
-	struct virtio_gpu_fpriv *vfpriv;
+	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
 	if (!vgdev->has_virgl_3d)
 		return;
-	vfpriv = file->driver_priv;
+	if (vfpriv->context_created) {
+		virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
+		virtio_gpu_notify(vgdev);
+	}
-	virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id);
+	ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
 	mutex_destroy(&vfpriv->context_lock);
 	kfree(vfpriv);
 	file->driver_priv = NULL;

drivers/hv/channel_mgmt.c+3−0

@@ -839,6 +839,9 @@ void vmbus_initiate_unload(bool crash) · 838 unmodified lines
839	{	839	{
840	struct vmbus_channel_message_header hdr;	840	struct vmbus_channel_message_header hdr;
841		841
		842	if (xchg(&vmbus_connection.conn_state, DISCONNECTED) == DISCONNECTED)
		843	return;
		844
842	/* Pre-Win2012R2 hosts don't support reconnect */	845	/* Pre-Win2012R2 hosts don't support reconnect */
843	if (vmbus_proto_version < VERSION_WIN8_1)	846	if (vmbus_proto_version < VERSION_WIN8_1)
844	return;	847	return;

drivers/hv/hv.c+1−5

 	shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
 	shared_sint.masked = false;
-	if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED)
+	shared_sint.auto_eoi = hv_recommend_using_aeoi();
-		shared_sint.auto_eoi = false;
-	else
-		shared_sint.auto_eoi = true;
 	hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
 	/* Enable the global synic bit */

drivers/hv/hv_debugfs.c+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11		11
12	#include "hyperv_vmbus.h"	12	#include "hyperv_vmbus.h"
13		13
14	struct dentry *hv_debug_root;	14	static struct dentry *hv_debug_root;
15		15
16	static int hv_debugfs_delay_get(void data, u64 val)	16	static int hv_debugfs_delay_get(void data, u64 val)
17	{	17	{

drivers/hv/hv_trace.h+2−2

@@ -286,8 +286,8 @@ TRACE_EVENT(vmbus_send_tl_connect_request, · 285 unmodified lines
286	__field(int, ret)	286	__field(int, ret)
287	),	287	),
288	TP_fast_assign(	288	TP_fast_assign(
289	memcpy(__entry->guest_id, &msg->guest_endpoint_id.b, 16);	289	export_guid(__entry->guest_id, &msg->guest_endpoint_id);
290	memcpy(__entry->host_id, &msg->host_service_id.b, 16);	290	export_guid(__entry->host_id, &msg->host_service_id);
291	__entry->ret = ret;	291	__entry->ret = ret;
292	),	292	),
293	TP_printk("sending guest_endpoint_id %pUl, host_service_id %pUl, "	293	TP_printk("sending guest_endpoint_id %pUl, host_service_id %pUl, "

drivers/hv/hyperv_vmbus.h+1−1

@@ -292,7 +292,7 @@ struct vmbus_msginfo { · 291 unmodified lines
292	struct list_head msglist_entry;	292	struct list_head msglist_entry;
293		293
294	/* The message itself */	294	/* The message itself */
295	unsigned char msg[0];	295	unsigned char msg[];
296	};	296	};
297		297
298		298

drivers/hv/vmbus_drv.c+78−27

 #include <linux/kdebug.h>
 #include <linux/efi.h>
 #include <linux/random.h>
+#include <linux/kernel.h>
 #include <linux/syscore_ops.h>
 #include <clocksource/hyperv_timer.h>
 #include "hyperv_vmbus.h"
 static void *hv_panic_page;
+/*
+ * Boolean to control whether to report panic messages over Hyper-V.
+ *
+ * It can be set via /proc/sys/kernel/hyperv/record_panic_msg
+ */
+static int sysctl_record_panic_msg = 1;
+static int hyperv_report_reg(void)
+{
+	return !sysctl_record_panic_msg || !hv_panic_page;
+}
 static int hyperv_panic_event(struct notifier_block *nb, unsigned long val,
 			      void *args)
 {
 	struct pt_regs *regs;
-	regs = current_pt_regs();
+	vmbus_initiate_unload(true);
-	hyperv_report_panic(regs, val);
+	/*
+	 * Hyper-V should be notified only once about a panic.  If we will be
+	 * doing hyperv_report_panic_msg() later with kmsg data, don't do
+	 * the notification here.
+	 */
+	if (ms_hyperv.misc_features & HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE
+	    && hyperv_report_reg()) {
+		regs = current_pt_regs();
+		hyperv_report_panic(regs, val, false);
+	}
 	return NOTIFY_DONE;
 }
 	struct die_args *die = (struct die_args *)args;
 	struct pt_regs *regs = die->regs;
-	hyperv_report_panic(regs, val);
+	/*
+	 * Hyper-V should be notified only once about a panic.  If we will be
+	 * doing hyperv_report_panic_msg() later with kmsg data, don't do
+	 * the notification here.
+	 */
+	if (hyperv_report_reg())
+		hyperv_report_panic(regs, val, true);
 	return NOTIFY_DONE;
 }
 	return drv->resume(dev);
 }
+#else
+#define vmbus_suspend NULL
+#define vmbus_resume NULL
 #endif /* CONFIG_PM_SLEEP */
 /*
 }
 /*
- * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * Note: we must use the "noirq" ops: see the comment before vmbus_bus_pm.
- * SET_SYSTEM_SLEEP_PM_OPS: see the comment before vmbus_bus_pm.
+ *
+ * suspend_noirq/resume_noirq are set to NULL to support Suspend-to-Idle: we
+ * shouldn't suspend the vmbus devices upon Suspend-to-Idle, otherwise there
+ * is no way to wake up a Generation-2 VM.
+ *
+ * The other 4 ops are for hibernation.
  */
 static const struct dev_pm_ops vmbus_pm = {
-	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_suspend, vmbus_resume)
+	.suspend_noirq	= NULL,
+	.resume_noirq	= NULL,
+	.freeze_noirq	= vmbus_suspend,
+	.thaw_noirq	= vmbus_resume,
+	.poweroff_noirq	= vmbus_suspend,
+	.restore_noirq	= vmbus_resume,
 };
 /* The one and only one */
 	add_interrupt_randomness(HYPERVISOR_CALLBACK_VECTOR, 0);
 }
-/*
- * Boolean to control whether to report panic messages over Hyper-V.
- *
- * It can be set via /proc/sys/kernel/hyperv/record_panic_msg
- */
-static int sysctl_record_panic_msg = 1;
 /*
  * Callback from kmsg_dump. Grab as much as possible from the end of the kmsg
  * buffer and call into Hyper-V to transfer the data.
 			hv_panic_page = (void *)hv_alloc_hyperv_zeroed_page();
 			if (hv_panic_page) {
 				ret = kmsg_dump_register(&hv_kmsg_dumper);
-				if (ret)
+				if (ret) {
 					pr_err("Hyper-V: kmsg dump register "
 						"error 0x%x\n", ret);
+					hv_free_hyperv_page(
+					    (unsigned long)hv_panic_page);
+					hv_panic_page = NULL;
+				}
 			} else
 				pr_err("Hyper-V: panic message page memory "
 					"allocation failed");
 		}
 		register_die_notifier(&hyperv_die_block);
-		atomic_notifier_chain_register(&panic_notifier_list,
-					       &hyperv_panic_block);
 	}
+	/*
+	 * Always register the panic notifier because we need to unload
+	 * the VMbus channel connection to prevent any VMbus
+	 * activity after the VM panics.
+	 */
+	atomic_notifier_chain_register(&panic_notifier_list,
+			       &hyperv_panic_block);
 	vmbus_request_offers();
 	return 0;
 	hv_remove_vmbus_irq();
 	bus_unregister(&hv_bus);
-	hv_free_hyperv_page((unsigned long)hv_panic_page);
 	unregister_sysctl_table(hv_ctl_table_hdr);
 	hv_ctl_table_hdr = NULL;
 	return ret;
 	vmbus_initiate_unload(false);
-	vmbus_connection.conn_state = DISCONNECTED;
 	/* Reset the event for the next resume. */
 	reinit_completion(&vmbus_connection.ready_for_resume_event);
 	return 0;
 }
+#else
+#define vmbus_bus_suspend NULL
+#define vmbus_bus_resume NULL
 #endif /* CONFIG_PM_SLEEP */
 static const struct acpi_device_id vmbus_acpi_device_ids[] = {
 MODULE_DEVICE_TABLE(acpi, vmbus_acpi_device_ids);
 /*
- * Note: we must use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS rather than
+ * Note: we must use the "no_irq" ops, otherwise hibernation can not work with
- * SET_SYSTEM_SLEEP_PM_OPS, otherwise NIC SR-IOV can not work, because the
+ * PCI device assignment, because "pci_dev_pm_ops" uses the "noirq" ops: in
- * "pci_dev_pm_ops" uses the "noirq" callbacks: in the resume path, the
+ * the resume path, the pci "noirq" restore op runs before "non-noirq" op (see
- * pci "noirq" restore callback runs before "non-noirq" callbacks (see
  * resume_target_kernel() -> dpm_resume_start(), and hibernation_restore() ->
  * dpm_resume_end()). This means vmbus_bus_resume() and the pci-hyperv's
- * resume callback must also run via the "noirq" callbacks.
+ * resume callback must also run via the "noirq" ops.
+ *
+ * Set suspend_noirq/resume_noirq to NULL for Suspend-to-Idle: see the comment
+ * earlier in this file before vmbus_pm.
  */
 static const struct dev_pm_ops vmbus_bus_pm = {
-	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(vmbus_bus_suspend, vmbus_bus_resume)
+	.suspend_noirq	= NULL,
+	.resume_noirq	= NULL,
+	.freeze_noirq	= vmbus_bus_suspend,
+	.thaw_noirq	= vmbus_bus_resume,
+	.poweroff_noirq	= vmbus_bus_suspend,
+	.restore_noirq	= vmbus_bus_resume
 };
 static struct acpi_driver vmbus_acpi_driver = {
 {
 	hv_stimer_global_cleanup();
 	vmbus_initiate_unload(false);
-	vmbus_connection.conn_state = DISCONNECTED;
 	/* Make sure conn_state is set as hv_synic_cleanup checks for it */
 	mb();
 	cpuhp_remove_state(hyperv_cpuhp_online);
 	 * doing the cleanup for current CPU only. This should be sufficient
 	 * for kdump.
 	 */
-	vmbus_connection.conn_state = DISCONNECTED;
 	cpu = smp_processor_id();
 	hv_stimer_cleanup(cpu);
 	hv_synic_disable_regs(cpu);

drivers/hwmon/Kconfig+1−1

@@ -412,7 +412,7 @@ config SENSORS_DRIVETEMP · 411 unmodified lines
412	hard disk drives.	412	hard disk drives.
413		413
414	This driver can also be built as a module. If so, the module	414	This driver can also be built as a module. If so, the module
415	will be called satatemp.	415	will be called drivetemp.
416		416
417	config SENSORS_DS620	417	config SENSORS_DS620
418	tristate "Dallas Semiconductor DS620"	418	tristate "Dallas Semiconductor DS620"

drivers/hwmon/drivetemp.c+6−0

 		return err;
 	switch (attr) {
 	case hwmon_temp_input:
+		if (!temp_is_valid(buf[SCT_STATUS_TEMP]))
+			return -ENODATA;
 		*val = temp_from_sct(buf[SCT_STATUS_TEMP]);
 		break;
 	case hwmon_temp_lowest:
+		if (!temp_is_valid(buf[SCT_STATUS_TEMP_LOWEST]))
+			return -ENODATA;
 		*val = temp_from_sct(buf[SCT_STATUS_TEMP_LOWEST]);
 		break;
 	case hwmon_temp_highest:
+		if (!temp_is_valid(buf[SCT_STATUS_TEMP_HIGHEST]))
+			return -ENODATA;
 		*val = temp_from_sct(buf[SCT_STATUS_TEMP_HIGHEST]);
 		break;
 	default:

drivers/hwmon/jc42.c+1−1

@@ -506,7 +506,7 @@ static int jc42_probe(struct i2c_client client, const struct i2c_device_id id) · 505 unmodified lines
506	}	506	}
507	data->config = config;	507	data->config = config;
508		508
509	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,	509	hwmon_dev = devm_hwmon_device_register_with_info(dev, "jc42",
510	data, &jc42_chip_info,	510	data, &jc42_chip_info,
511	NULL);	511	NULL);
512	return PTR_ERR_OR_ZERO(hwmon_dev);	512	return PTR_ERR_OR_ZERO(hwmon_dev);

drivers/hwmon/k10temp.c+3−3

@@ -186,7 +186,7 @@ static long get_raw_temp(struct k10temp_data *data) · 185 unmodified lines
186	return temp;	186	return temp;
187	}	187	}
188		188
189	const char *k10temp_temp_label[] = {	189	static const char *k10temp_temp_label[] = {
190	"Tctl",	190	"Tctl",
191	"Tdie",	191	"Tdie",
192	"Tccd1",	192	"Tccd1",
@@ -199,12 +199,12 @@ const char *k10temp_temp_label[] = { · 6 unmodified lines
199	"Tccd8",	199	"Tccd8",
200	};	200	};
201		201
202	const char *k10temp_in_label[] = {	202	static const char *k10temp_in_label[] = {
203	"Vcore",	203	"Vcore",
204	"Vsoc",	204	"Vsoc",
205	};	205	};
206		206
207	const char *k10temp_curr_label[] = {	207	static const char *k10temp_curr_label[] = {
208	"Icore",	208	"Icore",
209	"Isoc",	209	"Isoc",
210	};	210	};

drivers/hwmon/pmbus/isl68137.c+85−7

@@ -21,8 +21,50 @@ · 20 unmodified lines
21	#define ISL68137_VOUT_AVS 0x30	21	#define ISL68137_VOUT_AVS 0x30
22	#define RAA_DMPVR2_READ_VMON 0xc8	22	#define RAA_DMPVR2_READ_VMON 0xc8
23		23
24	enum versions {	24	enum chips {
25	isl68137,	25	isl68137,
		26	isl68220,
		27	isl68221,
		28	isl68222,
		29	isl68223,
		30	isl68224,
		31	isl68225,
		32	isl68226,
		33	isl68227,
		34	isl68229,
		35	isl68233,
		36	isl68239,
		37	isl69222,
		38	isl69223,
		39	isl69224,
		40	isl69225,
		41	isl69227,
		42	isl69228,
		43	isl69234,
		44	isl69236,
		45	isl69239,
		46	isl69242,
		47	isl69243,
		48	isl69247,
		49	isl69248,
		50	isl69254,
		51	isl69255,
		52	isl69256,
		53	isl69259,
		54	isl69260,
		55	isl69268,
		56	isl69269,
		57	isl69298,
		58	raa228000,
		59	raa228004,
		60	raa228006,
		61	raa228228,
		62	raa229001,
		63	raa229004,
		64	};
		65
		66	enum variants {
		67	raa_dmpvr1_2rail,
26	raa_dmpvr2_1rail,	68	raa_dmpvr2_1rail,
27	raa_dmpvr2_2rail,	69	raa_dmpvr2_2rail,
28	raa_dmpvr2_3rail,	70	raa_dmpvr2_3rail,
@@ -186,7 +228,7 @@ static int isl68137_probe(struct i2c_client *client, · 157 unmodified lines
186	memcpy(info, &raa_dmpvr_info, sizeof(*info));	228	memcpy(info, &raa_dmpvr_info, sizeof(*info));
187		229
188	switch (id->driver_data) {	230	switch (id->driver_data) {
189	case isl68137:	231	case raa_dmpvr1_2rail:
190	info->pages = 2;	232	info->pages = 2;
191	info->R[PSC_VOLTAGE_IN] = 3;	233	info->R[PSC_VOLTAGE_IN] = 3;
192	info->func[0] &= ~PMBUS_HAVE_VMON;	234	info->func[0] &= ~PMBUS_HAVE_VMON;
@@ -224,11 +266,47 @@ static int isl68137_probe(struct i2c_client *client, · 31 unmodified lines
224	}	266	}
225		267
226	static const struct i2c_device_id raa_dmpvr_id[] = {	268	static const struct i2c_device_id raa_dmpvr_id[] = {
227	{"isl68137", isl68137},	269	{"isl68137", raa_dmpvr1_2rail},
228	{"raa_dmpvr2_1rail", raa_dmpvr2_1rail},	270	{"isl68220", raa_dmpvr2_2rail},
229	{"raa_dmpvr2_2rail", raa_dmpvr2_2rail},	271	{"isl68221", raa_dmpvr2_3rail},
230	{"raa_dmpvr2_3rail", raa_dmpvr2_3rail},	272	{"isl68222", raa_dmpvr2_2rail},
231	{"raa_dmpvr2_hv", raa_dmpvr2_hv},	273	{"isl68223", raa_dmpvr2_2rail},
		274	{"isl68224", raa_dmpvr2_3rail},
		275	{"isl68225", raa_dmpvr2_2rail},
		276	{"isl68226", raa_dmpvr2_3rail},
		277	{"isl68227", raa_dmpvr2_1rail},
		278	{"isl68229", raa_dmpvr2_3rail},
		279	{"isl68233", raa_dmpvr2_2rail},
		280	{"isl68239", raa_dmpvr2_3rail},
		281
		282	{"isl69222", raa_dmpvr2_2rail},
		283	{"isl69223", raa_dmpvr2_3rail},
		284	{"isl69224", raa_dmpvr2_2rail},
		285	{"isl69225", raa_dmpvr2_2rail},
		286	{"isl69227", raa_dmpvr2_3rail},
		287	{"isl69228", raa_dmpvr2_3rail},
		288	{"isl69234", raa_dmpvr2_2rail},
		289	{"isl69236", raa_dmpvr2_2rail},
		290	{"isl69239", raa_dmpvr2_3rail},
		291	{"isl69242", raa_dmpvr2_2rail},
		292	{"isl69243", raa_dmpvr2_1rail},
		293	{"isl69247", raa_dmpvr2_2rail},
		294	{"isl69248", raa_dmpvr2_2rail},
		295	{"isl69254", raa_dmpvr2_2rail},
		296	{"isl69255", raa_dmpvr2_2rail},
		297	{"isl69256", raa_dmpvr2_2rail},
		298	{"isl69259", raa_dmpvr2_2rail},
		299	{"isl69260", raa_dmpvr2_2rail},
		300	{"isl69268", raa_dmpvr2_2rail},
		301	{"isl69269", raa_dmpvr2_3rail},
		302	{"isl69298", raa_dmpvr2_2rail},
		303
		304	{"raa228000", raa_dmpvr2_hv},
		305	{"raa228004", raa_dmpvr2_hv},
		306	{"raa228006", raa_dmpvr2_hv},
		307	{"raa228228", raa_dmpvr2_2rail},
		308	{"raa229001", raa_dmpvr2_2rail},
		309	{"raa229004", raa_dmpvr2_2rail},
232	{}	310	{}
233	};	311	};
234		312

drivers/i2c/algos/i2c-algo-pca.c+1−1

@@ -542,7 +542,7 @@ int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) · 541 unmodified lines
542	EXPORT_SYMBOL(i2c_pca_add_numbered_bus);	542	EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
543		543
544	MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "	544	MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
545	"Wolfram Sang <w.sang@pengutronix.de>");	545	"Wolfram Sang <kernel@pengutronix.de>");
546	MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");	546	MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
547	MODULE_LICENSE("GPL");	547	MODULE_LICENSE("GPL");
548		548

drivers/i2c/busses/i2c-altera.c+13−6

  * @isr_mask: cached copy of local ISR enables.
  * @isr_status: cached copy of local ISR status.
  * @lock: spinlock for IRQ synchronization.
+ * @isr_mutex: mutex for IRQ thread.
  */
 struct altr_i2c_dev {
 	void __iomem *base;
 	u32 isr_mask;
 	u32 isr_status;
 	spinlock_t lock;	/* IRQ synchronization */
+	struct mutex isr_mutex;
 };
 static void
 	struct altr_i2c_dev *idev = _dev;
 	u32 status = idev->isr_status;
+	mutex_lock(&idev->isr_mutex);
 	if (!idev->msg) {
 		dev_warn(idev->dev, "unexpected interrupt\n");
 		altr_i2c_int_clear(idev, ALTR_I2C_ALL_IRQ);
-		return IRQ_HANDLED;
+		goto out;
 	}
 	read = (idev->msg->flags & I2C_M_RD) != 0;
 		complete(&idev->msg_complete);
 		dev_dbg(idev->dev, "Message Complete\n");
 	}
+out:
+	mutex_unlock(&idev->isr_mutex);
 	return IRQ_HANDLED;
 }
 	u32 value;
 	u8 addr = i2c_8bit_addr_from_msg(msg);
+	mutex_lock(&idev->isr_mutex);
 	idev->msg = msg;
 	idev->msg_len = msg->len;
 	idev->buf = msg->buf;
 		altr_i2c_int_enable(idev, imask, true);
 		altr_i2c_fill_tx_fifo(idev);
 	}
+	mutex_unlock(&idev->isr_mutex);
 	time_left = wait_for_completion_timeout(&idev->msg_complete,
 						ALTR_I2C_XFER_TIMEOUT);
 {
 	struct altr_i2c_dev *idev = NULL;
 	int irq, ret;
-	u32 val;
 	idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL);
 	if (!idev)
 	idev->dev = &pdev->dev;
 	init_completion(&idev->msg_complete);
 	spin_lock_init(&idev->lock);
+	mutex_init(&idev->isr_mutex);
-	val = device_property_read_u32(idev->dev, "fifo-size",
+	ret = device_property_read_u32(idev->dev, "fifo-size",
 				       &idev->fifo_size);
-	if (val) {
+	if (ret) {
 		dev_err(&pdev->dev, "FIFO size set to default of %d\n",
 			ALTR_I2C_DFLT_FIFO_SZ);
 		idev->fifo_size = ALTR_I2C_DFLT_FIFO_SZ;
 	}
-	val = device_property_read_u32(idev->dev, "clock-frequency",
+	ret = device_property_read_u32(idev->dev, "clock-frequency",
 				       &idev->bus_clk_rate);
-	if (val) {
+	if (ret) {
 		dev_err(&pdev->dev, "Default to 100kHz\n");
 		idev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ;	/* default clock rate */
 	}

drivers/i2c/busses/i2c-amd-mp2-pci.c+1−1

 	if (!privdata)
 		return -ENOMEM;
+	privdata->pci_dev = pci_dev;
 	rc = amd_mp2_pci_init(privdata, pci_dev);
 	if (rc)
 		return rc;
 	mutex_init(&privdata->c2p_lock);
-	privdata->pci_dev = pci_dev;
 	pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000);
 	pm_runtime_use_autosuspend(&pci_dev->dev);

drivers/i2c/busses/i2c-aspeed.c+4−1

 	/* Ack all interrupts except for Rx done */
 	writel(irq_received & ~ASPEED_I2CD_INTR_RX_DONE,
 	       bus->base + ASPEED_I2C_INTR_STS_REG);
+	readl(bus->base + ASPEED_I2C_INTR_STS_REG);
 	irq_remaining = irq_received;
 #if IS_ENABLED(CONFIG_I2C_SLAVE)
 			irq_received, irq_handled);
 	/* Ack Rx done */
-	if (irq_received & ASPEED_I2CD_INTR_RX_DONE)
+	if (irq_received & ASPEED_I2CD_INTR_RX_DONE) {
 		writel(ASPEED_I2CD_INTR_RX_DONE,
 		       bus->base + ASPEED_I2C_INTR_STS_REG);
+		readl(bus->base + ASPEED_I2C_INTR_STS_REG);
+	}
 	spin_unlock(&bus->lock);
 	return irq_remaining ? IRQ_NONE : IRQ_HANDLED;
 }

drivers/i2c/busses/i2c-at91-master.c+17−3

 							 PINCTRL_STATE_DEFAULT);
 	dev->pinctrl_pins_gpio = pinctrl_lookup_state(dev->pinctrl,
 						      "gpio");
+	if (IS_ERR(dev->pinctrl_pins_default) ||
+	    IS_ERR(dev->pinctrl_pins_gpio)) {
+		dev_info(&pdev->dev, "pinctrl states incomplete for recovery\n");
+		return -EINVAL;
+	}
+	/*
+	 * pins will be taken as GPIO, so we might as well inform pinctrl about
+	 * this and move the state to GPIO
+	 */
+	pinctrl_select_state(dev->pinctrl, dev->pinctrl_pins_gpio);
 	rinfo->sda_gpiod = devm_gpiod_get(&pdev->dev, "sda", GPIOD_IN);
 	if (PTR_ERR(rinfo->sda_gpiod) == -EPROBE_DEFER)
 		return -EPROBE_DEFER;
 		return -EPROBE_DEFER;
 	if (IS_ERR(rinfo->sda_gpiod) ||
-	    IS_ERR(rinfo->scl_gpiod) ||
+	    IS_ERR(rinfo->scl_gpiod)) {
-	    IS_ERR(dev->pinctrl_pins_default) ||
-	    IS_ERR(dev->pinctrl_pins_gpio)) {
 		dev_info(&pdev->dev, "recovery information incomplete\n");
 		if (!IS_ERR(rinfo->sda_gpiod)) {
 			gpiod_put(rinfo->sda_gpiod);
 			gpiod_put(rinfo->scl_gpiod);
 			rinfo->scl_gpiod = NULL;
 		}
+		pinctrl_select_state(dev->pinctrl, dev->pinctrl_pins_default);
 		return -EINVAL;
 	}
+	/* change the state of the pins back to their default state */
+	pinctrl_select_state(dev->pinctrl, dev->pinctrl_pins_default);
 	dev_info(&pdev->dev, "using scl, sda for recovery\n");
 	rinfo->prepare_recovery = at91_prepare_twi_recovery;

drivers/i2c/busses/i2c-bcm-iproc.c+3−0

 			value = (u8)((val >> S_RX_DATA_SHIFT) & S_RX_DATA_MASK);
 			i2c_slave_event(iproc_i2c->slave,
 					I2C_SLAVE_WRITE_RECEIVED, &value);
+			if (rx_status == I2C_SLAVE_RX_END)
+				i2c_slave_event(iproc_i2c->slave,
+						I2C_SLAVE_STOP, &value);
 		}
 	} else if (status & BIT(IS_S_TX_UNDERRUN_SHIFT)) {
 		/* Master read other than start */

drivers/i2c/busses/i2c-designware-platdrv.c+10−4

 	adap->dev.of_node = pdev->dev.of_node;
 	adap->nr = -1;
-	dev_pm_set_driver_flags(&pdev->dev,
+	if (dev->flags & ACCESS_NO_IRQ_SUSPEND) {
-				DPM_FLAG_SMART_PREPARE |
+		dev_pm_set_driver_flags(&pdev->dev,
-				DPM_FLAG_SMART_SUSPEND |
+					DPM_FLAG_SMART_PREPARE |
-				DPM_FLAG_LEAVE_SUSPENDED);
+					DPM_FLAG_LEAVE_SUSPENDED);
+	} else {
+		dev_pm_set_driver_flags(&pdev->dev,
+					DPM_FLAG_SMART_PREPARE |
+					DPM_FLAG_SMART_SUSPEND |
+					DPM_FLAG_LEAVE_SUSPENDED);
+	}
 	/* The code below assumes runtime PM to be disabled. */
 	WARN_ON(pm_runtime_enabled(&pdev->dev));

drivers/i2c/i2c-core-base.c+17−20

  *   Mux support by Rodolfo Giometti <giometti@enneenne.com> and
  *   Michael Lawnick <michael.lawnick.ext@nsn.com>
  *
- * Copyright (C) 2013-2017 Wolfram Sang <wsa@the-dreams.de>
+ * Copyright (C) 2013-2017 Wolfram Sang <wsa@kernel.org>
  */
 #define pr_fmt(fmt) "i2c-core: " fmt
 		} else if (ACPI_COMPANION(dev)) {
 			irq = i2c_acpi_get_irq(client);
 		}
-		if (irq == -EPROBE_DEFER)
+		if (irq == -EPROBE_DEFER) {
-			return irq;
+			status = irq;
+			goto put_sync_adapter;
+		}
 		if (irq < 0)
 			irq = 0;
 	 */
 	if (!driver->id_table &&
 	    !i2c_acpi_match_device(dev->driver->acpi_match_table, client) &&
-	    !i2c_of_match_device(dev->driver->of_match_table, client))
+	    !i2c_of_match_device(dev->driver->of_match_table, client)) {
-		return -ENODEV;
+		status = -ENODEV;
+		goto put_sync_adapter;
+	}
 	if (client->flags & I2C_CLIENT_WAKE) {
 		int wakeirq;
 		wakeirq = of_irq_get_byname(dev->of_node, "wakeup");
-		if (wakeirq == -EPROBE_DEFER)
+		if (wakeirq == -EPROBE_DEFER) {
-			return wakeirq;
+			status = wakeirq;
+			goto put_sync_adapter;
+		}
 		device_init_wakeup(&client->dev, true);
 err_clear_wakeup_irq:
 	dev_pm_clear_wake_irq(&client->dev);
 	device_init_wakeup(&client->dev, false);
+put_sync_adapter:
+	if (client->flags & I2C_CLIENT_HOST_NOTIFY)
+		pm_runtime_put_sync(&client->adapter->dev);
 	return status;
 }
 }
 EXPORT_SYMBOL_GPL(i2c_new_scanned_device);
-struct i2c_client *
-i2c_new_probed_device(struct i2c_adapter *adap,
-		      struct i2c_board_info *info,
-		      unsigned short const *addr_list,
-		      int (*probe)(struct i2c_adapter *adap, unsigned short addr))
-{
-	struct i2c_client *client;
-	client = i2c_new_scanned_device(adap, info, addr_list, probe);
-	return IS_ERR(client) ? NULL : client;
-}
-EXPORT_SYMBOL_GPL(i2c_new_probed_device);
 struct i2c_adapter *i2c_get_adapter(int nr)
 {
 	struct i2c_adapter *adapter;

drivers/i2c/i2c-core-of.c+1−1

@@ -5,7 +5,7 @@ · 4 unmodified lines
5	* Copyright (C) 2008 Jochen Friedrich <jochen@scram.de>	5	* Copyright (C) 2008 Jochen Friedrich <jochen@scram.de>
6	* based on a previous patch from Jon Smirl <jonsmirl@gmail.com>	6	* based on a previous patch from Jon Smirl <jonsmirl@gmail.com>
7	*	7	*
8	* Copyright (C) 2013, 2018 Wolfram Sang <wsa@the-dreams.de>	8	* Copyright (C) 2013, 2018 Wolfram Sang <wsa@kernel.org>
9	*/	9	*/
10		10
11	#include <dt-bindings/i2c/i2c.h>	11	#include <dt-bindings/i2c/i2c.h>

drivers/i2c/muxes/i2c-demux-pinctrl.c+1−0

@@ -272,6 +272,7 @@ static int i2c_demux_pinctrl_probe(struct platform_device *pdev) · 271 unmodified lines
272	err_rollback_available:	272	err_rollback_available:
273	device_remove_file(&pdev->dev, &dev_attr_available_masters);	273	device_remove_file(&pdev->dev, &dev_attr_available_masters);
274	err_rollback:	274	err_rollback:
		275	i2c_demux_deactivate_master(priv);
275	for (j = 0; j < i; j++) {	276	for (j = 0; j < i; j++) {
276	of_node_put(priv->chan[j].parent_np);	277	of_node_put(priv->chan[j].parent_np);
277	of_changeset_destroy(&priv->chan[j].chgset);	278	of_changeset_destroy(&priv->chan[j].chgset);

drivers/iio/adc/ad7192.c+47−16

 #define AD7193_CH_AINCOM	0x600 /* AINCOM - AINCOM */
 /* ID Register Bit Designations (AD7192_REG_ID) */
-#define ID_AD7190		0x4
+#define CHIPID_AD7190		0x4
-#define ID_AD7192		0x0
+#define CHIPID_AD7192		0x0
-#define ID_AD7193		0x2
+#define CHIPID_AD7193		0x2
-#define ID_AD7195		0x6
+#define CHIPID_AD7195		0x6
 #define AD7192_ID_MASK		0x0F
 /* GPOCON Register Bit Designations (AD7192_REG_GPOCON) */
 	AD7192_SYSCALIB_FULL_SCALE,
 };
+enum {
+	ID_AD7190,
+	ID_AD7192,
+	ID_AD7193,
+	ID_AD7195,
+};
+struct ad7192_chip_info {
+	unsigned int			chip_id;
+	const char			*name;
+};
 struct ad7192_state {
+	const struct ad7192_chip_info	*chip_info;
 	struct regulator		*avdd;
 	struct regulator		*dvdd;
 	struct clk			*mclk;
 	u32				conf;
 	u32				scale_avail[8][2];
 	u8				gpocon;
-	u8				devid;
 	u8				clock_sel;
 	struct mutex			lock;	/* protect sensor state */
 	u8				syscalib_mode[8];
 	id &= AD7192_ID_MASK;
-	if (id != st->devid)
+	if (id != st->chip_info->chip_id)
 		dev_warn(&st->sd.spi->dev, "device ID query failed (0x%X)\n",
 			 id);
 		st->mode |= AD7192_MODE_REJ60;
 	refin2_en = of_property_read_bool(np, "adi,refin2-pins-enable");
-	if (refin2_en && st->devid != ID_AD7195)
+	if (refin2_en && st->chip_info->chip_id != CHIPID_AD7195)
 		st->conf |= AD7192_CONF_REFSEL;
 	st->conf &= ~AD7192_CONF_CHOP;
 	IIO_CHAN_SOFT_TIMESTAMP(14),
 };
+static const struct ad7192_chip_info ad7192_chip_info_tbl[] = {
+	[ID_AD7190] = {
+		.chip_id = CHIPID_AD7190,
+		.name = "ad7190",
+	},
+	[ID_AD7192] = {
+		.chip_id = CHIPID_AD7192,
+		.name = "ad7192",
+	},
+	[ID_AD7193] = {
+		.chip_id = CHIPID_AD7193,
+		.name = "ad7193",
+	},
+	[ID_AD7195] = {
+		.chip_id = CHIPID_AD7195,
+		.name = "ad7195",
+	},
+};
 static int ad7192_channels_config(struct iio_dev *indio_dev)
 {
 	struct ad7192_state *st = iio_priv(indio_dev);
-	switch (st->devid) {
+	switch (st->chip_info->chip_id) {
-	case ID_AD7193:
+	case CHIPID_AD7193:
 		indio_dev->channels = ad7193_channels;
 		indio_dev->num_channels = ARRAY_SIZE(ad7193_channels);
 		break;
 }
 static const struct of_device_id ad7192_of_match[] = {
-	{ .compatible = "adi,ad7190", .data = (void *)ID_AD7190 },
+	{ .compatible = "adi,ad7190", .data = &ad7192_chip_info_tbl[ID_AD7190] },
-	{ .compatible = "adi,ad7192", .data = (void *)ID_AD7192 },
+	{ .compatible = "adi,ad7192", .data = &ad7192_chip_info_tbl[ID_AD7192] },
-	{ .compatible = "adi,ad7193", .data = (void *)ID_AD7193 },
+	{ .compatible = "adi,ad7193", .data = &ad7192_chip_info_tbl[ID_AD7193] },
-	{ .compatible = "adi,ad7195", .data = (void *)ID_AD7195 },
+	{ .compatible = "adi,ad7195", .data = &ad7192_chip_info_tbl[ID_AD7195] },
 	{}
 };
 MODULE_DEVICE_TABLE(of, ad7192_of_match);
 	}
 	spi_set_drvdata(spi, indio_dev);
-	st->devid = (unsigned long)of_device_get_match_data(&spi->dev);
+	st->chip_info = of_device_get_match_data(&spi->dev);
 	indio_dev->dev.parent = &spi->dev;
-	indio_dev->name = spi_get_device_id(spi)->name;
+	indio_dev->name = st->chip_info->name;
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	ret = ad7192_channels_config(indio_dev);
 	if (ret < 0)
 		goto error_disable_dvdd;
-	if (st->devid == ID_AD7195)
+	if (st->chip_info->chip_id == CHIPID_AD7195)
 		indio_dev->info = &ad7195_info;
 	else
 		indio_dev->info = &ad7192_info;

drivers/iio/adc/ad7793.c+1−1

@@ -542,7 +542,7 @@ static const struct iio_info ad7797_info = { · 541 unmodified lines
542	.read_raw = &ad7793_read_raw,	542	.read_raw = &ad7793_read_raw,
543	.write_raw = &ad7793_write_raw,	543	.write_raw = &ad7793_write_raw,
544	.write_raw_get_fmt = &ad7793_write_raw_get_fmt,	544	.write_raw_get_fmt = &ad7793_write_raw_get_fmt,
545	.attrs = &ad7793_attribute_group,	545	.attrs = &ad7797_attribute_group,
546	.validate_trigger = ad_sd_validate_trigger,	546	.validate_trigger = ad_sd_validate_trigger,
547	};	547	};
548		548

drivers/iio/adc/stm32-adc.c+28−3

@@ -1418,8 +1418,30 @@ static unsigned int stm32_adc_dma_residue(struct stm32_adc *adc) · 1417 unmodified lines
1418	static void stm32_adc_dma_buffer_done(void *data)	1418	static void stm32_adc_dma_buffer_done(void *data)
1419	{	1419	{
1420	struct iio_dev *indio_dev = data;	1420	struct iio_dev *indio_dev = data;
		1421	struct stm32_adc *adc = iio_priv(indio_dev);
		1422	int residue = stm32_adc_dma_residue(adc);
		1423
		1424	/*
		1425	* In DMA mode the trigger services of IIO are not used
		1426	* (e.g. no call to iio_trigger_poll).
		1427	* Calling irq handler associated to the hardware trigger is not
		1428	* relevant as the conversions have already been done. Data
		1429	* transfers are performed directly in DMA callback instead.
		1430	* This implementation avoids to call trigger irq handler that
		1431	* may sleep, in an atomic context (DMA irq handler context).
		1432	*/
		1433	dev_dbg(&indio_dev->dev, "%s bufi=%d\n", __func__, adc->bufi);
1421		1434
1422	iio_trigger_poll_chained(indio_dev->trig);	1435	while (residue >= indio_dev->scan_bytes) {
		1436	u16 buffer = (u16 )&adc->rx_buf[adc->bufi];
		1437
		1438	iio_push_to_buffers(indio_dev, buffer);
		1439
		1440	residue -= indio_dev->scan_bytes;
		1441	adc->bufi += indio_dev->scan_bytes;
		1442	if (adc->bufi >= adc->rx_buf_sz)
		1443	adc->bufi = 0;
		1444	}
1423	}	1445	}
1424		1446
1425	static int stm32_adc_dma_start(struct iio_dev *indio_dev)	1447	static int stm32_adc_dma_start(struct iio_dev *indio_dev)
@@ -1845,6 +1867,7 @@ static int stm32_adc_probe(struct platform_device *pdev) · 419 unmodified lines
1845	{	1867	{
1846	struct iio_dev *indio_dev;	1868	struct iio_dev *indio_dev;
1847	struct device *dev = &pdev->dev;	1869	struct device *dev = &pdev->dev;
		1870	irqreturn_t (handler)(int irq, void p) = NULL;
1848	struct stm32_adc *adc;	1871	struct stm32_adc *adc;
1849	int ret;	1872	int ret;
1850		1873
@@ -1911,9 +1934,11 @@ static int stm32_adc_probe(struct platform_device *pdev) · 60 unmodified lines
1911	if (ret < 0)	1934	if (ret < 0)
1912	return ret;	1935	return ret;
1913		1936
		1937	if (!adc->dma_chan)
		1938	handler = &stm32_adc_trigger_handler;
		1939
1914	ret = iio_triggered_buffer_setup(indio_dev,	1940	ret = iio_triggered_buffer_setup(indio_dev,
1915	&iio_pollfunc_store_time,	1941	&iio_pollfunc_store_time, handler,
1916	&stm32_adc_trigger_handler,
1917	&stm32_adc_buffer_setup_ops);	1942	&stm32_adc_buffer_setup_ops);
1918	if (ret) {	1943	if (ret) {
1919	dev_err(&pdev->dev, "buffer setup failed\n");	1944	dev_err(&pdev->dev, "buffer setup failed\n");

drivers/iio/adc/ti-ads8344.c+3−3

@@ -29,7 +29,7 @@ struct ads8344 { · 28 unmodified lines
29	struct mutex lock;	29	struct mutex lock;
30		30
31	u8 tx_buf ____cacheline_aligned;	31	u8 tx_buf ____cacheline_aligned;
32	u16 rx_buf;	32	u8 rx_buf[3];
33	};	33	};
34		34
35	#define ADS8344_VOLTAGE_CHANNEL(chan, si) \	35	#define ADS8344_VOLTAGE_CHANNEL(chan, si) \
@@ -89,11 +89,11 @@ static int ads8344_adc_conversion(struct ads8344 *adc, int channel, · 53 unmodified lines
89		89
90	udelay(9);	90	udelay(9);
91		91
92	ret = spi_read(spi, &adc->rx_buf, 2);	92	ret = spi_read(spi, adc->rx_buf, sizeof(adc->rx_buf));
93	if (ret)	93	if (ret)
94	return ret;	94	return ret;
95		95
96	return adc->rx_buf;	96	return adc->rx_buf[0] << 9 \| adc->rx_buf[1] << 1 \| adc->rx_buf[2] >> 7;
97	}	97	}
98		98
99	static int ads8344_read_raw(struct iio_dev *iio,	99	static int ads8344_read_raw(struct iio_dev *iio,

drivers/iio/adc/xilinx-xadc-core.c+74−21

 #define XADC_FLAGS_BUFFERED BIT(0)
+/*
+ * The XADC hardware supports a samplerate of up to 1MSPS. Unfortunately it does
+ * not have a hardware FIFO. Which means an interrupt is generated for each
+ * conversion sequence. At 1MSPS sample rate the CPU in ZYNQ7000 is completely
+ * overloaded by the interrupts that it soft-lockups. For this reason the driver
+ * limits the maximum samplerate 150kSPS. At this rate the CPU is fairly busy,
+ * but still responsive.
+ */
+#define XADC_MAX_SAMPLERATE 150000
 static void xadc_write_reg(struct xadc *xadc, unsigned int reg,
 	uint32_t val)
 {
 	spin_lock_irqsave(&xadc->lock, flags);
 	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val);
-	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS);
+	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, XADC_AXI_INT_EOS);
 	if (state)
 		val |= XADC_AXI_INT_EOS;
 	else
 {
 	uint16_t val;
+	/* Powerdown the ADC-B when it is not needed. */
 	switch (seq_mode) {
 	case XADC_CONF1_SEQ_SIMULTANEOUS:
 	case XADC_CONF1_SEQ_INDEPENDENT:
-		val = XADC_CONF2_PD_ADC_B;
+		val = 0;
 		break;
 	default:
-		val = 0;
+		val = XADC_CONF2_PD_ADC_B;
 		break;
 	}
 	if (ret)
 		goto err;
+	/*
+	 * In simultaneous mode the upper and lower aux channels are samples at
+	 * the same time. In this mode the upper 8 bits in the sequencer
+	 * register are don't care and the lower 8 bits control two channels
+	 * each. As such we must set the bit if either the channel in the lower
+	 * group or the upper group is enabled.
+	 */
+	if (seq_mode == XADC_CONF1_SEQ_SIMULTANEOUS)
+		scan_mask = ((scan_mask >> 8) | scan_mask) & 0xff0000;
 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16);
 	if (ret)
 		goto err;
 	.postdisable = &xadc_postdisable,
 };
+static int xadc_read_samplerate(struct xadc *xadc)
+{
+	unsigned int div;
+	uint16_t val16;
+	int ret;
+	ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);
+	if (ret)
+		return ret;
+	div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET;
+	if (div < 2)
+		div = 2;
+	return xadc_get_dclk_rate(xadc) / div / 26;
+}
 static int xadc_read_raw(struct iio_dev *indio_dev,
 	struct iio_chan_spec const *chan, int *val, int *val2, long info)
 {
 	struct xadc *xadc = iio_priv(indio_dev);
-	unsigned int div;
 	uint16_t val16;
 	int ret;
 		*val = -((273150 << 12) / 503975);
 		return IIO_VAL_INT;
 	case IIO_CHAN_INFO_SAMP_FREQ:
-		ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);
+		ret = xadc_read_samplerate(xadc);
-		if (ret)
+		if (ret < 0)
 			return ret;
-		div = (val16 & XADC_CONF2_DIV_MASK) >> XADC_CONF2_DIV_OFFSET;
+		*val = ret;
-		if (div < 2)
-			div = 2;
-		*val = xadc_get_dclk_rate(xadc) / div / 26;
 		return IIO_VAL_INT;
 	default:
 		return -EINVAL;
 	}
 }
-static int xadc_write_raw(struct iio_dev *indio_dev,
+static int xadc_write_samplerate(struct xadc *xadc, int val)
-	struct iio_chan_spec const *chan, int val, int val2, long info)
 {
-	struct xadc *xadc = iio_priv(indio_dev);
 	unsigned long clk_rate = xadc_get_dclk_rate(xadc);
 	unsigned int div;
 	if (!clk_rate)
 		return -EINVAL;
-	if (info != IIO_CHAN_INFO_SAMP_FREQ)
-		return -EINVAL;
 	if (val <= 0)
 		return -EINVAL;
 	/* Max. 150 kSPS */
-	if (val > 150000)
+	if (val > XADC_MAX_SAMPLERATE)
-		val = 150000;
+		val = XADC_MAX_SAMPLERATE;
 	val *= 26;
 	 * limit.
 	 */
 	div = clk_rate / val;
-	if (clk_rate / div / 26 > 150000)
+	if (clk_rate / div / 26 > XADC_MAX_SAMPLERATE)
 		div++;
 	if (div < 2)
 		div = 2;
 		div << XADC_CONF2_DIV_OFFSET);
 }
+static int xadc_write_raw(struct iio_dev *indio_dev,
+	struct iio_chan_spec const *chan, int val, int val2, long info)
+{
+	struct xadc *xadc = iio_priv(indio_dev);
+	if (info != IIO_CHAN_INFO_SAMP_FREQ)
+		return -EINVAL;
+	return xadc_write_samplerate(xadc, val);
+}
 static const struct iio_event_spec xadc_temp_events[] = {
 	{
 		.type = IIO_EV_TYPE_THRESH,
 	if (ret)
 		goto err_free_samplerate_trigger;
+	/*
+	 * Make sure not to exceed the maximum samplerate since otherwise the
+	 * resulting interrupt storm will soft-lock the system.
+	 */
+	if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {
+		ret = xadc_read_samplerate(xadc);
+		if (ret < 0)
+			goto err_free_samplerate_trigger;
+		if (ret > XADC_MAX_SAMPLERATE) {
+			ret = xadc_write_samplerate(xadc, XADC_MAX_SAMPLERATE);
+			if (ret < 0)
+				goto err_free_samplerate_trigger;
+		}
+	}
 	ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0,
 			dev_name(&pdev->dev), indio_dev);
 	if (ret)

drivers/iio/common/st_sensors/st_sensors_core.c+1−1

@@ -79,7 +79,7 @@ int st_sensors_set_odr(struct iio_dev *indio_dev, unsigned int odr) · 78 unmodified lines
79	struct st_sensor_odr_avl odr_out = {0, 0};	79	struct st_sensor_odr_avl odr_out = {0, 0};
80	struct st_sensor_data *sdata = iio_priv(indio_dev);	80	struct st_sensor_data *sdata = iio_priv(indio_dev);
81		81
82	if (!sdata->sensor_settings->odr.addr)	82	if (!sdata->sensor_settings->odr.mask)
83	return 0;	83	return 0;
84		84
85	err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out);	85	err = st_sensors_match_odr(sdata->sensor_settings, odr, &odr_out);

drivers/iio/dac/ad5770r.c+1−1

@@ -525,7 +525,7 @@ static int ad5770r_channel_config(struct ad5770r_state *st) · 524 unmodified lines
525	ret = fwnode_property_read_u32(child, "num", &num);	525	ret = fwnode_property_read_u32(child, "num", &num);
526	if (ret)	526	if (ret)
527	return ret;	527	return ret;
528	if (num > AD5770R_MAX_CHANNELS)	528	if (num >= AD5770R_MAX_CHANNELS)
529	return -EINVAL;	529	return -EINVAL;
530		530
531	ret = fwnode_property_read_u32_array(child,	531	ret = fwnode_property_read_u32_array(child,

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+10−1

 	if (result)
 		goto out_unlock;
+	pm_runtime_disable(dev);
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
 	result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
 	if (result)
 		goto out_unlock;
 	mutex_lock(&st->lock);
+	st->suspended_sensors = 0;
+	if (pm_runtime_suspended(dev)) {
+		result = 0;
+		goto out_unlock;
+	}
 	if (iio_buffer_enabled(indio_dev)) {
 		result = inv_mpu6050_prepare_fifo(st, false);
 		if (result)
 			goto out_unlock;
 	}
-	st->suspended_sensors = 0;
 	if (st->chip_config.accl_en)
 		st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
 	if (st->chip_config.gyro_en)

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h+3−0

  * @gain: Configured sensor sensitivity.
  * @odr: Output data rate of the sensor [Hz].
  * @watermark: Sensor watermark level.
+ * @decimator: Sensor decimation factor.
  * @sip: Number of samples in a given pattern.
  * @ts_ref: Sensor timestamp reference for hw one.
  * @ext_info: Sensor settings if it is connected to i2c controller
 	u32 odr;
 	u16 watermark;
+	u8 decimator;
 	u8 sip;
 	s64 ts_ref;
 	struct {
 		const struct st_lsm6dsx_ext_dev_settings *settings;
+		u32 slv_odr;
 		u8 addr;
 	} ext_info;
 };

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c+16−7

 			break;
 	}
+	sensor->decimator = decimator;
 	return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val;
 }
 int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw)
 {
 	struct st_lsm6dsx_sensor *acc_sensor, *gyro_sensor, *ext_sensor = NULL;
-	int err, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
+	int err, sip, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
 	u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE;
 	u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask;
 	u8 gyro_buff[ST_LSM6DSX_IIO_BUFF_SIZE];
 		acc_sip = acc_sensor->sip;
 		ts_sip = hw->ts_sip;
 		offset = 0;
+		sip = 0;
 		while (acc_sip > 0 || gyro_sip > 0 || ext_sip > 0) {
-			if (gyro_sip > 0) {
+			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
 				memcpy(gyro_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (acc_sip > 0) {
+			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
 				memcpy(acc_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (ext_sip > 0) {
+			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
 				memcpy(ext_buff, &hw->buff[offset],
 				       ST_LSM6DSX_SAMPLE_SIZE);
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 				offset += ST_LSM6DSX_SAMPLE_SIZE;
 			}
-			if (gyro_sip-- > 0)
+			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_GYRO],
 					gyro_buff, gyro_sensor->ts_ref + ts);
-			if (acc_sip-- > 0)
+				gyro_sip--;
+			}
+			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_ACC],
 					acc_buff, acc_sensor->ts_ref + ts);
-			if (ext_sip-- > 0)
+				acc_sip--;
+			}
+			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_EXT0],
 					ext_buff, ext_sensor->ts_ref + ts);
+				ext_sip--;
+			}
+			sip++;
 		}
 	}

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c+23−1

@@ -2036,11 +2036,21 @@ static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) · 2035 unmodified lines
2036	return 0;	2036	return 0;
2037	}	2037	}
2038		2038
2039	static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)	2039	static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw)
2040	{	2040	{
2041	const struct st_lsm6dsx_reg *reg;	2041	const struct st_lsm6dsx_reg *reg;
2042	int err;	2042	int err;
2043		2043
		2044	/*
		2045	* flush hw FIFO before device reset in order to avoid
		2046	* possible races on interrupt line 1. If the first interrupt
		2047	* line is asserted during hw reset the device will work in
		2048	* I3C-only mode (if it is supported)
		2049	*/
		2050	err = st_lsm6dsx_flush_fifo(hw);
		2051	if (err < 0 && err != -ENOTSUPP)
		2052	return err;
		2053
2044	/* device sw reset */	2054	/* device sw reset */
2045	reg = &hw->settings->reset;	2055	reg = &hw->settings->reset;
2046	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,	2056	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,
@@ -2059,6 +2069,18 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) · 12 unmodified lines
2059		2069
2060	msleep(50);	2070	msleep(50);
2061		2071
		2072	return 0;
		2073	}
		2074
		2075	static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
		2076	{
		2077	const struct st_lsm6dsx_reg *reg;
		2078	int err;
		2079
		2080	err = st_lsm6dsx_reset_device(hw);
		2081	if (err < 0)
		2082	return err;
		2083
2062	/* enable Block Data Update */	2084	/* enable Block Data Update */
2063	reg = &hw->settings->bdu;	2085	reg = &hw->settings->bdu;
2064	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,	2086	err = regmap_update_bits(hw->regmap, reg->addr, reg->mask,

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c+22−7

 	settings = sensor->ext_info.settings;
 	if (enable) {
-		err = st_lsm6dsx_shub_set_odr(sensor, sensor->odr);
+		err = st_lsm6dsx_shub_set_odr(sensor,
+					      sensor->ext_info.slv_odr);
 		if (err < 0)
 			return err;
 	} else {
 	if (err < 0)
 		return err;
-	delay = 1000000000 / sensor->odr;
+	delay = 1000000000 / sensor->ext_info.slv_odr;
 	usleep_range(delay, 2 * delay);
 	len = min_t(int, sizeof(data), ch->scan_type.realbits >> 3);
 		iio_device_release_direct_mode(iio_dev);
 		break;
 	case IIO_CHAN_INFO_SAMP_FREQ:
-		*val = sensor->odr / 1000;
+		*val = sensor->ext_info.slv_odr / 1000;
-		*val2 = (sensor->odr % 1000) * 1000;
+		*val2 = (sensor->ext_info.slv_odr % 1000) * 1000;
 		ret = IIO_VAL_INT_PLUS_MICRO;
 		break;
 	case IIO_CHAN_INFO_SCALE:
 		val = val * 1000 + val2 / 1000;
 		err = st_lsm6dsx_shub_get_odr_val(sensor, val, &data);
-		if (!err)
+		if (!err) {
-			sensor->odr = val;
+			struct st_lsm6dsx_hw *hw = sensor->hw;
+			struct st_lsm6dsx_sensor *ref_sensor;
+			u8 odr_val;
+			int odr;
+			ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]);
+			odr = st_lsm6dsx_check_odr(ref_sensor, val, &odr_val);
+			if (odr < 0)
+				return odr;
+			sensor->ext_info.slv_odr = val;
+			sensor->odr = odr;
+		}
 		break;
 	}
 	default:
 			     const struct st_lsm6dsx_ext_dev_settings *info,
 			     u8 i2c_addr, const char *name)
 {
+	enum st_lsm6dsx_sensor_id ref_id = ST_LSM6DSX_ID_ACC;
 	struct iio_chan_spec *ext_channels;
 	struct st_lsm6dsx_sensor *sensor;
 	struct iio_dev *iio_dev;
 	sensor = iio_priv(iio_dev);
 	sensor->id = id;
 	sensor->hw = hw;
-	sensor->odr = info->odr_table.odr_avl[0].milli_hz;
+	sensor->odr = hw->settings->odr_table[ref_id].odr_avl[0].milli_hz;
+	sensor->ext_info.slv_odr = info->odr_table.odr_avl[0].milli_hz;
 	sensor->gain = info->fs_table.fs_avl[0].gain;
 	sensor->ext_info.settings = info;
 	sensor->ext_info.addr = i2c_addr;

drivers/iio/industrialio-core.c+2−5

 			return -EINVAL;
 		integer = ch;
 	} else {
-		ret = iio_str_to_fixpoint(buf, fract_mult, &integer, &fract);
+		ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract,
+					    scale_db);
 		if (ret)
 			return ret;
 	}
-	ret = __iio_str_to_fixpoint(buf, fract_mult, &integer, &fract,
-				    scale_db);
-	if (ret)
-		return ret;
 	ret = indio_dev->info->write_raw(indio_dev, this_attr->c,
 					 integer, fract, this_attr->address);

drivers/infiniband/core/cm.c+14−12

 	ret = xa_alloc_cyclic_irq(&cm.local_id_table, &id, NULL, xa_limit_32b,
 				  &cm.local_id_next, GFP_KERNEL);
-	if (ret)
+	if (ret < 0)
 		goto error;
 	cm_id_priv->id.local_id = (__force __be32)id ^ cm.random_id_operand;
 static void cm_format_rej(struct cm_rej_msg *rej_msg,
 			  struct cm_id_private *cm_id_priv,
-			  enum ib_cm_rej_reason reason,
+			  enum ib_cm_rej_reason reason, void *ari,
-			  void *ari,
+			  u8 ari_length, const void *private_data,
-			  u8 ari_length,
+			  u8 private_data_len, enum ib_cm_state state)
-			  const void *private_data,
-			  u8 private_data_len)
 {
 	lockdep_assert_held(&cm_id_priv->lock);
 	IBA_SET(CM_REJ_REMOTE_COMM_ID, rej_msg,
 		be32_to_cpu(cm_id_priv->id.remote_id));
-	switch(cm_id_priv->id.state) {
+	switch (state) {
 	case IB_CM_REQ_RCVD:
 		IBA_SET(CM_REJ_LOCAL_COMM_ID, rej_msg, be32_to_cpu(0));
 		IBA_SET(CM_REJ_MESSAGE_REJECTED, rej_msg, CM_MSG_RESPONSE_REQ);
 			      cm_id_priv->private_data_len);
 		break;
 	case IB_CM_TIMEWAIT:
-		cm_format_rej((struct cm_rej_msg *) msg->mad, cm_id_priv,
+		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv,
-			      IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0);
+			      IB_CM_REJ_STALE_CONN, NULL, 0, NULL, 0,
+			      IB_CM_TIMEWAIT);
 		break;
 	default:
 		goto unlock;
 			      u8 ari_length, const void *private_data,
 			      u8 private_data_len)
 {
+	enum ib_cm_state state = cm_id_priv->id.state;
 	struct ib_mad_send_buf *msg;
 	int ret;
 	    (ari && ari_length > IB_CM_REJ_ARI_LENGTH))
 		return -EINVAL;
-	switch (cm_id_priv->id.state) {
+	switch (state) {
 	case IB_CM_REQ_SENT:
 	case IB_CM_MRA_REQ_RCVD:
 	case IB_CM_REQ_RCVD:
 		if (ret)
 			return ret;
 		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason,
-			      ari, ari_length, private_data, private_data_len);
+			      ari, ari_length, private_data, private_data_len,
+			      state);
 		break;
 	case IB_CM_REP_SENT:
 	case IB_CM_MRA_REP_RCVD:
 		if (ret)
 			return ret;
 		cm_format_rej((struct cm_rej_msg *)msg->mad, cm_id_priv, reason,
-			      ari, ari_length, private_data, private_data_len);
+			      ari, ari_length, private_data, private_data_len,
+			      state);
 		break;
 	default:
 		pr_debug("%s: local_id %d, cm_id->state: %d\n", __func__,

drivers/infiniband/core/rdma_core.c+4−5

 	 * uverbs_uobject_fd_release(), and the caller is expected to ensure
 	 * that release is never done while a call to lookup is possible.
 	 */
-	if (f->f_op != fd_type->fops) {
+	if (f->f_op != fd_type->fops || uobject->ufile != ufile) {
 		fput(f);
 		return ERR_PTR(-EBADF);
 	}
 	filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL,
 				  fd_type->flags);
 	if (IS_ERR(filp)) {
+		uverbs_uobject_put(uobj);
 		uobj = ERR_CAST(filp);
-		goto err_uobj;
+		goto err_fd;
 	}
 	uobj->object = filp;
 	uobj->id = new_fd;
 	return uobj;
-err_uobj:
-	uverbs_uobject_put(uobj);
 err_fd:
 	put_unused_fd(new_fd);
 	return uobj;
 			     enum rdma_lookup_mode mode)
 {
 	assert_uverbs_usecnt(uobj, mode);
-	uobj->uapi_object->type_class->lookup_put(uobj, mode);
 	/*
 	 * In order to unlock an object, either decrease its usecnt for
 	 * read access or zero it in case of exclusive access. See
 		break;
 	}
+	uobj->uapi_object->type_class->lookup_put(uobj, mode);
 	/* Pairs with the kref obtained by type->lookup_get */
 	uverbs_uobject_put(uobj);
 }

drivers/infiniband/core/uverbs_main.c+4−0

 			ret = mmget_not_zero(mm);
 			if (!ret) {
 				list_del_init(&priv->list);
+				if (priv->entry) {
+					rdma_user_mmap_entry_put(priv->entry);
+					priv->entry = NULL;
+				}
 				mm = NULL;
 				continue;
 			}

drivers/infiniband/hw/i40iw/i40iw_ctrl.c+1−1

@@ -1046,7 +1046,7 @@ i40iw_sc_query_rdma_features(struct i40iw_sc_cqp *cqp, · 1045 unmodified lines
1046	u64 header;	1046	u64 header;
1047		1047
1048	wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);	1048	wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
1049	if (wqe)	1049	if (!wqe)
1050	return I40IW_ERR_RING_FULL;	1050	return I40IW_ERR_RING_FULL;
1051		1051
1052	set_64bit_val(wqe, 32, feat_mem->pa);	1052	set_64bit_val(wqe, 32, feat_mem->pa);

drivers/infiniband/hw/mlx4/main.c+2−1

@@ -1499,8 +1499,9 @@ static int __mlx4_ib_create_default_rules( · 1498 unmodified lines
1499	int i;	1499	int i;
1500		1500
1501	for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {	1501	for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
		1502	union ib_flow_spec ib_spec = {};
1502	int ret;	1503	int ret;
1503	union ib_flow_spec ib_spec;	1504
1504	switch (pdefault_rules->rules_create_list[i]) {	1505	switch (pdefault_rules->rules_create_list[i]) {
1505	case 0:	1506	case 0:
1506	/* no rule */	1507	/* no rule */

drivers/infiniband/hw/mlx5/qp.c+3−1

@@ -5558,7 +5558,9 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, · 5557 unmodified lines
5558	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);	5558	rdma_ah_set_path_bits(ah_attr, path->grh_mlid & 0x7f);
5559	rdma_ah_set_static_rate(ah_attr,	5559	rdma_ah_set_static_rate(ah_attr,
5560	path->static_rate ? path->static_rate - 5 : 0);	5560	path->static_rate ? path->static_rate - 5 : 0);
5561	if (path->grh_mlid & (1 << 7)) {	5561
		5562	if (path->grh_mlid & (1 << 7) \|\|
		5563	ah_attr->type == RDMA_AH_ATTR_TYPE_ROCE) {
5562	u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);	5564	u32 tc_fl = be32_to_cpu(path->tclass_flowlabel);
5563		5565
5564	rdma_ah_set_grh(ah_attr, NULL,	5566	rdma_ah_set_grh(ah_attr, NULL,

drivers/infiniband/sw/rdmavt/cq.c+2−2

@@ -248,8 +248,8 @@ int rvt_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 247 unmodified lines
248	*/	248	*/
249	if (udata && udata->outlen >= sizeof(__u64)) {	249	if (udata && udata->outlen >= sizeof(__u64)) {
250	cq->ip = rvt_create_mmap_info(rdi, sz, udata, u_wc);	250	cq->ip = rvt_create_mmap_info(rdi, sz, udata, u_wc);
251	if (!cq->ip) {	251	if (IS_ERR(cq->ip)) {
252	err = -ENOMEM;	252	err = PTR_ERR(cq->ip);
253	goto bail_wc;	253	goto bail_wc;
254	}	254	}
255		255

drivers/infiniband/sw/rdmavt/mmap.c+2−2

@@ -154,7 +154,7 @@ done: · 153 unmodified lines
154	* @udata: user data (must be valid!)	154	* @udata: user data (must be valid!)
155	* @obj: opaque pointer to a cq, wq etc	155	* @obj: opaque pointer to a cq, wq etc
156	*	156	*
157	* Return: rvt_mmap struct on success	157	* Return: rvt_mmap struct on success, ERR_PTR on failure
158	*/	158	*/
159	struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size,	159	struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size,
160	struct ib_udata udata, void obj)	160	struct ib_udata udata, void obj)
@@ -166,7 +166,7 @@ struct rvt_mmap_info rvt_create_mmap_info(struct rvt_dev_info rdi, u32 size, · 5 unmodified lines
166		166
167	ip = kmalloc_node(sizeof(*ip), GFP_KERNEL, rdi->dparms.node);	167	ip = kmalloc_node(sizeof(*ip), GFP_KERNEL, rdi->dparms.node);
168	if (!ip)	168	if (!ip)
169	return ip;	169	return ERR_PTR(-ENOMEM);
170		170
171	size = PAGE_ALIGN(size);	171	size = PAGE_ALIGN(size);
172		172

drivers/infiniband/sw/rdmavt/qp.c+2−2

@@ -1244,8 +1244,8 @@ struct ib_qp rvt_create_qp(struct ib_pd ibpd, · 1243 unmodified lines
1244		1244
1245	qp->ip = rvt_create_mmap_info(rdi, s, udata,	1245	qp->ip = rvt_create_mmap_info(rdi, s, udata,
1246	qp->r_rq.wq);	1246	qp->r_rq.wq);
1247	if (!qp->ip) {	1247	if (IS_ERR(qp->ip)) {
1248	ret = ERR_PTR(-ENOMEM);	1248	ret = ERR_CAST(qp->ip);
1249	goto bail_qpn;	1249	goto bail_qpn;
1250	}	1250	}
1251		1251

drivers/infiniband/sw/rdmavt/srq.c+2−2

@@ -111,8 +111,8 @@ int rvt_create_srq(struct ib_srq ibsrq, struct ib_srq_init_attr srq_init_attr, · 110 unmodified lines
111	u32 s = sizeof(struct rvt_rwq) + srq->rq.size * sz;	111	u32 s = sizeof(struct rvt_rwq) + srq->rq.size * sz;
112		112
113	srq->ip = rvt_create_mmap_info(dev, s, udata, srq->rq.wq);	113	srq->ip = rvt_create_mmap_info(dev, s, udata, srq->rq.wq);
114	if (!srq->ip) {	114	if (IS_ERR(srq->ip)) {
115	ret = -ENOMEM;	115	ret = PTR_ERR(srq->ip);
116	goto bail_wq;	116	goto bail_wq;
117	}	117	}
118		118

drivers/infiniband/sw/siw/siw_qp_tx.c+11−4

 {
 	struct ib_mr *base_mr = (struct ib_mr *)(uintptr_t)sqe->base_mr;
 	struct siw_device *sdev = to_siw_dev(pd->device);
-	struct siw_mem *mem = siw_mem_id2obj(sdev, sqe->rkey  >> 8);
+	struct siw_mem *mem;
 	int rv = 0;
 	siw_dbg_pd(pd, "STag 0x%08x\n", sqe->rkey);
-	if (unlikely(!mem || !base_mr)) {
+	if (unlikely(!base_mr)) {
 		pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey);
 		return -EINVAL;
 	}
 	if (unlikely(base_mr->rkey >> 8 != sqe->rkey  >> 8)) {
 		pr_warn("siw: fastreg: STag 0x%08x: bad MR\n", sqe->rkey);
-		rv = -EINVAL;
+		return -EINVAL;
-		goto out;
 	}
+	mem = siw_mem_id2obj(sdev, sqe->rkey  >> 8);
+	if (unlikely(!mem)) {
+		pr_warn("siw: fastreg: STag 0x%08x unknown\n", sqe->rkey);
+		return -EINVAL;
+	}
 	if (unlikely(mem->pd != pd)) {
 		pr_warn("siw: fastreg: PD mismatch\n");
 		rv = -EINVAL;

drivers/interconnect/qcom/bcm-voter.c+3−2

 	if (!cmd)
 		return;
+	memset(cmd, 0, sizeof(*cmd));
 	if (vote_x == 0 && vote_y == 0)
 		valid = false;
 	 * Set the wait for completion flag on command that need to be completed
 	 * before the next command.
 	 */
-	if (commit)
+	cmd->wait = commit;
-		cmd->wait = true;
 }
 static void tcs_list_gen(struct list_head *bcm_list, int bucket,

drivers/iommu/Kconfig+2−2

@@ -362,7 +362,7 @@ config IPMMU_VMSA · 361 unmodified lines
362		362
363	config SPAPR_TCE_IOMMU	363	config SPAPR_TCE_IOMMU
364	bool "sPAPR TCE IOMMU Support"	364	bool "sPAPR TCE IOMMU Support"
365	depends on PPC_POWERNV \|\| PPC_PSERIES \|\| (PPC && COMPILE_TEST)	365	depends on PPC_POWERNV \|\| PPC_PSERIES
366	select IOMMU_API	366	select IOMMU_API
367	help	367	help
368	Enables bits of IOMMU API required by VFIO. The iommu_ops	368	Enables bits of IOMMU API required by VFIO. The iommu_ops
@@ -457,7 +457,7 @@ config S390_AP_IOMMU · 88 unmodified lines
457		457
458	config MTK_IOMMU	458	config MTK_IOMMU
459	bool "MTK IOMMU Support"	459	bool "MTK IOMMU Support"
460	depends on ARM \|\| ARM64 \|\| COMPILE_TEST	460	depends on HAS_DMA
461	depends on ARCH_MEDIATEK \|\| COMPILE_TEST	461	depends on ARCH_MEDIATEK \|\| COMPILE_TEST
462	select ARM_DMA_USE_IOMMU	462	select ARM_DMA_USE_IOMMU
463	select IOMMU_API	463	select IOMMU_API

drivers/iommu/amd_iommu_init.c+1−1

@@ -2936,7 +2936,7 @@ static int __init parse_amd_iommu_intr(char *str) · 2935 unmodified lines
2936	{	2936	{
2937	for (; *str; ++str) {	2937	for (; *str; ++str) {
2938	if (strncmp(str, "legacy", 6) == 0) {	2938	if (strncmp(str, "legacy", 6) == 0) {
2939	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;	2939	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY_GA;
2940	break;	2940	break;
2941	}	2941	}
2942	if (strncmp(str, "vapic", 5) == 0) {	2942	if (strncmp(str, "vapic", 5) == 0) {

drivers/iommu/intel-iommu.c+2−2

@@ -371,11 +371,11 @@ int dmar_disabled = 0; · 370 unmodified lines
371	int dmar_disabled = 1;	371	int dmar_disabled = 1;
372	#endif /* CONFIG_INTEL_IOMMU_DEFAULT_ON */	372	#endif /* CONFIG_INTEL_IOMMU_DEFAULT_ON */
373		373
374	#ifdef INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON	374	#ifdef CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON
375	int intel_iommu_sm = 1;	375	int intel_iommu_sm = 1;
376	#else	376	#else
377	int intel_iommu_sm;	377	int intel_iommu_sm;
378	#endif /* INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */	378	#endif /* CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON */
379		379
380	int intel_iommu_enabled = 0;	380	int intel_iommu_enabled = 0;
381	EXPORT_SYMBOL_GPL(intel_iommu_enabled);	381	EXPORT_SYMBOL_GPL(intel_iommu_enabled);

drivers/iommu/iommu.c+2−1

 static void dev_iommu_free(struct device *dev)
 {
+	iommu_fwspec_free(dev);
 	kfree(dev->iommu);
 	dev->iommu = NULL;
 }
 	return group;
 }
-EXPORT_SYMBOL(iommu_group_get_for_dev);
+EXPORT_SYMBOL_GPL(iommu_group_get_for_dev);
 struct iommu_domain *iommu_group_default_domain(struct iommu_group *group)
 {

drivers/iommu/qcom_iommu.c+4−1

 	qcom_iommu->dev = dev;
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (res)
+	if (res) {
 		qcom_iommu->local_base = devm_ioremap_resource(dev, res);
+		if (IS_ERR(qcom_iommu->local_base))
+			return PTR_ERR(qcom_iommu->local_base);
+	}
 	qcom_iommu->iface_clk = devm_clk_get(dev, "iface");
 	if (IS_ERR(qcom_iommu->iface_clk)) {

drivers/irqchip/irq-bcm7038-l1.c+1−1

@@ -416,7 +416,7 @@ static const struct irq_domain_ops bcm7038_l1_domain_ops = { · 415 unmodified lines
416	.map = bcm7038_l1_map,	416	.map = bcm7038_l1_map,
417	};	417	};
418		418
419	int __init bcm7038_l1_of_init(struct device_node *dn,	419	static int __init bcm7038_l1_of_init(struct device_node *dn,
420	struct device_node *parent)	420	struct device_node *parent)
421	{	421	{
422	struct bcm7038_l1_chip *intc;	422	struct bcm7038_l1_chip *intc;

drivers/irqchip/irq-gic-v3-its.c+20−0

 #include <linux/dma-iommu.h>
 #include <linux/efi.h>
 #include <linux/interrupt.h>
+#include <linux/iopoll.h>
 #include <linux/irqdomain.h>
 #include <linux/list.h>
 #include <linux/log2.h>
 	return IRQ_SET_MASK_OK_DONE;
 }
+static void its_wait_vpt_parse_complete(void)
+{
+	void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
+	u64 val;
+	if (!gic_rdists->has_vpend_valid_dirty)
+		return;
+	WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER,
+						val,
+						!(val & GICR_VPENDBASER_Dirty),
+						10, 500));
+}
 static void its_vpe_schedule(struct its_vpe *vpe)
 {
 	void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
 	val |= vpe->idai ? GICR_VPENDBASER_IDAI : 0;
 	val |= GICR_VPENDBASER_Valid;
 	gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+	its_wait_vpt_parse_complete();
 }
 static void its_vpe_deschedule(struct its_vpe *vpe)
 	val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
 	gicr_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+	its_wait_vpt_parse_complete();
 }
 static void its_vpe_4_1_deschedule(struct its_vpe *vpe,
 	 * not on the host (since they can only be targetting a vPE).
 	 * Tell the kernel we've done whatever it asked for.
 	 */
+	irq_data_update_effective_affinity(d, mask_val);
 	return IRQ_SET_MASK_OK;
 }

drivers/irqchip/irq-gic-v3.c+7−4

 	gic_data.rdists.has_rvpeid &= !!(typer & GICR_TYPER_RVPEID);
 	gic_data.rdists.has_direct_lpi &= (!!(typer & GICR_TYPER_DirectLPIS) |
 					   gic_data.rdists.has_rvpeid);
+	gic_data.rdists.has_vpend_valid_dirty &= !!(typer & GICR_TYPER_DIRTY);
 	/* Detect non-sensical configurations */
 	if (WARN_ON_ONCE(gic_data.rdists.has_rvpeid && !gic_data.rdists.has_vlpis)) {
 	if (WARN_ON(gic_data.ppi_nr == UINT_MAX))
 		gic_data.ppi_nr = 0;
 	pr_info("%d PPIs implemented\n", gic_data.ppi_nr);
-	pr_info("%sVLPI support, %sdirect LPI support, %sRVPEID support\n",
+	if (gic_data.rdists.has_vlpis)
-		!gic_data.rdists.has_vlpis ? "no " : "",
+		pr_info("GICv4 features: %s%s%s\n",
-		!gic_data.rdists.has_direct_lpi ? "no " : "",
+			gic_data.rdists.has_direct_lpi ? "DirectLPI " : "",
-		!gic_data.rdists.has_rvpeid ? "no " : "");
+			gic_data.rdists.has_rvpeid ? "RVPEID " : "",
+			gic_data.rdists.has_vpend_valid_dirty ? "Valid+Dirty " : "");
 }
 /* Check whether it's single security state view */
 	gic_data.rdists.has_rvpeid = true;
 	gic_data.rdists.has_vlpis = true;
 	gic_data.rdists.has_direct_lpi = true;
+	gic_data.rdists.has_vpend_valid_dirty = true;
 	if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) {
 		err = -ENOMEM;

drivers/irqchip/irq-mbigen.c+7−1

 	return 0;
 }
+static void mbigen_irq_domain_free(struct irq_domain *domain, unsigned int virq,
+				   unsigned int nr_irqs)
+{
+	platform_msi_domain_free(domain, virq, nr_irqs);
+}
 static const struct irq_domain_ops mbigen_domain_ops = {
 	.translate	= mbigen_domain_translate,
 	.alloc		= mbigen_irq_domain_alloc,
-	.free		= irq_domain_free_irqs_common,
+	.free		= mbigen_irq_domain_free,
 };
 static int mbigen_of_create_domain(struct platform_device *pdev,

drivers/irqchip/irq-meson-gpio.c+10−8

 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl,
 				       unsigned int reg, u32 mask, u32 val)
 {
+	unsigned long flags;
 	u32 tmp;
+	spin_lock_irqsave(&ctl->lock, flags);
 	tmp = readl_relaxed(ctl->base + reg);
 	tmp &= ~mask;
 	tmp |= val;
 	writel_relaxed(tmp, ctl->base + reg);
+	spin_unlock_irqrestore(&ctl->lock, flags);
 }
 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl)
 			       unsigned long  hwirq,
 			       u32 **channel_hwirq)
 {
+	unsigned long flags;
 	unsigned int idx;
-	spin_lock(&ctl->lock);
+	spin_lock_irqsave(&ctl->lock, flags);
 	/* Find a free channel */
 	idx = find_first_zero_bit(ctl->channel_map, NUM_CHANNEL);
 	if (idx >= NUM_CHANNEL) {
-		spin_unlock(&ctl->lock);
+		spin_unlock_irqrestore(&ctl->lock, flags);
 		pr_err("No channel available\n");
 		return -ENOSPC;
 	}
 	/* Mark the channel as used */
 	set_bit(idx, ctl->channel_map);
+	spin_unlock_irqrestore(&ctl->lock, flags);
 	/*
 	 * Setup the mux of the channel to route the signal of the pad
 	 * to the appropriate input of the GIC
 	 */
 	*channel_hwirq = &(ctl->channel_irqs[idx]);
-	spin_unlock(&ctl->lock);
 	pr_debug("hwirq %lu assigned to channel %d - irq %u\n",
 		 hwirq, idx, **channel_hwirq);
 			val |= REG_EDGE_POL_LOW(params, idx);
 	}
-	spin_lock(&ctl->lock);
 	meson_gpio_irq_update_bits(ctl, REG_EDGE_POL,
 				   REG_EDGE_POL_MASK(params, idx), val);
-	spin_unlock(&ctl->lock);
 	return 0;
 }

drivers/irqchip/irq-mvebu-icu.c+1−1

@@ -66,7 +66,7 @@ struct mvebu_icu_irq_data { · 65 unmodified lines
66	unsigned int type;	66	unsigned int type;
67	};	67	};
68		68
69	DEFINE_STATIC_KEY_FALSE(legacy_bindings);	69	static DEFINE_STATIC_KEY_FALSE(legacy_bindings);
70		70
71	static void mvebu_icu_init(struct mvebu_icu *icu,	71	static void mvebu_icu_init(struct mvebu_icu *icu,
72	struct mvebu_icu_msi_data *msi_data,	72	struct mvebu_icu_msi_data *msi_data,

drivers/irqchip/irq-sifive-plic.c+1−1

@@ -56,7 +56,7 @@ · 55 unmodified lines
56	#define CONTEXT_THRESHOLD 0x00	56	#define CONTEXT_THRESHOLD 0x00
57	#define CONTEXT_CLAIM 0x04	57	#define CONTEXT_CLAIM 0x04
58		58
59	#define PLIC_DISABLE_THRESHOLD 0xf	59	#define PLIC_DISABLE_THRESHOLD 0x7
60	#define PLIC_ENABLE_THRESHOLD 0	60	#define PLIC_ENABLE_THRESHOLD 0
61		61
62	struct plic_priv {	62	struct plic_priv {

drivers/irqchip/irq-ti-sci-inta.c+2−1

 #define VINT_ENABLE_SET_OFFSET	0x0
 #define VINT_ENABLE_CLR_OFFSET	0x8
 #define VINT_STATUS_OFFSET	0x18
+#define VINT_STATUS_MASKED_OFFSET	0x20
 /**
  * struct ti_sci_inta_event_desc - Description of an event coming to
 	chained_irq_enter(irq_desc_get_chip(desc), desc);
 	val = readq_relaxed(inta->base + vint_desc->vint_id * 0x1000 +
-			    VINT_STATUS_OFFSET);
+			    VINT_STATUS_MASKED_OFFSET);
 	for_each_set_bit(bit, &val, MAX_EVENTS_PER_VINT) {
 		virq = irq_find_mapping(domain, vint_desc->events[bit].hwirq);

drivers/isdn/hardware/mISDN/mISDNisar.c+2−2

@@ -743,10 +743,10 @@ check_send(struct isar_hw *isar, u8 rdm) · 742 unmodified lines
743	}	743	}
744	}	744	}
745		745
746	const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",	746	static const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
747	"300", "600", "1200", "2400", "4800", "7200",	747	"300", "600", "1200", "2400", "4800", "7200",
748	"9600nt", "9600t", "12000", "14400", "WRONG"};	748	"9600nt", "9600t", "12000", "14400", "WRONG"};
749	const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",	749	static const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
750	"Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};	750	"Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
751		751
752	static void	752	static void

drivers/md/dm-mpath.c+4−2

 	/* Do we need to select a new pgpath? */
 	pgpath = READ_ONCE(m->current_pgpath);
-	queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags);
+	if (!pgpath || !test_bit(MPATHF_QUEUE_IO, &m->flags))
-	if (!pgpath || !queue_io)
 		pgpath = choose_pgpath(m, bio->bi_iter.bi_size);
+	/* MPATHF_QUEUE_IO might have been cleared by choose_pgpath. */
+	queue_io = test_bit(MPATHF_QUEUE_IO, &m->flags);
 	if ((pgpath && queue_io) ||
 	    (!pgpath && test_bit(MPATHF_QUEUE_IF_NO_PATH, &m->flags))) {
 		/* Queue for the daemon to resubmit */

drivers/md/dm-verity-fec.c+1−1

@@ -435,7 +435,7 @@ int verity_fec_decode(struct dm_verity v, struct dm_verity_io io, · 434 unmodified lines
435	fio->level++;	435	fio->level++;
436		436
437	if (type == DM_VERITY_BLOCK_TYPE_METADATA)	437	if (type == DM_VERITY_BLOCK_TYPE_METADATA)
438	block += v->data_blocks;	438	block = block - v->hash_start + v->data_blocks;
439		439
440	/*	440	/*
441	* For RS(M, N), the continuous FEC data is divided into blocks of N	441	* For RS(M, N), the continuous FEC data is divided into blocks of N

drivers/md/dm-writecache.c+37−15

 	return 0;
 }
+static int writecache_read_metadata(struct dm_writecache *wc, sector_t n_sectors)
+{
+	struct dm_io_region region;
+	struct dm_io_request req;
+	region.bdev = wc->ssd_dev->bdev;
+	region.sector = wc->start_sector;
+	region.count = n_sectors;
+	req.bi_op = REQ_OP_READ;
+	req.bi_op_flags = REQ_SYNC;
+	req.mem.type = DM_IO_VMA;
+	req.mem.ptr.vma = (char *)wc->memory_map;
+	req.client = wc->dm_io;
+	req.notify.fn = NULL;
+	return dm_io(&req, 1, &region, NULL);
+}
 static void writecache_resume(struct dm_target *ti)
 {
 	struct dm_writecache *wc = ti->private;
 	wc_lock(wc);
-	if (WC_MODE_PMEM(wc))
+	if (WC_MODE_PMEM(wc)) {
 		persistent_memory_invalidate_cache(wc->memory_map, wc->memory_map_size);
+	} else {
+		r = writecache_read_metadata(wc, wc->metadata_sectors);
+		if (r) {
+			size_t sb_entries_offset;
+			writecache_error(wc, r, "unable to read metadata: %d", r);
+			sb_entries_offset = offsetof(struct wc_memory_superblock, entries);
+			memset((char *)wc->memory_map + sb_entries_offset, -1,
+			       (wc->metadata_sectors << SECTOR_SHIFT) - sb_entries_offset);
+		}
+	}
 	wc->tree = RB_ROOT;
 	INIT_LIST_HEAD(&wc->lru);
 		ti->error = "Invalid block size";
 		goto bad;
 	}
+	if (wc->block_size < bdev_logical_block_size(wc->dev->bdev) ||
+	    wc->block_size < bdev_logical_block_size(wc->ssd_dev->bdev)) {
+		r = -EINVAL;
+		ti->error = "Block size is smaller than device logical block size";
+		goto bad;
+	}
 	wc->block_size_bits = __ffs(wc->block_size);
 	wc->max_writeback_jobs = MAX_WRITEBACK_JOBS;
 			goto bad;
 		}
 	} else {
-		struct dm_io_region region;
-		struct dm_io_request req;
 		size_t n_blocks, n_metadata_blocks;
 		uint64_t n_bitmap_bits;
 			goto bad;
 		}
-		region.bdev = wc->ssd_dev->bdev;
+		r = writecache_read_metadata(wc, wc->block_size >> SECTOR_SHIFT);
-		region.sector = wc->start_sector;
-		region.count = wc->metadata_sectors;
-		req.bi_op = REQ_OP_READ;
-		req.bi_op_flags = REQ_SYNC;
-		req.mem.type = DM_IO_VMA;
-		req.mem.ptr.vma = (char *)wc->memory_map;
-		req.client = wc->dm_io;
-		req.notify.fn = NULL;
-		r = dm_io(&req, 1, &region, NULL);
 		if (r) {
-			ti->error = "Unable to read metadata";
+			ti->error = "Unable to read first block of metadata";
 			goto bad;
 		}
 	}

drivers/misc/mei/pci-me.c+2−1

 	}
 	hw = to_me_hw(dev);
 	hw->mem_addr = pcim_iomap_table(pdev)[0];
-	hw->irq = pdev->irq;
 	hw->read_fws = mei_me_read_fws;
 	pci_enable_msi(pdev);
+	hw->irq = pdev->irq;
 	 /* request and enable interrupt */
 	irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;

drivers/misc/mic/Kconfig+1−1

@@ -116,7 +116,7 @@ config MIC_COSM · 115 unmodified lines
116		116
117	config VOP	117	config VOP
118	tristate "VOP Driver"	118	tristate "VOP Driver"
119	depends on VOP_BUS	119	depends on VOP_BUS && VHOST_DPN
120	select VHOST_RING	120	select VHOST_RING
121	select VIRTIO	121	select VIRTIO
122	help	122	help

drivers/mmc/core/mmc_ops.c+1−1

@@ -878,7 +878,7 @@ static int mmc_send_hpi_cmd(struct mmc_card *card) · 877 unmodified lines
878	* Issued High Priority Interrupt, and check for card status	878	* Issued High Priority Interrupt, and check for card status
879	* until out-of prg-state.	879	* until out-of prg-state.
880	*/	880	*/
881	int mmc_interrupt_hpi(struct mmc_card *card)	881	static int mmc_interrupt_hpi(struct mmc_card *card)
882	{	882	{
883	int err;	883	int err;
884	u32 status;	884	u32 status;

drivers/mmc/host/cqhci.c+10−11

 #include <linux/delay.h>
 #include <linux/highmem.h>
 #include <linux/io.h>
+#include <linux/iopoll.h>
 #include <linux/module.h>
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 /* CQHCI is idle and should halt immediately, so set a small timeout */
 #define CQHCI_OFF_TIMEOUT 100
+static u32 cqhci_read_ctl(struct cqhci_host *cq_host)
+{
+	return cqhci_readl(cq_host, CQHCI_CTL);
+}
 static void cqhci_off(struct mmc_host *mmc)
 {
 	struct cqhci_host *cq_host = mmc->cqe_private;
-	ktime_t timeout;
-	bool timed_out;
 	u32 reg;
+	int err;
 	if (!cq_host->enabled || !mmc->cqe_on || cq_host->recovery_halt)
 		return;
 	cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL);
-	timeout = ktime_add_us(ktime_get(), CQHCI_OFF_TIMEOUT);
+	err = readx_poll_timeout(cqhci_read_ctl, cq_host, reg,
-	while (1) {
+				 reg & CQHCI_HALT, 0, CQHCI_OFF_TIMEOUT);
-		timed_out = ktime_compare(ktime_get(), timeout) > 0;
+	if (err < 0)
-		reg = cqhci_readl(cq_host, CQHCI_CTL);
-		if ((reg & CQHCI_HALT) || timed_out)
-			break;
-	}
-	if (timed_out)
 		pr_err("%s: cqhci: CQE stuck on\n", mmc_hostname(mmc));
 	else
 		pr_debug("%s: cqhci: CQE off\n", mmc_hostname(mmc));

drivers/mmc/host/meson-mx-sdio.c+1−10

 		meson_mx_mmc_start_cmd(mmc, mrq->cmd);
 }
-static int meson_mx_mmc_card_busy(struct mmc_host *mmc)
-{
-	struct meson_mx_mmc_host *host = mmc_priv(mmc);
-	u32 irqc = readl(host->base + MESON_MX_SDIO_IRQC);
-	return !!(irqc & MESON_MX_SDIO_IRQC_FORCE_DATA_DAT_MASK);
-}
 static void meson_mx_mmc_read_response(struct mmc_host *mmc,
 				       struct mmc_command *cmd)
 {
 static struct mmc_host_ops meson_mx_mmc_ops = {
 	.request		= meson_mx_mmc_request,
 	.set_ios		= meson_mx_mmc_set_ios,
-	.card_busy		= meson_mx_mmc_card_busy,
 	.get_cd			= mmc_gpio_get_cd,
 	.get_ro			= mmc_gpio_get_ro,
 };
 	mmc->f_max = clk_round_rate(host->cfg_div_clk,
 				    clk_get_rate(host->parent_clk));
-	mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23;
+	mmc->caps |= MMC_CAP_ERASE | MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY;
 	mmc->ops = &meson_mx_mmc_ops;
 	ret = mmc_of_parse(mmc);

drivers/mmc/host/sdhci-msm.c+2−0

@@ -2087,6 +2087,8 @@ static int sdhci_msm_probe(struct platform_device *pdev) · 2086 unmodified lines
2087	goto clk_disable;	2087	goto clk_disable;
2088	}	2088	}
2089		2089
		2090	msm_host->mmc->caps \|= MMC_CAP_WAIT_WHILE_BUSY \| MMC_CAP_NEED_RSP_BUSY;
		2091
2090	pm_runtime_get_noresume(&pdev->dev);	2092	pm_runtime_get_noresume(&pdev->dev);
2091	pm_runtime_set_active(&pdev->dev);	2093	pm_runtime_set_active(&pdev->dev);
2092	pm_runtime_enable(&pdev->dev);	2094	pm_runtime_enable(&pdev->dev);

drivers/mmc/host/sdhci-pci-core.c+3−0

@@ -601,6 +601,9 @@ static int intel_select_drive_strength(struct mmc_card *card, · 600 unmodified lines
601	struct sdhci_pci_slot *slot = sdhci_priv(host);	601	struct sdhci_pci_slot *slot = sdhci_priv(host);
602	struct intel_host *intel_host = sdhci_pci_priv(slot);	602	struct intel_host *intel_host = sdhci_pci_priv(slot);
603		603
		604	if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv))
		605	return 0;
		606
604	return intel_host->drv_strength;	607	return intel_host->drv_strength;
605	}	608	}
606		609

drivers/mmc/host/sdhci-xenon.c+10−0

@@ -235,6 +235,16 @@ static void xenon_voltage_switch(struct sdhci_host *host) · 234 unmodified lines
235	{	235	{
236	/* Wait for 5ms after set 1.8V signal enable bit */	236	/* Wait for 5ms after set 1.8V signal enable bit */
237	usleep_range(5000, 5500);	237	usleep_range(5000, 5500);
		238
		239	/*
		240	* For some reason the controller's Host Control2 register reports
		241	* the bit representing 1.8V signaling as 0 when read after it was
		242	* written as 1. Subsequent read reports 1.
		243	*
		244	* Since this may cause some issues, do an empty read of the Host
		245	* Control2 register here to circumvent this.
		246	*/
		247	sdhci_readw(host, SDHCI_HOST_CONTROL2);
238	}	248	}
239		249
240	static const struct sdhci_ops sdhci_xenon_ops = {	250	static const struct sdhci_ops sdhci_xenon_ops = {

drivers/mtd/spi-nor/Makefile+2−0

@@ -18,3 +18,5 @@ spi-nor-objs += winbond.o · 17 unmodified lines
18	spi-nor-objs += xilinx.o	18	spi-nor-objs += xilinx.o
19	spi-nor-objs += xmc.o	19	spi-nor-objs += xmc.o
20	obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o	20	obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
		21
		22	obj-$(CONFIG_MTD_SPI_NOR) += controllers/

drivers/net/caif/Kconfig+1−1

@@ -50,7 +50,7 @@ config CAIF_HSI · 49 unmodified lines
50		50
51	config CAIF_VIRTIO	51	config CAIF_VIRTIO
52	tristate "CAIF virtio transport driver"	52	tristate "CAIF virtio transport driver"
53	depends on CAIF && HAS_DMA	53	depends on CAIF && HAS_DMA && VHOST_DPN
54	select VHOST_RING	54	select VHOST_RING
55	select VIRTIO	55	select VIRTIO
56	select GENERIC_ALLOCATOR	56	select GENERIC_ALLOCATOR

drivers/net/dsa/b53/b53_common.c+33−5

 		reg |= ARLTBL_RW;
 	else
 		reg &= ~ARLTBL_RW;
+	if (dev->vlan_enabled)
+		reg &= ~ARLTBL_IVL_SVL_SELECT;
+	else
+		reg |= ARLTBL_IVL_SVL_SELECT;
 	b53_write8(dev, B53_ARLIO_PAGE, B53_ARLTBL_RW_CTRL, reg);
 	return b53_arl_op_wait(dev);
 			u16 vid, struct b53_arl_entry *ent, u8 *idx,
 			bool is_valid)
 {
+	DECLARE_BITMAP(free_bins, B53_ARLTBL_MAX_BIN_ENTRIES);
 	unsigned int i;
 	int ret;
 	if (ret)
 		return ret;
+	bitmap_zero(free_bins, dev->num_arl_entries);
 	/* Read the bins */
 	for (i = 0; i < dev->num_arl_entries; i++) {
 		u64 mac_vid;
 			   B53_ARLTBL_DATA_ENTRY(i), &fwd_entry);
 		b53_arl_to_entry(ent, mac_vid, fwd_entry);
-		if (!(fwd_entry & ARLTBL_VALID))
+		if (!(fwd_entry & ARLTBL_VALID)) {
+			set_bit(i, free_bins);
 			continue;
+		}
 		if ((mac_vid & ARLTBL_MAC_MASK) != mac)
 			continue;
+		if (dev->vlan_enabled &&
+		    ((mac_vid >> ARLTBL_VID_S) & ARLTBL_VID_MASK) != vid)
+			continue;
 		*idx = i;
+		return 0;
 	}
+	if (bitmap_weight(free_bins, dev->num_arl_entries) == 0)
+		return -ENOSPC;
+	*idx = find_first_bit(free_bins, dev->num_arl_entries);
 	return -ENOENT;
 }
 	if (op)
 		return ret;
-	/* We could not find a matching MAC, so reset to a new entry */
+	switch (ret) {
-	if (ret) {
+	case -ENOSPC:
+		dev_dbg(dev->dev, "{%pM,%.4d} no space left in ARL\n",
+			addr, vid);
+		return is_valid ? ret : 0;
+	case -ENOENT:
+		/* We could not find a matching MAC, so reset to a new entry */
+		dev_dbg(dev->dev, "{%pM,%.4d} not found, using idx: %d\n",
+			addr, vid, idx);
 		fwd_entry = 0;
-		idx = 1;
+		break;
+	default:
+		dev_dbg(dev->dev, "{%pM,%.4d} found, using idx: %d\n",
+			addr, vid, idx);
+		break;
 	}
 	/* For multicast address, the port is a bitmask and the validity
 		ent.is_valid = !!(ent.port);
 	}
-	ent.is_valid = is_valid;
 	ent.vid = vid;
 	ent.is_static = true;
 	ent.is_age = false;

drivers/net/dsa/b53/b53_regs.h+6−2

 /* ARL Table Read/Write Register (8 bit) */
 #define B53_ARLTBL_RW_CTRL		0x00
 #define    ARLTBL_RW			BIT(0)
+#define    ARLTBL_IVL_SVL_SELECT	BIT(6)
 #define    ARLTBL_START_DONE		BIT(7)
 /* MAC Address Index Register (48 bit) */
  *
  * BCM5325 and BCM5365 share most definitions below
  */
-#define B53_ARLTBL_MAC_VID_ENTRY(n)	(0x10 * (n))
+#define B53_ARLTBL_MAC_VID_ENTRY(n)	((0x10 * (n)) + 0x10)
 #define   ARLTBL_MAC_MASK		0xffffffffffffULL
 #define   ARLTBL_VID_S			48
 #define   ARLTBL_VID_MASK_25		0xff
 #define   ARLTBL_VALID_25		BIT(63)
 /* ARL Table Data Entry N Registers (32 bit) */
-#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x08)
+#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x18)
 #define   ARLTBL_DATA_PORT_ID_MASK	0x1ff
 #define   ARLTBL_TC(tc)			((3 & tc) << 11)
 #define   ARLTBL_AGE			BIT(14)
 #define   ARLTBL_STATIC			BIT(15)
 #define   ARLTBL_VALID			BIT(16)
+/* Maximum number of bin entries in the ARL for all switches */
+#define B53_ARLTBL_MAX_BIN_ENTRIES	4
 /* ARL Search Control Register (8 bit) */
 #define B53_ARL_SRCH_CTL		0x50
 #define B53_ARL_SRCH_CTL_25		0x20

drivers/net/dsa/mt7530.c+12−91

@@ -66,58 +66,6 @@ static const struct mt7530_mib_desc mt7530_mib[] = { · 65 unmodified lines
66	MIB_DESC(1, 0xb8, "RxArlDrop"),	66	MIB_DESC(1, 0xb8, "RxArlDrop"),
67	};	67	};
68		68
69	static int
70	mt7623_trgmii_write(struct mt7530_priv *priv, u32 reg, u32 val)
71	{
72	int ret;
73
74	ret = regmap_write(priv->ethernet, TRGMII_BASE(reg), val);
75	if (ret < 0)
76	dev_err(priv->dev,
77	"failed to priv write register\n");
78	return ret;
79	}
80
81	static u32
82	mt7623_trgmii_read(struct mt7530_priv *priv, u32 reg)
83	{
84	int ret;
85	u32 val;
86
87	ret = regmap_read(priv->ethernet, TRGMII_BASE(reg), &val);
88	if (ret < 0) {
89	dev_err(priv->dev,
90	"failed to priv read register\n");
91	return ret;
92	}
93
94	return val;
95	}
96
97	static void
98	mt7623_trgmii_rmw(struct mt7530_priv *priv, u32 reg,
99	u32 mask, u32 set)
100	{
101	u32 val;
102
103	val = mt7623_trgmii_read(priv, reg);
104	val &= ~mask;
105	val \|= set;
106	mt7623_trgmii_write(priv, reg, val);
107	}
108
109	static void
110	mt7623_trgmii_set(struct mt7530_priv *priv, u32 reg, u32 val)
111	{
112	mt7623_trgmii_rmw(priv, reg, 0, val);
113	}
114
115	static void
116	mt7623_trgmii_clear(struct mt7530_priv *priv, u32 reg, u32 val)
117	{
118	mt7623_trgmii_rmw(priv, reg, val, 0);
119	}
120
121	static int	69	static int
122	core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad)	70	core_read_mmd_indirect(struct mt7530_priv *priv, int prtad, int devad)
123	{	71	{
@@ -530,27 +478,6 @@ mt7530_pad_clk_setup(struct dsa_switch *ds, int mode) · 406 unmodified lines
530	for (i = 0 ; i < NUM_TRGMII_CTRL; i++)	478	for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
531	mt7530_rmw(priv, MT7530_TRGMII_RD(i),	479	mt7530_rmw(priv, MT7530_TRGMII_RD(i),
532	RD_TAP_MASK, RD_TAP(16));	480	RD_TAP_MASK, RD_TAP(16));
533	else
534	if (priv->id != ID_MT7621)
535	mt7623_trgmii_set(priv, GSW_INTF_MODE,
536	INTF_MODE_TRGMII);
537
538	return 0;
539	}
540
541	static int
542	mt7623_pad_clk_setup(struct dsa_switch *ds)
543	{
544	struct mt7530_priv *priv = ds->priv;
545	int i;
546
547	for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
548	mt7623_trgmii_write(priv, GSW_TRGMII_TD_ODT(i),
549	TD_DM_DRVP(8) \| TD_DM_DRVN(8));
550
551	mt7623_trgmii_set(priv, GSW_TRGMII_RCK_CTRL, RX_RST \| RXC_DQSISEL);
552	mt7623_trgmii_clear(priv, GSW_TRGMII_RCK_CTRL, RX_RST);
553
554	return 0;	481	return 0;
555	}	482	}
556		483
@@ -846,8 +773,9 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port) · 289 unmodified lines
846	*/	773	*/
847	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,	774	mt7530_rmw(priv, MT7530_PCR_P(port), PCR_PORT_VLAN_MASK,
848	MT7530_PORT_MATRIX_MODE);	775	MT7530_PORT_MATRIX_MODE);
849	mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK,	776	mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK \| PVC_EG_TAG_MASK,
850	VLAN_ATTR(MT7530_VLAN_TRANSPARENT));	777	VLAN_ATTR(MT7530_VLAN_TRANSPARENT) \|
		778	PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
851		779
852	for (i = 0; i < MT7530_NUM_PORTS; i++) {	780	for (i = 0; i < MT7530_NUM_PORTS; i++) {
853	if (dsa_is_user_port(ds, i) &&	781	if (dsa_is_user_port(ds, i) &&
@@ -863,8 +791,8 @@ mt7530_port_set_vlan_unaware(struct dsa_switch *ds, int port) · 9 unmodified lines
863	if (all_user_ports_removed) {	791	if (all_user_ports_removed) {
864	mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT),	792	mt7530_write(priv, MT7530_PCR_P(MT7530_CPU_PORT),
865	PCR_MATRIX(dsa_user_ports(priv->ds)));	793	PCR_MATRIX(dsa_user_ports(priv->ds)));
866	mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT),	794	mt7530_write(priv, MT7530_PVC_P(MT7530_CPU_PORT), PORT_SPEC_TAG
867	PORT_SPEC_TAG);	795	\| PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
868	}	796	}
869	}	797	}
870		798
@@ -890,8 +818,9 @@ mt7530_port_set_vlan_aware(struct dsa_switch *ds, int port) · 19 unmodified lines
890	/* Set the port as a user port which is to be able to recognize VID	818	/* Set the port as a user port which is to be able to recognize VID
891	* from incoming packets before fetching entry within the VLAN table.	819	* from incoming packets before fetching entry within the VLAN table.
892	*/	820	*/
893	mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK,	821	mt7530_rmw(priv, MT7530_PVC_P(port), VLAN_ATTR_MASK \| PVC_EG_TAG_MASK,
894	VLAN_ATTR(MT7530_VLAN_USER));	822	VLAN_ATTR(MT7530_VLAN_USER) \|
		823	PVC_EG_TAG(MT7530_VLAN_EG_DISABLED));
895	}	824	}
896		825
897	static void	826	static void
@@ -1303,10 +1232,6 @@ mt7530_setup(struct dsa_switch *ds) · 405 unmodified lines
1303	dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent;	1232	dn = dsa_to_port(ds, MT7530_CPU_PORT)->master->dev.of_node->parent;
1304		1233
1305	if (priv->id == ID_MT7530) {	1234	if (priv->id == ID_MT7530) {
1306	priv->ethernet = syscon_node_to_regmap(dn);
1307	if (IS_ERR(priv->ethernet))
1308	return PTR_ERR(priv->ethernet);
1309
1310	regulator_set_voltage(priv->core_pwr, 1000000, 1000000);	1235	regulator_set_voltage(priv->core_pwr, 1000000, 1000000);
1311	ret = regulator_enable(priv->core_pwr);	1236	ret = regulator_enable(priv->core_pwr);
1312	if (ret < 0) {	1237	if (ret < 0) {
@@ -1380,6 +1305,10 @@ mt7530_setup(struct dsa_switch *ds) · 67 unmodified lines
1380	mt7530_cpu_port_enable(priv, i);	1305	mt7530_cpu_port_enable(priv, i);
1381	else	1306	else
1382	mt7530_port_disable(ds, i);	1307	mt7530_port_disable(ds, i);
		1308
		1309	/* Enable consistent egress tag */
		1310	mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
		1311	PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
1383	}	1312	}
1384		1313
1385	/* Setup port 5 */	1314	/* Setup port 5 */
@@ -1468,14 +1397,6 @@ static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port, · 82 unmodified lines
1468	/* Setup TX circuit incluing relevant PAD and driving */	1397	/* Setup TX circuit incluing relevant PAD and driving */
1469	mt7530_pad_clk_setup(ds, state->interface);	1398	mt7530_pad_clk_setup(ds, state->interface);
1470		1399
1471	if (priv->id == ID_MT7530) {
1472	/* Setup RX circuit, relevant PAD and driving on the
1473	* host which must be placed after the setup on the
1474	* device side is all finished.
1475	*/
1476	mt7623_pad_clk_setup(ds);
1477	}
1478
1479	priv->p6_interface = state->interface;	1400	priv->p6_interface = state->interface;
1480	break;	1401	break;
1481	default:	1402	default:

drivers/net/dsa/mt7530.h+7−10

 /* Register for port vlan control */
 #define MT7530_PVC_P(x)			(0x2010 + ((x) * 0x100))
 #define  PORT_SPEC_TAG			BIT(5)
+#define  PVC_EG_TAG(x)			(((x) & 0x7) << 8)
+#define  PVC_EG_TAG_MASK		PVC_EG_TAG(7)
 #define  VLAN_ATTR(x)			(((x) & 0x3) << 6)
 #define  VLAN_ATTR_MASK			VLAN_ATTR(3)
+enum mt7530_vlan_port_eg_tag {
+	MT7530_VLAN_EG_DISABLED = 0,
+	MT7530_VLAN_EG_CONSISTENT = 1,
+};
 enum mt7530_vlan_port_attr {
 	MT7530_VLAN_USER = 0,
 	MT7530_VLAN_TRANSPARENT = 3,
 /* Registers for TRGMII on the both side */
 #define MT7530_TRGMII_RCK_CTRL		0x7a00
-#define GSW_TRGMII_RCK_CTRL		0x300
 #define  RX_RST				BIT(31)
 #define  RXC_DQSISEL			BIT(30)
 #define  DQSI1_TAP_MASK			(0x7f << 8)
 #define  DQSI0_TAP(x)			((x) & 0x7f)
 #define MT7530_TRGMII_RCK_RTT		0x7a04
-#define GSW_TRGMII_RCK_RTT		0x304
 #define  DQS1_GATE			BIT(31)
 #define  DQS0_GATE			BIT(30)
 #define MT7530_TRGMII_RD(x)		(0x7a10 + (x) * 8)
-#define GSW_TRGMII_RD(x)		(0x310 + (x) * 8)
 #define  BSLIP_EN			BIT(31)
 #define  EDGE_CHK			BIT(30)
 #define  RD_TAP_MASK			0x7f
 #define  RD_TAP(x)			((x) & 0x7f)
-#define GSW_TRGMII_TXCTRL		0x340
 #define MT7530_TRGMII_TXCTRL		0x7a40
 #define  TRAIN_TXEN			BIT(31)
 #define  TXC_INV			BIT(30)
 #define  TX_RST				BIT(28)
 #define MT7530_TRGMII_TD_ODT(i)		(0x7a54 + 8 * (i))
-#define GSW_TRGMII_TD_ODT(i)		(0x354 + 8 * (i))
 #define  TD_DM_DRVP(x)			((x) & 0xf)
 #define  TD_DM_DRVN(x)			(((x) & 0xf) << 4)
-#define GSW_INTF_MODE			0x390
-#define  INTF_MODE_TRGMII		BIT(1)
 #define MT7530_TRGMII_TCK_CTRL		0x7a78
 #define  TCK_TAP(x)			(((x) & 0xf) << 8)
  * @ds:			The pointer to the dsa core structure
  * @bus:		The bus used for the device and built-in PHY
  * @rstc:		The pointer to reset control used by MCM
- * @ethernet:		The regmap used for access TRGMII-based registers
  * @core_pwr:		The power supplied into the core
  * @io_pwr:		The power supplied into the I/O
  * @reset:		The descriptor for GPIO line tied to its reset pin
 	struct dsa_switch	*ds;
 	struct mii_bus		*bus;
 	struct reset_control	*rstc;
-	struct regmap		*ethernet;
 	struct regulator	*core_pwr;
 	struct regulator	*io_pwr;
 	struct gpio_desc	*reset;

drivers/net/dsa/mv88e6xxx/chip.c+3−2

 	ops = chip->info->ops;
 	mv88e6xxx_reg_lock(chip);
-	if (!mv88e6xxx_port_ppu_updates(chip, port) && ops->port_set_link)
+	if ((!mv88e6xxx_port_ppu_updates(chip, port) ||
+	     mode == MLO_AN_FIXED) && ops->port_set_link)
 		err = ops->port_set_link(chip, port, LINK_FORCED_DOWN);
 	mv88e6xxx_reg_unlock(chip);
 	ops = chip->info->ops;
 	mv88e6xxx_reg_lock(chip);
-	if (!mv88e6xxx_port_ppu_updates(chip, port)) {
+	if (!mv88e6xxx_port_ppu_updates(chip, port) || mode == MLO_AN_FIXED) {
 		/* FIXME: for an automedia port, should we force the link
 		 * down here - what if the link comes up due to "other" media
 		 * while we're bringing the port up, how is the exclusivity

drivers/net/dsa/ocelot/felix.c+1−4

 			 const unsigned char *addr, u16 vid)
 {
 	struct ocelot *ocelot = ds->priv;
-	bool vlan_aware;
-	vlan_aware = dsa_port_is_vlan_filtering(dsa_to_port(ds, port));
+	return ocelot_fdb_add(ocelot, port, addr, vid);
-	return ocelot_fdb_add(ocelot, port, addr, vid, vlan_aware);
 }
 static int felix_fdb_del(struct dsa_switch *ds, int port,

drivers/net/ethernet/amd/xgbe/xgbe-drv.c+1−1

@@ -514,7 +514,7 @@ static void xgbe_isr_task(unsigned long data) · 513 unmodified lines
514	xgbe_disable_rx_tx_ints(pdata);	514	xgbe_disable_rx_tx_ints(pdata);
515		515
516	/* Turn on polling */	516	/* Turn on polling */
517	__napi_schedule_irqoff(&pdata->napi);	517	__napi_schedule(&pdata->napi);
518	}	518	}
519	} else {	519	} else {
520	/* Don't clear Rx/Tx status if doing per channel DMA	520	/* Don't clear Rx/Tx status if doing per channel DMA

drivers/net/ethernet/broadcom/bcmsysport.c+2−2

 	dma_addr_t mapping;
 	/* Allocate a new SKB for a new packet */
-	skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
+	skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
+				 GFP_ATOMIC | __GFP_NOWARN);
 	if (!skb) {
 		priv->mib.alloc_rx_buff_failed++;
 		netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 		priv->wol_irq = platform_get_irq(pdev, 1);
 	}
 	if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
-		dev_err(&pdev->dev, "invalid interrupts\n");
 		ret = -EINVAL;
 		goto err_free_netdev;
 	}

drivers/net/ethernet/broadcom/bgmac-platform.c+11−22

 {
 	struct device_node *np = pdev->dev.of_node;
 	struct bgmac *bgmac;
-	struct resource *regs;
 	const u8 *mac_addr;
 	bgmac = bgmac_alloc(&pdev->dev);
 	if (bgmac->irq < 0)
 		return bgmac->irq;
-	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "amac_base");
+	bgmac->plat.base =
-	if (!regs) {
+		devm_platform_ioremap_resource_byname(pdev, "amac_base");
-		dev_err(&pdev->dev, "Unable to obtain base resource\n");
-		return -EINVAL;
-	}
-	bgmac->plat.base = devm_ioremap_resource(&pdev->dev, regs);
 	if (IS_ERR(bgmac->plat.base))
 		return PTR_ERR(bgmac->plat.base);
-	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
+	bgmac->plat.idm_base =
-	if (regs) {
+		devm_platform_ioremap_resource_byname(pdev, "idm_base");
-		bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
+	if (IS_ERR(bgmac->plat.idm_base))
-		if (IS_ERR(bgmac->plat.idm_base))
+		return PTR_ERR(bgmac->plat.idm_base);
-			return PTR_ERR(bgmac->plat.idm_base);
+	bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;
-		bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;
-	}
-	regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
+	bgmac->plat.nicpm_base =
-	if (regs) {
+		devm_platform_ioremap_resource_byname(pdev, "nicpm_base");
-		bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
+	if (IS_ERR(bgmac->plat.nicpm_base))
-							       regs);
+		return PTR_ERR(bgmac->plat.nicpm_base);
-		if (IS_ERR(bgmac->plat.nicpm_base))
-			return PTR_ERR(bgmac->plat.nicpm_base);
-	}
 	bgmac->read = platform_bgmac_read;
 	bgmac->write = platform_bgmac_write;

drivers/net/ethernet/broadcom/genet/bcmgenet.c+5−1

 	if (netif_running(dev))
 		bcmgenet_update_mib_counters(priv);
+	dev->netdev_ops->ndo_get_stats(dev);
 	for (i = 0; i < BCMGENET_STATS_LEN; i++) {
 		const struct bcmgenet_stats *s;
 		char *p;
 	dma_addr_t mapping;
 	/* Allocate a new Rx skb */
-	skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT);
+	skb = __netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT,
+				 GFP_ATOMIC | __GFP_NOWARN);
 	if (!skb) {
 		priv->mib.alloc_rx_buff_failed++;
 		netif_err(priv, rx_err, priv->dev,
 	dev->stats.rx_packets = rx_packets;
 	dev->stats.rx_errors = rx_errors;
 	dev->stats.rx_missed_errors = rx_errors;
+	dev->stats.rx_dropped = rx_dropped;
 	return &dev->stats;
 }

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c+20−7

 	}
 }
-static unsigned long cudbg_mem_region_size(struct cudbg_init *pdbg_init,
+static int cudbg_mem_region_size(struct cudbg_init *pdbg_init,
-					   struct cudbg_error *cudbg_err,
+				 struct cudbg_error *cudbg_err,
-					   u8 mem_type)
+				 u8 mem_type, unsigned long *region_size)
 {
 	struct adapter *padap = pdbg_init->adap;
 	struct cudbg_meminfo mem_info;
 	memset(&mem_info, 0, sizeof(struct cudbg_meminfo));
 	rc = cudbg_fill_meminfo(padap, &mem_info);
-	if (rc)
+	if (rc) {
+		cudbg_err->sys_err = rc;
 		return rc;
+	}
 	cudbg_t4_fwcache(pdbg_init, cudbg_err);
 	rc = cudbg_meminfo_get_mem_index(padap, &mem_info, mem_type, &mc_idx);
-	if (rc)
+	if (rc) {
+		cudbg_err->sys_err = rc;
 		return rc;
+	}
+	if (region_size)
+		*region_size = mem_info.avail[mc_idx].limit -
+			       mem_info.avail[mc_idx].base;
-	return mem_info.avail[mc_idx].limit - mem_info.avail[mc_idx].base;
+	return 0;
 }
 static int cudbg_collect_mem_region(struct cudbg_init *pdbg_init,
 				    struct cudbg_error *cudbg_err,
 				    u8 mem_type)
 {
-	unsigned long size = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type);
+	unsigned long size = 0;
+	int rc;
+	rc = cudbg_mem_region_size(pdbg_init, cudbg_err, mem_type, &size);
+	if (rc)
+		return rc;
 	return cudbg_read_fw_mem(pdbg_init, dbg_buff, mem_type, size,
 				 cudbg_err);

drivers/net/ethernet/chelsio/cxgb4/cxgb4_ptp.c+6−21

@@ -311,32 +311,17 @@ static int cxgb4_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 310 unmodified lines
311	*/	311	*/
312	static int cxgb4_ptp_gettime(struct ptp_clock_info ptp, struct timespec64 ts)	312	static int cxgb4_ptp_gettime(struct ptp_clock_info ptp, struct timespec64 ts)
313	{	313	{
314	struct adapter adapter = (struct adapter )container_of(ptp,	314	struct adapter *adapter = container_of(ptp, struct adapter,
315	struct adapter, ptp_clock_info);	315	ptp_clock_info);
316	struct fw_ptp_cmd c;
317	u64 ns;	316	u64 ns;
318	int err;
319
320	memset(&c, 0, sizeof(c));
321	c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) \|
322	FW_CMD_REQUEST_F \|
323	FW_CMD_READ_F \|
324	FW_PTP_CMD_PORTID_V(0));
325	c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16));
326	c.u.ts.sc = FW_PTP_SC_GET_TIME;
327		317
328	err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), &c);	318	ns = t4_read_reg(adapter, T5_PORT_REG(0, MAC_PORT_PTP_SUM_LO_A));
329	if (err < 0) {	319	ns \|= (u64)t4_read_reg(adapter,
330	dev_err(adapter->pdev_dev,	320	T5_PORT_REG(0, MAC_PORT_PTP_SUM_HI_A)) << 32;
331	"PTP: %s error %d\n", __func__, -err);
332	return err;
333	}
334		321
335	/* convert to timespec*/	322	/* convert to timespec*/
336	ns = be64_to_cpu(c.u.ts.tm);
337	*ts = ns_to_timespec64(ns);	323	*ts = ns_to_timespec64(ns);
338		324	return 0;
339	return err;
340	}	325	}
341		326
342	/**	327	/**

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+1−1

@@ -3742,7 +3742,7 @@ int t4_phy_fw_ver(struct adapter adap, int phy_fw_ver) · 3741 unmodified lines
3742	FW_PARAMS_PARAM_Z_V(FW_PARAMS_PARAM_DEV_PHYFW_VERSION));	3742	FW_PARAMS_PARAM_Z_V(FW_PARAMS_PARAM_DEV_PHYFW_VERSION));
3743	ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1,	3743	ret = t4_query_params(adap, adap->mbox, adap->pf, 0, 1,
3744	&param, &val);	3744	&param, &val);
3745	if (ret < 0)	3745	if (ret)
3746	return ret;	3746	return ret;
3747	*phy_fw_ver = val;	3747	*phy_fw_ver = val;
3748	return 0;	3748	return 0;

drivers/net/ethernet/chelsio/cxgb4/t4_regs.h+3−0

@@ -1906,6 +1906,9 @@ · 1905 unmodified lines
1906		1906
1907	#define MAC_PORT_CFG2_A 0x818	1907	#define MAC_PORT_CFG2_A 0x818
1908		1908
		1909	#define MAC_PORT_PTP_SUM_LO_A 0x990
		1910	#define MAC_PORT_PTP_SUM_HI_A 0x994
		1911
1909	#define MPS_CMN_CTL_A 0x9000	1912	#define MPS_CMN_CTL_A 0x9000
1910		1913
1911	#define COUNTPAUSEMCRX_S 5	1914	#define COUNTPAUSEMCRX_S 5

drivers/net/ethernet/dec/tulip/tulip_core.c+1−1

@@ -1277,7 +1277,7 @@ static const struct net_device_ops tulip_netdev_ops = { · 1276 unmodified lines
1277	#endif	1277	#endif
1278	};	1278	};
1279		1279
1280	const struct pci_device_id early_486_chipsets[] = {	1280	static const struct pci_device_id early_486_chipsets[] = {
1281	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },	1281	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82424) },
1282	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },	1282	{ PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496) },
1283	{ },	1283	{ },

drivers/net/ethernet/freescale/fec.h+7−0

 	struct  sk_buff *rx_skbuff[RX_RING_SIZE];
 };
+struct fec_stop_mode_gpr {
+	struct regmap *gpr;
+	u8 reg;
+	u8 bit;
+};
 /* The FEC buffer descriptors track the ring buffers.  The rx_bd_base and
  * tx_bd_base always point to the base of the buffer descriptors.  The
  * cur_rx and cur_tx point to the currently available buffer.
 	int hwts_tx_en;
 	struct delayed_work time_keep;
 	struct regulator *reg_phy;
+	struct fec_stop_mode_gpr stop_gpr;
 	unsigned int tx_align;
 	unsigned int rx_align;

drivers/net/ethernet/freescale/fec_main.c+120−29

@@ -62,6 +62,8 @@ · 61 unmodified lines
62	#include <linux/if_vlan.h>	62	#include <linux/if_vlan.h>
63	#include <linux/pinctrl/consumer.h>	63	#include <linux/pinctrl/consumer.h>
64	#include <linux/prefetch.h>	64	#include <linux/prefetch.h>
		65	#include <linux/mfd/syscon.h>
		66	#include <linux/regmap.h>
65	#include <soc/imx/cpuidle.h>	67	#include <soc/imx/cpuidle.h>
66		68
67	#include <asm/cacheflush.h>	69	#include <asm/cacheflush.h>
@@ -84,6 +86,56 @@ static void fec_enet_itr_coal_init(struct net_device *ndev); · 16 unmodified lines
84	#define FEC_ENET_OPD_V 0xFFF0	86	#define FEC_ENET_OPD_V 0xFFF0
85	#define FEC_MDIO_PM_TIMEOUT 100 /* ms */	87	#define FEC_MDIO_PM_TIMEOUT 100 /* ms */
86		88
		89	struct fec_devinfo {
		90	u32 quirks;
		91	u8 stop_gpr_reg;
		92	u8 stop_gpr_bit;
		93	};
		94
		95	static const struct fec_devinfo fec_imx25_info = {
		96	.quirks = FEC_QUIRK_USE_GASKET \| FEC_QUIRK_MIB_CLEAR \|
		97	FEC_QUIRK_HAS_FRREG,
		98	};
		99
		100	static const struct fec_devinfo fec_imx27_info = {
		101	.quirks = FEC_QUIRK_MIB_CLEAR \| FEC_QUIRK_HAS_FRREG,
		102	};
		103
		104	static const struct fec_devinfo fec_imx28_info = {
		105	.quirks = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_SWAP_FRAME \|
		106	FEC_QUIRK_SINGLE_MDIO \| FEC_QUIRK_HAS_RACC \|
		107	FEC_QUIRK_HAS_FRREG,
		108	};
		109
		110	static const struct fec_devinfo fec_imx6q_info = {
		111	.quirks = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|
		112	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
		113	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_ERR006358 \|
		114	FEC_QUIRK_HAS_RACC,
		115	.stop_gpr_reg = 0x34,
		116	.stop_gpr_bit = 27,
		117	};
		118
		119	static const struct fec_devinfo fec_mvf600_info = {
		120	.quirks = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_RACC,
		121	};
		122
		123	static const struct fec_devinfo fec_imx6x_info = {
		124	.quirks = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|
		125	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
		126	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_HAS_AVB \|
		127	FEC_QUIRK_ERR007885 \| FEC_QUIRK_BUG_CAPTURE \|
		128	FEC_QUIRK_HAS_RACC \| FEC_QUIRK_HAS_COALESCE,
		129	};
		130
		131	static const struct fec_devinfo fec_imx6ul_info = {
		132	.quirks = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|
		133	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
		134	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_ERR007885 \|
		135	FEC_QUIRK_BUG_CAPTURE \| FEC_QUIRK_HAS_RACC \|
		136	FEC_QUIRK_HAS_COALESCE,
		137	};
		138
87	static struct platform_device_id fec_devtype[] = {	139	static struct platform_device_id fec_devtype[] = {
88	{	140	{
89	/* keep it for coldfire */	141	/* keep it for coldfire */
@@ -91,39 +143,25 @@ static struct platform_device_id fec_devtype[] = { · 1 unmodified line
91	.driver_data = 0,	143	.driver_data = 0,
92	}, {	144	}, {
93	.name = "imx25-fec",	145	.name = "imx25-fec",
94	.driver_data = FEC_QUIRK_USE_GASKET \| FEC_QUIRK_MIB_CLEAR \|	146	.driver_data = (kernel_ulong_t)&fec_imx25_info,
95	FEC_QUIRK_HAS_FRREG,
96	}, {	147	}, {
97	.name = "imx27-fec",	148	.name = "imx27-fec",
98	.driver_data = FEC_QUIRK_MIB_CLEAR \| FEC_QUIRK_HAS_FRREG,	149	.driver_data = (kernel_ulong_t)&fec_imx27_info,
99	}, {	150	}, {
100	.name = "imx28-fec",	151	.name = "imx28-fec",
101	.driver_data = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_SWAP_FRAME \|	152	.driver_data = (kernel_ulong_t)&fec_imx28_info,
102	FEC_QUIRK_SINGLE_MDIO \| FEC_QUIRK_HAS_RACC \|
103	FEC_QUIRK_HAS_FRREG,
104	}, {	153	}, {
105	.name = "imx6q-fec",	154	.name = "imx6q-fec",
106	.driver_data = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|	155	.driver_data = (kernel_ulong_t)&fec_imx6q_info,
107	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
108	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_ERR006358 \|
109	FEC_QUIRK_HAS_RACC,
110	}, {	156	}, {
111	.name = "mvf600-fec",	157	.name = "mvf600-fec",
112	.driver_data = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_RACC,	158	.driver_data = (kernel_ulong_t)&fec_mvf600_info,
113	}, {	159	}, {
114	.name = "imx6sx-fec",	160	.name = "imx6sx-fec",
115	.driver_data = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|	161	.driver_data = (kernel_ulong_t)&fec_imx6x_info,
116	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
117	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_HAS_AVB \|
118	FEC_QUIRK_ERR007885 \| FEC_QUIRK_BUG_CAPTURE \|
119	FEC_QUIRK_HAS_RACC \| FEC_QUIRK_HAS_COALESCE,
120	}, {	162	}, {
121	.name = "imx6ul-fec",	163	.name = "imx6ul-fec",
122	.driver_data = FEC_QUIRK_ENET_MAC \| FEC_QUIRK_HAS_GBIT \|	164	.driver_data = (kernel_ulong_t)&fec_imx6ul_info,
123	FEC_QUIRK_HAS_BUFDESC_EX \| FEC_QUIRK_HAS_CSUM \|
124	FEC_QUIRK_HAS_VLAN \| FEC_QUIRK_ERR007885 \|
125	FEC_QUIRK_BUG_CAPTURE \| FEC_QUIRK_HAS_RACC \|
126	FEC_QUIRK_HAS_COALESCE,
127	}, {	165	}, {
128	/* sentinel */	166	/* sentinel */
129	}	167	}
@@ -1092,11 +1130,28 @@ fec_restart(struct net_device *ndev) · 962 unmodified lines
1092		1130
1093	}	1131	}
1094		1132
		1133	static void fec_enet_stop_mode(struct fec_enet_private *fep, bool enabled)
		1134	{
		1135	struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
		1136	struct fec_stop_mode_gpr *stop_gpr = &fep->stop_gpr;
		1137
		1138	if (stop_gpr->gpr) {
		1139	if (enabled)
		1140	regmap_update_bits(stop_gpr->gpr, stop_gpr->reg,
		1141	BIT(stop_gpr->bit),
		1142	BIT(stop_gpr->bit));
		1143	else
		1144	regmap_update_bits(stop_gpr->gpr, stop_gpr->reg,
		1145	BIT(stop_gpr->bit), 0);
		1146	} else if (pdata && pdata->sleep_mode_enable) {
		1147	pdata->sleep_mode_enable(enabled);
		1148	}
		1149	}
		1150
1095	static void	1151	static void
1096	fec_stop(struct net_device *ndev)	1152	fec_stop(struct net_device *ndev)
1097	{	1153	{
1098	struct fec_enet_private *fep = netdev_priv(ndev);	1154	struct fec_enet_private *fep = netdev_priv(ndev);
1099	struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
1100	u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);	1155	u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
1101	u32 val;	1156	u32 val;
1102		1157
@@ -1125,9 +1180,7 @@ fec_stop(struct net_device *ndev) · 22 unmodified lines
1125	val = readl(fep->hwp + FEC_ECNTRL);	1180	val = readl(fep->hwp + FEC_ECNTRL);
1126	val \|= (FEC_ECR_MAGICEN \| FEC_ECR_SLEEP);	1181	val \|= (FEC_ECR_MAGICEN \| FEC_ECR_SLEEP);
1127	writel(val, fep->hwp + FEC_ECNTRL);	1182	writel(val, fep->hwp + FEC_ECNTRL);
1128		1183	fec_enet_stop_mode(fep, true);
1129	if (pdata && pdata->sleep_mode_enable)
1130	pdata->sleep_mode_enable(true);
1131	}	1184	}
1132	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);	1185	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1133		1186
@@ -3398,6 +3451,37 @@ static int fec_enet_get_irq_cnt(struct platform_device *pdev) · 2264 unmodified lines
3398	return irq_cnt;	3451	return irq_cnt;
3399	}	3452	}
3400		3453
		3454	static int fec_enet_init_stop_mode(struct fec_enet_private *fep,
		3455	struct fec_devinfo *dev_info,
		3456	struct device_node *np)
		3457	{
		3458	struct device_node *gpr_np;
		3459	int ret = 0;
		3460
		3461	if (!dev_info)
		3462	return 0;
		3463
		3464	gpr_np = of_parse_phandle(np, "gpr", 0);
		3465	if (!gpr_np)
		3466	return 0;
		3467
		3468	fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np);
		3469	if (IS_ERR(fep->stop_gpr.gpr)) {
		3470	dev_err(&fep->pdev->dev, "could not find gpr regmap\n");
		3471	ret = PTR_ERR(fep->stop_gpr.gpr);
		3472	fep->stop_gpr.gpr = NULL;
		3473	goto out;
		3474	}
		3475
		3476	fep->stop_gpr.reg = dev_info->stop_gpr_reg;
		3477	fep->stop_gpr.bit = dev_info->stop_gpr_bit;
		3478
		3479	out:
		3480	of_node_put(gpr_np);
		3481
		3482	return ret;
		3483	}
		3484
3401	static int	3485	static int
3402	fec_probe(struct platform_device *pdev)	3486	fec_probe(struct platform_device *pdev)
3403	{	3487	{
@@ -3413,6 +3497,7 @@ fec_probe(struct platform_device *pdev) · 9 unmodified lines
3413	int num_rx_qs;	3497	int num_rx_qs;
3414	char irq_name[8];	3498	char irq_name[8];
3415	int irq_cnt;	3499	int irq_cnt;
		3500	struct fec_devinfo *dev_info;
3416		3501
3417	fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs);	3502	fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs);
3418		3503
@@ -3430,7 +3515,9 @@ fec_probe(struct platform_device *pdev) · 11 unmodified lines
3430	of_id = of_match_device(fec_dt_ids, &pdev->dev);	3515	of_id = of_match_device(fec_dt_ids, &pdev->dev);
3431	if (of_id)	3516	if (of_id)
3432	pdev->id_entry = of_id->data;	3517	pdev->id_entry = of_id->data;
3433	fep->quirks = pdev->id_entry->driver_data;	3518	dev_info = (struct fec_devinfo *)pdev->id_entry->driver_data;
		3519	if (dev_info)
		3520	fep->quirks = dev_info->quirks;
3434		3521
3435	fep->netdev = ndev;	3522	fep->netdev = ndev;
3436	fep->num_rx_queues = num_rx_qs;	3523	fep->num_rx_queues = num_rx_qs;
@@ -3464,6 +3551,10 @@ fec_probe(struct platform_device *pdev) · 27 unmodified lines
3464	if (of_get_property(np, "fsl,magic-packet", NULL))	3551	if (of_get_property(np, "fsl,magic-packet", NULL))
3465	fep->wol_flag \|= FEC_WOL_HAS_MAGIC_PACKET;	3552	fep->wol_flag \|= FEC_WOL_HAS_MAGIC_PACKET;
3466		3553
		3554	ret = fec_enet_init_stop_mode(fep, dev_info, np);
		3555	if (ret)
		3556	goto failed_stop_mode;
		3557
3467	phy_node = of_parse_phandle(np, "phy-handle", 0);	3558	phy_node = of_parse_phandle(np, "phy-handle", 0);
3468	if (!phy_node && of_phy_is_fixed_link(np)) {	3559	if (!phy_node && of_phy_is_fixed_link(np)) {
3469	ret = of_phy_register_fixed_link(np);	3560	ret = of_phy_register_fixed_link(np);
@@ -3632,6 +3723,7 @@ failed_clk: · 162 unmodified lines
3632	if (of_phy_is_fixed_link(np))	3723	if (of_phy_is_fixed_link(np))
3633	of_phy_deregister_fixed_link(np);	3724	of_phy_deregister_fixed_link(np);
3634	of_node_put(phy_node);	3725	of_node_put(phy_node);
		3726	failed_stop_mode:
3635	failed_phy:	3727	failed_phy:
3636	dev_id--;	3728	dev_id--;
3637	failed_ioremap:	3729	failed_ioremap:
@@ -3709,7 +3801,6 @@ static int __maybe_unused fec_resume(struct device *dev) · 71 unmodified lines
3709	{	3801	{
3710	struct net_device *ndev = dev_get_drvdata(dev);	3802	struct net_device *ndev = dev_get_drvdata(dev);
3711	struct fec_enet_private *fep = netdev_priv(ndev);	3803	struct fec_enet_private *fep = netdev_priv(ndev);
3712	struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
3713	int ret;	3804	int ret;
3714	int val;	3805	int val;
3715		3806
@@ -3727,8 +3818,8 @@ static int __maybe_unused fec_resume(struct device *dev) · 11 unmodified lines
3727	goto failed_clk;	3818	goto failed_clk;
3728	}	3819	}
3729	if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) {	3820	if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) {
3730	if (pdata && pdata->sleep_mode_enable)	3821	fec_enet_stop_mode(fep, false);
3731	pdata->sleep_mode_enable(false);	3822
3732	val = readl(fep->hwp + FEC_ECNTRL);	3823	val = readl(fep->hwp + FEC_ECNTRL);
3733	val &= ~(FEC_ECR_MAGICEN \| FEC_ECR_SLEEP);	3824	val &= ~(FEC_ECR_MAGICEN \| FEC_ECR_SLEEP);
3734	writel(val, fep->hwp + FEC_ECNTRL);	3825	writel(val, fep->hwp + FEC_ECNTRL);

drivers/net/ethernet/intel/e1000/e1000_main.c+1−1

@@ -1476,7 +1476,7 @@ static bool e1000_check_64k_bound(struct e1000_adapter adapter, void start, · 1475 unmodified lines
1476	if (hw->mac_type == e1000_82545 \|\|	1476	if (hw->mac_type == e1000_82545 \|\|
1477	hw->mac_type == e1000_ce4100 \|\|	1477	hw->mac_type == e1000_ce4100 \|\|
1478	hw->mac_type == e1000_82546) {	1478	hw->mac_type == e1000_82546) {
1479	return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;	1479	return ((begin ^ (end - 1)) >> 16) == 0;
1480	}	1480	}
1481		1481
1482	return true;	1482	return true;

drivers/net/ethernet/intel/i40e/i40e_main.c+2−2

@@ -1611,7 +1611,7 @@ static int i40e_config_rss_aq(struct i40e_vsi vsi, const u8 seed, · 1610 unmodified lines
1611	}	1611	}
1612	}	1612	}
1613	if (lut) {	1613	if (lut) {
1614	bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;	1614	bool pf_lut = vsi->type == I40E_VSI_MAIN;
1615		1615
1616	ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);	1616	ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1617	if (ret) {	1617	if (ret) {
@@ -11436,7 +11436,7 @@ static int i40e_get_rss_aq(struct i40e_vsi vsi, const u8 seed, · 9818 unmodified lines
11436	}	11436	}
11437		11437
11438	if (lut) {	11438	if (lut) {
11439	bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;	11439	bool pf_lut = vsi->type == I40E_VSI_MAIN;
11440		11440
11441	ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);	11441	ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
11442	if (ret) {	11442	if (ret) {

drivers/net/ethernet/marvell/mvneta.c+1−1

@@ -5383,7 +5383,7 @@ static int __init mvneta_driver_init(void) · 5382 unmodified lines
5383	{	5383	{
5384	int ret;	5384	int ret;
5385		5385
5386	ret = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, "net/mvmeta:online",	5386	ret = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, "net/mvneta:online",
5387	mvneta_cpu_online,	5387	mvneta_cpu_online,
5388	mvneta_cpu_down_prepare);	5388	mvneta_cpu_down_prepare);
5389	if (ret < 0)	5389	if (ret < 0)

drivers/net/ethernet/mediatek/mtk_eth_soc.c+23−1

@@ -65,6 +65,17 @@ u32 mtk_r32(struct mtk_eth *eth, unsigned reg) · 64 unmodified lines
65	return __raw_readl(eth->base + reg);	65	return __raw_readl(eth->base + reg);
66	}	66	}
67		67
		68	u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned reg)
		69	{
		70	u32 val;
		71
		72	val = mtk_r32(eth, reg);
		73	val &= ~mask;
		74	val \|= set;
		75	mtk_w32(eth, val, reg);
		76	return reg;
		77	}
		78
68	static int mtk_mdio_busy_wait(struct mtk_eth *eth)	79	static int mtk_mdio_busy_wait(struct mtk_eth *eth)
69	{	80	{
70	unsigned long t_start = jiffies;	81	unsigned long t_start = jiffies;
@@ -193,7 +204,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, · 122 unmodified lines
193	struct mtk_mac *mac = container_of(config, struct mtk_mac,	204	struct mtk_mac *mac = container_of(config, struct mtk_mac,
194	phylink_config);	205	phylink_config);
195	struct mtk_eth *eth = mac->hw;	206	struct mtk_eth *eth = mac->hw;
196	u32 mcr_cur, mcr_new, sid;	207	u32 mcr_cur, mcr_new, sid, i;
197	int val, ge_mode, err;	208	int val, ge_mode, err;
198		209
199	/* MT76x8 has no hardware settings between for the MAC */	210	/* MT76x8 has no hardware settings between for the MAC */
@@ -255,6 +266,17 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, · 55 unmodified lines
255	PHY_INTERFACE_MODE_TRGMII)	266	PHY_INTERFACE_MODE_TRGMII)
256	mtk_gmac0_rgmii_adjust(mac->hw,	267	mtk_gmac0_rgmii_adjust(mac->hw,
257	state->speed);	268	state->speed);
		269
		270	/* mt7623_pad_clk_setup */
		271	for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
		272	mtk_w32(mac->hw,
		273	TD_DM_DRVP(8) \| TD_DM_DRVN(8),
		274	TRGMII_TD_ODT(i));
		275
		276	/* Assert/release MT7623 RXC reset */
		277	mtk_m32(mac->hw, 0, RXC_RST \| RXC_DQSISEL,
		278	TRGMII_RCK_CTRL);
		279	mtk_m32(mac->hw, RXC_RST, 0, TRGMII_RCK_CTRL);
258	}	280	}
259	}	281	}
260		282

drivers/net/ethernet/mediatek/mtk_eth_soc.h+8−0

 #define DQSI0(x)		((x << 0) & GENMASK(6, 0))
 #define DQSI1(x)		((x << 8) & GENMASK(14, 8))
 #define RXCTL_DMWTLAT(x)	((x << 16) & GENMASK(18, 16))
+#define RXC_RST			BIT(31)
 #define RXC_DQSISEL		BIT(30)
 #define RCK_CTRL_RGMII_1000	(RXC_DQSISEL | RXCTL_DMWTLAT(2) | DQSI1(16))
 #define RCK_CTRL_RGMII_10_100	RXCTL_DMWTLAT(2)
+#define NUM_TRGMII_CTRL		5
 /* TRGMII RXC control register */
 #define TRGMII_TCK_CTRL		0x10340
 #define TXCTL_DMWTLAT(x)	((x << 16) & GENMASK(18, 16))
 #define TCK_CTRL_RGMII_1000	TXCTL_DMWTLAT(2)
 #define TCK_CTRL_RGMII_10_100	(TXC_INV | TXCTL_DMWTLAT(2))
+/* TRGMII TX Drive Strength */
+#define TRGMII_TD_ODT(i)	(0x10354 + 8 * (i))
+#define  TD_DM_DRVP(x)		((x) & 0xf)
+#define  TD_DM_DRVN(x)		(((x) & 0xf) << 4)
 /* TRGMII Interface mode register */
 #define INTF_MODE		0x10390
 #define TRGMII_INTF_DIS		BIT(0)

drivers/net/ethernet/mellanox/mlx4/en_tx.c+13−1

 #include <linux/ip.h>
 #include <linux/ipv6.h>
 #include <linux/moduleparam.h>
+#include <linux/indirect_call_wrapper.h>
 #include "mlx4_en.h"
 	}
 }
+INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
+						   struct mlx4_en_tx_ring *ring,
+						   int index, u64 timestamp,
+						   int napi_mode));
 u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 			 struct mlx4_en_tx_ring *ring,
 	return tx_info->nr_txbb;
 }
+INDIRECT_CALLABLE_DECLARE(u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
+						      struct mlx4_en_tx_ring *ring,
+						      int index, u64 timestamp,
+						      int napi_mode));
 u32 mlx4_en_recycle_tx_desc(struct mlx4_en_priv *priv,
 			    struct mlx4_en_tx_ring *ring,
 			    int index, u64 timestamp,
 				timestamp = mlx4_en_get_cqe_ts(cqe);
 			/* free next descriptor */
-			last_nr_txbb = ring->free_tx_desc(
+			last_nr_txbb = INDIRECT_CALL_2(ring->free_tx_desc,
+						       mlx4_en_free_tx_desc,
+						       mlx4_en_recycle_tx_desc,
 					priv, ring, ring_index,
 					timestamp, napi_budget);

drivers/net/ethernet/mellanox/mlx5/core/Kconfig+4−4

@@ -7,10 +7,10 @@ config MLX5_CORE · 6 unmodified lines
7	tristate "Mellanox 5th generation network adapters (ConnectX series) core driver"	7	tristate "Mellanox 5th generation network adapters (ConnectX series) core driver"
8	depends on PCI	8	depends on PCI
9	select NET_DEVLINK	9	select NET_DEVLINK
10	imply PTP_1588_CLOCK	10	depends on VXLAN \|\| !VXLAN
11	imply VXLAN	11	depends on MLXFW \|\| !MLXFW
12	imply MLXFW	12	depends on PTP_1588_CLOCK \|\| !PTP_1588_CLOCK
13	imply PCI_HYPERV_INTERFACE	13	depends on PCI_HYPERV_INTERFACE \|\| !PCI_HYPERV_INTERFACE
14	default n	14	default n
15	---help---	15	---help---
16	Core driver for low level functionality of the ConnectX-4 and	16	Core driver for low level functionality of the ConnectX-4 and

drivers/net/ethernet/mellanox/mlx5/core/devlink.c+4−1

@@ -23,7 +23,10 @@ static int mlx5_devlink_flash_update(struct devlink *devlink, · 22 unmodified lines
23	if (err)	23	if (err)
24	return err;	24	return err;
25		25
26	return mlx5_firmware_flash(dev, fw, extack);	26	err = mlx5_firmware_flash(dev, fw, extack);
		27	release_firmware(fw);
		28
		29	return err;
27	}	30	}
28		31
29	static u8 mlx5_fw_ver_major(u32 version)	32	static u8 mlx5_fw_ver_major(u32 version)

drivers/net/ethernet/mellanox/mlx5/core/diag/fw_tracer.c+3−3

@@ -935,7 +935,7 @@ struct mlx5_fw_tracer mlx5_fw_tracer_create(struct mlx5_core_dev dev) · 934 unmodified lines
935	return NULL;	935	return NULL;
936	}	936	}
937		937
938	tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);	938	tracer = kvzalloc(sizeof(*tracer), GFP_KERNEL);
939	if (!tracer)	939	if (!tracer)
940	return ERR_PTR(-ENOMEM);	940	return ERR_PTR(-ENOMEM);
941		941
@@ -982,7 +982,7 @@ destroy_workqueue: · 40 unmodified lines
982	tracer->dev = NULL;	982	tracer->dev = NULL;
983	destroy_workqueue(tracer->work_queue);	983	destroy_workqueue(tracer->work_queue);
984	free_tracer:	984	free_tracer:
985	kfree(tracer);	985	kvfree(tracer);
986	return ERR_PTR(err);	986	return ERR_PTR(err);
987	}	987	}
988		988
@@ -1061,7 +1061,7 @@ void mlx5_fw_tracer_destroy(struct mlx5_fw_tracer *tracer) · 72 unmodified lines
1061	mlx5_fw_tracer_destroy_log_buf(tracer);	1061	mlx5_fw_tracer_destroy_log_buf(tracer);
1062	flush_workqueue(tracer->work_queue);	1062	flush_workqueue(tracer->work_queue);
1063	destroy_workqueue(tracer->work_queue);	1063	destroy_workqueue(tracer->work_queue);
1064	kfree(tracer);	1064	kvfree(tracer);
1065	}	1065	}
1066		1066
1067	static int fw_tracer_event(struct notifier_block nb, unsigned long action, void data)	1067	static int fw_tracer_event(struct notifier_block nb, unsigned long action, void data)

drivers/net/ethernet/mellanox/mlx5/core/en.h+2−1

 	MLX5E_SQ_STATE_AM,
 	MLX5E_SQ_STATE_TLS,
 	MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,
+	MLX5E_SQ_STATE_PENDING_XSK_TX,
 };
 struct mlx5e_sq_wqe_info {
 void mlx5e_handle_rx_cqe(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
 void mlx5e_handle_rx_cqe_mpwrq(struct mlx5e_rq *rq, struct mlx5_cqe64 *cqe);
 bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq);
-void mlx5e_poll_ico_cq(struct mlx5e_cq *cq);
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq);
 bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq);
 void mlx5e_dealloc_rx_wqe(struct mlx5e_rq *rq, u16 ix);
 void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix);

drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c+19−23

 #include <net/flow_offload.h>
 #include <net/netfilter/nf_flow_table.h>
 #include <linux/workqueue.h>
+#include <linux/xarray.h>
 #include "esw/chains.h"
 #include "en/tc_ct.h"
 	struct mlx5_eswitch *esw;
 	const struct net_device *netdev;
 	struct idr fte_ids;
-	struct idr tuple_ids;
+	struct xarray tuple_ids;
 	struct rhashtable zone_ht;
 	struct mlx5_flow_table *ct;
 	struct mlx5_flow_table *ct_nat;
 	struct nf_flowtable *nf_ft;
 	struct mlx5_tc_ct_priv *ct_priv;
 	struct rhashtable ct_entries_ht;
-	struct list_head ct_entries_list;
 };
 struct mlx5_ct_entry {
-	struct list_head list;
 	u16 zone;
 	struct rhash_head node;
 	struct flow_rule *flow_rule;
 	mlx5_eswitch_del_offloaded_rule(esw, zone_rule->rule, attr);
 	mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr);
-	idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid);
+	xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid);
 }
 static void
 	struct mlx5_esw_flow_attr *attr = &zone_rule->attr;
 	struct mlx5_eswitch *esw = ct_priv->esw;
 	struct mlx5_flow_spec *spec = NULL;
-	u32 tupleid = 1;
+	u32 tupleid;
 	int err;
 	zone_rule->nat = nat;
 		return -ENOMEM;
 	/* Get tuple unique id */
-	err = idr_alloc_u32(&ct_priv->tuple_ids, zone_rule, &tupleid,
+	err = xa_alloc(&ct_priv->tuple_ids, &tupleid, zone_rule,
-			    TUPLE_ID_MAX, GFP_KERNEL);
+		       XA_LIMIT(1, TUPLE_ID_MAX), GFP_KERNEL);
 	if (err) {
 		netdev_warn(ct_priv->netdev,
 			    "Failed to allocate tuple id, err: %d\n", err);
-		goto err_idr_alloc;
+		goto err_xa_alloc;
 	}
 	zone_rule->tupleid = tupleid;
 err_rule:
 	mlx5_modify_header_dealloc(esw->dev, attr->modify_hdr);
 err_mod_hdr:
-	idr_remove(&ct_priv->tuple_ids, zone_rule->tupleid);
+	xa_erase(&ct_priv->tuple_ids, zone_rule->tupleid);
-err_idr_alloc:
+err_xa_alloc:
 	kfree(spec);
 	return err;
 }
 	if (err)
 		goto err_insert;
-	list_add(&entry->list, &ft->ct_entries_list);
 	return 0;
 err_insert:
 	WARN_ON(rhashtable_remove_fast(&ft->ct_entries_ht,
 				       &entry->node,
 				       cts_ht_params));
-	list_del(&entry->list);
 	kfree(entry);
 	return 0;
 	ft->zone = zone;
 	ft->nf_ft = nf_ft;
 	ft->ct_priv = ct_priv;
-	INIT_LIST_HEAD(&ft->ct_entries_list);
 	refcount_set(&ft->refcount, 1);
 	err = rhashtable_init(&ft->ct_entries_ht, &cts_ht_params);
 }
 static void
-mlx5_tc_ct_flush_ft(struct mlx5_tc_ct_priv *ct_priv, struct mlx5_ct_ft *ft)
+mlx5_tc_ct_flush_ft_entry(void *ptr, void *arg)
 {
-	struct mlx5_ct_entry *entry;
+	struct mlx5_tc_ct_priv *ct_priv = arg;
+	struct mlx5_ct_entry *entry = ptr;
-	list_for_each_entry(entry, &ft->ct_entries_list, list)
+	mlx5_tc_ct_entry_del_rules(ct_priv, entry);
-		mlx5_tc_ct_entry_del_rules(ft->ct_priv, entry);
 }
 static void
 	nf_flow_table_offload_del_cb(ft->nf_ft,
 				     mlx5_tc_ct_block_flow_offload, ft);
-	mlx5_tc_ct_flush_ft(ct_priv, ft);
 	rhashtable_remove_fast(&ct_priv->zone_ht, &ft->node, zone_params);
-	rhashtable_destroy(&ft->ct_entries_ht);
+	rhashtable_free_and_destroy(&ft->ct_entries_ht,
+				    mlx5_tc_ct_flush_ft_entry,
+				    ct_priv);
 	kfree(ft);
 }
 	}
 	idr_init(&ct_priv->fte_ids);
-	idr_init(&ct_priv->tuple_ids);
+	xa_init_flags(&ct_priv->tuple_ids, XA_FLAGS_ALLOC1);
 	mutex_init(&ct_priv->control_lock);
 	rhashtable_init(&ct_priv->zone_ht, &zone_params);
 	rhashtable_destroy(&ct_priv->zone_ht);
 	mutex_destroy(&ct_priv->control_lock);
-	idr_destroy(&ct_priv->tuple_ids);
+	xa_destroy(&ct_priv->tuple_ids);
 	idr_destroy(&ct_priv->fte_ids);
 	kfree(ct_priv);
 	if (!ct_priv || !tupleid)
 		return true;
-	zone_rule = idr_find(&ct_priv->tuple_ids, tupleid);
+	zone_rule = xa_load(&ct_priv->tuple_ids, tupleid);
 	if (!zone_rule)
 		return false;

drivers/net/ethernet/mellanox/mlx5/core/en/xsk/tx.c+3−0

@@ -33,6 +33,9 @@ int mlx5e_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags) · 32 unmodified lines
33	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &c->xskicosq.state)))	33	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &c->xskicosq.state)))
34	return 0;	34	return 0;
35		35
		36	if (test_and_set_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state))
		37	return 0;
		38
36	spin_lock(&c->xskicosq_lock);	39	spin_lock(&c->xskicosq_lock);
37	mlx5e_trigger_irq(&c->xskicosq);	40	mlx5e_trigger_irq(&c->xskicosq);
38	spin_unlock(&c->xskicosq_lock);	41	spin_unlock(&c->xskicosq_lock);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+7−2

 	struct mlx5e_vport_stats *vstats = &priv->stats.vport;
 	struct mlx5e_pport_stats *pstats = &priv->stats.pport;
-	if (!mlx5e_monitor_counter_supported(priv)) {
+	/* In switchdev mode, monitor counters doesn't monitor
+	 * rx/tx stats of 802_3. The update stats mechanism
+	 * should keep the 802_3 layout counters updated
+	 */
+	if (!mlx5e_monitor_counter_supported(priv) ||
+	    mlx5e_is_uplink_rep(priv)) {
 		/* update HW stats in background for next time */
 		mlx5e_queue_update_stats(priv);
 	}
 #ifdef CONFIG_MLX5_CORE_EN_DCB
 	mlx5e_dcbnl_delete_app(priv);
 #endif
-	mlx5e_devlink_port_unregister(priv);
 	unregister_netdev(priv->netdev);
+	mlx5e_devlink_port_unregister(priv);
 	mlx5e_detach(mdev, vpriv);
 	mlx5e_destroy_netdev(priv);
 }

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+5−4

 	struct mlx5_eswitch_rep *rep = rpriv->rep;
 	struct netdev_phys_item_id ppid = {};
 	unsigned int dl_port_index = 0;
+	u16 pfnum;
 	if (!is_devlink_port_supported(dev, rpriv))
 		return 0;
 	mlx5e_rep_get_port_parent_id(rpriv->netdev, &ppid);
+	pfnum = PCI_FUNC(dev->pdev->devfn);
 	if (rep->vport == MLX5_VPORT_UPLINK) {
 		devlink_port_attrs_set(&rpriv->dl_port,
 				       DEVLINK_PORT_FLAVOUR_PHYSICAL,
-				       PCI_FUNC(dev->pdev->devfn), false, 0,
+				       pfnum, false, 0,
 				       &ppid.id[0], ppid.id_len);
 		dl_port_index = vport_to_devlink_port_index(dev, rep->vport);
 	} else if (rep->vport == MLX5_VPORT_PF) {
 		devlink_port_attrs_pci_pf_set(&rpriv->dl_port,
 					      &ppid.id[0], ppid.id_len,
-					      dev->pdev->devfn);
+					      pfnum);
 		dl_port_index = rep->vport;
 	} else if (mlx5_eswitch_is_vf_vport(dev->priv.eswitch,
 					    rpriv->rep->vport)) {
 		devlink_port_attrs_pci_vf_set(&rpriv->dl_port,
 					      &ppid.id[0], ppid.id_len,
-					      dev->pdev->devfn,
+					      pfnum, rep->vport - 1);
-					      rep->vport - 1);
 		dl_port_index = vport_to_devlink_port_index(dev, rep->vport);
 	}

drivers/net/ethernet/mellanox/mlx5/core/en_rx.c+5−3

 	return !!err;
 }
-void mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
+int mlx5e_poll_ico_cq(struct mlx5e_cq *cq)
 {
 	struct mlx5e_icosq *sq = container_of(cq, struct mlx5e_icosq, cq);
 	struct mlx5_cqe64 *cqe;
 	int i;
 	if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state)))
-		return;
+		return 0;
 	cqe = mlx5_cqwq_get_cqe(&cq->wq);
 	if (likely(!cqe))
-		return;
+		return 0;
 	/* sq->cc must be updated only after mlx5_cqwq_update_db_record(),
 	 * otherwise a cq overrun may occur
 	sq->cc = sqcc;
 	mlx5_cqwq_update_db_record(&cq->wq);
+	return i;
 }
 bool mlx5e_post_rx_mpwqes(struct mlx5e_rq *rq)

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+5−3

 	if (err)
 		return err;
-	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
+	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR &&
+	    !(attr->ct_attr.ct_action & TCA_CT_ACT_CLEAR)) {
 		err = mlx5e_attach_mod_hdr(priv, flow, parse_attr);
 		dealloc_mod_hdr_actions(&parse_attr->mod_hdr_acts);
 		if (err)
 			       struct mlx5_esw_flow_attr *attr,
 			       u32 *action)
 {
-	int nest_level = attr->parse_attr->filter_dev->lower_level;
 	struct flow_action_entry vlan_act = {
 		.id = FLOW_ACTION_VLAN_POP,
 	};
-	int err = 0;
+	int nest_level, err = 0;
+	nest_level = attr->parse_attr->filter_dev->lower_level -
+						priv->netdev->lower_level;
 	while (nest_level--) {
 		err = parse_tc_vlan_action(priv, &vlan_act, attr, action);
 		if (err)

drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c+5−1

 				mlx5e_post_rx_wqes,
 				rq);
 	if (xsk_open) {
-		mlx5e_poll_ico_cq(&c->xskicosq.cq);
+		if (mlx5e_poll_ico_cq(&c->xskicosq.cq))
+			/* Don't clear the flag if nothing was polled to prevent
+			 * queueing more WQEs and overflowing XSKICOSQ.
+			 */
+			clear_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->xskicosq.state);
 		busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq);
 		busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq);
 	}

drivers/net/ethernet/mellanox/mlx5/core/eswitch.h+0−1

@@ -403,7 +403,6 @@ enum { · 402 unmodified lines
403	MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),	403	MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0),
404	MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),	404	MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1),
405	MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),	405	MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2),
406	MLX5_ESW_ATTR_FLAG_HAIRPIN = BIT(3),
407	};	406	};
408		407
409	struct mlx5_esw_flow_attr {	408	struct mlx5_esw_flow_attr {

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+3−9

 	bool split = !!(attr->split_count);
 	struct mlx5_flow_handle *rule;
 	struct mlx5_flow_table *fdb;
-	bool hairpin = false;
 	int j, i = 0;
 	if (esw->mode != MLX5_ESWITCH_OFFLOADS)
 		goto err_esw_get;
 	}
-	if (mlx5_eswitch_termtbl_required(esw, attr, &flow_act, spec)) {
+	if (mlx5_eswitch_termtbl_required(esw, attr, &flow_act, spec))
 		rule = mlx5_eswitch_add_termtbl_rule(esw, fdb, spec, attr,
 						     &flow_act, dest, i);
-		hairpin = true;
+	else
-	} else {
 		rule = mlx5_add_flow_rules(fdb, spec, &flow_act, dest, i);
-	}
 	if (IS_ERR(rule))
 		goto err_add_rule;
 	else
 		atomic64_inc(&esw->offloads.num_flows);
-	if (hairpin)
-		attr->flags |= MLX5_ESW_ATTR_FLAG_HAIRPIN;
 	return rule;
 err_add_rule:
 	mlx5_del_flow_rules(rule);
-	if (attr->flags & MLX5_ESW_ATTR_FLAG_HAIRPIN) {
+	if (!(attr->flags & MLX5_ESW_ATTR_FLAG_SLOW_PATH)) {
 		/* unref the term table */
 		for (i = 0; i < MLX5_MAX_FLOW_FWD_VPORTS; i++) {
 			if (attr->dests[i].termtbl)

drivers/net/ethernet/mellanox/mlx5/core/health.c+1−1

@@ -243,7 +243,7 @@ recover_from_sw_reset: · 242 unmodified lines
243	if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)	243	if (mlx5_get_nic_state(dev) == MLX5_NIC_IFC_DISABLED)
244	break;	244	break;
245		245
246	cond_resched();	246	msleep(20);
247	} while (!time_after(jiffies, end));	247	} while (!time_after(jiffies, end));
248		248
249	if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) {	249	if (mlx5_get_nic_state(dev) != MLX5_NIC_IFC_DISABLED) {

drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c+2−2

@@ -380,7 +380,7 @@ struct mlxsw_afa_block mlxsw_afa_block_create(struct mlxsw_afa mlxsw_afa) · 379 unmodified lines
380		380
381	block = kzalloc(sizeof(*block), GFP_KERNEL);	381	block = kzalloc(sizeof(*block), GFP_KERNEL);
382	if (!block)	382	if (!block)
383	return NULL;	383	return ERR_PTR(-ENOMEM);
384	INIT_LIST_HEAD(&block->resource_list);	384	INIT_LIST_HEAD(&block->resource_list);
385	block->afa = mlxsw_afa;	385	block->afa = mlxsw_afa;
386		386
@@ -408,7 +408,7 @@ err_second_set_create: · 21 unmodified lines
408	mlxsw_afa_set_destroy(block->first_set);	408	mlxsw_afa_set_destroy(block->first_set);
409	err_first_set_create:	409	err_first_set_create:
410	kfree(block);	410	kfree(block);
411	return NULL;	411	return ERR_PTR(-ENOMEM);
412	}	412	}
413	EXPORT_SYMBOL(mlxsw_afa_block_create);	413	EXPORT_SYMBOL(mlxsw_afa_block_create);
414		414

drivers/net/ethernet/mellanox/mlxsw/spectrum2_acl_tcam.c+2−2

@@ -88,8 +88,8 @@ static int mlxsw_sp2_acl_tcam_init(struct mlxsw_sp mlxsw_sp, void priv, · 87 unmodified lines
88	* to be written using PEFA register to all indexes for all regions.	88	* to be written using PEFA register to all indexes for all regions.
89	*/	89	*/
90	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);	90	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);
91	if (!afa_block) {	91	if (IS_ERR(afa_block)) {
92	err = -ENOMEM;	92	err = PTR_ERR(afa_block);
93	goto err_afa_block;	93	goto err_afa_block;
94	}	94	}
95	err = mlxsw_afa_block_continue(afa_block);	95	err = mlxsw_afa_block_continue(afa_block);

drivers/net/ethernet/mellanox/mlxsw/spectrum_acl.c+1−1

@@ -464,7 +464,7 @@ mlxsw_sp_acl_rulei_create(struct mlxsw_sp_acl *acl, · 463 unmodified lines
464		464
465	rulei = kzalloc(sizeof(*rulei), GFP_KERNEL);	465	rulei = kzalloc(sizeof(*rulei), GFP_KERNEL);
466	if (!rulei)	466	if (!rulei)
467	return NULL;	467	return ERR_PTR(-ENOMEM);
468		468
469	if (afa_block) {	469	if (afa_block) {
470	rulei->act_block = afa_block;	470	rulei->act_block = afa_block;

drivers/net/ethernet/mellanox/mlxsw/spectrum_mr_tcam.c+2−2

@@ -199,8 +199,8 @@ mlxsw_sp_mr_tcam_afa_block_create(struct mlxsw_sp *mlxsw_sp, · 198 unmodified lines
199	int err;	199	int err;
200		200
201	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);	201	afa_block = mlxsw_afa_block_create(mlxsw_sp->afa);
202	if (!afa_block)	202	if (IS_ERR(afa_block))
203	return ERR_PTR(-ENOMEM);	203	return afa_block;
204		204
205	err = mlxsw_afa_block_append_allocated_counter(afa_block,	205	err = mlxsw_afa_block_append_allocated_counter(afa_block,
206	counter_index);	206	counter_index);

drivers/net/ethernet/mscc/ocelot.c+43−41

 	ocelot_write(ocelot, val, ANA_VLANMASK);
 }
-void ocelot_port_vlan_filtering(struct ocelot *ocelot, int port,
+static int ocelot_port_set_native_vlan(struct ocelot *ocelot, int port,
-				bool vlan_aware)
+				       u16 vid)
 {
 	struct ocelot_port *ocelot_port = ocelot->ports[port];
-	u32 val;
+	u32 val = 0;
-	if (vlan_aware)
+	if (ocelot_port->vid != vid) {
-		val = ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
+		/* Always permit deleting the native VLAN (vid = 0) */
-		      ANA_PORT_VLAN_CFG_VLAN_POP_CNT(1);
+		if (ocelot_port->vid && vid) {
-	else
+			dev_err(ocelot->dev,
-		val = 0;
+				"Port already has a native VLAN: %d\n",
-	ocelot_rmw_gix(ocelot, val,
+				ocelot_port->vid);
-		       ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
+			return -EBUSY;
-		       ANA_PORT_VLAN_CFG_VLAN_POP_CNT_M,
+		}
-		       ANA_PORT_VLAN_CFG, port);
+		ocelot_port->vid = vid;
+	}
+	ocelot_rmw_gix(ocelot, REW_PORT_VLAN_CFG_PORT_VID(vid),
+		       REW_PORT_VLAN_CFG_PORT_VID_M,
+		       REW_PORT_VLAN_CFG, port);
-	if (vlan_aware && !ocelot_port->vid)
+	if (ocelot_port->vlan_aware && !ocelot_port->vid)
 		/* If port is vlan-aware and tagged, drop untagged and priority
 		 * tagged frames.
 		 */
 		val = ANA_PORT_DROP_CFG_DROP_UNTAGGED_ENA |
 		      ANA_PORT_DROP_CFG_DROP_PRIO_S_TAGGED_ENA |
 		      ANA_PORT_DROP_CFG_DROP_PRIO_C_TAGGED_ENA;
-	else
-		val = 0;
 	ocelot_rmw_gix(ocelot, val,
 		       ANA_PORT_DROP_CFG_DROP_UNTAGGED_ENA |
 		       ANA_PORT_DROP_CFG_DROP_PRIO_S_TAGGED_ENA |
 		       ANA_PORT_DROP_CFG_DROP_PRIO_C_TAGGED_ENA,
 		       ANA_PORT_DROP_CFG, port);
-	if (vlan_aware) {
+	if (ocelot_port->vlan_aware) {
 		if (ocelot_port->vid)
 			/* Tag all frames except when VID == DEFAULT_VLAN */
-			val |= REW_TAG_CFG_TAG_CFG(1);
+			val = REW_TAG_CFG_TAG_CFG(1);
 		else
 			/* Tag all frames */
-			val |= REW_TAG_CFG_TAG_CFG(3);
+			val = REW_TAG_CFG_TAG_CFG(3);
 	} else {
 		/* Port tagging disabled. */
 		val = REW_TAG_CFG_TAG_CFG(0);
 	ocelot_rmw_gix(ocelot, val,
 		       REW_TAG_CFG_TAG_CFG_M,
 		       REW_TAG_CFG, port);
+	return 0;
 }
-EXPORT_SYMBOL(ocelot_port_vlan_filtering);
-static int ocelot_port_set_native_vlan(struct ocelot *ocelot, int port,
+void ocelot_port_vlan_filtering(struct ocelot *ocelot, int port,
-				       u16 vid)
+				bool vlan_aware)
 {
 	struct ocelot_port *ocelot_port = ocelot->ports[port];
+	u32 val;
-	if (ocelot_port->vid != vid) {
+	ocelot_port->vlan_aware = vlan_aware;
-		/* Always permit deleting the native VLAN (vid = 0) */
-		if (ocelot_port->vid && vid) {
-			dev_err(ocelot->dev,
-				"Port already has a native VLAN: %d\n",
-				ocelot_port->vid);
-			return -EBUSY;
-		}
-		ocelot_port->vid = vid;
-	}
-	ocelot_rmw_gix(ocelot, REW_PORT_VLAN_CFG_PORT_VID(vid),
+	if (vlan_aware)
-		       REW_PORT_VLAN_CFG_PORT_VID_M,
+		val = ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
-		       REW_PORT_VLAN_CFG, port);
+		      ANA_PORT_VLAN_CFG_VLAN_POP_CNT(1);
+	else
+		val = 0;
+	ocelot_rmw_gix(ocelot, val,
+		       ANA_PORT_VLAN_CFG_VLAN_AWARE_ENA |
+		       ANA_PORT_VLAN_CFG_VLAN_POP_CNT_M,
+		       ANA_PORT_VLAN_CFG, port);
-	return 0;
+	ocelot_port_set_native_vlan(ocelot, port, ocelot_port->vid);
 }
+EXPORT_SYMBOL(ocelot_port_vlan_filtering);
 /* Default vlan to clasify for untagged frames (may be zero) */
 static void ocelot_port_set_pvid(struct ocelot *ocelot, int port, u16 pvid)
 }
 int ocelot_fdb_add(struct ocelot *ocelot, int port,
-		   const unsigned char *addr, u16 vid, bool vlan_aware)
+		   const unsigned char *addr, u16 vid)
 {
 	struct ocelot_port *ocelot_port = ocelot->ports[port];
 	if (!vid) {
-		if (!vlan_aware)
+		if (!ocelot_port->vlan_aware)
 			/* If the bridge is not VLAN aware and no VID was
 			 * provided, set it to pvid to ensure the MAC entry
 			 * matches incoming untagged packets
 	struct ocelot *ocelot = priv->port.ocelot;
 	int port = priv->chip_port;
-	return ocelot_fdb_add(ocelot, port, addr, vid, priv->vlan_aware);
+	return ocelot_fdb_add(ocelot, port, addr, vid);
 }
 int ocelot_fdb_del(struct ocelot *ocelot, int port,
 		ocelot_port_attr_ageing_set(ocelot, port, attr->u.ageing_time);
 		break;
 	case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
-		priv->vlan_aware = attr->u.vlan_filtering;
+		ocelot_port_vlan_filtering(ocelot, port,
-		ocelot_port_vlan_filtering(ocelot, port, priv->vlan_aware);
+					   attr->u.vlan_filtering);
 		break;
 	case SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED:
 		ocelot_port_attr_mc_set(ocelot, port, !attr->u.mc_disabled);
 			} else {
 				err = ocelot_port_bridge_leave(ocelot, port,
 							       info->upper_dev);
-				priv->vlan_aware = false;
 			}
 		}
 		if (netif_is_lag_master(info->upper_dev)) {

drivers/net/ethernet/mscc/ocelot.h+0−2

@@ -56,8 +56,6 @@ struct ocelot_port_private { · 55 unmodified lines
56	struct phy_device *phy;	56	struct phy_device *phy;
57	u8 chip_port;	57	u8 chip_port;
58		58
59	u8 vlan_aware;
60
61	struct phy *serdes;	59	struct phy *serdes;
62		60
63	struct ocelot_port_tc tc;	61	struct ocelot_port_tc tc;

drivers/net/ethernet/neterion/s2io.c+1−1

@@ -5155,7 +5155,7 @@ static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr) · 5154 unmodified lines
5155	/* read mac entries from CAM */	5155	/* read mac entries from CAM */
5156	static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)	5156	static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
5157	{	5157	{
5158	u64 tmp64 = 0xffffffffffff0000ULL, val64;	5158	u64 tmp64, val64;
5159	struct XENA_dev_config __iomem *bar0 = sp->bar0;	5159	struct XENA_dev_config __iomem *bar0 = sp->bar0;
5160		5160
5161	/* read mac addr */	5161	/* read mac addr */

drivers/net/ethernet/pensando/ionic/ionic_lif.c+27−17

@@ -2127,6 +2127,8 @@ static void ionic_lif_handle_fw_up(struct ionic_lif *lif) · 2126 unmodified lines
2127	if (lif->registered)	2127	if (lif->registered)
2128	ionic_lif_set_netdev_info(lif);	2128	ionic_lif_set_netdev_info(lif);
2129		2129
		2130	ionic_rx_filter_replay(lif);
		2131
2130	if (netif_running(lif->netdev)) {	2132	if (netif_running(lif->netdev)) {
2131	err = ionic_txrx_alloc(lif);	2133	err = ionic_txrx_alloc(lif);
2132	if (err)	2134	if (err)
@@ -2206,9 +2208,9 @@ static void ionic_lif_deinit(struct ionic_lif *lif) · 73 unmodified lines
2206	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {	2208	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
2207	cancel_work_sync(&lif->deferred.work);	2209	cancel_work_sync(&lif->deferred.work);
2208	cancel_work_sync(&lif->tx_timeout_work);	2210	cancel_work_sync(&lif->tx_timeout_work);
		2211	ionic_rx_filters_deinit(lif);
2209	}	2212	}
2210		2213
2211	ionic_rx_filters_deinit(lif);
2212	if (lif->netdev->features & NETIF_F_RXHASH)	2214	if (lif->netdev->features & NETIF_F_RXHASH)
2213	ionic_lif_rss_deinit(lif);	2215	ionic_lif_rss_deinit(lif);
2214		2216
@@ -2339,24 +2341,30 @@ static int ionic_station_set(struct ionic_lif *lif) · 124 unmodified lines
2339	err = ionic_adminq_post_wait(lif, &ctx);	2341	err = ionic_adminq_post_wait(lif, &ctx);
2340	if (err)	2342	if (err)
2341	return err;	2343	return err;
2342		2344	netdev_dbg(lif->netdev, "found initial MAC addr %pM\n",
		2345	ctx.comp.lif_getattr.mac);
2343	if (is_zero_ether_addr(ctx.comp.lif_getattr.mac))	2346	if (is_zero_ether_addr(ctx.comp.lif_getattr.mac))
2344	return 0;	2347	return 0;
2345		2348
2346	memcpy(addr.sa_data, ctx.comp.lif_getattr.mac, netdev->addr_len);	2349	if (!ether_addr_equal(ctx.comp.lif_getattr.mac, netdev->dev_addr)) {
2347	addr.sa_family = AF_INET;	2350	memcpy(addr.sa_data, ctx.comp.lif_getattr.mac, netdev->addr_len);
2348	err = eth_prepare_mac_addr_change(netdev, &addr);	2351	addr.sa_family = AF_INET;
2349	if (err) {	2352	err = eth_prepare_mac_addr_change(netdev, &addr);
2350	netdev_warn(lif->netdev, "ignoring bad MAC addr from NIC %pM - err %d\n",	2353	if (err) {
2351	addr.sa_data, err);	2354	netdev_warn(lif->netdev, "ignoring bad MAC addr from NIC %pM - err %d\n",
2352	return 0;	2355	addr.sa_data, err);
2353	}	2356	return 0;
		2357	}
2354		2358
2355	netdev_dbg(lif->netdev, "deleting station MAC addr %pM\n",	2359	if (!is_zero_ether_addr(netdev->dev_addr)) {
2356	netdev->dev_addr);	2360	netdev_dbg(lif->netdev, "deleting station MAC addr %pM\n",
2357	ionic_lif_addr(lif, netdev->dev_addr, false);	2361	netdev->dev_addr);
		2362	ionic_lif_addr(lif, netdev->dev_addr, false);
		2363	}
		2364
		2365	eth_commit_mac_addr_change(netdev, &addr);
		2366	}
2358		2367
2359	eth_commit_mac_addr_change(netdev, &addr);
2360	netdev_dbg(lif->netdev, "adding station MAC addr %pM\n",	2368	netdev_dbg(lif->netdev, "adding station MAC addr %pM\n",
2361	netdev->dev_addr);	2369	netdev->dev_addr);
2362	ionic_lif_addr(lif, netdev->dev_addr, true);	2370	ionic_lif_addr(lif, netdev->dev_addr, true);
@@ -2421,9 +2429,11 @@ static int ionic_lif_init(struct ionic_lif *lif) · 58 unmodified lines
2421	if (err)	2429	if (err)
2422	goto err_out_notifyq_deinit;	2430	goto err_out_notifyq_deinit;
2423		2431
2424	err = ionic_rx_filters_init(lif);	2432	if (!test_bit(IONIC_LIF_F_FW_RESET, lif->state)) {
2425	if (err)	2433	err = ionic_rx_filters_init(lif);
2426	goto err_out_notifyq_deinit;	2434	if (err)
		2435	goto err_out_notifyq_deinit;
		2436	}
2427		2437
2428	err = ionic_station_set(lif);	2438	err = ionic_station_set(lif);
2429	if (err)	2439	if (err)

drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c+43−10

@@ -2,6 +2,7 @@ · 1 unmodified line
2	/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */	2	/* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3		3
4	#include <linux/netdevice.h>	4	#include <linux/netdevice.h>
		5	#include <linux/dynamic_debug.h>
5	#include <linux/etherdevice.h>	6	#include <linux/etherdevice.h>
6		7
7	#include "ionic.h"	8	#include "ionic.h"
@@ -17,17 +18,49 @@ void ionic_rx_filter_free(struct ionic_lif lif, struct ionic_rx_filter f) · 9 unmodified lines
17	devm_kfree(dev, f);	18	devm_kfree(dev, f);
18	}	19	}
19		20
20	int ionic_rx_filter_del(struct ionic_lif lif, struct ionic_rx_filter f)	21	void ionic_rx_filter_replay(struct ionic_lif *lif)
21	{	22	{
22	struct ionic_admin_ctx ctx = {	23	struct ionic_rx_filter_add_cmd *ac;
23	.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work),	24	struct ionic_admin_ctx ctx;
24	.cmd.rx_filter_del = {	25	struct ionic_rx_filter *f;
25	.opcode = IONIC_CMD_RX_FILTER_DEL,	26	struct hlist_head *head;
26	.filter_id = cpu_to_le32(f->filter_id),	27	struct hlist_node *tmp;
27	},	28	unsigned int i;
28	};	29	int err;
29		30
30	return ionic_adminq_post_wait(lif, &ctx);	31	ac = &ctx.cmd.rx_filter_add;
		32
		33	for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
		34	head = &lif->rx_filters.by_id[i];
		35	hlist_for_each_entry_safe(f, tmp, head, by_id) {
		36	ctx.work = COMPLETION_INITIALIZER_ONSTACK(ctx.work);
		37	memcpy(ac, &f->cmd, sizeof(f->cmd));
		38	dev_dbg(&lif->netdev->dev, "replay filter command:\n");
		39	dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
		40	&ctx.cmd, sizeof(ctx.cmd), true);
		41
		42	err = ionic_adminq_post_wait(lif, &ctx);
		43	if (err) {
		44	switch (le16_to_cpu(ac->match)) {
		45	case IONIC_RX_FILTER_MATCH_VLAN:
		46	netdev_info(lif->netdev, "Replay failed - %d: vlan %d\n",
		47	err,
		48	le16_to_cpu(ac->vlan.vlan));
		49	break;
		50	case IONIC_RX_FILTER_MATCH_MAC:
		51	netdev_info(lif->netdev, "Replay failed - %d: mac %pM\n",
		52	err, ac->mac.addr);
		53	break;
		54	case IONIC_RX_FILTER_MATCH_MAC_VLAN:
		55	netdev_info(lif->netdev, "Replay failed - %d: vlan %d mac %pM\n",
		56	err,
		57	le16_to_cpu(ac->vlan.vlan),
		58	ac->mac.addr);
		59	break;
		60	}
		61	}
		62	}
		63	}
31	}	64	}
32		65
33	int ionic_rx_filters_init(struct ionic_lif *lif)	66	int ionic_rx_filters_init(struct ionic_lif *lif)

drivers/net/ethernet/pensando/ionic/ionic_rx_filter.h+1−1

@@ -24,7 +24,7 @@ struct ionic_rx_filters { · 23 unmodified lines
24	};	24	};
25		25
26	void ionic_rx_filter_free(struct ionic_lif lif, struct ionic_rx_filter f);	26	void ionic_rx_filter_free(struct ionic_lif lif, struct ionic_rx_filter f);
27	int ionic_rx_filter_del(struct ionic_lif lif, struct ionic_rx_filter f);	27	void ionic_rx_filter_replay(struct ionic_lif *lif);
28	int ionic_rx_filters_init(struct ionic_lif *lif);	28	int ionic_rx_filters_init(struct ionic_lif *lif);
29	void ionic_rx_filters_deinit(struct ionic_lif *lif);	29	void ionic_rx_filters_deinit(struct ionic_lif *lif);
30	int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,	30	int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,

drivers/net/ethernet/sgi/meth.h+0−16

@@ -1,19 +1,3 @@
1
2	/*
3	* snull.h -- definitions for the network module
4	*
5	* Copyright (C) 2001 Alessandro Rubini and Jonathan Corbet
6	* Copyright (C) 2001 O'Reilly & Associates
7	*
8	* The source code in this file can be freely used, adapted,
9	* and redistributed in source or binary form, so long as an
10	* acknowledgment appears in derived source files. The citation
11	* should list that the code comes from the book "Linux Device
12	* Drivers" by Alessandro Rubini and Jonathan Corbet, published
13	* by O'Reilly & Associates. No warranty is attached;
14	* we cannot take responsibility for errors or fitness for use.
15	*/
16
17	/* version dependencies have been confined to a separate file */	1	/* version dependencies have been confined to a separate file */
18		2
19	/* Tunable parameters */	3	/* Tunable parameters */

drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c+189−0

@@ -5,8 +5,13 @@ · 4 unmodified lines
5	#include <linux/clk-provider.h>	5	#include <linux/clk-provider.h>
6	#include <linux/pci.h>	6	#include <linux/pci.h>
7	#include <linux/dmi.h>	7	#include <linux/dmi.h>
		8	#include "dwmac-intel.h"
8	#include "stmmac.h"	9	#include "stmmac.h"
9		10
		11	struct intel_priv_data {
		12	int mdio_adhoc_addr; /* mdio address for serdes & etc */
		13	};
		14
10	/* This struct is used to associate PCI Function of MAC controller on a board,	15	/* This struct is used to associate PCI Function of MAC controller on a board,
11	* discovered via DMI, with the address of PHY connected to the MAC. The	16	* discovered via DMI, with the address of PHY connected to the MAC. The
12	* negative value of the address means that MAC controller is not connected	17	* negative value of the address means that MAC controller is not connected
@@ -49,6 +54,172 @@ static int stmmac_pci_find_phy_addr(struct pci_dev *pdev, · 36 unmodified lines
49	return -ENODEV;	54	return -ENODEV;
50	}	55	}
51		56
		57	static int serdes_status_poll(struct stmmac_priv *priv, int phyaddr,
		58	int phyreg, u32 mask, u32 val)
		59	{
		60	unsigned int retries = 10;
		61	int val_rd;
		62
		63	do {
		64	val_rd = mdiobus_read(priv->mii, phyaddr, phyreg);
		65	if ((val_rd & mask) == (val & mask))
		66	return 0;
		67	udelay(POLL_DELAY_US);
		68	} while (--retries);
		69
		70	return -ETIMEDOUT;
		71	}
		72
		73	static int intel_serdes_powerup(struct net_device ndev, void priv_data)
		74	{
		75	struct intel_priv_data *intel_priv = priv_data;
		76	struct stmmac_priv *priv = netdev_priv(ndev);
		77	int serdes_phy_addr = 0;
		78	u32 data = 0;
		79
		80	if (!intel_priv->mdio_adhoc_addr)
		81	return 0;
		82
		83	serdes_phy_addr = intel_priv->mdio_adhoc_addr;
		84
		85	/* assert clk_req */
		86	data = mdiobus_read(priv->mii, serdes_phy_addr,
		87	SERDES_GCR0);
		88
		89	data \|= SERDES_PLL_CLK;
		90
		91	mdiobus_write(priv->mii, serdes_phy_addr,
		92	SERDES_GCR0, data);
		93
		94	/* check for clk_ack assertion */
		95	data = serdes_status_poll(priv, serdes_phy_addr,
		96	SERDES_GSR0,
		97	SERDES_PLL_CLK,
		98	SERDES_PLL_CLK);
		99
		100	if (data) {
		101	dev_err(priv->device, "Serdes PLL clk request timeout\n");
		102	return data;
		103	}
		104
		105	/* assert lane reset */
		106	data = mdiobus_read(priv->mii, serdes_phy_addr,
		107	SERDES_GCR0);
		108
		109	data \|= SERDES_RST;
		110
		111	mdiobus_write(priv->mii, serdes_phy_addr,
		112	SERDES_GCR0, data);
		113
		114	/* check for assert lane reset reflection */
		115	data = serdes_status_poll(priv, serdes_phy_addr,
		116	SERDES_GSR0,
		117	SERDES_RST,
		118	SERDES_RST);
		119
		120	if (data) {
		121	dev_err(priv->device, "Serdes assert lane reset timeout\n");
		122	return data;
		123	}
		124
		125	/* move power state to P0 */
		126	data = mdiobus_read(priv->mii, serdes_phy_addr,
		127	SERDES_GCR0);
		128
		129	data &= ~SERDES_PWR_ST_MASK;
		130	data \|= SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT;
		131
		132	mdiobus_write(priv->mii, serdes_phy_addr,
		133	SERDES_GCR0, data);
		134
		135	/* Check for P0 state */
		136	data = serdes_status_poll(priv, serdes_phy_addr,
		137	SERDES_GSR0,
		138	SERDES_PWR_ST_MASK,
		139	SERDES_PWR_ST_P0 << SERDES_PWR_ST_SHIFT);
		140
		141	if (data) {
		142	dev_err(priv->device, "Serdes power state P0 timeout.\n");
		143	return data;
		144	}
		145
		146	return 0;
		147	}
		148
		149	static void intel_serdes_powerdown(struct net_device ndev, void intel_data)
		150	{
		151	struct intel_priv_data *intel_priv = intel_data;
		152	struct stmmac_priv *priv = netdev_priv(ndev);
		153	int serdes_phy_addr = 0;
		154	u32 data = 0;
		155
		156	if (!intel_priv->mdio_adhoc_addr)
		157	return;
		158
		159	serdes_phy_addr = intel_priv->mdio_adhoc_addr;
		160
		161	/* move power state to P3 */
		162	data = mdiobus_read(priv->mii, serdes_phy_addr,
		163	SERDES_GCR0);
		164
		165	data &= ~SERDES_PWR_ST_MASK;
		166	data \|= SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT;
		167
		168	mdiobus_write(priv->mii, serdes_phy_addr,
		169	SERDES_GCR0, data);
		170
		171	/* Check for P3 state */
		172	data = serdes_status_poll(priv, serdes_phy_addr,
		173	SERDES_GSR0,
		174	SERDES_PWR_ST_MASK,
		175	SERDES_PWR_ST_P3 << SERDES_PWR_ST_SHIFT);
		176
		177	if (data) {
		178	dev_err(priv->device, "Serdes power state P3 timeout\n");
		179	return;
		180	}
		181
		182	/* de-assert clk_req */
		183	data = mdiobus_read(priv->mii, serdes_phy_addr,
		184	SERDES_GCR0);
		185
		186	data &= ~SERDES_PLL_CLK;
		187
		188	mdiobus_write(priv->mii, serdes_phy_addr,
		189	SERDES_GCR0, data);
		190
		191	/* check for clk_ack de-assert */
		192	data = serdes_status_poll(priv, serdes_phy_addr,
		193	SERDES_GSR0,
		194	SERDES_PLL_CLK,
		195	(u32)~SERDES_PLL_CLK);
		196
		197	if (data) {
		198	dev_err(priv->device, "Serdes PLL clk de-assert timeout\n");
		199	return;
		200	}
		201
		202	/* de-assert lane reset */
		203	data = mdiobus_read(priv->mii, serdes_phy_addr,
		204	SERDES_GCR0);
		205
		206	data &= ~SERDES_RST;
		207
		208	mdiobus_write(priv->mii, serdes_phy_addr,
		209	SERDES_GCR0, data);
		210
		211	/* check for de-assert lane reset reflection */
		212	data = serdes_status_poll(priv, serdes_phy_addr,
		213	SERDES_GSR0,
		214	SERDES_RST,
		215	(u32)~SERDES_RST);
		216
		217	if (data) {
		218	dev_err(priv->device, "Serdes de-assert lane reset timeout\n");
		219	return;
		220	}
		221	}
		222
52	static void common_default_data(struct plat_stmmacenet_data *plat)	223	static void common_default_data(struct plat_stmmacenet_data *plat)
53	{	224	{
54	plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */	225	plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
@@ -189,6 +360,9 @@ static int ehl_sgmii_data(struct pci_dev *pdev, · 134 unmodified lines
189	plat->phy_addr = 0;	360	plat->phy_addr = 0;
190	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	361	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
191		362
		363	plat->serdes_powerup = intel_serdes_powerup;
		364	plat->serdes_powerdown = intel_serdes_powerdown;
		365
192	return ehl_common_data(pdev, plat);	366	return ehl_common_data(pdev, plat);
193	}	367	}
194		368
@@ -233,6 +407,8 @@ static int ehl_pse0_sgmii1g_data(struct pci_dev *pdev, · 38 unmodified lines
233	struct plat_stmmacenet_data *plat)	407	struct plat_stmmacenet_data *plat)
234	{	408	{
235	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	409	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		410	plat->serdes_powerup = intel_serdes_powerup;
		411	plat->serdes_powerdown = intel_serdes_powerdown;
236	return ehl_pse0_common_data(pdev, plat);	412	return ehl_pse0_common_data(pdev, plat);
237	}	413	}
238		414
@@ -263,6 +439,8 @@ static int ehl_pse1_sgmii1g_data(struct pci_dev *pdev, · 24 unmodified lines
263	struct plat_stmmacenet_data *plat)	439	struct plat_stmmacenet_data *plat)
264	{	440	{
265	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	441	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		442	plat->serdes_powerup = intel_serdes_powerup;
		443	plat->serdes_powerdown = intel_serdes_powerdown;
266	return ehl_pse1_common_data(pdev, plat);	444	return ehl_pse1_common_data(pdev, plat);
267	}	445	}
268		446
@@ -291,6 +469,8 @@ static int tgl_sgmii_data(struct pci_dev *pdev, · 22 unmodified lines
291	plat->bus_id = 1;	469	plat->bus_id = 1;
292	plat->phy_addr = 0;	470	plat->phy_addr = 0;
293	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;	471	plat->phy_interface = PHY_INTERFACE_MODE_SGMII;
		472	plat->serdes_powerup = intel_serdes_powerup;
		473	plat->serdes_powerdown = intel_serdes_powerdown;
294	return tgl_common_data(pdev, plat);	474	return tgl_common_data(pdev, plat);
295	}	475	}
296		476
@@ -417,11 +597,17 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 120 unmodified lines
417	const struct pci_device_id *id)	597	const struct pci_device_id *id)
418	{	598	{
419	struct stmmac_pci_info info = (struct stmmac_pci_info )id->driver_data;	599	struct stmmac_pci_info info = (struct stmmac_pci_info )id->driver_data;
		600	struct intel_priv_data *intel_priv;
420	struct plat_stmmacenet_data *plat;	601	struct plat_stmmacenet_data *plat;
421	struct stmmac_resources res;	602	struct stmmac_resources res;
422	int i;	603	int i;
423	int ret;	604	int ret;
424		605
		606	intel_priv = devm_kzalloc(&pdev->dev, sizeof(*intel_priv),
		607	GFP_KERNEL);
		608	if (!intel_priv)
		609	return -ENOMEM;
		610
425	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);	611	plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
426	if (!plat)	612	if (!plat)
427	return -ENOMEM;	613	return -ENOMEM;
@@ -457,6 +643,9 @@ static int intel_eth_pci_probe(struct pci_dev *pdev, · 29 unmodified lines
457		643
458	pci_set_master(pdev);	644	pci_set_master(pdev);
459		645
		646	plat->bsp_priv = intel_priv;
		647	intel_priv->mdio_adhoc_addr = 0x15;
		648
460	ret = info->setup(pdev, plat);	649	ret = info->setup(pdev, plat);
461	if (ret)	650	if (ret)
462	return ret;	651	return ret;

drivers/net/ethernet/stmicro/stmmac/dwmac-intel.h+23−0

@@ -0,0 +1,23 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/* Copyright (c) 2020, Intel Corporation
	3	* DWMAC Intel header file
	4	*/
	5
	6	#ifndef __DWMAC_INTEL_H__
	7	#define __DWMAC_INTEL_H__
	8
	9	#define POLL_DELAY_US 8
	10
	11	/* SERDES Register */
	12	#define SERDES_GSR0 0x5 /* Global Status Reg0 */
	13	#define SERDES_GCR0 0xb /* Global Configuration Reg0 */
	14
	15	/* SERDES defines */
	16	#define SERDES_PLL_CLK BIT(0) /* PLL clk valid signal */
	17	#define SERDES_RST BIT(2) /* Serdes Reset */
	18	#define SERDES_PWR_ST_MASK GENMASK(6, 4) /* Serdes Power state*/
	19	#define SERDES_PWR_ST_SHIFT 4
	20	#define SERDES_PWR_ST_P0 0x0
	21	#define SERDES_PWR_ST_P3 0x3
	22
	23	#endif /* __DWMAC_INTEL_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c+1−0

@@ -119,6 +119,7 @@ static int meson8b_init_rgmii_tx_clk(struct meson8b_dwmac *dwmac) · 118 unmodified lines
119	{ .div = 5, .val = 5, },	119	{ .div = 5, .val = 5, },
120	{ .div = 6, .val = 6, },	120	{ .div = 6, .val = 6, },
121	{ .div = 7, .val = 7, },	121	{ .div = 7, .val = 7, },
		122	{ /* end of array */ }
122	};	123	};
123		124
124	clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL);	125	clk_configs = devm_kzalloc(dev, sizeof(*clk_configs), GFP_KERNEL);

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+8−3

 	switch (phymode) {
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_TXID:
 		*val = SYSMGR_EMACGRP_CTRL_PHYSEL_ENUM_RGMII;
 		break;
 	case PHY_INTERFACE_MODE_MII:
 	    phymode == PHY_INTERFACE_MODE_MII ||
 	    phymode == PHY_INTERFACE_MODE_GMII ||
 	    phymode == PHY_INTERFACE_MODE_SGMII) {
-		ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
 		regmap_read(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
 			    &module);
 		module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2));
 		regmap_write(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
 			     module);
-	} else {
-		ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2));
 	}
+	if (dwmac->f2h_ptp_ref_clk)
+		ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
+	else
+		ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK <<
+			  (reg_shift / 2));
 	regmap_write(sys_mgr_base_addr, reg_offset, ctrl);
 	/* Deassert reset for the phy configuration to be sampled by

drivers/net/ethernet/stmicro/stmmac/dwmac-sunxi.c+2−0

@@ -150,6 +150,8 @@ static int sun7i_gmac_probe(struct platform_device *pdev) · 149 unmodified lines
150	plat_dat->init = sun7i_gmac_init;	150	plat_dat->init = sun7i_gmac_init;
151	plat_dat->exit = sun7i_gmac_exit;	151	plat_dat->exit = sun7i_gmac_exit;
152	plat_dat->fix_mac_speed = sun7i_fix_speed;	152	plat_dat->fix_mac_speed = sun7i_fix_speed;
		153	plat_dat->tx_fifo_size = 4096;
		154	plat_dat->rx_fifo_size = 16384;
153		155
154	ret = sun7i_gmac_init(pdev, plat_dat->bsp_priv);	156	ret = sun7i_gmac_init(pdev, plat_dat->bsp_priv);
155	if (ret)	157	if (ret)

drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c+8−4

 	unsigned long data;
 	u32 reg_value;
-	/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
+	/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
-	 *	formula = (1/ptp_clock) * 1000000000
+	 * increment to twice the number of nanoseconds of a clock cycle.
-	 * where ptp_clock is 50MHz if fine method is used to update system
+	 * The calculation of the default_addend value by the caller will set it
+	 * to mid-range = 2^31 when the remainder of this division is zero,
+	 * which will make the accumulator overflow once every 2 ptp_clock
+	 * cycles, adding twice the number of nanoseconds of a clock cycle :
+	 * 2000000000ULL / ptp_clock.
 	 */
 	if (value & PTP_TCR_TSCFUPDT)
-		data = (1000000000ULL / 50000000);
+		data = (2000000000ULL / ptp_clock);
 	else
 		data = (1000000000ULL / ptp_clock);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+23−0

 		goto error_netdev_register;
 	}
+	if (priv->plat->serdes_powerup) {
+		ret = priv->plat->serdes_powerup(ndev,
+						 priv->plat->bsp_priv);
+		if (ret < 0)
+			return ret;
+	}
 #ifdef CONFIG_DEBUG_FS
 	stmmac_init_fs(ndev);
 #endif
 	stmmac_stop_all_dma(priv);
+	if (priv->plat->serdes_powerdown)
+		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);
 	stmmac_mac_set(priv, priv->ioaddr, false);
 	netif_carrier_off(ndev);
 	unregister_netdev(ndev);
 	/* Stop TX/RX DMA */
 	stmmac_stop_all_dma(priv);
+	if (priv->plat->serdes_powerdown)
+		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);
 	/* Enable Power down mode by programming the PMT regs */
 	if (device_may_wakeup(priv->device)) {
 		stmmac_pmt(priv, priv->hw, priv->wolopts);
 {
 	struct net_device *ndev = dev_get_drvdata(dev);
 	struct stmmac_priv *priv = netdev_priv(ndev);
+	int ret;
 	if (!netif_running(ndev))
 		return 0;
 			stmmac_mdio_reset(priv->mii);
 	}
+	if (priv->plat->serdes_powerup) {
+		ret = priv->plat->serdes_powerup(ndev,
+						 priv->plat->bsp_priv);
+		if (ret < 0)
+			return ret;
+	}
 	netif_device_attach(ndev);
 	mutex_lock(&priv->lock);

drivers/net/ethernet/ti/am65-cpsw-nuss.c+3−3

@@ -1372,7 +1372,7 @@ static int am65_cpsw_nuss_init_tx_chns(struct am65_cpsw_common *common) · 1371 unmodified lines
1372	err:	1372	err:
1373	i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);	1373	i = devm_add_action(dev, am65_cpsw_nuss_free_tx_chns, common);
1374	if (i) {	1374	if (i) {
1375	dev_err(dev, "failed to add free_tx_chns action %d", i);	1375	dev_err(dev, "Failed to add free_tx_chns action %d\n", i);
1376	return i;	1376	return i;
1377	}	1377	}
1378		1378
@@ -1481,7 +1481,7 @@ static int am65_cpsw_nuss_init_rx_chns(struct am65_cpsw_common *common) · 102 unmodified lines
1481	err:	1481	err:
1482	i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);	1482	i = devm_add_action(dev, am65_cpsw_nuss_free_rx_chns, common);
1483	if (i) {	1483	if (i) {
1484	dev_err(dev, "failed to add free_rx_chns action %d", i);	1484	dev_err(dev, "Failed to add free_rx_chns action %d\n", i);
1485	return i;	1485	return i;
1486	}	1486	}
1487		1487
@@ -1691,7 +1691,7 @@ static int am65_cpsw_nuss_init_ndev_2g(struct am65_cpsw_common *common) · 203 unmodified lines
1691	ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,	1691	ret = devm_add_action_or_reset(dev, am65_cpsw_pcpu_stats_free,
1692	ndev_priv->stats);	1692	ndev_priv->stats);
1693	if (ret) {	1693	if (ret) {
1694	dev_err(dev, "failed to add percpu stat free action %d", ret);	1694	dev_err(dev, "Failed to add percpu stat free action %d\n", ret);
1695	return ret;	1695	return ret;
1696	}	1696	}
1697		1697

drivers/net/ethernet/xscale/ixp4xx_eth.c+2−0

@@ -1387,6 +1387,8 @@ static int ixp4xx_eth_probe(struct platform_device *pdev) · 1386 unmodified lines
1387	return -ENODEV;	1387	return -ENODEV;
1388	regs_phys = res->start;	1388	regs_phys = res->start;
1389	port->regs = devm_ioremap_resource(dev, res);	1389	port->regs = devm_ioremap_resource(dev, res);
		1390	if (IS_ERR(port->regs))
		1391	return PTR_ERR(port->regs);
1390		1392
1391	switch (port->id) {	1393	switch (port->id) {
1392	case IXP4XX_ETH_NPEA:	1394	case IXP4XX_ETH_NPEA:

drivers/net/geneve.c+1−1

@@ -1207,7 +1207,7 @@ static int geneve_validate(struct nlattr tb[], struct nlattr data[], · 1206 unmodified lines
1207	enum ifla_geneve_df df = nla_get_u8(data[IFLA_GENEVE_DF]);	1207	enum ifla_geneve_df df = nla_get_u8(data[IFLA_GENEVE_DF]);
1208		1208
1209	if (df < 0 \|\| df > GENEVE_DF_MAX) {	1209	if (df < 0 \|\| df > GENEVE_DF_MAX) {
1210	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_GENEVE_DF],	1210	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_GENEVE_DF],
1211	"Invalid DF attribute");	1211	"Invalid DF attribute");
1212	return -EINVAL;	1212	return -EINVAL;
1213	}	1213	}

drivers/net/ipa/ipa_modem.c+2−3

 	ret = ipa_endpoint_modem_exception_reset_all(ipa);
 	if (ret)
-		dev_err(dev, "error %d resetting exception endpoint",
+		dev_err(dev, "error %d resetting exception endpoint\n", ret);
-			ret);
 	ipa_endpoint_modem_pause_all(ipa, false);
 	ret = ipa_modem_stop(ipa);
 	if (ret)
-		dev_err(dev, "error %d stopping modem", ret);
+		dev_err(dev, "error %d stopping modem\n", ret);
 	/* Now prepare for the next modem boot */
 	ret = ipa_mem_zero_modem(ipa);

drivers/net/macsec.c+9−5

 			     struct netlink_ext_ack *extack)
 {
 	struct macsec_dev *macsec = macsec_priv(dev);
-	struct macsec_tx_sa tx_sc;
+	struct macsec_tx_sc tx_sc;
 	struct macsec_secy secy;
 	int ret;
 			  struct netlink_ext_ack *extack)
 {
 	struct macsec_dev *macsec = macsec_priv(dev);
+	rx_handler_func_t *rx_handler;
+	u8 icv_len = DEFAULT_ICV_LEN;
 	struct net_device *real_dev;
-	int err;
+	int err, mtu;
 	sci_t sci;
-	u8 icv_len = DEFAULT_ICV_LEN;
-	rx_handler_func_t *rx_handler;
 	if (!tb[IFLA_LINK])
 		return -EINVAL;
 	if (data && data[IFLA_MACSEC_ICV_LEN])
 		icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
-	dev->mtu = real_dev->mtu - icv_len - macsec_extra_len(true);
+	mtu = real_dev->mtu - icv_len - macsec_extra_len(true);
+	if (mtu < 0)
+		dev->mtu = 0;
+	else
+		dev->mtu = mtu;
 	rx_handler = rtnl_dereference(real_dev->rx_handler);
 	if (rx_handler && rx_handler != macsec_handle_frame)

drivers/net/macvlan.c+1−1

@@ -1704,7 +1704,7 @@ static int macvlan_device_event(struct notifier_block *unused, · 1703 unmodified lines
1704	struct macvlan_dev,	1704	struct macvlan_dev,
1705	list);	1705	list);
1706		1706
1707	if (macvlan_sync_address(vlan->dev, dev->dev_addr))	1707	if (vlan && macvlan_sync_address(vlan->dev, dev->dev_addr))
1708	return NOTIFY_BAD;	1708	return NOTIFY_BAD;
1709		1709
1710	break;	1710	break;

drivers/net/phy/bcm84881.c+3−3

 	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
 		phydev->link = false;
-	if (!phydev->link)
-		return 0;
 	linkmode_zero(phydev->lp_advertising);
 	phydev->speed = SPEED_UNKNOWN;
 	phydev->duplex = DUPLEX_UNKNOWN;
 	phydev->asym_pause = 0;
 	phydev->mdix = 0;
+	if (!phydev->link)
+		return 0;
 	if (phydev->autoneg_complete) {
 		val = genphy_c45_read_lpa(phydev);
 		if (val < 0)

drivers/net/phy/marvell.c+24−22

 	int lpa;
 	int err;
+	if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
+		phydev->link = 0;
+		return 0;
+	}
+	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
+		phydev->duplex = DUPLEX_FULL;
+	else
+		phydev->duplex = DUPLEX_HALF;
+	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
+	case MII_M1011_PHY_STATUS_1000:
+		phydev->speed = SPEED_1000;
+		break;
+	case MII_M1011_PHY_STATUS_100:
+		phydev->speed = SPEED_100;
+		break;
+	default:
+		phydev->speed = SPEED_10;
+		break;
+	}
 	if (!fiber) {
 		err = genphy_read_lpa(phydev);
 		if (err < 0)
 		}
 	}
-	if (!(status & MII_M1011_PHY_STATUS_RESOLVED))
-		return 0;
-	if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
-		phydev->duplex = DUPLEX_FULL;
-	else
-		phydev->duplex = DUPLEX_HALF;
-	switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
-	case MII_M1011_PHY_STATUS_1000:
-		phydev->speed = SPEED_1000;
-		break;
-	case MII_M1011_PHY_STATUS_100:
-		phydev->speed = SPEED_100;
-		break;
-	default:
-		phydev->speed = SPEED_10;
-		break;
-	}
 	return 0;
 }

drivers/net/phy/marvell10g.c+34−3

 #define MV_PHY_ALASKA_NBT_QUIRK_REV	(MARVELL_PHY_ID_88X3310 | 0xa)
 enum {
+	MV_PMA_FW_VER0		= 0xc011,
+	MV_PMA_FW_VER1		= 0xc012,
 	MV_PMA_BOOT		= 0xc050,
 	MV_PMA_BOOT_FATAL	= BIT(0),
 	/* Vendor2 MMD registers */
 	MV_V2_PORT_CTRL		= 0xf001,
-	MV_V2_PORT_CTRL_PWRDOWN = 0x0800,
+	MV_V2_PORT_CTRL_SWRST	= BIT(15),
+	MV_V2_PORT_CTRL_PWRDOWN = BIT(11),
 	MV_V2_TEMP_CTRL		= 0xf08a,
 	MV_V2_TEMP_CTRL_MASK	= 0xc000,
 	MV_V2_TEMP_CTRL_SAMPLE	= 0x0000,
 };
 struct mv3310_priv {
+	u32 firmware_ver;
 	struct device *hwmon_dev;
 	char *hwmon_name;
 };
 static int mv3310_power_up(struct phy_device *phydev)
 {
-	return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
+	struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
-				  MV_V2_PORT_CTRL_PWRDOWN);
+	int ret;
+	ret = phy_clear_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
+				 MV_V2_PORT_CTRL_PWRDOWN);
+	if (phydev->drv->phy_id != MARVELL_PHY_ID_88X3310 ||
+	    priv->firmware_ver < 0x00030000)
+		return ret;
+	return phy_set_bits_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL,
+				MV_V2_PORT_CTRL_SWRST);
 }
 static int mv3310_reset(struct phy_device *phydev, u32 unit)
 	dev_set_drvdata(&phydev->mdio.dev, priv);
+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0);
+	if (ret < 0)
+		return ret;
+	priv->firmware_ver = ret << 16;
+	ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER1);
+	if (ret < 0)
+		return ret;
+	priv->firmware_ver |= ret;
+	phydev_info(phydev, "Firmware version %u.%u.%u.%u\n",
+		    priv->firmware_ver >> 24, (priv->firmware_ver >> 16) & 255,
+		    (priv->firmware_ver >> 8) & 255, priv->firmware_ver & 255);
 	/* Powering down the port when not in use saves about 600mW */
 	ret = mv3310_power_down(phydev);
 	if (ret)

drivers/net/phy/mdio_bus.c+1−1

@@ -464,7 +464,7 @@ static struct class mdio_bus_class = { · 463 unmodified lines
464		464
465	/**	465	/**
466	* mdio_find_bus - Given the name of a mdiobus, find the mii_bus.	466	* mdio_find_bus - Given the name of a mdiobus, find the mii_bus.
467	* @mdio_bus_np: Pointer to the mii_bus.	467	* @mdio_name: The name of a mdiobus.
468	*	468	*
469	* Returns a reference to the mii_bus, or NULL if none found. The	469	* Returns a reference to the mii_bus, or NULL if none found. The
470	* embedded struct device will have its reference count incremented,	470	* embedded struct device will have its reference count incremented,

drivers/net/phy/micrel.c+1−1

@@ -1204,7 +1204,7 @@ static struct phy_driver ksphy_driver[] = { · 1203 unmodified lines
1204	.driver_data = &ksz9021_type,	1204	.driver_data = &ksz9021_type,
1205	.probe = kszphy_probe,	1205	.probe = kszphy_probe,
1206	.config_init = ksz9131_config_init,	1206	.config_init = ksz9131_config_init,
1207	.read_status = ksz9031_read_status,	1207	.read_status = genphy_read_status,
1208	.ack_interrupt = kszphy_ack_interrupt,	1208	.ack_interrupt = kszphy_ack_interrupt,
1209	.config_intr = kszphy_config_intr,	1209	.config_intr = kszphy_config_intr,
1210	.get_sset_count = kszphy_get_sset_count,	1210	.get_sset_count = kszphy_get_sset_count,

drivers/net/phy/microchip_t1.c+171−0

@@ -3,9 +3,21 @@ · 2 unmodified lines
3		3
4	#include <linux/kernel.h>	4	#include <linux/kernel.h>
5	#include <linux/module.h>	5	#include <linux/module.h>
		6	#include <linux/delay.h>
6	#include <linux/mii.h>	7	#include <linux/mii.h>
7	#include <linux/phy.h>	8	#include <linux/phy.h>
8		9
		10	/* External Register Control Register */
		11	#define LAN87XX_EXT_REG_CTL (0x14)
		12	#define LAN87XX_EXT_REG_CTL_RD_CTL (0x1000)
		13	#define LAN87XX_EXT_REG_CTL_WR_CTL (0x0800)
		14
		15	/* External Register Read Data Register */
		16	#define LAN87XX_EXT_REG_RD_DATA (0x15)
		17
		18	/* External Register Write Data Register */
		19	#define LAN87XX_EXT_REG_WR_DATA (0x16)
		20
9	/* Interrupt Source Register */	21	/* Interrupt Source Register */
10	#define LAN87XX_INTERRUPT_SOURCE (0x18)	22	#define LAN87XX_INTERRUPT_SOURCE (0x18)
11		23
@@ -14,9 +26,160 @@ · 2 unmodified lines
14	#define LAN87XX_MASK_LINK_UP (0x0004)	26	#define LAN87XX_MASK_LINK_UP (0x0004)
15	#define LAN87XX_MASK_LINK_DOWN (0x0002)	27	#define LAN87XX_MASK_LINK_DOWN (0x0002)
16		28
		29	/* phyaccess nested types */
		30	#define PHYACC_ATTR_MODE_READ 0
		31	#define PHYACC_ATTR_MODE_WRITE 1
		32	#define PHYACC_ATTR_MODE_MODIFY 2
		33
		34	#define PHYACC_ATTR_BANK_SMI 0
		35	#define PHYACC_ATTR_BANK_MISC 1
		36	#define PHYACC_ATTR_BANK_PCS 2
		37	#define PHYACC_ATTR_BANK_AFE 3
		38	#define PHYACC_ATTR_BANK_MAX 7
		39
17	#define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>"	40	#define DRIVER_AUTHOR "Nisar Sayed <nisar.sayed@microchip.com>"
18	#define DRIVER_DESC "Microchip LAN87XX T1 PHY driver"	41	#define DRIVER_DESC "Microchip LAN87XX T1 PHY driver"
19		42
		43	struct access_ereg_val {
		44	u8 mode;
		45	u8 bank;
		46	u8 offset;
		47	u16 val;
		48	u16 mask;
		49	};
		50
		51	static int access_ereg(struct phy_device *phydev, u8 mode, u8 bank,
		52	u8 offset, u16 val)
		53	{
		54	u16 ereg = 0;
		55	int rc = 0;
		56
		57	if (mode > PHYACC_ATTR_MODE_WRITE \|\| bank > PHYACC_ATTR_BANK_MAX)
		58	return -EINVAL;
		59
		60	if (bank == PHYACC_ATTR_BANK_SMI) {
		61	if (mode == PHYACC_ATTR_MODE_WRITE)
		62	rc = phy_write(phydev, offset, val);
		63	else
		64	rc = phy_read(phydev, offset);
		65	return rc;
		66	}
		67
		68	if (mode == PHYACC_ATTR_MODE_WRITE) {
		69	ereg = LAN87XX_EXT_REG_CTL_WR_CTL;
		70	rc = phy_write(phydev, LAN87XX_EXT_REG_WR_DATA, val);
		71	if (rc < 0)
		72	return rc;
		73	} else {
		74	ereg = LAN87XX_EXT_REG_CTL_RD_CTL;
		75	}
		76
		77	ereg \|= (bank << 8) \| offset;
		78
		79	rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg);
		80	if (rc < 0)
		81	return rc;
		82
		83	if (mode == PHYACC_ATTR_MODE_READ)
		84	rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA);
		85
		86	return rc;
		87	}
		88
		89	static int access_ereg_modify_changed(struct phy_device *phydev,
		90	u8 bank, u8 offset, u16 val, u16 mask)
		91	{
		92	int new = 0, rc = 0;
		93
		94	if (bank > PHYACC_ATTR_BANK_MAX)
		95	return -EINVAL;
		96
		97	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val);
		98	if (rc < 0)
		99	return rc;
		100
		101	new = val \| (rc & (mask ^ 0xFFFF));
		102	rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new);
		103
		104	return rc;
		105	}
		106
		107	static int lan87xx_phy_init(struct phy_device *phydev)
		108	{
		109	static const struct access_ereg_val init[] = {
		110	/* TX Amplitude = 5 */
		111	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_AFE, 0x0B,
		112	0x000A, 0x001E},
		113	/* Clear SMI interrupts */
		114	{PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI, 0x18,
		115	0, 0},
		116	/* Clear MISC interrupts */
		117	{PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_MISC, 0x08,
		118	0, 0},
		119	/* Turn on TC10 Ring Oscillator (ROSC) */
		120	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_MISC, 0x20,
		121	0x0020, 0x0020},
		122	/* WUR Detect Length to 1.2uS, LPC Detect Length to 1.09uS */
		123	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_PCS, 0x20,
		124	0x283C, 0},
		125	/* Wake_In Debounce Length to 39uS, Wake_Out Length to 79uS */
		126	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x21,
		127	0x274F, 0},
		128	/* Enable Auto Wake Forward to Wake_Out, ROSC on, Sleep,
		129	* and Wake_In to wake PHY
		130	*/
		131	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x20,
		132	0x80A7, 0},
		133	/* Enable WUP Auto Fwd, Enable Wake on MDI, Wakeup Debouncer
		134	* to 128 uS
		135	*/
		136	{PHYACC_ATTR_MODE_WRITE, PHYACC_ATTR_BANK_MISC, 0x24,
		137	0xF110, 0},
		138	/* Enable HW Init */
		139	{PHYACC_ATTR_MODE_MODIFY, PHYACC_ATTR_BANK_SMI, 0x1A,
		140	0x0100, 0x0100},
		141	};
		142	int rc, i;
		143
		144	/* Start manual initialization procedures in Managed Mode */
		145	rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
		146	0x1a, 0x0000, 0x0100);
		147	if (rc < 0)
		148	return rc;
		149
		150	/* Soft Reset the SMI block */
		151	rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI,
		152	0x00, 0x8000, 0x8000);
		153	if (rc < 0)
		154	return rc;
		155
		156	/* Check to see if the self-clearing bit is cleared */
		157	usleep_range(1000, 2000);
		158	rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ,
		159	PHYACC_ATTR_BANK_SMI, 0x00, 0);
		160	if (rc < 0)
		161	return rc;
		162	if ((rc & 0x8000) != 0)
		163	return -ETIMEDOUT;
		164
		165	/* PHY Initialization */
		166	for (i = 0; i < ARRAY_SIZE(init); i++) {
		167	if (init[i].mode == PHYACC_ATTR_MODE_MODIFY) {
		168	rc = access_ereg_modify_changed(phydev, init[i].bank,
		169	init[i].offset,
		170	init[i].val,
		171	init[i].mask);
		172	} else {
		173	rc = access_ereg(phydev, init[i].mode, init[i].bank,
		174	init[i].offset, init[i].val);
		175	}
		176	if (rc < 0)
		177	return rc;
		178	}
		179
		180	return 0;
		181	}
		182
20	static int lan87xx_phy_config_intr(struct phy_device *phydev)	183	static int lan87xx_phy_config_intr(struct phy_device *phydev)
21	{	184	{
22	int rc, val = 0;	185	int rc, val = 0;
@@ -40,6 +203,13 @@ static int lan87xx_phy_ack_interrupt(struct phy_device *phydev) · 17 unmodified lines
40	return rc < 0 ? rc : 0;	203	return rc < 0 ? rc : 0;
41	}	204	}
42		205
		206	static int lan87xx_config_init(struct phy_device *phydev)
		207	{
		208	int rc = lan87xx_phy_init(phydev);
		209
		210	return rc < 0 ? rc : 0;
		211	}
		212
43	static struct phy_driver microchip_t1_phy_driver[] = {	213	static struct phy_driver microchip_t1_phy_driver[] = {
44	{	214	{
45	.phy_id = 0x0007c150,	215	.phy_id = 0x0007c150,
@@ -48,6 +218,7 @@ static struct phy_driver microchip_t1_phy_driver[] = { · 2 unmodified lines
48		218
49	.features = PHY_BASIC_T1_FEATURES,	219	.features = PHY_BASIC_T1_FEATURES,
50		220
		221	.config_init = lan87xx_config_init,
51	.config_aneg = genphy_config_aneg,	222	.config_aneg = genphy_config_aneg,
52		223
53	.ack_interrupt = lan87xx_phy_ack_interrupt,	224	.ack_interrupt = lan87xx_phy_ack_interrupt,

drivers/net/team/team.c+4−0

 	struct team_mode_item *mitem;
 	const struct team_mode *mode = NULL;
+	if (!try_module_get(THIS_MODULE))
+		return NULL;
 	spin_lock(&mode_list_lock);
 	mitem = __find_mode(kind);
 	if (!mitem) {
 	}
 	spin_unlock(&mode_list_lock);
+	module_put(THIS_MODULE);
 	return mode;
 }

drivers/net/tun.c+2−1

 	skb_reset_network_header(skb);
 	skb_probe_transport_header(skb);
+	skb_record_rx_queue(skb, tfile->queue_index);
 	if (skb_xdp) {
 		struct bpf_prog *xdp_prog;
 	skb->protocol = eth_type_trans(skb, tun->dev);
 	skb_reset_network_header(skb);
 	skb_probe_transport_header(skb);
+	skb_record_rx_queue(skb, tfile->queue_index);
 	if (skb_xdp) {
 		err = do_xdp_generic(xdp_prog, skb);
 	    !tfile->detached)
 		rxhash = __skb_get_hash_symmetric(skb);
-	skb_record_rx_queue(skb, tfile->queue_index);
 	netif_receive_skb(skb);
 	/* No need for get_cpu_ptr() here since this function is

drivers/net/vrf.c+6−4

 	fl6.flowi6_proto = iph->nexthdr;
 	fl6.flowi6_flags = FLOWI_FLAG_SKIP_NH_OIF;
-	dst = ip6_route_output(net, NULL, &fl6);
+	dst = ip6_dst_lookup_flow(net, NULL, &fl6, NULL);
-	if (dst == dst_null)
+	if (IS_ERR(dst) || dst == dst_null)
 		goto err;
 	skb_dst_drop(skb);
 	if (rt6_need_strict(&ipv6_hdr(skb)->daddr))
 		return skb;
-	if (qdisc_tx_is_default(vrf_dev))
+	if (qdisc_tx_is_default(vrf_dev) ||
+	    IP6CB(skb)->flags & IP6SKB_XFRM_TRANSFORMED)
 		return vrf_ip6_out_direct(vrf_dev, sk, skb);
 	return vrf_ip6_out_redirect(vrf_dev, skb);
 	    ipv4_is_lbcast(ip_hdr(skb)->daddr))
 		return skb;
-	if (qdisc_tx_is_default(vrf_dev))
+	if (qdisc_tx_is_default(vrf_dev) ||
+	    IPCB(skb)->flags & IPSKB_XFRM_TRANSFORMED)
 		return vrf_ip_out_direct(vrf_dev, sk, skb);
 	return vrf_ip_out_redirect(vrf_dev, skb);

drivers/net/vxlan.c+3−3

@@ -3144,7 +3144,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 3143 unmodified lines
3144	u32 id = nla_get_u32(data[IFLA_VXLAN_ID]);	3144	u32 id = nla_get_u32(data[IFLA_VXLAN_ID]);
3145		3145
3146	if (id >= VXLAN_N_VID) {	3146	if (id >= VXLAN_N_VID) {
3147	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_ID],	3147	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_ID],
3148	"VXLAN ID must be lower than 16777216");	3148	"VXLAN ID must be lower than 16777216");
3149	return -ERANGE;	3149	return -ERANGE;
3150	}	3150	}
@@ -3155,7 +3155,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 4 unmodified lines
3155	= nla_data(data[IFLA_VXLAN_PORT_RANGE]);	3155	= nla_data(data[IFLA_VXLAN_PORT_RANGE]);
3156		3156
3157	if (ntohs(p->high) < ntohs(p->low)) {	3157	if (ntohs(p->high) < ntohs(p->low)) {
3158	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_PORT_RANGE],	3158	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_PORT_RANGE],
3159	"Invalid source port range");	3159	"Invalid source port range");
3160	return -EINVAL;	3160	return -EINVAL;
3161	}	3161	}
@@ -3165,7 +3165,7 @@ static int vxlan_validate(struct nlattr tb[], struct nlattr data[], · 3 unmodified lines
3165	enum ifla_vxlan_df df = nla_get_u8(data[IFLA_VXLAN_DF]);	3165	enum ifla_vxlan_df df = nla_get_u8(data[IFLA_VXLAN_DF]);
3166		3166
3167	if (df < 0 \|\| df > VXLAN_DF_MAX) {	3167	if (df < 0 \|\| df > VXLAN_DF_MAX) {
3168	NL_SET_ERR_MSG_ATTR(extack, tb[IFLA_VXLAN_DF],	3168	NL_SET_ERR_MSG_ATTR(extack, data[IFLA_VXLAN_DF],
3169	"Invalid DF attribute");	3169	"Invalid DF attribute");
3170	return -EINVAL;	3170	return -EINVAL;
3171	}	3171	}

drivers/net/wimax/i2400m/usb-fw.c+1−0

@@ -354,6 +354,7 @@ out: · 353 unmodified lines
354	usb_autopm_put_interface(i2400mu->usb_iface);	354	usb_autopm_put_interface(i2400mu->usb_iface);
355	d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",	355	d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",
356	i2400m, ack, ack_size, (long) result);	356	i2400m, ack, ack_size, (long) result);
		357	usb_put_urb(&notif_urb);
357	return result;	358	return result;
358		359
359	error_exceeded:	360	error_exceeded:

drivers/net/wireless/ath/ath11k/thermal.h+2−1

 	return 0;
 }
-static inline void ath11k_thermal_unregister(struct ath11k *ar)
+static inline void ath11k_thermal_unregister(struct ath11k_base *sc)
 {
 }
 static inline int ath11k_thermal_set_throttling(struct ath11k *ar, u32 throttle_state)
 {
+	return 0;
 }
 static inline void ath11k_thermal_event_temperature(struct ath11k *ar,

drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c+9−0

 	return err;
 }
+static netdev_tx_t brcmf_net_mon_start_xmit(struct sk_buff *skb,
+					    struct net_device *ndev)
+{
+	dev_kfree_skb_any(skb);
+	return NETDEV_TX_OK;
+}
 static const struct net_device_ops brcmf_netdev_ops_mon = {
 	.ndo_open = brcmf_net_mon_open,
 	.ndo_stop = brcmf_net_mon_stop,
+	.ndo_start_xmit = brcmf_net_mon_start_xmit,
 };
 int brcmf_net_mon_attach(struct brcmf_if *ifp)

drivers/net/wireless/intel/iwlegacy/3945-rs.c+1−1

@@ -374,7 +374,7 @@ out: · 373 unmodified lines
374	}	374	}
375		375
376	static void *	376	static void *
377	il3945_rs_alloc(struct ieee80211_hw hw, struct dentry debugfsdir)	377	il3945_rs_alloc(struct ieee80211_hw *hw)
378	{	378	{
379	return hw->priv;	379	return hw->priv;
380	}	380	}

drivers/net/wireless/intel/iwlegacy/4965-rs.c+1−1

@@ -2474,7 +2474,7 @@ il4965_rs_fill_link_cmd(struct il_priv il, struct il_lq_sta lq_sta, · 2473 unmodified lines
2474	}	2474	}
2475		2475
2476	static void *	2476	static void *
2477	il4965_rs_alloc(struct ieee80211_hw hw, struct dentry debugfsdir)	2477	il4965_rs_alloc(struct ieee80211_hw *hw)
2478	{	2478	{
2479	return hw->priv;	2479	return hw->priv;
2480	}	2480	}

drivers/net/wireless/intel/iwlwifi/dvm/rs.c+1−1

@@ -3019,7 +3019,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv, · 3018 unmodified lines
3019	cpu_to_le16(priv->lib->bt_params->agg_time_limit);	3019	cpu_to_le16(priv->lib->bt_params->agg_time_limit);
3020	}	3020	}
3021		3021
3022	static void rs_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	3022	static void rs_alloc(struct ieee80211_hw hw)
3023	{	3023	{
3024	return hw->priv;	3024	return hw->priv;
3025	}	3025	}

drivers/net/wireless/intel/iwlwifi/fw/acpi.c+7−2

 		if (!prof->enabled) {
 			IWL_DEBUG_RADIO(fwrt, "SAR profile %d is disabled.\n",
 					profs[i]);
-			/* if one of the profiles is disabled, we fail all */
+			/*
-			return -ENOENT;
+			 * if one of the profiles is disabled, we
+			 * ignore all of them and return 1 to
+			 * differentiate disabled from other failures.
+			 */
+			return 1;
 		}
 		IWL_DEBUG_INFO(fwrt,
 			       "SAR EWRD: chain %d profile index %d\n",
 			       i, profs[i]);

drivers/net/wireless/intel/iwlwifi/fw/api/txq.h+3−3

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+1−1

@@ -1467,7 +1467,7 @@ static void iwl_req_fw_callback(const struct firmware ucode_raw, void context) · 1466 unmodified lines
1467	kmemdup(pieces->dbg_conf_tlv[i],	1467	kmemdup(pieces->dbg_conf_tlv[i],
1468	pieces->dbg_conf_tlv_len[i],	1468	pieces->dbg_conf_tlv_len[i],
1469	GFP_KERNEL);	1469	GFP_KERNEL);
1470	if (!pieces->dbg_conf_tlv[i])	1470	if (!drv->fw.dbg.conf_tlv[i])
1471	goto out_free_fw;	1471	goto out_free_fw;
1472	}	1472	}
1473	}	1473	}

drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c+2−4

 					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 				.mac_cap_info[2] =
-					IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP |
+					IEEE80211_HE_MAC_CAP2_32BIT_BA_BITMAP,
-					IEEE80211_HE_MAC_CAP2_ACK_EN,
 				.mac_cap_info[3] =
 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,
 					IEEE80211_HE_MAC_CAP1_TF_MAC_PAD_DUR_16US |
 					IEEE80211_HE_MAC_CAP1_MULTI_TID_AGG_RX_QOS_8,
 				.mac_cap_info[2] =
-					IEEE80211_HE_MAC_CAP2_BSR |
+					IEEE80211_HE_MAC_CAP2_BSR,
-					IEEE80211_HE_MAC_CAP2_ACK_EN,
 				.mac_cap_info[3] =
 					IEEE80211_HE_MAC_CAP3_OMI_CONTROL |
 					IEEE80211_HE_MAC_CAP3_MAX_AMPDU_LEN_EXP_VHT_2,

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+11−14

 		struct iwl_dev_tx_power_cmd_v4 v4;
 	} cmd;
+	int ret;
 	u16 len = 0;
 	cmd.v5.v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS);
 		len = sizeof(cmd.v4.v3);
-	if (iwl_sar_select_profile(&mvm->fwrt, cmd.v5.v3.per_chain_restriction,
+	ret = iwl_sar_select_profile(&mvm->fwrt,
-				   prof_a, prof_b))
+				     cmd.v5.v3.per_chain_restriction,
-		return -ENOENT;
+				     prof_a, prof_b);
+	/* return on error or if the profile is disabled (positive number) */
+	if (ret)
+		return ret;
 	IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
 }
 				"EWRD SAR BIOS table invalid or unavailable. (%d)\n",
 				ret);
-	ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
+	return iwl_mvm_sar_select_profile(mvm, 1, 1);
-	/*
-	 * If we don't have profile 0 from BIOS, just skip it.  This
-	 * means that SAR Geo will not be enabled either, even if we
-	 * have other valid profiles.
-	 */
-	if (ret == -ENOENT)
-		return 1;
-	return ret;
 }
 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
 	ret = iwl_mvm_sar_init(mvm);
 	if (ret == 0) {
 		ret = iwl_mvm_sar_geo_init(mvm);
-	} else if (ret > 0 && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
+	} else if (ret == -ENOENT && !iwl_sar_get_wgds_table(&mvm->fwrt)) {
 		/*
 		 * If basic SAR is not available, we check for WGDS,
 		 * which should *not* be available either.  If it is

drivers/net/wireless/intel/iwlwifi/mvm/rs.c+1−1

@@ -3665,7 +3665,7 @@ static void rs_fill_lq_cmd(struct iwl_mvm *mvm, · 3664 unmodified lines
3665	cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta));	3665	cpu_to_le16(iwl_mvm_coex_agg_time_limit(mvm, sta));
3666	}	3666	}
3667		3667
3668	static void rs_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	3668	static void rs_alloc(struct ieee80211_hw hw)
3669	{	3669	{
3670	return hw->priv;	3670	return hw->priv;
3671	}	3671	}

drivers/net/wireless/intel/iwlwifi/mvm/rx.c+11−2

  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of version 2 of the GNU General Public License as
  * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 - 2019 Intel Corporation
+ * Copyright(c) 2018 - 2020 Intel Corporation
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
 struct iwl_mvm_stat_data {
 	struct iwl_mvm *mvm;
+	__le32 flags;
 	__le32 mac_id;
 	u8 beacon_filter_average_energy;
 	void *general;
 			-general->beacon_average_energy[vif_id];
 	}
+	/* make sure that beacon statistics don't go backwards with TCM
+	 * request to clear statistics
+	 */
+	if (le32_to_cpu(data->flags) & IWL_STATISTICS_REPLY_FLG_CLEAR)
+		mvmvif->beacon_stats.accu_num_beacons +=
+			mvmvif->beacon_stats.num_beacons;
 	if (mvmvif->id != id)
 		return;
 		flags = stats->flag;
 	}
+	data.flags = flags;
 	iwl_mvm_rx_stats_check_trigger(mvm, pkt);

drivers/net/wireless/intel/iwlwifi/mvm/sta.c+7−2

 	lockdep_assert_held(&mvm->mutex);
+	if (WARN(maxq >= mvm->trans->trans_cfg->base_params->num_of_queues,
+		 "max queue %d >= num_of_queues (%d)", maxq,
+		 mvm->trans->trans_cfg->base_params->num_of_queues))
+		maxq = mvm->trans->trans_cfg->base_params->num_of_queues - 1;
 	/* This should not be hit with new TX path */
 	if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
 		return -ENOSPC;
 						   inactive_tid_bitmap,
 						   &unshare_queues,
 						   &changetid_queues);
-		if (ret >= 0 && free_queue < 0) {
+		if (ret && free_queue < 0) {
 			queue_owner = sta;
-			free_queue = ret;
+			free_queue = i;
 		}
 		/* only unlock sta lock - we still need the queue info lock */
 		spin_unlock_bh(&mvmsta->lock);

drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c+14−4

 	int cmdq_size = max_t(u32, IWL_CMD_QUEUE_SIZE,
 			      trans->cfg->min_txq_size);
+	switch (trans_pcie->rx_buf_size) {
+	case IWL_AMSDU_DEF:
+		return -EINVAL;
+	case IWL_AMSDU_2K:
+		break;
+	case IWL_AMSDU_4K:
+	case IWL_AMSDU_8K:
+	case IWL_AMSDU_12K:
+		control_flags |= IWL_PRPH_SCRATCH_RB_SIZE_4K;
+		break;
+	}
 	/* Allocate prph scratch */
 	prph_scratch = dma_alloc_coherent(trans->dev, sizeof(*prph_scratch),
 					  &trans_pcie->prph_scratch_dma_addr,
 		cpu_to_le16((u16)iwl_read32(trans, CSR_HW_REV));
 	prph_sc_ctrl->version.size = cpu_to_le16(sizeof(*prph_scratch) / 4);
-	control_flags = IWL_PRPH_SCRATCH_RB_SIZE_4K |
+	control_flags |= IWL_PRPH_SCRATCH_MTR_MODE;
-			IWL_PRPH_SCRATCH_MTR_MODE |
+	control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT;
-			(IWL_PRPH_MTR_FORMAT_256B &
-			 IWL_PRPH_SCRATCH_MTR_FORMAT);
 	/* initialize RX default queue */
 	prph_sc_ctrl->rbd_cfg.free_rbd_addr =

drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c+3−0

@@ -1418,6 +1418,9 @@ void iwl_trans_pcie_dyn_txq_free(struct iwl_trans *trans, int queue) · 1417 unmodified lines
1418		1418
1419	iwl_pcie_gen2_txq_unmap(trans, queue);	1419	iwl_pcie_gen2_txq_unmap(trans, queue);
1420		1420
		1421	iwl_pcie_gen2_txq_free_memory(trans, trans_pcie->txq[queue]);
		1422	trans_pcie->txq[queue] = NULL;
		1423
1421	IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue);	1424	IWL_DEBUG_TX_QUEUES(trans, "Deactivate queue %d\n", queue);
1422	}	1425	}
1423		1426

drivers/net/wireless/mac80211_hwsim.c+7−7

@@ -3669,9 +3669,9 @@ static int hwsim_new_radio_nl(struct sk_buff msg, struct genl_info info) · 3668 unmodified lines
3669	}	3669	}
3670		3670
3671	if (info->attrs[HWSIM_ATTR_RADIO_NAME]) {	3671	if (info->attrs[HWSIM_ATTR_RADIO_NAME]) {
3672	hwname = kasprintf(GFP_KERNEL, "%.*s",	3672	hwname = kstrndup((char *)nla_data(info->attrs[HWSIM_ATTR_RADIO_NAME]),
3673	nla_len(info->attrs[HWSIM_ATTR_RADIO_NAME]),	3673	nla_len(info->attrs[HWSIM_ATTR_RADIO_NAME]),
3674	(char *)nla_data(info->attrs[HWSIM_ATTR_RADIO_NAME]));	3674	GFP_KERNEL);
3675	if (!hwname)	3675	if (!hwname)
3676	return -ENOMEM;	3676	return -ENOMEM;
3677	param.hwname = hwname;	3677	param.hwname = hwname;
@@ -3691,9 +3691,9 @@ static int hwsim_del_radio_nl(struct sk_buff msg, struct genl_info info) · 13 unmodified lines
3691	if (info->attrs[HWSIM_ATTR_RADIO_ID]) {	3691	if (info->attrs[HWSIM_ATTR_RADIO_ID]) {
3692	idx = nla_get_u32(info->attrs[HWSIM_ATTR_RADIO_ID]);	3692	idx = nla_get_u32(info->attrs[HWSIM_ATTR_RADIO_ID]);
3693	} else if (info->attrs[HWSIM_ATTR_RADIO_NAME]) {	3693	} else if (info->attrs[HWSIM_ATTR_RADIO_NAME]) {
3694	hwname = kasprintf(GFP_KERNEL, "%.*s",	3694	hwname = kstrndup((char *)nla_data(info->attrs[HWSIM_ATTR_RADIO_NAME]),
3695	nla_len(info->attrs[HWSIM_ATTR_RADIO_NAME]),	3695	nla_len(info->attrs[HWSIM_ATTR_RADIO_NAME]),
3696	(char *)nla_data(info->attrs[HWSIM_ATTR_RADIO_NAME]));	3696	GFP_KERNEL);
3697	if (!hwname)	3697	if (!hwname)
3698	return -ENOMEM;	3698	return -ENOMEM;
3699	} else	3699	} else
@@ -4068,7 +4068,7 @@ static void hwsim_virtio_rx_work(struct work_struct *work) · 368 unmodified lines
4068	}	4068	}
4069	vq = hwsim_vqs[HWSIM_VQ_RX];	4069	vq = hwsim_vqs[HWSIM_VQ_RX];
4070	sg_init_one(sg, skb->head, skb_end_offset(skb));	4070	sg_init_one(sg, skb->head, skb_end_offset(skb));
4071	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_KERNEL);	4071	err = virtqueue_add_inbuf(vq, sg, 1, skb, GFP_ATOMIC);
4072	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))	4072	if (WARN(err, "virtqueue_add_inbuf returned %d\n", err))
4073	nlmsg_free(skb);	4073	nlmsg_free(skb);
4074	else	4074	else

drivers/net/wireless/realtek/rtlwifi/rc.c+1−1

@@ -261,7 +261,7 @@ static void rtl_rate_update(void *ppriv, · 260 unmodified lines
261	{	261	{
262	}	262	}
263		263
264	static void rtl_rate_alloc(struct ieee80211_hw hw, struct dentry *debugfsdir)	264	static void rtl_rate_alloc(struct ieee80211_hw hw)
265	{	265	{
266	struct rtl_priv *rtlpriv = rtl_priv(hw);	266	struct rtl_priv *rtlpriv = rtl_priv(hw);
267	return rtlpriv;	267	return rtlpriv;

drivers/net/wireless/realtek/rtw88/pci.c+3−8

 	rtw_pci_link_cfg(rtwdev);
 }
-#ifdef CONFIG_PM
+static int __maybe_unused rtw_pci_suspend(struct device *dev)
-static int rtw_pci_suspend(struct device *dev)
 {
 	return 0;
 }
-static int rtw_pci_resume(struct device *dev)
+static int __maybe_unused rtw_pci_resume(struct device *dev)
 {
 	return 0;
 }
 static SIMPLE_DEV_PM_OPS(rtw_pm_ops, rtw_pci_suspend, rtw_pci_resume);
-#define RTW_PM_OPS (&rtw_pm_ops)
-#else
-#define RTW_PM_OPS NULL
-#endif
 static int rtw_pci_claim(struct rtw_dev *rtwdev, struct pci_dev *pdev)
 {
 	.id_table = rtw_pci_id_table,
 	.probe = rtw_pci_probe,
 	.remove = rtw_pci_remove,
-	.driver.pm = RTW_PM_OPS,
+	.driver.pm = &rtw_pm_ops,
 };
 module_pci_driver(rtw_pci_driver);

drivers/nvme/host/core.c+2−0

@@ -3642,6 +3642,8 @@ static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid) · 3641 unmodified lines
3642		3642
3643	return;	3643	return;
3644	out_put_disk:	3644	out_put_disk:
		3645	/* prevent double queue cleanup */
		3646	ns->disk->queue = NULL;
3645	put_disk(ns->disk);	3647	put_disk(ns->disk);
3646	out_unlink_ns:	3648	out_unlink_ns:
3647	mutex_lock(&ctrl->subsys->lock);	3649	mutex_lock(&ctrl->subsys->lock);

drivers/of/overlay.c+2−0

@@ -261,6 +261,8 @@ static struct property *dup_and_fixup_symbol_prop( · 260 unmodified lines
261		261
262	of_property_set_flag(new_prop, OF_DYNAMIC);	262	of_property_set_flag(new_prop, OF_DYNAMIC);
263		263
		264	kfree(target_path);
		265
264	return new_prop;	266	return new_prop;
265		267
266	err_free_new_prop:	268	err_free_new_prop:

drivers/of/unittest-data/overlay_bad_add_dup_prop.dts+19−4

 /plugin/;
 /*
- * &electric_1/motor-1 and &spin_ctrl_1 are the same node:
+ * &electric_1/motor-1/electric and &spin_ctrl_1/electric are the same node:
- *   /testcase-data-2/substation@100/motor-1
+ *   /testcase-data-2/substation@100/motor-1/electric
  *
  * Thus the property "rpm_avail" in each fragment will
  * result in an attempt to update the same property twice.
  * This will result in an error and the overlay apply
  * will fail.
+ *
+ * The previous version of this test did not include the extra
+ * level of node 'electric'.  That resulted in the 'rpm_avail'
+ * property being located in the pre-existing node 'motor-1'.
+ * Modifying a property results in a WARNING that a memory leak
+ * will occur if the overlay is removed.  Since the overlay apply
+ * fails, the memory leak does actually occur, and kmemleak will
+ * further report the memory leak if CONFIG_DEBUG_KMEMLEAK is
+ * enabled.  Adding the overlay node 'electric' avoids the
+ * memory leak and thus people who use kmemleak will not
+ * have to debug this non-problem again.
  */
 &electric_1 {
 	motor-1 {
-		rpm_avail = < 100 >;
+		electric {
+			rpm_avail = < 100 >;
+		};
 	};
 };
 &spin_ctrl_1 {
-		rpm_avail = < 100 200 >;
+		electric {
+			rpm_avail = < 100 200 >;
+		};
 };

drivers/of/unittest.c+19−9

 	unittest(!of_changeset_revert(&chgset), "revert failed\n");
 	of_changeset_destroy(&chgset);
+	of_node_put(n1);
+	of_node_put(n2);
+	of_node_put(n21);
 #endif
 }
 	of_platform_populate(np, match, NULL, &test_bus->dev);
 	for_each_child_of_node(np, child) {
-		for_each_child_of_node(child, grandchild)
+		for_each_child_of_node(child, grandchild) {
-			unittest(of_find_device_by_node(grandchild),
+			pdev = of_find_device_by_node(grandchild);
+			unittest(pdev,
 				 "Could not create device for node '%pOFn'\n",
 				 grandchild);
+			of_dev_put(pdev);
+		}
 	}
 	of_platform_depopulate(&test_bus->dev);
 				goto err_unlock;
 			}
 			if (__of_add_property(of_symbols, new_prop)) {
+				kfree(new_prop->name);
+				kfree(new_prop->value);
+				kfree(new_prop);
 				/* "name" auto-generated by unflatten */
-				if (!strcmp(new_prop->name, "name"))
+				if (!strcmp(prop->name, "name"))
 					continue;
 				unittest(0, "duplicate property '%s' in overlay_base node __symbols__",
 					 prop->name);
 		   "OF: overlay: ERROR: multiple fragments add and/or delete node /testcase-data-2/substation@100/motor-1/controller");
 	EXPECT_BEGIN(KERN_ERR,
-		     "OF: overlay: WARNING: memory leak will occur if overlay removed, property: /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add and/or delete node /testcase-data-2/substation@100/motor-1/electric");
 	EXPECT_BEGIN(KERN_ERR,
-		     "OF: overlay: WARNING: memory leak will occur if overlay removed, property: /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/electric/rpm_avail");
 	EXPECT_BEGIN(KERN_ERR,
-		     "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/electric/name");
 	unittest(overlay_data_apply("overlay_bad_add_dup_prop", NULL),
 		 "Adding overlay 'overlay_bad_add_dup_prop' failed\n");
 	EXPECT_END(KERN_ERR,
-		   "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/electric/name");
 	EXPECT_END(KERN_ERR,
-		   "OF: overlay: WARNING: memory leak will occur if overlay removed, property: /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add, update, and/or delete property /testcase-data-2/substation@100/motor-1/electric/rpm_avail");
 	EXPECT_END(KERN_ERR,
-		   "OF: overlay: WARNING: memory leak will occur if overlay removed, property: /testcase-data-2/substation@100/motor-1/rpm_avail");
+		     "OF: overlay: ERROR: multiple fragments add and/or delete node /testcase-data-2/substation@100/motor-1/electric");
 	unittest(overlay_data_apply("overlay_bad_phandle", NULL),
 		 "Adding overlay 'overlay_bad_phandle' failed\n");

drivers/opp/core.c+14−0

@@ -819,6 +819,8 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq) · 818 unmodified lines
819	if (unlikely(!target_freq)) {	819	if (unlikely(!target_freq)) {
820	if (opp_table->required_opp_tables) {	820	if (opp_table->required_opp_tables) {
821	ret = _set_required_opps(dev, opp_table, NULL);	821	ret = _set_required_opps(dev, opp_table, NULL);
		822	} else if (!_get_opp_count(opp_table)) {
		823	return 0;
822	} else {	824	} else {
823	dev_err(dev, "target frequency can't be 0\n");	825	dev_err(dev, "target frequency can't be 0\n");
824	ret = -EINVAL;	826	ret = -EINVAL;
@@ -849,6 +851,18 @@ int dev_pm_opp_set_rate(struct device *dev, unsigned long target_freq) · 24 unmodified lines
849	goto put_opp_table;	851	goto put_opp_table;
850	}	852	}
851		853
		854	/*
		855	* For IO devices which require an OPP on some platforms/SoCs
		856	* while just needing to scale the clock on some others
		857	* we look for empty OPP tables with just a clock handle and
		858	* scale only the clk. This makes dev_pm_opp_set_rate()
		859	* equivalent to a clk_set_rate()
		860	*/
		861	if (!_get_opp_count(opp_table)) {
		862	ret = _generic_set_opp_clk_only(dev, clk, freq);
		863	goto put_opp_table;
		864	}
		865
852	temp_freq = old_freq;	866	temp_freq = old_freq;
853	old_opp = _find_freq_ceil(opp_table, &temp_freq);	867	old_opp = _find_freq_ceil(opp_table, &temp_freq);
854	if (IS_ERR(old_opp)) {	868	if (IS_ERR(old_opp)) {

drivers/pci/quirks.c+7−0

@@ -5567,3 +5567,10 @@ static void pci_fixup_no_d0_pme(struct pci_dev *dev) · 5566 unmodified lines
5567	dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT);	5567	dev->pme_support &= ~(PCI_PM_CAP_PME_D0 >> PCI_PM_CAP_PME_SHIFT);
5568	}	5568	}
5569	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);	5569	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x2142, pci_fixup_no_d0_pme);
		5570
		5571	static void apex_pci_fixup_class(struct pci_dev *pdev)
		5572	{
		5573	pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) \| pdev->class;
		5574	}
		5575	DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a,
		5576	PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);

drivers/phy/tegra/Kconfig+2−1

 # SPDX-License-Identifier: GPL-2.0-only
 config PHY_TEGRA_XUSB
 	tristate "NVIDIA Tegra XUSB pad controller driver"
-	depends on ARCH_TEGRA
+	depends on ARCH_TEGRA && USB_SUPPORT
+	select USB_COMMON
 	select USB_CONN_GPIO
 	select USB_PHY
 	help

drivers/platform/chrome/cros_ec_sensorhub_ring.c+4−4

@@ -40,7 +40,7 @@ cros_sensorhub_send_sample(struct cros_ec_sensorhub *sensorhub, · 39 unmodified lines
40	int id = sample->sensor_id;	40	int id = sample->sensor_id;
41	struct iio_dev *indio_dev;	41	struct iio_dev *indio_dev;
42		42
43	if (id > sensorhub->sensor_num)	43	if (id >= sensorhub->sensor_num)
44	return -EINVAL;	44	return -EINVAL;
45		45
46	cb = sensorhub->push_data[id].push_data_cb;	46	cb = sensorhub->push_data[id].push_data_cb;
@@ -820,7 +820,7 @@ static void cros_ec_sensorhub_ring_handler(struct cros_ec_sensorhub *sensorhub) · 773 unmodified lines
820	if (fifo_info->count > sensorhub->fifo_size \|\|	820	if (fifo_info->count > sensorhub->fifo_size \|\|
821	fifo_info->size != sensorhub->fifo_size) {	821	fifo_info->size != sensorhub->fifo_size) {
822	dev_warn(sensorhub->dev,	822	dev_warn(sensorhub->dev,
823	"Mismatch EC data: count %d, size %d - expected %d",	823	"Mismatch EC data: count %d, size %d - expected %d\n",
824	fifo_info->count, fifo_info->size,	824	fifo_info->count, fifo_info->size,
825	sensorhub->fifo_size);	825	sensorhub->fifo_size);
826	goto error;	826	goto error;
@@ -851,14 +851,14 @@ static void cros_ec_sensorhub_ring_handler(struct cros_ec_sensorhub *sensorhub) · 24 unmodified lines
851	}	851	}
852	if (number_data > fifo_info->count - i) {	852	if (number_data > fifo_info->count - i) {
853	dev_warn(sensorhub->dev,	853	dev_warn(sensorhub->dev,
854	"Invalid EC data: too many entry received: %d, expected %d",	854	"Invalid EC data: too many entry received: %d, expected %d\n",
855	number_data, fifo_info->count - i);	855	number_data, fifo_info->count - i);
856	break;	856	break;
857	}	857	}
858	if (out + number_data >	858	if (out + number_data >
859	sensorhub->ring + fifo_info->count) {	859	sensorhub->ring + fifo_info->count) {
860	dev_warn(sensorhub->dev,	860	dev_warn(sensorhub->dev,
861	"Too many samples: %d (%zd data) to %d entries for expected %d entries",	861	"Too many samples: %d (%zd data) to %d entries for expected %d entries\n",
862	i, out - sensorhub->ring, i + number_data,	862	i, out - sensorhub->ring, i + number_data,
863	fifo_info->count);	863	fifo_info->count);
864	break;	864	break;

drivers/ptp/ptp_ines.c+2−2

@@ -400,8 +400,8 @@ static int ines_hwtstamp(struct mii_timestamper mii_ts, struct ifreq ifr) · 399 unmodified lines
400	ines_write32(port, ts_stat_rx, ts_stat_rx);	400	ines_write32(port, ts_stat_rx, ts_stat_rx);
401	ines_write32(port, ts_stat_tx, ts_stat_tx);	401	ines_write32(port, ts_stat_tx, ts_stat_tx);
402		402
403	port->rxts_enabled = ts_stat_rx == TS_ENABLE ? true : false;	403	port->rxts_enabled = ts_stat_rx == TS_ENABLE;
404	port->txts_enabled = ts_stat_tx == TS_ENABLE ? true : false;	404	port->txts_enabled = ts_stat_tx == TS_ENABLE;
405		405
406	spin_unlock_irqrestore(&port->lock, flags);	406	spin_unlock_irqrestore(&port->lock, flags);
407		407

drivers/remoteproc/mtk_common.h+1−1

@@ -68,7 +68,7 @@ struct mtk_scp { · 67 unmodified lines
68	wait_queue_head_t ack_wq;	68	wait_queue_head_t ack_wq;
69		69
70	void __iomem *cpu_addr;	70	void __iomem *cpu_addr;
71	phys_addr_t phys_addr;	71	dma_addr_t dma_addr;
72	size_t dram_size;	72	size_t dram_size;
73		73
74	struct rproc_subdev *rpmsg_subdev;	74	struct rproc_subdev *rpmsg_subdev;

drivers/remoteproc/mtk_scp.c+3−3

@@ -330,7 +330,7 @@ static void scp_da_to_va(struct rproc rproc, u64 da, size_t len) · 329 unmodified lines
330	if (offset >= 0 && (offset + len) < scp->sram_size)	330	if (offset >= 0 && (offset + len) < scp->sram_size)
331	return (void __force *)scp->sram_base + offset;	331	return (void __force *)scp->sram_base + offset;
332	} else {	332	} else {
333	offset = da - scp->phys_addr;	333	offset = da - scp->dma_addr;
334	if (offset >= 0 && (offset + len) < scp->dram_size)	334	if (offset >= 0 && (offset + len) < scp->dram_size)
335	return (void __force *)scp->cpu_addr + offset;	335	return (void __force *)scp->cpu_addr + offset;
336	}	336	}
@@ -451,7 +451,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 114 unmodified lines
451	/* Reserved SCP code size */	451	/* Reserved SCP code size */
452	scp->dram_size = MAX_CODE_SIZE;	452	scp->dram_size = MAX_CODE_SIZE;
453	scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,	453	scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
454	&scp->phys_addr, GFP_KERNEL);	454	&scp->dma_addr, GFP_KERNEL);
455	if (!scp->cpu_addr)	455	if (!scp->cpu_addr)
456	return -ENOMEM;	456	return -ENOMEM;
457		457
@@ -461,7 +461,7 @@ static int scp_map_memory_region(struct mtk_scp *scp) · 3 unmodified lines
461	static void scp_unmap_memory_region(struct mtk_scp *scp)	461	static void scp_unmap_memory_region(struct mtk_scp *scp)
462	{	462	{
463	dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,	463	dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
464	scp->phys_addr);	464	scp->dma_addr);
465	of_reserved_mem_device_release(scp->dev);	465	of_reserved_mem_device_release(scp->dev);
466	}	466	}
467		467

drivers/remoteproc/qcom_q6v5_mss.c+20−13

 	}
 	return ret;
-};
+}
 static void q6v5_pds_disable(struct q6v5 *qproc, struct device **pds,
 			     size_t pd_count)
 		dev_pm_domain_detach(devs[i], false);
 	return ret;
-};
+}
 static void q6v5_pds_detach(struct q6v5 *qproc, struct device **pds,
 			    size_t pd_count)
 	ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name",
 					    1, &qproc->hexagon_mdt_image);
 	if (ret < 0 && ret != -EINVAL)
-		return ret;
+		goto free_rproc;
 	platform_set_drvdata(pdev, qproc);
 	qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12);
 	if (IS_ERR(qproc->sysmon)) {
 		ret = PTR_ERR(qproc->sysmon);
-		goto detach_proxy_pds;
+		goto remove_subdevs;
 	}
 	ret = rproc_add(rproc);
 	if (ret)
-		goto detach_proxy_pds;
+		goto remove_sysmon_subdev;
 	return 0;
-detach_proxy_pds:
+remove_sysmon_subdev:
+	qcom_remove_sysmon_subdev(qproc->sysmon);
+remove_subdevs:
 	qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
+	qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
+	qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
+	qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
+detach_proxy_pds:
 	q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
 detach_active_pds:
 	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
 static int q6v5_remove(struct platform_device *pdev)
 {
 	struct q6v5 *qproc = platform_get_drvdata(pdev);
+	struct rproc *rproc = qproc->rproc;
-	rproc_del(qproc->rproc);
+	rproc_del(rproc);
 	qcom_remove_sysmon_subdev(qproc->sysmon);
-	qcom_remove_ipa_notify_subdev(qproc->rproc, &qproc->ipa_notify_subdev);
+	qcom_remove_ipa_notify_subdev(rproc, &qproc->ipa_notify_subdev);
-	qcom_remove_glink_subdev(qproc->rproc, &qproc->glink_subdev);
+	qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev);
-	qcom_remove_smd_subdev(qproc->rproc, &qproc->smd_subdev);
+	qcom_remove_smd_subdev(rproc, &qproc->smd_subdev);
-	qcom_remove_ssr_subdev(qproc->rproc, &qproc->ssr_subdev);
+	qcom_remove_glink_subdev(rproc, &qproc->glink_subdev);
-	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
 	q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count);
+	q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count);
-	rproc_free(qproc->rproc);
+	rproc_free(rproc);
 	return 0;
 }

drivers/remoteproc/remoteproc_sysfs.c+1−0

@@ -4,6 +4,7 @@ · 3 unmodified lines
4	*/	4	*/
5		5
6	#include <linux/remoteproc.h>	6	#include <linux/remoteproc.h>
		7	#include <linux/slab.h>
7		8
8	#include "remoteproc_internal.h"	9	#include "remoteproc_internal.h"
9		10

drivers/remoteproc/stm32_rproc.c+1−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/regmap.h>	19	#include <linux/regmap.h>
20	#include <linux/remoteproc.h>	20	#include <linux/remoteproc.h>
21	#include <linux/reset.h>	21	#include <linux/reset.h>
		22	#include <linux/slab.h>
22	#include <linux/workqueue.h>	23	#include <linux/workqueue.h>
23		24
24	#include "remoteproc_internal.h"	25	#include "remoteproc_internal.h"

drivers/rpmsg/mtk_rpmsg.c+1−0

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	#include <linux/platform_device.h>	8	#include <linux/platform_device.h>
9	#include <linux/remoteproc.h>	9	#include <linux/remoteproc.h>
10	#include <linux/rpmsg/mtk_rpmsg.h>	10	#include <linux/rpmsg/mtk_rpmsg.h>
		11	#include <linux/slab.h>
11	#include <linux/workqueue.h>	12	#include <linux/workqueue.h>
12		13
13	#include "rpmsg_internal.h"	14	#include "rpmsg_internal.h"

drivers/s390/block/Kconfig+0−1

@@ -26,7 +26,6 @@ config DASD · 25 unmodified lines
26	def_tristate y	26	def_tristate y
27	prompt "Support for DASD devices"	27	prompt "Support for DASD devices"
28	depends on CCW && BLOCK	28	depends on CCW && BLOCK
29	select IOSCHED_DEADLINE
30	help	29	help
31	Enable this option if you want to access DASDs directly utilizing	30	Enable this option if you want to access DASDs directly utilizing
32	S/390s channel subsystem commands. This is necessary for running	31	S/390s channel subsystem commands. This is necessary for running

drivers/scsi/Kconfig+1−1

@@ -127,7 +127,7 @@ config CHR_DEV_SG · 126 unmodified lines
127		127
128	For scanners, look at SANE (<http://www.sane-project.org/>). For CD	128	For scanners, look at SANE (<http://www.sane-project.org/>). For CD
129	writer software look at Cdrtools	129	writer software look at Cdrtools
130	(<http://cdrecord.berlios.de/private/cdrecord.html>)	130	(<http://cdrtools.sourceforge.net/>)
131	and for burning a "disk at once": CDRDAO	131	and for burning a "disk at once": CDRDAO
132	(<http://cdrdao.sourceforge.net/>). Cdparanoia is a high	132	(<http://cdrdao.sourceforge.net/>). Cdparanoia is a high
133	quality digital reader of audio CDs (<http://www.xiph.org/paranoia/>).	133	quality digital reader of audio CDs (<http://www.xiph.org/paranoia/>).

drivers/scsi/hisi_sas/Kconfig+1−0

@@ -6,6 +6,7 @@ config SCSI_HISI_SAS · 5 unmodified lines
6	select SCSI_SAS_LIBSAS	6	select SCSI_SAS_LIBSAS
7	select BLK_DEV_INTEGRITY	7	select BLK_DEV_INTEGRITY
8	depends on ATA	8	depends on ATA
		9	select SATA_HOST
9	help	10	help
10	This driver supports HiSilicon's SAS HBA, including support based	11	This driver supports HiSilicon's SAS HBA, including support based
11	on platform device	12	on platform device

drivers/scsi/qla2xxx/qla_dbg.c+2−1

 {
 	va_list va;
 	struct va_format vaf;
-	char pbuf[64];
 	va_start(va, fmt);
 	vaf.va = &va;
 	if (!ql_mask_match(level)) {
+		char pbuf[64];
 		if (vha != NULL) {
 			const struct pci_dev *pdev = vha->hw->pdev;
 			/* <module-name> <msg-id>:<host> Message */

drivers/scsi/qla2xxx/qla_init.c+0−2

@@ -3611,8 +3611,6 @@ qla24xx_detect_sfp(scsi_qla_host_t *vha) · 3610 unmodified lines
3611	ha->lr_distance = LR_DISTANCE_5K;	3611	ha->lr_distance = LR_DISTANCE_5K;
3612	}	3612	}
3613		3613
3614	if (!vha->flags.init_done)
3615	rc = QLA_SUCCESS;
3616	out:	3614	out:
3617	ql_dbg(ql_dbg_async, vha, 0x507b,	3615	ql_dbg(ql_dbg_async, vha, 0x507b,
3618	"SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",	3616	"SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",

drivers/scsi/qla2xxx/qla_isr.c+0−1

@@ -87,7 +87,6 @@ qla24xx_process_abts(struct scsi_qla_host vha, void pkt) · 86 unmodified lines
87	}	87	}
88		88
89	/* terminate exchange */	89	/* terminate exchange */
90	memset(rsp_els, 0, sizeof(*rsp_els));
91	rsp_els->entry_type = ELS_IOCB_TYPE;	90	rsp_els->entry_type = ELS_IOCB_TYPE;
92	rsp_els->entry_count = 1;	91	rsp_els->entry_count = 1;
93	rsp_els->nport_handle = ~0;	92	rsp_els->nport_handle = ~0;

drivers/scsi/qla2xxx/qla_mbx.c+0−2

@@ -4894,8 +4894,6 @@ qla25xx_set_els_cmds_supported(scsi_qla_host_t *vha) · 4893 unmodified lines
4894	return QLA_MEMORY_ALLOC_FAILED;	4894	return QLA_MEMORY_ALLOC_FAILED;
4895	}	4895	}
4896		4896
4897	memset(els_cmd_map, 0, ELS_CMD_MAP_SIZE);
4898
4899	els_cmd_map[index] \|= 1 << bit;	4897	els_cmd_map[index] \|= 1 << bit;
4900		4898
4901	mcp->mb[0] = MBC_SET_RNID_PARAMS;	4899	mcp->mb[0] = MBC_SET_RNID_PARAMS;

drivers/scsi/qla2xxx/qla_os.c+17−18

 	}
 	qla2x00_wait_for_hba_ready(base_vha);
+	/*
+	 * if UNLOADING flag is already set, then continue unload,
+	 * where it was set first.
+	 */
+	if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
+		return;
 	if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
 	    IS_QLA28XX(ha)) {
 		if (ha->flags.fw_started)
 	qla2x00_wait_for_sess_deletion(base_vha);
-	/*
-	 * if UNLOAD flag is already set, then continue unload,
-	 * where it was set first.
-	 */
-	if (test_bit(UNLOADING, &base_vha->dpc_flags))
-		return;
-	set_bit(UNLOADING, &base_vha->dpc_flags);
 	qla_nvme_delete(base_vha);
 	dma_free_coherent(&ha->pdev->dev,
 	struct qla_work_evt *e;
 	uint8_t bail;
+	if (test_bit(UNLOADING, &vha->dpc_flags))
+		return NULL;
 	QLA_VHA_MARK_BUSY(vha, bail);
 	if (bail)
 		return NULL;
 	struct pci_dev *pdev = ha->pdev;
 	scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
-	/*
-	 * if UNLOAD flag is already set, then continue unload,
-	 * where it was set first.
-	 */
-	if (test_bit(UNLOADING, &base_vha->dpc_flags))
-		return;
 	ql_log(ql_log_warn, base_vha, 0x015b,
 	    "Disabling adapter.\n");
 		return;
 	}
-	qla2x00_wait_for_sess_deletion(base_vha);
+	/*
+	 * if UNLOADING flag is already set, then continue unload,
+	 * where it was set first.
+	 */
+	if (test_and_set_bit(UNLOADING, &base_vha->dpc_flags))
+		return;
-	set_bit(UNLOADING, &base_vha->dpc_flags);
+	qla2x00_wait_for_sess_deletion(base_vha);
 	qla2x00_delete_all_vps(ha, base_vha);

drivers/scsi/scsi_lib.c+1−0

@@ -2284,6 +2284,7 @@ scsi_device_set_state(struct scsi_device *sdev, enum scsi_device_state state) · 2283 unmodified lines
2284	switch (oldstate) {	2284	switch (oldstate) {
2285	case SDEV_RUNNING:	2285	case SDEV_RUNNING:
2286	case SDEV_CREATED_BLOCK:	2286	case SDEV_CREATED_BLOCK:
		2287	case SDEV_QUIESCE:
2287	case SDEV_OFFLINE:	2288	case SDEV_OFFLINE:
2288	break;	2289	break;
2289	default:	2290	default:

drivers/scsi/sg.c+6−2

 	hp->flags = input_size;	/* structure abuse ... */
 	hp->pack_id = old_hdr.pack_id;
 	hp->usr_ptr = NULL;
-	if (copy_from_user(cmnd, buf, cmd_size))
+	if (copy_from_user(cmnd, buf, cmd_size)) {
+		sg_remove_request(sfp, srp);
 		return -EFAULT;
+	}
 	/*
 	 * SG_DXFER_TO_FROM_DEV is functionally equivalent to SG_DXFER_FROM_DEV,
 	 * but is is possible that the app intended SG_DXFER_TO_DEV, because there
 			"sg_common_write:  scsi opcode=0x%02x, cmd_size=%d\n",
 			(int) cmnd[0], (int) hp->cmd_len));
-	if (hp->dxfer_len >= SZ_256M)
+	if (hp->dxfer_len >= SZ_256M) {
+		sg_remove_request(sfp, srp);
 		return -EINVAL;
+	}
 	k = sg_start_req(srp, cmnd);
 	if (k) {

drivers/soc/fsl/dpio/dpio-service.c+14−5

 				const struct dpaa2_fd *fd,
 				int nb)
 {
-	int i;
+	struct qbman_eq_desc *ed;
-	struct qbman_eq_desc ed[32];
+	int i, ret;
+	ed = kcalloc(sizeof(struct qbman_eq_desc), 32, GFP_KERNEL);
+	if (!ed)
+		return -ENOMEM;
 	d = service_select(d);
-	if (!d)
+	if (!d) {
-		return -ENODEV;
+		ret = -ENODEV;
+		goto out;
+	}
 	for (i = 0; i < nb; i++) {
 		qbman_eq_desc_clear(&ed[i]);
 		qbman_eq_desc_set_fq(&ed[i], fqid[i]);
 	}
-	return qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+	ret = qbman_swp_enqueue_multiple_desc(d->swp, &ed[0], fd, nb);
+out:
+	kfree(ed);
+	return ret;
 }
 EXPORT_SYMBOL(dpaa2_io_service_enqueue_multiple_desc_fq);

drivers/soc/fsl/dpio/qbman-portal.c+2−4

 	if (!s->eqcr.available) {
 		eqcr_ci = s->eqcr.ci;
 		p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-		s->eqcr.ci = __raw_readl(p) & full_mask;
+		s->eqcr.ci = *p & full_mask;
 		s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
 					eqcr_ci, s->eqcr.ci);
 		if (!s->eqcr.available) {
 	const uint32_t *cl;
 	uint32_t eqcr_ci, eqcr_pi, half_mask, full_mask;
 	int i, num_enqueued = 0;
-	uint64_t addr_cena;
 	half_mask = (s->eqcr.pi_ci_mask>>1);
 	full_mask = s->eqcr.pi_ci_mask;
 	/* Flush all the cacheline without load/store in between */
 	eqcr_pi = s->eqcr.pi;
-	addr_cena = (uint64_t)s->addr_cena;
 	for (i = 0; i < num_enqueued; i++)
 		eqcr_pi++;
 	s->eqcr.pi = eqcr_pi & full_mask;
 	if (!s->eqcr.available) {
 		eqcr_ci = s->eqcr.ci;
 		p = s->addr_cena + QBMAN_CENA_SWP_EQCR_CI_MEMBACK;
-		s->eqcr.ci = __raw_readl(p) & full_mask;
+		s->eqcr.ci = *p & full_mask;
 		s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size,
 					eqcr_ci, s->eqcr.ci);
 		if (!s->eqcr.available)

drivers/soc/imx/Kconfig+1−0

@@ -21,6 +21,7 @@ config SOC_IMX8M · 20 unmodified lines
21	bool "i.MX8M SoC family support"	21	bool "i.MX8M SoC family support"
22	depends on ARCH_MXC \|\| COMPILE_TEST	22	depends on ARCH_MXC \|\| COMPILE_TEST
23	default ARCH_MXC && ARM64	23	default ARCH_MXC && ARM64
		24	select SOC_BUS
24	help	25	help
25	If you say yes here you get support for the NXP i.MX8M family	26	If you say yes here you get support for the NXP i.MX8M family
26	support, it will provide the SoC info like SoC family,	27	support, it will provide the SoC info like SoC family,

drivers/soc/xilinx/Kconfig+2−2

@@ -19,7 +19,7 @@ config XILINX_VCU · 18 unmodified lines
19		19
20	config ZYNQMP_POWER	20	config ZYNQMP_POWER
21	bool "Enable Xilinx Zynq MPSoC Power Management driver"	21	bool "Enable Xilinx Zynq MPSoC Power Management driver"
22	depends on PM && ARCH_ZYNQMP	22	depends on PM && ZYNQMP_FIRMWARE
23	default y	23	default y
24	select MAILBOX	24	select MAILBOX
25	select ZYNQMP_IPI_MBOX	25	select ZYNQMP_IPI_MBOX
@@ -35,7 +35,7 @@ config ZYNQMP_POWER · 9 unmodified lines
35	config ZYNQMP_PM_DOMAINS	35	config ZYNQMP_PM_DOMAINS
36	bool "Enable Zynq MPSoC generic PM domains"	36	bool "Enable Zynq MPSoC generic PM domains"
37	default y	37	default y
38	depends on PM && ARCH_ZYNQMP && ZYNQMP_FIRMWARE	38	depends on PM && ZYNQMP_FIRMWARE
39	select PM_GENERIC_DOMAINS	39	select PM_GENERIC_DOMAINS
40	help	40	help
41	Say yes to enable device power management through PM domains	41	Say yes to enable device power management through PM domains

drivers/staging/comedi/comedi_fops.c+3−1

@@ -2725,8 +2725,10 @@ static int comedi_open(struct inode inode, struct file file) · 2724 unmodified lines
2725	}	2725	}
2726		2726
2727	cfp = kzalloc(sizeof(*cfp), GFP_KERNEL);	2727	cfp = kzalloc(sizeof(*cfp), GFP_KERNEL);
2728	if (!cfp)	2728	if (!cfp) {
		2729	comedi_dev_put(dev);
2729	return -ENOMEM;	2730	return -ENOMEM;
		2731	}
2730		2732
2731	cfp->dev = dev;	2733	cfp->dev = dev;
2732		2734

drivers/staging/comedi/drivers/dt2815.c+3−0

 	int ret;
 	for (i = 0; i < insn->n; i++) {
+		/* FIXME: lo bit 0 chooses voltage output or current output */
 		lo = ((data[i] & 0x0f) << 4) | (chan << 1) | 0x01;
 		hi = (data[i] & 0xff0) >> 4;
 		if (ret)
 			return ret;
+		outb(hi, dev->iobase + DT2815_DATA);
 		devpriv->ao_readback[chan] = data[i];
 	}
 	return i;

drivers/staging/gasket/apex_driver.c+0−7

@@ -570,13 +570,6 @@ static const struct pci_device_id apex_pci_ids[] = { · 569 unmodified lines
570	{ PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 }	570	{ PCI_DEVICE(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID) }, { 0 }
571	};	571	};
572		572
573	static void apex_pci_fixup_class(struct pci_dev *pdev)
574	{
575	pdev->class = (PCI_CLASS_SYSTEM_OTHER << 8) \| pdev->class;
576	}
577	DECLARE_PCI_FIXUP_CLASS_HEADER(APEX_PCI_VENDOR_ID, APEX_PCI_DEVICE_ID,
578	PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);
579
580	static int apex_pci_probe(struct pci_dev *pci_dev,	573	static int apex_pci_probe(struct pci_dev *pci_dev,
581	const struct pci_device_id *id)	574	const struct pci_device_id *id)
582	{	575	{

drivers/staging/gasket/gasket_sysfs.c+1−2

@@ -228,8 +228,7 @@ int gasket_sysfs_create_entries(struct device *device, · 227 unmodified lines
228	}	228	}
229		229
230	mutex_lock(&mapping->mutex);	230	mutex_lock(&mapping->mutex);
231	for (i = 0; strcmp(attrs[i].attr.attr.name, GASKET_ARRAY_END_MARKER);	231	for (i = 0; attrs[i].attr.attr.name != NULL; i++) {
232	i++) {
233	if (mapping->attribute_count == GASKET_SYSFS_MAX_NODES) {	232	if (mapping->attribute_count == GASKET_SYSFS_MAX_NODES) {
234	dev_err(device,	233	dev_err(device,
235	"Maximum number of sysfs nodes reached for device\n");	234	"Maximum number of sysfs nodes reached for device\n");

drivers/staging/gasket/gasket_sysfs.h+0−4

  */
 #define GASKET_SYSFS_MAX_NODES 196
-/* End markers for sysfs struct arrays. */
-#define GASKET_ARRAY_END_TOKEN GASKET_RESERVED_ARRAY_END
-#define GASKET_ARRAY_END_MARKER __stringify(GASKET_ARRAY_END_TOKEN)
 /*
  * Terminator struct for a gasket_sysfs_attr array. Must be at the end of
  * all gasket_sysfs_attribute arrays.

drivers/staging/vt6656/key.c+3−11

 	case  VNT_KEY_PAIRWISE:
 		key_mode |= mode;
 		key_inx = 4;
-		/* Don't save entry for pairwise key for station mode */
-		if (priv->op_mode == NL80211_IFTYPE_STATION)
-			clear_bit(entry, &priv->key_entry_inuse);
 		break;
 	default:
 		return -EINVAL;
 int vnt_set_keys(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
 		 struct ieee80211_vif *vif, struct ieee80211_key_conf *key)
 {
-	struct ieee80211_bss_conf *conf = &vif->bss_conf;
 	struct vnt_private *priv = hw->priv;
 	u8 *mac_addr = NULL;
 	u8 key_dec_mode = 0;
 		return -EOPNOTSUPP;
 	}
-	if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) {
+	if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
 		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_PAIRWISE,
 				key_dec_mode, true);
-	} else {
+	else
-		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_DEFAULTKEY,
+		vnt_set_keymode(hw, mac_addr, key, VNT_KEY_GROUP_ADDRESS,
 				key_dec_mode, true);
-		vnt_set_keymode(hw, (u8 *)conf->bssid, key,
-				VNT_KEY_GROUP_ADDRESS, key_dec_mode, true);
-	}
 	return 0;
 }

drivers/staging/vt6656/main_usb.c+17−14

 	priv->op_mode = vif->type;
-	vnt_set_bss_mode(priv);
 	/* LED blink on TX */
 	vnt_mac_set_led(priv, LEDSTS_STS, LEDSTS_INTER);
 		priv->basic_rates = conf->basic_rates;
 		vnt_update_top_rates(priv);
-		vnt_set_bss_mode(priv);
 		dev_dbg(&priv->usb->dev, "basic rates %x\n", conf->basic_rates);
 	}
 			priv->short_slot_time = false;
 		vnt_set_short_slot_time(priv);
-		vnt_update_ifs(priv);
 		vnt_set_vga_gain_offset(priv, priv->bb_vga[0]);
 		vnt_update_pre_ed_threshold(priv, false);
 	}
+	if (changed & (BSS_CHANGED_BASIC_RATES | BSS_CHANGED_ERP_PREAMBLE |
+		       BSS_CHANGED_ERP_SLOT))
+		vnt_set_bss_mode(priv);
 	if (changed & BSS_CHANGED_TXPOWER)
 		vnt_rf_setpower(priv, priv->current_rate,
 				conf->chandef.chan->hw_value);
 			vnt_mac_reg_bits_on(priv, MAC_REG_TFTCTL,
 					    TFTCTL_TSFCNTREN);
-			vnt_adjust_tsf(priv, conf->beacon_rate->hw_value,
-				       conf->sync_tsf, priv->current_tsf);
 			vnt_mac_set_beacon_interval(priv, conf->beacon_int);
 			vnt_reset_next_tbtt(priv, conf->beacon_int);
+			vnt_adjust_tsf(priv, conf->beacon_rate->hw_value,
+				       conf->sync_tsf, priv->current_tsf);
+			vnt_update_next_tbtt(priv,
+					     conf->sync_tsf, conf->beacon_int);
 		} else {
 			vnt_clear_current_tsf(priv);
 {
 	struct vnt_private *priv = hw->priv;
 	u8 rx_mode = 0;
-	int rc;
 	*total_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC;
-	rc = vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR,
+	vnt_control_in(priv, MESSAGE_TYPE_READ, MAC_REG_RCR,
-			    MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode);
+		       MESSAGE_REQUEST_MACREG, sizeof(u8), &rx_mode);
-	if (!rc)
-		rx_mode = RCR_MULTICAST | RCR_BROADCAST;
 	dev_dbg(&priv->usb->dev, "rx mode in = %x\n", rx_mode);
 	case SET_KEY:
 		return vnt_set_keys(hw, sta, vif, key);
 	case DISABLE_KEY:
-		if (test_bit(key->hw_key_idx, &priv->key_entry_inuse))
+		if (test_bit(key->hw_key_idx, &priv->key_entry_inuse)) {
 			clear_bit(key->hw_key_idx, &priv->key_entry_inuse);
+			vnt_mac_disable_keyentry(priv, key->hw_key_idx);
+		}
 	default:
 		break;
 	}

drivers/staging/vt6656/usbpipe.c+2−1

@@ -207,7 +207,8 @@ static void vnt_int_process_data(struct vnt_private *priv) · 206 unmodified lines
207	priv->wake_up_count =	207	priv->wake_up_count =
208	priv->hw->conf.listen_interval;	208	priv->hw->conf.listen_interval;
209		209
210	--priv->wake_up_count;	210	if (priv->wake_up_count)
		211	--priv->wake_up_count;
211		212
212	/* Turn on wake up to listen next beacon */	213	/* Turn on wake up to listen next beacon */
213	if (priv->wake_up_count == 1)	214	if (priv->wake_up_count == 1)

drivers/target/target_core_fabric_lib.c+3−2

 	 * encoded TransportID.
 	 */
 	ptr = &se_nacl->initiatorname[0];
-	for (i = 0; i < 24; ) {
+	for (i = 0; i < 23; ) {
 		if (!strncmp(&ptr[i], ":", 1)) {
 			i++;
 			continue;
 			*p = tolower(*p);
 			p++;
 		}
-	}
+	} else
+		*port_nexus_ptr = NULL;
 	return &buf[4];
 }

drivers/target/target_core_iblock.c+1−1

@@ -432,7 +432,7 @@ iblock_execute_zero_out(struct block_device bdev, struct se_cmd cmd) · 431 unmodified lines
432	target_to_linux_sector(dev, cmd->t_task_lba),	432	target_to_linux_sector(dev, cmd->t_task_lba),
433	target_to_linux_sector(dev,	433	target_to_linux_sector(dev,
434	sbc_get_write_same_sectors(cmd)),	434	sbc_get_write_same_sectors(cmd)),
435	GFP_KERNEL, false);	435	GFP_KERNEL, BLKDEV_ZERO_NOUNMAP);
436	if (ret)	436	if (ret)
437	return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;	437	return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
438		438

drivers/target/target_core_user.c+1−0

@@ -2073,6 +2073,7 @@ static void tcmu_reset_ring(struct tcmu_dev *udev, u8 err_level) · 2072 unmodified lines
2073	mb->cmd_tail = 0;	2073	mb->cmd_tail = 0;
2074	mb->cmd_head = 0;	2074	mb->cmd_head = 0;
2075	tcmu_flush_dcache_range(mb, sizeof(*mb));	2075	tcmu_flush_dcache_range(mb, sizeof(*mb));
		2076	clear_bit(TCMU_DEV_BIT_BROKEN, &udev->flags);
2076		2077
2077	del_timer(&udev->cmd_timer);	2078	del_timer(&udev->cmd_timer);
2078		2079

drivers/tty/hvc/Kconfig+1−1

@@ -88,7 +88,7 @@ config HVC_DCC · 87 unmodified lines
88		88
89	config HVC_RISCV_SBI	89	config HVC_RISCV_SBI
90	bool "RISC-V SBI console support"	90	bool "RISC-V SBI console support"
91	depends on RISCV_SBI	91	depends on RISCV_SBI_V01
92	select HVC_DRIVER	92	select HVC_DRIVER
93	help	93	help
94	This enables support for console output via RISC-V SBI calls, which	94	This enables support for console output via RISC-V SBI calls, which

drivers/tty/hvc/hvc_console.c+14−9

@@ -302,10 +302,6 @@ int hvc_instantiate(uint32_t vtermno, int index, const struct hv_ops *ops) · 301 unmodified lines
302	vtermnos[index] = vtermno;	302	vtermnos[index] = vtermno;
303	cons_ops[index] = ops;	303	cons_ops[index] = ops;
304		304
305	/* reserve all indices up to and including this index */
306	if (last_hvc < index)
307	last_hvc = index;
308
309	/* check if we need to re-register the kernel console */	305	/* check if we need to re-register the kernel console */
310	hvc_check_console(index);	306	hvc_check_console(index);
311		307
@@ -960,13 +956,22 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data, · 648 unmodified lines
960	cons_ops[i] == hp->ops)	956	cons_ops[i] == hp->ops)
961	break;	957	break;
962		958
963	/* no matching slot, just use a counter */	959	if (i >= MAX_NR_HVC_CONSOLES) {
964	if (i >= MAX_NR_HVC_CONSOLES)	960
965	i = ++last_hvc;	961	/* find 'empty' slot for console */
		962	for (i = 0; i < MAX_NR_HVC_CONSOLES && vtermnos[i] != -1; i++) {
		963	}
		964
		965	/* no matching slot, just use a counter */
		966	if (i == MAX_NR_HVC_CONSOLES)
		967	i = ++last_hvc + MAX_NR_HVC_CONSOLES;
		968	}
966		969
967	hp->index = i;	970	hp->index = i;
968	cons_ops[i] = ops;	971	if (i < MAX_NR_HVC_CONSOLES) {
969	vtermnos[i] = vtermno;	972	cons_ops[i] = ops;
		973	vtermnos[i] = vtermno;
		974	}
970		975
971	list_add_tail(&(hp->next), &hvc_structs);	976	list_add_tail(&(hp->next), &hvc_structs);
972	mutex_unlock(&hvc_structs_mutex);	977	mutex_unlock(&hvc_structs_mutex);

drivers/tty/rocket.c+14−11

@@ -632,18 +632,21 @@ init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev) · 631 unmodified lines
632	tty_port_init(&info->port);	632	tty_port_init(&info->port);
633	info->port.ops = &rocket_port_ops;	633	info->port.ops = &rocket_port_ops;
634	info->flags &= ~ROCKET_MODE_MASK;	634	info->flags &= ~ROCKET_MODE_MASK;
635	switch (pc104[board][line]) {	635	if (board < ARRAY_SIZE(pc104) && line < ARRAY_SIZE(pc104_1))
636	case 422:	636	switch (pc104[board][line]) {
637	info->flags \|= ROCKET_MODE_RS422;	637	case 422:
638	break;	638	info->flags \|= ROCKET_MODE_RS422;
639	case 485:	639	break;
640	info->flags \|= ROCKET_MODE_RS485;	640	case 485:
641	break;	641	info->flags \|= ROCKET_MODE_RS485;
642	case 232:	642	break;
643	default:	643	case 232:
		644	default:
		645	info->flags \|= ROCKET_MODE_RS232;
		646	break;
		647	}
		648	else
644	info->flags \|= ROCKET_MODE_RS232;	649	info->flags \|= ROCKET_MODE_RS232;
645	break;
646	}
647		650
648	info->intmask = RXF_TRIG \| TXFIFO_MT \| SRC_INT \| DELTA_CD \| DELTA_CTS \| DELTA_DSR;	651	info->intmask = RXF_TRIG \| TXFIFO_MT \| SRC_INT \| DELTA_CD \| DELTA_CTS \| DELTA_DSR;
649	if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {	652	if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {

drivers/tty/serial/Kconfig+1−1

@@ -86,7 +86,7 @@ config SERIAL_EARLYCON_ARM_SEMIHOST · 85 unmodified lines
86		86
87	config SERIAL_EARLYCON_RISCV_SBI	87	config SERIAL_EARLYCON_RISCV_SBI
88	bool "Early console using RISC-V SBI"	88	bool "Early console using RISC-V SBI"
89	depends on RISCV_SBI	89	depends on RISCV_SBI_V01
90	select SERIAL_CORE	90	select SERIAL_CORE
91	select SERIAL_CORE_CONSOLE	91	select SERIAL_CORE_CONSOLE
92	select SERIAL_EARLYCON	92	select SERIAL_EARLYCON

drivers/tty/serial/bcm63xx_uart.c+3−1

 	if (IS_ERR(clk) && pdev->dev.of_node)
 		clk = of_clk_get(pdev->dev.of_node, 0);
-	if (IS_ERR(clk))
+	if (IS_ERR(clk)) {
+		clk_put(clk);
 		return -ENODEV;
+	}
 	port->iotype = UPIO_MEM;
 	port->irq = res_irq->start;

drivers/tty/serial/owl-uart.c+7−0

 		return PTR_ERR(owl_port->clk);
 	}
+	ret = clk_prepare_enable(owl_port->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "could not enable clk\n");
+		return ret;
+	}
 	owl_port->port.dev = &pdev->dev;
 	owl_port->port.line = pdev->id;
 	owl_port->port.type = PORT_OWL;
 	uart_remove_one_port(&owl_uart_driver, &owl_port->port);
 	owl_uart_ports[pdev->id] = NULL;
+	clk_disable_unprepare(owl_port->clk);
 	return 0;
 }

drivers/tty/serial/sh-sci.c+10−3

 				tty_insert_flip_char(tport, c, TTY_NORMAL);
 		} else {
 			for (i = 0; i < count; i++) {
-				char c = serial_port_in(port, SCxRDR);
+				char c;
-				status = serial_port_in(port, SCxSR);
+				if (port->type == PORT_SCIF ||
+				    port->type == PORT_HSCIF) {
+					status = serial_port_in(port, SCxSR);
+					c = serial_port_in(port, SCxRDR);
+				} else {
+					c = serial_port_in(port, SCxRDR);
+					status = serial_port_in(port, SCxSR);
+				}
 				if (uart_handle_sysrq_char(port, c)) {
 					count--; i--;
 					continue;

drivers/tty/serial/sunhv.c+3−0

@@ -567,6 +567,9 @@ static int hv_probe(struct platform_device *op) · 566 unmodified lines
567	sunserial_console_match(&sunhv_console, op->dev.of_node,	567	sunserial_console_match(&sunhv_console, op->dev.of_node,
568	&sunhv_reg, port->line, false);	568	&sunhv_reg, port->line, false);
569		569
		570	/* We need to initialize lock even for non-registered console */
		571	spin_lock_init(&port->lock);
		572
570	err = uart_add_one_port(&sunhv_reg, port);	573	err = uart_add_one_port(&sunhv_reg, port);
571	if (err)	574	if (err)
572	goto out_unregister_driver;	575	goto out_unregister_driver;

drivers/tty/serial/xilinx_uartps.c+49−162

@@ -26,13 +26,15 @@ · 25 unmodified lines
26		26
27	#define CDNS_UART_TTY_NAME "ttyPS"	27	#define CDNS_UART_TTY_NAME "ttyPS"
28	#define CDNS_UART_NAME "xuartps"	28	#define CDNS_UART_NAME "xuartps"
		29	#define CDNS_UART_MAJOR 0 /* use dynamic node allocation */
		30	#define CDNS_UART_MINOR 0 /* works best with devtmpfs */
		31	#define CDNS_UART_NR_PORTS 16
29	#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */	32	#define CDNS_UART_FIFO_SIZE 64 /* FIFO size */
30	#define CDNS_UART_REGISTER_SPACE 0x1000	33	#define CDNS_UART_REGISTER_SPACE 0x1000
31	#define TX_TIMEOUT 500000	34	#define TX_TIMEOUT 500000
32		35
33	/* Rx Trigger level */	36	/* Rx Trigger level */
34	static int rx_trigger_level = 56;	37	static int rx_trigger_level = 56;
35	static int uartps_major;
36	module_param(rx_trigger_level, uint, 0444);	38	module_param(rx_trigger_level, uint, 0444);
37	MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");	39	MODULE_PARM_DESC(rx_trigger_level, "Rx trigger level, 1-63 bytes");
38		40
@@ -188,7 +190,6 @@ MODULE_PARM_DESC(rx_timeout, "Rx timeout, 1-255"); · 149 unmodified lines
188	* @pclk: APB clock	190	* @pclk: APB clock
189	* @cdns_uart_driver: Pointer to UART driver	191	* @cdns_uart_driver: Pointer to UART driver
190	* @baud: Current baud rate	192	* @baud: Current baud rate
191	* @id: Port ID
192	* @clk_rate_change_nb: Notifier block for clock changes	193	* @clk_rate_change_nb: Notifier block for clock changes
193	* @quirks: Flags for RXBS support.	194	* @quirks: Flags for RXBS support.
194	*/	195	*/
@@ -198,7 +199,6 @@ struct cdns_uart { · 3 unmodified lines
198	struct clk *pclk;	199	struct clk *pclk;
199	struct uart_driver *cdns_uart_driver;	200	struct uart_driver *cdns_uart_driver;
200	unsigned int baud;	201	unsigned int baud;
201	int id;
202	struct notifier_block clk_rate_change_nb;	202	struct notifier_block clk_rate_change_nb;
203	u32 quirks;	203	u32 quirks;
204	bool cts_override;	204	bool cts_override;
@@ -1133,6 +1133,8 @@ static const struct uart_ops cdns_uart_ops = { · 928 unmodified lines
1133	#endif	1133	#endif
1134	};	1134	};
1135		1135
		1136	static struct uart_driver cdns_uart_uart_driver;
		1137
1136	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1138	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1137	/**	1139	/**
1138	* cdns_uart_console_putchar - write the character to the FIFO buffer	1140	* cdns_uart_console_putchar - write the character to the FIFO buffer
@@ -1272,6 +1274,16 @@ static int cdns_uart_console_setup(struct console co, char options) · 133 unmodified lines
1272		1274
1273	return uart_set_options(port, co, baud, parity, bits, flow);	1275	return uart_set_options(port, co, baud, parity, bits, flow);
1274	}	1276	}
		1277
		1278	static struct console cdns_uart_console = {
		1279	.name = CDNS_UART_TTY_NAME,
		1280	.write = cdns_uart_console_write,
		1281	.device = uart_console_device,
		1282	.setup = cdns_uart_console_setup,
		1283	.flags = CON_PRINTBUFFER,
		1284	.index = -1, /* Specified on the cmdline (e.g. console=ttyPS ) */
		1285	.data = &cdns_uart_uart_driver,
		1286	};
1275	#endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */	1287	#endif /* CONFIG_SERIAL_XILINX_PS_UART_CONSOLE */
1276		1288
1277	#ifdef CONFIG_PM_SLEEP	1289	#ifdef CONFIG_PM_SLEEP
@@ -1403,89 +1415,8 @@ static const struct of_device_id cdns_uart_of_match[] = { · 125 unmodified lines
1403	};	1415	};
1404	MODULE_DEVICE_TABLE(of, cdns_uart_of_match);	1416	MODULE_DEVICE_TABLE(of, cdns_uart_of_match);
1405		1417
1406	/*	1418	/* Temporary variable for storing number of instances */
1407	* Maximum number of instances without alias IDs but if there is alias	1419	static int instances;
1408	* which target "< MAX_UART_INSTANCES" range this ID can't be used.
1409	*/
1410	#define MAX_UART_INSTANCES 32
1411
1412	/* Stores static aliases list */
1413	static DECLARE_BITMAP(alias_bitmap, MAX_UART_INSTANCES);
1414	static int alias_bitmap_initialized;
1415
1416	/* Stores actual bitmap of allocated IDs with alias IDs together */
1417	static DECLARE_BITMAP(bitmap, MAX_UART_INSTANCES);
1418	/* Protect bitmap operations to have unique IDs */
1419	static DEFINE_MUTEX(bitmap_lock);
1420
1421	static int cdns_get_id(struct platform_device *pdev)
1422	{
1423	int id, ret;
1424
1425	mutex_lock(&bitmap_lock);
1426
1427	/* Alias list is stable that's why get alias bitmap only once */
1428	if (!alias_bitmap_initialized) {
1429	ret = of_alias_get_alias_list(cdns_uart_of_match, "serial",
1430	alias_bitmap, MAX_UART_INSTANCES);
1431	if (ret && ret != -EOVERFLOW) {
1432	mutex_unlock(&bitmap_lock);
1433	return ret;
1434	}
1435
1436	alias_bitmap_initialized++;
1437	}
1438
1439	/* Make sure that alias ID is not taken by instance without alias */
1440	bitmap_or(bitmap, bitmap, alias_bitmap, MAX_UART_INSTANCES);
1441
1442	dev_dbg(&pdev->dev, "Alias bitmap: %*pb\n",
1443	MAX_UART_INSTANCES, bitmap);
1444
1445	/* Look for a serialN alias */
1446	id = of_alias_get_id(pdev->dev.of_node, "serial");
1447	if (id < 0) {
1448	dev_warn(&pdev->dev,
1449	"No serial alias passed. Using the first free id\n");
1450
1451	/*
1452	* Start with id 0 and check if there is no serial0 alias
1453	* which points to device which is compatible with this driver.
1454	* If alias exists then try next free position.
1455	*/
1456	id = 0;
1457
1458	for (;;) {
1459	dev_info(&pdev->dev, "Checking id %d\n", id);
1460	id = find_next_zero_bit(bitmap, MAX_UART_INSTANCES, id);
1461
1462	/* No free empty instance */
1463	if (id == MAX_UART_INSTANCES) {
1464	dev_err(&pdev->dev, "No free ID\n");
1465	mutex_unlock(&bitmap_lock);
1466	return -EINVAL;
1467	}
1468
1469	dev_dbg(&pdev->dev, "The empty id is %d\n", id);
1470	/* Check if ID is empty */
1471	if (!test_and_set_bit(id, bitmap)) {
1472	/* Break the loop if bit is taken */
1473	dev_dbg(&pdev->dev,
1474	"Selected ID %d allocation passed\n",
1475	id);
1476	break;
1477	}
1478	dev_dbg(&pdev->dev,
1479	"Selected ID %d allocation failed\n", id);
1480	/* if taking bit fails then try next one */
1481	id++;
1482	}
1483	}
1484
1485	mutex_unlock(&bitmap_lock);
1486
1487	return id;
1488	}
1489		1420
1490	/**	1421	/**
1491	* cdns_uart_probe - Platform driver probe	1422	* cdns_uart_probe - Platform driver probe
@@ -1495,16 +1426,11 @@ static int cdns_get_id(struct platform_device *pdev) · 3 unmodified lines
1495	*/	1426	*/
1496	static int cdns_uart_probe(struct platform_device *pdev)	1427	static int cdns_uart_probe(struct platform_device *pdev)
1497	{	1428	{
1498	int rc, irq;	1429	int rc, id, irq;
1499	struct uart_port *port;	1430	struct uart_port *port;
1500	struct resource *res;	1431	struct resource *res;
1501	struct cdns_uart *cdns_uart_data;	1432	struct cdns_uart *cdns_uart_data;
1502	const struct of_device_id *match;	1433	const struct of_device_id *match;
1503	struct uart_driver *cdns_uart_uart_driver;
1504	char *driver_name;
1505	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1506	struct console *cdns_uart_console;
1507	#endif
1508		1434
1509	cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data),	1435	cdns_uart_data = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_data),
1510	GFP_KERNEL);	1436	GFP_KERNEL);
@@ -1514,64 +1440,35 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines
1514	if (!port)	1440	if (!port)
1515	return -ENOMEM;	1441	return -ENOMEM;
1516		1442
1517	cdns_uart_uart_driver = devm_kzalloc(&pdev->dev,	1443	/* Look for a serialN alias */
1518	sizeof(*cdns_uart_uart_driver),	1444	id = of_alias_get_id(pdev->dev.of_node, "serial");
1519	GFP_KERNEL);	1445	if (id < 0)
1520	if (!cdns_uart_uart_driver)	1446	id = 0;
1521	return -ENOMEM;
1522
1523	cdns_uart_data->id = cdns_get_id(pdev);
1524	if (cdns_uart_data->id < 0)
1525	return cdns_uart_data->id;
1526		1447
1527	/* There is a need to use unique driver name */	1448	if (id >= CDNS_UART_NR_PORTS) {
1528	driver_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s%d",	1449	dev_err(&pdev->dev, "Cannot get uart_port structure\n");
1529	CDNS_UART_NAME, cdns_uart_data->id);	1450	return -ENODEV;
1530	if (!driver_name) {
1531	rc = -ENOMEM;
1532	goto err_out_id;
1533	}	1451	}
1534		1452
1535	cdns_uart_uart_driver->owner = THIS_MODULE;	1453	if (!cdns_uart_uart_driver.state) {
1536	cdns_uart_uart_driver->driver_name = driver_name;	1454	cdns_uart_uart_driver.owner = THIS_MODULE;
1537	cdns_uart_uart_driver->dev_name = CDNS_UART_TTY_NAME;	1455	cdns_uart_uart_driver.driver_name = CDNS_UART_NAME;
1538	cdns_uart_uart_driver->major = uartps_major;	1456	cdns_uart_uart_driver.dev_name = CDNS_UART_TTY_NAME;
1539	cdns_uart_uart_driver->minor = cdns_uart_data->id;	1457	cdns_uart_uart_driver.major = CDNS_UART_MAJOR;
1540	cdns_uart_uart_driver->nr = 1;	1458	cdns_uart_uart_driver.minor = CDNS_UART_MINOR;
1541		1459	cdns_uart_uart_driver.nr = CDNS_UART_NR_PORTS;
1542	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1460	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1543	cdns_uart_console = devm_kzalloc(&pdev->dev, sizeof(*cdns_uart_console),	1461	cdns_uart_uart_driver.cons = &cdns_uart_console;
1544	GFP_KERNEL);
1545	if (!cdns_uart_console) {
1546	rc = -ENOMEM;
1547	goto err_out_id;
1548	}
1549
1550	strncpy(cdns_uart_console->name, CDNS_UART_TTY_NAME,
1551	sizeof(cdns_uart_console->name));
1552	cdns_uart_console->index = cdns_uart_data->id;
1553	cdns_uart_console->write = cdns_uart_console_write;
1554	cdns_uart_console->device = uart_console_device;
1555	cdns_uart_console->setup = cdns_uart_console_setup;
1556	cdns_uart_console->flags = CON_PRINTBUFFER;
1557	cdns_uart_console->data = cdns_uart_uart_driver;
1558	cdns_uart_uart_driver->cons = cdns_uart_console;
1559	#endif	1462	#endif
1560		1463
1561	rc = uart_register_driver(cdns_uart_uart_driver);	1464	rc = uart_register_driver(&cdns_uart_uart_driver);
1562	if (rc < 0) {	1465	if (rc < 0) {
1563	dev_err(&pdev->dev, "Failed to register driver\n");	1466	dev_err(&pdev->dev, "Failed to register driver\n");
1564	goto err_out_id;	1467	return rc;
		1468	}
1565	}	1469	}
1566		1470
1567	cdns_uart_data->cdns_uart_driver = cdns_uart_uart_driver;	1471	cdns_uart_data->cdns_uart_driver = &cdns_uart_uart_driver;
1568
1569	/*
1570	* Setting up proper name_base needs to be done after uart
1571	* registration because tty_driver structure is not filled.
1572	* name_base is 0 by default.
1573	*/
1574	cdns_uart_uart_driver->tty_driver->name_base = cdns_uart_data->id;
1575		1472
1576	match = of_match_node(cdns_uart_of_match, pdev->dev.of_node);	1473	match = of_match_node(cdns_uart_of_match, pdev->dev.of_node);
1577	if (match && match->data) {	1474	if (match && match->data) {
@@ -1649,6 +1546,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 71 unmodified lines
1649	port->ops = &cdns_uart_ops;	1546	port->ops = &cdns_uart_ops;
1650	port->fifosize = CDNS_UART_FIFO_SIZE;	1547	port->fifosize = CDNS_UART_FIFO_SIZE;
1651	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE);	1548	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_XILINX_PS_UART_CONSOLE);
		1549	port->line = id;
1652		1550
1653	/*	1551	/*
1654	* Register the port.	1552	* Register the port.
@@ -1680,7 +1578,7 @@ static int cdns_uart_probe(struct platform_device *pdev) · 25 unmodified lines
1680	console_port = port;	1578	console_port = port;
1681	#endif	1579	#endif
1682		1580
1683	rc = uart_add_one_port(cdns_uart_uart_driver, port);	1581	rc = uart_add_one_port(&cdns_uart_uart_driver, port);
1684	if (rc) {	1582	if (rc) {
1685	dev_err(&pdev->dev,	1583	dev_err(&pdev->dev,
1686	"uart_add_one_port() failed; err=%i\n", rc);	1584	"uart_add_one_port() failed; err=%i\n", rc);
@@ -1690,13 +1588,15 @@ static int cdns_uart_probe(struct platform_device *pdev) · 3 unmodified lines
1690	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE	1588	#ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
1691	/* This is not port which is used for console that's why clean it up */	1589	/* This is not port which is used for console that's why clean it up */
1692	if (console_port == port &&	1590	if (console_port == port &&
1693	!(cdns_uart_uart_driver->cons->flags & CON_ENABLED))	1591	!(cdns_uart_uart_driver.cons->flags & CON_ENABLED))
1694	console_port = NULL;	1592	console_port = NULL;
1695	#endif	1593	#endif
1696		1594
1697	uartps_major = cdns_uart_uart_driver->tty_driver->major;
1698	cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,	1595	cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,
1699	"cts-override");	1596	"cts-override");
		1597
		1598	instances++;
		1599
1700	return 0;	1600	return 0;
1701		1601
1702	err_out_pm_disable:	1602	err_out_pm_disable:
@@ -1712,12 +1612,8 @@ err_out_clk_disable: · 9 unmodified lines
1712	err_out_clk_dis_pclk:	1612	err_out_clk_dis_pclk:
1713	clk_disable_unprepare(cdns_uart_data->pclk);	1613	clk_disable_unprepare(cdns_uart_data->pclk);
1714	err_out_unregister_driver:	1614	err_out_unregister_driver:
1715	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);	1615	if (!instances)
1716	err_out_id:	1616	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1717	mutex_lock(&bitmap_lock);
1718	if (cdns_uart_data->id < MAX_UART_INSTANCES)
1719	clear_bit(cdns_uart_data->id, bitmap);
1720	mutex_unlock(&bitmap_lock);
1721	return rc;	1617	return rc;
1722	}	1618	}
1723		1619
@@ -1740,10 +1636,6 @@ static int cdns_uart_remove(struct platform_device *pdev) · 16 unmodified lines
1740	#endif	1636	#endif
1741	rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port);	1637	rc = uart_remove_one_port(cdns_uart_data->cdns_uart_driver, port);
1742	port->mapbase = 0;	1638	port->mapbase = 0;
1743	mutex_lock(&bitmap_lock);
1744	if (cdns_uart_data->id < MAX_UART_INSTANCES)
1745	clear_bit(cdns_uart_data->id, bitmap);
1746	mutex_unlock(&bitmap_lock);
1747	clk_disable_unprepare(cdns_uart_data->uartclk);	1639	clk_disable_unprepare(cdns_uart_data->uartclk);
1748	clk_disable_unprepare(cdns_uart_data->pclk);	1640	clk_disable_unprepare(cdns_uart_data->pclk);
1749	pm_runtime_disable(&pdev->dev);	1641	pm_runtime_disable(&pdev->dev);
@@ -1756,13 +1648,8 @@ static int cdns_uart_remove(struct platform_device *pdev) · 6 unmodified lines
1756	console_port = NULL;	1648	console_port = NULL;
1757	#endif	1649	#endif
1758		1650
1759	/* If this is last instance major number should be initialized */	1651	if (!--instances)
1760	mutex_lock(&bitmap_lock);	1652	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1761	if (bitmap_empty(bitmap, MAX_UART_INSTANCES))
1762	uartps_major = 0;
1763	mutex_unlock(&bitmap_lock);
1764
1765	uart_unregister_driver(cdns_uart_data->cdns_uart_driver);
1766	return rc;	1653	return rc;
1767	}	1654	}
1768		1655

drivers/tty/sysrq.c+2−0

 		return 1;
 	return sysrq_enabled;
 }
+EXPORT_SYMBOL_GPL(sysrq_mask);
 /*
  * A value of 1 means 'all', other nonzero values are an op mask:
 	return 0;
 }
+EXPORT_SYMBOL_GPL(sysrq_toggle_support);
 static int __sysrq_swap_key_ops(int key, struct sysrq_key_op *insert_op_p,
                                 struct sysrq_key_op *remove_op_p)

drivers/tty/vt/vt.c+4−3

 #include <linux/errno.h>
 #include <linux/kd.h>
 #include <linux/slab.h>
+#include <linux/vmalloc.h>
 #include <linux/major.h>
 #include <linux/mm.h>
 #include <linux/console.h>
 	/* allocate everything in one go */
 	memsize = cols * rows * sizeof(char32_t);
 	memsize += rows * sizeof(char32_t *);
-	p = kmalloc(memsize, GFP_KERNEL);
+	p = vmalloc(memsize);
 	if (!p)
 		return NULL;
 static void vc_uniscr_set(struct vc_data *vc, struct uni_screen *new_uniscr)
 {
-	kfree(vc->vc_uni_screen);
+	vfree(vc->vc_uni_screen);
 	vc->vc_uni_screen = new_uniscr;
 }
 	if (new_cols == vc->vc_cols && new_rows == vc->vc_rows)
 		return 0;
-	if (new_screen_size > (4 << 20))
+	if (new_screen_size > KMALLOC_MAX_SIZE)
 		return -EINVAL;
 	newscreen = kzalloc(new_screen_size, GFP_USER);
 	if (!newscreen)

drivers/usb/class/cdc-acm.c+31−5

 exit:
 	retval = usb_submit_urb(urb, GFP_ATOMIC);
-	if (retval && retval != -EPERM)
+	if (retval && retval != -EPERM && retval != -ENODEV)
 		dev_err(&acm->control->dev,
 			"%s - usb_submit_urb failed: %d\n", __func__, retval);
+	else
+		dev_vdbg(&acm->control->dev,
+			"control resubmission terminated %d\n", retval);
 }
 static int acm_submit_read_urb(struct acm *acm, int index, gfp_t mem_flags)
 			dev_err(&acm->data->dev,
 				"urb %d failed submission with %d\n",
 				index, res);
+		} else {
+			dev_vdbg(&acm->data->dev, "intended failure %d\n", res);
 		}
 		set_bit(index, &acm->read_urbs_free);
 		return res;
 	int status = urb->status;
 	bool stopped = false;
 	bool stalled = false;
+	bool cooldown = false;
 	dev_vdbg(&acm->data->dev, "got urb %d, len %d, status %d\n",
 		rb->index, urb->actual_length, status);
 			__func__, status);
 		stopped = true;
 		break;
+	case -EOVERFLOW:
+	case -EPROTO:
+		dev_dbg(&acm->data->dev,
+			"%s - cooling babbling device\n", __func__);
+		usb_mark_last_busy(acm->dev);
+		set_bit(rb->index, &acm->urbs_in_error_delay);
+		cooldown = true;
+		break;
 	default:
 		dev_dbg(&acm->data->dev,
 			"%s - nonzero urb status received: %d\n",
 	 */
 	smp_mb__after_atomic();
-	if (stopped || stalled) {
+	if (stopped || stalled || cooldown) {
 		if (stalled)
 			schedule_work(&acm->work);
+		else if (cooldown)
+			schedule_delayed_work(&acm->dwork, HZ / 2);
 		return;
 	}
 	struct acm *acm = container_of(work, struct acm, work);
 	if (test_bit(EVENT_RX_STALL, &acm->flags)) {
-		if (!(usb_autopm_get_interface(acm->data))) {
+		smp_mb(); /* against acm_suspend() */
+		if (!acm->susp_count) {
 			for (i = 0; i < acm->rx_buflimit; i++)
 				usb_kill_urb(acm->read_urbs[i]);
 			usb_clear_halt(acm->dev, acm->in);
 			acm_submit_read_urbs(acm, GFP_KERNEL);
-			usb_autopm_put_interface(acm->data);
+			clear_bit(EVENT_RX_STALL, &acm->flags);
 		}
-		clear_bit(EVENT_RX_STALL, &acm->flags);
+	}
+	if (test_and_clear_bit(ACM_ERROR_DELAY, &acm->flags)) {
+		for (i = 0; i < ACM_NR; i++)
+			if (test_and_clear_bit(i, &acm->urbs_in_error_delay))
+					acm_submit_read_urb(acm, i, GFP_NOIO);
 	}
 	if (test_and_clear_bit(EVENT_TTY_WAKEUP, &acm->flags))
 	acm->readsize = readsize;
 	acm->rx_buflimit = num_rx_buf;
 	INIT_WORK(&acm->work, acm_softint);
+	INIT_DELAYED_WORK(&acm->dwork, acm_softint);
 	init_waitqueue_head(&acm->wioctl);
 	spin_lock_init(&acm->write_lock);
 	spin_lock_init(&acm->read_lock);
 	acm_kill_urbs(acm);
 	cancel_work_sync(&acm->work);
+	cancel_delayed_work_sync(&acm->dwork);
 	tty_unregister_device(acm_tty_driver, acm->minor);
 	acm_kill_urbs(acm);
 	cancel_work_sync(&acm->work);
+	cancel_delayed_work_sync(&acm->dwork);
+	acm->urbs_in_error_delay = 0;
 	return 0;
 }

drivers/usb/class/cdc-acm.h+4−1

 #		define EVENT_TTY_WAKEUP	0
 #		define EVENT_RX_STALL	1
 #		define ACM_THROTTLED	2
+#		define ACM_ERROR_DELAY	3
+	unsigned long urbs_in_error_delay;		/* these need to be restarted after a delay */
 	struct usb_cdc_line_coding line;		/* bits, stop, parity */
-	struct work_struct work;			/* work queue entry for line discipline waking up */
+	struct work_struct work;			/* work queue entry for various purposes*/
+	struct delayed_work dwork;			/* for cool downs needed in error recovery */
 	unsigned int ctrlin;				/* input control lines (DCD, DSR, RI, break, overruns) */
 	unsigned int ctrlout;				/* output control lines (DTR, RTS) */
 	struct async_icount iocount;			/* counters for control line changes */

drivers/usb/core/hub.c+15−3

 #ifdef CONFIG_PM
 			udev->reset_resume = 1;
 #endif
+			/* Don't set the change_bits when the device
+			 * was powered off.
+			 */
+			if (test_bit(port1, hub->power_bits))
+				set_bit(port1, hub->change_bits);
 		} else {
 			/* The power session is gone; tell hub_wq */
 {
 	int old_scheme_first_port =
 		port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME;
-	int quick_enumeration = (udev->speed == USB_SPEED_HIGH);
 	if (udev->speed >= USB_SPEED_SUPER)
 		return false;
-	return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first
+	return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first);
-			      || quick_enumeration);
 }
 /* Is a USB 3.0 port in the Inactive or Compliance Mode state?
 		if (portchange & USB_PORT_STAT_C_ENABLE)
 			usb_clear_port_feature(hub->hdev, port1,
 					USB_PORT_FEAT_C_ENABLE);
+		/*
+		 * Whatever made this reset-resume necessary may have
+		 * turned on the port1 bit in hub->change_bits.  But after
+		 * a successful reset-resume we want the bit to be clear;
+		 * if it was on it would indicate that something happened
+		 * following the reset-resume.
+		 */
+		clear_bit(port1, hub->change_bits);
 	}
 	return status;

drivers/usb/core/message.c+8−1

 	int i, retval;
 	spin_lock_irqsave(&io->lock, flags);
-	if (io->status) {
+	if (io->status || io->count == 0) {
 		spin_unlock_irqrestore(&io->lock, flags);
 		return;
 	}
 	/* shut everything down */
 	io->status = -ECONNRESET;
+	io->count++;		/* Keep the request alive until we're done */
 	spin_unlock_irqrestore(&io->lock, flags);
 	for (i = io->entries - 1; i >= 0; --i) {
 			dev_warn(&io->dev->dev, "%s, unlink --> %d\n",
 				 __func__, retval);
 	}
+	spin_lock_irqsave(&io->lock, flags);
+	io->count--;
+	if (!io->count)
+		complete(&io->complete);
+	spin_unlock_irqrestore(&io->lock, flags);
 }
 EXPORT_SYMBOL_GPL(usb_sg_cancel);

drivers/usb/core/quirks.c+4−0

 	/* Corsair K70 LUX */
 	{ USB_DEVICE(0x1b1c, 0x1b36), .driver_info = USB_QUIRK_DELAY_INIT },
+	/* Corsair K70 RGB RAPDIFIRE */
+	{ USB_DEVICE(0x1b1c, 0x1b38), .driver_info = USB_QUIRK_DELAY_INIT |
+	  USB_QUIRK_DELAY_CTRL_MSG },
 	/* MIDI keyboard WORLDE MINI */
 	{ USB_DEVICE(0x1c75, 0x0204), .driver_info =
 			USB_QUIRK_CONFIG_INTF_STRINGS },

drivers/usb/dwc3/core.h+6−2

 /* Global TX Fifo Size Register */
 #define DWC31_GTXFIFOSIZ_TXFRAMNUM	BIT(15)		/* DWC_usb31 only */
-#define DWC31_GTXFIFOSIZ_TXFDEF(n)	((n) & 0x7fff)	/* DWC_usb31 only */
+#define DWC31_GTXFIFOSIZ_TXFDEP(n)	((n) & 0x7fff)	/* DWC_usb31 only */
-#define DWC3_GTXFIFOSIZ_TXFDEF(n)	((n) & 0xffff)
+#define DWC3_GTXFIFOSIZ_TXFDEP(n)	((n) & 0xffff)
 #define DWC3_GTXFIFOSIZ_TXFSTADDR(n)	((n) & 0xffff0000)
+/* Global RX Fifo Size Register */
+#define DWC31_GRXFIFOSIZ_RXFDEP(n)	((n) & 0x7fff)	/* DWC_usb31 only */
+#define DWC3_GRXFIFOSIZ_RXFDEP(n)	((n) & 0xffff)
 /* Global Event Size Registers */
 #define DWC3_GEVNTSIZ_INTMASK		BIT(31)
 #define DWC3_GEVNTSIZ_SIZE(n)		((n) & 0xffff)

drivers/usb/dwc3/gadget.c+47−29

 	u32			reg;
 	u8			link_state;
-	u8			speed;
 	/*
 	 * According to the Databook Remote wakeup request should
 	 */
 	reg = dwc3_readl(dwc->regs, DWC3_DSTS);
-	speed = reg & DWC3_DSTS_CONNECTSPD;
-	if ((speed == DWC3_DSTS_SUPERSPEED) ||
-	    (speed == DWC3_DSTS_SUPERSPEED_PLUS))
-		return 0;
 	link_state = DWC3_DSTS_USBLNKST(reg);
 	switch (link_state) {
+	case DWC3_LINK_STATE_RESET:
 	case DWC3_LINK_STATE_RX_DET:	/* in HS, means Early Suspend */
 	case DWC3_LINK_STATE_U3:	/* in HS, means SUSPEND */
+	case DWC3_LINK_STATE_RESUME:
 		break;
 	default:
 		return -EINVAL;
 {
 	struct dwc3 *dwc = dep->dwc;
 	int mdwidth;
-	int kbytes;
 	int size;
 	mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
 	size = dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(dep->number >> 1));
 	if (dwc3_is_usb31(dwc))
-		size = DWC31_GTXFIFOSIZ_TXFDEF(size);
+		size = DWC31_GTXFIFOSIZ_TXFDEP(size);
 	else
-		size = DWC3_GTXFIFOSIZ_TXFDEF(size);
+		size = DWC3_GTXFIFOSIZ_TXFDEP(size);
 	/* FIFO Depth is in MDWDITH bytes. Multiply */
 	size *= mdwidth;
-	kbytes = size / 1024;
-	if (kbytes == 0)
-		kbytes = 1;
 	/*
-	 * FIFO sizes account an extra MDWIDTH * (kbytes + 1) bytes for
+	 * To meet performance requirement, a minimum TxFIFO size of 3x
-	 * internal overhead. We don't really know how these are used,
+	 * MaxPacketSize is recommended for endpoints that support burst and a
-	 * but documentation say it exists.
+	 * minimum TxFIFO size of 2x MaxPacketSize for endpoints that don't
+	 * support burst. Use those numbers and we can calculate the max packet
+	 * limit as below.
 	 */
-	size -= mdwidth * (kbytes + 1);
+	if (dwc->maximum_speed >= USB_SPEED_SUPER)
-	size /= kbytes;
+		size /= 3;
+	else
+		size /= 2;
 	usb_ep_set_maxpacket_limit(&dep->endpoint, size);
 static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep)
 {
 	struct dwc3 *dwc = dep->dwc;
+	int mdwidth;
+	int size;
+	mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
-	usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
+	/* MDWIDTH is represented in bits, convert to bytes */
+	mdwidth /= 8;
+	/* All OUT endpoints share a single RxFIFO space */
+	size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0));
+	if (dwc3_is_usb31(dwc))
+		size = DWC31_GRXFIFOSIZ_RXFDEP(size);
+	else
+		size = DWC3_GRXFIFOSIZ_RXFDEP(size);
+	/* FIFO depth is in MDWDITH bytes */
+	size *= mdwidth;
+	/*
+	 * To meet performance requirement, a minimum recommended RxFIFO size
+	 * is defined as follow:
+	 * RxFIFO size >= (3 x MaxPacketSize) +
+	 * (3 x 8 bytes setup packets size) + (16 bytes clock crossing margin)
+	 *
+	 * Then calculate the max packet limit as below.
+	 */
+	size -= (3 * 8) + 16;
+	if (size < 0)
+		size = 0;
+	else
+		size /= 3;
+	usb_ep_set_maxpacket_limit(&dep->endpoint, size);
 	dep->endpoint.max_streams = 15;
 	dep->endpoint.ops = &dwc3_gadget_ep_ops;
 	list_add_tail(&dep->endpoint.ep_list,
 static bool dwc3_gadget_ep_request_completed(struct dwc3_request *req)
 {
-	/*
+	return req->num_pending_sgs == 0;
-	 * For OUT direction, host may send less than the setup
-	 * length. Return true for all OUT requests.
-	 */
-	if (!req->direction)
-		return true;
-	return req->request.actual == req->request.length;
 }
 static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep,
 	req->request.actual = req->request.length - req->remaining;
-	if (!dwc3_gadget_ep_request_completed(req) ||
+	if (!dwc3_gadget_ep_request_completed(req)) {
-			req->num_pending_sgs) {
 		__dwc3_gadget_kick_transfer(dep);
 		goto out;
 	}

drivers/usb/early/xhci-dbc.c+4−4

@@ -728,19 +728,19 @@ static void xdbc_handle_tx_event(struct xdbc_trb *evt_trb) · 727 unmodified lines
728	case COMP_USB_TRANSACTION_ERROR:	728	case COMP_USB_TRANSACTION_ERROR:
729	case COMP_STALL_ERROR:	729	case COMP_STALL_ERROR:
730	default:	730	default:
731	if (ep_id == XDBC_EPID_OUT)	731	if (ep_id == XDBC_EPID_OUT \|\| ep_id == XDBC_EPID_OUT_INTEL)
732	xdbc.flags \|= XDBC_FLAGS_OUT_STALL;	732	xdbc.flags \|= XDBC_FLAGS_OUT_STALL;
733	if (ep_id == XDBC_EPID_IN)	733	if (ep_id == XDBC_EPID_IN \|\| ep_id == XDBC_EPID_IN_INTEL)
734	xdbc.flags \|= XDBC_FLAGS_IN_STALL;	734	xdbc.flags \|= XDBC_FLAGS_IN_STALL;
735		735
736	xdbc_trace("endpoint %d stalled\n", ep_id);	736	xdbc_trace("endpoint %d stalled\n", ep_id);
737	break;	737	break;
738	}	738	}
739		739
740	if (ep_id == XDBC_EPID_IN) {	740	if (ep_id == XDBC_EPID_IN \|\| ep_id == XDBC_EPID_IN_INTEL) {
741	xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS;	741	xdbc.flags &= ~XDBC_FLAGS_IN_PROCESS;
742	xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);	742	xdbc_bulk_transfer(NULL, XDBC_MAX_PACKET, true);
743	} else if (ep_id == XDBC_EPID_OUT) {	743	} else if (ep_id == XDBC_EPID_OUT \|\| ep_id == XDBC_EPID_OUT_INTEL) {
744	xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS;	744	xdbc.flags &= ~XDBC_FLAGS_OUT_PROCESS;
745	} else {	745	} else {
746	xdbc_trace("invalid endpoint id %d\n", ep_id);	746	xdbc_trace("invalid endpoint id %d\n", ep_id);

drivers/usb/early/xhci-dbc.h+16−2

@@ -120,8 +120,22 @@ struct xdbc_ring { · 119 unmodified lines
120	u32 cycle_state;	120	u32 cycle_state;
121	};	121	};
122		122
123	#define XDBC_EPID_OUT 2	123	/*
124	#define XDBC_EPID_IN 3	124	* These are the "Endpoint ID" (also known as "Context Index") values for the
		125	* OUT Transfer Ring and the IN Transfer Ring of a Debug Capability Context data
		126	* structure.
		127	* According to the "eXtensible Host Controller Interface for Universal Serial
		128	* Bus (xHCI)" specification, section "7.6.3.2 Endpoint Contexts and Transfer
		129	* Rings", these should be 0 and 1, and those are the values AMD machines give
		130	* you; but Intel machines seem to use the formula from section "4.5.1 Device
		131	* Context Index", which is supposed to be used for the Device Context only.
		132	* Luckily the values from Intel don't overlap with those from AMD, so we can
		133	* just test for both.
		134	*/
		135	#define XDBC_EPID_OUT 0
		136	#define XDBC_EPID_IN 1
		137	#define XDBC_EPID_OUT_INTEL 2
		138	#define XDBC_EPID_IN_INTEL 3
125		139
126	struct xdbc_state {	140	struct xdbc_state {
127	u16 vendor;	141	u16 vendor;

drivers/usb/gadget/function/f_fs.c+4−0

@@ -1813,6 +1813,10 @@ static void ffs_data_reset(struct ffs_data *ffs) · 1812 unmodified lines
1813	ffs->state = FFS_READ_DESCRIPTORS;	1813	ffs->state = FFS_READ_DESCRIPTORS;
1814	ffs->setup_state = FFS_NO_SETUP;	1814	ffs->setup_state = FFS_NO_SETUP;
1815	ffs->flags = 0;	1815	ffs->flags = 0;
		1816
		1817	ffs->ms_os_descs_ext_prop_count = 0;
		1818	ffs->ms_os_descs_ext_prop_name_len = 0;
		1819	ffs->ms_os_descs_ext_prop_data_len = 0;
1816	}	1820	}
1817		1821
1818		1822

drivers/usb/gadget/legacy/raw_gadget.c+42−29

@@ -81,6 +81,7 @@ static int raw_event_queue_add(struct raw_event_queue *queue, · 80 unmodified lines
81	static struct usb_raw_event *raw_event_queue_fetch(	81	static struct usb_raw_event *raw_event_queue_fetch(
82	struct raw_event_queue *queue)	82	struct raw_event_queue *queue)
83	{	83	{
		84	int ret;
84	unsigned long flags;	85	unsigned long flags;
85	struct usb_raw_event *event;	86	struct usb_raw_event *event;
86		87
@@ -89,11 +90,18 @@ static struct usb_raw_event *raw_event_queue_fetch( · 2 unmodified lines
89	* there's at least one event queued by decrementing the semaphore,	90	* there's at least one event queued by decrementing the semaphore,
90	* and then take the lock to protect queue struct fields.	91	* and then take the lock to protect queue struct fields.
91	*/	92	*/
92	if (down_interruptible(&queue->sema))	93	ret = down_interruptible(&queue->sema);
93	return NULL;	94	if (ret)
		95	return ERR_PTR(ret);
94	spin_lock_irqsave(&queue->lock, flags);	96	spin_lock_irqsave(&queue->lock, flags);
95	if (WARN_ON(!queue->size))	97	/*
96	return NULL;	98	* queue->size must have the same value as queue->sema counter (before
		99	* the down_interruptible() call above), so this check is a fail-safe.
		100	*/
		101	if (WARN_ON(!queue->size)) {
		102	spin_unlock_irqrestore(&queue->lock, flags);
		103	return ERR_PTR(-ENODEV);
		104	}
97	event = queue->events[0];	105	event = queue->events[0];
98	queue->size--;	106	queue->size--;
99	memmove(&queue->events[0], &queue->events[1],	107	memmove(&queue->events[0], &queue->events[1],
@@ -392,9 +400,8 @@ static int raw_ioctl_init(struct raw_dev *dev, unsigned long value) · 292 unmodified lines
392	char *udc_device_name;	400	char *udc_device_name;
393	unsigned long flags;	401	unsigned long flags;
394		402
395	ret = copy_from_user(&arg, (void __user *)value, sizeof(arg));	403	if (copy_from_user(&arg, (void __user *)value, sizeof(arg)))
396	if (ret)	404	return -EFAULT;
397	return ret;
398		405
399	switch (arg.speed) {	406	switch (arg.speed) {
400	case USB_SPEED_UNKNOWN:	407	case USB_SPEED_UNKNOWN:
@@ -501,15 +508,13 @@ out_unlock: · 100 unmodified lines
501		508
502	static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value)	509	static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value)
503	{	510	{
504	int ret = 0;
505	struct usb_raw_event arg;	511	struct usb_raw_event arg;
506	unsigned long flags;	512	unsigned long flags;
507	struct usb_raw_event *event;	513	struct usb_raw_event *event;
508	uint32_t length;	514	uint32_t length;
509		515
510	ret = copy_from_user(&arg, (void __user *)value, sizeof(arg));	516	if (copy_from_user(&arg, (void __user *)value, sizeof(arg)))
511	if (ret)	517	return -EFAULT;
512	return ret;
513		518
514	spin_lock_irqsave(&dev->lock, flags);	519	spin_lock_irqsave(&dev->lock, flags);
515	if (dev->state != STATE_DEV_RUNNING) {	520	if (dev->state != STATE_DEV_RUNNING) {
@@ -525,25 +530,31 @@ static int raw_ioctl_event_fetch(struct raw_dev *dev, unsigned long value) · 9 unmodified lines
525	spin_unlock_irqrestore(&dev->lock, flags);	530	spin_unlock_irqrestore(&dev->lock, flags);
526		531
527	event = raw_event_queue_fetch(&dev->queue);	532	event = raw_event_queue_fetch(&dev->queue);
528	if (!event) {	533	if (PTR_ERR(event) == -EINTR) {
529	dev_dbg(&dev->gadget->dev, "event fetching interrupted\n");	534	dev_dbg(&dev->gadget->dev, "event fetching interrupted\n");
530	return -EINTR;	535	return -EINTR;
531	}	536	}
		537	if (IS_ERR(event)) {
		538	dev_err(&dev->gadget->dev, "failed to fetch event\n");
		539	spin_lock_irqsave(&dev->lock, flags);
		540	dev->state = STATE_DEV_FAILED;
		541	spin_unlock_irqrestore(&dev->lock, flags);
		542	return -ENODEV;
		543	}
532	length = min(arg.length, event->length);	544	length = min(arg.length, event->length);
533	ret = copy_to_user((void __user *)value, event,	545	if (copy_to_user((void __user )value, event, sizeof(event) + length))
534	sizeof(*event) + length);	546	return -EFAULT;
535	return ret;	547
		548	return 0;
536	}	549	}
537		550
538	static void raw_alloc_io_data(struct usb_raw_ep_io io, void __user *ptr,	551	static void raw_alloc_io_data(struct usb_raw_ep_io io, void __user *ptr,
539	bool get_from_user)	552	bool get_from_user)
540	{	553	{
541	int ret;
542	void *data;	554	void *data;
543		555
544	ret = copy_from_user(io, ptr, sizeof(*io));	556	if (copy_from_user(io, ptr, sizeof(*io)))
545	if (ret)	557	return ERR_PTR(-EFAULT);
546	return ERR_PTR(ret);
547	if (io->ep >= USB_RAW_MAX_ENDPOINTS)	558	if (io->ep >= USB_RAW_MAX_ENDPOINTS)
548	return ERR_PTR(-EINVAL);	559	return ERR_PTR(-EINVAL);
549	if (!usb_raw_io_flags_valid(io->flags))	560	if (!usb_raw_io_flags_valid(io->flags))
@@ -658,12 +669,13 @@ static int raw_ioctl_ep0_read(struct raw_dev *dev, unsigned long value) · 108 unmodified lines
658	if (IS_ERR(data))	669	if (IS_ERR(data))
659	return PTR_ERR(data);	670	return PTR_ERR(data);
660	ret = raw_process_ep0_io(dev, &io, data, false);	671	ret = raw_process_ep0_io(dev, &io, data, false);
661	if (ret < 0) {	672	if (ret)
662	kfree(data);	673	goto free;
663	return ret;	674
664	}
665	length = min(io.length, (unsigned int)ret);	675	length = min(io.length, (unsigned int)ret);
666	ret = copy_to_user((void __user *)(value + sizeof(io)), data, length);	676	if (copy_to_user((void __user *)(value + sizeof(io)), data, length))
		677	ret = -EFAULT;
		678	free:
667	kfree(data);	679	kfree(data);
668	return ret;	680	return ret;
669	}	681	}
@@ -952,12 +964,13 @@ static int raw_ioctl_ep_read(struct raw_dev *dev, unsigned long value) · 282 unmodified lines
952	if (IS_ERR(data))	964	if (IS_ERR(data))
953	return PTR_ERR(data);	965	return PTR_ERR(data);
954	ret = raw_process_ep_io(dev, &io, data, false);	966	ret = raw_process_ep_io(dev, &io, data, false);
955	if (ret < 0) {	967	if (ret)
956	kfree(data);	968	goto free;
957	return ret;	969
958	}
959	length = min(io.length, (unsigned int)ret);	970	length = min(io.length, (unsigned int)ret);
960	ret = copy_to_user((void __user *)(value + sizeof(io)), data, length);	971	if (copy_to_user((void __user *)(value + sizeof(io)), data, length))
		972	ret = -EFAULT;
		973	free:
961	kfree(data);	974	kfree(data);
962	return ret;	975	return ret;
963	}	976	}

drivers/usb/gadget/udc/atmel_usba_udc.c+2−2

 			usba_start(udc);
 		} else {
 			udc->suspended = false;
-			usba_stop(udc);
 			if (udc->driver->disconnect)
 				udc->driver->disconnect(&udc->gadget);
+			usba_stop(udc);
 		}
 		udc->vbus_prev = vbus;
 	}

drivers/usb/gadget/udc/bdc/bdc_ep.c+1−1

@@ -540,7 +540,7 @@ static void bdc_req_complete(struct bdc_ep ep, struct bdc_req req, · 539 unmodified lines
540	{	540	{
541	struct bdc *bdc = ep->bdc;	541	struct bdc *bdc = ep->bdc;
542		542
543	if (req == NULL \|\| &req->queue == NULL \|\| &req->usb_req == NULL)	543	if (req == NULL)
544	return;	544	return;
545		545
546	dev_dbg(bdc->dev, "%s ep:%s status:%d\n", __func__, ep->name, status);	546	dev_dbg(bdc->dev, "%s ep:%s status:%d\n", __func__, ep->name, status);

drivers/usb/host/xhci-hub.c+9−0

 		}
 		if ((temp & PORT_RC))
 			reset_change = true;
+		if (temp & PORT_OC)
+			status = 1;
 	}
 	if (!status && !reset_change) {
 		xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
 				 port_index);
 			goto retry;
 		}
+		/* bail out if port detected a over-current condition */
+		if (t1 & PORT_OC) {
+			bus_state->bus_suspended = 0;
+			spin_unlock_irqrestore(&xhci->lock, flags);
+			xhci_dbg(xhci, "Bus suspend bailout, port over-current detected\n");
+			return -EBUSY;
+		}
 		/* suspend ports in U0, or bail out for new connect changes */
 		if ((t1 & PORT_PE) && (t1 & PORT_PLS_MASK) == XDEV_U0) {
 			if ((t1 & PORT_CSC) && wake_enabled) {

drivers/usb/host/xhci-ring.c+40−6

 				stream_id);
 		return;
 	}
+	/*
+	 * A cancelled TD can complete with a stall if HW cached the trb.
+	 * In this case driver can't find cur_td, but if the ring is empty we
+	 * can move the dequeue pointer to the current enqueue position.
+	 */
+	if (!cur_td) {
+		if (list_empty(&ep_ring->td_list)) {
+			state->new_deq_seg = ep_ring->enq_seg;
+			state->new_deq_ptr = ep_ring->enqueue;
+			state->new_cycle_state = ep_ring->cycle_state;
+			goto done;
+		} else {
+			xhci_warn(xhci, "Can't find new dequeue state, missing cur_td\n");
+			return;
+		}
+	}
 	/* Dig out the cycle state saved by the xHC during the stop ep cmd */
 	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
 			"Finding endpoint context");
 	state->new_deq_seg = new_seg;
 	state->new_deq_ptr = new_deq;
+done:
 	/* Don't update the ring cycle state for the producer (us). */
 	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
 			"Cycle state = 0x%x", state->new_cycle_state);
 	if (reset_type == EP_HARD_RESET) {
 		ep->ep_state |= EP_HARD_CLEAR_TOGGLE;
-		xhci_cleanup_stalled_ring(xhci, ep_index, stream_id, td);
+		xhci_cleanup_stalled_ring(xhci, slot_id, ep_index, stream_id,
-		xhci_clear_hub_tt_buffer(xhci, td, ep);
+					  td);
 	}
 	xhci_ring_cmd_db(xhci);
 }
 	if (trb_comp_code == COMP_STALL_ERROR ||
 		xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
 						trb_comp_code)) {
-		/* Issue a reset endpoint command to clear the host side
+		/*
-		 * halt, followed by a set dequeue command to move the
+		 * xhci internal endpoint state will go to a "halt" state for
-		 * dequeue pointer past the TD.
+		 * any stall, including default control pipe protocol stall.
-		 * The class driver clears the device side halt later.
+		 * To clear the host side halt we need to issue a reset endpoint
+		 * command, followed by a set dequeue command to move past the
+		 * TD.
+		 * Class drivers clear the device side halt from a functional
+		 * stall later. Hub TT buffer should only be cleared for FS/LS
+		 * devices behind HS hubs for functional stalls.
 		 */
+		if ((ep_index != 0) || (trb_comp_code != COMP_STALL_ERROR))
+			xhci_clear_hub_tt_buffer(xhci, td, ep);
 		xhci_cleanup_halted_endpoint(xhci, slot_id, ep_index,
 					ep_ring->stream_id, td, EP_HARD_RESET);
 	} else {
 				xhci_dbg(xhci, "td_list is empty while skip flag set. Clear skip flag for slot %u ep %u.\n",
 					 slot_id, ep_index);
 			}
+			if (trb_comp_code == COMP_STALL_ERROR ||
+			    xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
+							      trb_comp_code)) {
+				xhci_cleanup_halted_endpoint(xhci, slot_id,
+							     ep_index,
+							     ep_ring->stream_id,
+							     NULL,
+							     EP_HARD_RESET);
+			}
 			goto cleanup;
 		}

drivers/usb/host/xhci.c+7−7

 			added_ctxs, added_ctxs);
 }
-void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
+void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id,
-			       unsigned int stream_id, struct xhci_td *td)
+			       unsigned int ep_index, unsigned int stream_id,
+			       struct xhci_td *td)
 {
 	struct xhci_dequeue_state deq_state;
-	struct usb_device *udev = td->urb->dev;
 	xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
 			"Cleaning up stalled endpoint ring");
 	/* We need to move the HW's dequeue pointer past this TD,
 	 * or it will attempt to resend it on the next doorbell ring.
 	 */
-	xhci_find_new_dequeue_state(xhci, udev->slot_id,
+	xhci_find_new_dequeue_state(xhci, slot_id, ep_index, stream_id, td,
-			ep_index, stream_id, td, &deq_state);
+				    &deq_state);
 	if (!deq_state.new_deq_ptr || !deq_state.new_deq_seg)
 		return;
 	if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
 		xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
 				"Queueing new dequeue state");
-		xhci_queue_new_dequeue_state(xhci, udev->slot_id,
+		xhci_queue_new_dequeue_state(xhci, slot_id,
 				ep_index, &deq_state);
 	} else {
 		/* Better hope no one uses the input context between now and the
 		xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 				"Setting up input context for "
 				"configure endpoint command");
-		xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
+		xhci_setup_input_ctx_for_quirk(xhci, slot_id,
 				ep_index, &deq_state);
 	}
 }

drivers/usb/host/xhci.h+3−2

 void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
 		unsigned int slot_id, unsigned int ep_index,
 		struct xhci_dequeue_state *deq_state);
-void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int ep_index,
+void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci, unsigned int slot_id,
-		unsigned int stream_id, struct xhci_td *td);
+			       unsigned int ep_index, unsigned int stream_id,
+			       struct xhci_td *td);
 void xhci_stop_endpoint_command_watchdog(struct timer_list *t);
 void xhci_handle_command_timeout(struct work_struct *work);

drivers/usb/misc/sisusbvga/sisusb.c+10−10

@@ -1199,18 +1199,18 @@ static int sisusb_read_mem_bulk(struct sisusb_usb_data *sisusb, u32 addr, · 1198 unmodified lines
1199	/* High level: Gfx (indexed) register access */	1199	/* High level: Gfx (indexed) register access */
1200		1200
1201	#ifdef CONFIG_USB_SISUSBVGA_CON	1201	#ifdef CONFIG_USB_SISUSBVGA_CON
1202	int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data)	1202	int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data)
1203	{	1203	{
1204	return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);	1204	return sisusb_write_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1205	}	1205	}
1206		1206
1207	int sisusb_getreg(struct sisusb_usb_data sisusb, int port, u8 data)	1207	int sisusb_getreg(struct sisusb_usb_data sisusb, u32 port, u8 data)
1208	{	1208	{
1209	return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);	1209	return sisusb_read_memio_byte(sisusb, SISUSB_TYPE_IO, port, data);
1210	}	1210	}
1211	#endif	1211	#endif
1212		1212
1213	int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,	1213	int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port,
1214	u8 index, u8 data)	1214	u8 index, u8 data)
1215	{	1215	{
1216	int ret;	1216	int ret;
@@ -1220,7 +1220,7 @@ int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines
1220	return ret;	1220	return ret;
1221	}	1221	}
1222		1222
1223	int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,	1223	int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port,
1224	u8 index, u8 *data)	1224	u8 index, u8 *data)
1225	{	1225	{
1226	int ret;	1226	int ret;
@@ -1230,7 +1230,7 @@ int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port, · 3 unmodified lines
1230	return ret;	1230	return ret;
1231	}	1231	}
1232		1232
1233	int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx,	1233	int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port, u8 idx,
1234	u8 myand, u8 myor)	1234	u8 myand, u8 myor)
1235	{	1235	{
1236	int ret;	1236	int ret;
@@ -1245,7 +1245,7 @@ int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port, u8 idx, · 8 unmodified lines
1245	}	1245	}
1246		1246
1247	static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb,	1247	static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb,
1248	int port, u8 idx, u8 data, u8 mask)	1248	u32 port, u8 idx, u8 data, u8 mask)
1249	{	1249	{
1250	int ret;	1250	int ret;
1251	u8 tmp;	1251	u8 tmp;
@@ -1258,13 +1258,13 @@ static int sisusb_setidxregmask(struct sisusb_usb_data *sisusb, · 6 unmodified lines
1258	return ret;	1258	return ret;
1259	}	1259	}
1260		1260
1261	int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,	1261	int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port,
1262	u8 index, u8 myor)	1262	u8 index, u8 myor)
1263	{	1263	{
1264	return sisusb_setidxregandor(sisusb, port, index, 0xff, myor);	1264	return sisusb_setidxregandor(sisusb, port, index, 0xff, myor);
1265	}	1265	}
1266		1266
1267	int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,	1267	int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port,
1268	u8 idx, u8 myand)	1268	u8 idx, u8 myand)
1269	{	1269	{
1270	return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00);	1270	return sisusb_setidxregandor(sisusb, port, idx, myand, 0x00);
@@ -2785,8 +2785,8 @@ static loff_t sisusb_lseek(struct file *file, loff_t offset, int orig) · 1514 unmodified lines
2785	static int sisusb_handle_command(struct sisusb_usb_data *sisusb,	2785	static int sisusb_handle_command(struct sisusb_usb_data *sisusb,
2786	struct sisusb_command *y, unsigned long arg)	2786	struct sisusb_command *y, unsigned long arg)
2787	{	2787	{
2788	int retval, port, length;	2788	int retval, length;
2789	u32 address;	2789	u32 port, address;
2790		2790
2791	/* All our commands require the device	2791	/* All our commands require the device
2792	* to be initialized.	2792	* to be initialized.

drivers/usb/misc/sisusbvga/sisusb_init.h+7−7

drivers/usb/storage/uas.c+43−3

@@ -81,6 +81,19 @@ static void uas_free_streams(struct uas_dev_info *devinfo); · 80 unmodified lines
81	static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix,	81	static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix,
82	int status);	82	int status);
83		83
		84	/*
		85	* This driver needs its own workqueue, as we need to control memory allocation.
		86	*
		87	* In the course of error handling and power management uas_wait_for_pending_cmnds()
		88	* needs to flush pending work items. In these contexts we cannot allocate memory
		89	* by doing block IO as we would deadlock. For the same reason we cannot wait
		90	* for anything allocating memory not heeding these constraints.
		91	*
		92	* So we have to control all work items that can be on the workqueue we flush.
		93	* Hence we cannot share a queue and need our own.
		94	*/
		95	static struct workqueue_struct *workqueue;
		96
84	static void uas_do_work(struct work_struct *work)	97	static void uas_do_work(struct work_struct *work)
85	{	98	{
86	struct uas_dev_info *devinfo =	99	struct uas_dev_info *devinfo =
@@ -109,7 +122,7 @@ static void uas_do_work(struct work_struct *work) · 22 unmodified lines
109	if (!err)	122	if (!err)
110	cmdinfo->state &= ~IS_IN_WORK_LIST;	123	cmdinfo->state &= ~IS_IN_WORK_LIST;
111	else	124	else
112	schedule_work(&devinfo->work);	125	queue_work(workqueue, &devinfo->work);
113	}	126	}
114	out:	127	out:
115	spin_unlock_irqrestore(&devinfo->lock, flags);	128	spin_unlock_irqrestore(&devinfo->lock, flags);
@@ -134,7 +147,7 @@ static void uas_add_work(struct uas_cmd_info *cmdinfo) · 18 unmodified lines
134		147
135	lockdep_assert_held(&devinfo->lock);	148	lockdep_assert_held(&devinfo->lock);
136	cmdinfo->state \|= IS_IN_WORK_LIST;	149	cmdinfo->state \|= IS_IN_WORK_LIST;
137	schedule_work(&devinfo->work);	150	queue_work(workqueue, &devinfo->work);
138	}	151	}
139		152
140	static void uas_zap_pending(struct uas_dev_info *devinfo, int result)	153	static void uas_zap_pending(struct uas_dev_info *devinfo, int result)
@@ -190,6 +203,9 @@ static void uas_log_cmd_state(struct scsi_cmnd cmnd, const char prefix, · 49 unmodified lines
190	struct uas_cmd_info ci = (void )&cmnd->SCp;	203	struct uas_cmd_info ci = (void )&cmnd->SCp;
191	struct uas_cmd_info cmdinfo = (void )&cmnd->SCp;	204	struct uas_cmd_info cmdinfo = (void )&cmnd->SCp;
192		205
		206	if (status == -ENODEV) /* too late */
		207	return;
		208
193	scmd_printk(KERN_INFO, cmnd,	209	scmd_printk(KERN_INFO, cmnd,
194	"%s %d uas-tag %d inflight:%s%s%s%s%s%s%s%s%s%s%s%s ",	210	"%s %d uas-tag %d inflight:%s%s%s%s%s%s%s%s%s%s%s%s ",
195	prefix, status, cmdinfo->uas_tag,	211	prefix, status, cmdinfo->uas_tag,
@@ -1226,7 +1242,31 @@ static struct usb_driver uas_driver = { · 1030 unmodified lines
1226	.id_table = uas_usb_ids,	1242	.id_table = uas_usb_ids,
1227	};	1243	};
1228		1244
1229	module_usb_driver(uas_driver);	1245	static int __init uas_init(void)
		1246	{
		1247	int rv;
		1248
		1249	workqueue = alloc_workqueue("uas", WQ_MEM_RECLAIM, 0);
		1250	if (!workqueue)
		1251	return -ENOMEM;
		1252
		1253	rv = usb_register(&uas_driver);
		1254	if (rv) {
		1255	destroy_workqueue(workqueue);
		1256	return -ENOMEM;
		1257	}
		1258
		1259	return 0;
		1260	}
		1261
		1262	static void __exit uas_exit(void)
		1263	{
		1264	usb_deregister(&uas_driver);
		1265	destroy_workqueue(workqueue);
		1266	}
		1267
		1268	module_init(uas_init);
		1269	module_exit(uas_exit);
1230		1270
1231	MODULE_LICENSE("GPL");	1271	MODULE_LICENSE("GPL");
1232	MODULE_IMPORT_NS(USB_STORAGE);	1272	MODULE_IMPORT_NS(USB_STORAGE);

drivers/usb/storage/unusual_devs.h+7−0

@@ -2323,6 +2323,13 @@ UNUSUAL_DEV( 0x3340, 0xffff, 0x0000, 0x0000, · 2322 unmodified lines
2323	USB_SC_DEVICE,USB_PR_DEVICE,NULL,	2323	USB_SC_DEVICE,USB_PR_DEVICE,NULL,
2324	US_FL_MAX_SECTORS_64 ),	2324	US_FL_MAX_SECTORS_64 ),
2325		2325
		2326	/* Reported by Cyril Roelandt <tipecaml@gmail.com> */
		2327	UNUSUAL_DEV( 0x357d, 0x7788, 0x0114, 0x0114,
		2328	"JMicron",
		2329	"USB to ATA/ATAPI Bridge",
		2330	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
		2331	US_FL_BROKEN_FUA ),
		2332
2326	/* Reported by Andrey Rahmatullin <wrar@altlinux.org> */	2333	/* Reported by Andrey Rahmatullin <wrar@altlinux.org> */
2327	UNUSUAL_DEV( 0x4102, 0x1020, 0x0100, 0x0100,	2334	UNUSUAL_DEV( 0x4102, 0x1020, 0x0100, 0x0100,
2328	"iRiver",	2335	"iRiver",

drivers/usb/typec/bus.c+4−1

 const struct typec_altmode *
 typec_altmode_get_partner(struct typec_altmode *adev)
 {
-	return adev ? &to_altmode(adev)->partner->adev : NULL;
+	if (!adev || !to_altmode(adev)->partner)
+		return NULL;
+	return &to_altmode(adev)->partner->adev;
 }
 EXPORT_SYMBOL_GPL(typec_altmode_get_partner);

drivers/usb/typec/mux/pi3usb30532.c+2−2

@@ -114,8 +114,8 @@ pi3usb30532_mux_set(struct typec_mux mux, struct typec_mux_state state) · 113 unmodified lines
114	static int pi3usb30532_probe(struct i2c_client *client)	114	static int pi3usb30532_probe(struct i2c_client *client)
115	{	115	{
116	struct device *dev = &client->dev;	116	struct device *dev = &client->dev;
117	struct typec_switch_desc sw_desc;	117	struct typec_switch_desc sw_desc = { };
118	struct typec_mux_desc mux_desc;	118	struct typec_mux_desc mux_desc = { };
119	struct pi3usb30532 *pi;	119	struct pi3usb30532 *pi;
120	int ret;	120	int ret;
121		121

drivers/usb/typec/tcpm/tcpm.c+26−0

@@ -3794,6 +3794,14 @@ static void _tcpm_cc_change(struct tcpm_port *port, enum typec_cc_status cc1, · 3793 unmodified lines
3794	*/	3794	*/
3795	break;	3795	break;
3796		3796
		3797	case PORT_RESET:
		3798	case PORT_RESET_WAIT_OFF:
		3799	/*
		3800	* State set back to default mode once the timer completes.
		3801	* Ignore CC changes here.
		3802	*/
		3803	break;
		3804
3797	default:	3805	default:
3798	if (tcpm_port_is_disconnected(port))	3806	if (tcpm_port_is_disconnected(port))
3799	tcpm_set_state(port, unattached_state(port), 0);	3807	tcpm_set_state(port, unattached_state(port), 0);
@@ -3855,6 +3863,15 @@ static void _tcpm_pd_vbus_on(struct tcpm_port *port) · 55 unmodified lines
3855	case SRC_TRY_DEBOUNCE:	3863	case SRC_TRY_DEBOUNCE:
3856	/* Do nothing, waiting for sink detection */	3864	/* Do nothing, waiting for sink detection */
3857	break;	3865	break;
		3866
		3867	case PORT_RESET:
		3868	case PORT_RESET_WAIT_OFF:
		3869	/*
		3870	* State set back to default mode once the timer completes.
		3871	* Ignore vbus changes here.
		3872	*/
		3873	break;
		3874
3858	default:	3875	default:
3859	break;	3876	break;
3860	}	3877	}
@@ -3908,10 +3925,19 @@ static void _tcpm_pd_vbus_off(struct tcpm_port *port) · 47 unmodified lines
3908	case PORT_RESET_WAIT_OFF:	3925	case PORT_RESET_WAIT_OFF:
3909	tcpm_set_state(port, tcpm_default_state(port), 0);	3926	tcpm_set_state(port, tcpm_default_state(port), 0);
3910	break;	3927	break;
		3928
3911	case SRC_TRY_WAIT:	3929	case SRC_TRY_WAIT:
3912	case SRC_TRY_DEBOUNCE:	3930	case SRC_TRY_DEBOUNCE:
3913	/* Do nothing, waiting for sink detection */	3931	/* Do nothing, waiting for sink detection */
3914	break;	3932	break;
		3933
		3934	case PORT_RESET:
		3935	/*
		3936	* State set back to default mode once the timer completes.
		3937	* Ignore vbus changes here.
		3938	*/
		3939	break;
		3940
3915	default:	3941	default:
3916	if (port->pwr_role == TYPEC_SINK &&	3942	if (port->pwr_role == TYPEC_SINK &&
3917	port->attached)	3943	port->attached)

drivers/vdpa/Kconfig+6−12

 # SPDX-License-Identifier: GPL-2.0-only
-config VDPA
+menuconfig VDPA
-	tristate
+	tristate "vDPA drivers"
 	help
 	  Enable this module to support vDPA device that uses a
 	  datapath which complies with virtio specifications with
 	  vendor specific control path.
-menuconfig VDPA_MENU
+if VDPA
-	bool "VDPA drivers"
-	default n
-if VDPA_MENU
 config VDPA_SIM
 	tristate "vDPA device simulator"
-	depends on RUNTIME_TESTING_MENU
+	depends on RUNTIME_TESTING_MENU && HAS_DMA && VHOST_DPN
-	select VDPA
 	select VHOST_RING
 	default n
 	help
 	  development of vDPA.
 config IFCVF
-	tristate "Intel IFC VF VDPA driver"
+	tristate "Intel IFC VF vDPA driver"
 	depends on PCI_MSI
-	select VDPA
 	default n
 	help
 	  This kernel module can drive Intel IFC VF NIC to offload
 	  To compile this driver as a module, choose M here: the module will
 	  be called ifcvf.
-endif # VDPA_MENU
+endif # VDPA

drivers/vdpa/ifcvf/ifcvf_base.c+0−2

 static int ifcvf_hw_enable(struct ifcvf_hw *hw)
 {
-	struct ifcvf_lm_cfg __iomem *ifcvf_lm;
 	struct virtio_pci_common_cfg __iomem *cfg;
 	struct ifcvf_adapter *ifcvf;
 	u32 i;
-	ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
 	ifcvf = vf_to_adapter(hw);
 	cfg = hw->common_cfg;
 	ifc_iowrite16(IFCVF_MSI_CONFIG_OFF, &cfg->msix_config);

drivers/vdpa/ifcvf/ifcvf_main.c+1−3

 static int ifcvf_start_datapath(void *private)
 {
 	struct ifcvf_hw *vf = ifcvf_private_to_vf(private);
-	struct ifcvf_adapter *ifcvf;
 	u8 status;
 	int ret;
-	ifcvf = vf_to_adapter(vf);
 	vf->nr_vring = IFCVF_MAX_QUEUE_PAIRS * 2;
 	ret = ifcvf_start_hw(vf);
 	if (ret < 0) {
 	return IFCVF_SUBSYS_VENDOR_ID;
 }
-static u16 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev)
+static u32 ifcvf_vdpa_get_vq_align(struct vdpa_device *vdpa_dev)
 {
 	return IFCVF_QUEUE_ALIGNMENT;
 }

drivers/vdpa/vdpa.c+1−1

@@ -116,7 +116,7 @@ EXPORT_SYMBOL_GPL(__vdpa_alloc_device); · 115 unmodified lines
116		116
117	/**	117	/**
118	* vdpa_register_device - register a vDPA device	118	* vdpa_register_device - register a vDPA device
119	* Callers must have a succeed call of vdpa_init_device() before.	119	* Callers must have a succeed call of vdpa_alloc_device() before.
120	* @vdev: the vdpa device to be registered to vDPA bus	120	* @vdev: the vdpa device to be registered to vDPA bus
121	*	121	*
122	* Returns an error when fail to add to vDPA bus	122	* Returns an error when fail to add to vDPA bus

drivers/vdpa/vdpa_sim/vdpa_sim.c+2−2

@@ -435,7 +435,7 @@ static u64 vdpasim_get_vq_state(struct vdpa_device *vdpa, u16 idx) · 434 unmodified lines
435	return vrh->last_avail_idx;	435	return vrh->last_avail_idx;
436	}	436	}
437		437
438	static u16 vdpasim_get_vq_align(struct vdpa_device *vdpa)	438	static u32 vdpasim_get_vq_align(struct vdpa_device *vdpa)
439	{	439	{
440	return VDPASIM_QUEUE_ALIGN;	440	return VDPASIM_QUEUE_ALIGN;
441	}	441	}
@@ -488,7 +488,7 @@ static u8 vdpasim_get_status(struct vdpa_device *vdpa) · 46 unmodified lines
488	status = vdpasim->status;	488	status = vdpasim->status;
489	spin_unlock(&vdpasim->lock);	489	spin_unlock(&vdpasim->lock);
490		490
491	return vdpasim->status;	491	return status;
492	}	492	}
493		493
494	static void vdpasim_set_status(struct vdpa_device *vdpa, u8 status)	494	static void vdpasim_set_status(struct vdpa_device *vdpa, u8 status)

drivers/vfio/vfio_iommu_type1.c+5−5

@@ -342,8 +342,8 @@ static int vaddr_get_pfn(struct mm_struct *mm, unsigned long vaddr, · 341 unmodified lines
342	vma = find_vma_intersection(mm, vaddr, vaddr + 1);	342	vma = find_vma_intersection(mm, vaddr, vaddr + 1);
343		343
344	if (vma && vma->vm_flags & VM_PFNMAP) {	344	if (vma && vma->vm_flags & VM_PFNMAP) {
345	*pfn = ((vaddr - vma->vm_start) >> PAGE_SHIFT) + vma->vm_pgoff;	345	if (!follow_pfn(vma, vaddr, pfn) &&
346	if (is_invalid_reserved_pfn(*pfn))	346	is_invalid_reserved_pfn(*pfn))
347	ret = 0;	347	ret = 0;
348	}	348	}
349	done:	349	done:
@@ -555,7 +555,7 @@ static int vfio_iommu_type1_pin_pages(void *iommu_data, · 205 unmodified lines
555	continue;	555	continue;
556	}	556	}
557		557
558	remote_vaddr = dma->vaddr + iova - dma->iova;	558	remote_vaddr = dma->vaddr + (iova - dma->iova);
559	ret = vfio_pin_page_external(dma, remote_vaddr, &phys_pfn[i],	559	ret = vfio_pin_page_external(dma, remote_vaddr, &phys_pfn[i],
560	do_accounting);	560	do_accounting);
561	if (ret)	561	if (ret)
@@ -2345,10 +2345,10 @@ static int vfio_iommu_type1_dma_rw_chunk(struct vfio_iommu *iommu, · 1783 unmodified lines
2345	vaddr = dma->vaddr + offset;	2345	vaddr = dma->vaddr + offset;
2346		2346
2347	if (write)	2347	if (write)
2348	copied = __copy_to_user((void __user )vaddr, data,	2348	copied = copy_to_user((void __user )vaddr, data,
2349	count) ? 0 : count;	2349	count) ? 0 : count;
2350	else	2350	else
2351	copied = __copy_from_user(data, (void __user )vaddr,	2351	copied = copy_from_user(data, (void __user )vaddr,
2352	count) ? 0 : count;	2352	count) ? 0 : count;
2353	if (kthread)	2353	if (kthread)
2354	unuse_mm(mm);	2354	unuse_mm(mm);

drivers/vhost/Kconfig+16−5

 	tristate
 	help
 	  Generic IOTLB implementation for vhost and vringh.
+	  This option is selected by any driver which needs to support
+	  an IOMMU in software.
 config VHOST_RING
 	tristate
 	  This option is selected by any driver which needs to access
 	  the host side of a virtio ring.
+config VHOST_DPN
+	bool
+	depends on !ARM || AEABI
+	default y
+	help
+	  Anything selecting VHOST or VHOST_RING must depend on VHOST_DPN.
+	  This excludes the deprecated ARM ABI since that forces a 4 byte
+	  alignment on all structs - incompatible with virtio spec requirements.
 config VHOST
 	tristate
 	select VHOST_IOTLB
 config VHOST_NET
 	tristate "Host kernel accelerator for virtio net"
-	depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP)
+	depends on NET && EVENTFD && (TUN || !TUN) && (TAP || !TAP) && VHOST_DPN
 	select VHOST
 	---help---
 	  This kernel module can be loaded in host kernel to accelerate
 config VHOST_SCSI
 	tristate "VHOST_SCSI TCM fabric driver"
-	depends on TARGET_CORE && EVENTFD
+	depends on TARGET_CORE && EVENTFD && VHOST_DPN
 	select VHOST
 	default n
 	---help---
 config VHOST_VSOCK
 	tristate "vhost virtio-vsock driver"
-	depends on VSOCKETS && EVENTFD
+	depends on VSOCKETS && EVENTFD && VHOST_DPN
 	select VHOST
 	select VIRTIO_VSOCKETS_COMMON
 	default n
 config VHOST_VDPA
 	tristate "Vhost driver for vDPA-based backend"
-	depends on EVENTFD
+	depends on EVENTFD && VHOST_DPN
 	select VHOST
-	select VDPA
+	depends on VDPA
 	help
 	  This kernel module can be loaded in host kernel to accelerate
 	  guest virtio devices with the vDPA-based backends.

drivers/vhost/net.c+15−13

 	struct vhost_net_virtqueue *nvq =
 		container_of(vq, struct vhost_net_virtqueue, vq);
 	struct vhost_poll *poll = n->poll + (nvq - n->vqs);
-	if (!vq->private_data)
+	if (!vhost_vq_get_backend(vq))
 		return;
 	vhost_poll_stop(poll);
 }
 	struct vhost_poll *poll = n->poll + (nvq - n->vqs);
 	struct socket *sock;
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		return 0;
 		return;
 	vhost_disable_notify(&net->dev, vq);
-	sock = rvq->private_data;
+	sock = vhost_vq_get_backend(rvq);
 	busyloop_timeout = poll_rx ? rvq->busyloop_timeout:
 				     tvq->busyloop_timeout;
 	if (r == tvq->num && tvq->busyloop_timeout) {
 		/* Flush batched packets first */
-		if (!vhost_sock_zcopy(tvq->private_data))
+		if (!vhost_sock_zcopy(vhost_vq_get_backend(tvq)))
-			vhost_tx_batch(net, tnvq, tvq->private_data, msghdr);
+			vhost_tx_batch(net, tnvq,
+				       vhost_vq_get_backend(tvq),
+				       msghdr);
 		vhost_net_busy_poll(net, rvq, tvq, busyloop_intr, false);
 	struct vhost_virtqueue *vq = &nvq->vq;
 	struct vhost_net *net = container_of(vq->dev, struct vhost_net,
 					     dev);
-	struct socket *sock = vq->private_data;
+	struct socket *sock = vhost_vq_get_backend(vq);
 	struct page_frag *alloc_frag = &net->page_frag;
 	struct virtio_net_hdr *gso;
 	struct xdp_buff *xdp = &nvq->xdp[nvq->batched_xdp];
 	struct socket *sock;
 	mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_TX);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		goto out;
 	int recv_pkts = 0;
 	mutex_lock_nested(&vq->mutex, VHOST_NET_VQ_RX);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	if (!sock)
 		goto out;
 		container_of(vq, struct vhost_net_virtqueue, vq);
 	mutex_lock(&vq->mutex);
-	sock = vq->private_data;
+	sock = vhost_vq_get_backend(vq);
 	vhost_net_disable_vq(n, vq);
-	vq->private_data = NULL;
+	vhost_vq_set_backend(vq, NULL);
 	vhost_net_buf_unproduce(nvq);
 	nvq->rx_ring = NULL;
 	mutex_unlock(&vq->mutex);
 	}
 	/* start polling new socket */
-	oldsock = vq->private_data;
+	oldsock = vhost_vq_get_backend(vq);
 	if (sock != oldsock) {
 		ubufs = vhost_net_ubuf_alloc(vq,
 					     sock && vhost_sock_zcopy(sock));
 		}
 		vhost_net_disable_vq(n, vq);
-		vq->private_data = sock;
+		vhost_vq_set_backend(vq, sock);
 		vhost_net_buf_unproduce(nvq);
 		r = vhost_vq_init_access(vq);
 		if (r)
 	return 0;
 err_used:
-	vq->private_data = oldsock;
+	vhost_vq_set_backend(vq, oldsock);
 	vhost_net_enable_vq(n, vq);
 	if (ubufs)
 		vhost_net_ubuf_put_wait_and_free(ubufs);

drivers/vhost/scsi.c+7−7

@@ -452,7 +452,7 @@ vhost_scsi_do_evt_work(struct vhost_scsi vs, struct vhost_scsi_evt evt) · 451 unmodified lines
452	unsigned out, in;	452	unsigned out, in;
453	int head, ret;	453	int head, ret;
454		454
455	if (!vq->private_data) {	455	if (!vhost_vq_get_backend(vq)) {
456	vs->vs_events_missed = true;	456	vs->vs_events_missed = true;
457	return;	457	return;
458	}	458	}
@@ -892,7 +892,7 @@ vhost_scsi_get_req(struct vhost_virtqueue vq, struct vhost_scsi_ctx vc, · 433 unmodified lines
892	} else {	892	} else {
893	struct vhost_scsi_tpg *vs_tpg, tpg;	893	struct vhost_scsi_tpg *vs_tpg, tpg;
894		894
895	vs_tpg = vq->private_data; /* validated at handler entry */	895	vs_tpg = vhost_vq_get_backend(vq); /* validated at handler entry */
896		896
897	tpg = READ_ONCE(vs_tpg[*vc->target]);	897	tpg = READ_ONCE(vs_tpg[*vc->target]);
898	if (unlikely(!tpg)) {	898	if (unlikely(!tpg)) {
@@ -929,7 +929,7 @@ vhost_scsi_handle_vq(struct vhost_scsi vs, struct vhost_virtqueue vq) · 30 unmodified lines
929	* We can handle the vq only after the endpoint is setup by calling the	929	* We can handle the vq only after the endpoint is setup by calling the
930	* VHOST_SCSI_SET_ENDPOINT ioctl.	930	* VHOST_SCSI_SET_ENDPOINT ioctl.
931	*/	931	*/
932	vs_tpg = vq->private_data;	932	vs_tpg = vhost_vq_get_backend(vq);
933	if (!vs_tpg)	933	if (!vs_tpg)
934	goto out;	934	goto out;
935		935
@@ -1184,7 +1184,7 @@ vhost_scsi_ctl_handle_vq(struct vhost_scsi vs, struct vhost_virtqueue vq) · 248 unmodified lines
1184	* We can handle the vq only after the endpoint is setup by calling the	1184	* We can handle the vq only after the endpoint is setup by calling the
1185	* VHOST_SCSI_SET_ENDPOINT ioctl.	1185	* VHOST_SCSI_SET_ENDPOINT ioctl.
1186	*/	1186	*/
1187	if (!vq->private_data)	1187	if (!vhost_vq_get_backend(vq))
1188	goto out;	1188	goto out;
1189		1189
1190	memset(&vc, 0, sizeof(vc));	1190	memset(&vc, 0, sizeof(vc));
@@ -1322,7 +1322,7 @@ static void vhost_scsi_evt_handle_kick(struct vhost_work *work) · 131 unmodified lines
1322	struct vhost_scsi *vs = container_of(vq->dev, struct vhost_scsi, dev);	1322	struct vhost_scsi *vs = container_of(vq->dev, struct vhost_scsi, dev);
1323		1323
1324	mutex_lock(&vq->mutex);	1324	mutex_lock(&vq->mutex);
1325	if (!vq->private_data)	1325	if (!vhost_vq_get_backend(vq))
1326	goto out;	1326	goto out;
1327		1327
1328	if (vs->vs_events_missed)	1328	if (vs->vs_events_missed)
@@ -1460,7 +1460,7 @@ vhost_scsi_set_endpoint(struct vhost_scsi *vs, · 131 unmodified lines
1460	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {	1460	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
1461	vq = &vs->vqs[i].vq;	1461	vq = &vs->vqs[i].vq;
1462	mutex_lock(&vq->mutex);	1462	mutex_lock(&vq->mutex);
1463	vq->private_data = vs_tpg;	1463	vhost_vq_set_backend(vq, vs_tpg);
1464	vhost_vq_init_access(vq);	1464	vhost_vq_init_access(vq);
1465	mutex_unlock(&vq->mutex);	1465	mutex_unlock(&vq->mutex);
1466	}	1466	}
@@ -1547,7 +1547,7 @@ vhost_scsi_clear_endpoint(struct vhost_scsi *vs, · 80 unmodified lines
1547	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {	1547	for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) {
1548	vq = &vs->vqs[i].vq;	1548	vq = &vs->vqs[i].vq;
1549	mutex_lock(&vq->mutex);	1549	mutex_lock(&vq->mutex);
1550	vq->private_data = NULL;	1550	vhost_vq_set_backend(vq, NULL);
1551	mutex_unlock(&vq->mutex);	1551	mutex_unlock(&vq->mutex);
1552	}	1552	}
1553	}	1553	}

drivers/vhost/test.c+7−7

@@ -49,7 +49,7 @@ static void handle_vq(struct vhost_test *n) · 48 unmodified lines
49	void *private;	49	void *private;
50		50
51	mutex_lock(&vq->mutex);	51	mutex_lock(&vq->mutex);
52	private = vq->private_data;	52	private = vhost_vq_get_backend(vq);
53	if (!private) {	53	if (!private) {
54	mutex_unlock(&vq->mutex);	54	mutex_unlock(&vq->mutex);
55	return;	55	return;
@@ -120,7 +120,7 @@ static int vhost_test_open(struct inode inode, struct file f) · 64 unmodified lines
120	vqs[VHOST_TEST_VQ] = &n->vqs[VHOST_TEST_VQ];	120	vqs[VHOST_TEST_VQ] = &n->vqs[VHOST_TEST_VQ];
121	n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick;	121	n->vqs[VHOST_TEST_VQ].handle_kick = handle_vq_kick;
122	vhost_dev_init(dev, vqs, VHOST_TEST_VQ_MAX, UIO_MAXIOV,	122	vhost_dev_init(dev, vqs, VHOST_TEST_VQ_MAX, UIO_MAXIOV,
123	VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT);	123	VHOST_TEST_PKT_WEIGHT, VHOST_TEST_WEIGHT, NULL);
124		124
125	f->private_data = n;	125	f->private_data = n;
126		126
@@ -133,8 +133,8 @@ static void vhost_test_stop_vq(struct vhost_test n, · 6 unmodified lines
133	void *private;	133	void *private;
134		134
135	mutex_lock(&vq->mutex);	135	mutex_lock(&vq->mutex);
136	private = vq->private_data;	136	private = vhost_vq_get_backend(vq);
137	vq->private_data = NULL;	137	vhost_vq_set_backend(vq, NULL);
138	mutex_unlock(&vq->mutex);	138	mutex_unlock(&vq->mutex);
139	return private;	139	return private;
140	}	140	}
@@ -198,8 +198,8 @@ static long vhost_test_run(struct vhost_test *n, int test) · 57 unmodified lines
198	priv = test ? n : NULL;	198	priv = test ? n : NULL;
199		199
200	/* start polling new socket */	200	/* start polling new socket */
201	oldpriv = vq->private_data;	201	oldpriv = vhost_vq_get_backend(vq);
202	vq->private_data = priv;	202	vhost_vq_set_backend(vq, priv);
203		203
204	r = vhost_vq_init_access(&n->vqs[index]);	204	r = vhost_vq_init_access(&n->vqs[index]);
205		205
@@ -225,7 +225,7 @@ static long vhost_test_reset_owner(struct vhost_test *n) · 19 unmodified lines
225	{	225	{
226	void *priv = NULL;	226	void *priv = NULL;
227	long err;	227	long err;
228	struct vhost_umem *umem;	228	struct vhost_iotlb *umem;
229		229
230	mutex_lock(&n->dev.mutex);	230	mutex_lock(&n->dev.mutex);
231	err = vhost_dev_check_owner(&n->dev);	231	err = vhost_dev_check_owner(&n->dev);

drivers/vhost/vdpa.c+0−5

 	struct vdpa_callback cb;
 	struct vhost_virtqueue *vq;
 	struct vhost_vring_state s;
-	u8 status;
 	u32 idx;
 	long r;
 	idx = array_index_nospec(idx, v->nvqs);
 	vq = &v->vqs[idx];
-	status = ops->get_status(vdpa);
 	if (cmd == VHOST_VDPA_SET_VRING_ENABLE) {
 		if (copy_from_user(&s, argp, sizeof(s)))
 			return -EFAULT;
 	int nvqs, i, r, opened;
 	v = container_of(inode->i_cdev, struct vhost_vdpa, cdev);
-	if (!v)
-		return -ENODEV;
 	opened = atomic_cmpxchg(&v->opened, 0, 1);
 	if (opened)

drivers/vhost/vhost.h+27−0

@@ -231,6 +231,33 @@ enum { · 230 unmodified lines
231	(1ULL << VIRTIO_F_VERSION_1)	231	(1ULL << VIRTIO_F_VERSION_1)
232	};	232	};
233		233
		234	/**
		235	* vhost_vq_set_backend - Set backend.
		236	*
		237	* @vq Virtqueue.
		238	* @private_data The private data.
		239	*
		240	* Context: Need to call with vq->mutex acquired.
		241	*/
		242	static inline void vhost_vq_set_backend(struct vhost_virtqueue *vq,
		243	void *private_data)
		244	{
		245	vq->private_data = private_data;
		246	}
		247
		248	/**
		249	* vhost_vq_get_backend - Get backend.
		250	*
		251	* @vq Virtqueue.
		252	*
		253	* Context: Need to call with vq->mutex acquired.
		254	* Return: Private data previously set with vhost_vq_set_backend.
		255	*/
		256	static inline void vhost_vq_get_backend(struct vhost_virtqueue vq)
		257	{
		258	return vq->private_data;
		259	}
		260
234	static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit)	261	static inline bool vhost_has_feature(struct vhost_virtqueue *vq, int bit)
235	{	262	{
236	return vq->acked_features & (1ULL << bit);	263	return vq->acked_features & (1ULL << bit);

drivers/vhost/vringh.c+5−0

 #include <linux/uaccess.h>
 #include <linux/slab.h>
 #include <linux/export.h>
+#if IS_REACHABLE(CONFIG_VHOST_IOTLB)
 #include <linux/bvec.h>
 #include <linux/highmem.h>
 #include <linux/vhost_iotlb.h>
+#endif
 #include <uapi/linux/virtio_config.h>
 static __printf(1,2) __cold void vringh_bad(const char *fmt, ...)
 }
 EXPORT_SYMBOL(vringh_need_notify_kern);
+#if IS_REACHABLE(CONFIG_VHOST_IOTLB)
 static int iotlb_translate(const struct vringh *vrh,
 			   u64 addr, u64 len, struct bio_vec iov[],
 			   int iov_size, u32 perm)
 }
 EXPORT_SYMBOL(vringh_need_notify_iotlb);
+#endif
 MODULE_LICENSE("GPL");

drivers/vhost/vsock.c+7−7

@@ -91,7 +91,7 @@ vhost_transport_do_send_pkt(struct vhost_vsock *vsock, · 90 unmodified lines
91		91
92	mutex_lock(&vq->mutex);	92	mutex_lock(&vq->mutex);
93		93
94	if (!vq->private_data)	94	if (!vhost_vq_get_backend(vq))
95	goto out;	95	goto out;
96		96
97	/* Avoid further vmexits, we're already processing the virtqueue */	97	/* Avoid further vmexits, we're already processing the virtqueue */
@@ -440,7 +440,7 @@ static void vhost_vsock_handle_tx_kick(struct vhost_work *work) · 342 unmodified lines
440		440
441	mutex_lock(&vq->mutex);	441	mutex_lock(&vq->mutex);
442		442
443	if (!vq->private_data)	443	if (!vhost_vq_get_backend(vq))
444	goto out;	444	goto out;
445		445
446	vhost_disable_notify(&vsock->dev, vq);	446	vhost_disable_notify(&vsock->dev, vq);
@@ -533,8 +533,8 @@ static int vhost_vsock_start(struct vhost_vsock *vsock) · 86 unmodified lines
533	goto err_vq;	533	goto err_vq;
534	}	534	}
535		535
536	if (!vq->private_data) {	536	if (!vhost_vq_get_backend(vq)) {
537	vq->private_data = vsock;	537	vhost_vq_set_backend(vq, vsock);
538	ret = vhost_vq_init_access(vq);	538	ret = vhost_vq_init_access(vq);
539	if (ret)	539	if (ret)
540	goto err_vq;	540	goto err_vq;
@@ -547,14 +547,14 @@ static int vhost_vsock_start(struct vhost_vsock *vsock) · 6 unmodified lines
547	return 0;	547	return 0;
548		548
549	err_vq:	549	err_vq:
550	vq->private_data = NULL;	550	vhost_vq_set_backend(vq, NULL);
551	mutex_unlock(&vq->mutex);	551	mutex_unlock(&vq->mutex);
552		552
553	for (i = 0; i < ARRAY_SIZE(vsock->vqs); i++) {	553	for (i = 0; i < ARRAY_SIZE(vsock->vqs); i++) {
554	vq = &vsock->vqs[i];	554	vq = &vsock->vqs[i];
555		555
556	mutex_lock(&vq->mutex);	556	mutex_lock(&vq->mutex);
557	vq->private_data = NULL;	557	vhost_vq_set_backend(vq, NULL);
558	mutex_unlock(&vq->mutex);	558	mutex_unlock(&vq->mutex);
559	}	559	}
560	err:	560	err:
@@ -577,7 +577,7 @@ static int vhost_vsock_stop(struct vhost_vsock *vsock) · 16 unmodified lines
577	struct vhost_virtqueue *vq = &vsock->vqs[i];	577	struct vhost_virtqueue *vq = &vsock->vqs[i];
578		578
579	mutex_lock(&vq->mutex);	579	mutex_lock(&vq->mutex);
580	vq->private_data = NULL;	580	vhost_vq_set_backend(vq, NULL);
581	mutex_unlock(&vq->mutex);	581	mutex_unlock(&vq->mutex);
582	}	582	}
583		583

drivers/virtio/Kconfig+1−1

@@ -45,7 +45,7 @@ config VIRTIO_PCI_LEGACY · 44 unmodified lines
45		45
46	config VIRTIO_VDPA	46	config VIRTIO_VDPA
47	tristate "vDPA driver for virtio devices"	47	tristate "vDPA driver for virtio devices"
48	select VDPA	48	depends on VDPA
49	select VIRTIO	49	select VIRTIO
50	help	50	help
51	This driver provides support for virtio based paravirtual	51	This driver provides support for virtio based paravirtual

drivers/virtio/virtio_balloon.c+2−2

@@ -165,7 +165,7 @@ static void tell_host(struct virtio_balloon vb, struct virtqueue vq) · 164 unmodified lines
165		165
166	}	166	}
167		167
168	int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info,	168	static int virtballoon_free_page_report(struct page_reporting_dev_info *pr_dev_info,
169	struct scatterlist *sg, unsigned int nents)	169	struct scatterlist *sg, unsigned int nents)
170	{	170	{
171	struct virtio_balloon *vb =	171	struct virtio_balloon *vb =
@@ -580,7 +580,7 @@ static u32 virtio_balloon_cmd_id_received(struct virtio_balloon *vb) · 408 unmodified lines
580	if (test_and_clear_bit(VIRTIO_BALLOON_CONFIG_READ_CMD_ID,	580	if (test_and_clear_bit(VIRTIO_BALLOON_CONFIG_READ_CMD_ID,
581	&vb->config_read_bitmap))	581	&vb->config_read_bitmap))
582	virtio_cread(vb->vdev, struct virtio_balloon_config,	582	virtio_cread(vb->vdev, struct virtio_balloon_config,
583	free_page_report_cmd_id,	583	free_page_hint_cmd_id,
584	&vb->cmd_id_received_cache);	584	&vb->cmd_id_received_cache);
585		585
586	return vb->cmd_id_received_cache;	586	return vb->cmd_id_received_cache;

drivers/virtio/virtio_input.c+1−0

@@ -3,6 +3,7 @@ · 2 unmodified lines
3	#include <linux/virtio.h>	3	#include <linux/virtio.h>
4	#include <linux/virtio_config.h>	4	#include <linux/virtio_config.h>
5	#include <linux/input.h>	5	#include <linux/input.h>
		6	#include <linux/slab.h>
6		7
7	#include <uapi/linux/virtio_ids.h>	8	#include <uapi/linux/virtio_ids.h>
8	#include <uapi/linux/virtio_input.h>	9	#include <uapi/linux/virtio_input.h>

drivers/watchdog/sp805_wdt.c+4−0

 {
 	struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
+	writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
 	writel_relaxed(0, wdt->base + WDTCONTROL);
 	writel_relaxed(0, wdt->base + WDTLOAD);
 	writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
+	/* Flush posted writes. */
+	readl_relaxed(wdt->base + WDTLOCK);
 	return 0;
 }

drivers/xen/xenbus/xenbus_client.c+8−1

 int xenbus_map_ring_valloc(struct xenbus_device *dev, grant_ref_t *gnt_refs,
 			   unsigned int nr_grefs, void **vaddr)
 {
-	return ring_ops->map(dev, gnt_refs, nr_grefs, vaddr);
+	int err;
+	err = ring_ops->map(dev, gnt_refs, nr_grefs, vaddr);
+	/* Some hypervisors are buggy and can return 1. */
+	if (err > 0)
+		err = GNTST_general_error;
+	return err;
 }
 EXPORT_SYMBOL_GPL(xenbus_map_ring_valloc);

fs/afs/cmservice.c+1−1

@@ -169,7 +169,7 @@ static int afs_record_cm_probe(struct afs_call call, struct afs_server server) · 168 unmodified lines
169		169
170	spin_lock(&server->probe_lock);	170	spin_lock(&server->probe_lock);
171		171
172	if (!test_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) {	172	if (!test_and_set_bit(AFS_SERVER_FL_HAVE_EPOCH, &server->flags)) {
173	server->cm_epoch = call->epoch;	173	server->cm_epoch = call->epoch;
174	server->probe.cm_epoch = call->epoch;	174	server->probe.cm_epoch = call->epoch;
175	goto out;	175	goto out;

fs/afs/dir.c+67−41

@@ -1032,7 +1032,7 @@ static int afs_d_revalidate(struct dentry *dentry, unsigned int flags) · 1031 unmodified lines
1032	struct dentry *parent;	1032	struct dentry *parent;
1033	struct inode *inode;	1033	struct inode *inode;
1034	struct key *key;	1034	struct key *key;
1035	afs_dataversion_t dir_version;	1035	afs_dataversion_t dir_version, invalid_before;
1036	long de_version;	1036	long de_version;
1037	int ret;	1037	int ret;
1038		1038
@@ -1084,8 +1084,8 @@ static int afs_d_revalidate(struct dentry *dentry, unsigned int flags) · 45 unmodified lines
1084	if (de_version == (long)dir_version)	1084	if (de_version == (long)dir_version)
1085	goto out_valid_noupdate;	1085	goto out_valid_noupdate;
1086		1086
1087	dir_version = dir->invalid_before;	1087	invalid_before = dir->invalid_before;
1088	if (de_version - (long)dir_version >= 0)	1088	if (de_version - (long)invalid_before >= 0)
1089	goto out_valid;	1089	goto out_valid;
1090		1090
1091	_debug("dir modified");	1091	_debug("dir modified");
@@ -1275,6 +1275,7 @@ static int afs_mkdir(struct inode dir, struct dentry dentry, umode_t mode) · 183 unmodified lines
1275	struct afs_fs_cursor fc;	1275	struct afs_fs_cursor fc;
1276	struct afs_vnode *dvnode = AFS_FS_I(dir);	1276	struct afs_vnode *dvnode = AFS_FS_I(dir);
1277	struct key *key;	1277	struct key *key;
		1278	afs_dataversion_t data_version;
1278	int ret;	1279	int ret;
1279		1280
1280	mode \|= S_IFDIR;	1281	mode \|= S_IFDIR;
@@ -1295,7 +1296,7 @@ static int afs_mkdir(struct inode dir, struct dentry dentry, umode_t mode) · 14 unmodified lines
1295		1296
1296	ret = -ERESTARTSYS;	1297	ret = -ERESTARTSYS;
1297	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {	1298	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
1298	afs_dataversion_t data_version = dvnode->status.data_version + 1;	1299	data_version = dvnode->status.data_version + 1;
1299		1300
1300	while (afs_select_fileserver(&fc)) {	1301	while (afs_select_fileserver(&fc)) {
1301	fc.cb_break = afs_calc_vnode_cb_break(dvnode);	1302	fc.cb_break = afs_calc_vnode_cb_break(dvnode);
@@ -1316,10 +1317,14 @@ static int afs_mkdir(struct inode dir, struct dentry dentry, umode_t mode) · 14 unmodified lines
1316	goto error_key;	1317	goto error_key;
1317	}	1318	}
1318		1319
1319	if (ret == 0 &&	1320	if (ret == 0) {
1320	test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1321	down_write(&dvnode->validate_lock);
1321	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,	1322	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
1322	afs_edit_dir_for_create);	1323	dvnode->status.data_version == data_version)
		1324	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,
		1325	afs_edit_dir_for_create);
		1326	up_write(&dvnode->validate_lock);
		1327	}
1323		1328
1324	key_put(key);	1329	key_put(key);
1325	kfree(scb);	1330	kfree(scb);
@@ -1360,6 +1365,7 @@ static int afs_rmdir(struct inode dir, struct dentry dentry) · 34 unmodified lines
1360	struct afs_fs_cursor fc;	1365	struct afs_fs_cursor fc;
1361	struct afs_vnode dvnode = AFS_FS_I(dir), vnode = NULL;	1366	struct afs_vnode dvnode = AFS_FS_I(dir), vnode = NULL;
1362	struct key *key;	1367	struct key *key;
		1368	afs_dataversion_t data_version;
1363	int ret;	1369	int ret;
1364		1370
1365	_enter("{%llx:%llu},{%pd}",	1371	_enter("{%llx:%llu},{%pd}",
@@ -1391,7 +1397,7 @@ static int afs_rmdir(struct inode dir, struct dentry dentry) · 25 unmodified lines
1391		1397
1392	ret = -ERESTARTSYS;	1398	ret = -ERESTARTSYS;
1393	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {	1399	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
1394	afs_dataversion_t data_version = dvnode->status.data_version + 1;	1400	data_version = dvnode->status.data_version + 1;
1395		1401
1396	while (afs_select_fileserver(&fc)) {	1402	while (afs_select_fileserver(&fc)) {
1397	fc.cb_break = afs_calc_vnode_cb_break(dvnode);	1403	fc.cb_break = afs_calc_vnode_cb_break(dvnode);
@@ -1404,9 +1410,12 @@ static int afs_rmdir(struct inode dir, struct dentry dentry) · 6 unmodified lines
1404	ret = afs_end_vnode_operation(&fc);	1410	ret = afs_end_vnode_operation(&fc);
1405	if (ret == 0) {	1411	if (ret == 0) {
1406	afs_dir_remove_subdir(dentry);	1412	afs_dir_remove_subdir(dentry);
1407	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1413	down_write(&dvnode->validate_lock);
		1414	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
		1415	dvnode->status.data_version == data_version)
1408	afs_edit_dir_remove(dvnode, &dentry->d_name,	1416	afs_edit_dir_remove(dvnode, &dentry->d_name,
1409	afs_edit_dir_for_rmdir);	1417	afs_edit_dir_for_rmdir);
		1418	up_write(&dvnode->validate_lock);
1410	}	1419	}
1411	}	1420	}
1412		1421
@@ -1544,10 +1553,15 @@ static int afs_unlink(struct inode dir, struct dentry dentry) · 131 unmodified lines
1544	ret = afs_end_vnode_operation(&fc);	1553	ret = afs_end_vnode_operation(&fc);
1545	if (ret == 0 && !(scb[1].have_status \|\| scb[1].have_error))	1554	if (ret == 0 && !(scb[1].have_status \|\| scb[1].have_error))
1546	ret = afs_dir_remove_link(dvnode, dentry, key);	1555	ret = afs_dir_remove_link(dvnode, dentry, key);
1547	if (ret == 0 &&	1556
1548	test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1557	if (ret == 0) {
1549	afs_edit_dir_remove(dvnode, &dentry->d_name,	1558	down_write(&dvnode->validate_lock);
1550	afs_edit_dir_for_unlink);	1559	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
		1560	dvnode->status.data_version == data_version)
		1561	afs_edit_dir_remove(dvnode, &dentry->d_name,
		1562	afs_edit_dir_for_unlink);
		1563	up_write(&dvnode->validate_lock);
		1564	}
1551	}	1565	}
1552		1566
1553	if (need_rehash && ret < 0 && ret != -ENOENT)	1567	if (need_rehash && ret < 0 && ret != -ENOENT)
@@ -1573,6 +1587,7 @@ static int afs_create(struct inode dir, struct dentry dentry, umode_t mode, · 19 unmodified lines
1573	struct afs_status_cb *scb;	1587	struct afs_status_cb *scb;
1574	struct afs_vnode *dvnode = AFS_FS_I(dir);	1588	struct afs_vnode *dvnode = AFS_FS_I(dir);
1575	struct key *key;	1589	struct key *key;
		1590	afs_dataversion_t data_version;
1576	int ret;	1591	int ret;
1577		1592
1578	mode \|= S_IFREG;	1593	mode \|= S_IFREG;
@@ -1597,7 +1612,7 @@ static int afs_create(struct inode dir, struct dentry dentry, umode_t mode, · 18 unmodified lines
1597		1612
1598	ret = -ERESTARTSYS;	1613	ret = -ERESTARTSYS;
1599	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {	1614	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
1600	afs_dataversion_t data_version = dvnode->status.data_version + 1;	1615	data_version = dvnode->status.data_version + 1;
1601		1616
1602	while (afs_select_fileserver(&fc)) {	1617	while (afs_select_fileserver(&fc)) {
1603	fc.cb_break = afs_calc_vnode_cb_break(dvnode);	1618	fc.cb_break = afs_calc_vnode_cb_break(dvnode);
@@ -1618,9 +1633,12 @@ static int afs_create(struct inode dir, struct dentry dentry, umode_t mode, · 14 unmodified lines
1618	goto error_key;	1633	goto error_key;
1619	}	1634	}
1620		1635
1621	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1636	down_write(&dvnode->validate_lock);
		1637	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
		1638	dvnode->status.data_version == data_version)
1622	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,	1639	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,
1623	afs_edit_dir_for_create);	1640	afs_edit_dir_for_create);
		1641	up_write(&dvnode->validate_lock);
1624		1642
1625	kfree(scb);	1643	kfree(scb);
1626	key_put(key);	1644	key_put(key);
@@ -1648,6 +1666,7 @@ static int afs_link(struct dentry from, struct inode dir, · 21 unmodified lines
1648	struct afs_vnode *dvnode = AFS_FS_I(dir);	1666	struct afs_vnode *dvnode = AFS_FS_I(dir);
1649	struct afs_vnode *vnode = AFS_FS_I(d_inode(from));	1667	struct afs_vnode *vnode = AFS_FS_I(d_inode(from));
1650	struct key *key;	1668	struct key *key;
		1669	afs_dataversion_t data_version;
1651	int ret;	1670	int ret;
1652		1671
1653	_enter("{%llx:%llu},{%llx:%llu},{%pd}",	1672	_enter("{%llx:%llu},{%llx:%llu},{%pd}",
@@ -1672,7 +1691,7 @@ static int afs_link(struct dentry from, struct inode dir, · 18 unmodified lines
1672		1691
1673	ret = -ERESTARTSYS;	1692	ret = -ERESTARTSYS;
1674	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {	1693	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
1675	afs_dataversion_t data_version = dvnode->status.data_version + 1;	1694	data_version = dvnode->status.data_version + 1;
1676		1695
1677	if (mutex_lock_interruptible_nested(&vnode->io_lock, 1) < 0) {	1696	if (mutex_lock_interruptible_nested(&vnode->io_lock, 1) < 0) {
1678	afs_end_vnode_operation(&fc);	1697	afs_end_vnode_operation(&fc);
@@ -1702,9 +1721,12 @@ static int afs_link(struct dentry from, struct inode dir, · 23 unmodified lines
1702	goto error_key;	1721	goto error_key;
1703	}	1722	}
1704		1723
1705	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1724	down_write(&dvnode->validate_lock);
		1725	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
		1726	dvnode->status.data_version == data_version)
1706	afs_edit_dir_add(dvnode, &dentry->d_name, &vnode->fid,	1727	afs_edit_dir_add(dvnode, &dentry->d_name, &vnode->fid,
1707	afs_edit_dir_for_link);	1728	afs_edit_dir_for_link);
		1729	up_write(&dvnode->validate_lock);
1708		1730
1709	key_put(key);	1731	key_put(key);
1710	kfree(scb);	1732	kfree(scb);
@@ -1732,6 +1754,7 @@ static int afs_symlink(struct inode dir, struct dentry dentry, · 21 unmodified lines
1732	struct afs_status_cb *scb;	1754	struct afs_status_cb *scb;
1733	struct afs_vnode *dvnode = AFS_FS_I(dir);	1755	struct afs_vnode *dvnode = AFS_FS_I(dir);
1734	struct key *key;	1756	struct key *key;
		1757	afs_dataversion_t data_version;
1735	int ret;	1758	int ret;
1736		1759
1737	_enter("{%llx:%llu},{%pd},%s",	1760	_enter("{%llx:%llu},{%pd},%s",
@@ -1759,7 +1782,7 @@ static int afs_symlink(struct inode dir, struct dentry dentry, · 21 unmodified lines
1759		1782
1760	ret = -ERESTARTSYS;	1783	ret = -ERESTARTSYS;
1761	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {	1784	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
1762	afs_dataversion_t data_version = dvnode->status.data_version + 1;	1785	data_version = dvnode->status.data_version + 1;
1763		1786
1764	while (afs_select_fileserver(&fc)) {	1787	while (afs_select_fileserver(&fc)) {
1765	fc.cb_break = afs_calc_vnode_cb_break(dvnode);	1788	fc.cb_break = afs_calc_vnode_cb_break(dvnode);
@@ -1780,9 +1803,12 @@ static int afs_symlink(struct inode dir, struct dentry dentry, · 14 unmodified lines
1780	goto error_key;	1803	goto error_key;
1781	}	1804	}
1782		1805
1783	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))	1806	down_write(&dvnode->validate_lock);
		1807	if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
		1808	dvnode->status.data_version == data_version)
1784	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,	1809	afs_edit_dir_add(dvnode, &dentry->d_name, &iget_data.fid,
1785	afs_edit_dir_for_symlink);	1810	afs_edit_dir_for_symlink);
		1811	up_write(&dvnode->validate_lock);
1786		1812
1787	key_put(key);	1813	key_put(key);
1788	kfree(scb);	1814	kfree(scb);
@@ -1812,6 +1838,8 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 23 unmodified lines
1812	struct dentry tmp = NULL, rehash = NULL;	1838	struct dentry tmp = NULL, rehash = NULL;
1813	struct inode *new_inode;	1839	struct inode *new_inode;
1814	struct key *key;	1840	struct key *key;
		1841	afs_dataversion_t orig_data_version;
		1842	afs_dataversion_t new_data_version;
1815	bool new_negative = d_is_negative(new_dentry);	1843	bool new_negative = d_is_negative(new_dentry);
1816	int ret;	1844	int ret;
1817		1845
@@ -1890,10 +1918,6 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 72 unmodified lines
1890		1918
1891	ret = -ERESTARTSYS;	1919	ret = -ERESTARTSYS;
1892	if (afs_begin_vnode_operation(&fc, orig_dvnode, key, true)) {	1920	if (afs_begin_vnode_operation(&fc, orig_dvnode, key, true)) {
1893	afs_dataversion_t orig_data_version;
1894	afs_dataversion_t new_data_version;
1895	struct afs_status_cb *new_scb = &scb[1];
1896
1897	orig_data_version = orig_dvnode->status.data_version + 1;	1921	orig_data_version = orig_dvnode->status.data_version + 1;
1898		1922
1899	if (orig_dvnode != new_dvnode) {	1923	if (orig_dvnode != new_dvnode) {
@@ -1904,7 +1928,6 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 4 unmodified lines
1904	new_data_version = new_dvnode->status.data_version + 1;	1928	new_data_version = new_dvnode->status.data_version + 1;
1905	} else {	1929	} else {
1906	new_data_version = orig_data_version;	1930	new_data_version = orig_data_version;
1907	new_scb = &scb[0];
1908	}	1931	}
1909		1932
1910	while (afs_select_fileserver(&fc)) {	1933	while (afs_select_fileserver(&fc)) {
@@ -1912,7 +1935,7 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 1 unmodified line
1912	fc.cb_break_2 = afs_calc_vnode_cb_break(new_dvnode);	1935	fc.cb_break_2 = afs_calc_vnode_cb_break(new_dvnode);
1913	afs_fs_rename(&fc, old_dentry->d_name.name,	1936	afs_fs_rename(&fc, old_dentry->d_name.name,
1914	new_dvnode, new_dentry->d_name.name,	1937	new_dvnode, new_dentry->d_name.name,
1915	&scb[0], new_scb);	1938	&scb[0], &scb[1]);
1916	}	1939	}
1917		1940
1918	afs_vnode_commit_status(&fc, orig_dvnode, fc.cb_break,	1941	afs_vnode_commit_status(&fc, orig_dvnode, fc.cb_break,
@@ -1930,18 +1953,25 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 11 unmodified lines
1930	if (ret == 0) {	1953	if (ret == 0) {
1931	if (rehash)	1954	if (rehash)
1932	d_rehash(rehash);	1955	d_rehash(rehash);
1933	if (test_bit(AFS_VNODE_DIR_VALID, &orig_dvnode->flags))	1956	down_write(&orig_dvnode->validate_lock);
1934	afs_edit_dir_remove(orig_dvnode, &old_dentry->d_name,	1957	if (test_bit(AFS_VNODE_DIR_VALID, &orig_dvnode->flags) &&
1935	afs_edit_dir_for_rename_0);	1958	orig_dvnode->status.data_version == orig_data_version)
		1959	afs_edit_dir_remove(orig_dvnode, &old_dentry->d_name,
		1960	afs_edit_dir_for_rename_0);
		1961	if (orig_dvnode != new_dvnode) {
		1962	up_write(&orig_dvnode->validate_lock);
1936		1963
1937	if (!new_negative &&	1964	down_write(&new_dvnode->validate_lock);
1938	test_bit(AFS_VNODE_DIR_VALID, &new_dvnode->flags))	1965	}
1939	afs_edit_dir_remove(new_dvnode, &new_dentry->d_name,	1966	if (test_bit(AFS_VNODE_DIR_VALID, &new_dvnode->flags) &&
1940	afs_edit_dir_for_rename_1);	1967	orig_dvnode->status.data_version == new_data_version) {
		1968	if (!new_negative)
		1969	afs_edit_dir_remove(new_dvnode, &new_dentry->d_name,
		1970	afs_edit_dir_for_rename_1);
1941		1971
1942	if (test_bit(AFS_VNODE_DIR_VALID, &new_dvnode->flags))
1943	afs_edit_dir_add(new_dvnode, &new_dentry->d_name,	1972	afs_edit_dir_add(new_dvnode, &new_dentry->d_name,
1944	&vnode->fid, afs_edit_dir_for_rename_2);	1973	&vnode->fid, afs_edit_dir_for_rename_2);
		1974	}
1945		1975
1946	new_inode = d_inode(new_dentry);	1976	new_inode = d_inode(new_dentry);
1947	if (new_inode) {	1977	if (new_inode) {
@@ -1957,14 +1987,10 @@ static int afs_rename(struct inode old_dir, struct dentry old_dentry, · 9 unmodified lines
1957	* Note that if we ever implement RENAME_EXCHANGE, we'll have	1987	* Note that if we ever implement RENAME_EXCHANGE, we'll have
1958	* to update both dentries with opposing dir versions.	1988	* to update both dentries with opposing dir versions.
1959	*/	1989	*/
1960	if (new_dvnode != orig_dvnode) {	1990	afs_update_dentry_version(&fc, old_dentry, &scb[1]);
1961	afs_update_dentry_version(&fc, old_dentry, &scb[1]);	1991	afs_update_dentry_version(&fc, new_dentry, &scb[1]);
1962	afs_update_dentry_version(&fc, new_dentry, &scb[1]);
1963	} else {
1964	afs_update_dentry_version(&fc, old_dentry, &scb[0]);
1965	afs_update_dentry_version(&fc, new_dentry, &scb[0]);
1966	}
1967	d_move(old_dentry, new_dentry);	1992	d_move(old_dentry, new_dentry);
		1993	up_write(&new_dvnode->validate_lock);
1968	goto error_tmp;	1994	goto error_tmp;
1969	}	1995	}
1970		1996

fs/afs/dir_silly.c+15−7

 {
 	struct afs_fs_cursor fc;
 	struct afs_status_cb *scb;
+	afs_dataversion_t dir_data_version;
 	int ret = -ERESTARTSYS;
 	_enter("%pd,%pd", old, new);
 	trace_afs_silly_rename(vnode, false);
 	if (afs_begin_vnode_operation(&fc, dvnode, key, true)) {
-		afs_dataversion_t dir_data_version = dvnode->status.data_version + 1;
+		dir_data_version = dvnode->status.data_version + 1;
 		while (afs_select_fileserver(&fc)) {
 			fc.cb_break = afs_calc_vnode_cb_break(dvnode);
 			dvnode->silly_key = key_get(key);
 		}
-		if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))
+		down_write(&dvnode->validate_lock);
+		if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
+		    dvnode->status.data_version == dir_data_version) {
 			afs_edit_dir_remove(dvnode, &old->d_name,
 					    afs_edit_dir_for_silly_0);
-		if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))
 			afs_edit_dir_add(dvnode, &new->d_name,
 					 &vnode->fid, afs_edit_dir_for_silly_1);
+		}
+		up_write(&dvnode->validate_lock);
 	}
 	kfree(scb);
 				clear_bit(AFS_VNODE_CB_PROMISED, &vnode->flags);
 			}
 		}
-		if (ret == 0 &&
+		if (ret == 0) {
-		    test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags))
+			down_write(&dvnode->validate_lock);
-			afs_edit_dir_remove(dvnode, &dentry->d_name,
+			if (test_bit(AFS_VNODE_DIR_VALID, &dvnode->flags) &&
-					    afs_edit_dir_for_unlink);
+			    dvnode->status.data_version == dir_data_version)
+				afs_edit_dir_remove(dvnode, &dentry->d_name,
+						    afs_edit_dir_for_unlink);
+			up_write(&dvnode->validate_lock);
+		}
 	}
 	kfree(scb);

fs/afs/fs_probe.c+1−4

 	       (unsigned int)rtt, ret);
 	have_result |= afs_fs_probe_done(server);
-	if (have_result) {
+	if (have_result)
-		server->probe.have_result = true;
-		wake_up_var(&server->probe.have_result);
 		wake_up_all(&server->probe_wq);
-	}
 }
 /*

fs/afs/fsclient.c+16−11

@@ -65,6 +65,7 @@ static int xdr_decode_AFSFetchStatus(const __be32 **_bp, · 64 unmodified lines
65	bool inline_error = (call->operation_ID == afs_FS_InlineBulkStatus);	65	bool inline_error = (call->operation_ID == afs_FS_InlineBulkStatus);
66	u64 data_version, size;	66	u64 data_version, size;
67	u32 type, abort_code;	67	u32 type, abort_code;
		68	int ret;
68		69
69	abort_code = ntohl(xdr->abort_code);	70	abort_code = ntohl(xdr->abort_code);
70		71
@@ -78,7 +79,7 @@ static int xdr_decode_AFSFetchStatus(const __be32 **_bp, · 7 unmodified lines
78	*/	79	*/
79	status->abort_code = abort_code;	80	status->abort_code = abort_code;
80	scb->have_error = true;	81	scb->have_error = true;
81	return 0;	82	goto good;
82	}	83	}
83		84
84	pr_warn("Unknown AFSFetchStatus version %u\n", ntohl(xdr->if_version));	85	pr_warn("Unknown AFSFetchStatus version %u\n", ntohl(xdr->if_version));
@@ -87,7 +88,8 @@ static int xdr_decode_AFSFetchStatus(const __be32 **_bp, · 2 unmodified lines
87		88
88	if (abort_code != 0 && inline_error) {	89	if (abort_code != 0 && inline_error) {
89	status->abort_code = abort_code;	90	status->abort_code = abort_code;
90	return 0;	91	scb->have_error = true;
		92	goto good;
91	}	93	}
92		94
93	type = ntohl(xdr->type);	95	type = ntohl(xdr->type);
@@ -123,13 +125,16 @@ static int xdr_decode_AFSFetchStatus(const __be32 **_bp, · 29 unmodified lines
123	data_version \|= (u64)ntohl(xdr->data_version_hi) << 32;	125	data_version \|= (u64)ntohl(xdr->data_version_hi) << 32;
124	status->data_version = data_version;	126	status->data_version = data_version;
125	scb->have_status = true;	127	scb->have_status = true;
126		128	good:
		129	ret = 0;
		130	advance:
127	_bp = (const void )_bp + sizeof(xdr);	131	_bp = (const void )_bp + sizeof(xdr);
128	return 0;	132	return ret;
129		133
130	bad:	134	bad:
131	xdr_dump_bad(*_bp);	135	xdr_dump_bad(*_bp);
132	return afs_protocol_error(call, -EBADMSG, afs_eproto_bad_status);	136	ret = afs_protocol_error(call, -EBADMSG, afs_eproto_bad_status);
		137	goto advance;
133	}	138	}
134		139
135	static time64_t xdr_decode_expiry(struct afs_call *call, u32 expiry)	140	static time64_t xdr_decode_expiry(struct afs_call *call, u32 expiry)
@@ -981,16 +986,16 @@ static int afs_deliver_fs_rename(struct afs_call *call) · 845 unmodified lines
981	if (ret < 0)	986	if (ret < 0)
982	return ret;	987	return ret;
983		988
984	/* unmarshall the reply once we've received all of it */	989	/* If the two dirs are the same, we have two copies of the same status
		990	* report, so we just decode it twice.
		991	*/
985	bp = call->buffer;	992	bp = call->buffer;
986	ret = xdr_decode_AFSFetchStatus(&bp, call, call->out_dir_scb);	993	ret = xdr_decode_AFSFetchStatus(&bp, call, call->out_dir_scb);
987	if (ret < 0)	994	if (ret < 0)
988	return ret;	995	return ret;
989	if (call->out_dir_scb != call->out_scb) {	996	ret = xdr_decode_AFSFetchStatus(&bp, call, call->out_scb);
990	ret = xdr_decode_AFSFetchStatus(&bp, call, call->out_scb);	997	if (ret < 0)
991	if (ret < 0)	998	return ret;
992	return ret;
993	}
994	xdr_decode_AFSVolSync(&bp, call->out_volsync);	999	xdr_decode_AFSVolSync(&bp, call->out_volsync);
995		1000
996	_leave(" = 0 [done]");	1001	_leave(" = 0 [done]");

fs/afs/internal.h+1−3

 		u32		abort_code;
 		u32		cm_epoch;
 		short		error;
-		bool		have_result;
 		bool		responded:1;
 		bool		is_yfs:1;
 		bool		not_yfs:1;
 		bool		local_failure:1;
-		bool		no_epoch:1;
 		bool		cm_probed:1;
 		bool		said_rebooted:1;
 		bool		said_inconsistent:1;
 extern void afs_activate_volume(struct afs_volume *);
 extern void afs_deactivate_volume(struct afs_volume *);
 extern void afs_put_volume(struct afs_cell *, struct afs_volume *);
-extern int afs_check_volume_status(struct afs_volume *, struct key *);
+extern int afs_check_volume_status(struct afs_volume *, struct afs_fs_cursor *);
 /*
  * write.c

fs/afs/rotate.c+3−3

@@ -192,7 +192,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 191 unmodified lines
192	write_unlock(&vnode->volume->servers_lock);	192	write_unlock(&vnode->volume->servers_lock);
193		193
194	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);	194	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);
195	error = afs_check_volume_status(vnode->volume, fc->key);	195	error = afs_check_volume_status(vnode->volume, fc);
196	if (error < 0)	196	if (error < 0)
197	goto failed_set_error;	197	goto failed_set_error;
198		198
@@ -281,7 +281,7 @@ bool afs_select_fileserver(struct afs_fs_cursor *fc) · 82 unmodified lines
281		281
282	set_bit(AFS_VOLUME_WAIT, &vnode->volume->flags);	282	set_bit(AFS_VOLUME_WAIT, &vnode->volume->flags);
283	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);	283	set_bit(AFS_VOLUME_NEEDS_UPDATE, &vnode->volume->flags);
284	error = afs_check_volume_status(vnode->volume, fc->key);	284	error = afs_check_volume_status(vnode->volume, fc);
285	if (error < 0)	285	if (error < 0)
286	goto failed_set_error;	286	goto failed_set_error;
287		287
@@ -341,7 +341,7 @@ start: · 53 unmodified lines
341	/* See if we need to do an update of the volume record. Note that the	341	/* See if we need to do an update of the volume record. Note that the
342	* volume may have moved or even have been deleted.	342	* volume may have moved or even have been deleted.
343	*/	343	*/
344	error = afs_check_volume_status(vnode->volume, fc->key);	344	error = afs_check_volume_status(vnode->volume, fc);
345	if (error < 0)	345	if (error < 0)
346	goto failed_set_error;	346	goto failed_set_error;
347		347

fs/afs/server.c+2−5

 	}
 	ret = wait_on_bit(&server->flags, AFS_SERVER_FL_UPDATING,
-			  TASK_INTERRUPTIBLE);
+			  (fc->flags & AFS_FS_CURSOR_INTR) ?
+			  TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
 	if (ret == -ERESTARTSYS) {
-		if (!(fc->flags & AFS_FS_CURSOR_INTR) && server->addresses) {
-			_leave(" = t [intr]");
-			return true;
-		}
 		fc->error = ret;
 		_leave(" = f [intr]");
 		return false;

fs/afs/vl_rotate.c+2−2

@@ -302,8 +302,8 @@ static void afs_vl_dump_edestaddrreq(const struct afs_vl_cursor *vc) · 301 unmodified lines
302	pr_notice("VC: - nr=%u/%u/%u pf=%u\n",	302	pr_notice("VC: - nr=%u/%u/%u pf=%u\n",
303	a->nr_ipv4, a->nr_addrs, a->max_addrs,	303	a->nr_ipv4, a->nr_addrs, a->max_addrs,
304	a->preferred);	304	a->preferred);
305	pr_notice("VC: - pr=%lx R=%lx F=%lx\n",	305	pr_notice("VC: - R=%lx F=%lx\n",
306	a->probed, a->responded, a->failed);	306	a->responded, a->failed);
307	if (a == vc->ac.alist)	307	if (a == vc->ac.alist)
308	pr_notice("VC: - current\n");	308	pr_notice("VC: - current\n");
309	}	309	}

fs/afs/volume.c+5−3

 /*
  * Make sure the volume record is up to date.
  */
-int afs_check_volume_status(struct afs_volume *volume, struct key *key)
+int afs_check_volume_status(struct afs_volume *volume, struct afs_fs_cursor *fc)
 {
 	time64_t now = ktime_get_real_seconds();
 	int ret, retries = 0;
 	}
 	if (!test_and_set_bit_lock(AFS_VOLUME_UPDATING, &volume->flags)) {
-		ret = afs_update_volume_status(volume, key);
+		ret = afs_update_volume_status(volume, fc->key);
 		clear_bit_unlock(AFS_VOLUME_WAIT, &volume->flags);
 		clear_bit_unlock(AFS_VOLUME_UPDATING, &volume->flags);
 		wake_up_bit(&volume->flags, AFS_VOLUME_WAIT);
 		return 0;
 	}
-	ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT, TASK_INTERRUPTIBLE);
+	ret = wait_on_bit(&volume->flags, AFS_VOLUME_WAIT,
+			  (fc->flags & AFS_FS_CURSOR_INTR) ?
+			  TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE);
 	if (ret == -ERESTARTSYS) {
 		_leave(" = %d", ret);
 		return ret;

fs/afs/yfsclient.c+14−12

@@ -165,15 +165,15 @@ static void xdr_dump_bad(const __be32 *bp) · 164 unmodified lines
165	int i;	165	int i;
166		166
167	pr_notice("YFS XDR: Bad status record\n");	167	pr_notice("YFS XDR: Bad status record\n");
168	for (i = 0; i < 5 * 4 * 4; i += 16) {	168	for (i = 0; i < 6 * 4 * 4; i += 16) {
169	memcpy(x, bp, 16);	169	memcpy(x, bp, 16);
170	bp += 4;	170	bp += 4;
171	pr_notice("%03x: %08x %08x %08x %08x\n",	171	pr_notice("%03x: %08x %08x %08x %08x\n",
172	i, ntohl(x[0]), ntohl(x[1]), ntohl(x[2]), ntohl(x[3]));	172	i, ntohl(x[0]), ntohl(x[1]), ntohl(x[2]), ntohl(x[3]));
173	}	173	}
174		174
175	memcpy(x, bp, 4);	175	memcpy(x, bp, 8);
176	pr_notice("0x50: %08x\n", ntohl(x[0]));	176	pr_notice("0x60: %08x %08x\n", ntohl(x[0]), ntohl(x[1]));
177	}	177	}
178		178
179	/*	179	/*
@@ -186,13 +186,14 @@ static int xdr_decode_YFSFetchStatus(const __be32 **_bp, · 6 unmodified lines
186	const struct yfs_xdr_YFSFetchStatus xdr = (const void )*_bp;	186	const struct yfs_xdr_YFSFetchStatus xdr = (const void )*_bp;
187	struct afs_file_status *status = &scb->status;	187	struct afs_file_status *status = &scb->status;
188	u32 type;	188	u32 type;
		189	int ret;
189		190
190	status->abort_code = ntohl(xdr->abort_code);	191	status->abort_code = ntohl(xdr->abort_code);
191	if (status->abort_code != 0) {	192	if (status->abort_code != 0) {
192	if (status->abort_code == VNOVNODE)	193	if (status->abort_code == VNOVNODE)
193	status->nlink = 0;	194	status->nlink = 0;
194	scb->have_error = true;	195	scb->have_error = true;
195	return 0;	196	goto good;
196	}	197	}
197		198
198	type = ntohl(xdr->type);	199	type = ntohl(xdr->type);
@@ -220,13 +221,16 @@ static int xdr_decode_YFSFetchStatus(const __be32 **_bp, · 21 unmodified lines
220	status->size = xdr_to_u64(xdr->size);	221	status->size = xdr_to_u64(xdr->size);
221	status->data_version = xdr_to_u64(xdr->data_version);	222	status->data_version = xdr_to_u64(xdr->data_version);
222	scb->have_status = true;	223	scb->have_status = true;
223		224	good:
		225	ret = 0;
		226	advance:
224	*_bp += xdr_size(xdr);	227	*_bp += xdr_size(xdr);
225	return 0;	228	return ret;
226		229
227	bad:	230	bad:
228	xdr_dump_bad(*_bp);	231	xdr_dump_bad(*_bp);
229	return afs_protocol_error(call, -EBADMSG, afs_eproto_bad_status);	232	ret = afs_protocol_error(call, -EBADMSG, afs_eproto_bad_status);
		233	goto advance;
230	}	234	}
231		235
232	/*	236	/*
@@ -1153,11 +1157,9 @@ static int yfs_deliver_fs_rename(struct afs_call *call) · 920 unmodified lines
1153	ret = xdr_decode_YFSFetchStatus(&bp, call, call->out_dir_scb);	1157	ret = xdr_decode_YFSFetchStatus(&bp, call, call->out_dir_scb);
1154	if (ret < 0)	1158	if (ret < 0)
1155	return ret;	1159	return ret;
1156	if (call->out_dir_scb != call->out_scb) {	1160	ret = xdr_decode_YFSFetchStatus(&bp, call, call->out_scb);
1157	ret = xdr_decode_YFSFetchStatus(&bp, call, call->out_scb);	1161	if (ret < 0)
1158	if (ret < 0)	1162	return ret;
1159	return ret;
1160	}
1161		1163
1162	xdr_decode_YFSVolSync(&bp, call->out_volsync);	1164	xdr_decode_YFSVolSync(&bp, call->out_volsync);
1163	_leave(" = 0 [done]");	1165	_leave(" = 0 [done]");

fs/block_dev.c+10−1

 #include <linux/module.h>
 #include <linux/blkpg.h>
 #include <linux/magic.h>
-#include <linux/dax.h>
 #include <linux/buffer_head.h>
 #include <linux/swap.h>
 #include <linux/pagevec.h>
 	struct gendisk *disk = bdev->bd_disk;
 	struct block_device *victim = NULL;
+	/*
+	 * Sync early if it looks like we're the last one.  If someone else
+	 * opens the block device between now and the decrement of bd_openers
+	 * then we did a sync that we didn't need to, but that's not the end
+	 * of the world and we want to avoid long (could be several minute)
+	 * syncs while holding the mutex.
+	 */
+	if (bdev->bd_openers == 1)
+		sync_blockdev(bdev);
 	mutex_lock_nested(&bdev->bd_mutex, for_part);
 	if (for_part)
 		bdev->bd_part_count--;

fs/btrfs/backref.c+1−1

@@ -391,7 +391,7 @@ static int is_shared_data_backref(struct preftrees *preftrees, u64 bytenr) · 390 unmodified lines
391	struct rb_node **p = &preftrees->direct.root.rb_root.rb_node;	391	struct rb_node **p = &preftrees->direct.root.rb_root.rb_node;
392	struct rb_node *parent = NULL;	392	struct rb_node *parent = NULL;
393	struct prelim_ref *ref = NULL;	393	struct prelim_ref *ref = NULL;
394	struct prelim_ref target = {0};	394	struct prelim_ref target = {};
395	int result;	395	int result;
396		396
397	target.parent = bytenr;	397	target.parent = bytenr;

fs/btrfs/block-group.c+15−6

 	path = btrfs_alloc_path();
 	if (!path) {
 		ret = -ENOMEM;
-		goto out;
+		goto out_put_group;
 	}
 	/*
 		ret = btrfs_orphan_add(trans, BTRFS_I(inode));
 		if (ret) {
 			btrfs_add_delayed_iput(inode);
-			goto out;
+			goto out_put_group;
 		}
 		clear_nlink(inode);
 		/* One for the block groups ref */
 	ret = btrfs_search_slot(trans, tree_root, &key, path, -1, 1);
 	if (ret < 0)
-		goto out;
+		goto out_put_group;
 	if (ret > 0)
 		btrfs_release_path(path);
 	if (ret == 0) {
 		ret = btrfs_del_item(trans, tree_root, path);
 		if (ret)
-			goto out;
+			goto out_put_group;
 		btrfs_release_path(path);
 	}
 	ret = remove_block_group_free_space(trans, block_group);
 	if (ret)
-		goto out;
+		goto out_put_group;
-	btrfs_put_block_group(block_group);
+	/* Once for the block groups rbtree */
 	btrfs_put_block_group(block_group);
 	ret = btrfs_search_slot(trans, root, &key, path, -1, 1);
 		/* once for the tree */
 		free_extent_map(em);
 	}
+out_put_group:
+	/* Once for the lookup reference */
+	btrfs_put_block_group(block_group);
 out:
 	if (remove_rsv)
 		btrfs_delayed_refs_rsv_release(fs_info, 1);
 	if (ret)
 		goto err;
 	mutex_unlock(&fs_info->unused_bg_unpin_mutex);
+	if (prev_trans)
+		btrfs_put_transaction(prev_trans);
 	return true;
 err:
 	mutex_unlock(&fs_info->unused_bg_unpin_mutex);
+	if (prev_trans)
+		btrfs_put_transaction(prev_trans);
 	btrfs_dec_block_group_ro(bg);
 	return false;
 }
 			    space_info->bytes_reserved > 0 ||
 			    space_info->bytes_may_use > 0))
 			btrfs_dump_space_info(info, space_info, 0, 0);
+		WARN_ON(space_info->reclaim_size > 0);
 		list_del(&space_info->list);
 		btrfs_sysfs_remove_space_info(space_info);
 	}

fs/btrfs/discard.h+1−1

@@ -1,4 +1,4 @@
1	// SPDX-License-Identifier: GPL-2.0	1	/* SPDX-License-Identifier: GPL-2.0 */
2		2
3	#ifndef BTRFS_DISCARD_H	3	#ifndef BTRFS_DISCARD_H
4	#define BTRFS_DISCARD_H	4	#define BTRFS_DISCARD_H

fs/btrfs/disk-io.c+32−4

@@ -2036,9 +2036,6 @@ void btrfs_free_fs_roots(struct btrfs_fs_info *fs_info) · 2035 unmodified lines
2036	for (i = 0; i < ret; i++)	2036	for (i = 0; i < ret; i++)
2037	btrfs_drop_and_free_fs_root(fs_info, gang[i]);	2037	btrfs_drop_and_free_fs_root(fs_info, gang[i]);
2038	}	2038	}
2039
2040	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state))
2041	btrfs_free_log_root_tree(NULL, fs_info);
2042	}	2039	}
2043		2040
2044	static void btrfs_init_scrub(struct btrfs_fs_info *fs_info)	2041	static void btrfs_init_scrub(struct btrfs_fs_info *fs_info)
@@ -3888,7 +3885,7 @@ void btrfs_drop_and_free_fs_root(struct btrfs_fs_info *fs_info, · 1843 unmodified lines
3888	spin_unlock(&fs_info->fs_roots_radix_lock);	3885	spin_unlock(&fs_info->fs_roots_radix_lock);
3889		3886
3890	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) {	3887	if (test_bit(BTRFS_FS_STATE_ERROR, &fs_info->fs_state)) {
3891	btrfs_free_log(NULL, root);	3888	ASSERT(root->log_root == NULL);
3892	if (root->reloc_root) {	3889	if (root->reloc_root) {
3893	btrfs_put_root(root->reloc_root);	3890	btrfs_put_root(root->reloc_root);
3894	root->reloc_root = NULL;	3891	root->reloc_root = NULL;
@@ -4211,6 +4208,36 @@ static void btrfs_error_commit_super(struct btrfs_fs_info *fs_info) · 316 unmodified lines
4211	up_write(&fs_info->cleanup_work_sem);	4208	up_write(&fs_info->cleanup_work_sem);
4212	}	4209	}
4213		4210
		4211	static void btrfs_drop_all_logs(struct btrfs_fs_info *fs_info)
		4212	{
		4213	struct btrfs_root *gang[8];
		4214	u64 root_objectid = 0;
		4215	int ret;
		4216
		4217	spin_lock(&fs_info->fs_roots_radix_lock);
		4218	while ((ret = radix_tree_gang_lookup(&fs_info->fs_roots_radix,
		4219	(void **)gang, root_objectid,
		4220	ARRAY_SIZE(gang))) != 0) {
		4221	int i;
		4222
		4223	for (i = 0; i < ret; i++)
		4224	gang[i] = btrfs_grab_root(gang[i]);
		4225	spin_unlock(&fs_info->fs_roots_radix_lock);
		4226
		4227	for (i = 0; i < ret; i++) {
		4228	if (!gang[i])
		4229	continue;
		4230	root_objectid = gang[i]->root_key.objectid;
		4231	btrfs_free_log(NULL, gang[i]);
		4232	btrfs_put_root(gang[i]);
		4233	}
		4234	root_objectid++;
		4235	spin_lock(&fs_info->fs_roots_radix_lock);
		4236	}
		4237	spin_unlock(&fs_info->fs_roots_radix_lock);
		4238	btrfs_free_log_root_tree(NULL, fs_info);
		4239	}
		4240
4214	static void btrfs_destroy_ordered_extents(struct btrfs_root *root)	4241	static void btrfs_destroy_ordered_extents(struct btrfs_root *root)
4215	{	4242	{
4216	struct btrfs_ordered_extent *ordered;	4243	struct btrfs_ordered_extent *ordered;
@@ -4603,6 +4630,7 @@ static int btrfs_cleanup_transaction(struct btrfs_fs_info *fs_info) · 386 unmodified lines
4603	btrfs_destroy_delayed_inodes(fs_info);	4630	btrfs_destroy_delayed_inodes(fs_info);
4604	btrfs_assert_delayed_root_empty(fs_info);	4631	btrfs_assert_delayed_root_empty(fs_info);
4605	btrfs_destroy_all_delalloc_inodes(fs_info);	4632	btrfs_destroy_all_delalloc_inodes(fs_info);
		4633	btrfs_drop_all_logs(fs_info);
4606	mutex_unlock(&fs_info->transaction_kthread_mutex);	4634	mutex_unlock(&fs_info->transaction_kthread_mutex);
4607		4635
4608	return 0;	4636	return 0;

fs/btrfs/file.c+15−0

@@ -2097,6 +2097,21 @@ int btrfs_sync_file(struct file *file, loff_t start, loff_t end, int datasync) · 2096 unmodified lines
2097		2097
2098	atomic_inc(&root->log_batch);	2098	atomic_inc(&root->log_batch);
2099		2099
		2100	/*
		2101	* If the inode needs a full sync, make sure we use a full range to
		2102	* avoid log tree corruption, due to hole detection racing with ordered
		2103	* extent completion for adjacent ranges and races between logging and
		2104	* completion of ordered extents for adjancent ranges - both races
		2105	* could lead to file extent items in the log with overlapping ranges.
		2106	* Do this while holding the inode lock, to avoid races with other
		2107	* tasks.
		2108	*/
		2109	if (test_bit(BTRFS_INODE_NEEDS_FULL_SYNC,
		2110	&BTRFS_I(inode)->runtime_flags)) {
		2111	start = 0;
		2112	end = LLONG_MAX;
		2113	}
		2114
2100	/*	2115	/*
2101	* Before we acquired the inode's lock, someone may have dirtied more	2116	* Before we acquired the inode's lock, someone may have dirtied more
2102	* pages in the target range. We need to make sure that writeback for	2117	* pages in the target range. We need to make sure that writeback for

fs/btrfs/reflink.c+1−0

@@ -264,6 +264,7 @@ copy_inline_extent: · 263 unmodified lines
264	size);	264	size);
265	inode_add_bytes(dst, datal);	265	inode_add_bytes(dst, datal);
266	set_bit(BTRFS_INODE_NEEDS_FULL_SYNC, &BTRFS_I(dst)->runtime_flags);	266	set_bit(BTRFS_INODE_NEEDS_FULL_SYNC, &BTRFS_I(dst)->runtime_flags);
		267	ret = btrfs_inode_set_file_extent_range(BTRFS_I(dst), 0, aligned_end);
267	out:	268	out:
268	if (!ret && !trans) {	269	if (!ret && !trans) {
269	/*	270	/*

fs/btrfs/relocation.c+20−4

 	if (!reloc_root)
 		return 0;
-	if (btrfs_root_last_snapshot(&reloc_root->root_item) ==
+	if (btrfs_header_generation(reloc_root->commit_root) ==
-	    root->fs_info->running_transaction->transid - 1)
+	    root->fs_info->running_transaction->transid)
 		return 0;
 	/*
 	 * if there is reloc tree and it was created in previous
 	int clear_rsv = 0;
 	int ret;
-	if (!rc || !rc->create_reloc_tree ||
+	if (!rc)
-	    root->root_key.objectid == BTRFS_TREE_RELOC_OBJECTID)
 		return 0;
 	/*
 	if (reloc_root_is_dead(root))
 		return 0;
+	/*
+	 * This is subtle but important.  We do not do
+	 * record_root_in_transaction for reloc roots, instead we record their
+	 * corresponding fs root, and then here we update the last trans for the
+	 * reloc root.  This means that we have to do this for the entire life
+	 * of the reloc root, regardless of which stage of the relocation we are
+	 * in.
+	 */
 	if (root->reloc_root) {
 		reloc_root = root->reloc_root;
 		reloc_root->last_trans = trans->transid;
 		return 0;
 	}
+	/*
+	 * We are merging reloc roots, we do not need new reloc trees.  Also
+	 * reloc trees never need their own reloc tree.
+	 */
+	if (!rc->create_reloc_tree ||
+	    root->root_key.objectid == BTRFS_TREE_RELOC_OBJECTID)
+		return 0;
 	if (!trans->reloc_reserved) {
 		rsv = trans->block_rsv;
 		trans->block_rsv = rc->block_rsv;
 		if (IS_ERR(fs_root)) {
 			err = PTR_ERR(fs_root);
 			list_add_tail(&reloc_root->root_list, &reloc_roots);
+			btrfs_end_transaction(trans);
 			goto out_unset;
 		}

fs/btrfs/space-info.c+14−6

 	return 0;
 }
+static void remove_ticket(struct btrfs_space_info *space_info,
+			  struct reserve_ticket *ticket)
+{
+	if (!list_empty(&ticket->list)) {
+		list_del_init(&ticket->list);
+		ASSERT(space_info->reclaim_size >= ticket->bytes);
+		space_info->reclaim_size -= ticket->bytes;
+	}
+}
 /*
  * This is for space we already have accounted in space_info->bytes_may_use, so
  * basically when we're returning space from block_rsv's.
 			btrfs_space_info_update_bytes_may_use(fs_info,
 							      space_info,
 							      ticket->bytes);
-			list_del_init(&ticket->list);
+			remove_ticket(space_info, ticket);
-			ASSERT(space_info->reclaim_size >= ticket->bytes);
-			space_info->reclaim_size -= ticket->bytes;
 			ticket->bytes = 0;
 			space_info->tickets_id++;
 			wake_up(&ticket->wait);
 			btrfs_info(fs_info, "failing ticket with %llu bytes",
 				   ticket->bytes);
-		list_del_init(&ticket->list);
+		remove_ticket(space_info, ticket);
 		ticket->error = -ENOSPC;
 		wake_up(&ticket->wait);
 			 * despite getting an error, resulting in a space leak
 			 * (bytes_may_use counter of our space_info).
 			 */
-			list_del_init(&ticket->list);
+			remove_ticket(space_info, ticket);
 			ticket->error = -EINTR;
 			break;
 		}
 		 * either the async reclaim job deletes the ticket from the list
 		 * or we delete it ourselves at wait_reserve_ticket().
 		 */
-		list_del_init(&ticket->list);
+		remove_ticket(space_info, ticket);
 		if (!ret)
 			ret = -ENOSPC;
 	}

fs/btrfs/transaction.c+11−2

@@ -662,10 +662,19 @@ again: · 661 unmodified lines
662	}	662	}
663		663
664	got_it:	664	got_it:
665	btrfs_record_root_in_trans(h, root);
666
667	if (!current->journal_info)	665	if (!current->journal_info)
668	current->journal_info = h;	666	current->journal_info = h;
		667
		668	/*
		669	* btrfs_record_root_in_trans() needs to alloc new extents, and may
		670	* call btrfs_join_transaction() while we're also starting a
		671	* transaction.
		672	*
		673	* Thus it need to be called after current->journal_info initialized,
		674	* or we can deadlock.
		675	*/
		676	btrfs_record_root_in_trans(h, root);
		677
669	return h;	678	return h;
670		679
671	join_fail:	680	join_fail:

fs/btrfs/tree-log.c+54−82

 static int btrfs_log_inode(struct btrfs_trans_handle *trans,
 			   struct btrfs_root *root, struct btrfs_inode *inode,
 			   int inode_only,
-			   u64 start,
+			   const loff_t start,
-			   u64 end,
+			   const loff_t end,
 			   struct btrfs_log_ctx *ctx);
 static int link_to_fixup_dir(struct btrfs_trans_handle *trans,
 			     struct btrfs_root *root,
 	const u64 ino = btrfs_ino(inode);
 	struct btrfs_path *dst_path = NULL;
 	bool dropped_extents = false;
+	u64 truncate_offset = i_size;
+	struct extent_buffer *leaf;
+	int slot;
 	int ins_nr = 0;
 	int start_slot;
 	int ret;
 	if (ret < 0)
 		goto out;
+	/*
+	 * We must check if there is a prealloc extent that starts before the
+	 * i_size and crosses the i_size boundary. This is to ensure later we
+	 * truncate down to the end of that extent and not to the i_size, as
+	 * otherwise we end up losing part of the prealloc extent after a log
+	 * replay and with an implicit hole if there is another prealloc extent
+	 * that starts at an offset beyond i_size.
+	 */
+	ret = btrfs_previous_item(root, path, ino, BTRFS_EXTENT_DATA_KEY);
+	if (ret < 0)
+		goto out;
+	if (ret == 0) {
+		struct btrfs_file_extent_item *ei;
+		leaf = path->nodes[0];
+		slot = path->slots[0];
+		ei = btrfs_item_ptr(leaf, slot, struct btrfs_file_extent_item);
+		if (btrfs_file_extent_type(leaf, ei) ==
+		    BTRFS_FILE_EXTENT_PREALLOC) {
+			u64 extent_end;
+			btrfs_item_key_to_cpu(leaf, &key, slot);
+			extent_end = key.offset +
+				btrfs_file_extent_num_bytes(leaf, ei);
+			if (extent_end > i_size)
+				truncate_offset = extent_end;
+		}
+	} else {
+		ret = 0;
+	}
 	while (true) {
-		struct extent_buffer *leaf = path->nodes[0];
+		leaf = path->nodes[0];
-		int slot = path->slots[0];
+		slot = path->slots[0];
 		if (slot >= btrfs_header_nritems(leaf)) {
 			if (ins_nr > 0) {
 				ret = btrfs_truncate_inode_items(trans,
 							 root->log_root,
 							 &inode->vfs_inode,
-							 i_size,
+							 truncate_offset,
 							 BTRFS_EXTENT_DATA_KEY);
 			} while (ret == -EAGAIN);
 			if (ret)
 static int btrfs_log_holes(struct btrfs_trans_handle *trans,
 			   struct btrfs_root *root,
 			   struct btrfs_inode *inode,
-			   struct btrfs_path *path,
+			   struct btrfs_path *path)
-			   const u64 start,
-			   const u64 end)
 {
 	struct btrfs_fs_info *fs_info = root->fs_info;
 	struct btrfs_key key;
 	const u64 ino = btrfs_ino(inode);
 	const u64 i_size = i_size_read(&inode->vfs_inode);
-	u64 prev_extent_end = start;
+	u64 prev_extent_end = 0;
 	int ret;
 	if (!btrfs_fs_incompat(fs_info, NO_HOLES) || i_size == 0)
 	key.objectid = ino;
 	key.type = BTRFS_EXTENT_DATA_KEY;
-	key.offset = start;
+	key.offset = 0;
 	ret = btrfs_search_slot(NULL, root, &key, path, 0, 0);
 	if (ret < 0)
 		return ret;
-	if (ret > 0 && path->slots[0] > 0) {
-		btrfs_item_key_to_cpu(path->nodes[0], &key, path->slots[0] - 1);
-		if (key.objectid == ino && key.type == BTRFS_EXTENT_DATA_KEY)
-			path->slots[0]--;
-	}
 	while (true) {
 		struct extent_buffer *leaf = path->nodes[0];
-		u64 extent_end;
 		if (path->slots[0] >= btrfs_header_nritems(path->nodes[0])) {
 			ret = btrfs_next_leaf(root, path);
 		if (key.objectid != ino || key.type != BTRFS_EXTENT_DATA_KEY)
 			break;
-		extent_end = btrfs_file_extent_end(path);
-		if (extent_end <= start)
-			goto next_slot;
 		/* We have a hole, log it. */
 		if (prev_extent_end < key.offset) {
-			u64 hole_len;
+			const u64 hole_len = key.offset - prev_extent_end;
-			if (key.offset >= end)
-				hole_len = end - prev_extent_end;
-			else
-				hole_len = key.offset - prev_extent_end;
 			/*
 			 * Release the path to avoid deadlocks with other code
 			leaf = path->nodes[0];
 		}
-		prev_extent_end = min(extent_end, end);
+		prev_extent_end = btrfs_file_extent_end(path);
-		if (extent_end >= end)
-			break;
-next_slot:
 		path->slots[0]++;
 		cond_resched();
 	}
-	if (prev_extent_end < end && prev_extent_end < i_size) {
+	if (prev_extent_end < i_size) {
 		u64 hole_len;
 		btrfs_release_path(path);
-		hole_len = min(ALIGN(i_size, fs_info->sectorsize), end);
+		hole_len = ALIGN(i_size - prev_extent_end, fs_info->sectorsize);
-		hole_len -= prev_extent_end;
 		ret = btrfs_insert_file_extent(trans, root->log_root,
 					       ino, prev_extent_end, 0, 0,
 					       hole_len, 0, hole_len,
 				   const u64 logged_isize,
 				   const bool recursive_logging,
 				   const int inode_only,
-				   const u64 start,
-				   const u64 end,
 				   struct btrfs_log_ctx *ctx,
 				   bool *need_log_inode_item)
 {
 	int ins_nr = 0;
 	int ret;
-	/*
-	 * We must make sure we don't copy extent items that are entirely out of
-	 * the range [start, end - 1]. This is not just an optimization to avoid
-	 * copying but also needed to avoid a corruption where we end up with
-	 * file extent items in the log tree that have overlapping ranges - this
-	 * can happen if we race with ordered extent completion for ranges that
-	 * are outside our target range. For example we copy an extent item and
-	 * when we move to the next leaf, that extent was trimmed and a new one
-	 * covering a subrange of it, but with a higher key, was inserted - we
-	 * would then copy this other extent too, resulting in a log tree with
-	 * 2 extent items that represent overlapping ranges.
-	 *
-	 * We can copy the entire extents at the range bondaries however, even
-	 * if they cover an area outside the target range. That's ok.
-	 */
 	while (1) {
 		ret = btrfs_search_forward(root, min_key, path, trans->transid);
 		if (ret < 0)
 			goto next_slot;
 		}
-		if (min_key->type == BTRFS_EXTENT_DATA_KEY) {
-			const u64 extent_end = btrfs_file_extent_end(path);
-			if (extent_end <= start) {
-				if (ins_nr > 0) {
-					ret = copy_items(trans, inode, dst_path,
-							 path, ins_start_slot,
-							 ins_nr, inode_only,
-							 logged_isize);
-					if (ret < 0)
-						return ret;
-					ins_nr = 0;
-				}
-				goto next_slot;
-			}
-			if (extent_end >= end) {
-				ins_nr++;
-				if (ins_nr == 1)
-					ins_start_slot = path->slots[0];
-				break;
-			}
-		}
 		if (ins_nr && ins_start_slot + ins_nr == path->slots[0]) {
 			ins_nr++;
 			goto next_slot;
 static int btrfs_log_inode(struct btrfs_trans_handle *trans,
 			   struct btrfs_root *root, struct btrfs_inode *inode,
 			   int inode_only,
-			   u64 start,
+			   const loff_t start,
-			   u64 end,
+			   const loff_t end,
 			   struct btrfs_log_ctx *ctx)
 {
 	struct btrfs_fs_info *fs_info = root->fs_info;
 		return -ENOMEM;
 	}
-	start = ALIGN_DOWN(start, fs_info->sectorsize);
-	end = ALIGN(end, fs_info->sectorsize);
 	min_key.objectid = ino;
 	min_key.type = BTRFS_INODE_ITEM_KEY;
 	min_key.offset = 0;
 	err = copy_inode_items_to_log(trans, inode, &min_key, &max_key,
 				      path, dst_path, logged_isize,
-				      recursive_logging, inode_only,
+				      recursive_logging, inode_only, ctx,
-				      start, end, ctx, &need_log_inode_item);
+				      &need_log_inode_item);
 	if (err)
 		goto out_unlock;
 	if (max_key.type >= BTRFS_EXTENT_DATA_KEY && !fast_search) {
 		btrfs_release_path(path);
 		btrfs_release_path(dst_path);
-		err = btrfs_log_holes(trans, root, inode, path, start, end);
+		err = btrfs_log_holes(trans, root, inode, path);
 		if (err)
 			goto out_unlock;
 	}

fs/buffer.c+12−1

 	struct page *page;
 	struct buffer_head *bh;
 	sector_t end_block;
-	int ret = 0;		/* Will call free_more_memory() */
+	int ret = 0;
 	gfp_t gfp_mask;
 	gfp_mask = mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS) | gfp;
 }
 EXPORT_SYMBOL(__breadahead);
+void __breadahead_gfp(struct block_device *bdev, sector_t block, unsigned size,
+		      gfp_t gfp)
+{
+	struct buffer_head *bh = __getblk_gfp(bdev, block, size, gfp);
+	if (likely(bh)) {
+		ll_rw_block(REQ_OP_READ, REQ_RAHEAD, 1, &bh);
+		brelse(bh);
+	}
+}
+EXPORT_SYMBOL(__breadahead_gfp);
 /**
  *  __bread_gfp() - reads a specified block and returns the bh
  *  @bdev: the block_device to read from

fs/ceph/dir.c+2−2

@@ -1051,8 +1051,8 @@ static void ceph_async_unlink_cb(struct ceph_mds_client *mdsc, · 1050 unmodified lines
1051		1051
1052	/* If op failed, mark everyone involved for errors */	1052	/* If op failed, mark everyone involved for errors */
1053	if (result) {	1053	if (result) {
1054	int pathlen;	1054	int pathlen = 0;
1055	u64 base;	1055	u64 base = 0;
1056	char *path = ceph_mdsc_build_path(req->r_dentry, &pathlen,	1056	char *path = ceph_mdsc_build_path(req->r_dentry, &pathlen,
1057	&base, 0);	1057	&base, 0);
1058		1058

fs/ceph/file.c+2−2

@@ -527,8 +527,8 @@ static void ceph_async_create_cb(struct ceph_mds_client *mdsc, · 526 unmodified lines
527		527
528	if (result) {	528	if (result) {
529	struct dentry *dentry = req->r_dentry;	529	struct dentry *dentry = req->r_dentry;
530	int pathlen;	530	int pathlen = 0;
531	u64 base;	531	u64 base = 0;
532	char *path = ceph_mdsc_build_path(req->r_dentry, &pathlen,	532	char *path = ceph_mdsc_build_path(req->r_dentry, &pathlen,
533	&base, 0);	533	&base, 0);
534		534

fs/ceph/mds_client.h+1−1

@@ -521,7 +521,7 @@ extern void ceph_mdsc_pre_umount(struct ceph_mds_client *mdsc); · 520 unmodified lines
521		521
522	static inline void ceph_mdsc_free_path(char *path, int len)	522	static inline void ceph_mdsc_free_path(char *path, int len)
523	{	523	{
524	if (path)	524	if (!IS_ERR_OR_NULL(path))
525	__putname(path - (PATH_MAX - 1 - len));	525	__putname(path - (PATH_MAX - 1 - len));
526	}	526	}
527		527

fs/cifs/cifsglob.h+2−1

 /*
  * This lock protects the cifs_tcp_ses_list, the list of smb sessions per
  * tcp session, and the list of tcon's per smb session. It also protects
- * the reference counters for the server, smb session, and tcon. Finally,
+ * the reference counters for the server, smb session, and tcon. It also
+ * protects some fields in the TCP_Server_Info struct such as dstaddr. Finally,
  * changes to the tcon->tidStatus should be done while holding this lock.
  * generally the locks should be taken in order tcp_ses_lock before
  * tcon->open_file_lock and that before file->file_info_lock since the

fs/cifs/cifssmb.c+4−0

 			       cifs_max_pending);
 	set_credits(server, server->maxReq);
 	server->maxBuf = le16_to_cpu(rsp->MaxBufSize);
+	/* set up max_read for readpages check */
+	server->max_read = server->maxBuf;
 	/* even though we do not use raw we might as well set this
 	accurately, in case we ever find a need for it */
 	if ((le16_to_cpu(rsp->RawMode) & RAW_ENABLE) == RAW_ENABLE) {
 	set_credits(server, server->maxReq);
 	/* probably no need to store and check maxvcs */
 	server->maxBuf = le32_to_cpu(pSMBr->MaxBufferSize);
+	/* set up max_read for readpages check */
+	server->max_read = server->maxBuf;
 	server->max_rw = le32_to_cpu(pSMBr->MaxRawSize);
 	cifs_dbg(NOISY, "Max buf = %d\n", ses->server->maxBuf);
 	server->capabilities = le32_to_cpu(pSMBr->Capabilities);

fs/cifs/connect.c+6−0

 		return rc;
 	}
+	spin_lock(&cifs_tcp_ses_lock);
 	rc = cifs_convert_address((struct sockaddr *)&server->dstaddr, ipaddr,
 				  strlen(ipaddr));
+	spin_unlock(&cifs_tcp_ses_lock);
 	kfree(ipaddr);
 	return !rc ? -1 : 0;
 	spin_lock(&cifs_tcp_ses_lock);
 	list_for_each(tmp, &ses->tcon_list) {
 		tcon = list_entry(tmp, struct cifs_tcon, tcon_list);
+#ifdef CONFIG_CIFS_DFS_UPCALL
+		if (tcon->dfs_path)
+			continue;
+#endif
 		if (!match_tcon(tcon, volume_info))
 			continue;
 		++tcon->tc_count;

fs/cifs/inode.c+1−1

@@ -61,7 +61,7 @@ static void cifs_set_ops(struct inode *inode) · 60 unmodified lines
61	}	61	}
62		62
63	/* check if server can support readpages */	63	/* check if server can support readpages */
64	if (cifs_sb_master_tcon(cifs_sb)->ses->server->maxBuf <	64	if (cifs_sb_master_tcon(cifs_sb)->ses->server->max_read <
65	PAGE_SIZE + MAX_CIFS_HDR_SIZE)	65	PAGE_SIZE + MAX_CIFS_HDR_SIZE)
66	inode->i_data.a_ops = &cifs_addr_ops_smallbuf;	66	inode->i_data.a_ops = &cifs_addr_ops_smallbuf;
67	else	67	else

fs/cifs/misc.c+65−17

 }
 struct super_cb_data {
-	struct TCP_Server_Info *server;
+	void *data;
 	struct super_block *sb;
 };
-static void super_cb(struct super_block *sb, void *arg)
+static void tcp_super_cb(struct super_block *sb, void *arg)
 {
-	struct super_cb_data *d = arg;
+	struct super_cb_data *sd = arg;
+	struct TCP_Server_Info *server = sd->data;
 	struct cifs_sb_info *cifs_sb;
 	struct cifs_tcon *tcon;
-	if (d->sb)
+	if (sd->sb)
 		return;
 	cifs_sb = CIFS_SB(sb);
 	tcon = cifs_sb_master_tcon(cifs_sb);
-	if (tcon->ses->server == d->server)
+	if (tcon->ses->server == server)
-		d->sb = sb;
+		sd->sb = sb;
 }
-struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server)
+static struct super_block *__cifs_get_super(void (*f)(struct super_block *, void *),
+					    void *data)
 {
-	struct super_cb_data d = {
+	struct super_cb_data sd = {
-		.server = server,
+		.data = data,
 		.sb = NULL,
 	};
-	iterate_supers_type(&cifs_fs_type, super_cb, &d);
+	iterate_supers_type(&cifs_fs_type, f, &sd);
-	if (unlikely(!d.sb))
+	if (!sd.sb)
-		return ERR_PTR(-ENOENT);
+		return ERR_PTR(-EINVAL);
 	/*
 	 * Grab an active reference in order to prevent automounts (DFS links)
 	 * of expiring and then freeing up our cifs superblock pointer while
 	 * we're doing failover.
 	 */
-	cifs_sb_active(d.sb);
+	cifs_sb_active(sd.sb);
-	return d.sb;
+	return sd.sb;
 }
-void cifs_put_tcp_super(struct super_block *sb)
+static void __cifs_put_super(struct super_block *sb)
 {
 	if (!IS_ERR_OR_NULL(sb))
 		cifs_sb_deactive(sb);
 }
+struct super_block *cifs_get_tcp_super(struct TCP_Server_Info *server)
+{
+	return __cifs_get_super(tcp_super_cb, server);
+}
+void cifs_put_tcp_super(struct super_block *sb)
+{
+	__cifs_put_super(sb);
+}
+#ifdef CONFIG_CIFS_DFS_UPCALL
+static void tcon_super_cb(struct super_block *sb, void *arg)
+{
+	struct super_cb_data *sd = arg;
+	struct cifs_tcon *tcon = sd->data;
+	struct cifs_sb_info *cifs_sb;
+	if (sd->sb)
+		return;
+	cifs_sb = CIFS_SB(sb);
+	if (tcon->dfs_path && cifs_sb->origin_fullpath &&
+	    !strcasecmp(tcon->dfs_path, cifs_sb->origin_fullpath))
+		sd->sb = sb;
+}
+static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon)
+{
+	return __cifs_get_super(tcon_super_cb, tcon);
+}
+static inline void cifs_put_tcon_super(struct super_block *sb)
+{
+	__cifs_put_super(sb);
+}
+#else
+static inline struct super_block *cifs_get_tcon_super(struct cifs_tcon *tcon)
+{
+	return ERR_PTR(-EOPNOTSUPP);
+}
+static inline void cifs_put_tcon_super(struct super_block *sb)
+{
+}
+#endif
 int update_super_prepath(struct cifs_tcon *tcon, const char *prefix,
 			 size_t prefix_len)
 {
 	struct cifs_sb_info *cifs_sb;
 	int rc = 0;
-	sb = cifs_get_tcp_super(tcon->ses->server);
+	sb = cifs_get_tcon_super(tcon);
 	if (IS_ERR(sb))
 		return PTR_ERR(sb);
 	cifs_sb->mnt_cifs_flags |= CIFS_MOUNT_USE_PREFIX_PATH;
 out:
-	cifs_put_tcp_super(sb);
+	cifs_put_tcon_super(sb);
 	return rc;
 }

fs/cifs/smb2ops.c+5−0

 	if (smb3_encryption_required(tcon))
 		flags |= CIFS_TRANSFORM_REQ;
+	if (!server->ops->new_lease_key)
+		return -EIO;
+	server->ops->new_lease_key(pfid);
 	memset(rqst, 0, sizeof(rqst));
 	resp_buftype[0] = resp_buftype[1] = CIFS_NO_BUFFER;
 	memset(rsp_iov, 0, sizeof(rsp_iov));

fs/cifs/smb2pdu.c+15−0

@@ -1552,6 +1552,21 @@ SMB2_sess_auth_rawntlmssp_authenticate(struct SMB2_sess_data *sess_data) · 1551 unmodified lines
1552	}	1552	}
1553		1553
1554	rc = SMB2_sess_establish_session(sess_data);	1554	rc = SMB2_sess_establish_session(sess_data);
		1555	#ifdef CONFIG_CIFS_DEBUG_DUMP_KEYS
		1556	if (ses->server->dialect < SMB30_PROT_ID) {
		1557	cifs_dbg(VFS, "%s: dumping generated SMB2 session keys\n", __func__);
		1558	/*
		1559	* The session id is opaque in terms of endianness, so we can't
		1560	* print it as a long long. we dump it as we got it on the wire
		1561	*/
		1562	cifs_dbg(VFS, "Session Id %*ph\n", (int)sizeof(ses->Suid),
		1563	&ses->Suid);
		1564	cifs_dbg(VFS, "Session Key %*ph\n",
		1565	SMB2_NTLMV2_SESSKEY_SIZE, ses->auth_key.response);
		1566	cifs_dbg(VFS, "Signing Key %*ph\n",
		1567	SMB3_SIGN_KEY_SIZE, ses->auth_key.response);
		1568	}
		1569	#endif
1555	out:	1570	out:
1556	kfree(ntlmssp_blob);	1571	kfree(ntlmssp_blob);
1557	SMB2_sess_free_buffer(sess_data);	1572	SMB2_sess_free_buffer(sess_data);

fs/cifs/smb2transport.c+2−2

@@ -660,8 +660,8 @@ smb2_verify_signature(struct smb_rqst rqst, struct TCP_Server_Info server) · 659 unmodified lines
660	return rc;	660	return rc;
661		661
662	if (memcmp(server_response_sig, shdr->Signature, SMB2_SIGNATURE_SIZE)) {	662	if (memcmp(server_response_sig, shdr->Signature, SMB2_SIGNATURE_SIZE)) {
663	dump_stack();	663	cifs_dbg(VFS, "sign fail cmd 0x%x message id 0x%llx\n",
664	cifs_dbg(VFS, "sign fail cmd 0x%x message id 0x%llx\n", shdr->Command, shdr->MessageId);	664	shdr->Command, shdr->MessageId);
665	return -EACCES;	665	return -EACCES;
666	} else	666	} else
667	return 0;	667	return 0;

fs/coredump.c+2−0

@@ -211,6 +211,8 @@ static int format_corename(struct core_name cn, struct coredump_params cprm, · 210 unmodified lines
211	return -ENOMEM;	211	return -ENOMEM;
212	(argv)[(argc)++] = 0;	212	(argv)[(argc)++] = 0;
213	++pat_ptr;	213	++pat_ptr;
		214	if (!(*pat_ptr))
		215	return -ENOMEM;
214	}	216	}
215		217
216	/* Repeat as long as we have more pattern to process and more output	218	/* Repeat as long as we have more pattern to process and more output

fs/debugfs/file.c+3−12

  * This function creates a file in debugfs with the given name that
  * contains the value of the variable @value.  If the @mode variable is so
  * set, it can be read from, and written to.
- *
- * This function will return a pointer to a dentry if it succeeds.  This
- * pointer must be passed to the debugfs_remove() function when the file is
- * to be removed (no automatic cleanup happens if your module is unloaded,
- * you are responsible here.)  If an error occurs, ERR_PTR(-ERROR) will be
- * returned.
- *
- * If debugfs is not enabled in the kernel, the value ERR_PTR(-ENODEV) will
- * be returned.
  */
-struct dentry *debugfs_create_u32(const char *name, umode_t mode,
+void debugfs_create_u32(const char *name, umode_t mode, struct dentry *parent,
-				 struct dentry *parent, u32 *value)
+			u32 *value)
 {
-	return debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32,
+	debugfs_create_mode_unsafe(name, mode, parent, value, &fops_u32,
 				   &fops_u32_ro, &fops_u32_wo);
 }
 EXPORT_SYMBOL_GPL(debugfs_create_u32);

fs/exfat/balloc.c+0−3

 		}
 	}
-	sbi->pbr_bh = NULL;
 	return 0;
 }
 {
 	int i;
-	brelse(sbi->pbr_bh);
 	for (i = 0; i < sbi->map_sectors; i++)
 		__brelse(sbi->vol_amap[i]);

fs/exfat/exfat_fs.h+1−0

@@ -507,6 +507,7 @@ void exfat_msg(struct super_block sb, const char lv, const char *fmt, ...) · 506 unmodified lines
507	__printf(3, 4) __cold;	507	__printf(3, 4) __cold;
508	void exfat_get_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,	508	void exfat_get_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,
509	u8 tz, __le16 time, __le16 date, u8 time_ms);	509	u8 tz, __le16 time, __le16 date, u8 time_ms);
		510	void exfat_truncate_atime(struct timespec64 *ts);
510	void exfat_set_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,	511	void exfat_set_entry_time(struct exfat_sb_info sbi, struct timespec64 ts,
511	u8 tz, __le16 time, __le16 date, u8 time_ms);	512	u8 tz, __le16 time, __le16 date, u8 time_ms);
512	unsigned short exfat_calc_chksum_2byte(void *data, int len,	513	unsigned short exfat_calc_chksum_2byte(void *data, int len,

fs/exfat/file.c+2−0

 	struct exfat_inode_info *ei = EXFAT_I(inode);
 	generic_fillattr(inode, stat);
+	exfat_truncate_atime(&stat->atime);
 	stat->result_mask |= STATX_BTIME;
 	stat->btime.tv_sec = ei->i_crtime.tv_sec;
 	stat->btime.tv_nsec = ei->i_crtime.tv_nsec;
 	}
 	setattr_copy(inode, attr);
+	exfat_truncate_atime(&inode->i_atime);
 	mark_inode_dirty(inode);
 out:

fs/exfat/misc.c+13−1

 	if (time_ms) {
 		ts->tv_sec += time_ms / 100;
 		ts->tv_nsec = (time_ms % 100) * 10 * NSEC_PER_MSEC;
-	}
+	} else
+		ts->tv_nsec = 0;
 	if (tz & EXFAT_TZ_VALID)
 		/* Adjust timezone to UTC0. */
 	*tz = EXFAT_TZ_VALID;
 }
+/*
+ * The timestamp for access_time has double seconds granularity.
+ * (There is no 10msIncrement field for access_time unlike create/modify_time)
+ * atime also has only a 2-second resolution.
+ */
+void exfat_truncate_atime(struct timespec64 *ts)
+{
+	ts->tv_sec = round_down(ts->tv_sec, 2);
+	ts->tv_nsec = 0;
+}
 unsigned short exfat_calc_chksum_2byte(void *data, int len,
 		unsigned short chksum, int type)
 {

fs/exfat/namei.c+7−0

 	inode_inc_iversion(inode);
 	inode->i_mtime = inode->i_atime = inode->i_ctime =
 		EXFAT_I(inode)->i_crtime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	/* timestamp is already written, so mark_inode_dirty() is unneeded. */
 	d_instantiate(dentry, inode);
 	inode_inc_iversion(dir);
 	dir->i_mtime = dir->i_atime = current_time(dir);
+	exfat_truncate_atime(&dir->i_atime);
 	if (IS_DIRSYNC(dir))
 		exfat_sync_inode(dir);
 	else
 	clear_nlink(inode);
 	inode->i_mtime = inode->i_atime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	exfat_unhash_inode(inode);
 	exfat_d_version_set(dentry, inode_query_iversion(dir));
 unlock:
 	inode_inc_iversion(inode);
 	inode->i_mtime = inode->i_atime = inode->i_ctime =
 		EXFAT_I(inode)->i_crtime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	/* timestamp is already written, so mark_inode_dirty() is unneeded. */
 	d_instantiate(dentry, inode);
 	inode_inc_iversion(dir);
 	dir->i_mtime = dir->i_atime = current_time(dir);
+	exfat_truncate_atime(&dir->i_atime);
 	if (IS_DIRSYNC(dir))
 		exfat_sync_inode(dir);
 	else
 	clear_nlink(inode);
 	inode->i_mtime = inode->i_atime = current_time(inode);
+	exfat_truncate_atime(&inode->i_atime);
 	exfat_unhash_inode(inode);
 	exfat_d_version_set(dentry, inode_query_iversion(dir));
 unlock:
 	inode_inc_iversion(new_dir);
 	new_dir->i_ctime = new_dir->i_mtime = new_dir->i_atime =
 		EXFAT_I(new_dir)->i_crtime = current_time(new_dir);
+	exfat_truncate_atime(&new_dir->i_atime);
 	if (IS_DIRSYNC(new_dir))
 		exfat_sync_inode(new_dir);
 	else

fs/exfat/super.c+22−31

@@ -49,6 +49,7 @@ static void exfat_put_super(struct super_block *sb) · 48 unmodified lines
49	sync_blockdev(sb->s_bdev);	49	sync_blockdev(sb->s_bdev);
50	exfat_set_vol_flags(sb, VOL_CLEAN);	50	exfat_set_vol_flags(sb, VOL_CLEAN);
51	exfat_free_bitmap(sbi);	51	exfat_free_bitmap(sbi);
		52	brelse(sbi->pbr_bh);
52	mutex_unlock(&sbi->s_lock);	53	mutex_unlock(&sbi->s_lock);
53		54
54	call_rcu(&sbi->rcu, exfat_delayed_free);	55	call_rcu(&sbi->rcu, exfat_delayed_free);
@@ -100,7 +101,7 @@ static int exfat_statfs(struct dentry dentry, struct kstatfs buf) · 45 unmodified lines
100	int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag)	101	int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag)
101	{	102	{
102	struct exfat_sb_info *sbi = EXFAT_SB(sb);	103	struct exfat_sb_info *sbi = EXFAT_SB(sb);
103	struct pbr64 *bpb;	104	struct pbr64 bpb = (struct pbr64 )sbi->pbr_bh->b_data;
104	bool sync = 0;	105	bool sync = 0;
105		106
106	/* flags are not changed */	107	/* flags are not changed */
@@ -115,15 +116,6 @@ int exfat_set_vol_flags(struct super_block *sb, unsigned short new_flag) · 8 unmodified lines
115	if (sb_rdonly(sb))	116	if (sb_rdonly(sb))
116	return 0;	117	return 0;
117		118
118	if (!sbi->pbr_bh) {
119	sbi->pbr_bh = sb_bread(sb, 0);
120	if (!sbi->pbr_bh) {
121	exfat_msg(sb, KERN_ERR, "failed to read boot sector");
122	return -ENOMEM;
123	}
124	}
125
126	bpb = (struct pbr64 *)sbi->pbr_bh->b_data;
127	bpb->bsx.vol_flags = cpu_to_le16(new_flag);	119	bpb->bsx.vol_flags = cpu_to_le16(new_flag);
128		120
129	if (new_flag == VOL_DIRTY && !buffer_dirty(sbi->pbr_bh))	121	if (new_flag == VOL_DIRTY && !buffer_dirty(sbi->pbr_bh))
@@ -159,7 +151,6 @@ static int exfat_show_options(struct seq_file m, struct dentry root) · 29 unmodified lines
159	seq_puts(m, ",iocharset=utf8");	151	seq_puts(m, ",iocharset=utf8");
160	else if (sbi->nls_io)	152	else if (sbi->nls_io)
161	seq_printf(m, ",iocharset=%s", sbi->nls_io->charset);	153	seq_printf(m, ",iocharset=%s", sbi->nls_io->charset);
162	seq_printf(m, ",bps=%ld", sb->s_blocksize);
163	if (opts->errors == EXFAT_ERRORS_CONT)	154	if (opts->errors == EXFAT_ERRORS_CONT)
164	seq_puts(m, ",errors=continue");	155	seq_puts(m, ",errors=continue");
165	else if (opts->errors == EXFAT_ERRORS_PANIC)	156	else if (opts->errors == EXFAT_ERRORS_PANIC)
@@ -351,14 +342,15 @@ static int exfat_read_root(struct inode *inode) · 185 unmodified lines
351	exfat_save_attr(inode, ATTR_SUBDIR);	342	exfat_save_attr(inode, ATTR_SUBDIR);
352	inode->i_mtime = inode->i_atime = inode->i_ctime = ei->i_crtime =	343	inode->i_mtime = inode->i_atime = inode->i_ctime = ei->i_crtime =
353	current_time(inode);	344	current_time(inode);
		345	exfat_truncate_atime(&inode->i_atime);
354	exfat_cache_init_inode(inode);	346	exfat_cache_init_inode(inode);
355	return 0;	347	return 0;
356	}	348	}
357		349
358	static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb,	350	static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb)
359	struct buffer_head **prev_bh)
360	{	351	{
361	struct pbr p_pbr = (struct pbr ) (*prev_bh)->b_data;	352	struct exfat_sb_info *sbi = EXFAT_SB(sb);
		353	struct pbr p_pbr = (struct pbr ) (sbi->pbr_bh)->b_data;
362	unsigned short logical_sect = 0;	354	unsigned short logical_sect = 0;
363		355
364	logical_sect = 1 << p_pbr->bsx.f64.sect_size_bits;	356	logical_sect = 1 << p_pbr->bsx.f64.sect_size_bits;
@@ -378,26 +370,23 @@ static struct pbr exfat_read_pbr_with_logical_sector(struct super_block sb, · 13 unmodified lines
378	}	370	}
379		371
380	if (logical_sect > sb->s_blocksize) {	372	if (logical_sect > sb->s_blocksize) {
381	struct buffer_head *bh = NULL;	373	brelse(sbi->pbr_bh);
382		374	sbi->pbr_bh = NULL;
383	__brelse(*prev_bh);
384	*prev_bh = NULL;
385		375
386	if (!sb_set_blocksize(sb, logical_sect)) {	376	if (!sb_set_blocksize(sb, logical_sect)) {
387	exfat_msg(sb, KERN_ERR,	377	exfat_msg(sb, KERN_ERR,
388	"unable to set blocksize %u", logical_sect);	378	"unable to set blocksize %u", logical_sect);
389	return NULL;	379	return NULL;
390	}	380	}
391	bh = sb_bread(sb, 0);	381	sbi->pbr_bh = sb_bread(sb, 0);
392	if (!bh) {	382	if (!sbi->pbr_bh) {
393	exfat_msg(sb, KERN_ERR,	383	exfat_msg(sb, KERN_ERR,
394	"unable to read boot sector (logical sector size = %lu)",	384	"unable to read boot sector (logical sector size = %lu)",
395	sb->s_blocksize);	385	sb->s_blocksize);
396	return NULL;	386	return NULL;
397	}	387	}
398		388
399	*prev_bh = bh;	389	p_pbr = (struct pbr *)sbi->pbr_bh->b_data;
400	p_pbr = (struct pbr *) bh->b_data;
401	}	390	}
402	return p_pbr;	391	return p_pbr;
403	}	392	}
@@ -408,21 +397,20 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines
408	int ret;	397	int ret;
409	struct pbr *p_pbr;	398	struct pbr *p_pbr;
410	struct pbr64 *p_bpb;	399	struct pbr64 *p_bpb;
411	struct buffer_head *bh;
412	struct exfat_sb_info *sbi = EXFAT_SB(sb);	400	struct exfat_sb_info *sbi = EXFAT_SB(sb);
413		401
414	/* set block size to read super block */	402	/* set block size to read super block */
415	sb_min_blocksize(sb, 512);	403	sb_min_blocksize(sb, 512);
416		404
417	/* read boot sector */	405	/* read boot sector */
418	bh = sb_bread(sb, 0);	406	sbi->pbr_bh = sb_bread(sb, 0);
419	if (!bh) {	407	if (!sbi->pbr_bh) {
420	exfat_msg(sb, KERN_ERR, "unable to read boot sector");	408	exfat_msg(sb, KERN_ERR, "unable to read boot sector");
421	return -EIO;	409	return -EIO;
422	}	410	}
423		411
424	/* PRB is read */	412	/* PRB is read */
425	p_pbr = (struct pbr *)bh->b_data;	413	p_pbr = (struct pbr *)sbi->pbr_bh->b_data;
426		414
427	/* check the validity of PBR */	415	/* check the validity of PBR */
428	if (le16_to_cpu((p_pbr->signature)) != PBR_SIGNATURE) {	416	if (le16_to_cpu((p_pbr->signature)) != PBR_SIGNATURE) {
@@ -433,7 +421,7 @@ static int __exfat_fill_super(struct super_block *sb) · 4 unmodified lines
433		421
434		422
435	/* check logical sector size */	423	/* check logical sector size */
436	p_pbr = exfat_read_pbr_with_logical_sector(sb, &bh);	424	p_pbr = exfat_read_pbr_with_logical_sector(sb);
437	if (!p_pbr) {	425	if (!p_pbr) {
438	ret = -EIO;	426	ret = -EIO;
439	goto free_bh;	427	goto free_bh;
@@ -514,7 +502,7 @@ free_alloc_bitmap: · 74 unmodified lines
514	free_upcase_table:	502	free_upcase_table:
515	exfat_free_upcase_table(sbi);	503	exfat_free_upcase_table(sbi);
516	free_bh:	504	free_bh:
517	brelse(bh);	505	brelse(sbi->pbr_bh);
518	return ret;	506	return ret;
519	}	507	}
520		508
@@ -531,17 +519,18 @@ static int exfat_fill_super(struct super_block sb, struct fs_context fc) · 10 unmodified lines
531	if (opts->discard) {	519	if (opts->discard) {
532	struct request_queue *q = bdev_get_queue(sb->s_bdev);	520	struct request_queue *q = bdev_get_queue(sb->s_bdev);
533		521
534	if (!blk_queue_discard(q))	522	if (!blk_queue_discard(q)) {
535	exfat_msg(sb, KERN_WARNING,	523	exfat_msg(sb, KERN_WARNING,
536	"mounting with \"discard\" option, but the device does not support discard");	524	"mounting with \"discard\" option, but the device does not support discard");
537	opts->discard = 0;	525	opts->discard = 0;
		526	}
538	}	527	}
539		528
540	sb->s_flags \|= SB_NODIRATIME;	529	sb->s_flags \|= SB_NODIRATIME;
541	sb->s_magic = EXFAT_SUPER_MAGIC;	530	sb->s_magic = EXFAT_SUPER_MAGIC;
542	sb->s_op = &exfat_sops;	531	sb->s_op = &exfat_sops;
543		532
544	sb->s_time_gran = 1;	533	sb->s_time_gran = 10 * NSEC_PER_MSEC;
545	sb->s_time_min = EXFAT_MIN_TIMESTAMP_SECS;	534	sb->s_time_min = EXFAT_MIN_TIMESTAMP_SECS;
546	sb->s_time_max = EXFAT_MAX_TIMESTAMP_SECS;	535	sb->s_time_max = EXFAT_MAX_TIMESTAMP_SECS;
547		536
@@ -605,6 +594,7 @@ put_inode: · 57 unmodified lines
605	free_table:	594	free_table:
606	exfat_free_upcase_table(sbi);	595	exfat_free_upcase_table(sbi);
607	exfat_free_bitmap(sbi);	596	exfat_free_bitmap(sbi);
		597	brelse(sbi->pbr_bh);
608		598
609	check_nls_io:	599	check_nls_io:
610	unload_nls(sbi->nls_io);	600	unload_nls(sbi->nls_io);
@@ -717,6 +707,7 @@ static void __exit exit_exfat_fs(void) · 106 unmodified lines
717	module_init(init_exfat_fs);	707	module_init(init_exfat_fs);
718	module_exit(exit_exfat_fs);	708	module_exit(exit_exfat_fs);
719		709
		710	MODULE_ALIAS_FS("exfat");
720	MODULE_LICENSE("GPL");	711	MODULE_LICENSE("GPL");
721	MODULE_DESCRIPTION("exFAT filesystem support");	712	MODULE_DESCRIPTION("exFAT filesystem support");
722	MODULE_AUTHOR("Samsung Electronics Co., Ltd.");	713	MODULE_AUTHOR("Samsung Electronics Co., Ltd.");

fs/ext4/balloc.c+2−2

@@ -410,7 +410,7 @@ verified: · 409 unmodified lines
410	* Read the bitmap for a given block_group,and validate the	410	* Read the bitmap for a given block_group,and validate the
411	* bits for block/inode/inode tables are set in the bitmaps	411	* bits for block/inode/inode tables are set in the bitmaps
412	*	412	*
413	* Return buffer_head on success or NULL in case of failure.	413	* Return buffer_head on success or an ERR_PTR in case of failure.
414	*/	414	*/
415	struct buffer_head *	415	struct buffer_head *
416	ext4_read_block_bitmap_nowait(struct super_block *sb, ext4_group_t block_group)	416	ext4_read_block_bitmap_nowait(struct super_block *sb, ext4_group_t block_group)
@@ -502,7 +502,7 @@ out: · 85 unmodified lines
502	return ERR_PTR(err);	502	return ERR_PTR(err);
503	}	503	}
504		504
505	/* Returns 0 on success, 1 on error */	505	/* Returns 0 on success, -errno on error */
506	int ext4_wait_block_bitmap(struct super_block *sb, ext4_group_t block_group,	506	int ext4_wait_block_bitmap(struct super_block *sb, ext4_group_t block_group,
507	struct buffer_head *bh)	507	struct buffer_head *bh)
508	{	508	{

fs/ext4/ext4_jbd2.c+0−3

 		if (inode && inode_needs_sync(inode)) {
 			sync_dirty_buffer(bh);
 			if (buffer_req(bh) && !buffer_uptodate(bh)) {
-				struct ext4_super_block *es;
-				es = EXT4_SB(inode->i_sb)->s_es;
 				ext4_error_inode_err(inode, where, line,
 						     bh->b_blocknr, EIO,
 					"IO error syncing itable block");

fs/ext4/extents.c+4−4

@@ -3374,8 +3374,8 @@ static int ext4_ext_convert_to_initialized(handle_t *handle, · 3373 unmodified lines
3374	(unsigned long long)map->m_lblk, map_len);	3374	(unsigned long long)map->m_lblk, map_len);
3375		3375
3376	sbi = EXT4_SB(inode->i_sb);	3376	sbi = EXT4_SB(inode->i_sb);
3377	eof_block = (inode->i_size + inode->i_sb->s_blocksize - 1) >>	3377	eof_block = (EXT4_I(inode)->i_disksize + inode->i_sb->s_blocksize - 1)
3378	inode->i_sb->s_blocksize_bits;	3378	>> inode->i_sb->s_blocksize_bits;
3379	if (eof_block < map->m_lblk + map_len)	3379	if (eof_block < map->m_lblk + map_len)
3380	eof_block = map->m_lblk + map_len;	3380	eof_block = map->m_lblk + map_len;
3381		3381
@@ -3627,8 +3627,8 @@ static int ext4_split_convert_extents(handle_t *handle, · 245 unmodified lines
3627	__func__, inode->i_ino,	3627	__func__, inode->i_ino,
3628	(unsigned long long)map->m_lblk, map->m_len);	3628	(unsigned long long)map->m_lblk, map->m_len);
3629		3629
3630	eof_block = (inode->i_size + inode->i_sb->s_blocksize - 1) >>	3630	eof_block = (EXT4_I(inode)->i_disksize + inode->i_sb->s_blocksize - 1)
3631	inode->i_sb->s_blocksize_bits;	3631	>> inode->i_sb->s_blocksize_bits;
3632	if (eof_block < map->m_lblk + map->m_len)	3632	if (eof_block < map->m_lblk + map->m_len)
3633	eof_block = map->m_lblk + map->m_len;	3633	eof_block = map->m_lblk + map->m_len;
3634	/*	3634	/*

fs/ext4/ialloc.c+2−2

@@ -113,7 +113,7 @@ verified: · 112 unmodified lines
113	* Read the inode allocation bitmap for a given block_group, reading	113	* Read the inode allocation bitmap for a given block_group, reading
114	* into the specified slot in the superblock's bitmap cache.	114	* into the specified slot in the superblock's bitmap cache.
115	*	115	*
116	* Return buffer_head of bitmap on success or NULL.	116	* Return buffer_head of bitmap on success, or an ERR_PTR on error.
117	*/	117	*/
118	static struct buffer_head *	118	static struct buffer_head *
119	ext4_read_inode_bitmap(struct super_block *sb, ext4_group_t block_group)	119	ext4_read_inode_bitmap(struct super_block *sb, ext4_group_t block_group)
@@ -662,7 +662,7 @@ static int find_group_other(struct super_block sb, struct inode parent, · 542 unmodified lines
662	* block has been written back to disk. (Yes, these values are	662	* block has been written back to disk. (Yes, these values are
663	* somewhat arbitrary...)	663	* somewhat arbitrary...)
664	*/	664	*/
665	#define RECENTCY_MIN 5	665	#define RECENTCY_MIN 60
666	#define RECENTCY_DIRTY 300	666	#define RECENTCY_DIRTY 300
667		667
668	static int recently_deleted(struct super_block *sb, ext4_group_t group, int ino)	668	static int recently_deleted(struct super_block *sb, ext4_group_t group, int ino)

fs/ext4/inode.c+2−2

@@ -1973,7 +1973,7 @@ static int ext4_writepage(struct page *page, · 1972 unmodified lines
1973	bool keep_towrite = false;	1973	bool keep_towrite = false;
1974		1974
1975	if (unlikely(ext4_forced_shutdown(EXT4_SB(inode->i_sb)))) {	1975	if (unlikely(ext4_forced_shutdown(EXT4_SB(inode->i_sb)))) {
1976	ext4_invalidatepage(page, 0, PAGE_SIZE);	1976	inode->i_mapping->a_ops->invalidatepage(page, 0, PAGE_SIZE);
1977	unlock_page(page);	1977	unlock_page(page);
1978	return -EIO;	1978	return -EIO;
1979	}	1979	}
@@ -4364,7 +4364,7 @@ make_io: · 2384 unmodified lines
4364	if (end > table)	4364	if (end > table)
4365	end = table;	4365	end = table;
4366	while (b <= end)	4366	while (b <= end)
4367	sb_breadahead(sb, b++);	4367	sb_breadahead_unmovable(sb, b++);
4368	}	4368	}
4369		4369
4370	/*	4370	/*

fs/ext4/mballoc.c+4−2

 	int free;
 	free = e4b->bd_info->bb_free;
-	BUG_ON(free <= 0);
+	if (WARN_ON(free <= 0))
+		return;
 	i = e4b->bd_info->bb_first_free;
 		}
 		mb_find_extent(e4b, i, ac->ac_g_ex.fe_len, &ex);
-		BUG_ON(ex.fe_len <= 0);
+		if (WARN_ON(ex.fe_len <= 0))
+			break;
 		if (free < ex.fe_len) {
 			ext4_grp_locked_error(sb, e4b->bd_group, 0, 0,
 					"%d free clusters as per "

fs/ext4/super.c+1−3

 {
 	va_list args;
 	struct va_format vaf;
-	struct ext4_super_block *es;
 	struct inode *inode = file_inode(file);
 	char pathname[80], *path;
 		return;
 	trace_ext4_error(inode->i_sb, function, line);
-	es = EXT4_SB(inode->i_sb)->s_es;
 	if (ext4_error_ratelimit(inode->i_sb)) {
 		path = file_path(file, pathname, sizeof(pathname));
 		if (IS_ERR(path))
 	/* Pre-read the descriptors into the buffer cache */
 	for (i = 0; i < db_count; i++) {
 		block = descriptor_loc(sb, logical_sb_block, i);
-		sb_breadahead(sb, block);
+		sb_breadahead_unmovable(sb, block);
 	}
 	for (i = 0; i < db_count; i++) {

fs/io_uring.c+192−165

@@ -357,7 +357,6 @@ struct io_timeout_data { · 356 unmodified lines
357	struct hrtimer timer;	357	struct hrtimer timer;
358	struct timespec64 ts;	358	struct timespec64 ts;
359	enum hrtimer_mode mode;	359	enum hrtimer_mode mode;
360	u32 seq_offset;
361	};	360	};
362		361
363	struct io_accept {	362	struct io_accept {
@@ -385,7 +384,7 @@ struct io_timeout { · 21 unmodified lines
385	struct file *file;	384	struct file *file;
386	u64 addr;	385	u64 addr;
387	int flags;	386	int flags;
388	unsigned count;	387	u32 count;
389	};	388	};
390		389
391	struct io_rw {	390	struct io_rw {
@@ -508,6 +507,7 @@ enum { · 116 unmodified lines
508	REQ_F_FORCE_ASYNC_BIT = IOSQE_ASYNC_BIT,	507	REQ_F_FORCE_ASYNC_BIT = IOSQE_ASYNC_BIT,
509	REQ_F_BUFFER_SELECT_BIT = IOSQE_BUFFER_SELECT_BIT,	508	REQ_F_BUFFER_SELECT_BIT = IOSQE_BUFFER_SELECT_BIT,
510		509
		510	REQ_F_LINK_HEAD_BIT,
511	REQ_F_LINK_NEXT_BIT,	511	REQ_F_LINK_NEXT_BIT,
512	REQ_F_FAIL_LINK_BIT,	512	REQ_F_FAIL_LINK_BIT,
513	REQ_F_INFLIGHT_BIT,	513	REQ_F_INFLIGHT_BIT,
@@ -524,6 +524,7 @@ enum { · 10 unmodified lines
524	REQ_F_OVERFLOW_BIT,	524	REQ_F_OVERFLOW_BIT,
525	REQ_F_POLLED_BIT,	525	REQ_F_POLLED_BIT,
526	REQ_F_BUFFER_SELECTED_BIT,	526	REQ_F_BUFFER_SELECTED_BIT,
		527	REQ_F_NO_FILE_TABLE_BIT,
527		528
528	/* not a real bit, just to check we're not overflowing the space */	529	/* not a real bit, just to check we're not overflowing the space */
529	__REQ_F_LAST_BIT,	530	__REQ_F_LAST_BIT,
@@ -543,6 +544,8 @@ enum { · 13 unmodified lines
543	/* IOSQE_BUFFER_SELECT */	544	/* IOSQE_BUFFER_SELECT */
544	REQ_F_BUFFER_SELECT = BIT(REQ_F_BUFFER_SELECT_BIT),	545	REQ_F_BUFFER_SELECT = BIT(REQ_F_BUFFER_SELECT_BIT),
545		546
		547	/* head of a link */
		548	REQ_F_LINK_HEAD = BIT(REQ_F_LINK_HEAD_BIT),
546	/* already grabbed next link */	549	/* already grabbed next link */
547	REQ_F_LINK_NEXT = BIT(REQ_F_LINK_NEXT_BIT),	550	REQ_F_LINK_NEXT = BIT(REQ_F_LINK_NEXT_BIT),
548	/* fail rest of links */	551	/* fail rest of links */
@@ -575,6 +578,8 @@ enum { · 26 unmodified lines
575	REQ_F_POLLED = BIT(REQ_F_POLLED_BIT),	578	REQ_F_POLLED = BIT(REQ_F_POLLED_BIT),
576	/* buffer already selected */	579	/* buffer already selected */
577	REQ_F_BUFFER_SELECTED = BIT(REQ_F_BUFFER_SELECTED_BIT),	580	REQ_F_BUFFER_SELECTED = BIT(REQ_F_BUFFER_SELECTED_BIT),
		581	/* doesn't need file table for this request */
		582	REQ_F_NO_FILE_TABLE = BIT(REQ_F_NO_FILE_TABLE_BIT),
578	};	583	};
579		584
580	struct async_poll {	585	struct async_poll {
@@ -797,6 +802,7 @@ static const struct io_op_def io_op_defs[] = { · 216 unmodified lines
797	.needs_file = 1,	802	.needs_file = 1,
798	.fd_non_neg = 1,	803	.fd_non_neg = 1,
799	.needs_fs = 1,	804	.needs_fs = 1,
		805	.file_table = 1,
800	},	806	},
801	[IORING_OP_READ] = {	807	[IORING_OP_READ] = {
802	.needs_mm = 1,	808	.needs_mm = 1,
@@ -955,8 +961,8 @@ static inline bool __req_need_defer(struct io_kiocb *req) · 152 unmodified lines
955	{	961	{
956	struct io_ring_ctx *ctx = req->ctx;	962	struct io_ring_ctx *ctx = req->ctx;
957		963
958	return req->sequence != ctx->cached_cq_tail + ctx->cached_sq_dropped	964	return req->sequence != ctx->cached_cq_tail
959	+ atomic_read(&ctx->cached_cq_overflow);	965	+ atomic_read(&ctx->cached_cq_overflow);
960	}	966	}
961		967
962	static inline bool req_need_defer(struct io_kiocb *req)	968	static inline bool req_need_defer(struct io_kiocb *req)
@@ -1289,7 +1295,7 @@ static struct io_kiocb io_get_fallback_req(struct io_ring_ctx ctx) · 326 unmodified lines
1289	struct io_kiocb *req;	1295	struct io_kiocb *req;
1290		1296
1291	req = ctx->fallback_req;	1297	req = ctx->fallback_req;
1292	if (!test_and_set_bit_lock(0, (unsigned long *) ctx->fallback_req))	1298	if (!test_and_set_bit_lock(0, (unsigned long *) &ctx->fallback_req))
1293	return req;	1299	return req;
1294		1300
1295	return NULL;	1301	return NULL;
@@ -1376,7 +1382,7 @@ static void __io_free_req(struct io_kiocb *req) · 80 unmodified lines
1376	if (likely(!io_is_fallback_req(req)))	1382	if (likely(!io_is_fallback_req(req)))
1377	kmem_cache_free(req_cachep, req);	1383	kmem_cache_free(req_cachep, req);
1378	else	1384	else
1379	clear_bit_unlock(0, (unsigned long *) req->ctx->fallback_req);	1385	clear_bit_unlock(0, (unsigned long *) &req->ctx->fallback_req);
1380	}	1386	}
1381		1387
1382	struct req_batch {	1388	struct req_batch {
@@ -1437,7 +1443,7 @@ static bool io_link_cancel_timeout(struct io_kiocb *req) · 54 unmodified lines
1437	if (ret != -1) {	1443	if (ret != -1) {
1438	io_cqring_fill_event(req, -ECANCELED);	1444	io_cqring_fill_event(req, -ECANCELED);
1439	io_commit_cqring(ctx);	1445	io_commit_cqring(ctx);
1440	req->flags &= ~REQ_F_LINK;	1446	req->flags &= ~REQ_F_LINK_HEAD;
1441	io_put_req(req);	1447	io_put_req(req);
1442	return true;	1448	return true;
1443	}	1449	}
@@ -1473,7 +1479,7 @@ static void io_req_link_next(struct io_kiocb req, struct io_kiocb *nxtptr) · 29 unmodified lines
1473		1479
1474	list_del_init(&req->link_list);	1480	list_del_init(&req->link_list);
1475	if (!list_empty(&nxt->link_list))	1481	if (!list_empty(&nxt->link_list))
1476	nxt->flags \|= REQ_F_LINK;	1482	nxt->flags \|= REQ_F_LINK_HEAD;
1477	*nxtptr = nxt;	1483	*nxtptr = nxt;
1478	break;	1484	break;
1479	}	1485	}
@@ -1484,7 +1490,7 @@ static void io_req_link_next(struct io_kiocb req, struct io_kiocb *nxtptr) · 4 unmodified lines
1484	}	1490	}
1485		1491
1486	/*	1492	/*
1487	* Called if REQ_F_LINK is set, and we fail the head request	1493	* Called if REQ_F_LINK_HEAD is set, and we fail the head request
1488	*/	1494	*/
1489	static void io_fail_links(struct io_kiocb *req)	1495	static void io_fail_links(struct io_kiocb *req)
1490	{	1496	{
@@ -1517,7 +1523,7 @@ static void io_fail_links(struct io_kiocb *req) · 26 unmodified lines
1517		1523
1518	static void io_req_find_next(struct io_kiocb req, struct io_kiocb *nxt)	1524	static void io_req_find_next(struct io_kiocb req, struct io_kiocb *nxt)
1519	{	1525	{
1520	if (likely(!(req->flags & REQ_F_LINK)))	1526	if (likely(!(req->flags & REQ_F_LINK_HEAD)))
1521	return;	1527	return;
1522		1528
1523	/*	1529	/*
@@ -1669,7 +1675,7 @@ static inline unsigned int io_sqring_entries(struct io_ring_ctx *ctx) · 145 unmodified lines
1669		1675
1670	static inline bool io_req_multi_free(struct req_batch rb, struct io_kiocb req)	1676	static inline bool io_req_multi_free(struct req_batch rb, struct io_kiocb req)
1671	{	1677	{
1672	if ((req->flags & REQ_F_LINK) \|\| io_is_fallback_req(req))	1678	if ((req->flags & REQ_F_LINK_HEAD) \|\| io_is_fallback_req(req))
1673	return false;	1679	return false;
1674		1680
1675	if (!(req->flags & REQ_F_FIXED_FILE) \|\| req->io)	1681	if (!(req->flags & REQ_F_FIXED_FILE) \|\| req->io)
@@ -2032,7 +2038,7 @@ static struct file __io_file_get(struct io_submit_state state, int fd) · 356 unmodified lines
2032	* any file. For now, just ensure that anything potentially problematic is done	2038	* any file. For now, just ensure that anything potentially problematic is done
2033	* inline.	2039	* inline.
2034	*/	2040	*/
2035	static bool io_file_supports_async(struct file *file)	2041	static bool io_file_supports_async(struct file *file, int rw)
2036	{	2042	{
2037	umode_t mode = file_inode(file)->i_mode;	2043	umode_t mode = file_inode(file)->i_mode;
2038		2044
@@ -2041,7 +2047,13 @@ static bool io_file_supports_async(struct file *file) · 2 unmodified lines
2041	if (S_ISREG(mode) && file->f_op != &io_uring_fops)	2047	if (S_ISREG(mode) && file->f_op != &io_uring_fops)
2042	return true;	2048	return true;
2043		2049
2044	return false;	2050	if (!(file->f_mode & FMODE_NOWAIT))
		2051	return false;
		2052
		2053	if (rw == READ)
		2054	return file->f_op->read_iter != NULL;
		2055
		2056	return file->f_op->write_iter != NULL;
2045	}	2057	}
2046		2058
2047	static int io_prep_rw(struct io_kiocb req, const struct io_uring_sqe sqe,	2059	static int io_prep_rw(struct io_kiocb req, const struct io_uring_sqe sqe,
@@ -2562,14 +2574,14 @@ static int io_read(struct io_kiocb *req, bool force_nonblock) · 514 unmodified lines
2562		2574
2563	req->result = 0;	2575	req->result = 0;
2564	io_size = ret;	2576	io_size = ret;
2565	if (req->flags & REQ_F_LINK)	2577	if (req->flags & REQ_F_LINK_HEAD)
2566	req->result = io_size;	2578	req->result = io_size;
2567		2579
2568	/*	2580	/*
2569	* If the file doesn't support async, mark it as REQ_F_MUST_PUNT so	2581	* If the file doesn't support async, mark it as REQ_F_MUST_PUNT so
2570	* we know to async punt it even if it was opened O_NONBLOCK	2582	* we know to async punt it even if it was opened O_NONBLOCK
2571	*/	2583	*/
2572	if (force_nonblock && !io_file_supports_async(req->file))	2584	if (force_nonblock && !io_file_supports_async(req->file, READ))
2573	goto copy_iov;	2585	goto copy_iov;
2574		2586
2575	iov_count = iov_iter_count(&iter);	2587	iov_count = iov_iter_count(&iter);
@@ -2592,7 +2604,8 @@ copy_iov: · 16 unmodified lines
2592	if (ret)	2604	if (ret)
2593	goto out_free;	2605	goto out_free;
2594	/* any defer here is final, must blocking retry */	2606	/* any defer here is final, must blocking retry */
2595	if (!(req->flags & REQ_F_NOWAIT))	2607	if (!(req->flags & REQ_F_NOWAIT) &&
		2608	!file_can_poll(req->file))
2596	req->flags \|= REQ_F_MUST_PUNT;	2609	req->flags \|= REQ_F_MUST_PUNT;
2597	return -EAGAIN;	2610	return -EAGAIN;
2598	}	2611	}
@@ -2653,14 +2666,14 @@ static int io_write(struct io_kiocb *req, bool force_nonblock) · 54 unmodified lines
2653		2666
2654	req->result = 0;	2667	req->result = 0;
2655	io_size = ret;	2668	io_size = ret;
2656	if (req->flags & REQ_F_LINK)	2669	if (req->flags & REQ_F_LINK_HEAD)
2657	req->result = io_size;	2670	req->result = io_size;
2658		2671
2659	/*	2672	/*
2660	* If the file doesn't support async, mark it as REQ_F_MUST_PUNT so	2673	* If the file doesn't support async, mark it as REQ_F_MUST_PUNT so
2661	* we know to async punt it even if it was opened O_NONBLOCK	2674	* we know to async punt it even if it was opened O_NONBLOCK
2662	*/	2675	*/
2663	if (force_nonblock && !io_file_supports_async(req->file))	2676	if (force_nonblock && !io_file_supports_async(req->file, WRITE))
2664	goto copy_iov;	2677	goto copy_iov;
2665		2678
2666	/* file path doesn't support NOWAIT for non-direct_IO */	2679	/* file path doesn't support NOWAIT for non-direct_IO */
@@ -2714,7 +2727,8 @@ copy_iov: · 47 unmodified lines
2714	if (ret)	2727	if (ret)
2715	goto out_free;	2728	goto out_free;
2716	/* any defer here is final, must blocking retry */	2729	/* any defer here is final, must blocking retry */
2717	req->flags \|= REQ_F_MUST_PUNT;	2730	if (!file_can_poll(req->file))
		2731	req->flags \|= REQ_F_MUST_PUNT;
2718	return -EAGAIN;	2732	return -EAGAIN;
2719	}	2733	}
2720	}	2734	}
@@ -2754,15 +2768,6 @@ static int io_splice_prep(struct io_kiocb req, const struct io_uring_sqe sqe) · 33 unmodified lines
2754	return 0;	2768	return 0;
2755	}	2769	}
2756		2770
2757	static bool io_splice_punt(struct file *file)
2758	{
2759	if (get_pipe_info(file))
2760	return false;
2761	if (!io_file_supports_async(file))
2762	return true;
2763	return !(file->f_mode & O_NONBLOCK);
2764	}
2765
2766	static int io_splice(struct io_kiocb *req, bool force_nonblock)	2771	static int io_splice(struct io_kiocb *req, bool force_nonblock)
2767	{	2772	{
2768	struct io_splice *sp = &req->splice;	2773	struct io_splice *sp = &req->splice;
@@ -2772,11 +2777,8 @@ static int io_splice(struct io_kiocb *req, bool force_nonblock) · 3 unmodified lines
2772	loff_t poff_in, poff_out;	2777	loff_t poff_in, poff_out;
2773	long ret;	2778	long ret;
2774		2779
2775	if (force_nonblock) {	2780	if (force_nonblock)
2776	if (io_splice_punt(in) \|\| io_splice_punt(out))	2781	return -EAGAIN;
2777	return -EAGAIN;
2778	flags \|= SPLICE_F_NONBLOCK;
2779	}
2780		2782
2781	poff_in = (sp->off_in == -1) ? NULL : &sp->off_in;	2783	poff_in = (sp->off_in == -1) ? NULL : &sp->off_in;
2782	poff_out = (sp->off_out == -1) ? NULL : &sp->off_out;	2784	poff_out = (sp->off_out == -1) ? NULL : &sp->off_out;
@@ -3353,8 +3355,12 @@ static int io_statx(struct io_kiocb *req, bool force_nonblock) · 570 unmodified lines
3353	struct kstat stat;	3355	struct kstat stat;
3354	int ret;	3356	int ret;
3355		3357
3356	if (force_nonblock)	3358	if (force_nonblock) {
		3359	/* only need file table for an actual valid fd */
		3360	if (ctx->dfd == -1 \|\| ctx->dfd == AT_FDCWD)
		3361	req->flags \|= REQ_F_NO_FILE_TABLE;
3357	return -EAGAIN;	3362	return -EAGAIN;
		3363	}
3358		3364
3359	if (vfs_stat_set_lookup_flags(&lookup_flags, ctx->how.flags))	3365	if (vfs_stat_set_lookup_flags(&lookup_flags, ctx->how.flags))
3360	return -EINVAL;	3366	return -EINVAL;
@@ -3500,7 +3506,7 @@ static void io_sync_file_range_finish(struct io_wq_work **workptr) · 139 unmodified lines
3500	if (io_req_cancelled(req))	3506	if (io_req_cancelled(req))
3501	return;	3507	return;
3502	__io_sync_file_range(req);	3508	__io_sync_file_range(req);
3503	io_put_req(req); /* put submission ref */	3509	io_steal_work(req, workptr);
3504	}	3510	}
3505		3511
3506	static int io_sync_file_range(struct io_kiocb *req, bool force_nonblock)	3512	static int io_sync_file_range(struct io_kiocb *req, bool force_nonblock)
@@ -4153,25 +4159,62 @@ static int __io_async_wake(struct io_kiocb req, struct io_poll_iocb poll, · 646 unmodified lines
4153	return 1;	4159	return 1;
4154	}	4160	}
4155		4161
		4162	static bool io_poll_rewait(struct io_kiocb req, struct io_poll_iocb poll)
		4163	__acquires(&req->ctx->completion_lock)
		4164	{
		4165	struct io_ring_ctx *ctx = req->ctx;
		4166
		4167	if (!req->result && !READ_ONCE(poll->canceled)) {
		4168	struct poll_table_struct pt = { ._key = poll->events };
		4169
		4170	req->result = vfs_poll(req->file, &pt) & poll->events;
		4171	}
		4172
		4173	spin_lock_irq(&ctx->completion_lock);
		4174	if (!req->result && !READ_ONCE(poll->canceled)) {
		4175	add_wait_queue(poll->head, &poll->wait);
		4176	return true;
		4177	}
		4178
		4179	return false;
		4180	}
		4181
4156	static void io_async_task_func(struct callback_head *cb)	4182	static void io_async_task_func(struct callback_head *cb)
4157	{	4183	{
4158	struct io_kiocb *req = container_of(cb, struct io_kiocb, task_work);	4184	struct io_kiocb *req = container_of(cb, struct io_kiocb, task_work);
4159	struct async_poll *apoll = req->apoll;	4185	struct async_poll *apoll = req->apoll;
4160	struct io_ring_ctx *ctx = req->ctx;	4186	struct io_ring_ctx *ctx = req->ctx;
		4187	bool canceled;
4161		4188
4162	trace_io_uring_task_run(req->ctx, req->opcode, req->user_data);	4189	trace_io_uring_task_run(req->ctx, req->opcode, req->user_data);
4163		4190
4164	WARN_ON_ONCE(!list_empty(&req->apoll->poll.wait.entry));	4191	if (io_poll_rewait(req, &apoll->poll)) {
		4192	spin_unlock_irq(&ctx->completion_lock);
		4193	return;
		4194	}
4165		4195
4166	if (hash_hashed(&req->hash_node)) {	4196	if (hash_hashed(&req->hash_node))
4167	spin_lock_irq(&ctx->completion_lock);
4168	hash_del(&req->hash_node);	4197	hash_del(&req->hash_node);
4169	spin_unlock_irq(&ctx->completion_lock);	4198
		4199	canceled = READ_ONCE(apoll->poll.canceled);
		4200	if (canceled) {
		4201	io_cqring_fill_event(req, -ECANCELED);
		4202	io_commit_cqring(ctx);
4170	}	4203	}
4171		4204
		4205	spin_unlock_irq(&ctx->completion_lock);
		4206
4172	/* restore ->work in case we need to retry again */	4207	/* restore ->work in case we need to retry again */
4173	memcpy(&req->work, &apoll->work, sizeof(req->work));	4208	memcpy(&req->work, &apoll->work, sizeof(req->work));
4174		4209
		4210	if (canceled) {
		4211	kfree(apoll);
		4212	io_cqring_ev_posted(ctx);
		4213	req_set_fail_links(req);
		4214	io_double_put_req(req);
		4215	return;
		4216	}
		4217
4175	__set_current_state(TASK_RUNNING);	4218	__set_current_state(TASK_RUNNING);
4176	mutex_lock(&ctx->uring_lock);	4219	mutex_lock(&ctx->uring_lock);
4177	__io_queue_sqe(req, NULL);	4220	__io_queue_sqe(req, NULL);
@@ -4315,11 +4358,13 @@ static bool __io_poll_remove_one(struct io_kiocb *req, · 137 unmodified lines
4315		4358
4316	static bool io_poll_remove_one(struct io_kiocb *req)	4359	static bool io_poll_remove_one(struct io_kiocb *req)
4317	{	4360	{
		4361	struct async_poll *apoll = NULL;
4318	bool do_complete;	4362	bool do_complete;
4319		4363
4320	if (req->opcode == IORING_OP_POLL_ADD) {	4364	if (req->opcode == IORING_OP_POLL_ADD) {
4321	do_complete = __io_poll_remove_one(req, &req->poll);	4365	do_complete = __io_poll_remove_one(req, &req->poll);
4322	} else {	4366	} else {
		4367	apoll = req->apoll;
4323	/* non-poll requests have submit ref still */	4368	/* non-poll requests have submit ref still */
4324	do_complete = __io_poll_remove_one(req, &req->apoll->poll);	4369	do_complete = __io_poll_remove_one(req, &req->apoll->poll);
4325	if (do_complete)	4370	if (do_complete)
@@ -4328,6 +4373,14 @@ static bool io_poll_remove_one(struct io_kiocb *req) · 2 unmodified lines
4328		4373
4329	hash_del(&req->hash_node);	4374	hash_del(&req->hash_node);
4330		4375
		4376	if (do_complete && apoll) {
		4377	/*
		4378	* restore ->work because we need to call io_req_work_drop_env.
		4379	*/
		4380	memcpy(&req->work, &apoll->work, sizeof(req->work));
		4381	kfree(apoll);
		4382	}
		4383
4331	if (do_complete) {	4384	if (do_complete) {
4332	io_cqring_fill_event(req, -ECANCELED);	4385	io_cqring_fill_event(req, -ECANCELED);
4333	io_commit_cqring(req->ctx);	4386	io_commit_cqring(req->ctx);
@@ -4342,7 +4395,7 @@ static void io_poll_remove_all(struct io_ring_ctx *ctx) · 8 unmodified lines
4342	{	4395	{
4343	struct hlist_node *tmp;	4396	struct hlist_node *tmp;
4344	struct io_kiocb *req;	4397	struct io_kiocb *req;
4345	int i;	4398	int posted = 0, i;
4346		4399
4347	spin_lock_irq(&ctx->completion_lock);	4400	spin_lock_irq(&ctx->completion_lock);
4348	for (i = 0; i < (1U << ctx->cancel_hash_bits); i++) {	4401	for (i = 0; i < (1U << ctx->cancel_hash_bits); i++) {
@@ -4350,11 +4403,12 @@ static void io_poll_remove_all(struct io_ring_ctx *ctx) · 1 unmodified line
4350		4403
4351	list = &ctx->cancel_hash[i];	4404	list = &ctx->cancel_hash[i];
4352	hlist_for_each_entry_safe(req, tmp, list, hash_node)	4405	hlist_for_each_entry_safe(req, tmp, list, hash_node)
4353	io_poll_remove_one(req);	4406	posted += io_poll_remove_one(req);
4354	}	4407	}
4355	spin_unlock_irq(&ctx->completion_lock);	4408	spin_unlock_irq(&ctx->completion_lock);
4356		4409
4357	io_cqring_ev_posted(ctx);	4410	if (posted)
		4411	io_cqring_ev_posted(ctx);
4358	}	4412	}
4359		4413
4360	static int io_poll_cancel(struct io_ring_ctx *ctx, __u64 sqe_addr)	4414	static int io_poll_cancel(struct io_ring_ctx *ctx, __u64 sqe_addr)
@@ -4423,18 +4477,11 @@ static void io_poll_task_handler(struct io_kiocb req, struct io_kiocb *nxt) · 62 unmodified lines
4423	struct io_ring_ctx *ctx = req->ctx;	4477	struct io_ring_ctx *ctx = req->ctx;
4424	struct io_poll_iocb *poll = &req->poll;	4478	struct io_poll_iocb *poll = &req->poll;
4425		4479
4426	if (!req->result && !READ_ONCE(poll->canceled)) {	4480	if (io_poll_rewait(req, poll)) {
4427	struct poll_table_struct pt = { ._key = poll->events };
4428
4429	req->result = vfs_poll(req->file, &pt) & poll->events;
4430	}
4431
4432	spin_lock_irq(&ctx->completion_lock);
4433	if (!req->result && !READ_ONCE(poll->canceled)) {
4434	add_wait_queue(poll->head, &poll->wait);
4435	spin_unlock_irq(&ctx->completion_lock);	4481	spin_unlock_irq(&ctx->completion_lock);
4436	return;	4482	return;
4437	}	4483	}
		4484
4438	hash_del(&req->hash_node);	4485	hash_del(&req->hash_node);
4439	io_poll_complete(req, req->result, 0);	4486	io_poll_complete(req, req->result, 0);
4440	req->flags \|= REQ_F_COMP_LOCKED;	4487	req->flags \|= REQ_F_COMP_LOCKED;
@@ -4665,11 +4712,12 @@ static int io_timeout_prep(struct io_kiocb req, const struct io_uring_sqe sqe, · 224 unmodified lines
4665		4712
4666	static int io_timeout(struct io_kiocb *req)	4713	static int io_timeout(struct io_kiocb *req)
4667	{	4714	{
4668	unsigned count;
4669	struct io_ring_ctx *ctx = req->ctx;	4715	struct io_ring_ctx *ctx = req->ctx;
4670	struct io_timeout_data *data;	4716	struct io_timeout_data *data;
4671	struct list_head *entry;	4717	struct list_head *entry;
4672	unsigned span = 0;	4718	unsigned span = 0;
		4719	u32 count = req->timeout.count;
		4720	u32 seq = req->sequence;
4673		4721
4674	data = &req->io->timeout;	4722	data = &req->io->timeout;
4675		4723
@@ -4678,7 +4726,6 @@ static int io_timeout(struct io_kiocb *req) · 2 unmodified lines
4678	* timeout event to be satisfied. If it isn't set, then this is	4726	* timeout event to be satisfied. If it isn't set, then this is
4679	* a pure timeout request, sequence isn't used.	4727	* a pure timeout request, sequence isn't used.
4680	*/	4728	*/
4681	count = req->timeout.count;
4682	if (!count) {	4729	if (!count) {
4683	req->flags \|= REQ_F_TIMEOUT_NOSEQ;	4730	req->flags \|= REQ_F_TIMEOUT_NOSEQ;
4684	spin_lock_irq(&ctx->completion_lock);	4731	spin_lock_irq(&ctx->completion_lock);
@@ -4686,8 +4733,7 @@ static int io_timeout(struct io_kiocb *req) · 1 unmodified line
4686	goto add;	4733	goto add;
4687	}	4734	}
4688		4735
4689	req->sequence = ctx->cached_sq_head + count - 1;	4736	req->sequence = seq + count;
4690	data->seq_offset = count;
4691		4737
4692	/*	4738	/*
4693	* Insertion sort, ensuring the first entry in the list is always	4739	* Insertion sort, ensuring the first entry in the list is always
@@ -4696,26 +4742,26 @@ static int io_timeout(struct io_kiocb *req) · 2 unmodified lines
4696	spin_lock_irq(&ctx->completion_lock);	4742	spin_lock_irq(&ctx->completion_lock);
4697	list_for_each_prev(entry, &ctx->timeout_list) {	4743	list_for_each_prev(entry, &ctx->timeout_list) {
4698	struct io_kiocb *nxt = list_entry(entry, struct io_kiocb, list);	4744	struct io_kiocb *nxt = list_entry(entry, struct io_kiocb, list);
4699	unsigned nxt_sq_head;	4745	unsigned nxt_seq;
4700	long long tmp, tmp_nxt;	4746	long long tmp, tmp_nxt;
4701	u32 nxt_offset = nxt->io->timeout.seq_offset;	4747	u32 nxt_offset = nxt->timeout.count;
4702		4748
4703	if (nxt->flags & REQ_F_TIMEOUT_NOSEQ)	4749	if (nxt->flags & REQ_F_TIMEOUT_NOSEQ)
4704	continue;	4750	continue;
4705		4751
4706	/*	4752	/*
4707	* Since cached_sq_head + count - 1 can overflow, use type long	4753	* Since seq + count can overflow, use type long
4708	* long to store it.	4754	* long to store it.
4709	*/	4755	*/
4710	tmp = (long long)ctx->cached_sq_head + count - 1;	4756	tmp = (long long)seq + count;
4711	nxt_sq_head = nxt->sequence - nxt_offset + 1;	4757	nxt_seq = nxt->sequence - nxt_offset;
4712	tmp_nxt = (long long)nxt_sq_head + nxt_offset - 1;	4758	tmp_nxt = (long long)nxt_seq + nxt_offset;
4713		4759
4714	/*	4760	/*
4715	* cached_sq_head may overflow, and it will never overflow twice	4761	* cached_sq_head may overflow, and it will never overflow twice
4716	* once there is some timeout req still be valid.	4762	* once there is some timeout req still be valid.
4717	*/	4763	*/
4718	if (ctx->cached_sq_head < nxt_sq_head)	4764	if (seq < nxt_seq)
4719	tmp += UINT_MAX;	4765	tmp += UINT_MAX;
4720		4766
4721	if (tmp > tmp_nxt)	4767	if (tmp > tmp_nxt)
@@ -4973,7 +5019,7 @@ static int io_req_defer(struct io_kiocb req, const struct io_uring_sqe sqe) · 251 unmodified lines
4973	int ret;	5019	int ret;
4974		5020
4975	/* Still need defer if there is pending req in defer list. */	5021	/* Still need defer if there is pending req in defer list. */
4976	if (!req_need_defer(req) && list_empty(&ctx->defer_list))	5022	if (!req_need_defer(req) && list_empty_careful(&ctx->defer_list))
4977	return 0;	5023	return 0;
4978		5024
4979	if (!req->io && io_alloc_async_ctx(req))	5025	if (!req->io && io_alloc_async_ctx(req))
@@ -5387,7 +5433,7 @@ static int io_grab_files(struct io_kiocb *req) · 407 unmodified lines
5387	int ret = -EBADF;	5433	int ret = -EBADF;
5388	struct io_ring_ctx *ctx = req->ctx;	5434	struct io_ring_ctx *ctx = req->ctx;
5389		5435
5390	if (req->work.files)	5436	if (req->work.files \|\| (req->flags & REQ_F_NO_FILE_TABLE))
5391	return 0;	5437	return 0;
5392	if (!ctx->ring_file)	5438	if (!ctx->ring_file)
5393	return -EBADF;	5439	return -EBADF;
@@ -5476,7 +5522,7 @@ static struct io_kiocb io_prep_linked_timeout(struct io_kiocb req) · 82 unmodified lines
5476	{	5522	{
5477	struct io_kiocb *nxt;	5523	struct io_kiocb *nxt;
5478		5524
5479	if (!(req->flags & REQ_F_LINK))	5525	if (!(req->flags & REQ_F_LINK_HEAD))
5480	return NULL;	5526	return NULL;
5481	/* for polled retry, if flag is set, we already went through here */	5527	/* for polled retry, if flag is set, we already went through here */
5482	if (req->flags & REQ_F_POLLED)	5528	if (req->flags & REQ_F_POLLED)
@@ -5604,54 +5650,11 @@ static inline void io_queue_link_head(struct io_kiocb *req) · 121 unmodified lines
5604	io_queue_sqe(req, NULL);	5650	io_queue_sqe(req, NULL);
5605	}	5651	}
5606		5652
5607	#define SQE_VALID_FLAGS (IOSQE_FIXED_FILE\|IOSQE_IO_DRAIN\|IOSQE_IO_LINK\| \	5653	static int io_submit_sqe(struct io_kiocb req, const struct io_uring_sqe sqe,
5608	IOSQE_IO_HARDLINK \| IOSQE_ASYNC \| \
5609	IOSQE_BUFFER_SELECT)
5610
5611	static bool io_submit_sqe(struct io_kiocb req, const struct io_uring_sqe sqe,
5612	struct io_submit_state state, struct io_kiocb *link)	5654	struct io_submit_state state, struct io_kiocb *link)
5613	{	5655	{
5614	struct io_ring_ctx *ctx = req->ctx;	5656	struct io_ring_ctx *ctx = req->ctx;
5615	unsigned int sqe_flags;	5657	int ret;
5616	int ret, id, fd;
5617
5618	sqe_flags = READ_ONCE(sqe->flags);
5619
5620	/* enforce forwards compatibility on users */
5621	if (unlikely(sqe_flags & ~SQE_VALID_FLAGS)) {
5622	ret = -EINVAL;
5623	goto err_req;
5624	}
5625
5626	if ((sqe_flags & IOSQE_BUFFER_SELECT) &&
5627	!io_op_defs[req->opcode].buffer_select) {
5628	ret = -EOPNOTSUPP;
5629	goto err_req;
5630	}
5631
5632	id = READ_ONCE(sqe->personality);
5633	if (id) {
5634	req->work.creds = idr_find(&ctx->personality_idr, id);
5635	if (unlikely(!req->work.creds)) {
5636	ret = -EINVAL;
5637	goto err_req;
5638	}
5639	get_cred(req->work.creds);
5640	}
5641
5642	/* same numerical values with corresponding REQ_F_, safe to copy /
5643	req->flags \|= sqe_flags & (IOSQE_IO_DRAIN \| IOSQE_IO_HARDLINK \|
5644	IOSQE_ASYNC \| IOSQE_FIXED_FILE \|
5645	IOSQE_BUFFER_SELECT);
5646
5647	fd = READ_ONCE(sqe->fd);
5648	ret = io_req_set_file(state, req, fd, sqe_flags);
5649	if (unlikely(ret)) {
5650	err_req:
5651	io_cqring_add_event(req, ret);
5652	io_double_put_req(req);
5653	return false;
5654	}
5655		5658
5656	/*	5659	/*
5657	* If we already have a head request, queue this one for async	5660	* If we already have a head request, queue this one for async
@@ -5670,42 +5673,39 @@ err_req: · 12 unmodified lines
5670	* next after the link request. The last one is done via	5673	* next after the link request. The last one is done via
5671	* drain_next flag to persist the effect across calls.	5674	* drain_next flag to persist the effect across calls.
5672	*/	5675	*/
5673	if (sqe_flags & IOSQE_IO_DRAIN) {	5676	if (req->flags & REQ_F_IO_DRAIN) {
5674	head->flags \|= REQ_F_IO_DRAIN;	5677	head->flags \|= REQ_F_IO_DRAIN;
5675	ctx->drain_next = 1;	5678	ctx->drain_next = 1;
5676	}	5679	}
5677	if (io_alloc_async_ctx(req)) {	5680	if (io_alloc_async_ctx(req))
5678	ret = -EAGAIN;	5681	return -EAGAIN;
5679	goto err_req;
5680	}
5681		5682
5682	ret = io_req_defer_prep(req, sqe);	5683	ret = io_req_defer_prep(req, sqe);
5683	if (ret) {	5684	if (ret) {
5684	/* fail even hard links since we don't submit */	5685	/* fail even hard links since we don't submit */
5685	head->flags \|= REQ_F_FAIL_LINK;	5686	head->flags \|= REQ_F_FAIL_LINK;
5686	goto err_req;	5687	return ret;
5687	}	5688	}
5688	trace_io_uring_link(ctx, req, head);	5689	trace_io_uring_link(ctx, req, head);
5689	list_add_tail(&req->link_list, &head->link_list);	5690	list_add_tail(&req->link_list, &head->link_list);
5690		5691
5691	/* last request of a link, enqueue the link */	5692	/* last request of a link, enqueue the link */
5692	if (!(sqe_flags & (IOSQE_IO_LINK\|IOSQE_IO_HARDLINK))) {	5693	if (!(req->flags & (REQ_F_LINK \| REQ_F_HARDLINK))) {
5693	io_queue_link_head(head);	5694	io_queue_link_head(head);
5694	*link = NULL;	5695	*link = NULL;
5695	}	5696	}
5696	} else {	5697	} else {
5697	if (unlikely(ctx->drain_next)) {	5698	if (unlikely(ctx->drain_next)) {
5698	req->flags \|= REQ_F_IO_DRAIN;	5699	req->flags \|= REQ_F_IO_DRAIN;
5699	req->ctx->drain_next = 0;	5700	ctx->drain_next = 0;
5700	}	5701	}
5701	if (sqe_flags & (IOSQE_IO_LINK\|IOSQE_IO_HARDLINK)) {	5702	if (req->flags & (REQ_F_LINK \| REQ_F_HARDLINK)) {
5702	req->flags \|= REQ_F_LINK;	5703	req->flags \|= REQ_F_LINK_HEAD;
5703	INIT_LIST_HEAD(&req->link_list);	5704	INIT_LIST_HEAD(&req->link_list);
5704		5705
5705	if (io_alloc_async_ctx(req)) {	5706	if (io_alloc_async_ctx(req))
5706	ret = -EAGAIN;	5707	return -EAGAIN;
5707	goto err_req;	5708
5708	}
5709	ret = io_req_defer_prep(req, sqe);	5709	ret = io_req_defer_prep(req, sqe);
5710	if (ret)	5710	if (ret)
5711	req->flags \|= REQ_F_FAIL_LINK;	5711	req->flags \|= REQ_F_FAIL_LINK;
@@ -5715,7 +5715,7 @@ err_req: · 3 unmodified lines
5715	}	5715	}
5716	}	5716	}
5717		5717
5718	return true;	5718	return 0;
5719	}	5719	}
5720		5720
5721	/*	5721	/*
@@ -5789,15 +5789,23 @@ static inline void io_consume_sqe(struct io_ring_ctx *ctx) · 67 unmodified lines
5789	ctx->cached_sq_head++;	5789	ctx->cached_sq_head++;
5790	}	5790	}
5791		5791
5792	static void io_init_req(struct io_ring_ctx ctx, struct io_kiocb req,	5792	#define SQE_VALID_FLAGS (IOSQE_FIXED_FILE\|IOSQE_IO_DRAIN\|IOSQE_IO_LINK\| \
5793	const struct io_uring_sqe *sqe)	5793	IOSQE_IO_HARDLINK \| IOSQE_ASYNC \| \
		5794	IOSQE_BUFFER_SELECT)
		5795
		5796	static int io_init_req(struct io_ring_ctx ctx, struct io_kiocb req,
		5797	const struct io_uring_sqe *sqe,
		5798	struct io_submit_state *state, bool async)
5794	{	5799	{
		5800	unsigned int sqe_flags;
		5801	int id, fd;
		5802
5795	/*	5803	/*
5796	* All io need record the previous position, if LINK vs DARIN,	5804	* All io need record the previous position, if LINK vs DARIN,
5797	* it can be used to mark the position of the first IO in the	5805	* it can be used to mark the position of the first IO in the
5798	* link list.	5806	* link list.
5799	*/	5807	*/
5800	req->sequence = ctx->cached_sq_head;	5808	req->sequence = ctx->cached_sq_head - ctx->cached_sq_dropped;
5801	req->opcode = READ_ONCE(sqe->opcode);	5809	req->opcode = READ_ONCE(sqe->opcode);
5802	req->user_data = READ_ONCE(sqe->user_data);	5810	req->user_data = READ_ONCE(sqe->user_data);
5803	req->io = NULL;	5811	req->io = NULL;
@@ -5808,17 +5816,50 @@ static void io_init_req(struct io_ring_ctx ctx, struct io_kiocb req, · 4 unmodified lines
5808	refcount_set(&req->refs, 2);	5816	refcount_set(&req->refs, 2);
5809	req->task = NULL;	5817	req->task = NULL;
5810	req->result = 0;	5818	req->result = 0;
		5819	req->needs_fixed_file = async;
5811	INIT_IO_WORK(&req->work, io_wq_submit_work);	5820	INIT_IO_WORK(&req->work, io_wq_submit_work);
		5821
		5822	if (unlikely(req->opcode >= IORING_OP_LAST))
		5823	return -EINVAL;
		5824
		5825	if (io_op_defs[req->opcode].needs_mm && !current->mm) {
		5826	if (unlikely(!mmget_not_zero(ctx->sqo_mm)))
		5827	return -EFAULT;
		5828	use_mm(ctx->sqo_mm);
		5829	}
		5830
		5831	sqe_flags = READ_ONCE(sqe->flags);
		5832	/* enforce forwards compatibility on users */
		5833	if (unlikely(sqe_flags & ~SQE_VALID_FLAGS))
		5834	return -EINVAL;
		5835
		5836	if ((sqe_flags & IOSQE_BUFFER_SELECT) &&
		5837	!io_op_defs[req->opcode].buffer_select)
		5838	return -EOPNOTSUPP;
		5839
		5840	id = READ_ONCE(sqe->personality);
		5841	if (id) {
		5842	req->work.creds = idr_find(&ctx->personality_idr, id);
		5843	if (unlikely(!req->work.creds))
		5844	return -EINVAL;
		5845	get_cred(req->work.creds);
		5846	}
		5847
		5848	/* same numerical values with corresponding REQ_F_, safe to copy /
		5849	req->flags \|= sqe_flags & (IOSQE_IO_DRAIN \| IOSQE_IO_HARDLINK \|
		5850	IOSQE_ASYNC \| IOSQE_FIXED_FILE \|
		5851	IOSQE_BUFFER_SELECT \| IOSQE_IO_LINK);
		5852
		5853	fd = READ_ONCE(sqe->fd);
		5854	return io_req_set_file(state, req, fd, sqe_flags);
5812	}	5855	}
5813		5856
5814	static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr,	5857	static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr,
5815	struct file *ring_file, int ring_fd,	5858	struct file *ring_file, int ring_fd, bool async)
5816	struct mm_struct **mm, bool async)
5817	{	5859	{
5818	struct io_submit_state state, *statep = NULL;	5860	struct io_submit_state state, *statep = NULL;
5819	struct io_kiocb *link = NULL;	5861	struct io_kiocb *link = NULL;
5820	int i, submitted = 0;	5862	int i, submitted = 0;
5821	bool mm_fault = false;
5822		5863
5823	/* if we have a backlog and couldn't flush it all, return BUSY */	5864	/* if we have a backlog and couldn't flush it all, return BUSY */
5824	if (test_bit(0, &ctx->sq_check_overflow)) {	5865	if (test_bit(0, &ctx->sq_check_overflow)) {
@@ -5858,34 +5899,23 @@ static int io_submit_sqes(struct io_ring_ctx *ctx, unsigned int nr, · 33 unmodified lines
5858	break;	5899	break;
5859	}	5900	}
5860		5901
5861	io_init_req(ctx, req, sqe);	5902	err = io_init_req(ctx, req, sqe, statep, async);
5862	io_consume_sqe(ctx);	5903	io_consume_sqe(ctx);
5863	/* will complete beyond this point, count as submitted */	5904	/* will complete beyond this point, count as submitted */
5864	submitted++;	5905	submitted++;
5865		5906
5866	if (unlikely(req->opcode >= IORING_OP_LAST)) {	5907	if (unlikely(err)) {
5867	err = -EINVAL;
5868	fail_req:	5908	fail_req:
5869	io_cqring_add_event(req, err);	5909	io_cqring_add_event(req, err);
5870	io_double_put_req(req);	5910	io_double_put_req(req);
5871	break;	5911	break;
5872	}	5912	}
5873		5913
5874	if (io_op_defs[req->opcode].needs_mm && !*mm) {
5875	mm_fault = mm_fault \|\| !mmget_not_zero(ctx->sqo_mm);
5876	if (unlikely(mm_fault)) {
5877	err = -EFAULT;
5878	goto fail_req;
5879	}
5880	use_mm(ctx->sqo_mm);
5881	*mm = ctx->sqo_mm;
5882	}
5883
5884	req->needs_fixed_file = async;
5885	trace_io_uring_submit_sqe(ctx, req->opcode, req->user_data,	5914	trace_io_uring_submit_sqe(ctx, req->opcode, req->user_data,
5886	true, async);	5915	true, async);
5887	if (!io_submit_sqe(req, sqe, statep, &link))	5916	err = io_submit_sqe(req, sqe, statep, &link);
5888	break;	5917	if (err)
		5918	goto fail_req;
5889	}	5919	}
5890		5920
5891	if (unlikely(submitted != nr)) {	5921	if (unlikely(submitted != nr)) {
@@ -5904,10 +5934,19 @@ fail_req: · 12 unmodified lines
5904	return submitted;	5934	return submitted;
5905	}	5935	}
5906		5936
		5937	static inline void io_sq_thread_drop_mm(struct io_ring_ctx *ctx)
		5938	{
		5939	struct mm_struct *mm = current->mm;
		5940
		5941	if (mm) {
		5942	unuse_mm(mm);
		5943	mmput(mm);
		5944	}
		5945	}
		5946
5907	static int io_sq_thread(void *data)	5947	static int io_sq_thread(void *data)
5908	{	5948	{
5909	struct io_ring_ctx *ctx = data;	5949	struct io_ring_ctx *ctx = data;
5910	struct mm_struct *cur_mm = NULL;
5911	const struct cred *old_cred;	5950	const struct cred *old_cred;
5912	mm_segment_t old_fs;	5951	mm_segment_t old_fs;
5913	DEFINE_WAIT(wait);	5952	DEFINE_WAIT(wait);
@@ -5948,11 +5987,7 @@ static int io_sq_thread(void *data) · 34 unmodified lines
5948	* adding ourselves to the waitqueue, as the unuse/drop	5987	* adding ourselves to the waitqueue, as the unuse/drop
5949	* may sleep.	5988	* may sleep.
5950	*/	5989	*/
5951	if (cur_mm) {	5990	io_sq_thread_drop_mm(ctx);
5952	unuse_mm(cur_mm);
5953	mmput(cur_mm);
5954	cur_mm = NULL;
5955	}
5956		5991
5957	/*	5992	/*
5958	* We're polling. If we're within the defined idle	5993	* We're polling. If we're within the defined idle
@@ -6016,7 +6051,7 @@ static int io_sq_thread(void *data) · 57 unmodified lines
6016	}	6051	}
6017		6052
6018	mutex_lock(&ctx->uring_lock);	6053	mutex_lock(&ctx->uring_lock);
6019	ret = io_submit_sqes(ctx, to_submit, NULL, -1, &cur_mm, true);	6054	ret = io_submit_sqes(ctx, to_submit, NULL, -1, true);
6020	mutex_unlock(&ctx->uring_lock);	6055	mutex_unlock(&ctx->uring_lock);
6021	timeout = jiffies + ctx->sq_thread_idle;	6056	timeout = jiffies + ctx->sq_thread_idle;
6022	}	6057	}
@@ -6025,10 +6060,7 @@ static int io_sq_thread(void *data) · 2 unmodified lines
6025	task_work_run();	6060	task_work_run();
6026		6061
6027	set_fs(old_fs);	6062	set_fs(old_fs);
6028	if (cur_mm) {	6063	io_sq_thread_drop_mm(ctx);
6029	unuse_mm(cur_mm);
6030	mmput(cur_mm);
6031	}
6032	revert_creds(old_cred);	6064	revert_creds(old_cred);
6033		6065
6034	kthread_parkme();	6066	kthread_parkme();
@@ -7299,7 +7331,7 @@ static void io_ring_ctx_wait_and_kill(struct io_ring_ctx *ctx) · 1264 unmodified lines
7299	* it could cause shutdown to hang.	7331	* it could cause shutdown to hang.
7300	*/	7332	*/
7301	while (ctx->sqo_thread && !wq_has_sleeper(&ctx->sqo_wait))	7333	while (ctx->sqo_thread && !wq_has_sleeper(&ctx->sqo_wait))
7302	cpu_relax();	7334	cond_resched();
7303		7335
7304	io_kill_timeouts(ctx);	7336	io_kill_timeouts(ctx);
7305	io_poll_remove_all(ctx);	7337	io_poll_remove_all(ctx);
@@ -7509,13 +7541,8 @@ SYSCALL_DEFINE6(io_uring_enter, unsigned int, fd, u32, to_submit, · 203 unmodified lines
7509	wake_up(&ctx->sqo_wait);	7541	wake_up(&ctx->sqo_wait);
7510	submitted = to_submit;	7542	submitted = to_submit;
7511	} else if (to_submit) {	7543	} else if (to_submit) {
7512	struct mm_struct *cur_mm;
7513
7514	mutex_lock(&ctx->uring_lock);	7544	mutex_lock(&ctx->uring_lock);
7515	/* already have mm, so io_submit_sqes() won't try to grab it */	7545	submitted = io_submit_sqes(ctx, to_submit, f.file, fd, false);
7516	cur_mm = ctx->sqo_mm;
7517	submitted = io_submit_sqes(ctx, to_submit, f.file, fd,
7518	&cur_mm, false);
7519	mutex_unlock(&ctx->uring_lock);	7546	mutex_unlock(&ctx->uring_lock);
7520		7547
7521	if (submitted != to_submit)	7548	if (submitted != to_submit)

fs/ioctl.c+8−0

 static int ioctl_fibmap(struct file *filp, int __user *p)
 {
 	struct inode *inode = file_inode(filp);
+	struct super_block *sb = inode->i_sb;
 	int error, ur_block;
 	sector_t block;
 	block = ur_block;
 	error = bmap(inode, &block);
+	if (block > INT_MAX) {
+		error = -ERANGE;
+		pr_warn_ratelimited("[%s/%d] FS: %s File: %pD4 would truncate fibmap result\n",
+				    current->comm, task_pid_nr(current),
+				    sb->s_id, filp);
+	}
 	if (error)
 		ur_block = 0;
 	else

fs/iomap/fiemap.c+1−4

 	if (iomap->type == IOMAP_MAPPED) {
 		addr = (pos - iomap->offset + iomap->addr) >> inode->i_blkbits;
-		if (addr > INT_MAX)
+		*bno = addr;
-			WARN(1, "would truncate bmap result\n");
-		else
-			*bno = addr;
 	}
 	return 0;
 }

fs/nfs/nfs3acl.c+15−7

 int nfs3_set_acl(struct inode *inode, struct posix_acl *acl, int type)
 {
-	struct posix_acl *alloc = NULL, *dfacl = NULL;
+	struct posix_acl *orig = acl, *dfacl = NULL, *alloc;
 	int status;
 	if (S_ISDIR(inode->i_mode)) {
 		switch(type) {
 		case ACL_TYPE_ACCESS:
-			alloc = dfacl = get_acl(inode, ACL_TYPE_DEFAULT);
+			alloc = get_acl(inode, ACL_TYPE_DEFAULT);
 			if (IS_ERR(alloc))
 				goto fail;
+			dfacl = alloc;
 			break;
 		case ACL_TYPE_DEFAULT:
-			dfacl = acl;
+			alloc = get_acl(inode, ACL_TYPE_ACCESS);
-			alloc = acl = get_acl(inode, ACL_TYPE_ACCESS);
 			if (IS_ERR(alloc))
 				goto fail;
+			dfacl = acl;
+			acl = alloc;
 			break;
 		}
 	}
 	if (acl == NULL) {
-		alloc = acl = posix_acl_from_mode(inode->i_mode, GFP_KERNEL);
+		alloc = posix_acl_from_mode(inode->i_mode, GFP_KERNEL);
 		if (IS_ERR(alloc))
 			goto fail;
+		acl = alloc;
 	}
 	status = __nfs3_proc_setacls(inode, acl, dfacl);
-	posix_acl_release(alloc);
+out:
+	if (acl != orig)
+		posix_acl_release(acl);
+	if (dfacl != orig)
+		posix_acl_release(dfacl);
 	return status;
 fail:
-	return PTR_ERR(alloc);
+	status = PTR_ERR(alloc);
+	goto out;
 }
 const struct xattr_handler *nfs3_xattr_handlers[] = {

fs/nfs/nfs4proc.c+9−2

@@ -7891,6 +7891,7 @@ static void · 7890 unmodified lines
7891	nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata)	7891	nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata)
7892	{	7892	{
7893	struct nfs41_bind_conn_to_session_args *args = task->tk_msg.rpc_argp;	7893	struct nfs41_bind_conn_to_session_args *args = task->tk_msg.rpc_argp;
		7894	struct nfs41_bind_conn_to_session_res *res = task->tk_msg.rpc_resp;
7894	struct nfs_client *clp = args->client;	7895	struct nfs_client *clp = args->client;
7895		7896
7896	switch (task->tk_status) {	7897	switch (task->tk_status) {
@@ -7899,6 +7900,12 @@ nfs4_bind_one_conn_to_session_done(struct rpc_task task, void calldata) · 2 unmodified lines
7899	nfs4_schedule_session_recovery(clp->cl_session,	7900	nfs4_schedule_session_recovery(clp->cl_session,
7900	task->tk_status);	7901	task->tk_status);
7901	}	7902	}
		7903	if (args->dir == NFS4_CDFC4_FORE_OR_BOTH &&
		7904	res->dir != NFS4_CDFS4_BOTH) {
		7905	rpc_task_close_connection(task);
		7906	if (args->retries++ < MAX_BIND_CONN_TO_SESSION_RETRIES)
		7907	rpc_restart_call(task);
		7908	}
7902	}	7909	}
7903		7910
7904	static const struct rpc_call_ops nfs4_bind_one_conn_to_session_ops = {	7911	static const struct rpc_call_ops nfs4_bind_one_conn_to_session_ops = {
@@ -7921,6 +7928,7 @@ int nfs4_proc_bind_one_conn_to_session(struct rpc_clnt *clnt, · 16 unmodified lines
7921	struct nfs41_bind_conn_to_session_args args = {	7928	struct nfs41_bind_conn_to_session_args args = {
7922	.client = clp,	7929	.client = clp,
7923	.dir = NFS4_CDFC4_FORE_OR_BOTH,	7930	.dir = NFS4_CDFC4_FORE_OR_BOTH,
		7931	.retries = 0,
7924	};	7932	};
7925	struct nfs41_bind_conn_to_session_res res;	7933	struct nfs41_bind_conn_to_session_res res;
7926	struct rpc_message msg = {	7934	struct rpc_message msg = {
@@ -9191,8 +9199,7 @@ nfs4_proc_layoutget(struct nfs4_layoutget lgp, long timeout) · 1264 unmodified lines
9191	nfs4_init_sequence(&lgp->args.seq_args, &lgp->res.seq_res, 0, 0);	9199	nfs4_init_sequence(&lgp->args.seq_args, &lgp->res.seq_res, 0, 0);
9192		9200
9193	task = rpc_run_task(&task_setup_data);	9201	task = rpc_run_task(&task_setup_data);
9194	if (IS_ERR(task))	9202
9195	return ERR_CAST(task);
9196	status = rpc_wait_for_completion_task(task);	9203	status = rpc_wait_for_completion_task(task);
9197	if (status != 0)	9204	if (status != 0)
9198	goto out;	9205	goto out;

fs/nfs/pnfs.c+7−7

 			!valid_layout) {
 		spin_unlock(&ino->i_lock);
 		dprintk("NFS: %s no layout segments to return\n", __func__);
-		goto out_put_layout_hdr;
+		goto out_wait_layoutreturn;
 	}
 	send = pnfs_prepare_layoutreturn(lo, &stateid, &cred, NULL);
 	spin_unlock(&ino->i_lock);
 	if (send)
 		status = pnfs_send_layoutreturn(lo, &stateid, &cred, IOMODE_ANY, true);
+out_wait_layoutreturn:
+	wait_on_bit(&lo->plh_flags, NFS_LAYOUT_RETURN, TASK_UNINTERRUPTIBLE);
 out_put_layout_hdr:
 	pnfs_free_lseg_list(&tmp_list);
 	pnfs_put_layout_hdr(lo);
 	/* lo ref dropped in pnfs_roc_release() */
 	layoutreturn = pnfs_prepare_layoutreturn(lo, &stateid, &lc_cred, &iomode);
 	/* If the creds don't match, we can't compound the layoutreturn */
-	if (!layoutreturn)
+	if (!layoutreturn || cred_fscmp(cred, lc_cred) != 0)
 		goto out_noroc;
-	if (cred_fscmp(cred, lc_cred) != 0)
-		goto out_noroc_put_cred;
 	roc = layoutreturn;
 	pnfs_init_layoutreturn_args(args, lo, &stateid, iomode);
 	res->lrs_present = 0;
 	layoutreturn = false;
-out_noroc_put_cred:
 	put_cred(lc_cred);
 out_noroc:
 	spin_unlock(&ino->i_lock);
 	rcu_read_unlock();
 			goto lookup_again;
 		}
+		spin_unlock(&ino->i_lock);
 		first = true;
 		status = nfs4_select_rw_stateid(ctx->state,
 					iomode == IOMODE_RW ? FMODE_WRITE : FMODE_READ,
 			trace_pnfs_update_layout(ino, pos, count,
 					iomode, lo, lseg,
 					PNFS_UPDATE_LAYOUT_INVALID_OPEN);
-			spin_unlock(&ino->i_lock);
 			nfs4_schedule_stateid_recovery(server, ctx->state);
 			pnfs_clear_first_layoutget(lo);
 			pnfs_put_layout_hdr(lo);
 			goto lookup_again;
 		}
+		spin_lock(&ino->i_lock);
 	} else {
 		nfs4_stateid_copy(&stateid, &lo->plh_stateid);
 	}

fs/nfs/super.c+1−1

@@ -185,7 +185,7 @@ static int __nfs_list_for_each_server(struct list_head *head, · 184 unmodified lines
185		185
186	rcu_read_lock();	186	rcu_read_lock();
187	list_for_each_entry_rcu(server, head, client_link) {	187	list_for_each_entry_rcu(server, head, client_link) {
188	if (!nfs_sb_active(server->super))	188	if (!(server->super && nfs_sb_active(server->super)))
189	continue;	189	continue;
190	rcu_read_unlock();	190	rcu_read_unlock();
191	if (last)	191	if (last)

fs/nfsd/nfs4callback.c+3−1

 		container_of(work, struct nfsd4_callback, cb_work);
 	struct nfs4_client *clp = cb->cb_clp;
 	struct rpc_clnt *clnt;
+	int flags;
 	if (cb->cb_need_restart) {
 		cb->cb_need_restart = false;
 	}
 	cb->cb_msg.rpc_cred = clp->cl_cb_cred;
-	rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | RPC_TASK_SOFTCONN,
+	flags = clp->cl_minorversion ? RPC_TASK_NOCONNECT : RPC_TASK_SOFTCONN;
+	rpc_call_async(clnt, &cb->cb_msg, RPC_TASK_SOFT | flags,
 			cb->cb_ops ? &nfsd4_cb_ops : &nfsd4_cb_probe_ops, cb);
 }

fs/nfsd/nfs4state.c+2−0

 	if (!nbl) {
 		nbl= kmalloc(sizeof(*nbl), GFP_KERNEL);
 		if (nbl) {
+			INIT_LIST_HEAD(&nbl->nbl_list);
+			INIT_LIST_HEAD(&nbl->nbl_lru);
 			fh_copy_shallow(&nbl->nbl_fh, fh);
 			locks_init_lock(&nbl->nbl_lock);
 			nfsd4_init_cb(&nbl->nbl_cb, lo->lo_owner.so_client,

fs/ocfs2/dlmfs/dlmfs.c+12−15

 				loff_t *ppos)
 {
 	int bytes_left;
-	ssize_t writelen;
 	char *lvb_buf;
 	struct inode *inode = file_inode(filp);
 	if (*ppos >= i_size_read(inode))
 		return -ENOSPC;
+	/* don't write past the lvb */
+	if (count > i_size_read(inode) - *ppos)
+		count = i_size_read(inode) - *ppos;
 	if (!count)
 		return 0;
 	if (!access_ok(buf, count))
 		return -EFAULT;
-	/* don't write past the lvb */
+	lvb_buf = kmalloc(count, GFP_NOFS);
-	if ((count + *ppos) > i_size_read(inode))
-		writelen = i_size_read(inode) - *ppos;
-	else
-		writelen = count - *ppos;
-	lvb_buf = kmalloc(writelen, GFP_NOFS);
 	if (!lvb_buf)
 		return -ENOMEM;
-	bytes_left = copy_from_user(lvb_buf, buf, writelen);
+	bytes_left = copy_from_user(lvb_buf, buf, count);
-	writelen -= bytes_left;
+	count -= bytes_left;
-	if (writelen)
+	if (count)
-		user_dlm_write_lvb(inode, lvb_buf, writelen);
+		user_dlm_write_lvb(inode, lvb_buf, count);
 	kfree(lvb_buf);
-	*ppos = *ppos + writelen;
+	*ppos = *ppos + count;
-	mlog(0, "wrote %zd bytes\n", writelen);
+	mlog(0, "wrote %zu bytes\n", count);
-	return writelen;
+	return count;
 }
 static void dlmfs_init_once(void *foo)

fs/pnode.c+4−5

 	child = copy_tree(last_source, last_source->mnt.mnt_root, type);
 	if (IS_ERR(child))
 		return PTR_ERR(child);
+	read_seqlock_excl(&mount_lock);
 	mnt_set_mountpoint(m, mp, child);
+	if (m->mnt_master != dest_master)
+		SET_MNT_MARK(m->mnt_master);
+	read_sequnlock_excl(&mount_lock);
 	last_dest = m;
 	last_source = child;
-	if (m->mnt_master != dest_master) {
-		read_seqlock_excl(&mount_lock);
-		SET_MNT_MARK(m->mnt_master);
-		read_sequnlock_excl(&mount_lock);
-	}
 	hlist_add_head(&child->mnt_hash, list);
 	return count_mounts(m->mnt_ns, child);
 }

fs/proc/base.c+13−2

 	noffsets = 0;
 	for (pos = kbuf; pos; pos = next_line) {
 		struct proc_timens_offset *off = &offsets[noffsets];
+		char clock[10];
 		int err;
 		/* Find the end of line and ensure we don't look past it */
 				next_line = NULL;
 		}
-		err = sscanf(pos, "%u %lld %lu", &off->clockid,
+		err = sscanf(pos, "%9s %lld %lu", clock,
 				&off->val.tv_sec, &off->val.tv_nsec);
 		if (err != 3 || off->val.tv_nsec >= NSEC_PER_SEC)
 			goto out;
+		clock[sizeof(clock) - 1] = 0;
+		if (strcmp(clock, "monotonic") == 0 ||
+		    strcmp(clock, __stringify(CLOCK_MONOTONIC)) == 0)
+			off->clockid = CLOCK_MONOTONIC;
+		else if (strcmp(clock, "boottime") == 0 ||

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@@ -8,7 +8,7 @@ · 7 unmodified lines
8	* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.	8	* Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH	9	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH	10	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11	* Copyright(c) 2019 Intel Corporation	11	* Copyright(c) 2019 - 2020 Intel Corporation
12	*	12	*
13	* This program is free software; you can redistribute it and/or modify	13	* This program is free software; you can redistribute it and/or modify
14	* it under the terms of version 2 of the GNU General Public License as	14	* it under the terms of version 2 of the GNU General Public License as
@@ -31,7 +31,7 @@ · 16 unmodified lines
31	* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.	31	* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
32	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH	32	* Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH	33	* Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34	* Copyright(c) 2019 Intel Corporation	34	* Copyright(c) 2019 - 2020 Intel Corporation
35	* All rights reserved.	35	* All rights reserved.
36	*	36	*
37	* Redistribution and use in source and binary forms, with or without	37	* Redistribution and use in source and binary forms, with or without
@@ -99,7 +99,7 @@ enum iwl_mvm_dqa_txq { · 61 unmodified lines
99	IWL_MVM_DQA_MAX_MGMT_QUEUE = 8,	99	IWL_MVM_DQA_MAX_MGMT_QUEUE = 8,
100	IWL_MVM_DQA_AP_PROBE_RESP_QUEUE = 9,	100	IWL_MVM_DQA_AP_PROBE_RESP_QUEUE = 9,
101	IWL_MVM_DQA_MIN_DATA_QUEUE = 10,	101	IWL_MVM_DQA_MIN_DATA_QUEUE = 10,
102	IWL_MVM_DQA_MAX_DATA_QUEUE = 31,	102	IWL_MVM_DQA_MAX_DATA_QUEUE = 30,
103	};	103	};
104		104
105	enum iwl_mvm_tx_fifo {	105	enum iwl_mvm_tx_fifo {

@@ -812,17 +812,17 @@ static const struct SiS_VCLKData SiSUSB_VCLKData[] = { · 811 unmodified lines
812	int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);	812	int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
813	int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo);	813	int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo);
814		814
815	extern int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data);	815	extern int sisusb_setreg(struct sisusb_usb_data *sisusb, u32 port, u8 data);
816	extern int sisusb_getreg(struct sisusb_usb_data sisusb, int port, u8 data);	816	extern int sisusb_getreg(struct sisusb_usb_data sisusb, u32 port, u8 data);
817	extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,	817	extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, u32 port,
818	u8 index, u8 data);	818	u8 index, u8 data);
819	extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,	819	extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, u32 port,
820	u8 index, u8 * data);	820	u8 index, u8 * data);
821	extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port,	821	extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, u32 port,
822	u8 idx, u8 myand, u8 myor);	822	u8 idx, u8 myand, u8 myor);
823	extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,	823	extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, u32 port,
824	u8 index, u8 myor);	824	u8 index, u8 myor);
825	extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,	825	extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, u32 port,
826	u8 idx, u8 myand);	826	u8 idx, u8 myand);
827		827
828	void sisusb_delete(struct kref *kref);	828	void sisusb_delete(struct kref *kref);