Pull media fixes from Mauro Carvalho Chehab: - a rand Kconfig fixup for mtk-vcodec - a fix at h264 handling at cedrus codec driver - some warning fixes when config PM is not enabled at marvell-ccic - two fixes at venus codec driver: one related to codec profile and the other one related to a bad error path which causes an OOPS on module re-bind * tag 'media/v5.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: media: venus: pm_helpers: Fix kernel module reload media: venus: venc: Fix setting of profile and level media: cedrus: h264: Fix check for presence of scaling matrix media: media/platform/marvell-ccic: fix warnings when CONFIG_PM is not enabled media: mtk-vcodec: fix build breakage when one of VPU or SCP is enabled media: mtk-vcodec: move firmware implementations into their own files
Unified · Split
| @@ -253,17 +253,31 @@ config VIDEO_MEDIATEK_VCODEC · 252 unmodified lines | ||
| 253 | 253 | depends on MTK_IOMMU || COMPILE_TEST |
| 254 | 254 | depends on VIDEO_DEV && VIDEO_V4L2 |
| 255 | 255 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 256 | + depends on VIDEO_MEDIATEK_VPU || MTK_SCP | |
| 257 | + # The two following lines ensure we have the same state ("m" or "y") as | |
| 258 | + # our dependencies, to avoid missing symbols during link. | |
| 259 | + depends on VIDEO_MEDIATEK_VPU || !VIDEO_MEDIATEK_VPU | |
| 260 | + depends on MTK_SCP || !MTK_SCP | |
| 256 | 261 | select VIDEOBUF2_DMA_CONTIG |
| 257 | 262 | select V4L2_MEM2MEM_DEV |
| 258 | − select VIDEO_MEDIATEK_VPU | |
| 259 | − select MTK_SCP | |
| 263 | + select VIDEO_MEDIATEK_VCODEC_VPU if VIDEO_MEDIATEK_VPU | |
| 264 | + select VIDEO_MEDIATEK_VCODEC_SCP if MTK_SCP | |
| 260 | 265 | help |
| 261 | − Mediatek video codec driver provides HW capability to | |
| 262 | − encode and decode in a range of video formats | |
| 263 | − This driver rely on VPU driver to communicate with VPU. | |
| 266 | + Mediatek video codec driver provides HW capability to | |
| 267 | + encode and decode in a range of video formats on MT8173 | |
| 268 | + and MT8183. | |
| 269 | + | |
| 270 | + Note that support for MT8173 requires VIDEO_MEDIATEK_VPU to | |
| 271 | + also be selected. Support for MT8183 depends on MTK_SCP. | |
| 272 | + | |
| 273 | + To compile this driver as modules, choose M here: the | |
| 274 | + modules will be called mtk-vcodec-dec and mtk-vcodec-enc. | |
| 275 | + | |
| 276 | +config VIDEO_MEDIATEK_VCODEC_VPU | |
| 277 | + bool | |
| 264 | 278 | |
| 265 | − To compile this driver as modules, choose M here: the | |
| 266 | − modules will be called mtk-vcodec-dec and mtk-vcodec-enc. | |
| 279 | +config VIDEO_MEDIATEK_VCODEC_SCP | |
| 280 | + bool | |
| 267 | 281 | |
| 268 | 282 | config VIDEO_MEM2MEM_DEINTERLACE |
| 269 | 283 | tristate "Deinterlace support" |
| @@ -307,6 +307,7 @@ static int mmpcam_platform_remove(struct platform_device *pdev) · 306 unmodified lines | ||
| 307 | 307 | * Suspend/resume support. |
| 308 | 308 | */ |
| 309 | 309 | |
| 310 | +#ifdef CONFIG_PM | |
| 310 | 311 | static int mmpcam_runtime_resume(struct device *dev) |
| 311 | 312 | { |
| 312 | 313 | struct mmp_camera *cam = dev_get_drvdata(dev); |
| @@ -352,6 +353,7 @@ static int __maybe_unused mmpcam_resume(struct device *dev) · 39 unmodified lines | ||
| 352 | 353 | return mccic_resume(&cam->mcam); |
| 353 | 354 | return 0; |
| 354 | 355 | } |
| 356 | +#endif | |
| 355 | 357 | |
| 356 | 358 | static const struct dev_pm_ops mmpcam_pm_ops = { |
| 357 | 359 | SET_RUNTIME_PM_OPS(mmpcam_runtime_suspend, mmpcam_runtime_resume, NULL) |
| @@ -24,4 +24,12 @@ mtk-vcodec-enc-y := venc/venc_vp8_if.o \ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | mtk-vcodec-common-y := mtk_vcodec_intr.o \ |
| 26 | 26 | mtk_vcodec_util.o \ |
| 27 | − mtk_vcodec_fw.o | |
| 27 | + mtk_vcodec_fw.o \ | |
| 28 | + | |
| 29 | +ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU),) | |
| 30 | +mtk-vcodec-common-y += mtk_vcodec_fw_vpu.o | |
| 31 | +endif | |
| 32 | + | |
| 33 | +ifneq ($(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP),) | |
| 34 | +mtk-vcodec-common-y += mtk_vcodec_fw_scp.o | |
| 35 | +endif | |
| @@ -241,7 +241,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) · 240 unmodified lines | ||
| 241 | 241 | } |
| 242 | 242 | dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); |
| 243 | 243 | |
| 244 | − dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_DEC); | |
| 244 | + dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, DECODER); | |
| 245 | 245 | if (IS_ERR(dev->fw_handler)) |
| 246 | 246 | return PTR_ERR(dev->fw_handler); |
| 247 | 247 | |
| @@ -293,7 +293,7 @@ static int mtk_vcodec_probe(struct platform_device *pdev) · 292 unmodified lines | ||
| 293 | 293 | } |
| 294 | 294 | dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32)); |
| 295 | 295 | |
| 296 | − dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, VPU_RST_ENC); | |
| 296 | + dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, ENCODER); | |
| 297 | 297 | if (IS_ERR(dev->fw_handler)) |
| 298 | 298 | return PTR_ERR(dev->fw_handler); |
| 299 | 299 | |
| @@ -1,193 +1,29 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | |
| 3 | 3 | #include "mtk_vcodec_fw.h" |
| 4 | +#include "mtk_vcodec_fw_priv.h" | |
| 4 | 5 | #include "mtk_vcodec_util.h" |
| 5 | 6 | #include "mtk_vcodec_drv.h" |
| 6 | 7 | |
| 7 | −struct mtk_vcodec_fw_ops { | |
| 8 | − int (*load_firmware)(struct mtk_vcodec_fw *fw); | |
| 9 | − unsigned int (*get_vdec_capa)(struct mtk_vcodec_fw *fw); | |
| 10 | − unsigned int (*get_venc_capa)(struct mtk_vcodec_fw *fw); | |
| 11 | − void * (*map_dm_addr)(struct mtk_vcodec_fw *fw, u32 dtcm_dmem_addr); | |
| 12 | − int (*ipi_register)(struct mtk_vcodec_fw *fw, int id, | |
| 13 | − mtk_vcodec_ipi_handler handler, const char *name, void *priv); | |
| 14 | − int (*ipi_send)(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 15 | − unsigned int len, unsigned int wait); | |
| 16 | −}; | |
| 17 | − | |
| 18 | −struct mtk_vcodec_fw { | |
| 19 | − enum mtk_vcodec_fw_type type; | |
| 20 | − const struct mtk_vcodec_fw_ops *ops; | |
| 21 | − struct platform_device *pdev; | |
| 22 | − struct mtk_scp *scp; | |
| 23 | −}; | |
| 24 | − | |
| 25 | −static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw) | |
| 26 | −{ | |
| 27 | − return vpu_load_firmware(fw->pdev); | |
| 28 | −} | |
| 29 | − | |
| 30 | −static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw) | |
| 31 | −{ | |
| 32 | − return vpu_get_vdec_hw_capa(fw->pdev); | |
| 33 | −} | |
| 34 | − | |
| 35 | −static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw) | |
| 36 | −{ | |
| 37 | − return vpu_get_venc_hw_capa(fw->pdev); | |
| 38 | −} | |
| 39 | − | |
| 40 | −static void *mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw *fw, | |
| 41 | − u32 dtcm_dmem_addr) | |
| 42 | −{ | |
| 43 | − return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr); | |
| 44 | −} | |
| 45 | − | |
| 46 | −static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id, | |
| 47 | − mtk_vcodec_ipi_handler handler, | |
| 48 | − const char *name, void *priv) | |
| 49 | −{ | |
| 50 | − /* | |
| 51 | − * The handler we receive takes a void * as its first argument. We | |
| 52 | − * cannot change this because it needs to be passed down to the rproc | |
| 53 | − * subsystem when SCP is used. VPU takes a const argument, which is | |
| 54 | − * more constrained, so the conversion below is safe. | |
| 55 | − */ | |
| 56 | − ipi_handler_t handler_const = (ipi_handler_t)handler; | |
| 57 | − | |
| 58 | − return vpu_ipi_register(fw->pdev, id, handler_const, name, priv); | |
| 59 | −} | |
| 60 | − | |
| 61 | −static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 62 | − unsigned int len, unsigned int wait) | |
| 63 | −{ | |
| 64 | − return vpu_ipi_send(fw->pdev, id, buf, len); | |
| 65 | −} | |
| 66 | − | |
| 67 | −static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = { | |
| 68 | − .load_firmware = mtk_vcodec_vpu_load_firmware, | |
| 69 | − .get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa, | |
| 70 | − .get_venc_capa = mtk_vcodec_vpu_get_venc_capa, | |
| 71 | − .map_dm_addr = mtk_vcodec_vpu_map_dm_addr, | |
| 72 | − .ipi_register = mtk_vcodec_vpu_set_ipi_register, | |
| 73 | − .ipi_send = mtk_vcodec_vpu_ipi_send, | |
| 74 | −}; | |
| 75 | − | |
| 76 | −static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw) | |
| 77 | −{ | |
| 78 | − return rproc_boot(scp_get_rproc(fw->scp)); | |
| 79 | −} | |
| 80 | − | |
| 81 | −static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw) | |
| 82 | −{ | |
| 83 | − return scp_get_vdec_hw_capa(fw->scp); | |
| 84 | −} | |
| 85 | − | |
| 86 | −static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw) | |
| 87 | −{ | |
| 88 | − return scp_get_venc_hw_capa(fw->scp); | |
| 89 | −} | |
| 90 | − | |
| 91 | −static void *mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw *fw, | |
| 92 | − u32 dtcm_dmem_addr) | |
| 93 | −{ | |
| 94 | − return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr); | |
| 95 | −} | |
| 96 | − | |
| 97 | −static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id, | |
| 98 | − mtk_vcodec_ipi_handler handler, | |
| 99 | − const char *name, void *priv) | |
| 100 | −{ | |
| 101 | − return scp_ipi_register(fw->scp, id, handler, priv); | |
| 102 | −} | |
| 103 | − | |
| 104 | −static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 105 | − unsigned int len, unsigned int wait) | |
| 106 | −{ | |
| 107 | − return scp_ipi_send(fw->scp, id, buf, len, wait); | |
| 108 | −} | |
| 109 | − | |
| 110 | −static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = { | |
| 111 | − .load_firmware = mtk_vcodec_scp_load_firmware, | |
| 112 | − .get_vdec_capa = mtk_vcodec_scp_get_vdec_capa, | |
| 113 | − .get_venc_capa = mtk_vcodec_scp_get_venc_capa, | |
| 114 | − .map_dm_addr = mtk_vcodec_vpu_scp_dm_addr, | |
| 115 | − .ipi_register = mtk_vcodec_scp_set_ipi_register, | |
| 116 | − .ipi_send = mtk_vcodec_scp_ipi_send, | |
| 117 | −}; | |
| 118 | − | |
| 119 | −static void mtk_vcodec_reset_handler(void *priv) | |
| 120 | −{ | |
| 121 | − struct mtk_vcodec_dev *dev = priv; | |
| 122 | − struct mtk_vcodec_ctx *ctx; | |
| 123 | − | |
| 124 | − mtk_v4l2_err("Watchdog timeout!!"); | |
| 125 | − | |
| 126 | − mutex_lock(&dev->dev_mutex); | |
| 127 | − list_for_each_entry(ctx, &dev->ctx_list, list) { | |
| 128 | − ctx->state = MTK_STATE_ABORT; | |
| 129 | − mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT", | |
| 130 | − ctx->id); | |
| 131 | − } | |
| 132 | − mutex_unlock(&dev->dev_mutex); | |
| 133 | −} | |
| 134 | − | |
| 135 | 8 | struct mtk_vcodec_fw *mtk_vcodec_fw_select(struct mtk_vcodec_dev *dev, |
| 136 | 9 | enum mtk_vcodec_fw_type type, |
| 137 | − enum rst_id rst_id) | |
| 10 | + enum mtk_vcodec_fw_use fw_use) | |
| 138 | 11 | { |
| 139 | − const struct mtk_vcodec_fw_ops *ops; | |
| 140 | − struct mtk_vcodec_fw *fw; | |
| 141 | − struct platform_device *fw_pdev = NULL; | |
| 142 | − struct mtk_scp *scp = NULL; | |
| 143 | − | |
| 144 | 12 | switch (type) { |
| 145 | 13 | case VPU: |
| 146 | − ops = &mtk_vcodec_vpu_msg; | |
| 147 | − fw_pdev = vpu_get_plat_device(dev->plat_dev); | |
| 148 | − if (!fw_pdev) { | |
| 149 | − mtk_v4l2_err("firmware device is not ready"); | |
| 150 | − return ERR_PTR(-EINVAL); | |
| 151 | − } | |
| 152 | − vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_reset_handler, | |
| 153 | − dev, rst_id); | |
| 154 | − break; | |
| 14 | + return mtk_vcodec_fw_vpu_init(dev, fw_use); | |
| 155 | 15 | case SCP: |
| 156 | − ops = &mtk_vcodec_rproc_msg; | |
| 157 | − scp = scp_get(dev->plat_dev); | |
| 158 | − if (!scp) { | |
| 159 | − mtk_v4l2_err("could not get vdec scp handle"); | |
| 160 | − return ERR_PTR(-EPROBE_DEFER); | |
| 161 | − } | |
| 162 | − break; | |
| 16 | + return mtk_vcodec_fw_scp_init(dev); | |
| 163 | 17 | default: |
| 164 | 18 | mtk_v4l2_err("invalid vcodec fw type"); |
| 165 | 19 | return ERR_PTR(-EINVAL); |
| 166 | 20 | } |
| 167 | − | |
| 168 | − fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL); | |
| 169 | − if (!fw) | |
| 170 | − return ERR_PTR(-EINVAL); | |
| 171 | − | |
| 172 | − fw->type = type; | |
| 173 | − fw->ops = ops; | |
| 174 | − fw->pdev = fw_pdev; | |
| 175 | − fw->scp = scp; | |
| 176 | − | |
| 177 | − return fw; | |
| 178 | 21 | } |
| 179 | 22 | EXPORT_SYMBOL_GPL(mtk_vcodec_fw_select); |
| 180 | 23 | |
| 181 | 24 | void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw) |
| 182 | 25 | { |
| 183 | − switch (fw->type) { | |
| 184 | − case VPU: | |
| 185 | − put_device(&fw->pdev->dev); | |
| 186 | − break; | |
| 187 | − case SCP: | |
| 188 | − scp_put(fw->scp); | |
| 189 | − break; | |
| 190 | − } | |
| 26 | + fw->ops->release(fw); | |
| 191 | 27 | } |
| 192 | 28 | EXPORT_SYMBOL_GPL(mtk_vcodec_fw_release); |
| 193 | 29 | |
| @@ -15,6 +15,11 @@ enum mtk_vcodec_fw_type { · 14 unmodified lines | ||
| 15 | 15 | SCP, |
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | +enum mtk_vcodec_fw_use { | |
| 19 | + DECODER, | |
| 20 | + ENCODER, | |
| 21 | +}; | |
| 22 | + | |
| 18 | 23 | struct mtk_vcodec_fw; |
| 19 | 24 | |
| 20 | 25 | typedef void (*mtk_vcodec_ipi_handler) (void *data, |
| @@ -22,7 +27,7 @@ typedef void (*mtk_vcodec_ipi_handler) (void *data, · 1 unmodified line | ||
| 22 | 27 | |
| 23 | 28 | struct mtk_vcodec_fw *mtk_vcodec_fw_select(struct mtk_vcodec_dev *dev, |
| 24 | 29 | enum mtk_vcodec_fw_type type, |
| 25 | − enum rst_id rst_id); | |
| 30 | + enum mtk_vcodec_fw_use fw_use); | |
| 26 | 31 | void mtk_vcodec_fw_release(struct mtk_vcodec_fw *fw); |
| 27 | 32 | |
| 28 | 33 | int mtk_vcodec_fw_load_firmware(struct mtk_vcodec_fw *fw); |
| @@ -0,0 +1,52 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0 */ | |
| 2 | + | |
| 3 | +#ifndef _MTK_VCODEC_FW_PRIV_H_ | |
| 4 | +#define _MTK_VCODEC_FW_PRIV_H_ | |
| 5 | + | |
| 6 | +#include "mtk_vcodec_fw.h" | |
| 7 | + | |
| 8 | +struct mtk_vcodec_dev; | |
| 9 | + | |
| 10 | +struct mtk_vcodec_fw { | |
| 11 | + enum mtk_vcodec_fw_type type; | |
| 12 | + const struct mtk_vcodec_fw_ops *ops; | |
| 13 | + struct platform_device *pdev; | |
| 14 | + struct mtk_scp *scp; | |
| 15 | +}; | |
| 16 | + | |
| 17 | +struct mtk_vcodec_fw_ops { | |
| 18 | + int (*load_firmware)(struct mtk_vcodec_fw *fw); | |
| 19 | + unsigned int (*get_vdec_capa)(struct mtk_vcodec_fw *fw); | |
| 20 | + unsigned int (*get_venc_capa)(struct mtk_vcodec_fw *fw); | |
| 21 | + void *(*map_dm_addr)(struct mtk_vcodec_fw *fw, u32 dtcm_dmem_addr); | |
| 22 | + int (*ipi_register)(struct mtk_vcodec_fw *fw, int id, | |
| 23 | + mtk_vcodec_ipi_handler handler, const char *name, | |
| 24 | + void *priv); | |
| 25 | + int (*ipi_send)(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 26 | + unsigned int len, unsigned int wait); | |
| 27 | + void (*release)(struct mtk_vcodec_fw *fw); | |
| 28 | +}; | |
| 29 | + | |
| 30 | +#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_VPU) | |
| 31 | +struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev, | |
| 32 | + enum mtk_vcodec_fw_use fw_use); | |
| 33 | +#else | |
| 34 | +static inline struct mtk_vcodec_fw * | |
| 35 | +mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev, | |
| 36 | + enum mtk_vcodec_fw_use fw_use) | |
| 37 | +{ | |
| 38 | + return ERR_PTR(-ENODEV); | |
| 39 | +} | |
| 40 | +#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_VPU */ | |
| 41 | + | |
| 42 | +#if IS_ENABLED(CONFIG_VIDEO_MEDIATEK_VCODEC_SCP) | |
| 43 | +struct mtk_vcodec_fw *mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev); | |
| 44 | +#else | |
| 45 | +static inline struct mtk_vcodec_fw * | |
| 46 | +mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev) | |
| 47 | +{ | |
| 48 | + return ERR_PTR(-ENODEV); | |
| 49 | +} | |
| 50 | +#endif /* CONFIG_VIDEO_MEDIATEK_VCODEC_SCP */ | |
| 51 | + | |
| 52 | +#endif /* _MTK_VCODEC_FW_PRIV_H_ */ | |
| @@ -0,0 +1,73 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +#include "mtk_vcodec_fw_priv.h" | |
| 4 | +#include "mtk_vcodec_util.h" | |
| 5 | +#include "mtk_vcodec_drv.h" | |
| 6 | + | |
| 7 | +static int mtk_vcodec_scp_load_firmware(struct mtk_vcodec_fw *fw) | |
| 8 | +{ | |
| 9 | + return rproc_boot(scp_get_rproc(fw->scp)); | |
| 10 | +} | |
| 11 | + | |
| 12 | +static unsigned int mtk_vcodec_scp_get_vdec_capa(struct mtk_vcodec_fw *fw) | |
| 13 | +{ | |
| 14 | + return scp_get_vdec_hw_capa(fw->scp); | |
| 15 | +} | |
| 16 | + | |
| 17 | +static unsigned int mtk_vcodec_scp_get_venc_capa(struct mtk_vcodec_fw *fw) | |
| 18 | +{ | |
| 19 | + return scp_get_venc_hw_capa(fw->scp); | |
| 20 | +} | |
| 21 | + | |
| 22 | +static void *mtk_vcodec_vpu_scp_dm_addr(struct mtk_vcodec_fw *fw, | |
| 23 | + u32 dtcm_dmem_addr) | |
| 24 | +{ | |
| 25 | + return scp_mapping_dm_addr(fw->scp, dtcm_dmem_addr); | |
| 26 | +} | |
| 27 | + | |
| 28 | +static int mtk_vcodec_scp_set_ipi_register(struct mtk_vcodec_fw *fw, int id, | |
| 29 | + mtk_vcodec_ipi_handler handler, | |
| 30 | + const char *name, void *priv) | |
| 31 | +{ | |
| 32 | + return scp_ipi_register(fw->scp, id, handler, priv); | |
| 33 | +} | |
| 34 | + | |
| 35 | +static int mtk_vcodec_scp_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 36 | + unsigned int len, unsigned int wait) | |
| 37 | +{ | |
| 38 | + return scp_ipi_send(fw->scp, id, buf, len, wait); | |
| 39 | +} | |
| 40 | + | |
| 41 | +static void mtk_vcodec_scp_release(struct mtk_vcodec_fw *fw) | |
| 42 | +{ | |
| 43 | + scp_put(fw->scp); | |
| 44 | +} | |
| 45 | + | |
| 46 | +static const struct mtk_vcodec_fw_ops mtk_vcodec_rproc_msg = { | |
| 47 | + .load_firmware = mtk_vcodec_scp_load_firmware, | |
| 48 | + .get_vdec_capa = mtk_vcodec_scp_get_vdec_capa, | |
| 49 | + .get_venc_capa = mtk_vcodec_scp_get_venc_capa, | |
| 50 | + .map_dm_addr = mtk_vcodec_vpu_scp_dm_addr, | |
| 51 | + .ipi_register = mtk_vcodec_scp_set_ipi_register, | |
| 52 | + .ipi_send = mtk_vcodec_scp_ipi_send, | |
| 53 | + .release = mtk_vcodec_scp_release, | |
| 54 | +}; | |
| 55 | + | |
| 56 | +struct mtk_vcodec_fw *mtk_vcodec_fw_scp_init(struct mtk_vcodec_dev *dev) | |
| 57 | +{ | |
| 58 | + struct mtk_vcodec_fw *fw; | |
| 59 | + struct mtk_scp *scp; | |
| 60 | + | |
| 61 | + scp = scp_get(dev->plat_dev); | |
| 62 | + if (!scp) { | |
| 63 | + mtk_v4l2_err("could not get vdec scp handle"); | |
| 64 | + return ERR_PTR(-EPROBE_DEFER); | |
| 65 | + } | |
| 66 | + | |
| 67 | + fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL); | |
| 68 | + fw->type = SCP; | |
| 69 | + fw->ops = &mtk_vcodec_rproc_msg; | |
| 70 | + fw->scp = scp; | |
| 71 | + | |
| 72 | + return fw; | |
| 73 | +} | |
| @@ -0,0 +1,110 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +#include "mtk_vcodec_fw_priv.h" | |
| 4 | +#include "mtk_vcodec_util.h" | |
| 5 | +#include "mtk_vcodec_drv.h" | |
| 6 | + | |
| 7 | +static int mtk_vcodec_vpu_load_firmware(struct mtk_vcodec_fw *fw) | |
| 8 | +{ | |
| 9 | + return vpu_load_firmware(fw->pdev); | |
| 10 | +} | |
| 11 | + | |
| 12 | +static unsigned int mtk_vcodec_vpu_get_vdec_capa(struct mtk_vcodec_fw *fw) | |
| 13 | +{ | |
| 14 | + return vpu_get_vdec_hw_capa(fw->pdev); | |
| 15 | +} | |
| 16 | + | |
| 17 | +static unsigned int mtk_vcodec_vpu_get_venc_capa(struct mtk_vcodec_fw *fw) | |
| 18 | +{ | |
| 19 | + return vpu_get_venc_hw_capa(fw->pdev); | |
| 20 | +} | |
| 21 | + | |
| 22 | +static void *mtk_vcodec_vpu_map_dm_addr(struct mtk_vcodec_fw *fw, | |
| 23 | + u32 dtcm_dmem_addr) | |
| 24 | +{ | |
| 25 | + return vpu_mapping_dm_addr(fw->pdev, dtcm_dmem_addr); | |
| 26 | +} | |
| 27 | + | |
| 28 | +static int mtk_vcodec_vpu_set_ipi_register(struct mtk_vcodec_fw *fw, int id, | |
| 29 | + mtk_vcodec_ipi_handler handler, | |
| 30 | + const char *name, void *priv) | |
| 31 | +{ | |
| 32 | + /* | |
| 33 | + * The handler we receive takes a void * as its first argument. We | |
| 34 | + * cannot change this because it needs to be passed down to the rproc | |
| 35 | + * subsystem when SCP is used. VPU takes a const argument, which is | |
| 36 | + * more constrained, so the conversion below is safe. | |
| 37 | + */ | |
| 38 | + ipi_handler_t handler_const = (ipi_handler_t)handler; | |
| 39 | + | |
| 40 | + return vpu_ipi_register(fw->pdev, id, handler_const, name, priv); | |
| 41 | +} | |
| 42 | + | |
| 43 | +static int mtk_vcodec_vpu_ipi_send(struct mtk_vcodec_fw *fw, int id, void *buf, | |
| 44 | + unsigned int len, unsigned int wait) | |
| 45 | +{ | |
| 46 | + return vpu_ipi_send(fw->pdev, id, buf, len); | |
| 47 | +} | |
| 48 | + | |
| 49 | +static void mtk_vcodec_vpu_release(struct mtk_vcodec_fw *fw) | |
| 50 | +{ | |
| 51 | + put_device(&fw->pdev->dev); | |
| 52 | +} | |
| 53 | + | |
| 54 | +static void mtk_vcodec_vpu_reset_handler(void *priv) | |
| 55 | +{ | |
| 56 | + struct mtk_vcodec_dev *dev = priv; | |
| 57 | + struct mtk_vcodec_ctx *ctx; | |
| 58 | + | |
| 59 | + mtk_v4l2_err("Watchdog timeout!!"); | |
| 60 | + | |
| 61 | + mutex_lock(&dev->dev_mutex); | |
| 62 | + list_for_each_entry(ctx, &dev->ctx_list, list) { | |
| 63 | + ctx->state = MTK_STATE_ABORT; | |
| 64 | + mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT", | |
| 65 | + ctx->id); | |
| 66 | + } | |
| 67 | + mutex_unlock(&dev->dev_mutex); | |
| 68 | +} | |
| 69 | + | |
| 70 | +static const struct mtk_vcodec_fw_ops mtk_vcodec_vpu_msg = { | |
| 71 | + .load_firmware = mtk_vcodec_vpu_load_firmware, | |
| 72 | + .get_vdec_capa = mtk_vcodec_vpu_get_vdec_capa, | |
| 73 | + .get_venc_capa = mtk_vcodec_vpu_get_venc_capa, | |
| 74 | + .map_dm_addr = mtk_vcodec_vpu_map_dm_addr, | |
| 75 | + .ipi_register = mtk_vcodec_vpu_set_ipi_register, | |
| 76 | + .ipi_send = mtk_vcodec_vpu_ipi_send, | |
| 77 | + .release = mtk_vcodec_vpu_release, | |
| 78 | +}; | |
| 79 | + | |
| 80 | +struct mtk_vcodec_fw *mtk_vcodec_fw_vpu_init(struct mtk_vcodec_dev *dev, | |
| 81 | + enum mtk_vcodec_fw_use fw_use) | |
| 82 | +{ | |
| 83 | + struct platform_device *fw_pdev; | |
| 84 | + struct mtk_vcodec_fw *fw; | |
| 85 | + enum rst_id rst_id; | |
| 86 | + | |
| 87 | + switch (fw_use) { | |
| 88 | + case ENCODER: | |
| 89 | + rst_id = VPU_RST_ENC; | |
| 90 | + break; | |
| 91 | + case DECODER: | |
| 92 | + default: | |
| 93 | + rst_id = VPU_RST_DEC; | |
| 94 | + break; | |
| 95 | + } | |
| 96 | + | |
| 97 | + fw_pdev = vpu_get_plat_device(dev->plat_dev); | |
| 98 | + if (!fw_pdev) { | |
| 99 | + mtk_v4l2_err("firmware device is not ready"); | |
| 100 | + return ERR_PTR(-EINVAL); | |
| 101 | + } | |
| 102 | + vpu_wdt_reg_handler(fw_pdev, mtk_vcodec_vpu_reset_handler, dev, rst_id); | |
| 103 | + | |
| 104 | + fw = devm_kzalloc(&dev->plat_dev->dev, sizeof(*fw), GFP_KERNEL); | |
| 105 | + fw->type = VPU; | |
| 106 | + fw->ops = &mtk_vcodec_vpu_msg; | |
| 107 | + fw->pdev = fw_pdev; | |
| 108 | + | |
| 109 | + return fw; | |
| 110 | +} | |
| @@ -243,8 +243,19 @@ struct venc_controls { · 242 unmodified lines | ||
| 243 | 243 | |
| 244 | 244 | u32 header_mode; |
| 245 | 245 | |
| 246 | − u32 profile; | |
| 247 | − u32 level; | |
| 246 | + struct { | |
| 247 | + u32 h264; | |
| 248 | + u32 mpeg4; | |
| 249 | + u32 hevc; | |
| 250 | + u32 vp8; | |
| 251 | + u32 vp9; | |
| 252 | + } profile; | |
| 253 | + struct { | |
| 254 | + u32 h264; | |
| 255 | + u32 mpeg4; | |
| 256 | + u32 hevc; | |
| 257 | + u32 vp9; | |
| 258 | + } level; | |
| 248 | 259 | }; |
| 249 | 260 | |
| 250 | 261 | struct venus_buffer { |
| @@ -794,7 +794,7 @@ skip_pmdomains: · 793 unmodified lines | ||
| 794 | 794 | return 0; |
| 795 | 795 | |
| 796 | 796 | opp_dl_add_err: |
| 797 | − dev_pm_domain_detach(core->opp_pmdomain, true); | |
| 797 | + dev_pm_opp_detach_genpd(core->opp_table); | |
| 798 | 798 | opp_attach_err: |
| 799 | 799 | if (core->pd_dl_venus) { |
| 800 | 800 | device_link_del(core->pd_dl_venus); |
| @@ -832,7 +832,7 @@ skip_pmdomains: · 31 unmodified lines | ||
| 832 | 832 | if (core->opp_dl_venus) |
| 833 | 833 | device_link_del(core->opp_dl_venus); |
| 834 | 834 | |
| 835 | − dev_pm_domain_detach(core->opp_pmdomain, true); | |
| 835 | + dev_pm_opp_detach_genpd(core->opp_table); | |
| 836 | 836 | } |
| 837 | 837 | |
| 838 | 838 | static int core_get_v4(struct device *dev) |
| @@ -537,6 +537,7 @@ static int venc_set_properties(struct venus_inst *inst) · 536 unmodified lines | ||
| 537 | 537 | struct hfi_quantization quant; |
| 538 | 538 | struct hfi_quantization_range quant_range; |
| 539 | 539 | u32 ptype, rate_control, bitrate; |
| 540 | + u32 profile, level; | |
| 540 | 541 | int ret; |
| 541 | 542 | |
| 542 | 543 | ret = venus_helper_set_work_mode(inst, VIDC_WORK_MODE_2); |
| @@ -684,7 +685,35 @@ static int venc_set_properties(struct venus_inst *inst) · 141 unmodified lines | ||
| 684 | 685 | if (ret) |
| 685 | 686 | return ret; |
| 686 | 687 | |
| 687 | − ret = venus_helper_set_profile_level(inst, ctr->profile, ctr->level); | |
| 688 | + switch (inst->hfi_codec) { | |
| 689 | + case HFI_VIDEO_CODEC_H264: | |
| 690 | + profile = ctr->profile.h264; | |
| 691 | + level = ctr->level.h264; | |
| 692 | + break; | |
| 693 | + case HFI_VIDEO_CODEC_MPEG4: | |
| 694 | + profile = ctr->profile.mpeg4; | |
| 695 | + level = ctr->level.mpeg4; | |
| 696 | + break; | |
| 697 | + case HFI_VIDEO_CODEC_VP8: | |
| 698 | + profile = ctr->profile.vp8; | |
| 699 | + level = 0; | |
| 700 | + break; | |
| 701 | + case HFI_VIDEO_CODEC_VP9: | |
| 702 | + profile = ctr->profile.vp9; | |
| 703 | + level = ctr->level.vp9; | |
| 704 | + break; | |
| 705 | + case HFI_VIDEO_CODEC_HEVC: | |
| 706 | + profile = ctr->profile.hevc; | |
| 707 | + level = ctr->level.hevc; | |
| 708 | + break; | |
| 709 | + case HFI_VIDEO_CODEC_MPEG2: | |
| 710 | + default: | |
| 711 | + profile = 0; | |
| 712 | + level = 0; | |
| 713 | + break; | |
| 714 | + } | |
| 715 | + | |
| 716 | + ret = venus_helper_set_profile_level(inst, profile, level); | |
| 688 | 717 | if (ret) |
| 689 | 718 | return ret; |
| 690 | 719 | |
| @@ -103,15 +103,25 @@ static int venc_op_s_ctrl(struct v4l2_ctrl *ctrl) · 102 unmodified lines | ||
| 103 | 103 | ctr->h264_entropy_mode = ctrl->val; |
| 104 | 104 | break; |
| 105 | 105 | case V4L2_CID_MPEG_VIDEO_MPEG4_PROFILE: |
| 106 | + ctr->profile.mpeg4 = ctrl->val; | |
| 107 | + break; | |
| 106 | 108 | case V4L2_CID_MPEG_VIDEO_H264_PROFILE: |
| 109 | + ctr->profile.h264 = ctrl->val; | |
| 110 | + break; | |
| 107 | 111 | case V4L2_CID_MPEG_VIDEO_HEVC_PROFILE: |
| 112 | + ctr->profile.hevc = ctrl->val; | |
| 113 | + break; | |
| 108 | 114 | case V4L2_CID_MPEG_VIDEO_VP8_PROFILE: |
| 109 | − ctr->profile = ctrl->val; | |
| 115 | + ctr->profile.vp8 = ctrl->val; | |
| 110 | 116 | break; |
| 111 | 117 | case V4L2_CID_MPEG_VIDEO_MPEG4_LEVEL: |
| 118 | + ctr->level.mpeg4 = ctrl->val; | |
| 119 | + break; | |
| 112 | 120 | case V4L2_CID_MPEG_VIDEO_H264_LEVEL: |
| 121 | + ctr->level.h264 = ctrl->val; | |
| 122 | + break; | |
| 113 | 123 | case V4L2_CID_MPEG_VIDEO_HEVC_LEVEL: |
| 114 | − ctr->level = ctrl->val; | |
| 124 | + ctr->level.hevc = ctrl->val; | |
| 115 | 125 | break; |
| 116 | 126 | case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP: |
| 117 | 127 | ctr->h264_i_qp = ctrl->val; |
| @@ -446,7 +446,7 @@ static void cedrus_set_params(struct cedrus_ctx *ctx, · 445 unmodified lines | ||
| 446 | 446 | reg |= (pps->second_chroma_qp_index_offset & 0x3f) << 16; |
| 447 | 447 | reg |= (pps->chroma_qp_index_offset & 0x3f) << 8; |
| 448 | 448 | reg |= (pps->pic_init_qp_minus26 + 26 + slice->slice_qp_delta) & 0x3f; |
| 449 | − if (pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT) | |
| 449 | + if (!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT)) | |
| 450 | 450 | reg |= VE_H264_SHS_QP_SCALING_MATRIX_DEFAULT; |
| 451 | 451 | cedrus_write(dev, VE_H264_SHS_QP, reg); |
| 452 | 452 | |