History

Merge branches 'pm-cpufreq', 'pm-cpuidle' and 'acpi-cppc'

* pm-cpufreq: cpufreq: dt: Drop stale comment cpufreq: intel_pstate: Documenation for structures cpufreq: intel_pstate: fix inconsistency in setting policy limits intel_pstate: Avoid extra invocation of intel_pstate_sample() intel_pstate: Do not set utilization update hook too early * pm-cpuidle: intel_idle: Add KBL support intel_idle: Add SKX support intel_idle: Clean up all registered devices on exit. intel_idle: Propagate hot plug errors. intel_idle: Don't overreact to a cpuidle registration failure. intel_idle: Setup the timer broadcast only on successful driver load. intel_idle: Avoid a double free of the per-CPU data. intel_idle: Fix dangling registration on error path. intel_idle: Fix deallocation order on the driver exit path. intel_idle: Remove redundant initialization calls. intel_idle: Fix a helper function's return value. intel_idle: remove useless return from void function. * acpi-cppc: mailbox: pcc: Don't access an unmapped memory address space

Rafael J. Wysocki committed 10 years ago

Commit fa81e664 parents 9735a22 b318556 3ce093d 169b3834 files · +258 −52Browse files

Unified · Split

4 files
  1. drivers/cpufreq/cpufreq-dt.c +0 −3
  2. drivers/cpufreq/intel_pstate.c +189 −17
  3. drivers/idle/intel_idle.c +67 −30
  4. drivers/mailbox/pcc.c +2 −2
drivers/cpufreq/cpufreq-dt.c+0−3
@@ -4,9 +4,6 @@ · 3 unmodified lines
4 * Copyright (C) 2014 Linaro.4 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *6 *
7 * The OPP code in function set_target() is reused from
8 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify7 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as8 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.9 * published by the Free Software Foundation.
drivers/cpufreq/intel_pstate.c+189−17
@@ -64,6 +64,25 @@ static inline int ceiling_fp(int32_t x) · 63 unmodified lines
64 return ret;64 return ret;
65}65}
66 66
67/**
68 * struct sample - Store performance sample
69 * @core_pct_busy: Ratio of APERF/MPERF in percent, which is actual
70 * performance during last sample period
71 * @busy_scaled: Scaled busy value which is used to calculate next
72 * P state. This can be different than core_pct_busy
73 * to account for cpu idle period
74 * @aperf: Difference of actual performance frequency clock count
75 * read from APERF MSR between last and current sample
76 * @mperf: Difference of maximum performance frequency clock count
77 * read from MPERF MSR between last and current sample
78 * @tsc: Difference of time stamp counter between last and
79 * current sample
80 * @freq: Effective frequency calculated from APERF/MPERF
81 * @time: Current time from scheduler
82 *
83 * This structure is used in the cpudata structure to store performance sample
84 * data for choosing next P State.
85 */
67struct sample {86struct sample {
68 int32_t core_pct_busy;87 int32_t core_pct_busy;
69 int32_t busy_scaled;88 int32_t busy_scaled;
@@ -74,6 +93,20 @@ struct sample { · 4 unmodified lines
74 u64 time;93 u64 time;
75};94};
76 95
96/**
97 * struct pstate_data - Store P state data
98 * @current_pstate: Current requested P state
99 * @min_pstate: Min P state possible for this platform
100 * @max_pstate: Max P state possible for this platform
101 * @max_pstate_physical:This is physical Max P state for a processor
102 * This can be higher than the max_pstate which can
103 * be limited by platform thermal design power limits
104 * @scaling: Scaling factor to convert frequency to cpufreq
105 * frequency units
106 * @turbo_pstate: Max Turbo P state possible for this platform
107 *
108 * Stores the per cpu model P state limits and current P state.
109 */
77struct pstate_data {110struct pstate_data {
78 int current_pstate;111 int current_pstate;
79 int min_pstate;112 int min_pstate;
@@ -83,6 +116,19 @@ struct pstate_data { · 3 unmodified lines
83 int turbo_pstate;116 int turbo_pstate;
84};117};
85 118
119/**
120 * struct vid_data - Stores voltage information data
121 * @min: VID data for this platform corresponding to
122 * the lowest P state
123 * @max: VID data corresponding to the highest P State.
124 * @turbo: VID data for turbo P state
125 * @ratio: Ratio of (vid max - vid min) /
126 * (max P state - Min P State)
127 *
128 * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
129 * This data is used in Atom platforms, where in addition to target P state,
130 * the voltage data needs to be specified to select next P State.
131 */
86struct vid_data {132struct vid_data {
87 int min;133 int min;
88 int max;134 int max;
@@ -90,6 +136,18 @@ struct vid_data { · 1 unmodified line
90 int32_t ratio;136 int32_t ratio;
91};137};
92 138
139/**
140 * struct _pid - Stores PID data
141 * @setpoint: Target set point for busyness or performance
142 * @integral: Storage for accumulated error values
143 * @p_gain: PID proportional gain
144 * @i_gain: PID integral gain
145 * @d_gain: PID derivative gain
146 * @deadband: PID deadband
147 * @last_err: Last error storage for integral part of PID calculation
148 *
149 * Stores PID coefficients and last error for PID controller.
150 */
93struct _pid {151struct _pid {
94 int setpoint;152 int setpoint;
95 int32_t integral;153 int32_t integral;
@@ -100,6 +158,23 @@ struct _pid { · 4 unmodified lines
100 int32_t last_err;158 int32_t last_err;
101};159};
102 160
161/**
162 * struct cpudata - Per CPU instance data storage
163 * @cpu: CPU number for this instance data
164 * @update_util: CPUFreq utility callback information
165 * @pstate: Stores P state limits for this CPU
166 * @vid: Stores VID limits for this CPU
167 * @pid: Stores PID parameters for this CPU
168 * @last_sample_time: Last Sample time
169 * @prev_aperf: Last APERF value read from APERF MSR
170 * @prev_mperf: Last MPERF value read from MPERF MSR
171 * @prev_tsc: Last timestamp counter (TSC) value
172 * @prev_cummulative_iowait: IO Wait time difference from last and
173 * current sample
174 * @sample: Storage for storing last Sample data
175 *
176 * This structure stores per CPU instance data for all CPUs.
177 */
103struct cpudata {178struct cpudata {
104 int cpu;179 int cpu;
105 180
@@ -118,6 +193,19 @@ struct cpudata { · 12 unmodified lines
118};193};
119 194
120static struct cpudata **all_cpu_data;195static struct cpudata **all_cpu_data;
196
197/**
198 * struct pid_adjust_policy - Stores static PID configuration data
199 * @sample_rate_ms: PID calculation sample rate in ms
200 * @sample_rate_ns: Sample rate calculation in ns
201 * @deadband: PID deadband
202 * @setpoint: PID Setpoint
203 * @p_gain_pct: PID proportional gain
204 * @i_gain_pct: PID integral gain
205 * @d_gain_pct: PID derivative gain
206 *
207 * Stores per CPU model static PID configuration data.
208 */
121struct pstate_adjust_policy {209struct pstate_adjust_policy {
122 int sample_rate_ms;210 int sample_rate_ms;
123 s64 sample_rate_ns;211 s64 sample_rate_ns;
@@ -128,6 +216,20 @@ struct pstate_adjust_policy { · 4 unmodified lines
128 int i_gain_pct;216 int i_gain_pct;
129};217};
130 218
219/**
220 * struct pstate_funcs - Per CPU model specific callbacks
221 * @get_max: Callback to get maximum non turbo effective P state
222 * @get_max_physical: Callback to get maximum non turbo physical P state
223 * @get_min: Callback to get minimum P state
224 * @get_turbo: Callback to get turbo P state
225 * @get_scaling: Callback to get frequency scaling factor
226 * @get_val: Callback to convert P state to actual MSR write value
227 * @get_vid: Callback to get VID data for Atom platforms
228 * @get_target_pstate: Callback to a function to calculate next P state to use
229 *
230 * Core and Atom CPU models have different way to get P State limits. This
231 * structure is used to store those callbacks.
232 */
131struct pstate_funcs {233struct pstate_funcs {
132 int (*get_max)(void);234 int (*get_max)(void);
133 int (*get_max_physical)(void);235 int (*get_max_physical)(void);
@@ -139,6 +241,11 @@ struct pstate_funcs { · 5 unmodified lines
139 int32_t (*get_target_pstate)(struct cpudata *);241 int32_t (*get_target_pstate)(struct cpudata *);
140};242};
141 243
244/**
245 * struct cpu_defaults- Per CPU model default config data
246 * @pid_policy: PID config data
247 * @funcs: Callback function data
248 */
142struct cpu_defaults {249struct cpu_defaults {
143 struct pstate_adjust_policy pid_policy;250 struct pstate_adjust_policy pid_policy;
144 struct pstate_funcs funcs;251 struct pstate_funcs funcs;
@@ -151,6 +258,34 @@ static struct pstate_adjust_policy pid_params; · 6 unmodified lines
151static struct pstate_funcs pstate_funcs;258static struct pstate_funcs pstate_funcs;
152static int hwp_active;259static int hwp_active;
153 260
261
262/**
263 * struct perf_limits - Store user and policy limits
264 * @no_turbo: User requested turbo state from intel_pstate sysfs
265 * @turbo_disabled: Platform turbo status either from msr
266 * MSR_IA32_MISC_ENABLE or when maximum available pstate
267 * matches the maximum turbo pstate
268 * @max_perf_pct: Effective maximum performance limit in percentage, this
269 * is minimum of either limits enforced by cpufreq policy
270 * or limits from user set limits via intel_pstate sysfs
271 * @min_perf_pct: Effective minimum performance limit in percentage, this
272 * is maximum of either limits enforced by cpufreq policy
273 * or limits from user set limits via intel_pstate sysfs
274 * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
275 * This value is used to limit max pstate
276 * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
277 * This value is used to limit min pstate
278 * @max_policy_pct: The maximum performance in percentage enforced by
279 * cpufreq setpolicy interface
280 * @max_sysfs_pct: The maximum performance in percentage enforced by
281 * intel pstate sysfs interface
282 * @min_policy_pct: The minimum performance in percentage enforced by
283 * cpufreq setpolicy interface
284 * @min_sysfs_pct: The minimum performance in percentage enforced by
285 * intel pstate sysfs interface
286 *
287 * Storage for user and policy defined limits.
288 */
154struct perf_limits {289struct perf_limits {
155 int no_turbo;290 int no_turbo;
156 int turbo_disabled;291 int turbo_disabled;
@@ -910,7 +1045,14 @@ static inline bool intel_pstate_sample(struct cpudata *cpu, u64 time) · 753 unmodified lines
910 cpu->prev_aperf = aperf;1045 cpu->prev_aperf = aperf;
911 cpu->prev_mperf = mperf;1046 cpu->prev_mperf = mperf;
912 cpu->prev_tsc = tsc;1047 cpu->prev_tsc = tsc;
913 return true;1048 /*
1049 * First time this function is invoked in a given cycle, all of the
1050 * previous sample data fields are equal to zero or stale and they must
1051 * be populated with meaningful numbers for things to work, so assume
1052 * that sample.time will always be reset before setting the utilization
1053 * update hook and make the caller skip the sample then.
1054 */
1055 return !!cpu->last_sample_time;
914}1056}
915 1057
916static inline int32_t get_avg_frequency(struct cpudata *cpu)1058static inline int32_t get_avg_frequency(struct cpudata *cpu)
@@ -984,8 +1126,7 @@ static inline int32_t get_target_pstate_use_performance(struct cpudata *cpu) · 67 unmodified lines
984 * enough period of time to adjust our busyness.1126 * enough period of time to adjust our busyness.
985 */1127 */
986 duration_ns = cpu->sample.time - cpu->last_sample_time;1128 duration_ns = cpu->sample.time - cpu->last_sample_time;
987 if ((s64)duration_ns > pid_params.sample_rate_ns * 31129 if ((s64)duration_ns > pid_params.sample_rate_ns * 3) {
988 && cpu->last_sample_time > 0) {
989 sample_ratio = div_fp(int_tofp(pid_params.sample_rate_ns),1130 sample_ratio = div_fp(int_tofp(pid_params.sample_rate_ns),
990 int_tofp(duration_ns));1131 int_tofp(duration_ns));
991 core_busy = mul_fp(core_busy, sample_ratio);1132 core_busy = mul_fp(core_busy, sample_ratio);
@@ -1100,10 +1241,8 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 108 unmodified lines
1100 intel_pstate_get_cpu_pstates(cpu);1241 intel_pstate_get_cpu_pstates(cpu);
1101 1242
1102 intel_pstate_busy_pid_reset(cpu);1243 intel_pstate_busy_pid_reset(cpu);
1103 intel_pstate_sample(cpu, 0);
1104 1244
1105 cpu->update_util.func = intel_pstate_update_util;1245 cpu->update_util.func = intel_pstate_update_util;
1106 cpufreq_set_update_util_data(cpunum, &cpu->update_util);
1107 1246
1108 pr_debug("intel_pstate: controlling: cpu %d\n", cpunum);1247 pr_debug("intel_pstate: controlling: cpu %d\n", cpunum);
1109 1248
@@ -1122,22 +1261,54 @@ static unsigned int intel_pstate_get(unsigned int cpu_num) · 12 unmodified lines
1122 return get_avg_frequency(cpu);1261 return get_avg_frequency(cpu);
1123}1262}
1124 1263
1264static void intel_pstate_set_update_util_hook(unsigned int cpu_num)
1265{
1266 struct cpudata *cpu = all_cpu_data[cpu_num];
1267
1268 /* Prevent intel_pstate_update_util() from using stale data. */
1269 cpu->sample.time = 0;
1270 cpufreq_set_update_util_data(cpu_num, &cpu->update_util);
1271}
1272
1273static void intel_pstate_clear_update_util_hook(unsigned int cpu)
1274{
1275 cpufreq_set_update_util_data(cpu, NULL);
1276 synchronize_sched();
1277}
1278
1279static void intel_pstate_set_performance_limits(struct perf_limits *limits)
1280{
1281 limits->no_turbo = 0;
1282 limits->turbo_disabled = 0;
1283 limits->max_perf_pct = 100;
1284 limits->max_perf = int_tofp(1);
1285 limits->min_perf_pct = 100;
1286 limits->min_perf = int_tofp(1);
1287 limits->max_policy_pct = 100;
1288 limits->max_sysfs_pct = 100;
1289 limits->min_policy_pct = 0;
1290 limits->min_sysfs_pct = 0;
1291}
1292
1125static int intel_pstate_set_policy(struct cpufreq_policy *policy)1293static int intel_pstate_set_policy(struct cpufreq_policy *policy)
1126{1294{
1127 if (!policy->cpuinfo.max_freq)1295 if (!policy->cpuinfo.max_freq)
1128 return -ENODEV;1296 return -ENODEV;
1129 1297
1130 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE &&1298 intel_pstate_clear_update_util_hook(policy->cpu);
1131 policy->max >= policy->cpuinfo.max_freq) {1299
1132 pr_debug("intel_pstate: set performance\n");1300 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
1133 limits = &performance_limits;1301 limits = &performance_limits;
1134 if (hwp_active)1302 if (policy->max >= policy->cpuinfo.max_freq) {
1135 intel_pstate_hwp_set(policy->cpus);1303 pr_debug("intel_pstate: set performance\n");
1136 return 0;1304 intel_pstate_set_performance_limits(limits);
1305 goto out;
1306 }
1307 } else {
1308 pr_debug("intel_pstate: set powersave\n");
1309 limits = &powersave_limits;
1137 }1310 }
1138 1311
1139 pr_debug("intel_pstate: set powersave\n");
1140 limits = &powersave_limits;
1141 limits->min_policy_pct = (policy->min * 100) / policy->cpuinfo.max_freq;1312 limits->min_policy_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
1142 limits->min_policy_pct = clamp_t(int, limits->min_policy_pct, 0 , 100);1313 limits->min_policy_pct = clamp_t(int, limits->min_policy_pct, 0 , 100);
1143 limits->max_policy_pct = DIV_ROUND_UP(policy->max * 100,1314 limits->max_policy_pct = DIV_ROUND_UP(policy->max * 100,
@@ -1163,6 +1334,9 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) · 19 unmodified lines
1163 limits->max_perf = div_fp(int_tofp(limits->max_perf_pct),1334 limits->max_perf = div_fp(int_tofp(limits->max_perf_pct),
1164 int_tofp(100));1335 int_tofp(100));
1165 1336
1337 out:
1338 intel_pstate_set_update_util_hook(policy->cpu);
1339
1166 if (hwp_active)1340 if (hwp_active)
1167 intel_pstate_hwp_set(policy->cpus);1341 intel_pstate_hwp_set(policy->cpus);
1168 1342
@@ -1187,8 +1361,7 @@ static void intel_pstate_stop_cpu(struct cpufreq_policy *policy) · 18 unmodified lines
1187 1361
1188 pr_debug("intel_pstate: CPU %d exiting\n", cpu_num);1362 pr_debug("intel_pstate: CPU %d exiting\n", cpu_num);
1189 1363
1190 cpufreq_set_update_util_data(cpu_num, NULL);1364 intel_pstate_clear_update_util_hook(cpu_num);
1191 synchronize_sched();
1192 1365
1193 if (hwp_active)1366 if (hwp_active)
1194 return;1367 return;
@@ -1455,8 +1628,7 @@ out: · 260 unmodified lines
1455 get_online_cpus();1628 get_online_cpus();
1456 for_each_online_cpu(cpu) {1629 for_each_online_cpu(cpu) {
1457 if (all_cpu_data[cpu]) {1630 if (all_cpu_data[cpu]) {
1458 cpufreq_set_update_util_data(cpu, NULL);1631 intel_pstate_clear_update_util_hook(cpu);
1459 synchronize_sched();
1460 kfree(all_cpu_data[cpu]);1632 kfree(all_cpu_data[cpu]);
1461 }1633 }
1462 }1634 }
drivers/idle/intel_idle.c+67−30
@@ -660,6 +660,35 @@ static struct cpuidle_state skl_cstates[] = { · 659 unmodified lines
660 .enter = NULL }660 .enter = NULL }
661};661};
662 662
663static struct cpuidle_state skx_cstates[] = {
664 {
665 .name = "C1-SKX",
666 .desc = "MWAIT 0x00",
667 .flags = MWAIT2flg(0x00),
668 .exit_latency = 2,
669 .target_residency = 2,
670 .enter = &intel_idle,
671 .enter_freeze = intel_idle_freeze, },
672 {
673 .name = "C1E-SKX",
674 .desc = "MWAIT 0x01",
675 .flags = MWAIT2flg(0x01),
676 .exit_latency = 10,
677 .target_residency = 20,
678 .enter = &intel_idle,
679 .enter_freeze = intel_idle_freeze, },
680 {
681 .name = "C6-SKX",
682 .desc = "MWAIT 0x20",
683 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TLB_FLUSHED,
684 .exit_latency = 133,
685 .target_residency = 600,
686 .enter = &intel_idle,
687 .enter_freeze = intel_idle_freeze, },
688 {
689 .enter = NULL }
690};
691
663static struct cpuidle_state atom_cstates[] = {692static struct cpuidle_state atom_cstates[] = {
664 {693 {
665 .name = "C1E-ATM",694 .name = "C1E-ATM",
@@ -818,8 +847,11 @@ static int cpu_hotplug_notify(struct notifier_block *n, · 152 unmodified lines
818 * driver in this case847 * driver in this case
819 */848 */
820 dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);849 dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
821 if (!dev->registered)850 if (dev->registered)
822 intel_idle_cpu_init(hotcpu);851 break;
852
853 if (intel_idle_cpu_init(hotcpu))
854 return NOTIFY_BAD;
823 855
824 break;856 break;
825 }857 }
@@ -904,6 +936,10 @@ static const struct idle_cpu idle_cpu_skl = { · 78 unmodified lines
904 .disable_promotion_to_c1e = true,936 .disable_promotion_to_c1e = true,
905};937};
906 938
939static const struct idle_cpu idle_cpu_skx = {
940 .state_table = skx_cstates,
941 .disable_promotion_to_c1e = true,
942};
907 943
908static const struct idle_cpu idle_cpu_avn = {944static const struct idle_cpu idle_cpu_avn = {
909 .state_table = avn_cstates,945 .state_table = avn_cstates,
@@ -945,6 +981,9 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = { · 35 unmodified lines
945 ICPU(0x56, idle_cpu_bdw),981 ICPU(0x56, idle_cpu_bdw),
946 ICPU(0x4e, idle_cpu_skl),982 ICPU(0x4e, idle_cpu_skl),
947 ICPU(0x5e, idle_cpu_skl),983 ICPU(0x5e, idle_cpu_skl),
984 ICPU(0x8e, idle_cpu_skl),
985 ICPU(0x9e, idle_cpu_skl),
986 ICPU(0x55, idle_cpu_skx),
948 ICPU(0x57, idle_cpu_knl),987 ICPU(0x57, idle_cpu_knl),
949 {}988 {}
950};989};
@@ -987,22 +1026,15 @@ static int __init intel_idle_probe(void) · 36 unmodified lines
987 icpu = (const struct idle_cpu *)id->driver_data;1026 icpu = (const struct idle_cpu *)id->driver_data;
988 cpuidle_state_table = icpu->state_table;1027 cpuidle_state_table = icpu->state_table;
989 1028
990 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
991 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
992 else
993 on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
994
995 pr_debug(PREFIX "v" INTEL_IDLE_VERSION1029 pr_debug(PREFIX "v" INTEL_IDLE_VERSION
996 " model 0x%X\n", boot_cpu_data.x86_model);1030 " model 0x%X\n", boot_cpu_data.x86_model);
997 1031
998 pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
999 lapic_timer_reliable_states);
1000 return 0;1032 return 0;
1001}1033}
1002 1034
1003/*1035/*
1004 * intel_idle_cpuidle_devices_uninit()1036 * intel_idle_cpuidle_devices_uninit()
1005 * unregister, free cpuidle_devices1037 * Unregisters the cpuidle devices.
1006 */1038 */
1007static void intel_idle_cpuidle_devices_uninit(void)1039static void intel_idle_cpuidle_devices_uninit(void)
1008{1040{
@@ -1013,9 +1045,6 @@ static void intel_idle_cpuidle_devices_uninit(void) · 4 unmodified lines
1013 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);1045 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
1014 cpuidle_unregister_device(dev);1046 cpuidle_unregister_device(dev);
1015 }1047 }
1016
1017 free_percpu(intel_idle_cpuidle_devices);
1018 return;
1019}1048}
1020 1049
1021/*1050/*
@@ -1111,7 +1140,7 @@ static void intel_idle_state_table_update(void) · 89 unmodified lines
1111 * intel_idle_cpuidle_driver_init()1140 * intel_idle_cpuidle_driver_init()
1112 * allocate, initialize cpuidle_states1141 * allocate, initialize cpuidle_states
1113 */1142 */
1114static int __init intel_idle_cpuidle_driver_init(void)1143static void __init intel_idle_cpuidle_driver_init(void)
1115{1144{
1116 int cstate;1145 int cstate;
1117 struct cpuidle_driver *drv = &intel_idle_driver;1146 struct cpuidle_driver *drv = &intel_idle_driver;
@@ -1163,18 +1192,10 @@ static int __init intel_idle_cpuidle_driver_init(void) · 45 unmodified lines
1163 drv->state_count += 1;1192 drv->state_count += 1;
1164 }1193 }
1165 1194
1166 if (icpu->auto_demotion_disable_flags)
1167 on_each_cpu(auto_demotion_disable, NULL, 1);
1168
1169 if (icpu->byt_auto_demotion_disable_flag) {1195 if (icpu->byt_auto_demotion_disable_flag) {
1170 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);1196 wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0);
1171 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);1197 wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0);
1172 }1198 }
1173
1174 if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
1175 on_each_cpu(c1e_promotion_disable, NULL, 1);
1176
1177 return 0;
1178}1199}
1179 1200
1180 1201
@@ -1193,7 +1214,6 @@ static int intel_idle_cpu_init(int cpu) · 12 unmodified lines
1193 1214
1194 if (cpuidle_register_device(dev)) {1215 if (cpuidle_register_device(dev)) {
1195 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);1216 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
1196 intel_idle_cpuidle_devices_uninit();
1197 return -EIO;1217 return -EIO;
1198 }1218 }
1199 1219
@@ -1218,40 +1238,51 @@ static int __init intel_idle_init(void) · 18 unmodified lines
1218 if (retval)1238 if (retval)
1219 return retval;1239 return retval;
1220 1240
1241 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1242 if (intel_idle_cpuidle_devices == NULL)
1243 return -ENOMEM;
1244
1221 intel_idle_cpuidle_driver_init();1245 intel_idle_cpuidle_driver_init();
1222 retval = cpuidle_register_driver(&intel_idle_driver);1246 retval = cpuidle_register_driver(&intel_idle_driver);
1223 if (retval) {1247 if (retval) {
1224 struct cpuidle_driver *drv = cpuidle_get_driver();1248 struct cpuidle_driver *drv = cpuidle_get_driver();
1225 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",1249 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
1226 drv ? drv->name : "none");1250 drv ? drv->name : "none");
1251 free_percpu(intel_idle_cpuidle_devices);
1227 return retval;1252 return retval;
1228 }1253 }
1229 1254
1230 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
1231 if (intel_idle_cpuidle_devices == NULL)
1232 return -ENOMEM;
1233
1234 cpu_notifier_register_begin();1255 cpu_notifier_register_begin();
1235 1256
1236 for_each_online_cpu(i) {1257 for_each_online_cpu(i) {
1237 retval = intel_idle_cpu_init(i);1258 retval = intel_idle_cpu_init(i);
1238 if (retval) {1259 if (retval) {
1260 intel_idle_cpuidle_devices_uninit();
1239 cpu_notifier_register_done();1261 cpu_notifier_register_done();
1240 cpuidle_unregister_driver(&intel_idle_driver);1262 cpuidle_unregister_driver(&intel_idle_driver);
1263 free_percpu(intel_idle_cpuidle_devices);
1241 return retval;1264 return retval;
1242 }1265 }
1243 }1266 }
1244 __register_cpu_notifier(&cpu_hotplug_notifier);1267 __register_cpu_notifier(&cpu_hotplug_notifier);
1245 1268
1269 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
1270 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
1271 else
1272 on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
1273
1246 cpu_notifier_register_done();1274 cpu_notifier_register_done();
1247 1275
1276 pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
1277 lapic_timer_reliable_states);
1278
1248 return 0;1279 return 0;
1249}1280}
1250 1281
1251static void __exit intel_idle_exit(void)1282static void __exit intel_idle_exit(void)
1252{1283{
1253 intel_idle_cpuidle_devices_uninit();1284 struct cpuidle_device *dev;
1254 cpuidle_unregister_driver(&intel_idle_driver);1285 int i;
1255 1286
1256 cpu_notifier_register_begin();1287 cpu_notifier_register_begin();
1257 1288
@@ -1259,9 +1290,15 @@ static void __exit intel_idle_exit(void) · 1 unmodified line
1259 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);1290 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
1260 __unregister_cpu_notifier(&cpu_hotplug_notifier);1291 __unregister_cpu_notifier(&cpu_hotplug_notifier);
1261 1292
1293 for_each_possible_cpu(i) {
1294 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
1295 cpuidle_unregister_device(dev);
1296 }
1297
1262 cpu_notifier_register_done();1298 cpu_notifier_register_done();
1263 1299
1264 return;1300 cpuidle_unregister_driver(&intel_idle_driver);
1301 free_percpu(intel_idle_cpuidle_devices);
1265}1302}
1266 1303
1267module_init(intel_idle_init);1304module_init(intel_idle_init);
drivers/mailbox/pcc.c+2−2
@@ -361,8 +361,6 @@ static int __init acpi_pcc_probe(void) · 360 unmodified lines
361 struct acpi_generic_address *db_reg;361 struct acpi_generic_address *db_reg;
362 struct acpi_pcct_hw_reduced *pcct_ss;362 struct acpi_pcct_hw_reduced *pcct_ss;
363 pcc_mbox_channels[i].con_priv = pcct_entry;363 pcc_mbox_channels[i].con_priv = pcct_entry;
364 pcct_entry = (struct acpi_subtable_header *)
365 ((unsigned long) pcct_entry + pcct_entry->length);
366 364
367 /* If doorbell is in system memory cache the virt address */365 /* If doorbell is in system memory cache the virt address */
368 pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;366 pcct_ss = (struct acpi_pcct_hw_reduced *)pcct_entry;
@@ -370,6 +368,8 @@ static int __init acpi_pcc_probe(void) · 1 unmodified line
370 if (db_reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)368 if (db_reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY)
371 pcc_doorbell_vaddr[i] = acpi_os_ioremap(db_reg->address,369 pcc_doorbell_vaddr[i] = acpi_os_ioremap(db_reg->address,
372 db_reg->bit_width/8);370 db_reg->bit_width/8);
371 pcct_entry = (struct acpi_subtable_header *)
372 ((unsigned long) pcct_entry + pcct_entry->length);
373 }373 }
374 374
375 pcc_mbox_ctrl.num_chans = count;375 pcc_mbox_ctrl.num_chans = count;