History

Merge tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

AT91 SoC for 5.2 - PM changes for SAM9X60 * tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: do not disable/enable PLLA for ULP modes ARM: at91: pm: disable RC oscillator in ULP0 ARM: at91: pm: add ULP1 support for SAM9X60 ARM: at91: pm: add support for per SoC wakeup source configuration ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs ARM: at91: pm: initial PM support for SAM9X60 dt-bindings: arm: atmel: add binding for SAM9X60 SoC ARM: at91: pm: introduce at91_soc_pm structure

Olof Johansson committed 7 years ago

Commit faff3fc2 parents e40b069 2725d706 files · +232 −94Browse files

Unified · Split

6 files
  1. Documentation/devicetree/bindings/arm/atmel-at91.txt +1 −0
  2. arch/arm/mach-at91/at91sam9.c +18 −0
  3. arch/arm/mach-at91/generic.h +2 −0
  4. arch/arm/mach-at91/pm.c +133 −60
  5. arch/arm/mach-at91/pm_suspend.S +77 −34
  6. include/linux/clk/at91_pmc.h +1 −0
Documentation/devicetree/bindings/arm/atmel-at91.txt+1−0
@@ -25,6 +25,7 @@ compatible: must be one of: · 24 unmodified lines
2525 o "atmel,at91sam9n12"
2626 o "atmel,at91sam9rl"
2727 o "atmel,at91sam9xe"
28+ o "microchip,sam9x60"
2829 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
2930 SoC family:
3031 o "atmel,sama5d2" shall be extended with the specific SoC compatible:
arch/arm/mach-at91/at91sam9.c+18−0
@@ -32,3 +32,21 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") · 31 unmodified lines
3232 .init_machine = at91sam9_init,
3333 .dt_compat = at91_dt_board_compat,
3434 MACHINE_END
35+
36+static void __init sam9x60_init(void)
37+{
38+ of_platform_default_populate(NULL, NULL, NULL);
39+
40+ sam9x60_pm_init();
41+}
42+
43+static const char *const sam9x60_dt_board_compat[] __initconst = {
44+ "microchip,sam9x60",
45+ NULL
46+};
47+
48+DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60")
49+ /* Maintainer: Microchip */
50+ .init_machine = sam9x60_init,
51+ .dt_compat = sam9x60_dt_board_compat,
52+MACHINE_END
arch/arm/mach-at91/generic.h+2−0
@@ -14,11 +14,13 @@ · 13 unmodified lines
1414 #ifdef CONFIG_PM
1515 extern void __init at91rm9200_pm_init(void);
1616 extern void __init at91sam9_pm_init(void);
17+extern void __init sam9x60_pm_init(void);
1718 extern void __init sama5_pm_init(void);
1819 extern void __init sama5d2_pm_init(void);
1920 #else
2021 static inline void __init at91rm9200_pm_init(void) { }
2122 static inline void __init at91sam9_pm_init(void) { }
23+static inline void __init sam9x60_pm_init(void) { }
2224 static inline void __init sama5_pm_init(void) { }
2325 static inline void __init sama5d2_pm_init(void) { }
2426 #endif
arch/arm/mach-at91/pm.c+133−60
@@ -39,6 +39,20 @@ extern void at91_pinctrl_gpio_suspend(void); · 38 unmodified lines
3939 extern void at91_pinctrl_gpio_resume(void);
4040 #endif
4141
42+struct at91_soc_pm {
43+ int (*config_shdwc_ws)(void __iomem *shdwc, u32 *mode, u32 *polarity);
44+ int (*config_pmc_ws)(void __iomem *pmc, u32 mode, u32 polarity);
45+ const struct of_device_id *ws_ids;
46+ struct at91_pm_data data;
47+};
48+
49+static struct at91_soc_pm soc_pm = {
50+ .data = {
51+ .standby_mode = AT91_PM_STANDBY,
52+ .suspend_mode = AT91_PM_ULP0,
53+ },
54+};
55+
4256 static const match_table_t pm_modes __initconst = {
4357 { AT91_PM_STANDBY, "standby" },
4458 { AT91_PM_ULP0, "ulp0" },
@@ -47,16 +61,11 @@ static const match_table_t pm_modes __initconst = { · 2 unmodified lines
4761 { -1, NULL },
4862 };
4963
50−static struct at91_pm_data pm_data = {
51− .standby_mode = AT91_PM_STANDBY,
52− .suspend_mode = AT91_PM_ULP0,
53−};
54−
5564 #define at91_ramc_read(id, field) \
56− __raw_readl(pm_data.ramc[id] + field)
65+ __raw_readl(soc_pm.data.ramc[id] + field)
5766
5867 #define at91_ramc_write(id, field, value) \
59− __raw_writel(value, pm_data.ramc[id] + field)
68+ __raw_writel(value, soc_pm.data.ramc[id] + field)
6069
6170 static int at91_pm_valid_state(suspend_state_t state)
6271 {
@@ -91,6 +100,8 @@ static const struct wakeup_source_info ws_info[] = { · 28 unmodified lines
91100 { .pmc_fsmr_bit = AT91_PMC_RTCAL, .shdwc_mr_bit = BIT(17) },
92101 { .pmc_fsmr_bit = AT91_PMC_USBAL },
93102 { .pmc_fsmr_bit = AT91_PMC_SDMMC_CD },
103+ { .pmc_fsmr_bit = AT91_PMC_RTTAL },
104+ { .pmc_fsmr_bit = AT91_PMC_RXLP_MCE },
94105 };
95106
96107 static const struct of_device_id sama5d2_ws_ids[] = {
@@ -105,6 +116,17 @@ static const struct of_device_id sama5d2_ws_ids[] = { · 8 unmodified lines
105116 { /* sentinel */ }
106117 };
107118
119+static const struct of_device_id sam9x60_ws_ids[] = {
120+ { .compatible = "atmel,at91sam9x5-rtc", .data = &ws_info[1] },
121+ { .compatible = "atmel,at91rm9200-ohci", .data = &ws_info[2] },
122+ { .compatible = "usb-ohci", .data = &ws_info[2] },
123+ { .compatible = "atmel,at91sam9g45-ehci", .data = &ws_info[2] },
124+ { .compatible = "usb-ehci", .data = &ws_info[2] },
125+ { .compatible = "atmel,at91sam9260-rtt", .data = &ws_info[4] },
126+ { .compatible = "cdns,sam9x60-macb", .data = &ws_info[5] },
127+ { /* sentinel */ }
128+};
129+
108130 static int at91_pm_config_ws(unsigned int pm_mode, bool set)
109131 {
110132 const struct wakeup_source_info *wsi;
@@ -116,24 +138,22 @@ static int at91_pm_config_ws(unsigned int pm_mode, bool set) · 5 unmodified lines
116138 if (pm_mode != AT91_PM_ULP1)
117139 return 0;
118140
119− if (!pm_data.pmc || !pm_data.shdwc)
141+ if (!soc_pm.data.pmc || !soc_pm.data.shdwc || !soc_pm.ws_ids)
120142 return -EPERM;
121143
122144 if (!set) {
123− writel(mode, pm_data.pmc + AT91_PMC_FSMR);
145+ writel(mode, soc_pm.data.pmc + AT91_PMC_FSMR);
124146 return 0;
125147 }
126148
127− /* SHDWC.WUIR */
128− val = readl(pm_data.shdwc + 0x0c);
129− mode |= (val & 0x3ff);
130− polarity |= ((val >> 16) & 0x3ff);
149+ if (soc_pm.config_shdwc_ws)
150+ soc_pm.config_shdwc_ws(soc_pm.data.shdwc, &mode, &polarity);
131151
132152 /* SHDWC.MR */
133− val = readl(pm_data.shdwc + 0x04);
153+ val = readl(soc_pm.data.shdwc + 0x04);
134154
135155 /* Loop through defined wakeup sources. */
136− for_each_matching_node_and_match(np, sama5d2_ws_ids, &match) {
156+ for_each_matching_node_and_match(np, soc_pm.ws_ids, &match) {
137157 pdev = of_find_device_by_node(np);
138158 if (!pdev)
139159 continue;
@@ -155,8 +175,8 @@ put_device: · 15 unmodified lines
155175 }
156176
157177 if (mode) {
158− writel(mode, pm_data.pmc + AT91_PMC_FSMR);
159− writel(polarity, pm_data.pmc + AT91_PMC_FSPR);
178+ if (soc_pm.config_pmc_ws)
179+ soc_pm.config_pmc_ws(soc_pm.data.pmc, mode, polarity);
160180 } else {
161181 pr_err("AT91: PM: no ULP1 wakeup sources found!");
162182 }
@@ -164,6 +184,34 @@ put_device: · 1 unmodified line
164184 return mode ? 0 : -EPERM;
165185 }
166186
187+static int at91_sama5d2_config_shdwc_ws(void __iomem *shdwc, u32 *mode,
188+ u32 *polarity)
189+{
190+ u32 val;
191+
192+ /* SHDWC.WUIR */
193+ val = readl(shdwc + 0x0c);
194+ *mode |= (val & 0x3ff);
195+ *polarity |= ((val >> 16) & 0x3ff);
196+
197+ return 0;
198+}
199+
200+static int at91_sama5d2_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)
201+{
202+ writel(mode, pmc + AT91_PMC_FSMR);
203+ writel(polarity, pmc + AT91_PMC_FSPR);
204+
205+ return 0;
206+}
207+
208+static int at91_sam9x60_config_pmc_ws(void __iomem *pmc, u32 mode, u32 polarity)
209+{
210+ writel(mode, pmc + AT91_PMC_FSMR);
211+
212+ return 0;
213+}
214+
167215 /*
168216 * Called after processes are frozen, but before we shutdown devices.
169217 */
@@ -171,18 +219,18 @@ static int at91_pm_begin(suspend_state_t state) · 1 unmodified line
171219 {
172220 switch (state) {
173221 case PM_SUSPEND_MEM:
174− pm_data.mode = pm_data.suspend_mode;
222+ soc_pm.data.mode = soc_pm.data.suspend_mode;
175223 break;
176224
177225 case PM_SUSPEND_STANDBY:
178− pm_data.mode = pm_data.standby_mode;
226+ soc_pm.data.mode = soc_pm.data.standby_mode;
179227 break;
180228
181229 default:
182− pm_data.mode = -1;
230+ soc_pm.data.mode = -1;
183231 }
184232
185− return at91_pm_config_ws(pm_data.mode, true);
233+ return at91_pm_config_ws(soc_pm.data.mode, true);
186234 }
187235
188236 /*
@@ -194,10 +242,10 @@ static int at91_pm_verify_clocks(void) · 5 unmodified lines
194242 unsigned long scsr;
195243 int i;
196244
197− scsr = readl(pm_data.pmc + AT91_PMC_SCSR);
245+ scsr = readl(soc_pm.data.pmc + AT91_PMC_SCSR);
198246
199247 /* USB must not be using PLLB */
200− if ((scsr & pm_data.uhp_udp_mask) != 0) {
248+ if ((scsr & soc_pm.data.uhp_udp_mask) != 0) {
201249 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n");
202250 return 0;
203251 }
@@ -208,7 +256,7 @@ static int at91_pm_verify_clocks(void) · 4 unmodified lines
208256
209257 if ((scsr & (AT91_PMC_PCK0 << i)) == 0)
210258 continue;
211− css = readl(pm_data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
259+ css = readl(soc_pm.data.pmc + AT91_PMC_PCKR(i)) & AT91_PMC_CSS;
212260 if (css != AT91_PMC_CSS_SLOW) {
213261 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css);
214262 return 0;
@@ -230,7 +278,7 @@ static int at91_pm_verify_clocks(void) · 15 unmodified lines
230278 */
231279 int at91_suspend_entering_slow_clock(void)
232280 {
233− return (pm_data.mode >= AT91_PM_ULP0);
281+ return (soc_pm.data.mode >= AT91_PM_ULP0);
234282 }
235283 EXPORT_SYMBOL(at91_suspend_entering_slow_clock);
236284
@@ -243,14 +291,14 @@ static int at91_suspend_finish(unsigned long val) · 6 unmodified lines
243291 flush_cache_all();
244292 outer_disable();
245293
246− at91_suspend_sram_fn(&pm_data);
294+ at91_suspend_sram_fn(&soc_pm.data);
247295
248296 return 0;
249297 }
250298
251299 static void at91_pm_suspend(suspend_state_t state)
252300 {
253− if (pm_data.mode == AT91_PM_BACKUP) {
301+ if (soc_pm.data.mode == AT91_PM_BACKUP) {
254302 pm_bu->suspended = 1;
255303
256304 cpu_suspend(0, at91_suspend_finish);
@@ -289,7 +337,7 @@ static int at91_pm_enter(suspend_state_t state) · 32 unmodified lines
289337 /*
290338 * Ensure that clocks are in a valid state.
291339 */
292− if (pm_data.mode >= AT91_PM_ULP0 &&
340+ if (soc_pm.data.mode >= AT91_PM_ULP0 &&
293341 !at91_pm_verify_clocks())
294342 goto error;
295343
@@ -318,7 +366,7 @@ error: · 22 unmodified lines
318366 */
319367 static void at91_pm_end(void)
320368 {
321− at91_pm_config_ws(pm_data.mode, false);
369+ at91_pm_config_ws(soc_pm.data.mode, false);
322370 }
323371
324372
@@ -351,7 +399,7 @@ static void at91rm9200_standby(void) · 26 unmodified lines
351399 " str %2, [%1, %3]\n\t"
352400 " mcr p15, 0, %0, c7, c0, 4\n\t"
353401 :
354− : "r" (0), "r" (pm_data.ramc[0]),
402+ : "r" (0), "r" (soc_pm.data.ramc[0]),
355403 "r" (1), "r" (AT91_MC_SDRAMC_SRR));
356404 }
357405
@@ -374,7 +422,7 @@ static void at91_ddr_standby(void) · 16 unmodified lines
374422 at91_ramc_write(0, AT91_DDRSDRC_MDR, mdr);
375423 }
376424
377− if (pm_data.ramc[1]) {
425+ if (soc_pm.data.ramc[1]) {
378426 saved_lpr1 = at91_ramc_read(1, AT91_DDRSDRC_LPR);
379427 lpr1 = saved_lpr1 & ~AT91_DDRSDRC_LPCB;
380428 lpr1 |= AT91_DDRSDRC_LPCB_SELF_REFRESH;
@@ -392,14 +440,14 @@ static void at91_ddr_standby(void) · 11 unmodified lines
392440
393441 /* self-refresh mode now */
394442 at91_ramc_write(0, AT91_DDRSDRC_LPR, lpr0);
395− if (pm_data.ramc[1])
443+ if (soc_pm.data.ramc[1])
396444 at91_ramc_write(1, AT91_DDRSDRC_LPR, lpr1);
397445
398446 cpu_do_idle();
399447
400448 at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr0);
401449 at91_ramc_write(0, AT91_DDRSDRC_LPR, saved_lpr0);
402− if (pm_data.ramc[1]) {
450+ if (soc_pm.data.ramc[1]) {
403451 at91_ramc_write(0, AT91_DDRSDRC_MDR, saved_mdr1);
404452 at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1);
405453 }
@@ -429,7 +477,7 @@ static void at91sam9_sdram_standby(void) · 23 unmodified lines
429477 u32 lpr0, lpr1 = 0;
430478 u32 saved_lpr0, saved_lpr1 = 0;
431479
432− if (pm_data.ramc[1]) {
480+ if (soc_pm.data.ramc[1]) {
433481 saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR);
434482 lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB;
435483 lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH;
@@ -441,13 +489,13 @@ static void at91sam9_sdram_standby(void) · 5 unmodified lines
441489
442490 /* self-refresh mode now */
443491 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0);
444− if (pm_data.ramc[1])
492+ if (soc_pm.data.ramc[1])
445493 at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1);
446494
447495 cpu_do_idle();
448496
449497 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0);
450− if (pm_data.ramc[1])
498+ if (soc_pm.data.ramc[1])
451499 at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1);
452500 }
453501
@@ -480,14 +528,14 @@ static __init void at91_dt_ramc(void) · 26 unmodified lines
480528 const struct ramc_info *ramc;
481529
482530 for_each_matching_node_and_match(np, ramc_ids, &of_id) {
483− pm_data.ramc[idx] = of_iomap(np, 0);
484− if (!pm_data.ramc[idx])
531+ soc_pm.data.ramc[idx] = of_iomap(np, 0);
532+ if (!soc_pm.data.ramc[idx])
485533 panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx);
486534
487535 ramc = of_id->data;
488536 if (!standby)
489537 standby = ramc->idle;
490− pm_data.memctrl = ramc->memctrl;
538+ soc_pm.data.memctrl = ramc->memctrl;
491539
492540 idx++;
493541 }
@@ -509,12 +557,17 @@ static void at91rm9200_idle(void) · 15 unmodified lines
509557 * Disable the processor clock. The processor will be automatically
510558 * re-enabled by an interrupt or by a reset.
511559 */
512− writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
560+ writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
561+}
562+
563+static void at91sam9x60_idle(void)
564+{
565+ cpu_do_idle();
513566 }
514567
515568 static void at91sam9_idle(void)
516569 {
517− writel(AT91_PMC_PCK, pm_data.pmc + AT91_PMC_SCDR);
570+ writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
518571 cpu_do_idle();
519572 }
520573
@@ -566,8 +619,8 @@ static void __init at91_pm_sram_init(void) · 45 unmodified lines
566619
567620 static bool __init at91_is_pm_mode_active(int pm_mode)
568621 {
569− return (pm_data.standby_mode == pm_mode ||
570− pm_data.suspend_mode == pm_mode);
622+ return (soc_pm.data.standby_mode == pm_mode ||
623+ soc_pm.data.suspend_mode == pm_mode);
571624 }
572625
573626 static int __init at91_pm_backup_init(void)
@@ -577,6 +630,9 @@ static int __init at91_pm_backup_init(void) · 3 unmodified lines
577630 struct platform_device *pdev = NULL;
578631 int ret = -ENODEV;
579632
633+ if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
634+ return -EPERM;
635+
580636 if (!at91_is_pm_mode_active(AT91_PM_BACKUP))
581637 return 0;
582638
@@ -586,7 +642,7 @@ static int __init at91_pm_backup_init(void) · 3 unmodified lines
586642 return ret;
587643 }
588644
589− pm_data.sfrbu = of_iomap(np, 0);
645+ soc_pm.data.sfrbu = of_iomap(np, 0);
590646 of_node_put(np);
591647
592648 np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-securam");
@@ -622,8 +678,8 @@ static int __init at91_pm_backup_init(void) · 29 unmodified lines
622678 securam_fail:
623679 put_device(&pdev->dev);
624680 securam_fail_no_ref_dev:
625− iounmap(pm_data.sfrbu);
626− pm_data.sfrbu = NULL;
681+ iounmap(soc_pm.data.sfrbu);
682+ soc_pm.data.sfrbu = NULL;
627683 return ret;
628684 }
629685
@@ -632,10 +688,10 @@ static void __init at91_pm_use_default_mode(int pm_mode) · 2 unmodified lines
632688 if (pm_mode != AT91_PM_ULP1 && pm_mode != AT91_PM_BACKUP)
633689 return;
634690
635− if (pm_data.standby_mode == pm_mode)
636− pm_data.standby_mode = AT91_PM_ULP0;
637− if (pm_data.suspend_mode == pm_mode)
638− pm_data.suspend_mode = AT91_PM_ULP0;
691+ if (soc_pm.data.standby_mode == pm_mode)
692+ soc_pm.data.standby_mode = AT91_PM_ULP0;
693+ if (soc_pm.data.suspend_mode == pm_mode)
694+ soc_pm.data.suspend_mode = AT91_PM_ULP0;
639695 }
640696
641697 static void __init at91_pm_modes_init(void)
@@ -653,7 +709,7 @@ static void __init at91_pm_modes_init(void) · 11 unmodified lines
653709 goto ulp1_default;
654710 }
655711
656− pm_data.shdwc = of_iomap(np, 0);
712+ soc_pm.data.shdwc = of_iomap(np, 0);
657713 of_node_put(np);
658714
659715 ret = at91_pm_backup_init();
@@ -667,8 +723,8 @@ static void __init at91_pm_modes_init(void) · 7 unmodified lines
667723 return;
668724
669725 unmap:
670− iounmap(pm_data.shdwc);
671− pm_data.shdwc = NULL;
726+ iounmap(soc_pm.data.shdwc);
727+ soc_pm.data.shdwc = NULL;
672728 ulp1_default:
673729 at91_pm_use_default_mode(AT91_PM_ULP1);
674730 backup_default:
@@ -711,14 +767,14 @@ static void __init at91_pm_init(void (*pm_idle)(void)) · 36 unmodified lines
711767 platform_device_register(&at91_cpuidle_device);
712768
713769 pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);
714− pm_data.pmc = of_iomap(pmc_np, 0);
715− if (!pm_data.pmc) {
770+ soc_pm.data.pmc = of_iomap(pmc_np, 0);
771+ if (!soc_pm.data.pmc) {
716772 pr_err("AT91: PM not supported, PMC not found\n");
717773 return;
718774 }
719775
720776 pmc = of_id->data;
721− pm_data.uhp_udp_mask = pmc->uhp_udp_mask;
777+ soc_pm.data.uhp_udp_mask = pmc->uhp_udp_mask;
722778
723779 if (pm_idle)
724780 arm_pm_idle = pm_idle;
@@ -728,8 +784,8 @@ static void __init at91_pm_init(void (*pm_idle)(void)) · 3 unmodified lines
728784 if (at91_suspend_sram_fn) {
729785 suspend_set_ops(&at91_pm_ops);
730786 pr_info("AT91: PM: standby: %s, suspend: %s\n",
731− pm_modes[pm_data.standby_mode].pattern,
732− pm_modes[pm_data.suspend_mode].pattern);
787+ pm_modes[soc_pm.data.standby_mode].pattern,
788+ pm_modes[soc_pm.data.suspend_mode].pattern);
733789 } else {
734790 pr_info("AT91: PM not supported, due to no SRAM allocated\n");
735791 }
@@ -750,6 +806,19 @@ void __init at91rm9200_pm_init(void) · 14 unmodified lines
750806 at91_pm_init(at91rm9200_idle);
751807 }
752808
809+void __init sam9x60_pm_init(void)
810+{
811+ if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
812+ return;
813+
814+ at91_pm_modes_init();
815+ at91_dt_ramc();
816+ at91_pm_init(at91sam9x60_idle);
817+
818+ soc_pm.ws_ids = sam9x60_ws_ids;
819+ soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
820+}
821+
753822 void __init at91sam9_pm_init(void)
754823 {
755824 if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
@@ -775,6 +844,10 @@ void __init sama5d2_pm_init(void) · 19 unmodified lines
775844
776845 at91_pm_modes_init();
777846 sama5_pm_init();
847+
848+ soc_pm.ws_ids = sama5d2_ws_ids;
849+ soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
850+ soc_pm.config_pmc_ws = at91_sama5d2_config_pmc_ws;
778851 }
779852
780853 static int __init at91_pm_modes_select(char *str)
@@ -795,8 +868,8 @@ static int __init at91_pm_modes_select(char *str) · 14 unmodified lines
795868 if (suspend < 0)
796869 return 0;
797870
798− pm_data.standby_mode = standby;
799− pm_data.suspend_mode = suspend;
871+ soc_pm.data.standby_mode = standby;
872+ soc_pm.data.suspend_mode = suspend;
800873
801874 return 0;
802875 }
arch/arm/mach-at91/pm_suspend.S+77−34
@@ -50,15 +50,6 @@ tmp2 .req r5 · 49 unmodified lines
5050 beq 1b
5151 .endm
5252
53−/*
54− * Wait until PLLA has locked.
55− */
56− .macro wait_pllalock
57−1: ldr tmp1, [pmc, #AT91_PMC_SR]
58− tst tmp1, #AT91_PMC_LOCKA
59− beq 1b
60− .endm
61−
6253 /*
6354 * Put the processor to enter the idle state
6455 */
@@ -178,11 +169,46 @@ ENDPROC(at91_backup_mode) · 113 unmodified lines
178169 orr tmp1, tmp1, #AT91_PMC_KEY
179170 str tmp1, [pmc, #AT91_CKGR_MOR]
180171
172+ /* Save RC oscillator state */
173+ ldr tmp1, [pmc, #AT91_PMC_SR]
174+ str tmp1, .saved_osc_status
175+ tst tmp1, #AT91_PMC_MOSCRCS
176+ bne 1f
177+
178+ /* Turn off RC oscillator */
179+ ldr tmp1, [pmc, #AT91_CKGR_MOR]
180+ bic tmp1, tmp1, #AT91_PMC_MOSCRCEN
181+ bic tmp1, tmp1, #AT91_PMC_KEY_MASK
182+ orr tmp1, tmp1, #AT91_PMC_KEY
183+ str tmp1, [pmc, #AT91_CKGR_MOR]
184+
185+ /* Wait main RC disabled done */
186+2: ldr tmp1, [pmc, #AT91_PMC_SR]
187+ tst tmp1, #AT91_PMC_MOSCRCS
188+ bne 2b
189+
181190 /* Wait for interrupt */
182− at91_cpu_idle
191+1: at91_cpu_idle
183192
184− /* Turn on the crystal oscillator */
193+ /* Restore RC oscillator state */
194+ ldr tmp1, .saved_osc_status
195+ tst tmp1, #AT91_PMC_MOSCRCS
196+ beq 4f
197+
198+ /* Turn on RC oscillator */
185199 ldr tmp1, [pmc, #AT91_CKGR_MOR]
200+ orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
201+ bic tmp1, tmp1, #AT91_PMC_KEY_MASK
202+ orr tmp1, tmp1, #AT91_PMC_KEY
203+ str tmp1, [pmc, #AT91_CKGR_MOR]
204+
205+ /* Wait main RC stabilization */
206+3: ldr tmp1, [pmc, #AT91_PMC_SR]
207+ tst tmp1, #AT91_PMC_MOSCRCS
208+ beq 3b
209+
210+ /* Turn on the crystal oscillator */
211+4: ldr tmp1, [pmc, #AT91_CKGR_MOR]
186212 orr tmp1, tmp1, #AT91_PMC_MOSCEN
187213 orr tmp1, tmp1, #AT91_PMC_KEY
188214 str tmp1, [pmc, #AT91_CKGR_MOR]
@@ -197,8 +223,26 @@ ENDPROC(at91_backup_mode) · 8 unmodified lines
197223 .macro at91_pm_ulp1_mode
198224 ldr pmc, .pmc_base
199225
200− /* Switch the main clock source to 12-MHz RC oscillator */
226+ /* Save RC oscillator state and check if it is enabled. */
227+ ldr tmp1, [pmc, #AT91_PMC_SR]
228+ str tmp1, .saved_osc_status
229+ tst tmp1, #AT91_PMC_MOSCRCS
230+ bne 2f
231+
232+ /* Enable RC oscillator */
201233 ldr tmp1, [pmc, #AT91_CKGR_MOR]
234+ orr tmp1, tmp1, #AT91_PMC_MOSCRCEN
235+ bic tmp1, tmp1, #AT91_PMC_KEY_MASK
236+ orr tmp1, tmp1, #AT91_PMC_KEY
237+ str tmp1, [pmc, #AT91_CKGR_MOR]
238+
239+ /* Wait main RC stabilization */
240+1: ldr tmp1, [pmc, #AT91_PMC_SR]
241+ tst tmp1, #AT91_PMC_MOSCRCS
242+ beq 1b
243+
244+ /* Switch the main clock source to 12-MHz RC oscillator */
245+2: ldr tmp1, [pmc, #AT91_CKGR_MOR]
202246 bic tmp1, tmp1, #AT91_PMC_MOSCSEL
203247 bic tmp1, tmp1, #AT91_PMC_KEY_MASK
204248 orr tmp1, tmp1, #AT91_PMC_KEY
@@ -262,6 +306,25 @@ ENDPROC(at91_backup_mode) · 57 unmodified lines
262306 str tmp1, [pmc, #AT91_PMC_MCKR]
263307
264308 wait_mckrdy
309+
310+ /* Restore RC oscillator state */
311+ ldr tmp1, .saved_osc_status
312+ tst tmp1, #AT91_PMC_MOSCRCS
313+ bne 3f
314+
315+ /* Disable RC oscillator */
316+ ldr tmp1, [pmc, #AT91_CKGR_MOR]
317+ bic tmp1, tmp1, #AT91_PMC_MOSCRCEN
318+ bic tmp1, tmp1, #AT91_PMC_KEY_MASK
319+ orr tmp1, tmp1, #AT91_PMC_KEY
320+ str tmp1, [pmc, #AT91_CKGR_MOR]
321+
322+ /* Wait RC oscillator disable done */
323+4: ldr tmp1, [pmc, #AT91_PMC_SR]
324+ tst tmp1, #AT91_PMC_MOSCRCS
325+ bne 4b
326+
327+3:
265328 .endm
266329
267330 ENTRY(at91_ulp_mode)
@@ -279,14 +342,6 @@ ENTRY(at91_ulp_mode) · 11 unmodified lines
279342
280343 wait_mckrdy
281344
282− /* Save PLLA setting and disable it */
283− ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
284− str tmp1, .saved_pllar
285−
286− mov tmp1, #AT91_PMC_PLLCOUNT
287− orr tmp1, tmp1, #(1 << 29) /* bit 29 always set */
288− str tmp1, [pmc, #AT91_CKGR_PLLAR]
289−
290345 ldr r0, .pm_mode
291346 cmp r0, #AT91_PM_ULP1
292347 beq ulp1_mode
@@ -301,18 +356,6 @@ ulp1_mode: · 8 unmodified lines
301356 ulp_exit:
302357 ldr pmc, .pmc_base
303358
304− /* Restore PLLA setting */
305− ldr tmp1, .saved_pllar
306− str tmp1, [pmc, #AT91_CKGR_PLLAR]
307−
308− tst tmp1, #(AT91_PMC_MUL & 0xff0000)
309− bne 3f
310− tst tmp1, #(AT91_PMC_MUL & ~0xff0000)
311− beq 4f
312−3:
313− wait_pllalock
314−4:
315−
316359 /*
317360 * Restore master clock setting
318361 */
@@ -465,8 +508,6 @@ ENDPROC(at91_sramc_self_refresh) · 146 unmodified lines
465508 .word 0
466509 .saved_mckr:
467510 .word 0
468−.saved_pllar:
469− .word 0
470511 .saved_sam9_lpr:
471512 .word 0
472513 .saved_sam9_lpr1:
@@ -475,6 +516,8 @@ ENDPROC(at91_sramc_self_refresh) · 2 unmodified lines
475516 .word 0
476517 .saved_sam9_mdr1:
477518 .word 0
519+.saved_osc_status:
520+ .word 0
478521
479522 ENTRY(at91_pm_suspend_in_sram_sz)
480523 .word .-at91_pm_suspend_in_sram
include/linux/clk/at91_pmc.h+1−0
@@ -161,6 +161,7 @@ · 160 unmodified lines
161161
162162 #define AT91_PMC_FSMR 0x70 /* Fast Startup Mode Register */
163163 #define AT91_PMC_FSTT(n) BIT(n)
164+#define AT91_PMC_RTTAL BIT(16)
164165 #define AT91_PMC_RTCAL BIT(17) /* RTC Alarm Enable */
165166 #define AT91_PMC_USBAL BIT(18) /* USB Resume Enable */
166167 #define AT91_PMC_SDMMC_CD BIT(19) /* SDMMC Card Detect Enable */

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