Merge tag 'tag-chrome-platform-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux

Pull chrome platform updates from Benson Leung: "cros_ec_typec: - Add support for switch control and alternate modes to the Chrome EC Type C port driver - Add basic suspend/resume support sensorhub: - Fix timestamp overflow issue - Fix legacy timestamp spreading on Nami systems cros_ec_proto: - After removing all users of, stop exporting cros_ec_cmd_xfer - Check for missing EC_CMD_HOST_EVENT_GET_WAKE_MASK and ignore wakeups on old ECs misc: - Documentation warning cleanup - Fix double unlock issue in ishtp" * tag 'tag-chrome-platform-for-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/chrome-platform/linux: (21 commits) platform/chrome: cros_ec_proto: check for missing EC_CMD_HOST_EVENT_GET_WAKE_MASK platform/chrome: cros_ec_proto: ignore unnecessary wakeups on old ECs platform/chrome: cros_ec_sensorhub: Simplify legacy timestamp spreading platform/chrome: cros_ec_proto: Do not export cros_ec_cmd_xfer() platform/chrome: cros_ec_typec: Unregister partner on error platform/chrome: cros_ec_sensorhub: Fix EC timestamp overflow platform/chrome: cros_ec_typec: Add PM support platform/chrome: cros_ec_typec: Use workqueue for port update platform/chrome: cros_ec_typec: Add a dependency on USB_ROLE_SWITCH platform/chrome: cros_ec_ishtp: Fix a double-unlock issue platform/chrome: cros_ec_rpmsg: Document missing struct parameters platform/chrome: cros_ec_spi: Document missing function parameters platform/chrome: cros_ec_typec: Add TBT compat support platform/chrome: cros_ec: Add TBT pd_ctrl fields platform/chrome: cros_ec_typec: Make configure_mux static platform/chrome: cros_ec_typec: Support DP alt mode platform/chrome: cros_ec_typec: Add USB mux control platform/chrome: cros_ec_typec: Register PD CTRL cmd v2 platform/chrome: cros_ec: Update mux state bits platform/chrome: cros_ec_typec: Register Type C switches ...

Linus Torvalds committed 6 years ago

Commit fb893de2 parents d668e84 fc8cacf10 files · +483 −128Browse files

Unified · Split

10 files

drivers/platform/chrome/Kconfig +1 −0
drivers/platform/chrome/cros_ec_debugfs.c +22 −2
drivers/platform/chrome/cros_ec_ishtp.c +3 −1
drivers/platform/chrome/cros_ec_proto.c +33 −9
drivers/platform/chrome/cros_ec_rpmsg.c +3 −0
drivers/platform/chrome/cros_ec_sensorhub_ring.c +34 −64
drivers/platform/chrome/cros_ec_spi.c +4 −0
drivers/platform/chrome/cros_ec_typec.c +359 −40
include/linux/platform_data/cros_ec_commands.h +24 −9
include/linux/platform_data/cros_ec_proto.h +0 −3

drivers/platform/chrome/Kconfig+1−0

@@ -218,6 +218,7 @@ config CROS_EC_TYPEC · 217 unmodified lines
218	218	tristate "ChromeOS EC Type-C Connector Control"
219	219	depends on MFD_CROS_EC_DEV && TYPEC
220	220	depends on CROS_USBPD_NOTIFY
	221	+ depends on USB_ROLE_SWITCH
221	222	default MFD_CROS_EC_DEV
222	223	help
223	224	If you say Y here, you get support for accessing Type C connector

drivers/platform/chrome/cros_ec_debugfs.c+22−2

@@ -242,6 +242,25 @@ static ssize_t cros_ec_pdinfo_read(struct file *file, · 241 unmodified lines
242	242	read_buf, p - read_buf);
243	243	}
244	244
	245	+static bool cros_ec_uptime_is_supported(struct cros_ec_device *ec_dev)
	246	+{
	247	+ struct {
	248	+ struct cros_ec_command cmd;
	249	+ struct ec_response_uptime_info resp;
	250	+ } __packed msg = {};
	251	+ int ret;
	252	+
	253	+ msg.cmd.command = EC_CMD_GET_UPTIME_INFO;
	254	+ msg.cmd.insize = sizeof(msg.resp);
	255	+
	256	+ ret = cros_ec_cmd_xfer_status(ec_dev, &msg.cmd);
	257	+ if (ret == -EPROTO && msg.cmd.result == EC_RES_INVALID_COMMAND)
	258	+ return false;
	259	+
	260	+ /* Other errors maybe a transient error, do not rule about support. */
	261	+ return true;
	262	+}
	263	+
245	264	static ssize_t cros_ec_uptime_read(struct file file, char __user user_buf,
246	265	size_t count, loff_t *ppos)
247	266	{
@@ -444,8 +463,9 @@ static int cros_ec_debugfs_probe(struct platform_device *pd) · 196 unmodified lines
444	463	debugfs_create_file("pdinfo", 0444, debug_info->dir, debug_info,
445	464	&cros_ec_pdinfo_fops);
446	465
447		− debugfs_create_file("uptime", 0444, debug_info->dir, debug_info,
448		− &cros_ec_uptime_fops);
	466	+ if (cros_ec_uptime_is_supported(ec->ec_dev))
	467	+ debugfs_create_file("uptime", 0444, debug_info->dir, debug_info,
	468	+ &cros_ec_uptime_fops);
449	469
450	470	debugfs_create_x32("last_resume_result", 0444, debug_info->dir,
451	471	&ec->ec_dev->last_resume_result);

drivers/platform/chrome/cros_ec_ishtp.c+3−1

@@ -681,8 +681,10 @@ static int cros_ec_ishtp_probe(struct ishtp_cl_device *cl_device) · 680 unmodified lines
681	681
682	682	/* Register croc_ec_dev mfd */
683	683	rv = cros_ec_dev_init(client_data);
684		− if (rv)
	684	+ if (rv) {
	685	+ down_write(&init_lock);
685	686	goto end_cros_ec_dev_init_error;
	687	+ }
686	688
687	689	return 0;
688	690

drivers/platform/chrome/cros_ec_proto.c+33−9

@@ -208,6 +208,12 @@ static int cros_ec_get_host_event_wake_mask(struct cros_ec_device *ec_dev, · 207 unmodified lines
208	208	msg->insize = sizeof(*r);
209	209
210	210	ret = send_command(ec_dev, msg);
	211	+ if (ret >= 0) {
	212	+ if (msg->result == EC_RES_INVALID_COMMAND)
	213	+ return -EOPNOTSUPP;
	214	+ if (msg->result != EC_RES_SUCCESS)
	215	+ return -EPROTO;
	216	+ }
211	217	if (ret > 0) {
212	218	r = (struct ec_response_host_event_mask *)msg->data;
213	219	*mask = r->mask;
@@ -469,14 +475,33 @@ int cros_ec_query_all(struct cros_ec_device *ec_dev) · 255 unmodified lines
469	475	&ver_mask);
470	476	ec_dev->host_sleep_v1 = (ret >= 0 && (ver_mask & EC_VER_MASK(1)));
471	477
472		− /*
473		− * Get host event wake mask, assume all events are wake events
474		− * if unavailable.
475		− */
	478	+ /* Get host event wake mask. */
476	479	ret = cros_ec_get_host_event_wake_mask(ec_dev, proto_msg,
477	480	&ec_dev->host_event_wake_mask);
478		− if (ret < 0)
479		− ec_dev->host_event_wake_mask = U32_MAX;
	481	+ if (ret < 0) {
	482	+ /*
	483	+ * If the EC doesn't support EC_CMD_HOST_EVENT_GET_WAKE_MASK,
	484	+ * use a reasonable default. Note that we ignore various
	485	+ * battery, AC status, and power-state events, because (a)
	486	+ * those can be quite common (e.g., when sitting at full
	487	+ * charge, on AC) and (b) these are not actionable wake events;
	488	+ * if anything, we'd like to continue suspending (to save
	489	+ * power), not wake up.
	490	+ */
	491	+ ec_dev->host_event_wake_mask = U32_MAX &
	492	+ ~(BIT(EC_HOST_EVENT_AC_DISCONNECTED) \|
	493	+ BIT(EC_HOST_EVENT_BATTERY_LOW) \|
	494	+ BIT(EC_HOST_EVENT_BATTERY_CRITICAL) \|
	495	+ BIT(EC_HOST_EVENT_PD_MCU) \|
	496	+ BIT(EC_HOST_EVENT_BATTERY_STATUS));
	497	+ /*
	498	+ * Old ECs may not support this command. Complain about all
	499	+ * other errors.
	500	+ */
	501	+ if (ret != -EOPNOTSUPP)
	502	+ dev_err(ec_dev->dev,
	503	+ "failed to retrieve wake mask: %d\n", ret);
	504	+ }
480	505
481	506	ret = 0;
482	507
@@ -496,8 +521,8 @@ EXPORT_SYMBOL(cros_ec_query_all); · 13 unmodified lines
496	521	*
497	522	* Return: 0 on success or negative error code.
498	523	*/
499		−int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev,
500		− struct cros_ec_command *msg)
	524	+static int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev,
	525	+ struct cros_ec_command *msg)
501	526	{
502	527	int ret;
503	528
@@ -541,7 +566,6 @@ int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev, · 37 unmodified lines
541	566
542	567	return ret;
543	568	}
544		−EXPORT_SYMBOL(cros_ec_cmd_xfer);
545	569
546	570	/**
547	571	* cros_ec_cmd_xfer_status() - Send a command to the ChromeOS EC.

drivers/platform/chrome/cros_ec_rpmsg.c+3−0

@@ -38,6 +38,9 @@ struct cros_ec_rpmsg_response { · 37 unmodified lines
38	38	* @rpdev: rpmsg device we are connected to
39	39	* @xfer_ack: completion for host command transfer.
40	40	* @host_event_work: Work struct for pending host event.
	41	+ * @ept: The rpmsg endpoint of this channel.
	42	+ * @has_pending_host_event: Boolean used to check if there is a pending event.
	43	+ * @probe_done: Flag to indicate that probe is done.
41	44	*/
42	45	struct cros_ec_rpmsg {
43	46	struct rpmsg_device *rpdev;

drivers/platform/chrome/cros_ec_sensorhub_ring.c+34−64

@@ -419,9 +419,7 @@ cros_ec_sensor_ring_process_event(struct cros_ec_sensorhub *sensorhub, · 418 unmodified lines
419	419	* Disable filtering since we might add more jitter
420	420	* if b is in a random point in time.
421	421	*/
422		− new_timestamp = fifo_timestamp -
423		− fifo_info->timestamp * 1000 +
424		− in->timestamp * 1000;
	422	+ new_timestamp = c - b * 1000 + a * 1000;
425	423	/*
426	424	* The timestamp can be stale if we had to use the fifo
427	425	* info timestamp.
@@ -675,29 +673,22 @@ done_with_this_batch: · 247 unmodified lines
675	673	* cros_ec_sensor_ring_spread_add_legacy: Calculate proper timestamps then
676	674	* add to ringbuffer (legacy).
677	675	*
678		− * Note: This assumes we're running old firmware, where every sample's timestamp
679		− * is after the sample. Run if tight_timestamps == false.
680		− *
681		− * If there is a sample with a proper timestamp
	676	+ * Note: This assumes we're running old firmware, where timestamp
	677	+ * is inserted after its sample(s)e. There can be several samples between
	678	+ * timestamps, so several samples can have the same timestamp.
682	679	*
683	680	* timestamp \| count
684	681	* -----------------
685		− * older_unprocess_out --> TS1 \| 1
686		− * TS1 \| 2
687		− * out --> TS1 \| 3
688		− * next_out --> TS2 \|
689		− *
690		− * We spread time for the samples [older_unprocess_out .. out]
691		− * between TS1 and TS2: [TS1+1/4, TS1+2/4, TS1+3/4, TS2].
	682	+ * 1st sample --> TS1 \| 1
	683	+ * TS2 \| 2
	684	+ * TS2 \| 3
	685	+ * TS3 \| 4
	686	+ * last_out -->
692	687	*
693		− * If we reach the end of the samples, we compare with the
694		− * current timestamp:
695	688	*
696		− * older_unprocess_out --> TS1 \| 1
697		− * TS1 \| 2
698		− * out --> TS1 \| 3
	689	+ * We spread time for the samples using perod p = (current - TS1)/4.
	690	+ * between TS1 and TS2: [TS1+p/4, TS1+2p/4, TS1+3p/4, current_timestamp].
699	691	*
700		− * We know have [TS1+1/3, TS1+2/3, current timestamp]
701	692	*/
702	693	static void
703	694	cros_ec_sensor_ring_spread_add_legacy(struct cros_ec_sensorhub *sensorhub,
@@ -710,58 +701,37 @@ cros_ec_sensor_ring_spread_add_legacy(struct cros_ec_sensorhub *sensorhub, · 6 unmodified lines
710	701	int i;
711	702
712	703	for_each_set_bit(i, &sensor_mask, sensorhub->sensor_num) {
713		− s64 older_timestamp;
714	704	s64 timestamp;
715		− struct cros_ec_sensors_ring_sample *older_unprocess_out =
716		− sensorhub->ring;
717		− struct cros_ec_sensors_ring_sample *next_out;
718		− int count = 1;
719		−
720		− for (out = sensorhub->ring; out < last_out; out = next_out) {
721		− s64 time_period;
	705	+ int count = 0;
	706	+ s64 time_period;
722	707
723		− next_out = out + 1;
	708	+ for (out = sensorhub->ring; out < last_out; out++) {
724	709	if (out->sensor_id != i)
725	710	continue;
726	711
727	712	/* Timestamp to start with */
728		− older_timestamp = out->timestamp;
729		−
730		− /* Find next sample. */
731		− while (next_out < last_out && next_out->sensor_id != i)
732		− next_out++;
	713	+ timestamp = out->timestamp;
	714	+ out++;
	715	+ count = 1;
	716	+ break;
	717	+ }
	718	+ for (; out < last_out; out++) {
	719	+ /* Find last sample. */
	720	+ if (out->sensor_id != i)
	721	+ continue;
	722	+ count++;
	723	+ }
	724	+ if (count == 0)
	725	+ continue;
733	726
734		− if (next_out >= last_out) {
735		− timestamp = current_timestamp;
736		− } else {
737		− timestamp = next_out->timestamp;
738		− if (timestamp == older_timestamp) {
739		− count++;
740		− continue;
741		− }
742		− }
	727	+ /* Spread uniformly between the first and last samples. */
	728	+ time_period = div_s64(current_timestamp - timestamp, count);
743	729
744		− /*
745		− * The next sample has a new timestamp, spread the
746		− * unprocessed samples.
747		− */
748		− if (next_out < last_out)
749		− count++;
750		− time_period = div_s64(timestamp - older_timestamp,
751		− count);
752		−
753		− for (; older_unprocess_out <= out;
754		− older_unprocess_out++) {
755		− if (older_unprocess_out->sensor_id != i)
756		− continue;
757		− older_timestamp += time_period;
758		− older_unprocess_out->timestamp =
759		− older_timestamp;
760		− }
761		− count = 1;
762		− /* The next_out sample has a valid timestamp, skip. */
763		− next_out++;
764		− older_unprocess_out = next_out;
	730	+ for (out = sensorhub->ring; out < last_out; out++) {
	731	+ if (out->sensor_id != i)
	732	+ continue;
	733	+ timestamp += time_period;
	734	+ out->timestamp = timestamp;
765	735	}
766	736	}
767	737

drivers/platform/chrome/cros_ec_spi.c+4−0

@@ -148,6 +148,10 @@ static int terminate_request(struct cros_ec_device *ec_dev) · 147 unmodified lines
148	148	* receive_n_bytes - receive n bytes from the EC.
149	149	*
150	150	* Assumes buf is a pointer into the ec_dev->din buffer
	151	+ *
	152	+ * @ec_dev: ChromeOS EC device.
	153	+ * @buf: Pointer to the buffer receiving the data.
	154	+ * @n: Number of bytes received.
151	155	*/
152	156	static int receive_n_bytes(struct cros_ec_device ec_dev, u8 buf, int n)
153	157	{

drivers/platform/chrome/cros_ec_typec.c+359−40

@@ -14,9 +14,21 @@ · 13 unmodified lines
14	14	#include <linux/platform_data/cros_usbpd_notify.h>
15	15	#include <linux/platform_device.h>
16	16	#include <linux/usb/typec.h>
	17	+#include <linux/usb/typec_altmode.h>
	18	+#include <linux/usb/typec_dp.h>
	19	+#include <linux/usb/typec_mux.h>
	20	+#include <linux/usb/typec_tbt.h>
	21	+#include <linux/usb/role.h>
17	22
18	23	#define DRV_NAME "cros-ec-typec"
19	24
	25	+/* Supported alt modes. */
	26	+enum {
	27	+ CROS_EC_ALTMODE_DP = 0,
	28	+ CROS_EC_ALTMODE_TBT,
	29	+ CROS_EC_ALTMODE_MAX,
	30	+};
	31	+
20	32	/* Per port data. */
21	33	struct cros_typec_port {
22	34	struct typec_port *port;
@@ -25,6 +37,16 @@ struct cros_typec_port { · 2 unmodified lines
25	37	struct typec_partner *partner;
26	38	/* Port partner PD identity info. */
27	39	struct usb_pd_identity p_identity;
	40	+ struct typec_switch *ori_sw;
	41	+ struct typec_mux *mux;
	42	+ struct usb_role_switch *role_sw;
	43	+
	44	+ /* Variables keeping track of switch state. */
	45	+ struct typec_mux_state state;
	46	+ uint8_t mux_flags;
	47	+
	48	+ /* Port alt modes. */
	49	+ struct typec_altmode p_altmode[CROS_EC_ALTMODE_MAX];
28	50	};
29	51
30	52	/* Platform-specific data for the Chrome OS EC Type C controller. */
@@ -32,10 +54,11 @@ struct cros_typec_data { · 1 unmodified line
32	54	struct device *dev;
33	55	struct cros_ec_device *ec;
34	56	int num_ports;
35		− unsigned int cmd_ver;
	57	+ unsigned int pd_ctrl_ver;
36	58	/* Array of ports, indexed by port number. */
37	59	struct cros_typec_port *ports[EC_USB_PD_MAX_PORTS];
38	60	struct notifier_block nb;
	61	+ struct work_struct port_work;
39	62	};
40	63
41	64	static int cros_typec_parse_port_props(struct typec_capability *cap,
@@ -84,6 +107,81 @@ static int cros_typec_parse_port_props(struct typec_capability *cap, · 42 unmodified lines
84	107	return 0;
85	108	}
86	109
	110	+static int cros_typec_get_switch_handles(struct cros_typec_port *port,
	111	+ struct fwnode_handle *fwnode,
	112	+ struct device *dev)
	113	+{
	114	+ port->mux = fwnode_typec_mux_get(fwnode, NULL);
	115	+ if (IS_ERR(port->mux)) {
	116	+ dev_dbg(dev, "Mux handle not found.\n");
	117	+ goto mux_err;
	118	+ }
	119	+
	120	+ port->ori_sw = fwnode_typec_switch_get(fwnode);
	121	+ if (IS_ERR(port->ori_sw)) {
	122	+ dev_dbg(dev, "Orientation switch handle not found.\n");
	123	+ goto ori_sw_err;
	124	+ }
	125	+
	126	+ port->role_sw = fwnode_usb_role_switch_get(fwnode);
	127	+ if (IS_ERR(port->role_sw)) {
	128	+ dev_dbg(dev, "USB role switch handle not found.\n");
	129	+ goto role_sw_err;
	130	+ }
	131	+
	132	+ return 0;
	133	+
	134	+role_sw_err:
	135	+ usb_role_switch_put(port->role_sw);
	136	+ori_sw_err:
	137	+ typec_switch_put(port->ori_sw);
	138	+mux_err:
	139	+ typec_mux_put(port->mux);
	140	+
	141	+ return -ENODEV;
	142	+}
	143	+
	144	+static int cros_typec_add_partner(struct cros_typec_data *typec, int port_num,
	145	+ bool pd_en)
	146	+{
	147	+ struct cros_typec_port *port = typec->ports[port_num];
	148	+ struct typec_partner_desc p_desc = {
	149	+ .usb_pd = pd_en,
	150	+ };
	151	+ int ret = 0;
	152	+
	153	+ /*
	154	+ * Fill an initial PD identity, which will then be updated with info
	155	+ * from the EC.
	156	+ */
	157	+ p_desc.identity = &port->p_identity;
	158	+
	159	+ port->partner = typec_register_partner(port->port, &p_desc);
	160	+ if (IS_ERR(port->partner)) {
	161	+ ret = PTR_ERR(port->partner);
	162	+ port->partner = NULL;
	163	+ }
	164	+
	165	+ return ret;
	166	+}
	167	+
	168	+static void cros_typec_remove_partner(struct cros_typec_data *typec,
	169	+ int port_num)
	170	+{
	171	+ struct cros_typec_port *port = typec->ports[port_num];
	172	+
	173	+ port->state.alt = NULL;
	174	+ port->state.mode = TYPEC_STATE_USB;
	175	+ port->state.data = NULL;
	176	+
	177	+ usb_role_switch_set_role(port->role_sw, USB_ROLE_NONE);
	178	+ typec_switch_set(port->ori_sw, TYPEC_ORIENTATION_NONE);
	179	+ typec_mux_set(port->mux, &port->state);
	180	+
	181	+ typec_unregister_partner(port->partner);
	182	+ port->partner = NULL;
	183	+}
	184	+
87	185	static void cros_unregister_ports(struct cros_typec_data *typec)
88	186	{
89	187	int i;
@@ -91,10 +189,40 @@ static void cros_unregister_ports(struct cros_typec_data *typec) · 1 unmodified line
91	189	for (i = 0; i < typec->num_ports; i++) {
92	190	if (!typec->ports[i])
93	191	continue;
	192	+ cros_typec_remove_partner(typec, i);
	193	+ usb_role_switch_put(typec->ports[i]->role_sw);
	194	+ typec_switch_put(typec->ports[i]->ori_sw);
	195	+ typec_mux_put(typec->ports[i]->mux);
94	196	typec_unregister_port(typec->ports[i]->port);
95	197	}
96	198	}
97	199
	200	+/*
	201	+ * Fake the alt mode structs until we actually start registering Type C port
	202	+ * and partner alt modes.
	203	+ */
	204	+static void cros_typec_register_port_altmodes(struct cros_typec_data *typec,
	205	+ int port_num)
	206	+{
	207	+ struct cros_typec_port *port = typec->ports[port_num];
	208	+
	209	+ /* All PD capable CrOS devices are assumed to support DP altmode. */
	210	+ port->p_altmode[CROS_EC_ALTMODE_DP].svid = USB_TYPEC_DP_SID;
	211	+ port->p_altmode[CROS_EC_ALTMODE_DP].mode = USB_TYPEC_DP_MODE;
	212	+
	213	+ /*
	214	+ * Register TBT compatibility alt mode. The EC will not enter the mode
	215	+ * if it doesn't support it, so it's safe to register it unconditionally
	216	+ * here for now.
	217	+ */
	218	+ port->p_altmode[CROS_EC_ALTMODE_TBT].svid = USB_TYPEC_TBT_SID;
	219	+ port->p_altmode[CROS_EC_ALTMODE_TBT].mode = TYPEC_ANY_MODE;
	220	+
	221	+ port->state.alt = NULL;
	222	+ port->state.mode = TYPEC_STATE_USB;
	223	+ port->state.data = NULL;
	224	+}
	225	+
98	226	static int cros_typec_init_ports(struct cros_typec_data *typec)
99	227	{
100	228	struct device *dev = typec->dev;
@@ -153,6 +281,13 @@ static int cros_typec_init_ports(struct cros_typec_data *typec) · 52 unmodified lines
153	281	ret = PTR_ERR(cros_port->port);
154	282	goto unregister_ports;
155	283	}
	284	+
	285	+ ret = cros_typec_get_switch_handles(cros_port, fwnode, dev);
	286	+ if (ret)
	287	+ dev_dbg(dev, "No switch control for port %d\n",
	288	+ port_num);
	289	+
	290	+ cros_typec_register_port_altmodes(typec, port_num);
156	291	}
157	292
158	293	return 0;
@@ -193,30 +328,6 @@ static int cros_typec_ec_command(struct cros_typec_data *typec, · 34 unmodified lines
193	328	return ret;
194	329	}
195	330
196		−static int cros_typec_add_partner(struct cros_typec_data *typec, int port_num,
197		− bool pd_en)
198		−{
199		− struct cros_typec_port *port = typec->ports[port_num];
200		− struct typec_partner_desc p_desc = {
201		− .usb_pd = pd_en,
202		− };
203		− int ret = 0;
204		−
205		− /*
206		− * Fill an initial PD identity, which will then be updated with info
207		− * from the EC.
208		− */
209		− p_desc.identity = &port->p_identity;
210		−
211		− port->partner = typec_register_partner(port->port, &p_desc);
212		− if (IS_ERR(port->partner)) {
213		− ret = PTR_ERR(port->partner);
214		− port->partner = NULL;
215		− }
216		−
217		− return ret;
218		−}
219		−
220	331	static void cros_typec_set_port_params_v0(struct cros_typec_data *typec,
221	332	int port_num, struct ec_response_usb_pd_control *resp)
222	333	{
@@ -270,16 +381,166 @@ static void cros_typec_set_port_params_v1(struct cros_typec_data *typec, · 47 unmodified lines
270	381	} else {
271	382	if (!typec->ports[port_num]->partner)
272	383	return;
	384	+ cros_typec_remove_partner(typec, port_num);
	385	+ }
	386	+}
273	387
274		− typec_unregister_partner(typec->ports[port_num]->partner);
275		− typec->ports[port_num]->partner = NULL;
	388	+static int cros_typec_get_mux_info(struct cros_typec_data *typec, int port_num,
	389	+ struct ec_response_usb_pd_mux_info *resp)
	390	+{
	391	+ struct ec_params_usb_pd_mux_info req = {
	392	+ .port = port_num,
	393	+ };
	394	+
	395	+ return cros_typec_ec_command(typec, 0, EC_CMD_USB_PD_MUX_INFO, &req,
	396	+ sizeof(req), resp, sizeof(*resp));
	397	+}
	398	+
	399	+static int cros_typec_usb_safe_state(struct cros_typec_port *port)
	400	+{
	401	+ port->state.mode = TYPEC_STATE_SAFE;
	402	+
	403	+ return typec_mux_set(port->mux, &port->state);
	404	+}
	405	+
	406	+/*
	407	+ * Spoof the VDOs that were likely communicated by the partner for TBT alt
	408	+ * mode.
	409	+ */
	410	+static int cros_typec_enable_tbt(struct cros_typec_data *typec,
	411	+ int port_num,
	412	+ struct ec_response_usb_pd_control_v2 *pd_ctrl)
	413	+{
	414	+ struct cros_typec_port *port = typec->ports[port_num];
	415	+ struct typec_thunderbolt_data data;
	416	+ int ret;
	417	+
	418	+ if (typec->pd_ctrl_ver < 2) {
	419	+ dev_err(typec->dev,
	420	+ "PD_CTRL version too old: %d\n", typec->pd_ctrl_ver);
	421	+ return -ENOTSUPP;
	422	+ }
	423	+
	424	+ /* Device Discover Mode VDO */
	425	+ data.device_mode = TBT_MODE;
	426	+
	427	+ if (pd_ctrl->control_flags & USB_PD_CTRL_TBT_LEGACY_ADAPTER)
	428	+ data.device_mode = TBT_SET_ADAPTER(TBT_ADAPTER_TBT3);
	429	+
	430	+ /* Cable Discover Mode VDO */
	431	+ data.cable_mode = TBT_MODE;
	432	+ data.cable_mode \|= TBT_SET_CABLE_SPEED(pd_ctrl->cable_speed);
	433	+
	434	+ if (pd_ctrl->control_flags & USB_PD_CTRL_OPTICAL_CABLE)
	435	+ data.cable_mode \|= TBT_CABLE_OPTICAL;
	436	+
	437	+ if (pd_ctrl->control_flags & USB_PD_CTRL_ACTIVE_LINK_UNIDIR)
	438	+ data.cable_mode \|= TBT_CABLE_LINK_TRAINING;
	439	+
	440	+ if (pd_ctrl->cable_gen)
	441	+ data.cable_mode \|= TBT_CABLE_ROUNDED;
	442	+
	443	+ /* Enter Mode VDO */
	444	+ data.enter_vdo = TBT_SET_CABLE_SPEED(pd_ctrl->cable_speed);
	445	+
	446	+ if (pd_ctrl->control_flags & USB_PD_CTRL_ACTIVE_CABLE)
	447	+ data.enter_vdo \|= TBT_ENTER_MODE_ACTIVE_CABLE;
	448	+
	449	+ if (!port->state.alt) {
	450	+ port->state.alt = &port->p_altmode[CROS_EC_ALTMODE_TBT];
	451	+ ret = cros_typec_usb_safe_state(port);
	452	+ if (ret)
	453	+ return ret;
	454	+ }
	455	+
	456	+ port->state.data = &data;
	457	+ port->state.mode = TYPEC_TBT_MODE;
	458	+
	459	+ return typec_mux_set(port->mux, &port->state);
	460	+}
	461	+
	462	+/* Spoof the VDOs that were likely communicated by the partner. */
	463	+static int cros_typec_enable_dp(struct cros_typec_data *typec,
	464	+ int port_num,
	465	+ struct ec_response_usb_pd_control_v2 *pd_ctrl)
	466	+{
	467	+ struct cros_typec_port *port = typec->ports[port_num];
	468	+ struct typec_displayport_data dp_data;
	469	+ int ret;
	470	+
	471	+ if (typec->pd_ctrl_ver < 2) {
	472	+ dev_err(typec->dev,
	473	+ "PD_CTRL version too old: %d\n", typec->pd_ctrl_ver);
	474	+ return -ENOTSUPP;
	475	+ }
	476	+
	477	+ /* Status VDO. */
	478	+ dp_data.status = DP_STATUS_ENABLED;
	479	+ if (port->mux_flags & USB_PD_MUX_HPD_IRQ)
	480	+ dp_data.status \|= DP_STATUS_IRQ_HPD;
	481	+ if (port->mux_flags & USB_PD_MUX_HPD_LVL)
	482	+ dp_data.status \|= DP_STATUS_HPD_STATE;
	483	+
	484	+ /* Configuration VDO. */
	485	+ dp_data.conf = DP_CONF_SET_PIN_ASSIGN(pd_ctrl->dp_mode);
	486	+ if (!port->state.alt) {
	487	+ port->state.alt = &port->p_altmode[CROS_EC_ALTMODE_DP];
	488	+ ret = cros_typec_usb_safe_state(port);
	489	+ if (ret)
	490	+ return ret;
276	491	}
	492	+
	493	+ port->state.data = &dp_data;
	494	+ port->state.mode = TYPEC_MODAL_STATE(ffs(pd_ctrl->dp_mode));
	495	+
	496	+ return typec_mux_set(port->mux, &port->state);
	497	+}
	498	+
	499	+static int cros_typec_configure_mux(struct cros_typec_data *typec, int port_num,
	500	+ uint8_t mux_flags,
	501	+ struct ec_response_usb_pd_control_v2 *pd_ctrl)
	502	+{
	503	+ struct cros_typec_port *port = typec->ports[port_num];
	504	+ enum typec_orientation orientation;
	505	+ int ret;
	506	+
	507	+ if (!port->partner)
	508	+ return 0;
	509	+
	510	+ if (mux_flags & USB_PD_MUX_POLARITY_INVERTED)
	511	+ orientation = TYPEC_ORIENTATION_REVERSE;
	512	+ else
	513	+ orientation = TYPEC_ORIENTATION_NORMAL;
	514	+
	515	+ ret = typec_switch_set(port->ori_sw, orientation);
	516	+ if (ret)
	517	+ return ret;
	518	+
	519	+ if (mux_flags & USB_PD_MUX_TBT_COMPAT_ENABLED) {
	520	+ ret = cros_typec_enable_tbt(typec, port_num, pd_ctrl);
	521	+ } else if (mux_flags & USB_PD_MUX_DP_ENABLED) {
	522	+ ret = cros_typec_enable_dp(typec, port_num, pd_ctrl);
	523	+ } else if (mux_flags & USB_PD_MUX_SAFE_MODE) {
	524	+ ret = cros_typec_usb_safe_state(port);
	525	+ } else if (mux_flags & USB_PD_MUX_USB_ENABLED) {
	526	+ port->state.alt = NULL;
	527	+ port->state.mode = TYPEC_STATE_USB;
	528	+ ret = typec_mux_set(port->mux, &port->state);
	529	+ } else {
	530	+ dev_info(typec->dev,
	531	+ "Unsupported mode requested, mux flags: %x\n",
	532	+ mux_flags);
	533	+ ret = -ENOTSUPP;
	534	+ }
	535	+
	536	+ return ret;
277	537	}
278	538
279	539	static int cros_typec_port_update(struct cros_typec_data *typec, int port_num)
280	540	{
281	541	struct ec_params_usb_pd_control req;
282		− struct ec_response_usb_pd_control_v1 resp;
	542	+ struct ec_response_usb_pd_control_v2 resp;
	543	+ struct ec_response_usb_pd_mux_info mux_resp;
283	544	int ret;
284	545
285	546	if (port_num < 0 \|\| port_num >= typec->num_ports) {
@@ -293,7 +554,7 @@ static int cros_typec_port_update(struct cros_typec_data *typec, int port_num) · 7 unmodified lines
293	554	req.mux = USB_PD_CTRL_MUX_NO_CHANGE;
294	555	req.swap = USB_PD_CTRL_SWAP_NONE;
295	556
296		− ret = cros_typec_ec_command(typec, typec->cmd_ver,
	557	+ ret = cros_typec_ec_command(typec, typec->pd_ctrl_ver,
297	558	EC_CMD_USB_PD_CONTROL, &req, sizeof(req),
298	559	&resp, sizeof(resp));
299	560	if (ret < 0)
@@ -304,13 +565,33 @@ static int cros_typec_port_update(struct cros_typec_data *typec, int port_num) · 4 unmodified lines
304	565	dev_dbg(typec->dev, "Polarity %d: 0x%hhx\n", port_num, resp.polarity);
305	566	dev_dbg(typec->dev, "State %d: %s\n", port_num, resp.state);
306	567
307		− if (typec->cmd_ver == 1)
308		− cros_typec_set_port_params_v1(typec, port_num, &resp);
	568	+ if (typec->pd_ctrl_ver != 0)
	569	+ cros_typec_set_port_params_v1(typec, port_num,
	570	+ (struct ec_response_usb_pd_control_v1 *)&resp);
309	571	else
310	572	cros_typec_set_port_params_v0(typec, port_num,
311	573	(struct ec_response_usb_pd_control *) &resp);
312	574
313		− return 0;
	575	+ /* Update the switches if they exist, according to requested state */
	576	+ ret = cros_typec_get_mux_info(typec, port_num, &mux_resp);
	577	+ if (ret < 0) {
	578	+ dev_warn(typec->dev,
	579	+ "Failed to get mux info for port: %d, err = %d\n",
	580	+ port_num, ret);
	581	+ return 0;
	582	+ }
	583	+
	584	+ /* No change needs to be made, let's exit early. */
	585	+ if (typec->ports[port_num]->mux_flags == mux_resp.flags)
	586	+ return 0;
	587	+
	588	+ typec->ports[port_num]->mux_flags = mux_resp.flags;
	589	+ ret = cros_typec_configure_mux(typec, port_num, mux_resp.flags, &resp);
	590	+ if (ret)
	591	+ dev_warn(typec->dev, "Configure muxes failed, err = %d\n", ret);
	592	+
	593	+ return usb_role_switch_set_role(typec->ports[port_num]->role_sw,
	594	+ !!(resp.role & PD_CTRL_RESP_ROLE_DATA));
314	595	}
315	596
316	597	static int cros_typec_get_cmd_version(struct cros_typec_data *typec)
@@ -327,22 +608,22 @@ static int cros_typec_get_cmd_version(struct cros_typec_data *typec) · 10 unmodified lines
327	608	if (ret < 0)
328	609	return ret;
329	610
330		− if (resp.version_mask & EC_VER_MASK(1))
331		− typec->cmd_ver = 1;
	611	+ if (resp.version_mask & EC_VER_MASK(2))
	612	+ typec->pd_ctrl_ver = 2;
	613	+ else if (resp.version_mask & EC_VER_MASK(1))
	614	+ typec->pd_ctrl_ver = 1;
332	615	else
333		− typec->cmd_ver = 0;
	616	+ typec->pd_ctrl_ver = 0;
334	617
335	618	dev_dbg(typec->dev, "PD Control has version mask 0x%hhx\n",
336		− typec->cmd_ver);
	619	+ typec->pd_ctrl_ver);
337	620
338	621	return 0;
339	622	}
340	623
341		−static int cros_ec_typec_event(struct notifier_block *nb,
342		− unsigned long host_event, void *_notify)
	624	+static void cros_typec_port_work(struct work_struct *work)
343	625	{
344		− struct cros_typec_data *typec = container_of(nb, struct cros_typec_data,
345		− nb);
	626	+ struct cros_typec_data *typec = container_of(work, struct cros_typec_data, port_work);
346	627	int ret, i;
347	628
348	629	for (i = 0; i < typec->num_ports; i++) {
@@ -350,6 +631,14 @@ static int cros_ec_typec_event(struct notifier_block *nb, · 1 unmodified line
350	631	if (ret < 0)
351	632	dev_warn(typec->dev, "Update failed for port: %d\n", i);
352	633	}
	634	+}
	635	+
	636	+static int cros_ec_typec_event(struct notifier_block *nb,
	637	+ unsigned long host_event, void *_notify)
	638	+{
	639	+ struct cros_typec_data *typec = container_of(nb, struct cros_typec_data, nb);
	640	+
	641	+ schedule_work(&typec->port_work);
353	642
354	643	return NOTIFY_OK;
355	644	}
@@ -408,6 +697,12 @@ static int cros_typec_probe(struct platform_device *pdev) · 52 unmodified lines
408	697	if (ret < 0)
409	698	return ret;
410	699
	700	+ INIT_WORK(&typec->port_work, cros_typec_port_work);
	701	+
	702	+ /*
	703	+ * Safe to call port update here, since we haven't registered the
	704	+ * PD notifier yet.
	705	+ */
411	706	for (i = 0; i < typec->num_ports; i++) {
412	707	ret = cros_typec_port_update(typec, i);
413	708	if (ret < 0)
@@ -426,11 +721,35 @@ unregister_ports: · 12 unmodified lines
426	721	return ret;
427	722	}
428	723
	724	+static int __maybe_unused cros_typec_suspend(struct device *dev)
	725	+{
	726	+ struct cros_typec_data *typec = dev_get_drvdata(dev);
	727	+
	728	+ cancel_work_sync(&typec->port_work);
	729	+
	730	+ return 0;
	731	+}
	732	+
	733	+static int __maybe_unused cros_typec_resume(struct device *dev)
	734	+{
	735	+ struct cros_typec_data *typec = dev_get_drvdata(dev);
	736	+
	737	+ /* Refresh port state. */
	738	+ schedule_work(&typec->port_work);
	739	+
	740	+ return 0;
	741	+}
	742	+
	743	+static const struct dev_pm_ops cros_typec_pm_ops = {
	744	+ SET_SYSTEM_SLEEP_PM_OPS(cros_typec_suspend, cros_typec_resume)
	745	+};
	746	+
429	747	static struct platform_driver cros_typec_driver = {
430	748	.driver = {
431	749	.name = DRV_NAME,
432	750	.acpi_match_table = ACPI_PTR(cros_typec_acpi_id),
433	751	.of_match_table = of_match_ptr(cros_typec_of_match),
	752	+ .pm = &cros_typec_pm_ops,
434	753	},
435	754	.probe = cros_typec_probe,
436	755	};

include/linux/platform_data/cros_ec_commands.h+24−9

@@ -4917,15 +4917,26 @@ struct ec_response_usb_pd_control_v1 { · 4916 unmodified lines
4917	4917	#define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */
4918	4918	#define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */
4919	4919
	4920	+/* Active/Passive Cable */
	4921	+#define USB_PD_CTRL_ACTIVE_CABLE BIT(0)
	4922	+/* Optical/Non-optical cable */
	4923	+#define USB_PD_CTRL_OPTICAL_CABLE BIT(1)
	4924	+/* 3rd Gen TBT device (or AMA)/2nd gen tbt Adapter */
	4925	+#define USB_PD_CTRL_TBT_LEGACY_ADAPTER BIT(2)
	4926	+/* Active Link Uni-Direction */
	4927	+#define USB_PD_CTRL_ACTIVE_LINK_UNIDIR BIT(3)
	4928	+
4920	4929	struct ec_response_usb_pd_control_v2 {
4921	4930	uint8_t enabled;
4922	4931	uint8_t role;
4923	4932	uint8_t polarity;
4924	4933	char state[32];
4925		− uint8_t cc_state; /* USBC_PD_CC_Encoded cc state /
4926		− uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
4927		− /* CL:1500994 Current cable type */
4928		− uint8_t reserved_cable_type;
	4934	+ uint8_t cc_state; /* enum pd_cc_states representing cc state */
	4935	+ uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */
	4936	+ uint8_t reserved; /* Reserved for future use */
	4937	+ uint8_t control_flags; /* USB_PD_CTRL_flags /
	4938	+ uint8_t cable_speed; /* TBT_SS_* cable speed */
	4939	+ uint8_t cable_gen; /* TBT_GEN3_* cable rounded support */
4929	4940	} __ec_align1;
4930	4941
4931	4942	#define EC_CMD_USB_PD_PORTS 0x0102
@@ -5207,11 +5218,15 @@ struct ec_params_usb_pd_mux_info { · 275 unmodified lines
5207	5218	} __ec_align1;
5208	5219
5209	5220	/* Flags representing mux state */
5210		−#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
5211		−#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
5212		−#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
5213		−#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
5214		−#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
	5221	+#define USB_PD_MUX_NONE 0 /* Open switch */
	5222	+#define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */
	5223	+#define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */
	5224	+#define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */
	5225	+#define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */
	5226	+#define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */
	5227	+#define USB_PD_MUX_SAFE_MODE BIT(5) /* DP is in safe mode */
	5228	+#define USB_PD_MUX_TBT_COMPAT_ENABLED BIT(6) /* TBT compat enabled */
	5229	+#define USB_PD_MUX_USB4_ENABLED BIT(7) /* USB4 enabled */
5215	5230
5216	5231	struct ec_response_usb_pd_mux_info {
5217	5232	uint8_t flags; /* USB_PD_MUX_-encoded USB mux state /

include/linux/platform_data/cros_ec_proto.h+0−3

@@ -216,9 +216,6 @@ int cros_ec_prepare_tx(struct cros_ec_device *ec_dev, · 215 unmodified lines
216	216	int cros_ec_check_result(struct cros_ec_device *ec_dev,
217	217	struct cros_ec_command *msg);
218	218
219		−int cros_ec_cmd_xfer(struct cros_ec_device *ec_dev,
220		− struct cros_ec_command *msg);
221		−
222	219	int cros_ec_cmd_xfer_status(struct cros_ec_device *ec_dev,
223	220	struct cros_ec_command *msg);
224	221