The assumption that the first byte in the module mapping dword is the module number shouldn't be hard-coded in the driver, but come from mlx5_ifc structs. While at it, fix the incorrect width for the 'rx_lane' and 'tx_lane' fields.
Unified · Split
| @@ -275,7 +275,6 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num) · 274 unmodified lines | |||
| 275 | { | 275 | { |
| 276 | u32 in[MLX5_ST_SZ_DW(pmlp_reg)] = {0}; | 276 | u32 in[MLX5_ST_SZ_DW(pmlp_reg)] = {0}; |
| 277 | u32 out[MLX5_ST_SZ_DW(pmlp_reg)]; | 277 | u32 out[MLX5_ST_SZ_DW(pmlp_reg)]; |
| 278 | int module_mapping; | ||
| 279 | int err; | 278 | int err; |
| 280 | 279 | ||
| 281 | MLX5_SET(pmlp_reg, in, local_port, 1); | 280 | MLX5_SET(pmlp_reg, in, local_port, 1); |
| @@ -284,8 +283,9 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num) · 2 unmodified lines | |||
| 284 | if (err) | 283 | if (err) |
| 285 | return err; | 284 | return err; |
| 286 | 285 | ||
| 287 | module_mapping = MLX5_GET(pmlp_reg, out, lane0_module_mapping); | 286 | *module_num = MLX5_GET(lane_2_module_mapping, |
| 288 | *module_num = module_mapping & MLX5_EEPROM_IDENTIFIER_BYTE_MASK; | 287 | MLX5_ADDR_OF(pmlp_reg, out, lane0_module_mapping), |
| 288 | module); | ||
| 289 | 289 | ||
| 290 | return 0; | 290 | return 0; |
| 291 | } | 291 | } |
| @@ -9888,10 +9888,10 @@ struct mlx5_ifc_pcmr_reg_bits { · 9887 unmodified lines | |||
| 9888 | }; | 9888 | }; |
| 9889 | 9889 | ||
| 9890 | struct mlx5_ifc_lane_2_module_mapping_bits { | 9890 | struct mlx5_ifc_lane_2_module_mapping_bits { |
| 9891 | u8 reserved_at_0[0x6]; | 9891 | u8 reserved_at_0[0x4]; |
| 9892 | u8 rx_lane[0x2]; | 9892 | u8 rx_lane[0x4]; |
| 9893 | u8 reserved_at_8[0x6]; | 9893 | u8 reserved_at_8[0x4]; |
| 9894 | u8 tx_lane[0x2]; | 9894 | u8 tx_lane[0x4]; |
| 9895 | u8 reserved_at_10[0x8]; | 9895 | u8 reserved_at_10[0x8]; |
| 9896 | u8 module[0x8]; | 9896 | u8 module[0x8]; |
| 9897 | }; | 9897 | }; |
| @@ -56,7 +56,6 @@ enum mlx5_an_status { · 55 unmodified lines | |||
| 56 | MLX5_AN_LINK_DOWN = 4, | 56 | MLX5_AN_LINK_DOWN = 4, |
| 57 | }; | 57 | }; |
| 58 | 58 | ||
| 59 | #define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff | ||
| 60 | #define MLX5_I2C_ADDR_LOW 0x50 | 59 | #define MLX5_I2C_ADDR_LOW 0x50 |
| 61 | #define MLX5_I2C_ADDR_HIGH 0x51 | 60 | #define MLX5_I2C_ADDR_HIGH 0x51 |
| 62 | #define MLX5_EEPROM_PAGE_LENGTH 256 | 61 | #define MLX5_EEPROM_PAGE_LENGTH 256 |