Backmerging to get v5.12 fixes. Requested for vmwgfx.
Unified · Split
| @@ -48,22 +48,22 @@ · 47 unmodified lines | ||
| 48 | 48 | *.xz |
| 49 | 49 | *.zst |
| 50 | 50 | Module.symvers |
| 51 | −modules.builtin | |
| 52 | 51 | modules.order |
| 53 | 52 | |
| 54 | 53 | # |
| 55 | 54 | # Top-level generic files |
| 56 | 55 | # |
| 57 | −/tags | |
| 58 | −/TAGS | |
| 59 | 56 | /linux |
| 57 | +/modules-only.symvers | |
| 60 | 58 | /vmlinux |
| 61 | 59 | /vmlinux.32 |
| 60 | +/vmlinux.map | |
| 62 | 61 | /vmlinux.symvers |
| 63 | 62 | /vmlinux-gdb.py |
| 64 | 63 | /vmlinuz |
| 65 | 64 | /System.map |
| 66 | 65 | /Module.markers |
| 66 | +/modules.builtin | |
| 67 | 67 | /modules.builtin.modinfo |
| 68 | 68 | /modules.nsdeps |
| 69 | 69 | |
| @@ -112,6 +112,10 @@ patches-* · 42 unmodified lines | ||
| 112 | 112 | patches |
| 113 | 113 | series |
| 114 | 114 | |
| 115 | +# ctags files | |
| 116 | +tags | |
| 117 | +TAGS | |
| 118 | + | |
| 115 | 119 | # cscope files |
| 116 | 120 | cscope.* |
| 117 | 121 | ncscope.* |
| @@ -25,8 +25,9 @@ Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electr · 24 unmodified lines | ||
| 25 | 25 | Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com> |
| 26 | 26 | Alexei Starovoitov <ast@kernel.org> <ast@fb.com> |
| 27 | 27 | Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com> |
| 28 | −Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@intel.com> | |
| 29 | −Alex Shi <alex.shi@linux.alibaba.com> <alex.shi@linaro.org> | |
| 28 | +Alex Shi <alexs@kernel.org> <alex.shi@intel.com> | |
| 29 | +Alex Shi <alexs@kernel.org> <alex.shi@linaro.org> | |
| 30 | +Alex Shi <alexs@kernel.org> <alex.shi@linux.alibaba.com> | |
| 30 | 31 | Al Viro <viro@ftp.linux.org.uk> |
| 31 | 32 | Al Viro <viro@zenIV.linux.org.uk> |
| 32 | 33 | Andi Kleen <ak@linux.intel.com> <ak@suse.de> |
| @@ -265,6 +266,8 @@ Nicholas Piggin <npiggin@gmail.com> <piggin@cyberone.com.au> · 232 unmodified lines | ||
| 265 | 266 | Nicolas Ferre <nicolas.ferre@microchip.com> <nicolas.ferre@atmel.com> |
| 266 | 267 | Nicolas Pitre <nico@fluxnic.net> <nicolas.pitre@linaro.org> |
| 267 | 268 | Nicolas Pitre <nico@fluxnic.net> <nico@linaro.org> |
| 269 | +Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de> | |
| 270 | +Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.com> | |
| 268 | 271 | Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net> |
| 269 | 272 | Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com> |
| 270 | 273 | Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com> |
| @@ -550,7 +550,7 @@ D: gadget layers, SPI subsystem, GPIO subsystem, and more than a few · 549 unmodified lines | ||
| 550 | 550 | D: device drivers. His encouragement also helped many engineers get |
| 551 | 551 | D: started working on the Linux kernel. David passed away in early |
| 552 | 552 | D: 2011, and will be greatly missed. |
| 553 | −W: https://lkml.org/lkml/2011/4/5/36 | |
| 553 | +W: https://lore.kernel.org/lkml/20110405034819.GA7872@kroah.com | |
| 554 | 554 | |
| 555 | 555 | N: Gary Brubaker |
| 556 | 556 | E: xavyer@ix.netcom.com |
| @@ -1874,6 +1874,11 @@ S: Krosenska' 543 · 1317 unmodified lines | ||
| 1874 | 1874 | S: 181 00 Praha 8 |
| 1875 | 1875 | S: Czech Republic |
| 1876 | 1876 | |
| 1877 | +N: Murali Karicheri | |
| 1878 | +E: m-karicheri2@ti.com | |
| 1879 | +D: Keystone NetCP driver | |
| 1880 | +D: Keystone PCIe host controller driver | |
| 1881 | + | |
| 1877 | 1882 | N: Jan "Yenya" Kasprzak |
| 1878 | 1883 | E: kas@fi.muni.cz |
| 1879 | 1884 | D: Author of the COSA/SRP sync serial board driver. |
| @@ -1933,6 +1938,9 @@ N: Kukjin Kim · 53 unmodified lines | ||
| 1933 | 1938 | E: kgene@kernel.org |
| 1934 | 1939 | D: Samsung S3C, S5P and Exynos ARM architectures |
| 1935 | 1940 | |
| 1941 | +N: Milo Kim | |
| 1942 | +D: TI LP855x, LP8727 and LP8788 drivers | |
| 1943 | + | |
| 1936 | 1944 | N: Sangbeom Kim |
| 1937 | 1945 | E: sbkim73@samsung.com |
| 1938 | 1946 | D: Samsung SoC Audio (ASoC) drivers |
| @@ -2536,6 +2544,14 @@ D: Linux/PARISC hacker · 597 unmodified lines | ||
| 2536 | 2544 | D: AD1889 sound driver |
| 2537 | 2545 | S: Ottawa, Canada |
| 2538 | 2546 | |
| 2547 | +N: Peter Meerwald-Stadler | |
| 2548 | +E: pmeerw@pmeerw.net | |
| 2549 | +W: https://pmeerw.net | |
| 2550 | +D: IIO reviewing, drivers | |
| 2551 | +S: Schießstandstr. 3a | |
| 2552 | +S: A-5061 Elsbethen | |
| 2553 | +S: Austria | |
| 2554 | + | |
| 2539 | 2555 | N: Dirk Melchers |
| 2540 | 2556 | E: dirk@merlin.nbg.sub.org |
| 2541 | 2557 | D: 8 bit XT hard disk driver for OMTI5520 |
| @@ -0,0 +1,27 @@ | ||
| 1 | +What: Audit Login UID | |
| 2 | +Date: 2005-02-01 | |
| 3 | +KernelVersion: 2.6.11-rc2 1e2d1492e178 ("[PATCH] audit: handle loginuid through proc") | |
| 4 | +Contact: linux-audit@redhat.com | |
| 5 | +Users: audit and login applications | |
| 6 | +Description: | |
| 7 | + The /proc/$pid/loginuid pseudofile is written to set and | |
| 8 | + read to get the audit login UID of process $pid as a | |
| 9 | + decimal unsigned int (%u, u32). If it is unset, | |
| 10 | + permissions are not needed to set it. The accessor must | |
| 11 | + have CAP_AUDIT_CONTROL in the initial user namespace to | |
| 12 | + write it if it has been set. It cannot be written again | |
| 13 | + if AUDIT_FEATURE_LOGINUID_IMMUTABLE is enabled. It | |
| 14 | + cannot be unset if AUDIT_FEATURE_ONLY_UNSET_LOGINUID is | |
| 15 | + enabled. | |
| 16 | + | |
| 17 | +What: Audit Login Session ID | |
| 18 | +Date: 2008-03-13 | |
| 19 | +KernelVersion: 2.6.25-rc7 1e0bd7550ea9 ("[PATCH] export sessionid alongside the loginuid in procfs") | |
| 20 | +Contact: linux-audit@redhat.com | |
| 21 | +Users: audit and login applications | |
| 22 | +Description: | |
| 23 | + The /proc/$pid/sessionid pseudofile is read to get the | |
| 24 | + audit login session ID of process $pid as a decimal | |
| 25 | + unsigned int (%u, u32). It is set automatically, | |
| 26 | + serially assigned with each new login. | |
| 27 | + | |
| @@ -82,6 +82,24 @@ Description: Allows the root user to read or write 64 bit data directly · 81 unmodified lines | ||
| 82 | 82 | If the IOMMU is disabled, it also allows the root user to read |
| 83 | 83 | or write from the host a device VA of a host mapped memory |
| 84 | 84 | |
| 85 | +What: /sys/kernel/debug/habanalabs/hl<n>/data_dma | |
| 86 | +Date: Apr 2021 | |
| 87 | +KernelVersion: 5.13 | |
| 88 | +Contact: ogabbay@kernel.org | |
| 89 | +Description: Allows the root user to read from the device's internal | |
| 90 | + memory (DRAM/SRAM) through a DMA engine. | |
| 91 | + This property is a binary blob that contains the result of the | |
| 92 | + DMA transfer. | |
| 93 | + This custom interface is needed (instead of using the generic | |
| 94 | + Linux user-space PCI mapping) because the amount of internal | |
| 95 | + memory is huge (>32GB) and reading it via the PCI bar will take | |
| 96 | + a very long time. | |
| 97 | + This interface doesn't support concurrency in the same device. | |
| 98 | + In GAUDI and GOYA, this action can cause undefined behavior | |
| 99 | + in case the it is done while the device is executing user | |
| 100 | + workloads. | |
| 101 | + Only supported on GAUDI at this stage. | |
| 102 | + | |
| 85 | 103 | What: /sys/kernel/debug/habanalabs/hl<n>/device |
| 86 | 104 | Date: Jan 2019 |
| 87 | 105 | KernelVersion: 5.1 |
| @@ -90,6 +108,24 @@ Description: Enables the root user to set the device to specific state. · 2 unmodified lines | ||
| 90 | 108 | Valid values are "disable", "enable", "suspend", "resume". |
| 91 | 109 | User can read this property to see the valid values |
| 92 | 110 | |
| 111 | +What: /sys/kernel/debug/habanalabs/hl<n>/dma_size | |
| 112 | +Date: Apr 2021 | |
| 113 | +KernelVersion: 5.13 | |
| 114 | +Contact: ogabbay@kernel.org | |
| 115 | +Description: Specify the size of the DMA transaction when using DMA to read | |
| 116 | + from the device's internal memory. The value can not be larger | |
| 117 | + than 128MB. Writing to this value initiates the DMA transfer. | |
| 118 | + When the write is finished, the user can read the "data_dma" | |
| 119 | + blob | |
| 120 | + | |
| 121 | +What: /sys/kernel/debug/habanalabs/hl<n>/dump_security_violations | |
| 122 | +Date: Jan 2021 | |
| 123 | +KernelVersion: 5.12 | |
| 124 | +Contact: ogabbay@kernel.org | |
| 125 | +Description: Dumps all security violations to dmesg. This will also ack | |
| 126 | + all security violations meanings those violations will not be | |
| 127 | + dumped next time user calls this API | |
| 128 | + | |
| 93 | 129 | What: /sys/kernel/debug/habanalabs/hl<n>/engines |
| 94 | 130 | Date: Jul 2019 |
| 95 | 131 | KernelVersion: 5.3 |
| @@ -154,6 +190,16 @@ Description: Displays the hop values and physical address for a given ASID · 58 unmodified lines | ||
| 154 | 190 | e.g. to display info about VA 0x1000 for ASID 1 you need to do: |
| 155 | 191 | echo "1 0x1000" > /sys/kernel/debug/habanalabs/hl0/mmu |
| 156 | 192 | |
| 193 | +What: /sys/kernel/debug/habanalabs/hl<n>/mmu_error | |
| 194 | +Date: Mar 2021 | |
| 195 | +KernelVersion: 5.12 | |
| 196 | +Contact: fkassabri@habana.ai | |
| 197 | +Description: Check and display page fault or access violation mmu errors for | |
| 198 | + all MMUs specified in mmu_cap_mask. | |
| 199 | + e.g. to display error info for MMU hw cap bit 9, you need to do: | |
| 200 | + echo "0x200" > /sys/kernel/debug/habanalabs/hl0/mmu_error | |
| 201 | + cat /sys/kernel/debug/habanalabs/hl0/mmu_error | |
| 202 | + | |
| 157 | 203 | What: /sys/kernel/debug/habanalabs/hl<n>/set_power_state |
| 158 | 204 | Date: Jan 2019 |
| 159 | 205 | KernelVersion: 5.1 |
| @@ -161,6 +207,13 @@ Contact: ogabbay@kernel.org · 1 unmodified line | ||
| 161 | 207 | Description: Sets the PCI power state. Valid values are "1" for D0 and "2" |
| 162 | 208 | for D3Hot |
| 163 | 209 | |
| 210 | +What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err | |
| 211 | +Date: Mar 2020 | |
| 212 | +KernelVersion: 5.6 | |
| 213 | +Contact: ogabbay@kernel.org | |
| 214 | +Description: Sets the stop-on_error option for the device engines. Value of | |
| 215 | + "0" is for disable, otherwise enable. | |
| 216 | + | |
| 164 | 217 | What: /sys/kernel/debug/habanalabs/hl<n>/userptr |
| 165 | 218 | Date: Jan 2019 |
| 166 | 219 | KernelVersion: 5.1 |
| @@ -174,19 +227,4 @@ Date: Jan 2019 · 7 unmodified lines | ||
| 174 | 227 | KernelVersion: 5.1 |
| 175 | 228 | Contact: ogabbay@kernel.org |
| 176 | 229 | Description: Displays a list with information about all the active virtual |
| 177 | − address mappings per ASID | |
| 178 | − | |
| 179 | −What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err | |
| 180 | −Date: Mar 2020 | |
| 181 | −KernelVersion: 5.6 | |
| 182 | −Contact: ogabbay@kernel.org | |
| 183 | −Description: Sets the stop-on_error option for the device engines. Value of | |
| 184 | − "0" is for disable, otherwise enable. | |
| 185 | − | |
| 186 | −What: /sys/kernel/debug/habanalabs/hl<n>/dump_security_violations | |
| 187 | −Date: Jan 2021 | |
| 188 | −KernelVersion: 5.12 | |
| 189 | −Contact: ogabbay@kernel.org | |
| 190 | −Description: Dumps all security violations to dmesg. This will also ack | |
| 191 | − all security violations meanings those violations will not be | |
| 192 | − dumped next time user calls this API | |
| 230 | + address mappings per ASID and all user mappings of HW blocks | |
| @@ -44,3 +44,21 @@ Date: Feb 2020 · 43 unmodified lines | ||
| 44 | 44 | KernelVersion: 5.7 |
| 45 | 45 | Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> |
| 46 | 46 | Description: Contains the device access mode: ro, rw or migration. |
| 47 | + | |
| 48 | +What: /sys/block/rnbd<N>/rnbd/resize | |
| 49 | +Date: Feb 2020 | |
| 50 | +KernelVersion: 5.7 | |
| 51 | +Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> | |
| 52 | +Description: Write the number of sectors to change the size of the disk. | |
| 53 | + | |
| 54 | +What: /sys/block/rnbd<N>/rnbd/remap_device | |
| 55 | +Date: Feb 2020 | |
| 56 | +KernelVersion: 5.7 | |
| 57 | +Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> | |
| 58 | +Description: Remap the disconnected device if the session is not destroyed yet. | |
| 59 | + | |
| 60 | +What: /sys/block/rnbd<N>/rnbd/nr_poll_queues | |
| 61 | +Date: Feb 2020 | |
| 62 | +KernelVersion: 5.7 | |
| 63 | +Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> | |
| 64 | +Description: Contains the number of poll-mode queues | |
| @@ -0,0 +1,14 @@ | ||
| 1 | +What: /sys/bus/coresight/devices/trbe<cpu>/align | |
| 2 | +Date: March 2021 | |
| 3 | +KernelVersion: 5.13 | |
| 4 | +Contact: Anshuman Khandual <anshuman.khandual@arm.com> | |
| 5 | +Description: (Read) Shows the TRBE write pointer alignment. This value | |
| 6 | + is fetched from the TRBIDR register. | |
| 7 | + | |
| 8 | +What: /sys/bus/coresight/devices/trbe<cpu>/flag | |
| 9 | +Date: March 2021 | |
| 10 | +KernelVersion: 5.13 | |
| 11 | +Contact: Anshuman Khandual <anshuman.khandual@arm.com> | |
| 12 | +Description: (Read) Shows if TRBE updates in the memory are with access | |
| 13 | + and dirty flag updates as well. This value is fetched from | |
| 14 | + the TRBIDR register. | |
| @@ -0,0 +1,30 @@ | ||
| 1 | +What: /sys/bus/event_source/devices/dsa*/format | |
| 2 | +Date: April 2021 | |
| 3 | +KernelVersion: 5.13 | |
| 4 | +Contact: Tom Zanussi <tom.zanussi@linux.intel.com> | |
| 5 | +Description: Read-only. Attribute group to describe the magic bits | |
| 6 | + that go into perf_event_attr.config or | |
| 7 | + perf_event_attr.config1 for the IDXD DSA pmu. (See also | |
| 8 | + ABI/testing/sysfs-bus-event_source-devices-format). | |
| 9 | + | |
| 10 | + Each attribute in this group defines a bit range in | |
| 11 | + perf_event_attr.config or perf_event_attr.config1. | |
| 12 | + All supported attributes are listed below (See the | |
| 13 | + IDXD DSA Spec for possible attribute values):: | |
| 14 | + | |
| 15 | + event_category = "config:0-3" - event category | |
| 16 | + event = "config:4-31" - event ID | |
| 17 | + | |
| 18 | + filter_wq = "config1:0-31" - workqueue filter | |
| 19 | + filter_tc = "config1:32-39" - traffic class filter | |
| 20 | + filter_pgsz = "config1:40-43" - page size filter | |
| 21 | + filter_sz = "config1:44-51" - transfer size filter | |
| 22 | + filter_eng = "config1:52-59" - engine filter | |
| 23 | + | |
| 24 | +What: /sys/bus/event_source/devices/dsa*/cpumask | |
| 25 | +Date: April 2021 | |
| 26 | +KernelVersion: 5.13 | |
| 27 | +Contact: Tom Zanussi <tom.zanussi@linux.intel.com> | |
| 28 | +Description: Read-only. This file always returns the cpu to which the | |
| 29 | + IDXD DSA pmu is bound for access to all dsa pmu | |
| 30 | + performance monitoring events. | |
| @@ -33,6 +33,52 @@ Description: · 32 unmodified lines | ||
| 33 | 33 | Description of the physical chip / device for device X. |
| 34 | 34 | Typically a part number. |
| 35 | 35 | |
| 36 | +What: /sys/bus/iio/devices/iio:deviceX/label | |
| 37 | +KernelVersion: 5.8 | |
| 38 | +Contact: linux-iio@vger.kernel.org | |
| 39 | +Description: | |
| 40 | + Optional symbolic label for a device. | |
| 41 | + This is useful for userspace to be able to better identify an | |
| 42 | + individual device. | |
| 43 | + | |
| 44 | + The contents of the label are free-form, but there are some | |
| 45 | + standardized uses: | |
| 46 | + | |
| 47 | + For proximity sensors which give the proximity (of a person) to | |
| 48 | + a certain wlan or wwan antenna the following standardized labels | |
| 49 | + are used: | |
| 50 | + | |
| 51 | + * "proximity-wifi" | |
| 52 | + * "proximity-lte" | |
| 53 | + * "proximity-wifi-lte" | |
| 54 | + * "proximity-wifi-left" | |
| 55 | + * "proximity-wifi-right" | |
| 56 | + | |
| 57 | + These are used to indicate to userspace that these proximity | |
| 58 | + sensors may be used to tune transmit power to ensure that | |
| 59 | + Specific Absorption Rate (SAR) limits are honored. | |
| 60 | + The "-left" and "-right" labels are for devices with multiple | |
| 61 | + antennas. | |
| 62 | + | |
| 63 | + In some laptops/tablets the standardized proximity sensor labels | |
| 64 | + instead indicate proximity to a specific part of the device: | |
| 65 | + | |
| 66 | + * "proximity-palmrest" indicates proximity to the keyboard's palmrest | |
| 67 | + * "proximity-palmrest-left" indicates proximity to the left part of the palmrest | |
| 68 | + * "proximity-palmrest-right" indicates proximity to the right part of the palmrest | |
| 69 | + * "proximity-lap" indicates the device is being used on someone's lap | |
| 70 | + | |
| 71 | + Note "proximity-lap" is special in that its value may be | |
| 72 | + calculated by firmware from other sensor readings, rather then | |
| 73 | + being a raw sensor reading. | |
| 74 | + | |
| 75 | + For accelerometers used in 2-in-1s with 360° (yoga-style) hinges, | |
| 76 | + which have an accelerometer in both their base and their display, | |
| 77 | + the following standardized labels are used: | |
| 78 | + | |
| 79 | + * "accel-base" | |
| 80 | + * "accel-display" | |
| 81 | + | |
| 36 | 82 | What: /sys/bus/iio/devices/iio:deviceX/current_timestamp_clock |
| 37 | 83 | KernelVersion: 4.5 |
| 38 | 84 | Contact: linux-iio@vger.kernel.org |
| @@ -325,6 +371,7 @@ What: /sys/bus/iio/devices/iio:deviceX/in_humidityrelative_offset · 286 unmodified lines | ||
| 325 | 371 | What: /sys/bus/iio/devices/iio:deviceX/in_magn_offset |
| 326 | 372 | What: /sys/bus/iio/devices/iio:deviceX/in_rot_offset |
| 327 | 373 | What: /sys/bus/iio/devices/iio:deviceX/in_angl_offset |
| 374 | +What: /sys/bus/iio/devices/iio:deviceX/in_capacitanceX_offset | |
| 328 | 375 | KernelVersion: 2.6.35 |
| 329 | 376 | Contact: linux-iio@vger.kernel.org |
| 330 | 377 | Description: |
| @@ -656,6 +703,8 @@ What: /sys/.../iio:deviceX/events/in_voltageY_thresh_falling_en · 325 unmodified lines | ||
| 656 | 703 | What: /sys/.../iio:deviceX/events/in_voltageY_thresh_either_en |
| 657 | 704 | What: /sys/.../iio:deviceX/events/in_tempY_thresh_rising_en |
| 658 | 705 | What: /sys/.../iio:deviceX/events/in_tempY_thresh_falling_en |
| 706 | +What: /sys/.../iio:deviceX/events/in_capacitanceY_thresh_rising_en | |
| 707 | +What: /sys/.../iio:deviceX/events/in_capacitanceY_thresh_falling_en | |
| 659 | 708 | KernelVersion: 2.6.37 |
| 660 | 709 | Contact: linux-iio@vger.kernel.org |
| 661 | 710 | Description: |
| @@ -733,6 +782,32 @@ Description: · 71 unmodified lines | ||
| 733 | 782 | a given event type is enabled a future point (and not those for |
| 734 | 783 | whatever event was previously enabled). |
| 735 | 784 | |
| 785 | +What: /sys/.../events/in_capacitanceY_adaptive_thresh_rising_en | |
| 786 | +What: /sys/.../events/in_capacitanceY_adaptive_thresh_falling_en | |
| 787 | +KernelVersion: 5.13 | |
| 788 | +Contact: linux-iio@vger.kernel.org | |
| 789 | +Descrption: | |
| 790 | + Adaptive thresholds are similar to normal fixed thresholds | |
| 791 | + but the value is expressed as an offset from a value which | |
| 792 | + provides a low frequency approximation of the channel itself. | |
| 793 | + Thus these detect if a rapid change occurs in the specified | |
| 794 | + direction which crosses tracking value + offset. | |
| 795 | + Tracking value calculation is devices specific. | |
| 796 | + | |
| 797 | +What: /sys/.../in_capacitanceY_adaptive_thresh_rising_timeout | |
| 798 | +What: /sys/.../in_capacitanceY_adaptive_thresh_falling_timeout | |
| 799 | +KernelVersion: 5.11 | |
| 800 | +Contact: linux-iio@vger.kernel.org | |
| 801 | +Descrption: | |
| 802 | + When adaptive thresholds are used, the tracking signal | |
| 803 | + may adjust too slowly to step changes in the raw signal. | |
| 804 | + *_timeout (in seconds) specifies a time for which the | |
| 805 | + difference between the slow tracking signal and the raw | |
| 806 | + signal is allowed to remain out-of-range before a reset | |
| 807 | + event occurs in which the tracking signal is made equal | |
| 808 | + to the raw signal, allowing slow tracking to resume and the | |
| 809 | + adaptive threshold event detection to function as expected. | |
| 810 | + | |
| 736 | 811 | What: /sys/.../events/in_accel_thresh_rising_value |
| 737 | 812 | What: /sys/.../events/in_accel_thresh_falling_value |
| 738 | 813 | What: /sys/.../events/in_accel_x_raw_thresh_rising_value |
| @@ -773,6 +848,10 @@ What: /sys/.../events/in_proximity0_thresh_falling_value · 34 unmodified lines | ||
| 773 | 848 | What: /sys/.../events/in_proximity0_thresh_rising_value |
| 774 | 849 | What: /sys/.../events/in_illuminance_thresh_rising_value |
| 775 | 850 | What: /sys/.../events/in_illuminance_thresh_falling_value |
| 851 | +What: /sys/.../events/in_capacitanceY_thresh_rising_value | |
| 852 | +What: /sys/.../events/in_capacitanceY_thresh_falling_value | |
| 853 | +What: /sys/.../events/in_capacitanceY_thresh_adaptive_rising_value | |
| 854 | +What: /sys/.../events/in_capacitanceY_thresh_falling_rising_value | |
| 776 | 855 | KernelVersion: 2.6.37 |
| 777 | 856 | Contact: linux-iio@vger.kernel.org |
| 778 | 857 | Description: |
| @@ -1118,12 +1197,16 @@ Description: · 339 unmodified lines | ||
| 1118 | 1197 | |
| 1119 | 1198 | What: /sys/bus/iio/devices/iio:deviceX/buffer/length |
| 1120 | 1199 | KernelVersion: 2.6.35 |
| 1200 | +What: /sys/bus/iio/devices/iio:deviceX/bufferY/length | |
| 1201 | +KernelVersion: 5.11 | |
| 1121 | 1202 | Contact: linux-iio@vger.kernel.org |
| 1122 | 1203 | Description: |
| 1123 | 1204 | Number of scans contained by the buffer. |
| 1124 | 1205 | |
| 1125 | 1206 | What: /sys/bus/iio/devices/iio:deviceX/buffer/enable |
| 1126 | 1207 | KernelVersion: 2.6.35 |
| 1208 | +What: /sys/bus/iio/devices/iio:deviceX/bufferY/enable | |
| 1209 | +KernelVersion: 5.11 | |
| 1127 | 1210 | Contact: linux-iio@vger.kernel.org |
| 1128 | 1211 | Description: |
| 1129 | 1212 | Actually start the buffer capture up. Will start trigger |
| @@ -1131,11 +1214,16 @@ Description: · 1 unmodified line | ||
| 1131 | 1214 | |
| 1132 | 1215 | What: /sys/bus/iio/devices/iio:deviceX/scan_elements |
| 1133 | 1216 | KernelVersion: 2.6.37 |
| 1217 | +What: /sys/bus/iio/devices/iio:deviceX/bufferY | |
| 1218 | +KernelVersion: 5.11 | |
| 1134 | 1219 | Contact: linux-iio@vger.kernel.org |
| 1135 | 1220 | Description: |
| 1136 | 1221 | Directory containing interfaces for elements that will be |
| 1137 | 1222 | captured for a single triggered sample set in the buffer. |
| 1138 | 1223 | |
| 1224 | + Since kernel 5.11 the scan_elements attributes are merged into | |
| 1225 | + the bufferY directory, to be configurable per buffer. | |
| 1226 | + | |
| 1139 | 1227 | What: /sys/.../iio:deviceX/scan_elements/in_accel_x_en |
| 1140 | 1228 | What: /sys/.../iio:deviceX/scan_elements/in_accel_y_en |
| 1141 | 1229 | What: /sys/.../iio:deviceX/scan_elements/in_accel_z_en |
| @@ -1164,6 +1252,34 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_en · 22 unmodified lines | ||
| 1164 | 1252 | What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_en |
| 1165 | 1253 | What: /sys/.../iio:deviceX/scan_elements/in_proximity_en |
| 1166 | 1254 | KernelVersion: 2.6.37 |
| 1255 | +What: /sys/.../iio:deviceX/bufferY/in_accel_x_en | |
| 1256 | +What: /sys/.../iio:deviceX/bufferY/in_accel_y_en | |
| 1257 | +What: /sys/.../iio:deviceX/bufferY/in_accel_z_en | |
| 1258 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_x_en | |
| 1259 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_y_en | |
| 1260 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_z_en | |
| 1261 | +What: /sys/.../iio:deviceX/bufferY/in_magn_x_en | |
| 1262 | +What: /sys/.../iio:deviceX/bufferY/in_magn_y_en | |
| 1263 | +What: /sys/.../iio:deviceX/bufferY/in_magn_z_en | |
| 1264 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_en | |
| 1265 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_en | |
| 1266 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_tilt_comp_en | |
| 1267 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_tilt_comp_en | |
| 1268 | +What: /sys/.../iio:deviceX/bufferY/in_timestamp_en | |
| 1269 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_en | |
| 1270 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_en | |
| 1271 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY-voltageZ_en | |
| 1272 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_en | |
| 1273 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_en | |
| 1274 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_i_en | |
| 1275 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_q_en | |
| 1276 | +What: /sys/.../iio:deviceX/bufferY/in_incli_x_en | |
| 1277 | +What: /sys/.../iio:deviceX/bufferY/in_incli_y_en | |
| 1278 | +What: /sys/.../iio:deviceX/bufferY/in_pressureY_en | |
| 1279 | +What: /sys/.../iio:deviceX/bufferY/in_pressure_en | |
| 1280 | +What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_en | |
| 1281 | +What: /sys/.../iio:deviceX/bufferY/in_proximity_en | |
| 1282 | +KernelVersion: 5.11 | |
| 1167 | 1283 | Contact: linux-iio@vger.kernel.org |
| 1168 | 1284 | Description: |
| 1169 | 1285 | Scan element control for triggered data capture. |
| @@ -1185,6 +1301,23 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_type · 15 unmodified lines | ||
| 1185 | 1301 | What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_type |
| 1186 | 1302 | What: /sys/.../iio:deviceX/scan_elements/in_proximity_type |
| 1187 | 1303 | KernelVersion: 2.6.37 |
| 1304 | +What: /sys/.../iio:deviceX/bufferY/in_accel_type | |
| 1305 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_type | |
| 1306 | +What: /sys/.../iio:deviceX/bufferY/in_magn_type | |
| 1307 | +What: /sys/.../iio:deviceX/bufferY/in_incli_type | |
| 1308 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_type | |
| 1309 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_type | |
| 1310 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_type | |
| 1311 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_type | |
| 1312 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_type | |
| 1313 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_i_type | |
| 1314 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_q_type | |
| 1315 | +What: /sys/.../iio:deviceX/bufferY/in_timestamp_type | |
| 1316 | +What: /sys/.../iio:deviceX/bufferY/in_pressureY_type | |
| 1317 | +What: /sys/.../iio:deviceX/bufferY/in_pressure_type | |
| 1318 | +What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_type | |
| 1319 | +What: /sys/.../iio:deviceX/bufferY/in_proximity_type | |
| 1320 | +KernelVersion: 5.11 | |
| 1188 | 1321 | Contact: linux-iio@vger.kernel.org |
| 1189 | 1322 | Description: |
| 1190 | 1323 | Description of the scan element data storage within the buffer |
| @@ -1241,6 +1374,33 @@ What: /sys/.../iio:deviceX/scan_elements/in_pressure_index · 50 unmodified lines | ||
| 1241 | 1374 | What: /sys/.../iio:deviceX/scan_elements/in_rot_quaternion_index |
| 1242 | 1375 | What: /sys/.../iio:deviceX/scan_elements/in_proximity_index |
| 1243 | 1376 | KernelVersion: 2.6.37 |
| 1377 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_index | |
| 1378 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_supply_index | |
| 1379 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_i_index | |
| 1380 | +What: /sys/.../iio:deviceX/bufferY/in_voltageY_q_index | |
| 1381 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_i_index | |
| 1382 | +What: /sys/.../iio:deviceX/bufferY/in_voltage_q_index | |
| 1383 | +What: /sys/.../iio:deviceX/bufferY/in_accel_x_index | |
| 1384 | +What: /sys/.../iio:deviceX/bufferY/in_accel_y_index | |
| 1385 | +What: /sys/.../iio:deviceX/bufferY/in_accel_z_index | |
| 1386 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_x_index | |
| 1387 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_y_index | |
| 1388 | +What: /sys/.../iio:deviceX/bufferY/in_anglvel_z_index | |
| 1389 | +What: /sys/.../iio:deviceX/bufferY/in_magn_x_index | |
| 1390 | +What: /sys/.../iio:deviceX/bufferY/in_magn_y_index | |
| 1391 | +What: /sys/.../iio:deviceX/bufferY/in_magn_z_index | |
| 1392 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_index | |
| 1393 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_index | |
| 1394 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_magnetic_tilt_comp_index | |
| 1395 | +What: /sys/.../iio:deviceX/bufferY/in_rot_from_north_true_tilt_comp_index | |
| 1396 | +What: /sys/.../iio:deviceX/bufferY/in_incli_x_index | |
| 1397 | +What: /sys/.../iio:deviceX/bufferY/in_incli_y_index | |
| 1398 | +What: /sys/.../iio:deviceX/bufferY/in_timestamp_index | |
| 1399 | +What: /sys/.../iio:deviceX/bufferY/in_pressureY_index | |
| 1400 | +What: /sys/.../iio:deviceX/bufferY/in_pressure_index | |
| 1401 | +What: /sys/.../iio:deviceX/bufferY/in_rot_quaternion_index | |
| 1402 | +What: /sys/.../iio:deviceX/bufferY/in_proximity_index | |
| 1403 | +KernelVersion: 5.11 | |
| 1244 | 1404 | Contact: linux-iio@vger.kernel.org |
| 1245 | 1405 | Description: |
| 1246 | 1406 | A single positive integer specifying the position of this |
| @@ -1455,6 +1615,8 @@ Description: · 208 unmodified lines | ||
| 1455 | 1615 | |
| 1456 | 1616 | What: /sys/bus/iio/devices/iio:deviceX/buffer/watermark |
| 1457 | 1617 | KernelVersion: 4.2 |
| 1618 | +What: /sys/bus/iio/devices/iio:deviceX/bufferY/watermark | |
| 1619 | +KernelVersion: 5.11 | |
| 1458 | 1620 | Contact: linux-iio@vger.kernel.org |
| 1459 | 1621 | Description: |
| 1460 | 1622 | A single positive integer specifying the maximum number of scan |
| @@ -1473,6 +1635,8 @@ Description: · 12 unmodified lines | ||
| 1473 | 1635 | |
| 1474 | 1636 | What: /sys/bus/iio/devices/iio:deviceX/buffer/data_available |
| 1475 | 1637 | KernelVersion: 4.16 |
| 1638 | +What: /sys/bus/iio/devices/iio:deviceX/bufferY/data_available | |
| 1639 | +KernelVersion: 5.11 | |
| 1476 | 1640 | Contact: linux-iio@vger.kernel.org |
| 1477 | 1641 | Description: |
| 1478 | 1642 | A read-only value indicating the bytes of data available in the |
| @@ -1823,3 +1987,12 @@ Description: · 344 unmodified lines | ||
| 1823 | 1987 | hinge, keyboard, screen. It means the three channels |
| 1824 | 1988 | each correspond respectively to hinge angle, keyboard angle, |
| 1825 | 1989 | and screen angle. |
| 1990 | + | |
| 1991 | +What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_hysteresis_relative | |
| 1992 | +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_hysteresis_relative | |
| 1993 | +KernelVersion: 5.12 | |
| 1994 | +Contact: linux-iio@vger.kernel.org | |
| 1995 | +Description: | |
| 1996 | + Specify the percent for light sensor relative to the channel | |
| 1997 | + absolute value that a data field should change before an event | |
| 1998 | + is generated. Units are a percentage of the prior reading. | |
| @@ -1,133 +0,0 @@ | ||
| 1 | −What: /sys/bus/iio/devices/iio:deviceX/in_count_count_mode_available | |
| 2 | −What: /sys/bus/iio/devices/iio:deviceX/in_count_noise_error_available | |
| 3 | −What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available | |
| 4 | −What: /sys/bus/iio/devices/iio:deviceX/in_index_index_polarity_available | |
| 5 | −What: /sys/bus/iio/devices/iio:deviceX/in_index_synchronous_mode_available | |
| 6 | −KernelVersion: 4.10 | |
| 7 | −Contact: linux-iio@vger.kernel.org | |
| 8 | −Description: | |
| 9 | − This interface is deprecated; please use the Counter subsystem. | |
| 10 | − | |
| 11 | − Discrete set of available values for the respective counter | |
| 12 | − configuration are listed in this file. | |
| 13 | − | |
| 14 | −What: /sys/bus/iio/devices/iio:deviceX/in_countY_count_mode | |
| 15 | −KernelVersion: 4.10 | |
| 16 | −Contact: linux-iio@vger.kernel.org | |
| 17 | −Description: | |
| 18 | − This interface is deprecated; please use the Counter subsystem. | |
| 19 | − | |
| 20 | − Count mode for channel Y. Four count modes are available: | |
| 21 | − normal, range limit, non-recycle, and modulo-n. The preset value | |
| 22 | − for channel Y is used by the count mode where required. | |
| 23 | − | |
| 24 | − Normal: | |
| 25 | − Counting is continuous in either direction. | |
| 26 | − | |
| 27 | − Range Limit: | |
| 28 | − An upper or lower limit is set, mimicking limit switches | |
| 29 | − in the mechanical counterpart. The upper limit is set to | |
| 30 | − the preset value, while the lower limit is set to 0. The | |
| 31 | − counter freezes at count = preset when counting up, and | |
| 32 | − at count = 0 when counting down. At either of these | |
| 33 | − limits, the counting is resumed only when the count | |
| 34 | − direction is reversed. | |
| 35 | − | |
| 36 | − Non-recycle: | |
| 37 | − Counter is disabled whenever a 24-bit count overflow or | |
| 38 | − underflow takes place. The counter is re-enabled when a | |
| 39 | − new count value is loaded to the counter via a preset | |
| 40 | − operation or write to raw. | |
| 41 | − | |
| 42 | − Modulo-N: | |
| 43 | − A count boundary is set between 0 and the preset value. | |
| 44 | − The counter is reset to 0 at count = preset when | |
| 45 | − counting up, while the counter is set to the preset | |
| 46 | − value at count = 0 when counting down; the counter does | |
| 47 | − not freeze at the bundary points, but counts | |
| 48 | − continuously throughout. | |
| 49 | − | |
| 50 | −What: /sys/bus/iio/devices/iio:deviceX/in_countY_noise_error | |
| 51 | −KernelVersion: 4.10 | |
| 52 | −Contact: linux-iio@vger.kernel.org | |
| 53 | −Description: | |
| 54 | − This interface is deprecated; please use the Counter subsystem. | |
| 55 | − | |
| 56 | − Read-only attribute that indicates whether excessive noise is | |
| 57 | − present at the channel Y count inputs in quadrature clock mode; | |
| 58 | − irrelevant in non-quadrature clock mode. | |
| 59 | − | |
| 60 | −What: /sys/bus/iio/devices/iio:deviceX/in_countY_preset | |
| 61 | −KernelVersion: 4.10 | |
| 62 | −Contact: linux-iio@vger.kernel.org | |
| 63 | −Description: | |
| 64 | − This interface is deprecated; please use the Counter subsystem. | |
| 65 | − | |
| 66 | − If the counter device supports preset registers, the preset | |
| 67 | − count for channel Y is provided by this attribute. | |
| 68 | − | |
| 69 | −What: /sys/bus/iio/devices/iio:deviceX/in_countY_quadrature_mode | |
| 70 | −KernelVersion: 4.10 | |
| 71 | −Contact: linux-iio@vger.kernel.org | |
| 72 | −Description: | |
| 73 | − This interface is deprecated; please use the Counter subsystem. | |
| 74 | − | |
| 75 | − Configure channel Y counter for non-quadrature or quadrature | |
| 76 | − clock mode. Selecting non-quadrature clock mode will disable | |
| 77 | − synchronous load mode. In quadrature clock mode, the channel Y | |
| 78 | − scale attribute selects the encoder phase division (scale of 1 | |
| 79 | − selects full-cycle, scale of 0.5 selects half-cycle, scale of | |
| 80 | − 0.25 selects quarter-cycle) processed by the channel Y counter. | |
| 81 | − | |
| 82 | − Non-quadrature: | |
| 83 | − The filter and decoder circuit are bypassed. Encoder A | |
| 84 | − input serves as the count input and B as the UP/DOWN | |
| 85 | − direction control input, with B = 1 selecting UP Count | |
| 86 | − mode and B = 0 selecting Down Count mode. | |
| 87 | − | |
| 88 | − Quadrature: | |
| 89 | − Encoder A and B inputs are digitally filtered and | |
| 90 | − decoded for UP/DN clock. | |
| 91 | − | |
| 92 | −What: /sys/bus/iio/devices/iio:deviceX/in_countY_set_to_preset_on_index | |
| 93 | −KernelVersion: 4.10 | |
| 94 | −Contact: linux-iio@vger.kernel.org | |
| 95 | −Description: | |
| 96 | − This interface is deprecated; please use the Counter subsystem. | |
| 97 | − | |
| 98 | − Whether to set channel Y counter with channel Y preset value | |
| 99 | − when channel Y index input is active, or continuously count. | |
| 100 | − Valid attribute values are boolean. | |
| 101 | − | |
| 102 | −What: /sys/bus/iio/devices/iio:deviceX/in_indexY_index_polarity | |
| 103 | −KernelVersion: 4.10 | |
| 104 | −Contact: linux-iio@vger.kernel.org | |
| 105 | −Description: | |
| 106 | − This interface is deprecated; please use the Counter subsystem. | |
| 107 | − | |
| 108 | − Active level of channel Y index input; irrelevant in | |
| 109 | − non-synchronous load mode. | |
| 110 | − | |
| 111 | −What: /sys/bus/iio/devices/iio:deviceX/in_indexY_synchronous_mode | |
| 112 | −KernelVersion: 4.10 | |
| 113 | −Contact: linux-iio@vger.kernel.org | |
| 114 | −Description: | |
| 115 | − This interface is deprecated; please use the Counter subsystem. | |
| 116 | − | |
| 117 | − Configure channel Y counter for non-synchronous or synchronous | |
| 118 | − load mode. Synchronous load mode cannot be selected in | |
| 119 | − non-quadrature clock mode. | |
| 120 | − | |
| 121 | − Non-synchronous: | |
| 122 | − A logic low level is the active level at this index | |
| 123 | − input. The index function (as enabled via | |
| 124 | − set_to_preset_on_index) is performed directly on the | |
| 125 | − active level of the index input. | |
| 126 | − | |
| 127 | − Synchronous: | |
| 128 | − Intended for interfacing with encoder Index output in | |
| 129 | − quadrature clock mode. The active level is configured | |
| 130 | − via index_polarity. The index function (as enabled via | |
| 131 | − set_to_preset_on_index) is performed synchronously with | |
| 132 | − the quadrature clock on the active level of the index | |
| 133 | − input. | |
| @@ -1,11 +1,3 @@ | ||
| 1 | −What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity | |
| 2 | −Date: January 2017 | |
| 3 | −KernelVersion: 4.11 | |
| 4 | −Contact: linux-iio@vger.kernel.org | |
| 5 | −Description: | |
| 6 | − Show or set the gain boost of the amp, from 0-31 range. | |
| 7 | − default 31 | |
| 8 | − | |
| 9 | 1 | What: /sys/bus/iio/devices/iio:deviceX/sensor_max_range |
| 10 | 2 | Date: January 2017 |
| 11 | 3 | KernelVersion: 4.11 |
| @@ -6,4 +6,5 @@ Description: · 5 unmodified lines | ||
| 6 | 6 | Controls the heater device within the humidity sensor to get |
| 7 | 7 | rid of excess condensation. |
| 8 | 8 | |
| 9 | − Valid control values are 0 = OFF, and 1 = ON. | |
| 9 | + In some devices, this is just a switch in which case 0 = OFF, | |
| 10 | + and 1 = ON. | |
| @@ -1,9 +0,0 @@ | ||
| 1 | −What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw | |
| 2 | −What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw_available | |
| 3 | −KernelVersion: 4.3 | |
| 4 | −Contact: linux-iio@vger.kernel.org | |
| 5 | −Description: | |
| 6 | − Controls the heater device within the humidity sensor to get | |
| 7 | − rid of excess condensation. | |
| 8 | − | |
| 9 | − Valid control values are 0 = OFF, and 1 = ON. | |
| @@ -1,62 +0,0 @@ | ||
| 1 | −What: /sys/bus/iio/devices/iio:deviceX/in_count0_preset | |
| 2 | −KernelVersion: 4.13 | |
| 3 | −Contact: fabrice.gasnier@st.com | |
| 4 | −Description: | |
| 5 | − Reading returns the current preset value. Writing sets the | |
| 6 | − preset value. Encoder counts continuously from 0 to preset | |
| 7 | − value, depending on direction (up/down). | |
| 8 | − | |
| 9 | −What: /sys/bus/iio/devices/iio:deviceX/in_count_quadrature_mode_available | |
| 10 | −KernelVersion: 4.13 | |
| 11 | −Contact: fabrice.gasnier@st.com | |
| 12 | −Description: | |
| 13 | − Reading returns the list possible quadrature modes. | |
| 14 | − | |
| 15 | −What: /sys/bus/iio/devices/iio:deviceX/in_count0_quadrature_mode | |
| 16 | −KernelVersion: 4.13 | |
| 17 | −Contact: fabrice.gasnier@st.com | |
| 18 | −Description: | |
| 19 | − Configure the device counter quadrature modes: | |
| 20 | − | |
| 21 | − - non-quadrature: | |
| 22 | − Encoder IN1 input servers as the count input (up | |
| 23 | − direction). | |
| 24 | − | |
| 25 | − - quadrature: | |
| 26 | − Encoder IN1 and IN2 inputs are mixed to get direction | |
| 27 | − and count. | |
| 28 | − | |
| 29 | −What: /sys/bus/iio/devices/iio:deviceX/in_count_polarity_available | |
| 30 | −KernelVersion: 4.13 | |
| 31 | −Contact: fabrice.gasnier@st.com | |
| 32 | −Description: | |
| 33 | − Reading returns the list possible active edges. | |
| 34 | − | |
| 35 | −What: /sys/bus/iio/devices/iio:deviceX/in_count0_polarity | |
| 36 | −KernelVersion: 4.13 | |
| 37 | −Contact: fabrice.gasnier@st.com | |
| 38 | −Description: | |
| 39 | − Configure the device encoder/counter active edge: | |
| 40 | − | |
| 41 | − - rising-edge | |
| 42 | − - falling-edge | |
| 43 | − - both-edges | |
| 44 | − | |
| 45 | − In non-quadrature mode, device counts up on active edge. | |
| 46 | − | |
| 47 | − In quadrature mode, encoder counting scenarios are as follows: | |
| 48 | − | |
| 49 | − +---------+----------+--------------------+--------------------+ | |
| 50 | − | Active | Level on | IN1 signal | IN2 signal | | |
| 51 | − | edge | opposite +----------+---------+----------+---------+ | |
| 52 | − | | signal | Rising | Falling | Rising | Falling | | |
| 53 | − +---------+----------+----------+---------+----------+---------+ | |
| 54 | − | Rising | High -> | Down | - | Up | - | | |
| 55 | − | edge | Low -> | Up | - | Down | - | | |
| 56 | − +---------+----------+----------+---------+----------+---------+ | |
| 57 | − | Falling | High -> | - | Up | - | Down | | |
| 58 | − | edge | Low -> | - | Down | - | Up | | |
| 59 | − +---------+----------+----------+---------+----------+---------+ | |
| 60 | − | Both | High -> | Down | Up | Up | Down | | |
| 61 | − | edges | Low -> | Up | Down | Down | Up | | |
| 62 | − +---------+----------+----------+---------+----------+---------+ | |
| @@ -8,3 +8,17 @@ Description: · 7 unmodified lines | ||
| 8 | 8 | considered close to the device. If the value read from the |
| 9 | 9 | sensor is above or equal to the value in this file an object |
| 10 | 10 | should typically be considered near. |
| 11 | + | |
| 12 | +What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity | |
| 13 | +Date: March 2014 | |
| 14 | +KernelVersion: 3.15 | |
| 15 | +Contact: linux-iio@vger.kernel.org | |
| 16 | +Description: | |
| 17 | + Proximity sensors sometimes have a controllable amplifier | |
| 18 | + on the signal from which time of flight measurements are | |
| 19 | + taken. | |
| 20 | + The appropriate values to take is dependent on both the | |
| 21 | + sensor and it's operating environment: | |
| 22 | + * as3935 (0-31 range) | |
| 23 | + 18 = indoors (default) | |
| 24 | + 14 = outdoors | |
| @@ -6,15 +6,6 @@ Description: · 5 unmodified lines | ||
| 6 | 6 | Get the current distance in meters of storm (1km steps) |
| 7 | 7 | 1000-40000 = distance in meters |
| 8 | 8 | |
| 9 | −What: /sys/bus/iio/devices/iio:deviceX/sensor_sensitivity | |
| 10 | −Date: March 2014 | |
| 11 | −KernelVersion: 3.15 | |
| 12 | −Contact: Matt Ranostay <matt.ranostay@konsulko.com> | |
| 13 | −Description: | |
| 14 | − Show or set the gain boost of the amp, from 0-31 range. | |
| 15 | − 18 = indoors (default) | |
| 16 | − 14 = outdoors | |
| 17 | − | |
| 18 | 9 | What /sys/bus/iio/devices/iio:deviceX/noise_level_tripped |
| 19 | 10 | Date: May 2017 |
| 20 | 11 | KernelVersion: 4.13 |
| @@ -195,10 +195,13 @@ What: /sys/bus/pci/devices/.../index · 194 unmodified lines | ||
| 195 | 195 | Date: July 2010 |
| 196 | 196 | Contact: Narendra K <narendra_k@dell.com>, linux-bugs@dell.com |
| 197 | 197 | Description: |
| 198 | − Reading this attribute will provide the firmware | |
| 199 | − given instance (SMBIOS type 41 device type instance) of the | |
| 200 | − PCI device. The attribute will be created only if the firmware | |
| 201 | − has given an instance number to the PCI device. | |
| 198 | + Reading this attribute will provide the firmware given instance | |
| 199 | + number of the PCI device. Depending on the platform this can | |
| 200 | + be for example the SMBIOS type 41 device type instance or the | |
| 201 | + user-defined ID (UID) on s390. The attribute will be created | |
| 202 | + only if the firmware has given an instance number to the PCI | |
| 203 | + device and that number is guaranteed to uniquely identify the | |
| 204 | + device in the system. | |
| 202 | 205 | Users: |
| 203 | 206 | Userspace applications interested in knowing the |
| 204 | 207 | firmware assigned device type instance of the PCI |
| @@ -375,3 +378,32 @@ Description: · 170 unmodified lines | ||
| 375 | 378 | The value comes from the PCI kernel device state and can be one |
| 376 | 379 | of: "unknown", "error", "D0", D1", "D2", "D3hot", "D3cold". |
| 377 | 380 | The file is read only. |
| 381 | + | |
| 382 | +What: /sys/bus/pci/devices/.../sriov_vf_total_msix | |
| 383 | +Date: January 2021 | |
| 384 | +Contact: Leon Romanovsky <leonro@nvidia.com> | |
| 385 | +Description: | |
| 386 | + This file is associated with a SR-IOV physical function (PF). | |
| 387 | + It contains the total number of MSI-X vectors available for | |
| 388 | + assignment to all virtual functions (VFs) associated with PF. | |
| 389 | + The value will be zero if the device doesn't support this | |
| 390 | + functionality. For supported devices, the value will be | |
| 391 | + constant and won't be changed after MSI-X vectors assignment. | |
| 392 | + | |
| 393 | +What: /sys/bus/pci/devices/.../sriov_vf_msix_count | |
| 394 | +Date: January 2021 | |
| 395 | +Contact: Leon Romanovsky <leonro@nvidia.com> | |
| 396 | +Description: | |
| 397 | + This file is associated with a SR-IOV virtual function (VF). | |
| 398 | + It allows configuration of the number of MSI-X vectors for | |
| 399 | + the VF. This allows devices that have a global pool of MSI-X | |
| 400 | + vectors to optimally divide them between VFs based on VF usage. | |
| 401 | + | |
| 402 | + The values accepted are: | |
| 403 | + * > 0 - this number will be reported as the Table Size in the | |
| 404 | + VF's MSI-X capability | |
| 405 | + * < 0 - not valid | |
| 406 | + * = 0 - will reset to the device default value | |
| 407 | + | |
| 408 | + The file is writable if the PF is bound to a driver that | |
| 409 | + implements ->sriov_set_msix_vec_count(). | |
| @@ -1,4 +1,5 @@ | ||
| 1 | −What: /sys/devices/pci0000:00/*/QEMU0001:00/capability | |
| 1 | +What: /sys/devices/pci0000:00/*/QEMU0001:00/capability for MMIO | |
| 2 | + /sys/bus/pci/drivers/pvpanic-pci/0000:00:0*.0/capability for PCI | |
| 2 | 3 | Date: Jan 2021 |
| 3 | 4 | Contact: zhenwei pi <pizhenwei@bytedance.com> |
| 4 | 5 | Description: |
| @@ -12,6 +13,7 @@ Description: · 7 unmodified lines | ||
| 12 | 13 | https://git.qemu.org/?p=qemu.git;a=blob_plain;f=docs/specs/pvpanic.txt |
| 13 | 14 | |
| 14 | 15 | What: /sys/devices/pci0000:00/*/QEMU0001:00/events |
| 16 | + /sys/bus/pci/drivers/pvpanic-pci/0000:00:0*.0/events for PCI | |
| 15 | 17 | Date: Jan 2021 |
| 16 | 18 | Contact: zhenwei pi <pizhenwei@bytedance.com> |
| 17 | 19 | Description: |
| @@ -1,31 +1,3 @@ | ||
| 1 | −What: /sys/bus/thunderbolt/devices/<xdomain>/rx_speed | |
| 2 | −Date: Feb 2021 | |
| 3 | −KernelVersion: 5.11 | |
| 4 | −Contact: Isaac Hazan <isaac.hazan@intel.com> | |
| 5 | −Description: This attribute reports the XDomain RX speed per lane. | |
| 6 | − All RX lanes run at the same speed. | |
| 7 | − | |
| 8 | −What: /sys/bus/thunderbolt/devices/<xdomain>/rx_lanes | |
| 9 | −Date: Feb 2021 | |
| 10 | −KernelVersion: 5.11 | |
| 11 | −Contact: Isaac Hazan <isaac.hazan@intel.com> | |
| 12 | −Description: This attribute reports the number of RX lanes the XDomain | |
| 13 | − is using simultaneously through its upstream port. | |
| 14 | − | |
| 15 | −What: /sys/bus/thunderbolt/devices/<xdomain>/tx_speed | |
| 16 | −Date: Feb 2021 | |
| 17 | −KernelVersion: 5.11 | |
| 18 | −Contact: Isaac Hazan <isaac.hazan@intel.com> | |
| 19 | −Description: This attribute reports the XDomain TX speed per lane. | |
| 20 | − All TX lanes run at the same speed. | |
| 21 | − | |
| 22 | −What: /sys/bus/thunderbolt/devices/<xdomain>/tx_lanes | |
| 23 | −Date: Feb 2021 | |
| 24 | −KernelVersion: 5.11 | |
| 25 | −Contact: Isaac Hazan <isaac.hazan@intel.com> | |
| 26 | −Description: This attribute reports number of TX lanes the XDomain | |
| 27 | − is using simultaneously through its upstream port. | |
| 28 | − | |
| 29 | 1 | What: /sys/bus/thunderbolt/devices/.../domainX/boot_acl |
| 30 | 2 | Date: Jun 2018 |
| 31 | 3 | KernelVersion: 4.17 |
| @@ -162,6 +134,13 @@ Contact: thunderbolt-software@lists.01.org · 130 unmodified lines | ||
| 162 | 134 | Description: This attribute contains name of this device extracted from |
| 163 | 135 | the device DROM. |
| 164 | 136 | |
| 137 | +What: /sys/bus/thunderbolt/devices/.../maxhopid | |
| 138 | +Date: Jul 2021 | |
| 139 | +KernelVersion: 5.13 | |
| 140 | +Contact: Mika Westerberg <mika.westerberg@linux.intel.com> | |
| 141 | +Description: Only set for XDomains. The maximum HopID the other host | |
| 142 | + supports as its input HopID. | |
| 143 | + | |
| 165 | 144 | What: /sys/bus/thunderbolt/devices/.../rx_speed |
| 166 | 145 | Date: Jan 2020 |
| 167 | 146 | KernelVersion: 5.5 |
| @@ -97,10 +97,7 @@ Description: · 96 unmodified lines | ||
| 97 | 97 | object. The values are represented in ms. If the value is |
| 98 | 98 | less than 1 jiffy, it is considered to be 0, which means |
| 99 | 99 | no polling. This value is meaningless if the governor is |
| 100 | − not polling; thus. If the governor is not using | |
| 101 | − devfreq-provided central polling | |
| 102 | − (/sys/class/devfreq/.../central_polling is 0), this value | |
| 103 | − may be useless. | |
| 100 | + not polling. | |
| 104 | 101 | |
| 105 | 102 | A list of governors that support the node: |
| 106 | 103 | - simple_ondmenad |
| @@ -51,3 +51,15 @@ Description: · 50 unmodified lines | ||
| 51 | 51 | Boolean value indicating whether the PHY device is used in |
| 52 | 52 | standalone mode, without a net_device associated, by PHYLINK. |
| 53 | 53 | Attribute created only when this is the case. |
| 54 | + | |
| 55 | +What: /sys/class/mdio_bus/<bus>/<device>/phy_dev_flags | |
| 56 | +Date: March 2021 | |
| 57 | +KernelVersion: 5.13 | |
| 58 | +Contact: netdev@vger.kernel.org | |
| 59 | +Description: | |
| 60 | + 32-bit hexadecimal number representing a bit mask of the | |
| 61 | + configuration bits passed from the consumer of the PHY | |
| 62 | + (Ethernet MAC, switch, etc.) to the PHY driver. The flags are | |
| 63 | + only used internally by the kernel and their placement are | |
| 64 | + not meant to be stable across kernel versions. This is intended | |
| 65 | + for facilitating the debugging of PHY drivers. | |
| @@ -58,3 +58,19 @@ Description: · 57 unmodified lines | ||
| 58 | 58 | |
| 59 | 59 | Indicates the mux id associated to the qmimux network interface |
| 60 | 60 | during its creation. |
| 61 | + | |
| 62 | +What: /sys/class/net/<iface>/qmi/pass_through | |
| 63 | +Date: January 2021 | |
| 64 | +KernelVersion: 5.12 | |
| 65 | +Contact: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org> | |
| 66 | +Description: | |
| 67 | + Boolean. Default: 'N' | |
| 68 | + | |
| 69 | + Set this to 'Y' to enable 'pass-through' mode, allowing packets | |
| 70 | + in MAP format to be passed on to the stack. | |
| 71 | + | |
| 72 | + Normally the rmnet driver (CONFIG_RMNET) is then used to process | |
| 73 | + and demultiplex these packets. | |
| 74 | + | |
| 75 | + 'Pass-through' mode can be enabled when the device is in | |
| 76 | + 'raw-ip' mode only. | |
| @@ -0,0 +1,15 @@ | ||
| 1 | +What: /sys/class/power_supply/<supply_name>/alarm | |
| 2 | +Date: April 2021 | |
| 3 | +KernelVersion: 5.13 | |
| 4 | +Contact: Maximilian Luz <luzmaximilian@gmail.com> | |
| 5 | +Description: | |
| 6 | + Battery trip point. When the remaining battery capacity crosses this | |
| 7 | + value in either direction, the system will be notified and if | |
| 8 | + necessary woken. | |
| 9 | + | |
| 10 | + Set to zero to clear/disable. | |
| 11 | + | |
| 12 | + Access: Read, Write | |
| 13 | + | |
| 14 | + Valid values: In micro-Wh or micro-Ah, depending on the power unit | |
| 15 | + of the battery | |
| @@ -85,6 +85,19 @@ Description: Expected format is the following:: · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | By default "rw" is used. |
| 87 | 87 | |
| 88 | + nr_poll_queues | |
| 89 | + specifies the number of poll-mode queues. If the IO has HIPRI flag, | |
| 90 | + the block-layer will send the IO via the poll-mode queue. | |
| 91 | + For fast network and device the polling is faster than interrupt-base | |
| 92 | + IO handling because it saves time for context switching, switching to | |
| 93 | + another process, handling the interrupt and switching back to the | |
| 94 | + issuing process. | |
| 95 | + | |
| 96 | + Set -1 if you want to set it as the number of CPUs | |
| 97 | + By default rnbd client creates only irq-mode queues. | |
| 98 | + | |
| 99 | + NOTICE: MUST make a unique session for a device using the poll-mode queues. | |
| 100 | + | |
| 88 | 101 | Exit Codes: |
| 89 | 102 | |
| 90 | 103 | If the device is already mapped it will fail with EEXIST. If the input |
| @@ -34,6 +34,9 @@ Description: Multipath policy specifies which path should be selected on each IO · 33 unmodified lines | ||
| 34 | 34 | min-inflight (1): |
| 35 | 35 | select path with minimum inflights. |
| 36 | 36 | |
| 37 | + min-latency (2): | |
| 38 | + select path with minimum latency. | |
| 39 | + | |
| 37 | 40 | What: /sys/class/rtrs-client/<session-name>/paths/ |
| 38 | 41 | Date: Feb 2020 |
| 39 | 42 | KernelVersion: 5.7 |
| @@ -95,6 +98,15 @@ KernelVersion: 5.7 · 55 unmodified lines | ||
| 95 | 98 | Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> |
| 96 | 99 | Description: RO, Contains the destination address of the path |
| 97 | 100 | |
| 101 | +What: /sys/class/rtrs-client/<session-name>/paths/<src@dst>/cur_latency | |
| 102 | +Date: Feb 2020 | |
| 103 | +KernelVersion: 5.7 | |
| 104 | +Contact: Jack Wang <jinpu.wang@cloud.ionos.com> Danil Kipnis <danil.kipnis@cloud.ionos.com> | |
| 105 | +Description: RO, Contains the latency time calculated by the heart-beat messages. | |
| 106 | + Whenever the client sends heart-beat message, it checks the time gap | |
| 107 | + between sending the heart-beat message and receiving the ACK. | |
| 108 | + This value can be changed regularly. | |
| 109 | + | |
| 98 | 110 | What: /sys/class/rtrs-client/<session-name>/paths/<src@dst>/stats/reset_all |
| 99 | 111 | Date: Feb 2020 |
| 100 | 112 | KernelVersion: 5.7 |
| @@ -285,7 +285,7 @@ Description: Disable L3 cache indices · 284 unmodified lines | ||
| 285 | 285 | |
| 286 | 286 | All AMD processors with L3 caches provide this functionality. |
| 287 | 287 | For details, see BKDGs at |
| 288 | − http://developer.amd.com/documentation/guides/Pages/default.aspx | |
| 288 | + https://www.amd.com/en/support/tech-docs?keyword=bios+kernel | |
| 289 | 289 | |
| 290 | 290 | |
| 291 | 291 | What: /sys/devices/system/cpu/cpufreq/boost |
| @@ -15,3 +15,12 @@ Description: Reports the model identification provided by the touchscreen, fo · 14 unmodified lines | ||
| 15 | 15 | Access: Read |
| 16 | 16 | |
| 17 | 17 | Valid values: Represented as string |
| 18 | + | |
| 19 | +What: /sys/bus/i2c/devices/xxx/type | |
| 20 | +Date: Jan 2021 | |
| 21 | +Contact: linux-input@vger.kernel.org | |
| 22 | +Description: Reports the type identification provided by the touchscreen, for example "PCAP82H80 Series" | |
| 23 | + | |
| 24 | + Access: Read | |
| 25 | + | |
| 26 | + Valid values: Represented as string | |
| @@ -0,0 +1,49 @@ | ||
| 1 | +What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write | |
| 2 | +Date: April 2021 | |
| 3 | +KernelVersion: 5.13 | |
| 4 | +Contact: Gustavo Pimentel <gustavo.pimentel@synopsys.com> | |
| 5 | +Description: Allows the user to enable the PCIe traffic generator which | |
| 6 | + will create write TLPs frames - from the Root Complex to the | |
| 7 | + Endpoint direction or to disable the PCIe traffic generator | |
| 8 | + in all directions. | |
| 9 | + | |
| 10 | + Write y/1/on to enable, n/0/off to disable | |
| 11 | + | |
| 12 | + Usage e.g. | |
| 13 | + echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write | |
| 14 | + or | |
| 15 | + echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write | |
| 16 | + | |
| 17 | + The user can read the current PCIe link throughput generated | |
| 18 | + through this generator in MB/s. | |
| 19 | + | |
| 20 | + Usage e.g. | |
| 21 | + cat /sys/class/misc/dw-xdata-pcie.<device>/write | |
| 22 | + 204 | |
| 23 | + | |
| 24 | + The file is read and write. | |
| 25 | + | |
| 26 | +What: /sys/class/misc/dw-xdata-pcie.<device>/read | |
| 27 | +Date: April 2021 | |
| 28 | +KernelVersion: 5.13 | |
| 29 | +Contact: Gustavo Pimentel <gustavo.pimentel@synopsys.com> | |
| 30 | +Description: Allows the user to enable the PCIe traffic generator which | |
| 31 | + will create read TLPs frames - from the Endpoint to the Root | |
| 32 | + Complex direction or to disable the PCIe traffic generator | |
| 33 | + in all directions. | |
| 34 | + | |
| 35 | + Write y/1/on to enable, n/0/off to disable | |
| 36 | + | |
| 37 | + Usage e.g. | |
| 38 | + echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/read | |
| 39 | + or | |
| 40 | + echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/read | |
| 41 | + | |
| 42 | + The user can read the current PCIe link throughput generated | |
| 43 | + through this generator in MB/s. | |
| 44 | + | |
| 45 | + Usage e.g. | |
| 46 | + cat /sys/class/misc/dw-xdata-pcie.<device>/read | |
| 47 | + 199 | |
| 48 | + | |
| 49 | + The file is read and write. | |
| @@ -39,8 +39,8 @@ Description: · 38 unmodified lines | ||
| 39 | 39 | |
| 40 | 40 | The uv_type entry contains the hub revision number. |
| 41 | 41 | This value can be used to identify the UV system version:: |
| 42 | − "0.*" = Hubless UV ('*' is subtype) | |
| 43 | 42 | |
| 43 | + "0.*" = Hubless UV ('*' is subtype) | |
| 44 | 44 | "3.0" = UV2 |
| 45 | 45 | "5.0" = UV3 |
| 46 | 46 | "7.0" = UV4 |
| @@ -276,7 +276,7 @@ Date April 2019 · 275 unmodified lines | ||
| 276 | 276 | Contact: "Daniel Rosenberg" <drosen@google.com> |
| 277 | 277 | Description: If checkpoint=disable, it displays the number of blocks that |
| 278 | 278 | are unusable. |
| 279 | − If checkpoint=enable it displays the enumber of blocks that | |
| 279 | + If checkpoint=enable it displays the number of blocks that | |
| 280 | 280 | would be unusable if checkpoint=disable were to be set. |
| 281 | 281 | |
| 282 | 282 | What: /sys/fs/f2fs/<disk>/encoding |
| @@ -409,3 +409,32 @@ Description: Give a way to change checkpoint merge daemon's io priority. · 126 unmodified lines | ||
| 409 | 409 | I/O priority "3". We can select the class between "rt" and "be", |
| 410 | 410 | and set the I/O priority within valid range of it. "," delimiter |
| 411 | 411 | is necessary in between I/O class and priority number. |
| 412 | + | |
| 413 | +What: /sys/fs/f2fs/<disk>/ovp_segments | |
| 414 | +Date: March 2021 | |
| 415 | +Contact: "Jaegeuk Kim" <jaegeuk@kernel.org> | |
| 416 | +Description: Shows the number of overprovision segments. | |
| 417 | + | |
| 418 | +What: /sys/fs/f2fs/<disk>/compr_written_block | |
| 419 | +Date: March 2021 | |
| 420 | +Contact: "Daeho Jeong" <daehojeong@google.com> | |
| 421 | +Description: Show the block count written after compression since mount. Note | |
| 422 | + that when the compressed blocks are deleted, this count doesn't | |
| 423 | + decrease. If you write "0" here, you can initialize | |
| 424 | + compr_written_block and compr_saved_block to "0". | |
| 425 | + | |
| 426 | +What: /sys/fs/f2fs/<disk>/compr_saved_block | |
| 427 | +Date: March 2021 | |
| 428 | +Contact: "Daeho Jeong" <daehojeong@google.com> | |
| 429 | +Description: Show the saved block count with compression since mount. Note | |
| 430 | + that when the compressed blocks are deleted, this count doesn't | |
| 431 | + decrease. If you write "0" here, you can initialize | |
| 432 | + compr_written_block and compr_saved_block to "0". | |
| 433 | + | |
| 434 | +What: /sys/fs/f2fs/<disk>/compr_new_inode | |
| 435 | +Date: March 2021 | |
| 436 | +Contact: "Daeho Jeong" <daehojeong@google.com> | |
| 437 | +Description: Show the count of inode newly enabled for compression since mount. | |
| 438 | + Note that when the compression is disabled for the files, this count | |
| 439 | + doesn't decrease. If you write "0" here, you can initialize | |
| 440 | + compr_new_inode to "0". | |
| @@ -0,0 +1,25 @@ | ||
| 1 | +What: /sys/kernel/mm/cma/ | |
| 2 | +Date: Feb 2021 | |
| 3 | +Contact: Minchan Kim <minchan@kernel.org> | |
| 4 | +Description: | |
| 5 | + /sys/kernel/mm/cma/ contains a subdirectory for each CMA | |
| 6 | + heap name (also sometimes called CMA areas). | |
| 7 | + | |
| 8 | + Each CMA heap subdirectory (that is, each | |
| 9 | + /sys/kernel/mm/cma/<cma-heap-name> directory) contains the | |
| 10 | + following items: | |
| 11 | + | |
| 12 | + alloc_pages_success | |
| 13 | + alloc_pages_fail | |
| 14 | + | |
| 15 | +What: /sys/kernel/mm/cma/<cma-heap-name>/alloc_pages_success | |
| 16 | +Date: Feb 2021 | |
| 17 | +Contact: Minchan Kim <minchan@kernel.org> | |
| 18 | +Description: | |
| 19 | + the number of pages CMA API succeeded to allocate | |
| 20 | + | |
| 21 | +What: /sys/kernel/mm/cma/<cma-heap-name>/alloc_pages_fail | |
| 22 | +Date: Feb 2021 | |
| 23 | +Contact: Minchan Kim <minchan@kernel.org> | |
| 24 | +Description: | |
| 25 | + the number of pages CMA API failed to allocate | |
| @@ -0,0 +1,20 @@ | ||
| 1 | +What: /sys/devices/platform/<platform>/etr3 | |
| 2 | +Date: Apr 2021 | |
| 3 | +KernelVersion: 5.13 | |
| 4 | +Contact: "Tomas Winkler" <tomas.winkler@intel.com> | |
| 5 | +Description: | |
| 6 | + The file exposes "Extended Test Mode Register 3" global | |
| 7 | + reset bits. The bits are used during an Intel platform | |
| 8 | + manufacturing process to indicate that consequent reset | |
| 9 | + of the platform is a "global reset". This type of reset | |
| 10 | + is required in order for manufacturing configurations | |
| 11 | + to take effect. | |
| 12 | + | |
| 13 | + Display global reset setting bits for PMC. | |
| 14 | + * bit 31 - global reset is locked | |
| 15 | + * bit 20 - global reset is set | |
| 16 | + Writing bit 20 value to the etr3 will induce | |
| 17 | + a platform "global reset" upon consequent platform reset, | |
| 18 | + in case the register is not locked. | |
| 19 | + The "global reset bit" should be locked on a production | |
| 20 | + system and the file is in read-only mode. | |
| @@ -847,7 +847,7 @@ Symposium on Distributed Computing} · 846 unmodified lines | ||
| 847 | 847 | 'It's entirely possible that the current user could be replaced |
| 848 | 848 | by RCU and/or seqlocks, and we could get rid of brlocks entirely.' |
| 849 | 849 | . |
| 850 | − Steve Hemminger responds by replacing them with RCU. | |
| 850 | + Stephen Hemminger responds by replacing them with RCU. | |
| 851 | 851 | } |
| 852 | 852 | } |
| 853 | 853 | |
| @@ -11,8 +11,8 @@ restrictions without needing to sign the files individually. · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | The LSM is selectable at build-time with ``CONFIG_SECURITY_LOADPIN``, and |
| 13 | 13 | can be controlled at boot-time with the kernel command line option |
| 14 | −"``loadpin.enabled``". By default, it is enabled, but can be disabled at | |
| 15 | −boot ("``loadpin.enabled=0``"). | |
| 14 | +"``loadpin.enforce``". By default, it is enabled, but can be disabled at | |
| 15 | +boot ("``loadpin.enforce=0``"). | |
| 16 | 16 | |
| 17 | 17 | LoadPin starts pinning when it sees the first file loaded. If the |
| 18 | 18 | block device backing the filesystem is not read-only, a sysctl is |
| @@ -28,4 +28,4 @@ different mechanisms such as ``CONFIG_MODULE_SIG`` and · 9 unmodified lines | ||
| 28 | 28 | ``CONFIG_KEXEC_VERIFY_SIG`` to verify kernel module and kernel image while |
| 29 | 29 | still use LoadPin to protect the integrity of other files kernel loads. The |
| 30 | 30 | full list of valid file types can be found in ``kernel_read_file_str`` |
| 31 | −defined in ``include/linux/fs.h``. | |
| 31 | +defined in ``include/linux/kernel_read_file.h``. | |
| @@ -17,6 +17,7 @@ Control Groups version 1 · 16 unmodified lines | ||
| 17 | 17 | hugetlb |
| 18 | 18 | memcg_test |
| 19 | 19 | memory |
| 20 | + misc | |
| 20 | 21 | net_cls |
| 21 | 22 | net_prio |
| 22 | 23 | pids |
| @@ -360,8 +360,8 @@ U != 0, K = unlimited: · 359 unmodified lines | ||
| 360 | 360 | |
| 361 | 361 | U != 0, K < U: |
| 362 | 362 | Kernel memory is a subset of the user memory. This setup is useful in |
| 363 | − deployments where the total amount of memory per-cgroup is overcommited. | |
| 364 | − Overcommiting kernel memory limits is definitely not recommended, since the | |
| 363 | + deployments where the total amount of memory per-cgroup is overcommitted. | |
| 364 | + Overcommitting kernel memory limits is definitely not recommended, since the | |
| 365 | 365 | box can still run out of non-reclaimable memory. |
| 366 | 366 | In this case, the admin could set up K so that the sum of all groups is |
| 367 | 367 | never greater than the total memory, and freely set U at the cost of his |
| @@ -851,6 +851,9 @@ At reading, current status of OOM is shown. · 483 unmodified lines | ||
| 851 | 851 | (if 1, oom-killer is disabled) |
| 852 | 852 | - under_oom 0 or 1 |
| 853 | 853 | (if 1, the memory cgroup is under OOM, tasks may be stopped.) |
| 854 | + - oom_kill integer counter | |
| 855 | + The number of processes belonging to this cgroup killed by any | |
| 856 | + kind of OOM killer. | |
| 854 | 857 | |
| 855 | 858 | 11. Memory Pressure |
| 856 | 859 | =================== |
| @@ -0,0 +1,4 @@ | ||
| 1 | +=============== | |
| 2 | +Misc controller | |
| 3 | +=============== | |
| 4 | +Please refer "Misc" documentation in Documentation/admin-guide/cgroup-v2.rst | |
| @@ -65,8 +65,11 @@ v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgrou · 64 unmodified lines | ||
| 65 | 65 | 5-7-1. RDMA Interface Files |
| 66 | 66 | 5-8. HugeTLB |
| 67 | 67 | 5.8-1. HugeTLB Interface Files |
| 68 | − 5-8. Misc | |
| 69 | − 5-8-1. perf_event | |
| 68 | + 5-9. Misc | |
| 69 | + 5.9-1 Miscellaneous cgroup Interface Files | |
| 70 | + 5.9-2 Migration and Ownership | |
| 71 | + 5-10. Others | |
| 72 | + 5-10-1. perf_event | |
| 70 | 73 | 5-N. Non-normative information |
| 71 | 74 | 5-N-1. CPU controller root cgroup process behaviour |
| 72 | 75 | 5-N-2. IO controller root cgroup process behaviour |
| @@ -2171,6 +2174,72 @@ HugeTLB Interface Files · 2098 unmodified lines | ||
| 2171 | 2174 | Misc |
| 2172 | 2175 | ---- |
| 2173 | 2176 | |
| 2177 | +The Miscellaneous cgroup provides the resource limiting and tracking | |
| 2178 | +mechanism for the scalar resources which cannot be abstracted like the other | |
| 2179 | +cgroup resources. Controller is enabled by the CONFIG_CGROUP_MISC config | |
| 2180 | +option. | |
| 2181 | + | |
| 2182 | +A resource can be added to the controller via enum misc_res_type{} in the | |
| 2183 | +include/linux/misc_cgroup.h file and the corresponding name via misc_res_name[] | |
| 2184 | +in the kernel/cgroup/misc.c file. Provider of the resource must set its | |
| 2185 | +capacity prior to using the resource by calling misc_cg_set_capacity(). | |
| 2186 | + | |
| 2187 | +Once a capacity is set then the resource usage can be updated using charge and | |
| 2188 | +uncharge APIs. All of the APIs to interact with misc controller are in | |
| 2189 | +include/linux/misc_cgroup.h. | |
| 2190 | + | |
| 2191 | +Misc Interface Files | |
| 2192 | +~~~~~~~~~~~~~~~~~~~~ | |
| 2193 | + | |
| 2194 | +Miscellaneous controller provides 3 interface files. If two misc resources (res_a and res_b) are registered then: | |
| 2195 | + | |
| 2196 | + misc.capacity | |
| 2197 | + A read-only flat-keyed file shown only in the root cgroup. It shows | |
| 2198 | + miscellaneous scalar resources available on the platform along with | |
| 2199 | + their quantities:: | |
| 2200 | + | |
| 2201 | + $ cat misc.capacity | |
| 2202 | + res_a 50 | |
| 2203 | + res_b 10 | |
| 2204 | + | |
| 2205 | + misc.current | |
| 2206 | + A read-only flat-keyed file shown in the non-root cgroups. It shows | |
| 2207 | + the current usage of the resources in the cgroup and its children.:: | |
| 2208 | + | |
| 2209 | + $ cat misc.current | |
| 2210 | + res_a 3 | |
| 2211 | + res_b 0 | |
| 2212 | + | |
| 2213 | + misc.max | |
| 2214 | + A read-write flat-keyed file shown in the non root cgroups. Allowed | |
| 2215 | + maximum usage of the resources in the cgroup and its children.:: | |
| 2216 | + | |
| 2217 | + $ cat misc.max | |
| 2218 | + res_a max | |
| 2219 | + res_b 4 | |
| 2220 | + | |
| 2221 | + Limit can be set by:: | |
| 2222 | + | |
| 2223 | + # echo res_a 1 > misc.max | |
| 2224 | + | |
| 2225 | + Limit can be set to max by:: | |
| 2226 | + | |
| 2227 | + # echo res_a max > misc.max | |
| 2228 | + | |
| 2229 | + Limits can be set higher than the capacity value in the misc.capacity | |
| 2230 | + file. | |
| 2231 | + | |
| 2232 | +Migration and Ownership | |
| 2233 | +~~~~~~~~~~~~~~~~~~~~~~~ | |
| 2234 | + | |
| 2235 | +A miscellaneous scalar resource is charged to the cgroup in which it is used | |
| 2236 | +first, and stays charged to that cgroup until that resource is freed. Migrating | |
| 2237 | +a process to a different cgroup does not move the charge to the destination | |
| 2238 | +cgroup where the process has moved. | |
| 2239 | + | |
| 2240 | +Others | |
| 2241 | +------ | |
| 2242 | + | |
| 2174 | 2243 | perf_event |
| 2175 | 2244 | ~~~~~~~~~~ |
| 2176 | 2245 | |
| @@ -714,6 +714,7 @@ DebugData Displays information about active CIFS sessions and · 713 unmodified lines | ||
| 714 | 714 | version. |
| 715 | 715 | Stats Lists summary resource usage information as well as per |
| 716 | 716 | share statistics. |
| 717 | +open_files List all the open file handles on all active SMB sessions. | |
| 717 | 718 | ======================= ======================================================= |
| 718 | 719 | |
| 719 | 720 | Configuration pseudo-files: |
| @@ -794,6 +795,8 @@ LinuxExtensionsEnabled If set to one then the client will attempt to · 74 unmodified lines | ||
| 794 | 795 | support and want to map the uid and gid fields |
| 795 | 796 | to values supplied at mount (rather than the |
| 796 | 797 | actual values, then set this to zero. (default 1) |
| 798 | +dfscache List the content of the DFS cache. | |
| 799 | + If set to 0, the client will clear the cache. | |
| 797 | 800 | ======================= ======================================================= |
| 798 | 801 | |
| 799 | 802 | These experimental features and tracing can be enabled by changing flags in |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | 1 char Memory devices |
| 6 | 6 | 1 = /dev/mem Physical memory access |
| 7 | − 2 = /dev/kmem Kernel virtual memory access | |
| 7 | + 2 = /dev/kmem OBSOLETE - replaced by /proc/kcore | |
| 8 | 8 | 3 = /dev/null Null device |
| 9 | 9 | 4 = /dev/port I/O port access |
| 10 | 10 | 5 = /dev/zero Null byte source |
| @@ -289,7 +289,7 @@ · 278 unmodified lines | ||
| 289 | 289 | 152 = /dev/kpoll Kernel Poll Driver |
| 290 | 290 | 153 = /dev/mergemem Memory merge device |
| 291 | 291 | 154 = /dev/pmu Macintosh PowerBook power manager |
| 292 | − 155 = /dev/isictl MultiTech ISICom serial control | |
| 292 | + 155 = | |
| 293 | 293 | 156 = /dev/lcd Front panel LCD display |
| 294 | 294 | 157 = /dev/ac Applicom Intl Profibus card |
| 295 | 295 | 158 = /dev/nwbutton Netwinder external button |
| @@ -477,11 +477,6 @@ · 181 unmodified lines | ||
| 477 | 477 | 18 block Sanyo CD-ROM |
| 478 | 478 | 0 = /dev/sjcd Sanyo CD-ROM |
| 479 | 479 | |
| 480 | − 19 char Cyclades serial card | |
| 481 | − 0 = /dev/ttyC0 First Cyclades port | |
| 482 | − ... | |
| 483 | − 31 = /dev/ttyC31 32nd Cyclades port | |
| 484 | − | |
| 485 | 480 | 19 block "Double" compressed disk |
| 486 | 481 | 0 = /dev/double0 First compressed disk |
| 487 | 482 | ... |
| @@ -493,11 +488,6 @@ · 5 unmodified lines | ||
| 493 | 488 | See the Double documentation for the meaning of the |
| 494 | 489 | mirror devices. |
| 495 | 490 | |
| 496 | − 20 char Cyclades serial card - alternate devices | |
| 497 | − 0 = /dev/cub0 Callout device for ttyC0 | |
| 498 | − ... | |
| 499 | − 31 = /dev/cub31 Callout device for ttyC31 | |
| 500 | − | |
| 501 | 491 | 20 block Hitachi CD-ROM (under development) |
| 502 | 492 | 0 = /dev/hitcd Hitachi CD-ROM |
| 503 | 493 | |
| @@ -347,7 +347,7 @@ Examples · 346 unmodified lines | ||
| 347 | 347 | <debugfs>/dynamic_debug/control |
| 348 | 348 | |
| 349 | 349 | // enable messages in files of which the paths include string "usb" |
| 350 | − nullarbor:~ # echo -n '*usb* +p' > <debugfs>/dynamic_debug/control | |
| 350 | + nullarbor:~ # echo -n 'file *usb* +p' > <debugfs>/dynamic_debug/control | |
| 351 | 351 | |
| 352 | 352 | // enable all messages |
| 353 | 353 | nullarbor:~ # echo -n '+p' > <debugfs>/dynamic_debug/control |
| @@ -17,17 +17,18 @@ module. · 16 unmodified lines | ||
| 17 | 17 | gpio_mockup_ranges |
| 18 | 18 | |
| 19 | 19 | This parameter takes an argument in the form of an array of integer |
| 20 | − pairs. Each pair defines the base GPIO number (if any) and the number | |
| 21 | − of lines exposed by the chip. If the base GPIO is -1, the gpiolib | |
| 22 | − will assign it automatically. | |
| 20 | + pairs. Each pair defines the base GPIO number (non-negative integer) | |
| 21 | + and the first number after the last of this chip. If the base GPIO | |
| 22 | + is -1, the gpiolib will assign it automatically. while the following | |
| 23 | + parameter is the number of lines exposed by the chip. | |
| 23 | 24 | |
| 24 | − Example: gpio_mockup_ranges=-1,8,-1,16,405,4 | |
| 25 | + Example: gpio_mockup_ranges=-1,8,-1,16,405,409 | |
| 25 | 26 | |
| 26 | 27 | The line above creates three chips. The first one will expose 8 lines, |
| 27 | 28 | the second 16 and the third 4. The base GPIO for the third chip is set |
| 28 | 29 | to 405 while for two first chips it will be assigned automatically. |
| 29 | 30 | |
| 30 | − gpio_named_lines | |
| 31 | + gpio_mockup_named_lines | |
| 31 | 32 | |
| 32 | 33 | This parameter doesn't take any arguments. It lets the driver know that |
| 33 | 34 | GPIO lines exposed by it should be named. |
| @@ -35,7 +35,6 @@ problems and bugs in particular. · 34 unmodified lines | ||
| 35 | 35 | :maxdepth: 1 |
| 36 | 36 | |
| 37 | 37 | reporting-issues |
| 38 | − Reporting bugs (obsolete) <reporting-bugs> | |
| 39 | 38 | security-bugs |
| 40 | 39 | bug-hunting |
| 41 | 40 | bug-bisect |
| @@ -68,6 +68,13 @@ For example one can add to the command line following parameter: · 67 unmodified lines | ||
| 68 | 68 | |
| 69 | 69 | where the final item represents CPUs 100,101,125,126,150,151,... |
| 70 | 70 | |
| 71 | +The value "N" can be used to represent the numerically last CPU on the system, | |
| 72 | +i.e "foo_cpus=16-N" would be equivalent to "16-31" on a 32 core system. | |
| 73 | + | |
| 74 | +Keep in mind that "N" is dynamic, so if system changes cause the bitmap width | |
| 75 | +to change, such as less cores in the CPU list, then N and any ranges using N | |
| 76 | +will also change. Use the same on a small 4 core system, and "16-N" becomes | |
| 77 | +"16-3" and now the same boot input will be flagged as invalid (start > end). | |
| 71 | 78 | |
| 72 | 79 | |
| 73 | 80 | This document may not be entirely up to date and comprehensive. The command |
| @@ -140,6 +147,7 @@ parameter is applicable:: · 66 unmodified lines | ||
| 140 | 147 | PPT Parallel port support is enabled. |
| 141 | 148 | PS2 Appropriate PS/2 support is enabled. |
| 142 | 149 | RAM RAM disk support is enabled. |
| 150 | + RISCV RISCV architecture is enabled. | |
| 143 | 151 | RDT Intel Resource Director Technology. |
| 144 | 152 | S390 S390 architecture is enabled. |
| 145 | 153 | SCSI Appropriate SCSI support is enabled. |
| @@ -50,7 +50,7 @@ · 49 unmodified lines | ||
| 50 | 50 | CONFIG_ACPI_DEBUG must be enabled to produce any ACPI |
| 51 | 51 | debug output. Bits in debug_layer correspond to a |
| 52 | 52 | _COMPONENT in an ACPI source file, e.g., |
| 53 | − #define _COMPONENT ACPI_PCI_COMPONENT | |
| 53 | + #define _COMPONENT ACPI_EVENTS | |
| 54 | 54 | Bits in debug_level correspond to a level in |
| 55 | 55 | ACPI_DEBUG_PRINT statements, e.g., |
| 56 | 56 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, ... |
| @@ -60,8 +60,6 @@ · 3 unmodified lines | ||
| 60 | 60 | |
| 61 | 61 | Enable processor driver info messages: |
| 62 | 62 | acpi.debug_layer=0x20000000 |
| 63 | − Enable PCI/PCI interrupt routing info messages: | |
| 64 | − acpi.debug_layer=0x400000 | |
| 65 | 63 | Enable AML "Debug" output, i.e., stores to the Debug |
| 66 | 64 | object while interpreting AML: |
| 67 | 65 | acpi.debug_layer=0xffffffff acpi.debug_level=0x2 |
| @@ -784,6 +782,16 @@ · 716 unmodified lines | ||
| 784 | 782 | cs89x0_media= [HW,NET] |
| 785 | 783 | Format: { rj45 | aui | bnc } |
| 786 | 784 | |
| 785 | + csdlock_debug= [KNL] Enable debug add-ons of cross-CPU function call | |
| 786 | + handling. When switched on, additional debug data is | |
| 787 | + printed to the console in case a hanging CPU is | |
| 788 | + detected, and that CPU is pinged again in order to try | |
| 789 | + to resolve the hang situation. | |
| 790 | + 0: disable csdlock debugging (default) | |
| 791 | + 1: enable basic csdlock debugging (minor impact) | |
| 792 | + ext: enable extended csdlock debugging (more impact, | |
| 793 | + but more data) | |
| 794 | + | |
| 787 | 795 | dasd= [HW,NET] |
| 788 | 796 | See header of drivers/s390/block/dasd_devmap.c. |
| 789 | 797 | |
| @@ -1461,6 +1469,12 @@ · 671 unmodified lines | ||
| 1461 | 1469 | Don't use this when you are not running on the |
| 1462 | 1470 | android emulator |
| 1463 | 1471 | |
| 1472 | + gpio-mockup.gpio_mockup_ranges | |
| 1473 | + [HW] Sets the ranges of gpiochip of for this device. | |
| 1474 | + Format: <start1>,<end1>,<start2>,<end2>... | |
| 1475 | + gpio-mockup.gpio_mockup_named_lines | |
| 1476 | + [HW] Let the driver know GPIO lines should be named. | |
| 1477 | + | |
| 1464 | 1478 | gpt [EFI] Forces disk with valid GPT signature but |
| 1465 | 1479 | invalid Protective MBR to be treated as GPT. If the |
| 1466 | 1480 | primary GPT is corrupted, it enables the backup/alternate |
| @@ -1484,10 +1498,6 @@ · 17 unmodified lines | ||
| 1484 | 1498 | Format: <unsigned int> such that (rxsize & ~0x1fffc0) == 0. |
| 1485 | 1499 | Default: 1024 |
| 1486 | 1500 | |
| 1487 | − gpio-mockup.gpio_mockup_ranges | |
| 1488 | − [HW] Sets the ranges of gpiochip of for this device. | |
| 1489 | − Format: <start1>,<end1>,<start2>,<end2>... | |
| 1490 | − | |
| 1491 | 1501 | hardlockup_all_cpu_backtrace= |
| 1492 | 1502 | [KNL] Should the hard-lockup detector generate |
| 1493 | 1503 | backtraces on all cpus. |
| @@ -1825,6 +1835,18 @@ · 331 unmodified lines | ||
| 1825 | 1835 | initcall functions. Useful for debugging built-in |
| 1826 | 1836 | modules and initcalls. |
| 1827 | 1837 | |
| 1838 | + initramfs_async= [KNL] | |
| 1839 | + Format: <bool> | |
| 1840 | + Default: 1 | |
| 1841 | + This parameter controls whether the initramfs | |
| 1842 | + image is unpacked asynchronously, concurrently | |
| 1843 | + with devices being probed and | |
| 1844 | + initialized. This should normally just work, | |
| 1845 | + but as a debugging aid, one can get the | |
| 1846 | + historical behaviour of the initramfs | |
| 1847 | + unpacking being completed before device_ and | |
| 1848 | + late_ initcalls. | |
| 1849 | + | |
| 1828 | 1850 | initrd= [BOOT] Specify the location of the initial ramdisk |
| 1829 | 1851 | |
| 1830 | 1852 | initrdmem= [KNL] Specify a physical address and size from which to |
| @@ -1869,13 +1891,6 @@ · 38 unmodified lines | ||
| 1869 | 1891 | bypassed by not enabling DMAR with this option. In |
| 1870 | 1892 | this case, gfx device will use physical address for |
| 1871 | 1893 | DMA. |
| 1872 | − forcedac [X86-64] | |
| 1873 | − With this option iommu will not optimize to look | |
| 1874 | − for io virtual address below 32-bit forcing dual | |
| 1875 | − address cycle on pci bus for cards supporting greater | |
| 1876 | − than 32-bit addressing. The default is to look | |
| 1877 | − for translation below 32-bit and if not available | |
| 1878 | − then look in the higher range. | |
| 1879 | 1894 | strict [Default Off] |
| 1880 | 1895 | With this option on every unmap_single operation will |
| 1881 | 1896 | result in a hardware IOTLB flush operation as opposed |
| @@ -1964,6 +1979,14 @@ · 82 unmodified lines | ||
| 1964 | 1979 | nobypass [PPC/POWERNV] |
| 1965 | 1980 | Disable IOMMU bypass, using IOMMU for PCI devices. |
| 1966 | 1981 | |
| 1982 | + iommu.forcedac= [ARM64, X86] Control IOVA allocation for PCI devices. | |
| 1983 | + Format: { "0" | "1" } | |
| 1984 | + 0 - Try to allocate a 32-bit DMA address first, before | |
| 1985 | + falling back to the full range if needed. | |
| 1986 | + 1 - Allocate directly from the full usable range, | |
| 1987 | + forcing Dual Address Cycle for PCI cards supporting | |
| 1988 | + greater than 32-bit addressing. | |
| 1989 | + | |
| 1967 | 1990 | iommu.strict= [ARM64] Configure TLB invalidation behaviour |
| 1968 | 1991 | Format: { "0" | "1" } |
| 1969 | 1992 | 0 - Lazy mode. |
| @@ -2279,8 +2302,7 @@ · 309 unmodified lines | ||
| 2279 | 2302 | state is kept private from the host. |
| 2280 | 2303 | Not valid if the kernel is running in EL2. |
| 2281 | 2304 | |
| 2282 | − Defaults to VHE/nVHE based on hardware support and | |
| 2283 | − the value of CONFIG_ARM64_VHE. | |
| 2305 | + Defaults to VHE/nVHE based on hardware support. | |
| 2284 | 2306 | |
| 2285 | 2307 | kvm-arm.vgic_v3_group0_trap= |
| 2286 | 2308 | [KVM,ARM] Trap guest accesses to GICv3 group-0 |
| @@ -2794,7 +2816,24 @@ · 507 unmodified lines | ||
| 2794 | 2816 | seconds. Use this parameter to check at some |
| 2795 | 2817 | other rate. 0 disables periodic checking. |
| 2796 | 2818 | |
| 2797 | − memtest= [KNL,X86,ARM,PPC] Enable memtest | |
| 2819 | + memory_hotplug.memmap_on_memory | |
| 2820 | + [KNL,X86,ARM] Boolean flag to enable this feature. | |
| 2821 | + Format: {on | off (default)} | |
| 2822 | + When enabled, runtime hotplugged memory will | |
| 2823 | + allocate its internal metadata (struct pages) | |
| 2824 | + from the hotadded memory which will allow to | |
| 2825 | + hotadd a lot of memory without requiring | |
| 2826 | + additional memory to do so. | |
| 2827 | + This feature is disabled by default because it | |
| 2828 | + has some implication on large (e.g. GB) | |
| 2829 | + allocations in some configurations (e.g. small | |
| 2830 | + memory blocks). | |
| 2831 | + The state of the flag can be read in | |
| 2832 | + /sys/module/memory_hotplug/parameters/memmap_on_memory. | |
| 2833 | + Note that even when enabled, there are a few cases where | |
| 2834 | + the feature is not effective. | |
| 2835 | + | |
| 2836 | + memtest= [KNL,X86,ARM,PPC,RISCV] Enable memtest | |
| 2798 | 2837 | Format: <integer> |
| 2799 | 2838 | default : 0 <disable> |
| 2800 | 2839 | Specifies the number of memtest passes to be |
| @@ -3243,6 +3282,8 @@ · 442 unmodified lines | ||
| 3243 | 3282 | |
| 3244 | 3283 | nohugeiomap [KNL,X86,PPC,ARM64] Disable kernel huge I/O mappings. |
| 3245 | 3284 | |
| 3285 | + nohugevmalloc [PPC] Disable kernel huge vmalloc mappings. | |
| 3286 | + | |
| 3246 | 3287 | nosmt [KNL,S390] Disable symmetric multithreading (SMT). |
| 3247 | 3288 | Equivalent to smt=1. |
| 3248 | 3289 | |
| @@ -3472,7 +3513,8 @@ · 223 unmodified lines | ||
| 3472 | 3513 | |
| 3473 | 3514 | nr_uarts= [SERIAL] maximum number of UARTs to be registered. |
| 3474 | 3515 | |
| 3475 | − numa_balancing= [KNL,X86] Enable or disable automatic NUMA balancing. | |
| 3516 | + numa_balancing= [KNL,ARM64,PPC,RISCV,S390,X86] Enable or disable automatic | |
| 3517 | + NUMA balancing. | |
| 3476 | 3518 | Allowed values are enable and disable |
| 3477 | 3519 | |
| 3478 | 3520 | numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA. |
| @@ -3592,6 +3634,96 @@ · 113 unmodified lines | ||
| 3592 | 3634 | Currently this function knows 686a and 8231 chips. |
| 3593 | 3635 | Format: [spp|ps2|epp|ecp|ecpepp] |
| 3594 | 3636 | |
| 3637 | + pata_legacy.all= [HW,LIBATA] | |
| 3638 | + Format: <int> | |
| 3639 | + Set to non-zero to probe primary and secondary ISA | |
| 3640 | + port ranges on PCI systems where no PCI PATA device | |
| 3641 | + has been found at either range. Disabled by default. | |
| 3642 | + | |
| 3643 | + pata_legacy.autospeed= [HW,LIBATA] | |
| 3644 | + Format: <int> | |
| 3645 | + Set to non-zero if a chip is present that snoops speed | |
| 3646 | + changes. Disabled by default. | |
| 3647 | + | |
| 3648 | + pata_legacy.ht6560a= [HW,LIBATA] | |
| 3649 | + Format: <int> | |
| 3650 | + Set to 1, 2, or 3 for HT 6560A on the primary channel, | |
| 3651 | + the secondary channel, or both channels respectively. | |
| 3652 | + Disabled by default. | |
| 3653 | + | |
| 3654 | + pata_legacy.ht6560b= [HW,LIBATA] | |
| 3655 | + Format: <int> | |
| 3656 | + Set to 1, 2, or 3 for HT 6560B on the primary channel, | |
| 3657 | + the secondary channel, or both channels respectively. | |
| 3658 | + Disabled by default. | |
| 3659 | + | |
| 3660 | + pata_legacy.iordy_mask= [HW,LIBATA] | |
| 3661 | + Format: <int> | |
| 3662 | + IORDY enable mask. Set individual bits to allow IORDY | |
| 3663 | + for the respective channel. Bit 0 is for the first | |
| 3664 | + legacy channel handled by this driver, bit 1 is for | |
| 3665 | + the second channel, and so on. The sequence will often | |
| 3666 | + correspond to the primary legacy channel, the secondary | |
| 3667 | + legacy channel, and so on, but the handling of a PCI | |
| 3668 | + bus and the use of other driver options may interfere | |
| 3669 | + with the sequence. By default IORDY is allowed across | |
| 3670 | + all channels. | |
| 3671 | + | |
| 3672 | + pata_legacy.opti82c46x= [HW,LIBATA] | |
| 3673 | + Format: <int> | |
| 3674 | + Set to 1, 2, or 3 for Opti 82c611A on the primary | |
| 3675 | + channel, the secondary channel, or both channels | |
| 3676 | + respectively. Disabled by default. | |
| 3677 | + | |
| 3678 | + pata_legacy.opti82c611a= [HW,LIBATA] | |
| 3679 | + Format: <int> | |
| 3680 | + Set to 1, 2, or 3 for Opti 82c465MV on the primary | |
| 3681 | + channel, the secondary channel, or both channels | |
| 3682 | + respectively. Disabled by default. | |
| 3683 | + | |
| 3684 | + pata_legacy.pio_mask= [HW,LIBATA] | |
| 3685 | + Format: <int> | |
| 3686 | + PIO mode mask for autospeed devices. Set individual | |
| 3687 | + bits to allow the use of the respective PIO modes. | |
| 3688 | + Bit 0 is for mode 0, bit 1 is for mode 1, and so on. | |
| 3689 | + All modes allowed by default. | |
| 3690 | + | |
| 3691 | + pata_legacy.probe_all= [HW,LIBATA] | |
| 3692 | + Format: <int> | |
| 3693 | + Set to non-zero to probe tertiary and further ISA | |
| 3694 | + port ranges on PCI systems. Disabled by default. | |
| 3695 | + | |
| 3696 | + pata_legacy.probe_mask= [HW,LIBATA] | |
| 3697 | + Format: <int> | |
| 3698 | + Probe mask for legacy ISA PATA ports. Depending on | |
| 3699 | + platform configuration and the use of other driver | |
| 3700 | + options up to 6 legacy ports are supported: 0x1f0, | |
| 3701 | + 0x170, 0x1e8, 0x168, 0x1e0, 0x160, however probing | |
| 3702 | + of individual ports can be disabled by setting the | |
| 3703 | + corresponding bits in the mask to 1. Bit 0 is for | |
| 3704 | + the first port in the list above (0x1f0), and so on. | |
| 3705 | + By default all supported ports are probed. | |
| 3706 | + | |
| 3707 | + pata_legacy.qdi= [HW,LIBATA] | |
| 3708 | + Format: <int> | |
| 3709 | + Set to non-zero to probe QDI controllers. By default | |
| 3710 | + set to 1 if CONFIG_PATA_QDI_MODULE, 0 otherwise. | |
| 3711 | + | |
| 3712 | + pata_legacy.winbond= [HW,LIBATA] | |
| 3713 | + Format: <int> | |
| 3714 | + Set to non-zero to probe Winbond controllers. Use | |
| 3715 | + the standard I/O port (0x130) if 1, otherwise the | |
| 3716 | + value given is the I/O port to use (typically 0x1b0). | |
| 3717 | + By default set to 1 if CONFIG_PATA_WINBOND_VLB_MODULE, | |
| 3718 | + 0 otherwise. | |
| 3719 | + | |
| 3720 | + pata_platform.pio_mask= [HW,LIBATA] | |
| 3721 | + Format: <int> | |
| 3722 | + Supported PIO mode mask. Set individual bits to allow | |
| 3723 | + the use of the respective PIO modes. Bit 0 is for | |
| 3724 | + mode 0, bit 1 is for mode 1, and so on. Mode 0 only | |
| 3725 | + allowed by default. | |
| 3726 | + | |
| 3595 | 3727 | pause_on_oops= |
| 3596 | 3728 | Halt all CPUs after the first oops has been printed for |
| 3597 | 3729 | the specified number of seconds. This is to be used if |
| @@ -4061,6 +4193,17 @@ · 463 unmodified lines | ||
| 4061 | 4193 | fully seed the kernel's CRNG. Default is controlled |
| 4062 | 4194 | by CONFIG_RANDOM_TRUST_CPU. |
| 4063 | 4195 | |
| 4196 | + randomize_kstack_offset= | |
| 4197 | + [KNL] Enable or disable kernel stack offset | |
| 4198 | + randomization, which provides roughly 5 bits of | |
| 4199 | + entropy, frustrating memory corruption attacks | |
| 4200 | + that depend on stack address determinism or | |
| 4201 | + cross-syscall address exposures. This is only | |
| 4202 | + available on architectures that have defined | |
| 4203 | + CONFIG_HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET. | |
| 4204 | + Format: <bool> (1/Y/y=enable, 0/N/n=disable) | |
| 4205 | + Default is CONFIG_RANDOMIZE_KSTACK_OFFSET_DEFAULT. | |
| 4206 | + | |
| 4064 | 4207 | ras=option[,option,...] [KNL] RAS-specific options |
| 4065 | 4208 | |
| 4066 | 4209 | cec_disable [X86] |
| @@ -4068,9 +4211,7 @@ · 1 unmodified line | ||
| 4068 | 4211 | see CONFIG_RAS_CEC help text. |
| 4069 | 4212 | |
| 4070 | 4213 | rcu_nocbs= [KNL] |
| 4071 | − The argument is a cpu list, as described above, | |
| 4072 | − except that the string "all" can be used to | |
| 4073 | − specify every CPU on the system. | |
| 4214 | + The argument is a cpu list, as described above. | |
| 4074 | 4215 | |
| 4075 | 4216 | In kernels built with CONFIG_RCU_NOCB_CPU=y, set |
| 4076 | 4217 | the specified list of CPUs to be no-callback CPUs. |
| @@ -4259,6 +4400,18 @@ · 182 unmodified lines | ||
| 4259 | 4400 | rcuscale.kfree_rcu_test= [KNL] |
| 4260 | 4401 | Set to measure performance of kfree_rcu() flooding. |
| 4261 | 4402 | |
| 4403 | + rcuscale.kfree_rcu_test_double= [KNL] | |
| 4404 | + Test the double-argument variant of kfree_rcu(). | |
| 4405 | + If this parameter has the same value as | |
| 4406 | + rcuscale.kfree_rcu_test_single, both the single- | |
| 4407 | + and double-argument variants are tested. | |
| 4408 | + | |
| 4409 | + rcuscale.kfree_rcu_test_single= [KNL] | |
| 4410 | + Test the single-argument variant of kfree_rcu(). | |
| 4411 | + If this parameter has the same value as | |
| 4412 | + rcuscale.kfree_rcu_test_double, both the single- | |
| 4413 | + and double-argument variants are tested. | |
| 4414 | + | |
| 4262 | 4415 | rcuscale.kfree_nthreads= [KNL] |
| 4263 | 4416 | The number of threads running loops of kfree_rcu(). |
| 4264 | 4417 | |
| @@ -4725,7 +4878,7 @@ · 460 unmodified lines | ||
| 4725 | 4878 | |
| 4726 | 4879 | sbni= [NET] Granch SBNI12 leased line adapter |
| 4727 | 4880 | |
| 4728 | − sched_debug [KNL] Enables verbose scheduler debug messages. | |
| 4881 | + sched_verbose [KNL] Enables verbose scheduler debug messages. | |
| 4729 | 4882 | |
| 4730 | 4883 | schedstats= [KNL,X86] Enable or disable scheduled statistics. |
| 4731 | 4884 | Allowed values are enable and disable. This feature |
| @@ -4877,6 +5030,10 @@ · 145 unmodified lines | ||
| 4877 | 5030 | |
| 4878 | 5031 | slram= [HW,MTD] |
| 4879 | 5032 | |
| 5033 | + slab_merge [MM] | |
| 5034 | + Enable merging of slabs with similar size when the | |
| 5035 | + kernel is built without CONFIG_SLAB_MERGE_DEFAULT. | |
| 5036 | + | |
| 4880 | 5037 | slab_nomerge [MM] |
| 4881 | 5038 | Disable merging of slabs with similar size. May be |
| 4882 | 5039 | necessary if there is some reason to distinguish |
| @@ -4924,6 +5081,9 @@ · 41 unmodified lines | ||
| 4924 | 5081 | lower than slub_max_order. |
| 4925 | 5082 | For more information see Documentation/vm/slub.rst. |
| 4926 | 5083 | |
| 5084 | + slub_merge [MM, SLUB] | |
| 5085 | + Same with slab_merge. | |
| 5086 | + | |
| 4927 | 5087 | slub_nomerge [MM, SLUB] |
| 4928 | 5088 | Same with slab_nomerge. This is supported for legacy. |
| 4929 | 5089 | See slab_nomerge for more information. |
| @@ -5100,27 +5260,37 @@ · 170 unmodified lines | ||
| 5100 | 5260 | spia_peddr= |
| 5101 | 5261 | |
| 5102 | 5262 | split_lock_detect= |
| 5103 | − [X86] Enable split lock detection | |
| 5263 | + [X86] Enable split lock detection or bus lock detection | |
| 5104 | 5264 | |
| 5105 | 5265 | When enabled (and if hardware support is present), atomic |
| 5106 | 5266 | instructions that access data across cache line |
| 5107 | − boundaries will result in an alignment check exception. | |
| 5267 | + boundaries will result in an alignment check exception | |
| 5268 | + for split lock detection or a debug exception for | |
| 5269 | + bus lock detection. | |
| 5108 | 5270 | |
| 5109 | 5271 | off - not enabled |
| 5110 | 5272 | |
| 5111 | − warn - the kernel will emit rate limited warnings | |
| 5273 | + warn - the kernel will emit rate-limited warnings | |
| 5112 | 5274 | about applications triggering the #AC |
| 5113 | − exception. This mode is the default on CPUs | |
| 5114 | − that supports split lock detection. | |
| 5275 | + exception or the #DB exception. This mode is | |
| 5276 | + the default on CPUs that support split lock | |
| 5277 | + detection or bus lock detection. Default | |
| 5278 | + behavior is by #AC if both features are | |
| 5279 | + enabled in hardware. | |
| 5115 | 5280 | |
| 5116 | 5281 | fatal - the kernel will send SIGBUS to applications |
| 5117 | − that trigger the #AC exception. | |
| 5282 | + that trigger the #AC exception or the #DB | |
| 5283 | + exception. Default behavior is by #AC if | |
| 5284 | + both features are enabled in hardware. | |
| 5118 | 5285 | |
| 5119 | 5286 | If an #AC exception is hit in the kernel or in |
| 5120 | 5287 | firmware (i.e. not while executing in user mode) |
| 5121 | 5288 | the kernel will oops in either "warn" or "fatal" |
| 5122 | 5289 | mode. |
| 5123 | 5290 | |
| 5291 | + #DB exception for bus lock is triggered only when | |
| 5292 | + CPL > 0. | |
| 5293 | + | |
| 5124 | 5294 | srbds= [X86,INTEL] |
| 5125 | 5295 | Control the Special Register Buffer Data Sampling |
| 5126 | 5296 | (SRBDS) mitigation. |
| @@ -5462,6 +5632,18 @@ · 335 unmodified lines | ||
| 5462 | 5632 | See Documentation/admin-guide/mm/transhuge.rst |
| 5463 | 5633 | for more details. |
| 5464 | 5634 | |
| 5635 | + trusted.source= [KEYS] | |
| 5636 | + Format: <string> | |
| 5637 | + This parameter identifies the trust source as a backend | |
| 5638 | + for trusted keys implementation. Supported trust | |
| 5639 | + sources: | |
| 5640 | + - "tpm" | |
| 5641 | + - "tee" | |
| 5642 | + If not specified then it defaults to iterating through | |
| 5643 | + the trust source list starting with TPM and assigns the | |
| 5644 | + first trust source as a backend which is initialized | |
| 5645 | + successfully during iteration. | |
| 5646 | + | |
| 5465 | 5647 | tsc= Disable clocksource stability checks for TSC. |
| 5466 | 5648 | Format: <string> |
| 5467 | 5649 | [x86] reliable: mark tsc clocksource as reliable, this |
| @@ -332,23 +332,3 @@ To reduce its OS jitter, do at least one of the following: · 331 unmodified lines | ||
| 332 | 332 | kthreads from being created in the first place. However, please |
| 333 | 333 | note that this will not eliminate OS jitter, but will instead |
| 334 | 334 | shift it to RCU_SOFTIRQ. |
| 335 | − | |
| 336 | −Name: | |
| 337 | − watchdog/%u | |
| 338 | − | |
| 339 | −Purpose: | |
| 340 | − Detect software lockups on each CPU. | |
| 341 | − | |
| 342 | −To reduce its OS jitter, do at least one of the following: | |
| 343 | − | |
| 344 | −1. Build with CONFIG_LOCKUP_DETECTOR=n, which will prevent these | |
| 345 | − kthreads from being created in the first place. | |
| 346 | −2. Boot with "nosoftlockup=0", which will also prevent these kthreads | |
| 347 | − from being created. Other related watchdog and softlockup boot | |
| 348 | − parameters may be found in Documentation/admin-guide/kernel-parameters.rst | |
| 349 | − and Documentation/watchdog/watchdog-parameters.rst. | |
| 350 | −3. Echo a zero to /proc/sys/kernel/watchdog to disable the | |
| 351 | − watchdog timer. | |
| 352 | −4. Echo a large number of /proc/sys/kernel/watchdog_thresh in | |
| 353 | − order to reduce the frequency of OS jitter due to the watchdog | |
| 354 | − timer down to a level that is acceptable for your workload. | |
| @@ -52,6 +52,7 @@ detailed description): · 51 unmodified lines | ||
| 52 | 52 | - LCD Shadow (PrivacyGuard) enable and disable |
| 53 | 53 | - Lap mode sensor |
| 54 | 54 | - Setting keyboard language |
| 55 | + - WWAN Antenna type | |
| 55 | 56 | |
| 56 | 57 | A compatibility table by model and feature is maintained on the web |
| 57 | 58 | site, http://ibm-acpi.sf.net/. I appreciate any success or failure |
| @@ -1490,6 +1491,25 @@ fr(French), fr-ch(French(Switzerland)), hu(Hungarian), it(Italy), jp (Japan), · 1432 unmodified lines | ||
| 1490 | 1491 | nl(Dutch), nn(Norway), pl(Polish), pt(portugese), sl(Slovenian), sv(Sweden), |
| 1491 | 1492 | tr(Turkey) |
| 1492 | 1493 | |
| 1494 | +WWAN Antenna type | |
| 1495 | +----------------- | |
| 1496 | + | |
| 1497 | +sysfs: wwan_antenna_type | |
| 1498 | + | |
| 1499 | +On some newer Thinkpads we need to set SAR value based on the antenna | |
| 1500 | +type. This interface will be used by userspace to get the antenna type | |
| 1501 | +and set the corresponding SAR value, as is required for FCC certification. | |
| 1502 | + | |
| 1503 | +The available commands are:: | |
| 1504 | + | |
| 1505 | + cat /sys/devices/platform/thinkpad_acpi/wwan_antenna_type | |
| 1506 | + | |
| 1507 | +Currently 2 antenna types are supported as mentioned below: | |
| 1508 | +- type a | |
| 1509 | +- type b | |
| 1510 | + | |
| 1511 | +The property is read-only. If the platform doesn't have support the sysfs | |
| 1512 | +class is not created. | |
| 1493 | 1513 | |
| 1494 | 1514 | Adaptive keyboard |
| 1495 | 1515 | ----------------- |
| @@ -357,6 +357,15 @@ creates ZONE_MOVABLE as following. · 356 unmodified lines | ||
| 357 | 357 | Unfortunately, there is no information to show which memory block belongs |
| 358 | 358 | to ZONE_MOVABLE. This is TBD. |
| 359 | 359 | |
| 360 | +.. note:: | |
| 361 | + Techniques that rely on long-term pinnings of memory (especially, RDMA and | |
| 362 | + vfio) are fundamentally problematic with ZONE_MOVABLE and, therefore, memory | |
| 363 | + hot remove. Pinned pages cannot reside on ZONE_MOVABLE, to guarantee that | |
| 364 | + memory can still get hot removed - be aware that pinning can fail even if | |
| 365 | + there is plenty of free memory in ZONE_MOVABLE. In addition, using | |
| 366 | + ZONE_MOVABLE might make page pinning more expensive, because pages have to be | |
| 367 | + migrated off that zone first. | |
| 368 | + | |
| 360 | 369 | .. _memory_hotplug_how_to_offline_memory: |
| 361 | 370 | |
| 362 | 371 | How to offline memory |
| @@ -151,7 +151,7 @@ Each cache level's directory provides its attributes. For example, the · 150 unmodified lines | ||
| 151 | 151 | following shows a single cache level and the attributes available for |
| 152 | 152 | software to query:: |
| 153 | 153 | |
| 154 | − # tree sys/devices/system/node/node0/memory_side_cache/ | |
| 154 | + # tree /sys/devices/system/node/node0/memory_side_cache/ | |
| 155 | 155 | /sys/devices/system/node/node0/memory_side_cache/ |
| 156 | 156 | |-- index1 |
| 157 | 157 | | |-- indexing |
| @@ -402,7 +402,7 @@ compact_fail · 401 unmodified lines | ||
| 402 | 402 | but failed. |
| 403 | 403 | |
| 404 | 404 | It is possible to establish how long the stalls were using the function |
| 405 | −tracer to record how long was spent in __alloc_pages_nodemask and | |
| 405 | +tracer to record how long was spent in __alloc_pages() and | |
| 406 | 406 | using the mm_page_alloc tracepoint to identify which allocations were |
| 407 | 407 | for huge pages. |
| 408 | 408 | |
| @@ -63,36 +63,36 @@ the generic ioctl available. · 62 unmodified lines | ||
| 63 | 63 | |
| 64 | 64 | The ``uffdio_api.features`` bitmask returned by the ``UFFDIO_API`` ioctl |
| 65 | 65 | defines what memory types are supported by the ``userfaultfd`` and what |
| 66 | −events, except page fault notifications, may be generated. | |
| 67 | − | |
| 68 | −If the kernel supports registering ``userfaultfd`` ranges on hugetlbfs | |
| 69 | −virtual memory areas, ``UFFD_FEATURE_MISSING_HUGETLBFS`` will be set in | |
| 70 | −``uffdio_api.features``. Similarly, ``UFFD_FEATURE_MISSING_SHMEM`` will be | |
| 71 | −set if the kernel supports registering ``userfaultfd`` ranges on shared | |
| 72 | −memory (covering all shmem APIs, i.e. tmpfs, ``IPCSHM``, ``/dev/zero``, | |
| 73 | −``MAP_SHARED``, ``memfd_create``, etc). | |
| 74 | − | |
| 75 | −The userland application that wants to use ``userfaultfd`` with hugetlbfs | |
| 76 | −or shared memory need to set the corresponding flag in | |
| 77 | −``uffdio_api.features`` to enable those features. | |
| 78 | − | |
| 79 | −If the userland desires to receive notifications for events other than | |
| 80 | −page faults, it has to verify that ``uffdio_api.features`` has appropriate | |
| 81 | −``UFFD_FEATURE_EVENT_*`` bits set. These events are described in more | |
| 82 | −detail below in `Non-cooperative userfaultfd`_ section. | |
| 83 | − | |
| 84 | −Once the ``userfaultfd`` has been enabled the ``UFFDIO_REGISTER`` ioctl should | |
| 85 | −be invoked (if present in the returned ``uffdio_api.ioctls`` bitmask) to | |
| 86 | −register a memory range in the ``userfaultfd`` by setting the | |
| 66 | +events, except page fault notifications, may be generated: | |
| 67 | + | |
| 68 | +- The ``UFFD_FEATURE_EVENT_*`` flags indicate that various other events | |
| 69 | + other than page faults are supported. These events are described in more | |
| 70 | + detail below in the `Non-cooperative userfaultfd`_ section. | |
| 71 | + | |
| 72 | +- ``UFFD_FEATURE_MISSING_HUGETLBFS`` and ``UFFD_FEATURE_MISSING_SHMEM`` | |
| 73 | + indicate that the kernel supports ``UFFDIO_REGISTER_MODE_MISSING`` | |
| 74 | + registrations for hugetlbfs and shared memory (covering all shmem APIs, | |
| 75 | + i.e. tmpfs, ``IPCSHM``, ``/dev/zero``, ``MAP_SHARED``, ``memfd_create``, | |
| 76 | + etc) virtual memory areas, respectively. | |
| 77 | + | |
| 78 | +- ``UFFD_FEATURE_MINOR_HUGETLBFS`` indicates that the kernel supports | |
| 79 | + ``UFFDIO_REGISTER_MODE_MINOR`` registration for hugetlbfs virtual memory | |
| 80 | + areas. | |
| 81 | + | |
| 82 | +The userland application should set the feature flags it intends to use | |
| 83 | +when invoking the ``UFFDIO_API`` ioctl, to request that those features be | |
| 84 | +enabled if supported. | |
| 85 | + | |
| 86 | +Once the ``userfaultfd`` API has been enabled the ``UFFDIO_REGISTER`` | |
| 87 | +ioctl should be invoked (if present in the returned ``uffdio_api.ioctls`` | |
| 88 | +bitmask) to register a memory range in the ``userfaultfd`` by setting the | |
| 87 | 89 | uffdio_register structure accordingly. The ``uffdio_register.mode`` |
| 88 | 90 | bitmask will specify to the kernel which kind of faults to track for |
| 89 | −the range (``UFFDIO_REGISTER_MODE_MISSING`` would track missing | |
| 90 | −pages). The ``UFFDIO_REGISTER`` ioctl will return the | |
| 91 | +the range. The ``UFFDIO_REGISTER`` ioctl will return the | |
| 91 | 92 | ``uffdio_register.ioctls`` bitmask of ioctls that are suitable to resolve |
| 92 | 93 | userfaults on the range registered. Not all ioctls will necessarily be |
| 93 | −supported for all memory types depending on the underlying virtual | |
| 94 | −memory backend (anonymous memory vs tmpfs vs real filebacked | |
| 95 | −mappings). | |
| 94 | +supported for all memory types (e.g. anonymous memory vs. shmem vs. | |
| 95 | +hugetlbfs), or all types of intercepted faults. | |
| 96 | 96 | |
| 97 | 97 | Userland can use the ``uffdio_register.ioctls`` to manage the virtual |
| 98 | 98 | address space in the background (to add or potentially also remove |
| @@ -100,21 +100,46 @@ memory from the ``userfaultfd`` registered range). This means a userfault · 1 unmodified line | ||
| 100 | 100 | could be triggering just before userland maps in the background the |
| 101 | 101 | user-faulted page. |
| 102 | 102 | |
| 103 | −The primary ioctl to resolve userfaults is ``UFFDIO_COPY``. That | |
| 104 | −atomically copies a page into the userfault registered range and wakes | |
| 105 | −up the blocked userfaults | |
| 106 | −(unless ``uffdio_copy.mode & UFFDIO_COPY_MODE_DONTWAKE`` is set). | |
| 107 | −Other ioctl works similarly to ``UFFDIO_COPY``. They're atomic as in | |
| 108 | −guaranteeing that nothing can see an half copied page since it'll | |
| 109 | −keep userfaulting until the copy has finished. | |
| 103 | +Resolving Userfaults | |
| 104 | +-------------------- | |
| 105 | + | |
| 106 | +There are three basic ways to resolve userfaults: | |
| 107 | + | |
| 108 | +- ``UFFDIO_COPY`` atomically copies some existing page contents from | |
| 109 | + userspace. | |
| 110 | + | |
| 111 | +- ``UFFDIO_ZEROPAGE`` atomically zeros the new page. | |
| 112 | + | |
| 113 | +- ``UFFDIO_CONTINUE`` maps an existing, previously-populated page. | |
| 114 | + | |
| 115 | +These operations are atomic in the sense that they guarantee nothing can | |
| 116 | +see a half-populated page, since readers will keep userfaulting until the | |
| 117 | +operation has finished. | |
| 118 | + | |
| 119 | +By default, these wake up userfaults blocked on the range in question. | |
| 120 | +They support a ``UFFDIO_*_MODE_DONTWAKE`` ``mode`` flag, which indicates | |
| 121 | +that waking will be done separately at some later time. | |
| 122 | + | |
| 123 | +Which ioctl to choose depends on the kind of page fault, and what we'd | |
| 124 | +like to do to resolve it: | |
| 125 | + | |
| 126 | +- For ``UFFDIO_REGISTER_MODE_MISSING`` faults, the fault needs to be | |
| 127 | + resolved by either providing a new page (``UFFDIO_COPY``), or mapping | |
| 128 | + the zero page (``UFFDIO_ZEROPAGE``). By default, the kernel would map | |
| 129 | + the zero page for a missing fault. With userfaultfd, userspace can | |
| 130 | + decide what content to provide before the faulting thread continues. | |
| 131 | + | |
| 132 | +- For ``UFFDIO_REGISTER_MODE_MINOR`` faults, there is an existing page (in | |
| 133 | + the page cache). Userspace has the option of modifying the page's | |
| 134 | + contents before resolving the fault. Once the contents are correct | |
| 135 | + (modified or not), userspace asks the kernel to map the page and let the | |
| 136 | + faulting thread continue with ``UFFDIO_CONTINUE``. | |
| 110 | 137 | |
| 111 | 138 | Notes: |
| 112 | 139 | |
| 113 | −- If you requested ``UFFDIO_REGISTER_MODE_MISSING`` when registering then | |
| 114 | − you must provide some kind of page in your thread after reading from | |
| 115 | − the uffd. You must provide either ``UFFDIO_COPY`` or ``UFFDIO_ZEROPAGE``. | |
| 116 | − The normal behavior of the OS automatically providing a zero page on | |
| 117 | − an anonymous mmaping is not in place. | |
| 140 | +- You can tell which kind of fault occurred by examining | |
| 141 | + ``pagefault.flags`` within the ``uffd_msg``, checking for the | |
| 142 | + ``UFFD_PAGEFAULT_FLAG_*`` flags. | |
| 118 | 143 | |
| 119 | 144 | - None of the page-delivering ioctls default to the range that you |
| 120 | 145 | registered with. You must fill in all fields for the appropriate |
| @@ -122,9 +147,9 @@ Notes: · 1 unmodified line | ||
| 122 | 147 | |
| 123 | 148 | - You get the address of the access that triggered the missing page |
| 124 | 149 | event out of a struct uffd_msg that you read in the thread from the |
| 125 | − uffd. You can supply as many pages as you want with ``UFFDIO_COPY`` or | |
| 126 | − ``UFFDIO_ZEROPAGE``. Keep in mind that unless you used DONTWAKE then | |
| 127 | − the first of any of those IOCTLs wakes up the faulting thread. | |
| 150 | + uffd. You can supply as many pages as you want with these IOCTLs. | |
| 151 | + Keep in mind that unless you used DONTWAKE then the first of any of | |
| 152 | + those IOCTLs wakes up the faulting thread. | |
| 128 | 153 | |
| 129 | 154 | - Be sure to test for all errors including |
| 130 | 155 | (``pollfd[0].revents & POLLERR``). This can happen, e.g. when ranges |
| @@ -53,6 +53,60 @@ Example usage of perf:: · 52 unmodified lines | ||
| 53 | 53 | $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5 |
| 54 | 54 | $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5 |
| 55 | 55 | |
| 56 | +For HiSilicon uncore PMU v2 whose identifier is 0x30, the topology is the same | |
| 57 | +as PMU v1, but some new functions are added to the hardware. | |
| 58 | + | |
| 59 | +(a) L3C PMU supports filtering by core/thread within the cluster which can be | |
| 60 | +specified as a bitmap:: | |
| 61 | + | |
| 62 | + $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5 | |
| 63 | + | |
| 64 | +This will only count the operations from core/thread 0 and 1 in this cluster. | |
| 65 | + | |
| 66 | +(b) Tracetag allow the user to chose to count only read, write or atomic | |
| 67 | +operations via the tt_req parameeter in perf. The default value counts all | |
| 68 | +operations. tt_req is 3bits, 3'b100 represents read operations, 3'b101 | |
| 69 | +represents write operations, 3'b110 represents atomic store operations and | |
| 70 | +3'b111 represents atomic non-store operations, other values are reserved:: | |
| 71 | + | |
| 72 | + $# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5 | |
| 73 | + | |
| 74 | +This will only count the read operations in this cluster. | |
| 75 | + | |
| 76 | +(c) Datasrc allows the user to check where the data comes from. It is 5 bits. | |
| 77 | +Some important codes are as follows: | |
| 78 | +5'b00001: comes from L3C in this die; | |
| 79 | +5'b01000: comes from L3C in the cross-die; | |
| 80 | +5'b01001: comes from L3C which is in another socket; | |
| 81 | +5'b01110: comes from the local DDR; | |
| 82 | +5'b01111: comes from the cross-die DDR; | |
| 83 | +5'b10000: comes from cross-socket DDR; | |
| 84 | +etc, it is mainly helpful to find that the data source is nearest from the CPU | |
| 85 | +cores. If datasrc_cfg is used in the multi-chips, the datasrc_skt shall be | |
| 86 | +configured in perf command:: | |
| 87 | + | |
| 88 | + $# perf stat -a -e hisi_sccl3_l3c0/config=0xb9,datasrc_cfg=0xE/, | |
| 89 | + hisi_sccl3_l3c0/config=0xb9,datasrc_cfg=0xF/ sleep 5 | |
| 90 | + | |
| 91 | +(d)Some HiSilicon SoCs encapsulate multiple CPU and IO dies. Each CPU die | |
| 92 | +contains several Compute Clusters (CCLs). The I/O dies are called Super I/O | |
| 93 | +clusters (SICL) containing multiple I/O clusters (ICLs). Each CCL/ICL in the | |
| 94 | +SoC has a unique ID. Each ID is 11bits, include a 6-bit SCCL-ID and 5-bit | |
| 95 | +CCL/ICL-ID. For I/O die, the ICL-ID is followed by: | |
| 96 | +5'b00000: I/O_MGMT_ICL; | |
| 97 | +5'b00001: Network_ICL; | |
| 98 | +5'b00011: HAC_ICL; | |
| 99 | +5'b10000: PCIe_ICL; | |
| 100 | + | |
| 101 | +Users could configure IDs to count data come from specific CCL/ICL, by setting | |
| 102 | +srcid_cmd & srcid_msk, and data desitined for specific CCL/ICL by setting | |
| 103 | +tgtid_cmd & tgtid_msk. A set bit in srcid_msk/tgtid_msk means the PMU will not | |
| 104 | +check the bit when matching against the srcid_cmd/tgtid_cmd. | |
| 105 | + | |
| 106 | +If all of these options are disabled, it can works by the default value that | |
| 107 | +doesn't distinguish the filter condition and ID information and will return | |
| 108 | +the total counter values in the PMU counters. | |
| 109 | + | |
| 56 | 110 | The current driver does not support sampling. So "perf record" is unsupported. |
| 57 | 111 | Also attach to a task is unsupported as the events are all uncore. |
| 58 | 112 | |
| @@ -3,7 +3,7 @@ Ramoops oops/panic logger · 2 unmodified lines | ||
| 3 | 3 | |
| 4 | 4 | Sergiu Iordache <sergiu@chromium.org> |
| 5 | 5 | |
| 6 | −Updated: 17 November 2011 | |
| 6 | +Updated: 10 Feb 2021 | |
| 7 | 7 | |
| 8 | 8 | Introduction |
| 9 | 9 | ------------ |
| @@ -30,6 +30,8 @@ mapping to pgprot_writecombine. Setting ``mem_type=1`` attempts to use · 20 unmodified lines | ||
| 30 | 30 | depends on atomic operations. At least on ARM, pgprot_noncached causes the |
| 31 | 31 | memory to be mapped strongly ordered, and atomic operations on strongly ordered |
| 32 | 32 | memory are implementation defined, and won't work on many ARMs such as omaps. |
| 33 | +Setting ``mem_type=2`` attempts to treat the memory region as normal memory, | |
| 34 | +which enables full cache on it. This can improve the performance. | |
| 33 | 35 | |
| 34 | 36 | The memory area is divided into ``record_size`` chunks (also rounded down to |
| 35 | 37 | power of two) and each kmesg dump writes a ``record_size`` chunk of |
| @@ -1,187 +0,0 @@ | ||
| 1 | −.. _reportingbugs: | |
| 2 | − | |
| 3 | −.. note:: | |
| 4 | − | |
| 5 | − This document is obsolete, and will be replaced by | |
| 6 | − 'Documentation/admin-guide/reporting-issues.rst' in the near future. | |
| 7 | − | |
| 8 | −Reporting bugs | |
| 9 | −++++++++++++++ | |
| 10 | − | |
| 11 | −Background | |
| 12 | −========== | |
| 13 | − | |
| 14 | −The upstream Linux kernel maintainers only fix bugs for specific kernel | |
| 15 | −versions. Those versions include the current "release candidate" (or -rc) | |
| 16 | −kernel, any "stable" kernel versions, and any "long term" kernels. | |
| 17 | − | |
| 18 | −Please see https://www.kernel.org/ for a list of supported kernels. Any | |
| 19 | −kernel marked with [EOL] is "end of life" and will not have any fixes | |
| 20 | −backported to it. | |
| 21 | − | |
| 22 | −If you've found a bug on a kernel version that isn't listed on kernel.org, | |
| 23 | −contact your Linux distribution or embedded vendor for support. | |
| 24 | −Alternatively, you can attempt to run one of the supported stable or -rc | |
| 25 | −kernels, and see if you can reproduce the bug on that. It's preferable | |
| 26 | −to reproduce the bug on the latest -rc kernel. | |
| 27 | − | |
| 28 | − | |
| 29 | −How to report Linux kernel bugs | |
| 30 | −=============================== | |
| 31 | − | |
| 32 | − | |
| 33 | −Identify the problematic subsystem | |
| 34 | −---------------------------------- | |
| 35 | − | |
| 36 | −Identifying which part of the Linux kernel might be causing your issue | |
| 37 | −increases your chances of getting your bug fixed. Simply posting to the | |
| 38 | −generic linux-kernel mailing list (LKML) may cause your bug report to be | |
| 39 | −lost in the noise of a mailing list that gets 1000+ emails a day. | |
| 40 | − | |
| 41 | −Instead, try to figure out which kernel subsystem is causing the issue, | |
| 42 | −and email that subsystem's maintainer and mailing list. If the subsystem | |
| 43 | −maintainer doesn't answer, then expand your scope to mailing lists like | |
| 44 | −LKML. | |
| 45 | − | |
| 46 | − | |
| 47 | −Identify who to notify | |
| 48 | −---------------------- | |
| 49 | − | |
| 50 | −Once you know the subsystem that is causing the issue, you should send a | |
| 51 | −bug report. Some maintainers prefer bugs to be reported via bugzilla | |
| 52 | −(https://bugzilla.kernel.org), while others prefer that bugs be reported | |
| 53 | −via the subsystem mailing list. | |
| 54 | − | |
| 55 | −To find out where to send an emailed bug report, find your subsystem or | |
| 56 | −device driver in the MAINTAINERS file. Search in the file for relevant | |
| 57 | −entries, and send your bug report to the person(s) listed in the "M:" | |
| 58 | −lines, making sure to Cc the mailing list(s) in the "L:" lines. When the | |
| 59 | −maintainer replies to you, make sure to 'Reply-all' in order to keep the | |
| 60 | −public mailing list(s) in the email thread. | |
| 61 | − | |
| 62 | −If you know which driver is causing issues, you can pass one of the driver | |
| 63 | −files to the get_maintainer.pl script:: | |
| 64 | − | |
| 65 | − perl scripts/get_maintainer.pl -f <filename> | |
| 66 | − | |
| 67 | −If it is a security bug, please copy the Security Contact listed in the | |
| 68 | −MAINTAINERS file. They can help coordinate bugfix and disclosure. See | |
| 69 | −:ref:`Documentation/admin-guide/security-bugs.rst <securitybugs>` for more information. | |
| 70 | − | |
| 71 | −If you can't figure out which subsystem caused the issue, you should file | |
| 72 | −a bug in kernel.org bugzilla and send email to | |
| 73 | −linux-kernel@vger.kernel.org, referencing the bugzilla URL. (For more | |
| 74 | −information on the linux-kernel mailing list see | |
| 75 | −http://vger.kernel.org/lkml/). | |
| 76 | − | |
| 77 | − | |
| 78 | −Tips for reporting bugs | |
| 79 | −----------------------- | |
| 80 | − | |
| 81 | −If you haven't reported a bug before, please read: | |
| 82 | − | |
| 83 | − https://www.chiark.greenend.org.uk/~sgtatham/bugs.html | |
| 84 | − | |
| 85 | − http://www.catb.org/esr/faqs/smart-questions.html | |
| 86 | − | |
| 87 | −It's REALLY important to report bugs that seem unrelated as separate email | |
| 88 | −threads or separate bugzilla entries. If you report several unrelated | |
| 89 | −bugs at once, it's difficult for maintainers to tease apart the relevant | |
| 90 | −data. | |
| 91 | − | |
| 92 | − | |
| 93 | −Gather information | |
| 94 | −------------------ | |
| 95 | − | |
| 96 | −The most important information in a bug report is how to reproduce the | |
| 97 | −bug. This includes system information, and (most importantly) | |
| 98 | −step-by-step instructions for how a user can trigger the bug. | |
| 99 | − | |
| 100 | −If the failure includes an "OOPS:", take a picture of the screen, capture | |
| 101 | −a netconsole trace, or type the message from your screen into the bug | |
| 102 | −report. Please read "Documentation/admin-guide/bug-hunting.rst" before posting your | |
| 103 | −bug report. This explains what you should do with the "Oops" information | |
| 104 | −to make it useful to the recipient. | |
| 105 | − | |
| 106 | −This is a suggested format for a bug report sent via email or bugzilla. | |
| 107 | −Having a standardized bug report form makes it easier for you not to | |
| 108 | −overlook things, and easier for the developers to find the pieces of | |
| 109 | −information they're really interested in. If some information is not | |
| 110 | −relevant to your bug, feel free to exclude it. | |
| 111 | − | |
| 112 | −First run the ver_linux script included as scripts/ver_linux, which | |
| 113 | −reports the version of some important subsystems. Run this script with | |
| 114 | −the command ``awk -f scripts/ver_linux``. | |
| 115 | − | |
| 116 | −Use that information to fill in all fields of the bug report form, and | |
| 117 | −post it to the mailing list with a subject of "PROBLEM: <one line | |
| 118 | −summary from [1.]>" for easy identification by the developers:: | |
| 119 | − | |
| 120 | − [1.] One line summary of the problem: | |
| 121 | − [2.] Full description of the problem/report: | |
| 122 | − [3.] Keywords (i.e., modules, networking, kernel): | |
| 123 | − [4.] Kernel information | |
| 124 | − [4.1.] Kernel version (from /proc/version): | |
| 125 | − [4.2.] Kernel .config file: | |
| 126 | − [5.] Most recent kernel version which did not have the bug: | |
| 127 | − [6.] Output of Oops.. message (if applicable) with symbolic information | |
| 128 | − resolved (see Documentation/admin-guide/bug-hunting.rst) | |
| 129 | − [7.] A small shell script or example program which triggers the | |
| 130 | − problem (if possible) | |
| 131 | − [8.] Environment | |
| 132 | − [8.1.] Software (add the output of the ver_linux script here) | |
| 133 | − [8.2.] Processor information (from /proc/cpuinfo): | |
| 134 | − [8.3.] Module information (from /proc/modules): | |
| 135 | − [8.4.] Loaded driver and hardware information (/proc/ioports, /proc/iomem) | |
| 136 | − [8.5.] PCI information ('lspci -vvv' as root) | |
| 137 | − [8.6.] SCSI information (from /proc/scsi/scsi) | |
| 138 | − [8.7.] Other information that might be relevant to the problem | |
| 139 | − (please look in /proc and include all information that you | |
| 140 | − think to be relevant): | |
| 141 | − [X.] Other notes, patches, fixes, workarounds: | |
| 142 | − | |
| 143 | − | |
| 144 | −Follow up | |
| 145 | −========= | |
| 146 | − | |
| 147 | −Expectations for bug reporters | |
| 148 | −------------------------------ | |
| 149 | − | |
| 150 | −Linux kernel maintainers expect bug reporters to be able to follow up on | |
| 151 | −bug reports. That may include running new tests, applying patches, | |
| 152 | −recompiling your kernel, and/or re-triggering your bug. The most | |
| 153 | −frustrating thing for maintainers is for someone to report a bug, and then | |
| 154 | −never follow up on a request to try out a fix. | |
| 155 | − | |
| 156 | −That said, it's still useful for a kernel maintainer to know a bug exists | |
| 157 | −on a supported kernel, even if you can't follow up with retests. Follow | |
| 158 | −up reports, such as replying to the email thread with "I tried the latest | |
| 159 | −kernel and I can't reproduce my bug anymore" are also helpful, because | |
| 160 | −maintainers have to assume silence means things are still broken. | |
| 161 | − | |
| 162 | −Expectations for kernel maintainers | |
| 163 | −----------------------------------- | |
| 164 | − | |
| 165 | −Linux kernel maintainers are busy, overworked human beings. Some times | |
| 166 | −they may not be able to address your bug in a day, a week, or two weeks. | |
| 167 | −If they don't answer your email, they may be on vacation, or at a Linux | |
| 168 | −conference. Check the conference schedule at https://LWN.net for more info: | |
| 169 | − | |
| 170 | − https://lwn.net/Calendar/ | |
| 171 | − | |
| 172 | −In general, kernel maintainers take 1 to 5 business days to respond to | |
| 173 | −bugs. The majority of kernel maintainers are employed to work on the | |
| 174 | −kernel, and they may not work on the weekends. Maintainers are scattered | |
| 175 | −around the world, and they may not work in your time zone. Unless you | |
| 176 | −have a high priority bug, please wait at least a week after the first bug | |
| 177 | −report before sending the maintainer a reminder email. | |
| 178 | − | |
| 179 | −The exceptions to this rule are regressions, kernel crashes, security holes, | |
| 180 | −or userspace breakage caused by new kernel behavior. Those bugs should be | |
| 181 | −addressed by the maintainers ASAP. If you suspect a maintainer is not | |
| 182 | −responding to these types of bugs in a timely manner (especially during a | |
| 183 | −merge window), escalate the bug to LKML and Linus Torvalds. | |
| 184 | − | |
| 185 | −Thank you! | |
| 186 | − | |
| 187 | −[Some of this is taken from Frohwalt Egerer's original linux-kernel FAQ] | |
| @@ -9,25 +9,6 @@ · 8 unmodified lines | ||
| 9 | 9 | (for example by the kernel's build system) might contain content taken from |
| 10 | 10 | files which use a more restrictive license. |
| 11 | 11 | |
| 12 | −.. important:: | |
| 13 | − | |
| 14 | − This document is being prepared to replace | |
| 15 | − 'Documentation/admin-guide/reporting-bugs.rst'. The main work is done and | |
| 16 | − you are already free to follow its instructions when reporting issues to the | |
| 17 | − Linux kernel developers. But keep in mind, below text still needs a few | |
| 18 | − finishing touches and review. It was merged to the Linux kernel sources at | |
| 19 | − this stage to make this process easier and increase the text's visibility. | |
| 20 | − | |
| 21 | − Any improvements for the text or other feedback is thus very much welcome. | |
| 22 | − Please send it to 'Thorsten Leemhuis <linux@leemhuis.info>' and 'Jonathan | |
| 23 | − Corbet <corbet@lwn.net>', ideally with 'Linux kernel mailing list (LKML) | |
| 24 | − <linux-kernel@vger.kernel.org>' and the 'Linux Kernel Documentation List | |
| 25 | − <linux-doc@vger.kernel.org>' in CC. | |
| 26 | − | |
| 27 | − Areas in the text that still need work or discussion contain a hint like this | |
| 28 | − which point out the remaining issues; all of them start with the word "FIXME" | |
| 29 | − to make them easy to find. | |
| 30 | − | |
| 31 | 12 | |
| 32 | 13 | Reporting issues |
| 33 | 14 | ++++++++++++++++ |
| @@ -36,46 +17,45 @@ Reporting issues · 2 unmodified lines | ||
| 36 | 17 | The short guide (aka TL;DR) |
| 37 | 18 | =========================== |
| 38 | 19 | |
| 39 | −If you're facing multiple issues with the Linux kernel at once, report each | |
| 40 | −separately to its developers. Try your best guess which kernel part might be | |
| 41 | −causing the issue. Check the :ref:`MAINTAINERS <maintainers>` file for how its | |
| 42 | −developers expect to be told about issues. Note, it's rarely | |
| 43 | −`bugzilla.kernel.org <https://bugzilla.kernel.org/>`_, as in almost all cases | |
| 44 | −the report needs to be sent by email! | |
| 45 | − | |
| 46 | −Check the destination thoroughly for existing reports; also search the LKML | |
| 47 | −archives and the web. Join existing discussion if you find matches. If you | |
| 48 | −don't find any, install `the latest Linux mainline kernel | |
| 49 | −<https://kernel.org/>`_. Make sure it's vanilla, thus is not patched or using | |
| 50 | −add-on kernel modules. Also ensure the kernel is running in a healthy | |
| 51 | −environment and is not already tainted before the issue occurs. | |
| 52 | − | |
| 53 | −If you can reproduce your issue with the mainline kernel, send a report to the | |
| 54 | −destination you determined earlier. Make sure it includes all relevant | |
| 55 | −information, which in case of a regression should mention the change that's | |
| 56 | −causing it which can often can be found with a bisection. Also ensure the | |
| 57 | −report reaches all people that need to know about it, for example the security | |
| 58 | −team, the stable maintainers or the developers of the patch that causes a | |
| 59 | −regression. Once the report is out, answer any questions that might be raised | |
| 60 | −and help where you can. That includes keeping the ball rolling: every time a | |
| 61 | −new rc1 mainline kernel is released, check if the issue is still happening | |
| 62 | −there and attach a status update to your initial report. | |
| 63 | − | |
| 64 | −If you can not reproduce the issue with the mainline kernel, consider sticking | |
| 65 | −with it; if you'd like to use an older version line and want to see it fixed | |
| 66 | −there, first make sure it's still supported. Install its latest release as | |
| 67 | −vanilla kernel. If you cannot reproduce the issue there, try to find the commit | |
| 68 | −that fixed it in mainline or any discussion preceding it: those will often | |
| 69 | −mention if backporting is planed or considered too complex. If backporting was | |
| 70 | −not discussed, ask if it's in the cards. In case you don't find any commits or | |
| 71 | −a preceding discussion, see the Linux-stable mailing list archives for existing | |
| 72 | −reports, as it might be a regression specific to the version line. If it is, | |
| 73 | −report it like you would report a problem in mainline (including the | |
| 74 | −bisection). | |
| 75 | − | |
| 76 | −If you reached this point without a solution, ask for advice one the | |
| 77 | −subsystem's mailing list. | |
| 78 | − | |
| 20 | +Are you facing a regression with vanilla kernels from the same stable or | |
| 21 | +longterm series? One still supported? Then search the `LKML | |
| 22 | +<https://lore.kernel.org/lkml/>`_ and the `Linux stable mailing list | |
| 23 | +<https://lore.kernel.org/stable/>`_ archives for matching reports to join. If | |
| 24 | +you don't find any, install `the latest release from that series | |
| 25 | +<https://kernel.org/>`_. If it still shows the issue, report it to the stable | |
| 26 | +mailing list (stable@vger.kernel.org) and CC the regressions list | |
| 27 | +(regressions@lists.linux.dev); ideally also CC the maintainer and the mailing | |
| 28 | +list for the subsystem in question. | |
| 29 | + | |
| 30 | +In all other cases try your best guess which kernel part might be causing the | |
| 31 | +issue. Check the :ref:`MAINTAINERS <maintainers>` file for how its developers | |
| 32 | +expect to be told about problems, which most of the time will be by email with a | |
| 33 | +mailing list in CC. Check the destination's archives for matching reports; | |
| 34 | +search the `LKML <https://lore.kernel.org/lkml/>`_ and the web, too. If you | |
| 35 | +don't find any to join, install `the latest mainline kernel | |
| 36 | +<https://kernel.org/>`_. If the issue is present there, send a report. | |
| 37 | + | |
| 38 | +The issue was fixed there, but you would like to see it resolved in a still | |
| 39 | +supported stable or longterm series as well? Then install its latest release. | |
| 40 | +If it shows the problem, search for the change that fixed it in mainline and | |
| 41 | +check if backporting is in the works or was discarded; if it's neither, ask | |
| 42 | +those who handled the change for it. | |
| 43 | + | |
| 44 | +**General remarks**: When installing and testing a kernel as outlined above, | |
| 45 | +ensure it's vanilla (IOW: not patched and not using add-on modules). Also make | |
| 46 | +sure it's built and running in a healthy environment and not already tainted | |
| 47 | +before the issue occurs. | |
| 48 | + | |
| 49 | +If you are facing multiple issues with the Linux kernel at once, report each | |
| 50 | +separately. While writing your report, include all information relevant to the | |
| 51 | +issue, like the kernel and the distro used. In case of a regression, CC the | |
| 52 | +regressions mailing list (regressions@lists.linux.dev) to your report. Also try | |
| 53 | +to pin-point the culprit with a bisection; if you succeed, include its | |
| 54 | +commit-id and CC everyone in the sign-off-by chain. | |
| 55 | + | |
| 56 | +Once the report is out, answer any questions that come up and help where you | |
| 57 | +can. That includes keeping the ball rolling by occasionally retesting with newer | |
| 58 | +releases and sending a status update afterwards. | |
| 79 | 59 | |
| 80 | 60 | Step-by-step guide how to report issues to the kernel maintainers |
| 81 | 61 | ================================================================= |
| @@ -94,28 +74,23 @@ early if an issue that looks like a Linux kernel problem is actually caused by · 12 unmodified lines | ||
| 94 | 74 | something else. These steps thus help to ensure the time you invest in this |
| 95 | 75 | process won't feel wasted in the end: |
| 96 | 76 | |
| 97 | − * Stop reading this document and report the problem to your vendor instead, | |
| 98 | − unless you are running the latest mainline kernel already or are willing to | |
| 99 | − install it. This kernel must not be modified or enhanced in any way, and | |
| 100 | − thus be considered 'vanilla'. | |
| 77 | + * Are you facing an issue with a Linux kernel a hardware or software vendor | |
| 78 | + provided? Then in almost all cases you are better off to stop reading this | |
| 79 | + document and reporting the issue to your vendor instead, unless you are | |
| 80 | + willing to install the latest Linux version yourself. Be aware the latter | |
| 81 | + will often be needed anyway to hunt down and fix issues. | |
| 82 | + | |
| 83 | + * Perform a rough search for existing reports with your favorite internet | |
| 84 | + search engine; additionally, check the archives of the `Linux Kernel Mailing | |
| 85 | + List (LKML) <https://lore.kernel.org/lkml/>`_. If you find matching reports, | |
| 86 | + join the discussion instead of sending a new one. | |
| 101 | 87 | |
| 102 | 88 | * See if the issue you are dealing with qualifies as regression, security |
| 103 | 89 | issue, or a really severe problem: those are 'issues of high priority' that |
| 104 | 90 | need special handling in some steps that are about to follow. |
| 105 | 91 | |
| 106 | − * Check if your kernel was 'tainted' when the issue occurred, as the event | |
| 107 | − that made the kernel set this flag might be causing the issue you face. | |
| 108 | − | |
| 109 | − * Locate the driver or kernel subsystem that seems to be causing the issue. | |
| 110 | − Find out how and where its developers expect reports. Note: most of the | |
| 111 | − time this won't be bugzilla.kernel.org, as issues typically need to be sent | |
| 112 | − by mail to a maintainer and a public mailing list. | |
| 113 | − | |
| 114 | − * Search the archives of the bug tracker or mailing list in question | |
| 115 | − thoroughly for reports that might match your issue. Also check if you find | |
| 116 | − something with your favorite internet search engine or in the Linux Kernel | |
| 117 | − Mailing List (LKML) archives. If you find anything, join the discussion | |
| 118 | − instead of sending a new report. | |
| 92 | + * Make sure it's not the kernel's surroundings that are causing the issue | |
| 93 | + you face. | |
| 119 | 94 | |
| 120 | 95 | * Create a fresh backup and put system repair and restore tools at hand. |
| 121 | 96 | |
| @@ -123,8 +98,8 @@ process won't feel wasted in the end: · 1 unmodified line | ||
| 123 | 98 | kernel modules on-the-fly, which solutions like DKMS might be doing locally |
| 124 | 99 | without your knowledge. |
| 125 | 100 | |
| 126 | − * Make sure it's not the kernel's surroundings that are causing the issue | |
| 127 | − you face. | |
| 101 | + * Check if your kernel was 'tainted' when the issue occurred, as the event | |
| 102 | + that made the kernel set this flag might be causing the issue you face. | |
| 128 | 103 | |
| 129 | 104 | * Write down coarsely how to reproduce the issue. If you deal with multiple |
| 130 | 105 | issues at once, create separate notes for each of them and make sure they |
| @@ -132,20 +107,35 @@ process won't feel wasted in the end: · 1 unmodified line | ||
| 132 | 107 | needs to get reported to the kernel developers separately, unless they are |
| 133 | 108 | strongly entangled. |
| 134 | 109 | |
| 110 | + * If you are facing a regression within a stable or longterm version line | |
| 111 | + (say something broke when updating from 5.10.4 to 5.10.5), scroll down to | |
| 112 | + 'Dealing with regressions within a stable and longterm kernel line'. | |
| 113 | + | |
| 114 | + * Locate the driver or kernel subsystem that seems to be causing the issue. | |
| 115 | + Find out how and where its developers expect reports. Note: most of the | |
| 116 | + time this won't be bugzilla.kernel.org, as issues typically need to be sent | |
| 117 | + by mail to a maintainer and a public mailing list. | |
| 118 | + | |
| 119 | + * Search the archives of the bug tracker or mailing list in question | |
| 120 | + thoroughly for reports that might match your issue. If you find anything, | |
| 121 | + join the discussion instead of sending a new report. | |
| 122 | + | |
| 135 | 123 | After these preparations you'll now enter the main part: |
| 136 | 124 | |
| 137 | − * Install the latest Linux mainline kernel: that's where all issues get | |
| 138 | − fixed first, because it's the version line the kernel developers mainly | |
| 139 | − care about. Testing and reporting with the latest Linux stable kernel can | |
| 140 | − be an acceptable alternative in some situations, for example during the | |
| 141 | − merge window; but during that period you might want to suspend your efforts | |
| 142 | − till its end anyway. | |
| 125 | + * Unless you are already running the latest 'mainline' Linux kernel, better | |
| 126 | + go and install it for the reporting process. Testing and reporting with | |
| 127 | + the latest 'stable' Linux can be an acceptable alternative in some | |
| 128 | + situations; during the merge window that actually might be even the best | |
| 129 | + approach, but in that development phase it can be an even better idea to | |
| 130 | + suspend your efforts for a few days anyway. Whatever version you choose, | |
| 131 | + ideally use a 'vanilla' build. Ignoring these advices will dramatically | |
| 132 | + increase the risk your report will be rejected or ignored. | |
| 143 | 133 | |
| 144 | 134 | * Ensure the kernel you just installed does not 'taint' itself when |
| 145 | 135 | running. |
| 146 | 136 | |
| 147 | 137 | * Reproduce the issue with the kernel you just installed. If it doesn't show |
| 148 | − up there, head over to the instructions for issues only happening with | |
| 138 | + up there, scroll down to the instructions for issues only happening with | |
| 149 | 139 | stable and longterm kernels. |
| 150 | 140 | |
| 151 | 141 | * Optimize your notes: try to find and write the most straightforward way to |
| @@ -154,8 +144,8 @@ After these preparations you'll now enter the main part: · 2 unmodified lines | ||
| 154 | 144 | that hear about it for the first time. And if you learned something in this |
| 155 | 145 | process, consider searching again for existing reports about the issue. |
| 156 | 146 | |
| 157 | − * If the failure includes a stack dump, like an Oops does, consider decoding | |
| 158 | − it to find the offending line of code. | |
| 147 | + * If your failure involves a 'panic', 'Oops', 'warning', or 'BUG', consider | |
| 148 | + decoding the kernel log to find the line of code that triggered the error. | |
| 159 | 149 | |
| 160 | 150 | * If your problem is a regression, try to narrow down when the issue was |
| 161 | 151 | introduced as much as possible. |
| @@ -184,28 +174,55 @@ After these preparations you'll now enter the main part: · 22 unmodified lines | ||
| 184 | 174 | help yourself, if you don't get any help or if it's unsatisfying. |
| 185 | 175 | |
| 186 | 176 | |
| 177 | +Reporting regressions within a stable and longterm kernel line | |
| 178 | +-------------------------------------------------------------- | |
| 179 | + | |
| 180 | +This subsection is for you, if you followed above process and got sent here at | |
| 181 | +the point about regression within a stable or longterm kernel version line. You | |
| 182 | +face one of those if something breaks when updating from 5.10.4 to 5.10.5 (a | |
| 183 | +switch from 5.9.15 to 5.10.5 does not qualify). The developers want to fix such | |
| 184 | +regressions as quickly as possible, hence there is a streamlined process to | |
| 185 | +report them: | |
| 186 | + | |
| 187 | + * Check if the kernel developers still maintain the Linux kernel version | |
| 188 | + line you care about: go to the `front page of kernel.org | |
| 189 | + <https://kernel.org/>`_ and make sure it mentions | |
| 190 | + the latest release of the particular version line without an '[EOL]' tag. | |
| 191 | + | |
| 192 | + * Check the archives of the `Linux stable mailing list | |
| 193 | + <https://lore.kernel.org/stable/>`_ for existing reports. | |
| 194 | + | |
| 195 | + * Install the latest release from the particular version line as a vanilla | |
| 196 | + kernel. Ensure this kernel is not tainted and still shows the problem, as | |
| 197 | + the issue might have already been fixed there. If you first noticed the | |
| 198 | + problem with a vendor kernel, check a vanilla build of the last version | |
| 199 | + known to work performs fine as well. | |
| 200 | + | |
| 201 | + * Send a short problem report to the Linux stable mailing list | |
| 202 | + (stable@vger.kernel.org) and CC the Linux regressions mailing list | |
| 203 | + (regressions@lists.linux.dev); if you suspect the cause in a particular | |
| 204 | + subsystem, CC its maintainer and its mailing list. Roughly describe the | |
| 205 | + issue and ideally explain how to reproduce it. Mention the first version | |
| 206 | + that shows the problem and the last version that's working fine. Then | |
| 207 | + wait for further instructions. | |
| 208 | + | |
| 209 | +The reference section below explains each of these steps in more detail. | |
| 210 | + | |
| 211 | + | |
| 187 | 212 | Reporting issues only occurring in older kernel version lines |
| 188 | 213 | ------------------------------------------------------------- |
| 189 | 214 | |
| 190 | −This section is for you, if you tried the latest mainline kernel as outlined | |
| 215 | +This subsection is for you, if you tried the latest mainline kernel as outlined | |
| 191 | 216 | above, but failed to reproduce your issue there; at the same time you want to |
| 192 | −see the issue fixed in older version lines or a vendor kernel that's regularly | |
| 193 | −rebased on new stable or longterm releases. If that case follow these steps: | |
| 217 | +see the issue fixed in a still supported stable or longterm series or vendor | |
| 218 | +kernels regularly rebased on those. If that the case, follow these steps: | |
| 194 | 219 | |
| 195 | 220 | * Prepare yourself for the possibility that going through the next few steps |
| 196 | 221 | might not get the issue solved in older releases: the fix might be too big |
| 197 | 222 | or risky to get backported there. |
| 198 | 223 | |
| 199 | − * Check if the kernel developers still maintain the Linux kernel version | |
| 200 | − line you care about: go to the front page of kernel.org and make sure it | |
| 201 | − mentions the latest release of the particular version line without an | |
| 202 | − '[EOL]' tag. | |
| 203 | − | |
| 204 | − * Check the archives of the Linux stable mailing list for existing reports. | |
| 205 | − | |
| 206 | − * Install the latest release from the particular version line as a vanilla | |
| 207 | − kernel. Ensure this kernel is not tainted and still shows the problem, as | |
| 208 | − the issue might have already been fixed there. | |
| 224 | + * Perform the first three steps in the section "Dealing with regressions | |
| 225 | + within a stable and longterm kernel line" above. | |
| 209 | 226 | |
| 210 | 227 | * Search the Linux kernel version control system for the change that fixed |
| 211 | 228 | the issue in mainline, as its commit message might tell you if the fix is |
| @@ -215,22 +232,13 @@ rebased on new stable or longterm releases. If that case follow these steps: · 3 unmodified lines | ||
| 215 | 232 | deemed unsuitable for backporting. If backporting was not considered at |
| 216 | 233 | all, join the newest discussion, asking if it's in the cards. |
| 217 | 234 | |
| 218 | − * Check if you're dealing with a regression that was never present in | |
| 219 | − mainline by installing the first release of the version line you care | |
| 220 | − about. If the issue doesn't show up with it, you basically need to report | |
| 221 | − the issue with this version like you would report a problem with mainline | |
| 222 | − (see above). This ideally includes a bisection followed by a search for | |
| 223 | − existing reports on the net; with the help of the subject and the two | |
| 224 | − relevant commit-ids. If that doesn't turn up anything, write the report; CC | |
| 225 | − or forward the report to the stable maintainers, the stable mailing list, | |
| 226 | − and those who authored the change. Include the shortened commit-id if you | |
| 227 | − found the change that causes it. | |
| 228 | − | |
| 229 | 235 | * One of the former steps should lead to a solution. If that doesn't work |
| 230 | 236 | out, ask the maintainers for the subsystem that seems to be causing the |
| 231 | 237 | issue for advice; CC the mailing list for the particular subsystem as well |
| 232 | 238 | as the stable mailing list. |
| 233 | 239 | |
| 240 | +The reference section below explains each of these steps in more detail. | |
| 241 | + | |
| 234 | 242 | |
| 235 | 243 | Reference section: Reporting issues to the kernel maintainers |
| 236 | 244 | ============================================================= |
| @@ -276,54 +284,103 @@ issues to the Linux kernel developers. · 39 unmodified lines | ||
| 276 | 284 | Make sure you're using the upstream Linux kernel |
| 277 | 285 | ------------------------------------------------ |
| 278 | 286 | |
| 279 | − *Stop reading this document and report the problem to your vendor instead, | |
| 280 | − unless you are running the latest mainline kernel already or are willing to | |
| 281 | − install it. This kernel must not be modified or enhanced in any way, and | |
| 282 | − thus be considered 'vanilla'.* | |
| 287 | + *Are you facing an issue with a Linux kernel a hardware or software vendor | |
| 288 | + provided? Then in almost all cases you are better off to stop reading this | |
| 289 | + document and reporting the issue to your vendor instead, unless you are | |
| 290 | + willing to install the latest Linux version yourself. Be aware the latter | |
| 291 | + will often be needed anyway to hunt down and fix issues.* | |
| 283 | 292 | |
| 284 | 293 | Like most programmers, Linux kernel developers don't like to spend time dealing |
| 285 | −with reports for issues that don't even happen with the source code they | |
| 286 | −maintain: it's just a waste everybody's time, yours included. That's why you | |
| 287 | −later will have to test your issue with the latest 'vanilla' kernel: a kernel | |
| 288 | −that was build using the Linux sources taken straight from `kernel.org | |
| 289 | −<https://kernel.org/>`_ and not modified or enhanced in any way. | |
| 290 | − | |
| 291 | −Almost all kernels used in devices (Computers, Laptops, Smartphones, Routers, | |
| 292 | −…) and most kernels shipped by Linux distributors are ancient from the point of | |
| 293 | −kernel development and heavily modified. They thus do not qualify for reporting | |
| 294 | −an issue to the Linux kernel developers: the issue you face with such a kernel | |
| 295 | −might be fixed already or caused by the changes or additions, even if they look | |
| 296 | −small or totally unrelated. That's why issues with such kernels need to be | |
| 297 | −reported to the vendor that distributed it. Its developers should look into the | |
| 294 | +with reports for issues that don't even happen with their current code. It's | |
| 295 | +just a waste everybody's time, especially yours. Unfortunately such situations | |
| 296 | +easily happen when it comes to the kernel and often leads to frustration on both | |
| 297 | +sides. That's because almost all Linux-based kernels pre-installed on devices | |
| 298 | +(Computers, Laptops, Smartphones, Routers, …) and most shipped by Linux | |
| 299 | +distributors are quite distant from the official Linux kernel as distributed by | |
| 300 | +kernel.org: these kernels from these vendors are often ancient from the point of | |
| 301 | +Linux development or heavily modified, often both. | |
| 302 | + | |
| 303 | +Most of these vendor kernels are quite unsuitable for reporting issues to the | |
| 304 | +Linux kernel developers: an issue you face with one of them might have been | |
| 305 | +fixed by the Linux kernel developers months or years ago already; additionally, | |
| 306 | +the modifications and enhancements by the vendor might be causing the issue you | |
| 307 | +face, even if they look small or totally unrelated. That's why you should report | |
| 308 | +issues with these kernels to the vendor. Its developers should look into the | |
| 298 | 309 | report and, in case it turns out to be an upstream issue, fix it directly |
| 299 | −upstream or report it there. In practice that sometimes does not work out. If | |
| 300 | −that the case, you might want to circumvent the vendor by installing the latest | |
| 301 | −mainline kernel yourself and reporting the issue as outlined in this document; | |
| 302 | −just make sure to use really fresh kernel (see below). | |
| 303 | − | |
| 304 | − | |
| 305 | −.. note:: | |
| 306 | − | |
| 307 | − FIXME: Should we accept reports for issues with kernel images that are pretty | |
| 308 | − close to vanilla? But when are they close enough and how to put that line in | |
| 309 | − words? Maybe something like this? | |
| 310 | +upstream or forward the report there. In practice that often does not work out | |
| 311 | +or might not what you want. You thus might want to consider circumventing the | |
| 312 | +vendor by installing the very latest Linux kernel core yourself. If that's an | |
| 313 | +option for you move ahead in this process, as a later step in this guide will | |
| 314 | +explain how to do that once it rules out other potential causes for your issue. | |
| 315 | + | |
| 316 | +Note, the previous paragraph is starting with the word 'most', as sometimes | |
| 317 | +developers in fact are willing to handle reports about issues occurring with | |
| 318 | +vendor kernels. If they do in the end highly depends on the developers and the | |
| 319 | +issue in question. Your chances are quite good if the distributor applied only | |
| 320 | +small modifications to a kernel based on a recent Linux version; that for | |
| 321 | +example often holds true for the mainline kernels shipped by Debian GNU/Linux | |
| 322 | +Sid or Fedora Rawhide. Some developers will also accept reports about issues | |
| 323 | +with kernels from distributions shipping the latest stable kernel, as long as | |
| 324 | +its only slightly modified; that for example is often the case for Arch Linux, | |
| 325 | +regular Fedora releases, and openSUSE Tumbleweed. But keep in mind, you better | |
| 326 | +want to use a mainline Linux and avoid using a stable kernel for this | |
| 327 | +process, as outlined in the section 'Install a fresh kernel for testing' in more | |
| 328 | +detail. | |
| 329 | + | |
| 330 | +Obviously you are free to ignore all this advice and report problems with an old | |
| 331 | +or heavily modified vendor kernel to the upstream Linux developers. But note, | |
| 332 | +those often get rejected or ignored, so consider yourself warned. But it's still | |
| 333 | +better than not reporting the issue at all: sometimes such reports directly or | |
| 334 | +indirectly will help to get the issue fixed over time. | |
| 335 | + | |
| 336 | + | |
| 337 | +Search for existing reports, first run | |
| 338 | +-------------------------------------- | |
| 339 | + | |
| 340 | + *Perform a rough search for existing reports with your favorite internet | |
| 341 | + search engine; additionally, check the archives of the Linux Kernel Mailing | |
| 342 | + List (LKML). If you find matching reports, join the discussion instead of | |
| 343 | + sending a new one.* | |
| 344 | + | |
| 345 | +Reporting an issue that someone else already brought forward is often a waste of | |
| 346 | +time for everyone involved, especially you as the reporter. So it's in your own | |
| 347 | +interest to thoroughly check if somebody reported the issue already. At this | |
| 348 | +step of the process it's okay to just perform a rough search: a later step will | |
| 349 | +tell you to perform a more detailed search once you know where your issue needs | |
| 350 | +to be reported to. Nevertheless, do not hurry with this step of the reporting | |
| 351 | +process, it can save you time and trouble. | |
| 352 | + | |
| 353 | +Simply search the internet with your favorite search engine first. Afterwards, | |
| 354 | +search the `Linux Kernel Mailing List (LKML) archives | |
| 355 | +<https://lore.kernel.org/lkml/>`_. | |
| 310 | 356 | |
| 311 | − *Note: Some Linux kernel developers accept reports from vendor kernels that | |
| 312 | − are known to be close to upstream. That for example is often the case for | |
| 313 | − the kernels that Debian GNU/Linux Sid or Fedora Rawhide ship, which are | |
| 314 | − normally following mainline closely and carry only a few patches. So a | |
| 315 | − report with one of these might be accepted by the developers that need to | |
| 316 | − handle it. But if they do, depends heavily on the individual developers and | |
| 317 | − the issue at hand. That's why installing a mainline vanilla kernel is the | |
| 318 | − safe bet.* | |
| 357 | +If you get flooded with results consider telling your search engine to limit | |
| 358 | +search timeframe to the past month or year. And wherever you search, make sure | |
| 359 | +to use good search terms; vary them a few times, too. While doing so try to | |
| 360 | +look at the issue from the perspective of someone else: that will help you to | |
| 361 | +come up with other words to use as search terms. Also make sure not to use too | |
| 362 | +many search terms at once. Remember to search with and without information like | |
| 363 | +the name of the kernel driver or the name of the affected hardware component. | |
| 364 | +But its exact brand name (say 'ASUS Red Devil Radeon RX 5700 XT Gaming OC') | |
| 365 | +often is not much helpful, as it is too specific. Instead try search terms like | |
| 366 | +the model line (Radeon 5700 or Radeon 5000) and the code name of the main chip | |
| 367 | +('Navi' or 'Navi10') with and without its manufacturer ('AMD'). | |
| 319 | 368 | |
| 320 | − *Arch Linux, other Fedora releases, and openSUSE Tumbleweed often use quite | |
| 321 | − recent stable kernels that are pretty close to upstream, too. Some | |
| 322 | − developers accept bugs from them as well. But note that you normally should | |
| 323 | − avoid stable kernels for reporting issues and use a mainline kernel instead | |
| 324 | − (see below).* | |
| 369 | +In case you find an existing report about your issue, join the discussion, as | |
| 370 | +you might be able to provide valuable additional information. That can be | |
| 371 | +important even when a fix is prepared or in its final stages already, as | |
| 372 | +developers might look for people that can provide additional information or | |
| 373 | +test a proposed fix. Jump to the section 'Duties after the report went out' for | |
| 374 | +details on how to get properly involved. | |
| 325 | 375 | |
| 326 | − Are there any other major Linux distributions that should be mentioned here? | |
| 376 | +Note, searching `bugzilla.kernel.org <https://bugzilla.kernel.org/>`_ might also | |
| 377 | +be a good idea, as that might provide valuable insights or turn up matching | |
| 378 | +reports. If you find the latter, just keep in mind: most subsystems expect | |
| 379 | +reports in different places, as described below in the section "Check where you | |
| 380 | +need to report your issue". The developers that should take care of the issue | |
| 381 | +thus might not even be aware of the bugzilla ticket. Hence, check the ticket if | |
| 382 | +the issue already got reported as outlined in this document and if not consider | |
| 383 | +doing so. | |
| 327 | 384 | |
| 328 | 385 | |
| 329 | 386 | Issue of high priority? |
| @@ -365,6 +422,75 @@ fatal error where the kernel stop itself) with a 'Oops' (a recoverable error), · 35 unmodified lines | ||
| 365 | 422 | as the kernel remains running after the latter. |
| 366 | 423 | |
| 367 | 424 | |
| 425 | +Ensure a healthy environment | |
| 426 | +---------------------------- | |
| 427 | + | |
| 428 | + *Make sure it's not the kernel's surroundings that are causing the issue | |
| 429 | + you face.* | |
| 430 | + | |
| 431 | +Problems that look a lot like a kernel issue are sometimes caused by build or | |
| 432 | +runtime environment. It's hard to rule out that problem completely, but you | |
| 433 | +should minimize it: | |
| 434 | + | |
| 435 | + * Use proven tools when building your kernel, as bugs in the compiler or the | |
| 436 | + binutils can cause the resulting kernel to misbehave. | |
| 437 | + | |
| 438 | + * Ensure your computer components run within their design specifications; | |
| 439 | + that's especially important for the main processor, the main memory, and the | |
| 440 | + motherboard. Therefore, stop undervolting or overclocking when facing a | |
| 441 | + potential kernel issue. | |
| 442 | + | |
| 443 | + * Try to make sure it's not faulty hardware that is causing your issue. Bad | |
| 444 | + main memory for example can result in a multitude of issues that will | |
| 445 | + manifest itself in problems looking like kernel issues. | |
| 446 | + | |
| 447 | + * If you're dealing with a filesystem issue, you might want to check the file | |
| 448 | + system in question with ``fsck``, as it might be damaged in a way that leads | |
| 449 | + to unexpected kernel behavior. | |
| 450 | + | |
| 451 | + * When dealing with a regression, make sure it's not something else that | |
| 452 | + changed in parallel to updating the kernel. The problem for example might be | |
| 453 | + caused by other software that was updated at the same time. It can also | |
| 454 | + happen that a hardware component coincidentally just broke when you rebooted | |
| 455 | + into a new kernel for the first time. Updating the systems BIOS or changing | |
| 456 | + something in the BIOS Setup can also lead to problems that on look a lot | |
| 457 | + like a kernel regression. | |
| 458 | + | |
| 459 | + | |
| 460 | +Prepare for emergencies | |
| 461 | +----------------------- | |
| 462 | + | |
| 463 | + *Create a fresh backup and put system repair and restore tools at hand.* | |
| 464 | + | |
| 465 | +Reminder, you are dealing with computers, which sometimes do unexpected things, | |
| 466 | +especially if you fiddle with crucial parts like the kernel of its operating | |
| 467 | +system. That's what you are about to do in this process. Thus, make sure to | |
| 468 | +create a fresh backup; also ensure you have all tools at hand to repair or | |
| 469 | +reinstall the operating system as well as everything you need to restore the | |
| 470 | +backup. | |
| 471 | + | |
| 472 | + | |
| 473 | +Make sure your kernel doesn't get enhanced | |
| 474 | +------------------------------------------ | |
| 475 | + | |
| 476 | + *Ensure your system does not enhance its kernels by building additional | |
| 477 | + kernel modules on-the-fly, which solutions like DKMS might be doing locally | |
| 478 | + without your knowledge.* | |
| 479 | + | |
| 480 | +The risk your issue report gets ignored or rejected dramatically increases if | |
| 481 | +your kernel gets enhanced in any way. That's why you should remove or disable | |
| 482 | +mechanisms like akmods and DKMS: those build add-on kernel modules | |
| 483 | +automatically, for example when you install a new Linux kernel or boot it for | |
| 484 | +the first time. Also remove any modules they might have installed. Then reboot | |
| 485 | +before proceeding. | |
| 486 | + | |
| 487 | +Note, you might not be aware that your system is using one of these solutions: | |
| 488 | +they often get set up silently when you install Nvidia's proprietary graphics | |
| 489 | +driver, VirtualBox, or other software that requires a some support from a | |
| 490 | +module not part of the Linux kernel. That why your might need to uninstall the | |
| 491 | +packages with such software to get rid of any 3rd party kernel module. | |
| 492 | + | |
| 493 | + | |
| 368 | 494 | Check 'taint' flag |
| 369 | 495 | ------------------ |
| 370 | 496 | |
| @@ -433,9 +559,52 @@ three things: · 62 unmodified lines | ||
| 433 | 559 | the name of the module in question). |
| 434 | 560 | |
| 435 | 561 | |
| 436 | −Locate kernel area that causes the issue | |
| 562 | +Document how to reproduce issue | |
| 563 | +------------------------------- | |
| 564 | + | |
| 565 | + *Write down coarsely how to reproduce the issue. If you deal with multiple | |
| 566 | + issues at once, create separate notes for each of them and make sure they | |
| 567 | + work independently on a freshly booted system. That's needed, as each issue | |
| 568 | + needs to get reported to the kernel developers separately, unless they are | |
| 569 | + strongly entangled.* | |
| 570 | + | |
| 571 | +If you deal with multiple issues at once, you'll have to report each of them | |
| 572 | +separately, as they might be handled by different developers. Describing | |
| 573 | +various issues in one report also makes it quite difficult for others to tear | |
| 574 | +it apart. Hence, only combine issues in one report if they are very strongly | |
| 575 | +entangled. | |
| 576 | + | |
| 577 | +Additionally, during the reporting process you will have to test if the issue | |
| 578 | +happens with other kernel versions. Therefore, it will make your work easier if | |
| 579 | +you know exactly how to reproduce an issue quickly on a freshly booted system. | |
| 580 | + | |
| 581 | +Note: it's often fruitless to report issues that only happened once, as they | |
| 582 | +might be caused by a bit flip due to cosmic radiation. That's why you should | |
| 583 | +try to rule that out by reproducing the issue before going further. Feel free | |
| 584 | +to ignore this advice if you are experienced enough to tell a one-time error | |
| 585 | +due to faulty hardware apart from a kernel issue that rarely happens and thus | |
| 586 | +is hard to reproduce. | |
| 587 | + | |
| 588 | + | |
| 589 | +Regression in stable or longterm kernel? | |
| 437 | 590 | ---------------------------------------- |
| 438 | 591 | |
| 592 | + *If you are facing a regression within a stable or longterm version line | |
| 593 | + (say something broke when updating from 5.10.4 to 5.10.5), scroll down to | |
| 594 | + 'Dealing with regressions within a stable and longterm kernel line'.* | |
| 595 | + | |
| 596 | +Regression within a stable and longterm kernel version line are something the | |
| 597 | +Linux developers want to fix badly, as such issues are even more unwanted than | |
| 598 | +regression in the main development branch, as they can quickly affect a lot of | |
| 599 | +people. The developers thus want to learn about such issues as quickly as | |
| 600 | +possible, hence there is a streamlined process to report them. Note, | |
| 601 | +regressions with newer kernel version line (say something broke when switching | |
| 602 | +from 5.9.15 to 5.10.5) do not qualify. | |
| 603 | + | |
| 604 | + | |
| 605 | +Check where you need to report your issue | |
| 606 | +----------------------------------------- | |
| 607 | + | |
| 439 | 608 | *Locate the driver or kernel subsystem that seems to be causing the issue. |
| 440 | 609 | Find out how and where its developers expect reports. Note: most of the |
| 441 | 610 | time this won't be bugzilla.kernel.org, as issues typically need to be sent |
| @@ -526,26 +695,6 @@ example above does not have such a line. That is the case for most sections, as · 84 unmodified lines | ||
| 526 | 695 | Linux kernel development is completely driven by mail. Very few subsystems use |
| 527 | 696 | a bug tracker, and only some of those rely on bugzilla.kernel.org. |
| 528 | 697 | |
| 529 | − | |
| 530 | −.. note:: | |
| 531 | − | |
| 532 | − FIXME: The old text took a totally different approach to bugzilla.kernel.org, | |
| 533 | − as it mentions it as the place to file issue for people that don't known how | |
| 534 | − to contact the appropriate people. The new one mentions it rarely; and when | |
| 535 | − it does like here, it warns users that it's often the wrong place to go. | |
| 536 | − | |
| 537 | − This approach was chosen as the main author of this document noticed quite a | |
| 538 | − few users (or even a lot?) get no reply to the bugs they file in bugzilla. | |
| 539 | − That's kind of expected, as quite a few (many? most?) of the maintainers | |
| 540 | − don't even get notified when reports for their subsystem get filed there. And | |
| 541 | − not getting a single reply to report is something that is just annoying for | |
| 542 | − users and might make them angry. Improving bugzilla.k.o would be an option, | |
| 543 | − but on the kernel and maintainers summit 2017 it was agreed on to first go | |
| 544 | − this route (sorry it took so long): it's easier to achieve and less | |
| 545 | − controversial, as putting additional burden on already overworked maintainers | |
| 546 | − is unlikely to get well received. | |
| 547 | − | |
| 548 | − | |
| 549 | 698 | In this and many other cases you thus have to look for lines starting with |
| 550 | 699 | 'Mail:' instead. Those mention the name and the email addresses for the |
| 551 | 700 | maintainers of the particular code. Also look for a line starting with 'Mailing |
| @@ -558,21 +707,6 @@ and might leave some work for other developers on the subsystem specific list; · 6 unmodified lines | ||
| 558 | 707 | and LKML is important to have one place where all issue reports can be found. |
| 559 | 708 | |
| 560 | 709 | |
| 561 | −.. note:: | |
| 562 | − | |
| 563 | − FIXME: Above section tells users to always CC LKML. These days it's a kind of | |
| 564 | − "catch-all" list anyway, which nearly nobody seems to follow closely. So it | |
| 565 | − seems appropriate to go "all in" and make people send their reports here, | |
| 566 | − too, as everything (reports, fixes, ...) then can be found in one place (at | |
| 567 | − least for all reports sent by mail and all subsystems that CC LKML). | |
| 568 | − | |
| 569 | − Related: Should we create mailing list like 'linux-issues@vger.kernel.org' | |
| 570 | − and tell users above to always CC it when reporting issues? Then there would | |
| 571 | − be one central place reporters could search for existing reports (at least | |
| 572 | − for issues reported by mail) without getting regular LKML traffic mixed into | |
| 573 | − the results. | |
| 574 | − | |
| 575 | − | |
| 576 | 710 | Finding the maintainers with the help of a script |
| 577 | 711 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 578 | 712 | |
| @@ -611,205 +745,89 @@ modified during tree-wide cleanups by developers that do not care about the · 32 unmodified lines | ||
| 611 | 745 | particular driver at all. |
| 612 | 746 | |
| 613 | 747 | |
| 614 | −Search for existing reports | |
| 615 | −--------------------------- | |
| 748 | +Search for existing reports, second run | |
| 749 | +--------------------------------------- | |
| 616 | 750 | |
| 617 | 751 | *Search the archives of the bug tracker or mailing list in question |
| 618 | − thoroughly for reports that might match your issue. Also check if you find | |
| 619 | − something with your favorite internet search engine or in the Linux Kernel | |
| 620 | − Mailing List (LKML) archives. If you find anything, join the discussion | |
| 621 | − instead of sending a new report.* | |
| 622 | − | |
| 623 | −Reporting an issue that someone else already brought forward is often a waste | |
| 624 | −of time for everyone involved, especially you as the reporter. So it's in your | |
| 625 | −own interest to thoroughly check if somebody reported the issue already. Thus | |
| 626 | −do not hurry with this step of the reporting process. Spending 30 to 60 minutes | |
| 627 | −or even more time can save you and others quite a lot of time and trouble. | |
| 628 | − | |
| 629 | −The best place to search is the bug tracker or the mailing list where your | |
| 630 | −report needs to be filed. You'll find quite a few of those lists on | |
| 631 | −`lore.kernel.org <https://lore.kernel.org/>`_, but some are hosted in | |
| 632 | −different places. That for example is the case for the ath10k WiFi driver used | |
| 633 | −as example in the previous step. But you'll often find the archives for these | |
| 634 | −lists easily on the net. Searching for 'archive ath10k@lists.infradead.org' for | |
| 635 | −example will quickly lead you to the `Info page for the ath10k mailing list | |
| 636 | −<https://lists.infradead.org/mailman/listinfo/ath10k>`_, which at the top links | |
| 637 | −to its `list archives <https://lists.infradead.org/pipermail/ath10k/>`_. | |
| 638 | − | |
| 639 | −Sadly this and quite a few other lists miss a way to search the archives. In | |
| 640 | −those cases use a regular internet search engine and add something like | |
| 752 | + thoroughly for reports that might match your issue. If you find anything, | |
| 753 | + join the discussion instead of sending a new report.* | |
| 754 | + | |
| 755 | +As mentioned earlier already: reporting an issue that someone else already | |
| 756 | +brought forward is often a waste of time for everyone involved, especially you | |
| 757 | +as the reporter. That's why you should search for existing report again, now | |
| 758 | +that you know where they need to be reported to. If it's mailing list, you will | |
| 759 | +often find its archives on `lore.kernel.org <https://lore.kernel.org/>`_. | |
| 760 | + | |
| 761 | +But some list are hosted in different places. That for example is the case for | |
| 762 | +the ath10k WiFi driver used as example in the previous step. But you'll often | |
| 763 | +find the archives for these lists easily on the net. Searching for 'archive | |
| 764 | +ath10k@lists.infradead.org' for example will lead you to the `Info page for the | |
| 765 | +ath10k mailing list <https://lists.infradead.org/mailman/listinfo/ath10k>`_, | |
| 766 | +which at the top links to its | |
| 767 | +`list archives <https://lists.infradead.org/pipermail/ath10k/>`_. Sadly this and | |
| 768 | +quite a few other lists miss a way to search the archives. In those cases use a | |
| 769 | +regular internet search engine and add something like | |
| 641 | 770 | 'site:lists.infradead.org/pipermail/ath10k/' to your search terms, which limits |
| 642 | 771 | the results to the archives at that URL. |
| 643 | 772 | |
| 644 | −Additionally, search the internet and the `Linux Kernel Mailing List (LKML) | |
| 645 | −archives <https://lore.kernel.org/lkml/>`_, as maybe the real culprit might be | |
| 646 | −in some other subsystem. Searching in `bugzilla.kernel.org | |
| 647 | −<https://bugzilla.kernel.org/>`_ might also be a good idea, but if you find | |
| 648 | −anything there keep in mind: most subsystems expect reports in different | |
| 649 | −places, hence those you find there might have not even reached the people | |
| 650 | −responsible for the subsystem in question. Nevertheless, the data there might | |
| 651 | −provide valuable insights. | |
| 652 | − | |
| 653 | −If you get flooded with results consider telling your search engine to limit | |
| 654 | −search timeframe to the past month or year. And wherever you search, make sure | |
| 655 | −to use good search terms; vary them a few times, too. While doing so try to | |
| 656 | −look at the issue from the perspective of someone else: that will help you to | |
| 657 | −come up with other words to use as search terms. Also make sure not to use too | |
| 658 | −many search terms at once. Remember to search with and without information like | |
| 659 | −the name of the kernel driver or the name of the affected hardware component. | |
| 660 | −But its exact brand name (say 'ASUS Red Devil Radeon RX 5700 XT Gaming OC') | |
| 661 | −often is not much helpful, as it is too specific. Instead try search terms like | |
| 662 | −the model line (Radeon 5700 or Radeon 5000) and the code name of the main chip | |
| 663 | −('Navi' or 'Navi10') with and without its manufacturer ('AMD'). | |
| 664 | − | |
| 665 | −In case you find an existing report about your issue, join the discussion, as | |
| 666 | −you might be able to provide valuable additional information. That can be | |
| 667 | −important even when a fix is prepared or in its final stages already, as | |
| 668 | −developers might look for people that can provide additional information or | |
| 669 | −test a proposed fix. Jump to the section 'Duties after the report went out' for | |
| 670 | −details on how to get properly involved. | |
| 671 | − | |
| 672 | − | |
| 673 | −Prepare for emergencies | |
| 674 | −----------------------- | |
| 675 | − | |
| 676 | − *Create a fresh backup and put system repair and restore tools at hand.* | |
| 677 | − | |
| 678 | −Reminder, you are dealing with computers, which sometimes do unexpected things, | |
| 679 | −especially if you fiddle with crucial parts like the kernel of its operating | |
| 680 | −system. That's what you are about to do in this process. Thus, make sure to | |
| 681 | −create a fresh backup; also ensure you have all tools at hand to repair or | |
| 682 | −reinstall the operating system as well as everything you need to restore the | |
| 683 | −backup. | |
| 684 | − | |
| 685 | − | |
| 686 | −Make sure your kernel doesn't get enhanced | |
| 687 | −------------------------------------------ | |
| 688 | − | |
| 689 | − *Ensure your system does not enhance its kernels by building additional | |
| 690 | − kernel modules on-the-fly, which solutions like DKMS might be doing locally | |
| 691 | − without your knowledge.* | |
| 692 | − | |
| 693 | −Your kernel must be 'vanilla' when reporting an issue, but stops being pure as | |
| 694 | −soon as it loads a kernel module not built from the sources used to compile the | |
| 695 | −kernel image itself. That's why you need to ensure your Linux kernel stays | |
| 696 | −vanilla by removing or disabling mechanisms like akmods and DKMS: those might | |
| 697 | −build additional kernel modules automatically, for example when your boot into | |
| 698 | −a newly installed Linux kernel the first time. Reboot after removing them and | |
| 699 | −any modules they installed. | |
| 700 | − | |
| 701 | −Note, you might not be aware that your system is using one of these solutions: | |
| 702 | −they often get set up silently when you install Nvidia's proprietary graphics | |
| 703 | −driver, VirtualBox, or other software that requires a some support from a | |
| 704 | −module not part of the Linux kernel. That why your might need to uninstall the | |
| 705 | −packages with such software to get rid of any 3rd party kernel module. | |
| 706 | − | |
| 707 | − | |
| 708 | −Ensure a healthy environment | |
| 709 | −---------------------------- | |
| 710 | − | |
| 711 | − *Make sure it's not the kernel's surroundings that are causing the issue | |
| 712 | − you face.* | |
| 713 | − | |
| 714 | −Problems that look a lot like a kernel issue are sometimes caused by build or | |
| 715 | −runtime environment. It's hard to rule out that problem completely, but you | |
| 716 | −should minimize it: | |
| 717 | − | |
| 718 | − * Use proven tools when building your kernel, as bugs in the compiler or the | |
| 719 | − binutils can cause the resulting kernel to misbehave. | |
| 720 | − | |
| 721 | − * Ensure your computer components run within their design specifications; | |
| 722 | − that's especially important for the main processor, the main memory, and the | |
| 723 | − motherboard. Therefore, stop undervolting or overclocking when facing a | |
| 724 | − potential kernel issue. | |
| 725 | − | |
| 726 | − * Try to make sure it's not faulty hardware that is causing your issue. Bad | |
| 727 | − main memory for example can result in a multitude of issues that will | |
| 728 | − manifest itself in problems looking like kernel issues. | |
| 729 | − | |
| 730 | − * If you're dealing with a filesystem issue, you might want to check the file | |
| 731 | − system in question with ``fsck``, as it might be damaged in a way that leads | |
| 732 | − to unexpected kernel behavior. | |
| 733 | − | |
| 734 | − * When dealing with a regression, make sure it's not something else that | |
| 735 | − changed in parallel to updating the kernel. The problem for example might be | |
| 736 | − caused by other software that was updated at the same time. It can also | |
| 737 | − happen that a hardware component coincidentally just broke when you rebooted | |
| 738 | − into a new kernel for the first time. Updating the systems BIOS or changing | |
| 739 | − something in the BIOS Setup can also lead to problems that on look a lot | |
| 740 | − like a kernel regression. | |
| 741 | − | |
| 773 | +It's also wise to check the internet, LKML and maybe bugzilla.kernel.org again | |
| 774 | +at this point. If your report needs to be filed in a bug tracker, you may want | |
| 775 | +to check the mailing list archives for the subsystem as well, as someone might | |
| 776 | +have reported it only there. | |
| 742 | 777 | |
| 743 | −Document how to reproduce issue | |
| 744 | −------------------------------- | |
| 778 | +For details how to search and what to do if you find matching reports see | |
| 779 | +"Search for existing reports, first run" above. | |
| 745 | 780 | |
| 746 | − *Write down coarsely how to reproduce the issue. If you deal with multiple | |
| 747 | − issues at once, create separate notes for each of them and make sure they | |
| 748 | − work independently on a freshly booted system. That's needed, as each issue | |
| 749 | − needs to get reported to the kernel developers separately, unless they are | |
| 750 | − strongly entangled.* | |
| 751 | − | |
| 752 | −If you deal with multiple issues at once, you'll have to report each of them | |
| 753 | −separately, as they might be handled by different developers. Describing | |
| 754 | −various issues in one report also makes it quite difficult for others to tear | |
| 755 | −it apart. Hence, only combine issues in one report if they are very strongly | |
| 756 | −entangled. | |
| 757 | − | |
| 758 | −Additionally, during the reporting process you will have to test if the issue | |
| 759 | −happens with other kernel versions. Therefore, it will make your work easier if | |
| 760 | −you know exactly how to reproduce an issue quickly on a freshly booted system. | |
| 761 | − | |
| 762 | −Note: it's often fruitless to report issues that only happened once, as they | |
| 763 | −might be caused by a bit flip due to cosmic radiation. That's why you should | |
| 764 | −try to rule that out by reproducing the issue before going further. Feel free | |
| 765 | −to ignore this advice if you are experienced enough to tell a one-time error | |
| 766 | −due to faulty hardware apart from a kernel issue that rarely happens and thus | |
| 767 | −is hard to reproduce. | |
| 781 | +Do not hurry with this step of the reporting process: spending 30 to 60 minutes | |
| 782 | +or even more time can save you and others quite a lot of time and trouble. | |
| 768 | 783 | |
| 769 | 784 | |
| 770 | 785 | Install a fresh kernel for testing |
| 771 | 786 | ---------------------------------- |
| 772 | 787 | |
| 773 | − *Install the latest Linux mainline kernel: that's where all issues get | |
| 774 | − fixed first, because it's the version line the kernel developers mainly | |
| 775 | − care about. Testing and reporting with the latest Linux stable kernel can | |
| 776 | − be an acceptable alternative in some situations, for example during the | |
| 777 | − merge window; but during that period you might want to suspend your efforts | |
| 778 | − till its end anyway.* | |
| 779 | − | |
| 780 | −Reporting an issue to the Linux kernel developers they fixed weeks or months | |
| 781 | −ago is annoying for them and wasting their and your time. That's why it's in | |
| 782 | −everybody's interest to check if the issue occurs with the latest codebase | |
| 783 | −before reporting it. | |
| 784 | − | |
| 785 | −In the scope of the Linux kernel the term 'latest' means: a kernel version | |
| 786 | −recently created from the main line of development, as this 'mainline' tree is | |
| 787 | −where developers first apply fixes; only after that are they are allowed to get | |
| 788 | −backported to older, still supported version lines called 'stable' and | |
| 789 | −'longterm' kernels. That's why you should check a recent mainline kernel, even | |
| 790 | −if you deal with an issue you only want to see fixed in an older version line. | |
| 791 | −Another reason: some fixes are only applied to mainline or recent version | |
| 792 | −lines, as it's too hard or risky to backport them to older versions. If that | |
| 793 | −the case, reporting the issue again is unlikely to change anything. | |
| 794 | − | |
| 795 | −Longterm kernels (sometimes called "LTS kernels") are therefore unsuitable for | |
| 796 | −testing; they simply are too distant from current development. Even the latest | |
| 797 | −Linux 'stable' kernel is a significant bit behind and thus better avoided. At | |
| 798 | −least most of the time, as sometimes a stable kernel can the best choice; but | |
| 799 | −in those situations you might want to wait a few days anyway: | |
| 800 | − | |
| 801 | −Choosing between mainline, stable and waiting | |
| 802 | −~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 803 | − | |
| 804 | −Head over to `kernel.org <https://kernel.org/>`_ to decide which version to | |
| 805 | −use. Ignore the big yellow button that says 'Latest release' and look a little | |
| 806 | −lower for a table. At its top you'll see a line starting with 'mainline', which | |
| 807 | −most of the time will point to a pre-release with a version number like | |
| 808 | −'5.8-rc2'. If that's the case, you'll want to use this mainline kernel for | |
| 809 | −testing. Do not let that 'rc' scare you, these 'development kernels' are pretty | |
| 810 | −reliable — and you made a backup, as you were instructed above, didn't you? | |
| 811 | − | |
| 812 | −In about two out of every nine to ten weeks, 'mainline' might point you to a | |
| 788 | + *Unless you are already running the latest 'mainline' Linux kernel, better | |
| 789 | + go and install it for the reporting process. Testing and reporting with | |
| 790 | + the latest 'stable' Linux can be an acceptable alternative in some | |
| 791 | + situations; during the merge window that actually might be even the best | |
| 792 | + approach, but in that development phase it can be an even better idea to | |
| 793 | + suspend your efforts for a few days anyway. Whatever version you choose, | |
| 794 | + ideally use a 'vanilla' built. Ignoring these advices will dramatically | |
| 795 | + increase the risk your report will be rejected or ignored.* | |
| 796 | + | |
| 797 | +As mentioned in the detailed explanation for the first step already: Like most | |
| 798 | +programmers, Linux kernel developers don't like to spend time dealing with | |
| 799 | +reports for issues that don't even happen with the current code. It's just a | |
| 800 | +waste everybody's time, especially yours. That's why it's in everybody's | |
| 801 | +interest that you confirm the issue still exists with the latest upstream code | |
| 802 | +before reporting it. You are free to ignore this advice, but as outlined | |
| 803 | +earlier: doing so dramatically increases the risk that your issue report might | |
| 804 | +get rejected or simply ignored. | |
| 805 | + | |
| 806 | +In the scope of the kernel "latest upstream" normally means: | |
| 807 | + | |
| 808 | + * Install a mainline kernel; the latest stable kernel can be an option, but | |
| 809 | + most of the time is better avoided. Longterm kernels (sometimes called 'LTS | |
| 810 | + kernels') are unsuitable at this point of the process. The next subsection | |
| 811 | + explains all of this in more detail. | |
| 812 | + | |
| 813 | + * The over next subsection describes way to obtain and install such a kernel. | |
| 814 | + It also outlines that using a pre-compiled kernel are fine, but better are | |
| 815 | + vanilla, which means: it was built using Linux sources taken straight `from | |
| 816 | + kernel.org <https://kernel.org/>`_ and not modified or enhanced in any way. | |
| 817 | + | |
| 818 | +Choosing the right version for testing | |
| 819 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 820 | + | |
| 821 | +Head over to `kernel.org <https://kernel.org/>`_ to find out which version you | |
| 822 | +want to use for testing. Ignore the big yellow button that says 'Latest release' | |
| 823 | +and look a little lower at the table. At its top you'll see a line starting with | |
| 824 | +mainline, which most of the time will point to a pre-release with a version | |
| 825 | +number like '5.8-rc2'. If that's the case, you'll want to use this mainline | |
| 826 | +kernel for testing, as that where all fixes have to be applied first. Do not let | |
| 827 | +that 'rc' scare you, these 'development kernels' are pretty reliable — and you | |
| 828 | +made a backup, as you were instructed above, didn't you? | |
| 829 | + | |
| 830 | +In about two out of every nine to ten weeks, mainline might point you to a | |
| 813 | 831 | proper release with a version number like '5.7'. If that happens, consider |
| 814 | 832 | suspending the reporting process until the first pre-release of the next |
| 815 | 833 | version (5.8-rc1) shows up on kernel.org. That's because the Linux development |
| @@ -830,45 +848,79 @@ case mainline for some reason does currently not work for you. An in general: · 14 unmodified lines | ||
| 830 | 848 | using it for reproducing the issue is also better than not reporting it issue |
| 831 | 849 | at all. |
| 832 | 850 | |
| 851 | +Better avoid using the latest stable kernel outside merge windows, as all fixes | |
| 852 | +must be applied to mainline first. That's why checking the latest mainline | |
| 853 | +kernel is so important: any issue you want to see fixed in older version lines | |
| 854 | +needs to be fixed in mainline first before it can get backported, which can | |
| 855 | +take a few days or weeks. Another reason: the fix you hope for might be too | |
| 856 | +hard or risky for backporting; reporting the issue again hence is unlikely to | |
| 857 | +change anything. | |
| 858 | + | |
| 859 | +These aspects are also why longterm kernels (sometimes called "LTS kernels") | |
| 860 | +are unsuitable for this part of the reporting process: they are to distant from | |
| 861 | +the current code. Hence go and test mainline first and follow the process | |
| 862 | +further: if the issue doesn't occur with mainline it will guide you how to get | |
| 863 | +it fixed in older version lines, if that's in the cards for the fix in question. | |
| 864 | + | |
| 833 | 865 | How to obtain a fresh Linux kernel |
| 834 | 866 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 835 | 867 | |
| 836 | −You can use pre-built or self-compiled kernel for testing; if you choose the | |
| 837 | −latter approach, you can either obtain the source code using git or download it | |
| 838 | −as tar archive. | |
| 839 | − | |
| 840 | −Using a pre-compiled kernel for testing is often the quickest, easiest, and | |
| 841 | −safest way – especially is you are unfamiliar with the Linux kernel. But it | |
| 842 | −needs to be a vanilla kernel, which can be hard to come buy. You are in luck if | |
| 843 | −you are using a popular Linux distribution: for quite a few of them you'll find | |
| 844 | −repositories on the net that contain packages with the latest mainline or | |
| 845 | −stable kernels in vanilla fashion. It's totally okay to use these, just make | |
| 846 | −sure from the repository's documentation they are really vanilla. And ensure | |
| 847 | −the packages contain the latest versions as offered on kernel.org; they are | |
| 848 | −likely unsuitable if the package is older than a week, as new mainline and | |
| 849 | −stable kernels typically get released at least once a week. And be aware that | |
| 850 | −you might need to get build your own kernel later anyway when it comes to | |
| 851 | −helping test fixes, as described later in this document. | |
| 852 | − | |
| 853 | −Developers and experienced Linux users familiar with git are often best served | |
| 854 | −by obtaining the latest Linux kernel sources straight from the `official | |
| 855 | −development repository on kernel.org | |
| 868 | +**Using a pre-compiled kernel**: This is often the quickest, easiest, and safest | |
| 869 | +way for testing — especially is you are unfamiliar with the Linux kernel. The | |
| 870 | +problem: most of those shipped by distributors or add-on repositories are build | |
| 871 | +from modified Linux sources. They are thus not vanilla and therefore often | |
| 872 | +unsuitable for testing and issue reporting: the changes might cause the issue | |
| 873 | +you face or influence it somehow. | |
| 874 | + | |
| 875 | +But you are in luck if you are using a popular Linux distribution: for quite a | |
| 876 | +few of them you'll find repositories on the net that contain packages with the | |
| 877 | +latest mainline or stable Linux built as vanilla kernel. It's totally okay to | |
| 878 | +use these, just make sure from the repository's description they are vanilla or | |
| 879 | +at least close to it. Additionally ensure the packages contain the latest | |
| 880 | +versions as offered on kernel.org. The packages are likely unsuitable if they | |
| 881 | +are older than a week, as new mainline and stable kernels typically get released | |
| 882 | +at least once a week. | |
| 883 | + | |
| 884 | +Please note that you might need to build your own kernel manually later: that's | |
| 885 | +sometimes needed for debugging or testing fixes, as described later in this | |
| 886 | +document. Also be aware that pre-compiled kernels might lack debug symbols that | |
| 887 | +are needed to decode messages the kernel prints when a panic, Oops, warning, or | |
| 888 | +BUG occurs; if you plan to decode those, you might be better off compiling a | |
| 889 | +kernel yourself (see the end of this subsection and the section titled 'Decode | |
| 890 | +failure messages' for details). | |
| 891 | + | |
| 892 | +**Using git**: Developers and experienced Linux users familiar with git are | |
| 893 | +often best served by obtaining the latest Linux kernel sources straight from the | |
| 894 | +`official development repository on kernel.org | |
| 856 | 895 | <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/>`_. |
| 857 | 896 | Those are likely a bit ahead of the latest mainline pre-release. Don't worry |
| 858 | 897 | about it: they are as reliable as a proper pre-release, unless the kernel's |
| 859 | 898 | development cycle is currently in the middle of a merge window. But even then |
| 860 | 899 | they are quite reliable. |
| 861 | 900 | |
| 862 | −People unfamiliar with git are often best served by downloading the sources as | |
| 863 | −tarball from `kernel.org <https://kernel.org/>`_. | |
| 901 | +**Conventional**: People unfamiliar with git are often best served by | |
| 902 | +downloading the sources as tarball from `kernel.org <https://kernel.org/>`_. | |
| 864 | 903 | |
| 865 | −How to actually build a kernel isnot described here, as many websites explain | |
| 904 | +How to actually build a kernel is not described here, as many websites explain | |
| 866 | 905 | the necessary steps already. If you are new to it, consider following one of |
| 867 | 906 | those how-to's that suggest to use ``make localmodconfig``, as that tries to |
| 868 | 907 | pick up the configuration of your current kernel and then tries to adjust it |
| 869 | 908 | somewhat for your system. That does not make the resulting kernel any better, |
| 870 | 909 | but quicker to compile. |
| 871 | 910 | |
| 911 | +Note: If you are dealing with a panic, Oops, warning, or BUG from the kernel, | |
| 912 | +please try to enable CONFIG_KALLSYMS when configuring your kernel. | |
| 913 | +Additionally, enable CONFIG_DEBUG_KERNEL and CONFIG_DEBUG_INFO, too; the | |
| 914 | +latter is the relevant one of those two, but can only be reached if you enable | |
| 915 | +the former. Be aware CONFIG_DEBUG_INFO increases the storage space required to | |
| 916 | +build a kernel by quite a bit. But that's worth it, as these options will allow | |
| 917 | +you later to pinpoint the exact line of code that triggers your issue. The | |
| 918 | +section 'Decode failure messages' below explains this in more detail. | |
| 919 | + | |
| 920 | +But keep in mind: Always keep a record of the issue encountered in case it is | |
| 921 | +hard to reproduce. Sending an undecoded report is better than not reporting | |
| 922 | +the issue at all. | |
| 923 | + | |
| 872 | 924 | |
| 873 | 925 | Check 'taint' flag |
| 874 | 926 | ------------------ |
| @@ -888,7 +940,7 @@ Reproduce issue with the fresh kernel · 13 unmodified lines | ||
| 888 | 940 | ------------------------------------- |
| 889 | 941 | |
| 890 | 942 | *Reproduce the issue with the kernel you just installed. If it doesn't show |
| 891 | − up there, head over to the instructions for issues only happening with | |
| 943 | + up there, scroll down to the instructions for issues only happening with | |
| 892 | 944 | stable and longterm kernels.* |
| 893 | 945 | |
| 894 | 946 | Check if the issue occurs with the fresh Linux kernel version you just |
| @@ -923,31 +975,55 @@ instead you can join. · 28 unmodified lines | ||
| 923 | 975 | Decode failure messages |
| 924 | 976 | ----------------------- |
| 925 | 977 | |
| 926 | −.. note:: | |
| 978 | + *If your failure involves a 'panic', 'Oops', 'warning', or 'BUG', consider | |
| 979 | + decoding the kernel log to find the line of code that triggered the error.* | |
| 927 | 980 | |
| 928 | − FIXME: The text in this section is a placeholder for now and quite similar to | |
| 929 | − the old text found in 'Documentation/admin-guide/reporting-bugs.rst' | |
| 930 | − currently. It and the document it references are known to be outdated and | |
| 931 | − thus need to be revisited. Thus consider this note a request for help: if you | |
| 932 | − are familiar with this topic, please write a few lines that would fit here. | |
| 933 | − Alternatively, simply outline the current situation roughly to the main | |
| 934 | − authors of this document (see intro), as they might be able to write | |
| 935 | − something then. | |
| 981 | +When the kernel detects an internal problem, it will log some information about | |
| 982 | +the executed code. This makes it possible to pinpoint the exact line in the | |
| 983 | +source code that triggered the issue and shows how it was called. But that only | |
| 984 | +works if you enabled CONFIG_DEBUG_INFO and CONFIG_KALLSYMS when configuring | |
| 985 | +your kernel. If you did so, consider to decode the information from the | |
| 986 | +kernel's log. That will make it a lot easier to understand what lead to the | |
| 987 | +'panic', 'Oops', 'warning', or 'BUG', which increases the chances that someone | |
| 988 | +can provide a fix. | |
| 936 | 989 | |
| 937 | − This section in the end should answer questions like "when is this actually | |
| 938 | − needed", "what .config options to ideally set earlier to make this step easy | |
| 939 | − or unnecessary?" (likely CONFIG_UNWINDER_ORC when it's available, otherwise | |
| 940 | − CONFIG_UNWINDER_FRAME_POINTER; but is there anything else needed?). | |
| 990 | +Decoding can be done with a script you find in the Linux source tree. If you | |
| 991 | +are running a kernel you compiled yourself earlier, call it like this:: | |
| 941 | 992 | |
| 942 | −.. | |
| 993 | + [user@something ~]$ sudo dmesg | ./linux-5.10.5/scripts/decode_stacktrace.sh ./linux-5.10.5/vmlinux | |
| 994 | + | |
| 995 | +If you are running a packaged vanilla kernel, you will likely have to install | |
| 996 | +the corresponding packages with debug symbols. Then call the script (which you | |
| 997 | +might need to get from the Linux sources if your distro does not package it) | |
| 998 | +like this:: | |
| 999 | + | |
| 1000 | + [user@something ~]$ sudo dmesg | ./linux-5.10.5/scripts/decode_stacktrace.sh \ | |
| 1001 | + /usr/lib/debug/lib/modules/5.10.10-4.1.x86_64/vmlinux /usr/src/kernels/5.10.10-4.1.x86_64/ | |
| 1002 | + | |
| 1003 | +The script will work on log lines like the following, which show the address of | |
| 1004 | +the code the kernel was executing when the error occurred:: | |
| 1005 | + | |
| 1006 | + [ 68.387301] RIP: 0010:test_module_init+0x5/0xffa [test_module] | |
| 1007 | + | |
| 1008 | +Once decoded, these lines will look like this:: | |
| 943 | 1009 | |
| 944 | − *If the failure includes a stack dump, like an Oops does, consider decoding | |
| 945 | − it to find the offending line of code.* | |
| 1010 | + [ 68.387301] RIP: 0010:test_module_init (/home/username/linux-5.10.5/test-module/test-module.c:16) test_module | |
| 946 | 1011 | |
| 947 | −When the kernel detects an error, it will print a stack dump that allows to | |
| 948 | −identify the exact line of code where the issue happens. But that information | |
| 949 | −sometimes needs to get decoded to be readable, which is explained in | |
| 950 | −admin-guide/bug-hunting.rst. | |
| 1012 | +In this case the executed code was built from the file | |
| 1013 | +'~/linux-5.10.5/test-module/test-module.c' and the error occurred by the | |
| 1014 | +instructions found in line '16'. | |
| 1015 | + | |
| 1016 | +The script will similarly decode the addresses mentioned in the section | |
| 1017 | +starting with 'Call trace', which show the path to the function where the | |
| 1018 | +problem occurred. Additionally, the script will show the assembler output for | |
| 1019 | +the code section the kernel was executing. | |
| 1020 | + | |
| 1021 | +Note, if you can't get this to work, simply skip this step and mention the | |
| 1022 | +reason for it in the report. If you're lucky, it might not be needed. And if it | |
| 1023 | +is, someone might help you to get things going. Also be aware this is just one | |
| 1024 | +of several ways to decode kernel stack traces. Sometimes different steps will | |
| 1025 | +be required to retrieve the relevant details. Don't worry about that, if that's | |
| 1026 | +needed in your case, developers will tell you what to do. | |
| 951 | 1027 | |
| 952 | 1028 | |
| 953 | 1029 | Special care for regressions |
| @@ -1000,8 +1076,7 @@ In the whole process keep in mind: an issue only qualifies as regression if the · 46 unmodified lines | ||
| 1000 | 1076 | older and the newer kernel got built with a similar configuration. The best way |
| 1001 | 1077 | to archive this: copy the configuration file (``.config``) from the old working |
| 1002 | 1078 | kernel freshly to each newer kernel version you try. Afterwards run ``make |
| 1003 | −oldnoconfig`` to adjust it for the needs of the new version without enabling | |
| 1004 | −any new feature, as those are allowed to cause regressions. | |
| 1079 | +olddefconfig`` to adjust it for the needs of the new version. | |
| 1005 | 1080 | |
| 1006 | 1081 | |
| 1007 | 1082 | Write and send the report |
| @@ -1166,17 +1241,27 @@ Special handling for high priority issues · 158 unmodified lines | ||
| 1166 | 1241 | |
| 1167 | 1242 | Reports for high priority issues need special handling. |
| 1168 | 1243 | |
| 1169 | −**Severe bugs**: make sure the subject or ticket title as well as the first | |
| 1244 | +**Severe issues**: make sure the subject or ticket title as well as the first | |
| 1170 | 1245 | paragraph makes the severeness obvious. |
| 1171 | 1246 | |
| 1172 | −**Regressions**: If the issue is a regression add [REGRESSION] to the mail's | |
| 1173 | −subject or the title in the bug-tracker. If you did not perform a bisection | |
| 1174 | −mention at least the latest mainline version you tested that worked fine (say | |
| 1175 | −5.7) and the oldest where the issue occurs (say 5.8). If you did a successful | |
| 1176 | −bisection mention the commit id and subject of the change that causes the | |
| 1177 | −regression. Also make sure to add the author of that change to your report; if | |
| 1178 | −you need to file your bug in a bug-tracker forward the report to him in a | |
| 1179 | −private mail and mention where your filed it. | |
| 1247 | +**Regressions**: make the report's subject start with '[REGRESSION]'. | |
| 1248 | + | |
| 1249 | +In case you performed a successful bisection, use the title of the change that | |
| 1250 | +introduced the regression as the second part of your subject. Make the report | |
| 1251 | +also mention the commit id of the culprit. In case of an unsuccessful bisection, | |
| 1252 | +make your report mention the latest tested version that's working fine (say 5.7) | |
| 1253 | +and the oldest where the issue occurs (say 5.8-rc1). | |
| 1254 | + | |
| 1255 | +When sending the report by mail, CC the Linux regressions mailing list | |
| 1256 | +(regressions@lists.linux.dev). In case the report needs to be filed to some web | |
| 1257 | +tracker, proceed to do so. Once filed, forward the report by mail to the | |
| 1258 | +regressions list; CC the maintainer and the mailing list for the subsystem in | |
| 1259 | +question. Make sure to inline the forwarded report, hence do not attach it. | |
| 1260 | +Also add a short note at the top where you mention the URL to the ticket. | |
| 1261 | + | |
| 1262 | +When mailing or forwarding the report, in case of a successful bisection add the | |
| 1263 | +author of the culprit to the recipients; also CC everyone in the signed-off-by | |
| 1264 | +chain, which you find at the end of its commit message. | |
| 1180 | 1265 | |
| 1181 | 1266 | **Security issues**: for these issues your will have to evaluate if a |
| 1182 | 1267 | short-term risk to other users would arise if details were publicly disclosed. |
| @@ -1255,7 +1340,7 @@ you never have heard of yet; or you might be asked to apply a patch to the · 72 unmodified lines | ||
| 1255 | 1340 | Linux kernel sources to test if it helps. In some cases it will be fine sending |
| 1256 | 1341 | a reply asking for instructions how to do that. But before going that route try |
| 1257 | 1342 | to find the answer own your own by searching the internet; alternatively |
| 1258 | −consider asking in other places for advice. For example ask a fried or post | |
| 1343 | +consider asking in other places for advice. For example ask a friend or post | |
| 1259 | 1344 | about it to a chatroom or forum you normally hang out. |
| 1260 | 1345 | |
| 1261 | 1346 | **Be patient**: If you are really lucky you might get a reply to your report |
| @@ -1390,32 +1475,11 @@ easier. And with a bit of luck there might be someone in the team that knows a · 128 unmodified lines | ||
| 1390 | 1475 | bit about programming and might be able to write a fix. |
| 1391 | 1476 | |
| 1392 | 1477 | |
| 1393 | −Details about reporting issues only occurring in older kernel version lines | |
| 1394 | −--------------------------------------------------------------------------- | |
| 1478 | +Reference for "Reporting regressions within a stable and longterm kernel line" | |
| 1479 | +------------------------------------------------------------------------------ | |
| 1395 | 1480 | |
| 1396 | −This subsection provides details for steps you need to take if you could not | |
| 1397 | −reproduce your issue with a mainline kernel, but want to see it fixed in older | |
| 1398 | −version lines (aka stable and longterm kernels). | |
| 1399 | − | |
| 1400 | −Some fixes are too complex | |
| 1401 | −~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 1402 | − | |
| 1403 | − *Prepare yourself for the possibility that going through the next few steps | |
| 1404 | − might not get the issue solved in older releases: the fix might be too big | |
| 1405 | − or risky to get backported there.* | |
| 1406 | − | |
| 1407 | −Even small and seemingly obvious code-changes sometimes introduce new and | |
| 1408 | −totally unexpected problems. The maintainers of the stable and longterm kernels | |
| 1409 | −are very aware of that and thus only apply changes to these kernels that are | |
| 1410 | −within rules outlined in 'Documentation/process/stable-kernel-rules.rst'. | |
| 1411 | − | |
| 1412 | −Complex or risky changes for example do not qualify and thus only get applied | |
| 1413 | −to mainline. Other fixes are easy to get backported to the newest stable and | |
| 1414 | −longterm kernels, but too risky to integrate into older ones. So be aware the | |
| 1415 | −fix you are hoping for might be one of those that won't be backported to the | |
| 1416 | −version line your care about. In that case you'll have no other choice then to | |
| 1417 | −live with the issue or switch to a newer Linux version, unless you want to | |
| 1418 | −patch the fix into your kernels yourself. | |
| 1481 | +This subsection provides details for the steps you need to perform if you face | |
| 1482 | +a regression within a stable and longterm kernel line. | |
| 1419 | 1483 | |
| 1420 | 1484 | Make sure the particular version line still gets support |
| 1421 | 1485 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| @@ -1431,7 +1495,7 @@ chosen and gets supported for at least two years (often six). That's why you · 9 unmodified lines | ||
| 1431 | 1495 | need to check if the kernel developers still support the version line you care |
| 1432 | 1496 | for. |
| 1433 | 1497 | |
| 1434 | −Note, if kernel.org lists two 'stable' version lines on the front page, you | |
| 1498 | +Note, if kernel.org lists two stable version lines on the front page, you | |
| 1435 | 1499 | should consider switching to the newer one and forget about the older one: |
| 1436 | 1500 | support for it is likely to be abandoned soon. Then it will get a "end-of-life" |
| 1437 | 1501 | (EOL) stamp. Version lines that reached that point still get mentioned on the |
| @@ -1454,12 +1518,108 @@ Reproduce issue with the newest release · 16 unmodified lines | ||
| 1454 | 1518 | |
| 1455 | 1519 | *Install the latest release from the particular version line as a vanilla |
| 1456 | 1520 | kernel. Ensure this kernel is not tainted and still shows the problem, as |
| 1457 | − the issue might have already been fixed there.* | |
| 1521 | + the issue might have already been fixed there. If you first noticed the | |
| 1522 | + problem with a vendor kernel, check a vanilla build of the last version | |
| 1523 | + known to work performs fine as well.* | |
| 1458 | 1524 | |
| 1459 | 1525 | Before investing any more time in this process you want to check if the issue |
| 1460 | 1526 | was already fixed in the latest release of version line you're interested in. |
| 1461 | 1527 | This kernel needs to be vanilla and shouldn't be tainted before the issue |
| 1462 | −happens, as detailed outlined already above in the process of testing mainline. | |
| 1528 | +happens, as detailed outlined already above in the section "Install a fresh | |
| 1529 | +kernel for testing". | |
| 1530 | + | |
| 1531 | +Did you first notice the regression with a vendor kernel? Then changes the | |
| 1532 | +vendor applied might be interfering. You need to rule that out by performing | |
| 1533 | +a recheck. Say something broke when you updated from 5.10.4-vendor.42 to | |
| 1534 | +5.10.5-vendor.43. Then after testing the latest 5.10 release as outlined in | |
| 1535 | +the previous paragraph check if a vanilla build of Linux 5.10.4 works fine as | |
| 1536 | +well. If things are broken there, the issue does not qualify as upstream | |
| 1537 | +regression and you need switch back to the main step-by-step guide to report | |
| 1538 | +the issue. | |
| 1539 | + | |
| 1540 | +Report the regression | |
| 1541 | +~~~~~~~~~~~~~~~~~~~~~ | |
| 1542 | + | |
| 1543 | + *Send a short problem report to the Linux stable mailing list | |
| 1544 | + (stable@vger.kernel.org) and CC the Linux regressions mailing list | |
| 1545 | + (regressions@lists.linux.dev); if you suspect the cause in a particular | |
| 1546 | + subsystem, CC its maintainer and its mailing list. Roughly describe the | |
| 1547 | + issue and ideally explain how to reproduce it. Mention the first version | |
| 1548 | + that shows the problem and the last version that's working fine. Then | |
| 1549 | + wait for further instructions.* | |
| 1550 | + | |
| 1551 | +When reporting a regression that happens within a stable or longterm kernel | |
| 1552 | +line (say when updating from 5.10.4 to 5.10.5) a brief report is enough for | |
| 1553 | +the start to get the issue reported quickly. Hence a rough description to the | |
| 1554 | +stable and regressions mailing list is all it takes; but in case you suspect | |
| 1555 | +the cause in a particular subsystem, CC its maintainers and its mailing list | |
| 1556 | +as well, because that will speed things up. | |
| 1557 | + | |
| 1558 | +And note, it helps developers a great deal if you can specify the exact version | |
| 1559 | +that introduced the problem. Hence if possible within a reasonable time frame, | |
| 1560 | +try to find that version using vanilla kernels. Lets assume something broke when | |
| 1561 | +your distributor released a update from Linux kernel 5.10.5 to 5.10.8. Then as | |
| 1562 | +instructed above go and check the latest kernel from that version line, say | |
| 1563 | +5.10.9. If it shows the problem, try a vanilla 5.10.5 to ensure that no patches | |
| 1564 | +the distributor applied interfere. If the issue doesn't manifest itself there, | |
| 1565 | +try 5.10.7 and then (depending on the outcome) 5.10.8 or 5.10.6 to find the | |
| 1566 | +first version where things broke. Mention it in the report and state that 5.10.9 | |
| 1567 | +is still broken. | |
| 1568 | + | |
| 1569 | +What the previous paragraph outlines is basically a rough manual 'bisection'. | |
| 1570 | +Once your report is out your might get asked to do a proper one, as it allows to | |
| 1571 | +pinpoint the exact change that causes the issue (which then can easily get | |
| 1572 | +reverted to fix the issue quickly). Hence consider to do a proper bisection | |
| 1573 | +right away if time permits. See the section 'Special care for regressions' and | |
| 1574 | +the document 'Documentation/admin-guide/bug-bisect.rst' for details how to | |
| 1575 | +perform one. In case of a successful bisection add the author of the culprit to | |
| 1576 | +the recipients; also CC everyone in the signed-off-by chain, which you find at | |
| 1577 | +the end of its commit message. | |
| 1578 | + | |
| 1579 | + | |
| 1580 | +Reference for "Reporting issues only occurring in older kernel version lines" | |
| 1581 | +----------------------------------------------------------------------------- | |
| 1582 | + | |
| 1583 | +This section provides details for the steps you need to take if you could not | |
| 1584 | +reproduce your issue with a mainline kernel, but want to see it fixed in older | |
| 1585 | +version lines (aka stable and longterm kernels). | |
| 1586 | + | |
| 1587 | +Some fixes are too complex | |
| 1588 | +~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 1589 | + | |
| 1590 | + *Prepare yourself for the possibility that going through the next few steps | |
| 1591 | + might not get the issue solved in older releases: the fix might be too big | |
| 1592 | + or risky to get backported there.* | |
| 1593 | + | |
| 1594 | +Even small and seemingly obvious code-changes sometimes introduce new and | |
| 1595 | +totally unexpected problems. The maintainers of the stable and longterm kernels | |
| 1596 | +are very aware of that and thus only apply changes to these kernels that are | |
| 1597 | +within rules outlined in 'Documentation/process/stable-kernel-rules.rst'. | |
| 1598 | + | |
| 1599 | +Complex or risky changes for example do not qualify and thus only get applied | |
| 1600 | +to mainline. Other fixes are easy to get backported to the newest stable and | |
| 1601 | +longterm kernels, but too risky to integrate into older ones. So be aware the | |
| 1602 | +fix you are hoping for might be one of those that won't be backported to the | |
| 1603 | +version line your care about. In that case you'll have no other choice then to | |
| 1604 | +live with the issue or switch to a newer Linux version, unless you want to | |
| 1605 | +patch the fix into your kernels yourself. | |
| 1606 | + | |
| 1607 | +Common preparations | |
| 1608 | +~~~~~~~~~~~~~~~~~~~ | |
| 1609 | + | |
| 1610 | + *Perform the first three steps in the section "Reporting issues only | |
| 1611 | + occurring in older kernel version lines" above.* | |
| 1612 | + | |
| 1613 | +You need to carry out a few steps already described in another section of this | |
| 1614 | +guide. Those steps will let you: | |
| 1615 | + | |
| 1616 | + * Check if the kernel developers still maintain the Linux kernel version line | |
| 1617 | + you care about. | |
| 1618 | + | |
| 1619 | + * Search the Linux stable mailing list for exiting reports. | |
| 1620 | + | |
| 1621 | + * Check with the latest release. | |
| 1622 | + | |
| 1463 | 1623 | |
| 1464 | 1624 | Check code history and search for existing discussions |
| 1465 | 1625 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| @@ -1513,41 +1673,6 @@ discussions abound it. · 47 unmodified lines | ||
| 1513 | 1673 | join the discussion: mention the version where you face the issue and that |
| 1514 | 1674 | you would like to see it fixed, if suitable. |
| 1515 | 1675 | |
| 1516 | −Check if it's a regression specific to stable or longterm kernels | |
| 1517 | −~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 1518 | − | |
| 1519 | − *Check if you're dealing with a regression that was never present in | |
| 1520 | − mainline by installing the first release of the version line you care | |
| 1521 | − about. If the issue doesn't show up with it, you basically need to report | |
| 1522 | − the issue with this version like you would report a problem with mainline | |
| 1523 | − (see above). This ideally includes a bisection followed by a search for | |
| 1524 | − existing reports on the net; with the help of the subject and the two | |
| 1525 | − relevant commit-ids. If that doesn't turn up anything, write the report; CC | |
| 1526 | − or forward the report to the stable maintainers, the stable mailing list, | |
| 1527 | − and those who authored the change. Include the shortened commit-id if you | |
| 1528 | − found the change that causes it.* | |
| 1529 | − | |
| 1530 | −Sometimes you won't find anything in the previous step: the issue you face | |
| 1531 | −might have never occurred in mainline, as it is caused by some change that is | |
| 1532 | −incomplete or not correctly applied. To check this, install the first release | |
| 1533 | −from version line you care about, e.g., if you care about 5.4.x, install 5.4. | |
| 1534 | − | |
| 1535 | −If the issue doesn't show itself there, it's a regression specific to the | |
| 1536 | −particular version line. In that case you need to report it like an issue | |
| 1537 | −happening in mainline, like the last few steps in the main section in the above | |
| 1538 | −outline. | |
| 1539 | − | |
| 1540 | −One of them suggests doing a bisection, which you are strongly advised to do in | |
| 1541 | −this case. After finding the culprit, search the net for existing reports | |
| 1542 | −again: not only search for the exact subject and the commit-id (proper and | |
| 1543 | −shortened to twelve characters) of the change, but also for the commit-id | |
| 1544 | −(proper and shortened) mentioned as 'Upstream commit' in the commit message. | |
| 1545 | − | |
| 1546 | −Write the report; just keep a few specialties in mind: CC or forward the report | |
| 1547 | −to the stable maintainers, the stable mailing list, which the :ref:`MAINTAINERS | |
| 1548 | −<maintainers>` file mentions in the section "STABLE BRANCH". If you performed a | |
| 1549 | −successful bisection, CC the author of the change and include its subject and | |
| 1550 | −the shortened commit-id. | |
| 1551 | 1676 | |
| 1552 | 1677 | Ask for advice |
| 1553 | 1678 | ~~~~~~~~~~~~~~ |
| @@ -1560,8 +1685,7 @@ Ask for advice · 6 unmodified lines | ||
| 1560 | 1685 | If the previous three steps didn't get you closer to a solution there is only |
| 1561 | 1686 | one option left: ask for advice. Do that in a mail you sent to the maintainers |
| 1562 | 1687 | for the subsystem where the issue seems to have its roots; CC the mailing list |
| 1563 | −for the subsystem as well as the stable mailing list the :ref:`MAINTAINERS | |
| 1564 | −<maintainers>` file mention in the section "STABLE BRANCH". | |
| 1688 | +for the subsystem as well as the stable mailing list (stable@vger.kernel.org). | |
| 1565 | 1689 | |
| 1566 | 1690 | |
| 1567 | 1691 | Why some issues won't get any reaction or remain unfixed after being reported |
| @@ -1629,3 +1753,13 @@ issues to the Linux kernel developers: the length and complexity of this · 61 unmodified lines | ||
| 1629 | 1753 | document and the implications between the lines illustrate that. But that's how |
| 1630 | 1754 | it is for now. The main author of this text hopes documenting the state of the |
| 1631 | 1755 | art will lay some groundwork to improve the situation over time. |
| 1756 | + | |
| 1757 | + | |
| 1758 | +.. | |
| 1759 | + This text is maintained by Thorsten Leemhuis <linux@leemhuis.info>. If you | |
| 1760 | + spot a typo or small mistake, feel free to let him know directly and he'll | |
| 1761 | + fix it. You are free to do the same in a mostly informal way if you want | |
| 1762 | + to contribute changes to the text, but for copyright reasons please CC | |
| 1763 | + linux-doc@vger.kernel.org and "sign-off" your contribution as | |
| 1764 | + Documentation/process/submitting-patches.rst outlines in the section "Sign | |
| 1765 | + your work - the Developer's Certificate of Origin". | |
| @@ -64,6 +64,7 @@ two flavors of JITs, the newer eBPF JIT currently supported on: · 63 unmodified lines | ||
| 64 | 64 | - arm64 |
| 65 | 65 | - arm32 |
| 66 | 66 | - ppc64 |
| 67 | + - ppc32 | |
| 67 | 68 | - sparc64 |
| 68 | 69 | - mips64 |
| 69 | 70 | - s390x |
| @@ -73,7 +74,6 @@ two flavors of JITs, the newer eBPF JIT currently supported on: · 3 unmodified lines | ||
| 73 | 74 | And the older cBPF JIT supported on the following archs: |
| 74 | 75 | |
| 75 | 76 | - mips |
| 76 | − - ppc | |
| 77 | 77 | - sparc |
| 78 | 78 | |
| 79 | 79 | eBPF JITs are a superset of cBPF JITs, meaning the kernel will |
| @@ -311,6 +311,17 @@ permit to distribute the load on several cpus. · 231 unmodified lines | ||
| 311 | 311 | If set to 1 (default), timestamps are sampled as soon as possible, before |
| 312 | 312 | queueing. |
| 313 | 313 | |
| 314 | +netdev_unregister_timeout_secs | |
| 315 | +------------------------------ | |
| 316 | + | |
| 317 | +Unregister network device timeout in seconds. | |
| 318 | +This option controls the timeout (in seconds) used to issue a warning while | |
| 319 | +waiting for a network device refcount to drop to 0 during device | |
| 320 | +unregistration. A lower value may be useful during bisection to detect | |
| 321 | +a leaked reference faster. A larger value may be useful to prevent false | |
| 322 | +warnings on slow/loaded systems. | |
| 323 | +Default value is 10, minimum 1, maximum 3600. | |
| 324 | + | |
| 314 | 325 | optmem_max |
| 315 | 326 | ---------- |
| 316 | 327 | |
| @@ -90,8 +90,8 @@ Command Function · 89 unmodified lines | ||
| 90 | 90 | ``b`` Will immediately reboot the system without syncing or unmounting |
| 91 | 91 | your disks. |
| 92 | 92 | |
| 93 | −``c`` Will perform a system crash by a NULL pointer dereference. | |
| 94 | − A crashdump will be taken if configured. | |
| 93 | +``c`` Will perform a system crash and a crashdump will be taken | |
| 94 | + if configured. | |
| 95 | 95 | |
| 96 | 96 | ``d`` Shows all locks that are held. |
| 97 | 97 | |
| @@ -522,7 +522,7 @@ and the short name of the data device. They all can be found in: · 521 unmodified lines | ||
| 522 | 522 | ================ =========== |
| 523 | 523 | xfs_iwalk-$pid Inode scans of the entire filesystem. Currently limited to |
| 524 | 524 | mount time quotacheck. |
| 525 | − xfs-blockgc Background garbage collection of disk space that have been | |
| 525 | + xfs-gc Background garbage collection of disk space that have been | |
| 526 | 526 | speculatively allocated beyond EOF or for staging copy on |
| 527 | 527 | write operations. |
| 528 | 528 | ================ =========== |
| @@ -0,0 +1,26 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +CPU Architectures | |
| 4 | +================= | |
| 5 | + | |
| 6 | +These books provide programming details about architecture-specific | |
| 7 | +implementation. | |
| 8 | + | |
| 9 | +.. toctree:: | |
| 10 | + :maxdepth: 2 | |
| 11 | + | |
| 12 | + arm/index | |
| 13 | + arm64/index | |
| 14 | + ia64/index | |
| 15 | + m68k/index | |
| 16 | + mips/index | |
| 17 | + nios2/index | |
| 18 | + openrisc/index | |
| 19 | + parisc/index | |
| 20 | + powerpc/index | |
| 21 | + riscv/index | |
| 22 | + s390/index | |
| 23 | + sh/index | |
| 24 | + sparc/index | |
| 25 | + x86/index | |
| 26 | + xtensa/index | |
| @@ -52,6 +52,7 @@ SoC-specific documents · 51 unmodified lines | ||
| 52 | 52 | stm32/stm32f746-overview |
| 53 | 53 | stm32/overview |
| 54 | 54 | stm32/stm32h743-overview |
| 55 | + stm32/stm32h750-overview | |
| 55 | 56 | stm32/stm32f769-overview |
| 56 | 57 | stm32/stm32f429-overview |
| 57 | 58 | stm32/stm32mp157-overview |
| @@ -18,12 +18,12 @@ Orion family · 17 unmodified lines | ||
| 18 | 18 | - 88F5181L |
| 19 | 19 | - 88F5182 |
| 20 | 20 | |
| 21 | − - Datasheet: http://www.embeddedarm.com/documentation/third-party/MV88F5182-datasheet.pdf | |
| 22 | − - Programmer's User Guide: http://www.embeddedarm.com/documentation/third-party/MV88F5182-opensource-manual.pdf | |
| 23 | − - User Manual: http://www.embeddedarm.com/documentation/third-party/MV88F5182-usermanual.pdf | |
| 21 | + - Datasheet: https://web.archive.org/web/20210124231420/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-datasheet.pdf | |
| 22 | + - Programmer's User Guide: https://web.archive.org/web/20210124231536/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-opensource-manual.pdf | |
| 23 | + - User Manual: https://web.archive.org/web/20210124231631/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-usermanual.pdf | |
| 24 | 24 | - 88F5281 |
| 25 | 25 | |
| 26 | − - Datasheet: http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sheet.pdf | |
| 26 | + - Datasheet: https://web.archive.org/web/20131028144728/http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sheet.pdf | |
| 27 | 27 | - 88F6183 |
| 28 | 28 | Core: |
| 29 | 29 | Feroceon 88fr331 (88f51xx) or 88fr531-vd (88f52xx) ARMv5 compatible |
| @@ -38,33 +38,33 @@ Kirkwood family · 8 unmodified lines | ||
| 38 | 38 | Flavors: |
| 39 | 39 | - 88F6282 a.k.a Armada 300 |
| 40 | 40 | |
| 41 | − - Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf | |
| 41 | + - Product Brief : https://web.archive.org/web/20111027032509/http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf | |
| 42 | 42 | - 88F6283 a.k.a Armada 310 |
| 43 | 43 | |
| 44 | − - Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf | |
| 44 | + - Product Brief : https://web.archive.org/web/20111027032509/http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf | |
| 45 | 45 | - 88F6190 |
| 46 | 46 | |
| 47 | − - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6190-003_WEB.pdf | |
| 48 | − - Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf | |
| 49 | − - Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 47 | + - Product Brief : https://web.archive.org/web/20130730072715/http://www.marvell.com/embedded-processors/kirkwood/assets/88F6190-003_WEB.pdf | |
| 48 | + - Hardware Spec : https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf | |
| 49 | + - Functional Spec: https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 50 | 50 | - 88F6192 |
| 51 | 51 | |
| 52 | − - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6192-003_ver1.pdf | |
| 53 | − - Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf | |
| 54 | − - Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 52 | + - Product Brief : https://web.archive.org/web/20131113121446/http://www.marvell.com/embedded-processors/kirkwood/assets/88F6192-003_ver1.pdf | |
| 53 | + - Hardware Spec : https://web.archive.org/web/20121021182835/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSource.pdf | |
| 54 | + - Functional Spec: https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 55 | 55 | - 88F6182 |
| 56 | 56 | - 88F6180 |
| 57 | 57 | |
| 58 | − - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6180-003_ver1.pdf | |
| 59 | − - Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf | |
| 60 | − - Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 58 | + - Product Brief : https://web.archive.org/web/20120616201621/http://www.marvell.com/embedded-processors/kirkwood/assets/88F6180-003_ver1.pdf | |
| 59 | + - Hardware Spec : https://web.archive.org/web/20130730091654/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSource.pdf | |
| 60 | + - Functional Spec: https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 61 | 61 | - 88F6281 |
| 62 | 62 | |
| 63 | − - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6281-004_ver1.pdf | |
| 64 | − - Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf | |
| 65 | − - Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 63 | + - Product Brief : https://web.archive.org/web/20120131133709/http://www.marvell.com/embedded-processors/kirkwood/assets/88F6281-004_ver1.pdf | |
| 64 | + - Hardware Spec : https://web.archive.org/web/20120620073511/http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6281_OpenSource.pdf | |
| 65 | + - Functional Spec: https://web.archive.org/web/20130730091033/http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf | |
| 66 | 66 | Homepage: |
| 67 | − http://www.marvell.com/embedded-processors/kirkwood/ | |
| 67 | + https://web.archive.org/web/20160513194943/http://www.marvell.com/embedded-processors/kirkwood/ | |
| 68 | 68 | Core: |
| 69 | 69 | Feroceon 88fr131 ARMv5 compatible |
| 70 | 70 | Linux kernel mach directory: |
| @@ -78,14 +78,15 @@ Discovery family · 7 unmodified lines | ||
| 78 | 78 | Flavors: |
| 79 | 79 | - MV78100 |
| 80 | 80 | |
| 81 | − - Product Brief : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78100-003_WEB.pdf | |
| 82 | − - Hardware Spec : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78100_OpenSource.pdf | |
| 83 | − - Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf | |
| 81 | + - Product Brief : https://web.archive.org/web/20120616194711/http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78100-003_WEB.pdf | |
| 82 | + - Hardware Spec : https://web.archive.org/web/20141005120451/http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78100_OpenSource.pdf | |
| 83 | + - Functional Spec: https://web.archive.org/web/20111110081125/http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf | |
| 84 | 84 | - MV78200 |
| 85 | 85 | |
| 86 | − - Product Brief : http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78200-002_WEB.pdf | |
| 87 | − - Hardware Spec : http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78200_OpenSource.pdf | |
| 88 | − - Functional Spec: http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf | |
| 86 | + - Product Brief : https://web.archive.org/web/20140801121623/http://www.marvell.com/embedded-processors/discovery-innovation/assets/MV78200-002_WEB.pdf | |
| 87 | + - Hardware Spec : https://web.archive.org/web/20141005120458/http://www.marvell.com/embedded-processors/discovery-innovation/assets/HW_MV78200_OpenSource.pdf | |
| 88 | + - Functional Spec: https://web.archive.org/web/20111110081125/http://www.marvell.com/embedded-processors/discovery-innovation/assets/FS_MV76100_78100_78200_OpenSource.pdf | |
| 89 | + | |
| 89 | 90 | - MV76100 |
| 90 | 91 | |
| 91 | 92 | Not supported by the Linux kernel. |
| @@ -106,9 +107,9 @@ EBU Armada family · 14 unmodified lines | ||
| 106 | 107 | - 88F6707 |
| 107 | 108 | - 88F6W11 |
| 108 | 109 | |
| 109 | − - Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf | |
| 110 | − - Hardware Spec: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-datasheet.pdf | |
| 111 | − - Functional Spec: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-FunctionalSpec-datasheet.pdf | |
| 110 | + - Product Brief: https://web.archive.org/web/20121115063038/http://www.marvell.com/embedded-processors/armada-300/assets/Marvell_ARMADA_370_SoC.pdf | |
| 111 | + - Hardware Spec: https://web.archive.org/web/20140617183747/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-datasheet.pdf | |
| 112 | + - Functional Spec: https://web.archive.org/web/20140617183701/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA370-FunctionalSpec-datasheet.pdf | |
| 112 | 113 | |
| 113 | 114 | Core: |
| 114 | 115 | Sheeva ARMv7 compatible PJ4B |
| @@ -116,7 +117,7 @@ EBU Armada family · 1 unmodified line | ||
| 116 | 117 | Armada 375 Flavors: |
| 117 | 118 | - 88F6720 |
| 118 | 119 | |
| 119 | − - Product Brief: http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA_375_SoC-01_product_brief.pdf | |
| 120 | + - Product Brief: https://web.archive.org/web/20131216023516/http://www.marvell.com/embedded-processors/armada-300/assets/ARMADA_375_SoC-01_product_brief.pdf | |
| 120 | 121 | |
| 121 | 122 | Core: |
| 122 | 123 | ARM Cortex-A9 |
| @@ -126,8 +127,8 @@ EBU Armada family · 3 unmodified lines | ||
| 126 | 127 | - 88F6820 Armada 385 |
| 127 | 128 | - 88F6828 Armada 388 |
| 128 | 129 | |
| 129 | − - Product infos: http://www.marvell.com/embedded-processors/armada-38x/ | |
| 130 | − - Functional Spec: http://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-38x-functional-specifications-2015-11.pdf | |
| 130 | + - Product infos: https://web.archive.org/web/20181006144616/http://www.marvell.com/embedded-processors/armada-38x/ | |
| 131 | + - Functional Spec: https://web.archive.org/web/20200420191927/https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-38x-functional-specifications-2015-11.pdf | |
| 131 | 132 | |
| 132 | 133 | Core: |
| 133 | 134 | ARM Cortex-A9 |
| @@ -136,7 +137,7 @@ EBU Armada family · 2 unmodified lines | ||
| 136 | 137 | - 88F6920 Armada 390 |
| 137 | 138 | - 88F6928 Armada 398 |
| 138 | 139 | |
| 139 | − - Product infos: http://www.marvell.com/embedded-processors/armada-39x/ | |
| 140 | + - Product infos: https://web.archive.org/web/20181020222559/http://www.marvell.com/embedded-processors/armada-39x/ | |
| 140 | 141 | |
| 141 | 142 | Core: |
| 142 | 143 | ARM Cortex-A9 |
| @@ -150,16 +151,16 @@ EBU Armada family · 7 unmodified lines | ||
| 150 | 151 | not to be confused with the non-SMP 78xx0 SoCs |
| 151 | 152 | |
| 152 | 153 | Product Brief: |
| 153 | − http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf | |
| 154 | + https://web.archive.org/web/20121021173528/http://www.marvell.com/embedded-processors/armada-xp/assets/Marvell-ArmadaXP-SoC-product%20brief.pdf | |
| 154 | 155 | |
| 155 | 156 | Functional Spec: |
| 156 | − http://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf | |
| 157 | + https://web.archive.org/web/20180829171131/http://www.marvell.com/embedded-processors/armada-xp/assets/ARMADA-XP-Functional-SpecDatasheet.pdf | |
| 157 | 158 | |
| 158 | 159 | - Hardware Specs: |
| 159 | 160 | |
| 160 | − - http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78230_OS.PDF | |
| 161 | − - http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78260_OS.PDF | |
| 162 | − - http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78460_OS.PDF | |
| 161 | + - https://web.archive.org/web/20141127013651/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78230_OS.PDF | |
| 162 | + - https://web.archive.org/web/20141222000224/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78260_OS.PDF | |
| 163 | + - https://web.archive.org/web/20141222000230/http://www.marvell.com/embedded-processors/armada-xp/assets/HW_MV78460_OS.PDF | |
| 163 | 164 | |
| 164 | 165 | Core: |
| 165 | 166 | Sheeva ARMv7 compatible Dual-core or Quad-core PJ4B-MP |
| @@ -180,13 +181,13 @@ EBU Armada family ARMv8 · 14 unmodified lines | ||
| 180 | 181 | ARM Cortex A53 (ARMv8) |
| 181 | 182 | |
| 182 | 183 | Homepage: |
| 183 | − http://www.marvell.com/embedded-processors/armada-3700/ | |
| 184 | + https://web.archive.org/web/20181103003602/http://www.marvell.com/embedded-processors/armada-3700/ | |
| 184 | 185 | |
| 185 | 186 | Product Brief: |
| 186 | − http://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-37xx-product-brief-2016-01.pdf | |
| 187 | + https://web.archive.org/web/20210121194810/https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-37xx-product-brief-2016-01.pdf | |
| 187 | 188 | |
| 188 | 189 | Hardware Spec: |
| 189 | − http://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-37xx-hardware-specifications-2019-09.pdf | |
| 190 | + https://web.archive.org/web/20210202162011/http://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-37xx-hardware-specifications-2019-09.pdf | |
| 190 | 191 | |
| 191 | 192 | Device tree files: |
| 192 | 193 | arch/arm64/boot/dts/marvell/armada-37* |
| @@ -198,11 +199,11 @@ EBU Armada family ARMv8 · 5 unmodified lines | ||
| 198 | 199 | Core: ARM Cortex A72 |
| 199 | 200 | |
| 200 | 201 | Homepage: |
| 201 | − http://www.marvell.com/embedded-processors/armada-70xx/ | |
| 202 | + https://web.archive.org/web/20181020222606/http://www.marvell.com/embedded-processors/armada-70xx/ | |
| 202 | 203 | |
| 203 | 204 | Product Brief: |
| 204 | − - http://www.marvell.com/embedded-processors/assets/Armada7020PB-Jan2016.pdf | |
| 205 | − - http://www.marvell.com/embedded-processors/assets/Armada7040PB-Jan2016.pdf | |
| 205 | + - https://web.archive.org/web/20161010105541/http://www.marvell.com/embedded-processors/assets/Armada7020PB-Jan2016.pdf | |
| 206 | + - https://web.archive.org/web/20160928154533/http://www.marvell.com/embedded-processors/assets/Armada7040PB-Jan2016.pdf | |
| 206 | 207 | |
| 207 | 208 | Device tree files: |
| 208 | 209 | arch/arm64/boot/dts/marvell/armada-70* |
| @@ -214,11 +215,11 @@ EBU Armada family ARMv8 · 5 unmodified lines | ||
| 214 | 215 | ARM Cortex A72 |
| 215 | 216 | |
| 216 | 217 | Homepage: |
| 217 | − http://www.marvell.com/embedded-processors/armada-80xx/ | |
| 218 | + https://web.archive.org/web/20181022004830/http://www.marvell.com/embedded-processors/armada-80xx/ | |
| 218 | 219 | |
| 219 | 220 | Product Brief: |
| 220 | − - http://www.marvell.com/embedded-processors/assets/Armada8020PB-Jan2016.pdf | |
| 221 | − - http://www.marvell.com/embedded-processors/assets/Armada8040PB-Jan2016.pdf | |
| 221 | + - https://web.archive.org/web/20210124233728/https://www.marvell.com/content/dam/marvell/en/public-collateral/embedded-processors/marvell-embedded-processors-armada-8020-product-brief-2017-12.pdf | |
| 222 | + - https://web.archive.org/web/20161010105532/http://www.marvell.com/embedded-processors/assets/Armada8040PB-Jan2016.pdf | |
| 222 | 223 | |
| 223 | 224 | Device tree files: |
| 224 | 225 | arch/arm64/boot/dts/marvell/armada-80* |
| @@ -233,10 +234,10 @@ Avanta family · 8 unmodified lines | ||
| 233 | 234 | - 88F6560 |
| 234 | 235 | |
| 235 | 236 | Homepage: |
| 236 | − http://www.marvell.com/broadband/ | |
| 237 | + https://web.archive.org/web/20181005145041/http://www.marvell.com/broadband/ | |
| 237 | 238 | |
| 238 | 239 | Product Brief: |
| 239 | − http://www.marvell.com/broadband/assets/Marvell_Avanta_88F6510_305_060-001_product_brief.pdf | |
| 240 | + https://web.archive.org/web/20180829171057/http://www.marvell.com/broadband/assets/Marvell_Avanta_88F6510_305_060-001_product_brief.pdf | |
| 240 | 241 | |
| 241 | 242 | No public datasheet available. |
| 242 | 243 | |
| @@ -255,7 +256,7 @@ Storage family · 12 unmodified lines | ||
| 255 | 256 | - 88RC1580 |
| 256 | 257 | |
| 257 | 258 | Product infos: |
| 258 | − http://www.marvell.com/storage/armada-sp/ | |
| 259 | + https://web.archive.org/web/20191129073953/http://www.marvell.com/storage/armada-sp/ | |
| 259 | 260 | |
| 260 | 261 | Core: |
| 261 | 262 | Sheeva ARMv7 comatible Quad-core PJ4C |
| @@ -269,16 +270,16 @@ Dove family (application processor) · 7 unmodified lines | ||
| 269 | 270 | - 88AP510 a.k.a Armada 510 |
| 270 | 271 | |
| 271 | 272 | Product Brief: |
| 272 | − http://www.marvell.com/application-processors/armada-500/assets/Marvell_Armada510_SoC.pdf | |
| 273 | + https://web.archive.org/web/20111102020643/http://www.marvell.com/application-processors/armada-500/assets/Marvell_Armada510_SoC.pdf | |
| 273 | 274 | |
| 274 | 275 | Hardware Spec: |
| 275 | − http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Hardware-Spec.pdf | |
| 276 | + https://web.archive.org/web/20160428160231/http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Hardware-Spec.pdf | |
| 276 | 277 | |
| 277 | 278 | Functional Spec: |
| 278 | − http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Functional-Spec.pdf | |
| 279 | + https://web.archive.org/web/20120130172443/http://www.marvell.com/application-processors/armada-500/assets/Armada-510-Functional-Spec.pdf | |
| 279 | 280 | |
| 280 | 281 | Homepage: |
| 281 | − http://www.marvell.com/application-processors/armada-500/ | |
| 282 | + https://web.archive.org/web/20160822232651/http://www.marvell.com/application-processors/armada-500/ | |
| 282 | 283 | |
| 283 | 284 | Core: |
| 284 | 285 | ARMv7 compatible |
| @@ -295,22 +296,22 @@ PXA 2xx/3xx/93x/95x family · 10 unmodified lines | ||
| 295 | 296 | - Application processor only |
| 296 | 297 | - Core: ARMv5 XScale1 core |
| 297 | 298 | - PXA270, PXA271, PXA272 |
| 298 | − - Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_pb.pdf | |
| 299 | − - Design guide : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_design_guide.pdf | |
| 300 | − - Developers manual : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_dev_man.pdf | |
| 301 | − - Specification : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_emts.pdf | |
| 302 | − - Specification update : http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_spec_update.pdf | |
| 299 | + - Product Brief : https://web.archive.org/web/20150927135510/http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_pb.pdf | |
| 300 | + - Design guide : https://web.archive.org/web/20120111181937/http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_design_guide.pdf | |
| 301 | + - Developers manual : https://web.archive.org/web/20150927164805/http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_dev_man.pdf | |
| 302 | + - Specification : https://web.archive.org/web/20140211221535/http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_emts.pdf | |
| 303 | + - Specification update : https://web.archive.org/web/20120111104906/http://www.marvell.com/application-processors/pxa-family/assets/pxa_27x_spec_update.pdf | |
| 303 | 304 | - Application processor only |
| 304 | 305 | - Core: ARMv5 XScale2 core |
| 305 | 306 | - PXA300, PXA310, PXA320 |
| 306 | − - PXA 300 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA300_PB_R4.pdf | |
| 307 | − - PXA 310 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA310_PB_R4.pdf | |
| 308 | − - PXA 320 Product Brief : http://www.marvell.com/application-processors/pxa-family/assets/PXA320_PB_R4.pdf | |
| 309 | − - Design guide : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Design_Guide.pdf | |
| 310 | − - Developers manual : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Developers_Manual.zip | |
| 311 | − - Specifications : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_EMTS.pdf | |
| 312 | − - Specification Update : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Spec_Update.zip | |
| 313 | − - Reference Manual : http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_TavorP_BootROM_Ref_Manual.pdf | |
| 307 | + - PXA 300 Product Brief : https://web.archive.org/web/20120111121203/http://www.marvell.com/application-processors/pxa-family/assets/PXA300_PB_R4.pdf | |
| 308 | + - PXA 310 Product Brief : https://web.archive.org/web/20120111104515/http://www.marvell.com/application-processors/pxa-family/assets/PXA310_PB_R4.pdf | |
| 309 | + - PXA 320 Product Brief : https://web.archive.org/web/20121021182826/http://www.marvell.com/application-processors/pxa-family/assets/PXA320_PB_R4.pdf | |
| 310 | + - Design guide : https://web.archive.org/web/20130727144625/http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Design_Guide.pdf | |
| 311 | + - Developers manual : https://web.archive.org/web/20130727144605/http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Developers_Manual.zip | |
| 312 | + - Specifications : https://web.archive.org/web/20130727144559/http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_EMTS.pdf | |
| 313 | + - Specification Update : https://web.archive.org/web/20150927183411/http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_Spec_Update.zip | |
| 314 | + - Reference Manual : https://web.archive.org/web/20120111103844/http://www.marvell.com/application-processors/pxa-family/assets/PXA3xx_TavorP_BootROM_Ref_Manual.pdf | |
| 314 | 315 | - Application processor only |
| 315 | 316 | - Core: ARMv5 XScale3 core |
| 316 | 317 | - PXA930, PXA935 |
| @@ -341,26 +342,26 @@ MMP/MMP2/MMP3 family (communication processor) · 24 unmodified lines | ||
| 341 | 342 | |
| 342 | 343 | Flavors: |
| 343 | 344 | - PXA168, a.k.a Armada 168 |
| 344 | − - Homepage : http://www.marvell.com/application-processors/armada-100/armada-168.jsp | |
| 345 | − - Product brief : http://www.marvell.com/application-processors/armada-100/assets/pxa_168_pb.pdf | |
| 346 | − - Hardware manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_datasheet.pdf | |
| 347 | − - Software manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_software_manual.pdf | |
| 348 | − - Specification update : http://www.marvell.com/application-processors/armada-100/assets/ARMADA16x_Spec_update.pdf | |
| 349 | − - Boot ROM manual : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_ref_manual.pdf | |
| 350 | − - App node package : http://www.marvell.com/application-processors/armada-100/assets/armada_16x_app_note_package.pdf | |
| 345 | + - Homepage : https://web.archive.org/web/20110926014256/http://www.marvell.com/application-processors/armada-100/armada-168.jsp | |
| 346 | + - Product brief : https://web.archive.org/web/20111102030100/http://www.marvell.com/application-processors/armada-100/assets/pxa_168_pb.pdf | |
| 347 | + - Hardware manual : https://web.archive.org/web/20160428165359/http://www.marvell.com/application-processors/armada-100/assets/armada_16x_datasheet.pdf | |
| 348 | + - Software manual : https://web.archive.org/web/20160428154454/http://www.marvell.com/application-processors/armada-100/assets/armada_16x_software_manual.pdf | |
| 349 | + - Specification update : https://web.archive.org/web/20150927160338/http://www.marvell.com/application-processors/armada-100/assets/ARMADA16x_Spec_update.pdf | |
| 350 | + - Boot ROM manual : https://web.archive.org/web/20130727205559/http://www.marvell.com/application-processors/armada-100/assets/armada_16x_ref_manual.pdf | |
| 351 | + - App node package : https://web.archive.org/web/20141005090706/http://www.marvell.com/application-processors/armada-100/assets/armada_16x_app_note_package.pdf | |
| 351 | 352 | - Application processor only |
| 352 | 353 | - Core: ARMv5 compatible Marvell PJ1 88sv331 (Mohawk) |
| 353 | 354 | - PXA910/PXA920 |
| 354 | − - Homepage : http://www.marvell.com/communication-processors/pxa910/ | |
| 355 | − - Product Brief : http://www.marvell.com/communication-processors/pxa910/assets/Marvell_PXA910_Platform-001_PB_final.pdf | |
| 355 | + - Homepage : https://web.archive.org/web/20150928121236/http://www.marvell.com/communication-processors/pxa910/ | |
| 356 | + - Product Brief : https://archive.org/download/marvell-pxa910-pb/Marvell_PXA910_Platform-001_PB.pdf | |
| 356 | 357 | - Application processor with Communication processor |
| 357 | 358 | - Core: ARMv5 compatible Marvell PJ1 88sv331 (Mohawk) |
| 358 | − - PXA688, a.k.a. MMP2, a.k.a Armada 610 | |
| 359 | − - Product Brief : http://www.marvell.com/application-processors/armada-600/assets/armada610_pb.pdf | |
| 359 | + - PXA688, a.k.a. MMP2, a.k.a Armada 610 (OLPC XO-1.75) | |
| 360 | + - Product Brief : https://web.archive.org/web/20111102023255/http://www.marvell.com/application-processors/armada-600/assets/armada610_pb.pdf | |
| 360 | 361 | - Application processor only |
| 361 | 362 | - Core: ARMv7 compatible Sheeva PJ4 88sv581x core |
| 362 | − - PXA2128, a.k.a. MMP3 (OLPC XO4, Linux support not upstream) | |
| 363 | − - Product Brief : http://www.marvell.com/application-processors/armada/pxa2128/assets/Marvell-ARMADA-PXA2128-SoC-PB.pdf | |
| 363 | + - PXA2128, a.k.a. MMP3, a.k.a Armada 620 (OLPC XO-4) | |
| 364 | + - Product Brief : https://web.archive.org/web/20120824055155/http://www.marvell.com/application-processors/armada/pxa2128/assets/Marvell-ARMADA-PXA2128-SoC-PB.pdf | |
| 364 | 365 | - Application processor only |
| 365 | 366 | - Core: Dual-core ARMv7 compatible Sheeva PJ4C core |
| 366 | 367 | - PXA960/PXA968/PXA978 (Linux support not upstream) |
| @@ -0,0 +1,34 @@ | ||
| 1 | +================== | |
| 2 | +STM32H750 Overview | |
| 3 | +================== | |
| 4 | + | |
| 5 | +Introduction | |
| 6 | +------------ | |
| 7 | + | |
| 8 | +The STM32H750 is a Cortex-M7 MCU aimed at various applications. | |
| 9 | +It features: | |
| 10 | + | |
| 11 | +- Cortex-M7 core running up to @480MHz | |
| 12 | +- 128K internal flash, 1MBytes internal RAM | |
| 13 | +- FMC controller to connect SDRAM, NOR and NAND memories | |
| 14 | +- Dual mode QSPI | |
| 15 | +- SD/MMC/SDIO support | |
| 16 | +- Ethernet controller | |
| 17 | +- USB OTFG FS & HS controllers | |
| 18 | +- I2C, SPI, CAN busses support | |
| 19 | +- Several 16 & 32 bits general purpose timers | |
| 20 | +- Serial Audio interface | |
| 21 | +- LCD controller | |
| 22 | +- HDMI-CEC | |
| 23 | +- SPDIFRX | |
| 24 | +- DFSDM | |
| 25 | + | |
| 26 | +Resources | |
| 27 | +--------- | |
| 28 | + | |
| 29 | +Datasheet and reference manual are publicly available on ST website (STM32H750_). | |
| 30 | + | |
| 31 | +.. _STM32H750: https://www.st.com/en/microcontrollers-microprocessors/stm32h750-value-line.html | |
| 32 | + | |
| 33 | +:Authors: Dillon Min <dillon.minfei@gmail.com> | |
| 34 | + | |
| @@ -64,4 +64,11 @@ linux,uefi-mmap-desc-size 32-bit Size in bytes of each entry in the UEFI · 63 unmodified lines | ||
| 64 | 64 | memory map. |
| 65 | 65 | |
| 66 | 66 | linux,uefi-mmap-desc-ver 32-bit Version of the mmap descriptor format. |
| 67 | + | |
| 68 | +linux,initrd-start 64-bit Physical start address of an initrd | |
| 69 | + | |
| 70 | +linux,initrd-end 64-bit Physical end address of an initrd | |
| 71 | + | |
| 72 | +kaslr-seed 64-bit Entropy used to randomize the kernel image | |
| 73 | + base address location. | |
| 67 | 74 | ========================== ====== =========================================== |
| @@ -202,9 +202,10 @@ Before jumping into the kernel, the following conditions must be met: · 201 unmodified lines | ||
| 202 | 202 | |
| 203 | 203 | - System registers |
| 204 | 204 | |
| 205 | − All writable architected system registers at the exception level where | |
| 206 | − the kernel image will be entered must be initialised by software at a | |
| 207 | − higher exception level to prevent execution in an UNKNOWN state. | |
| 205 | + All writable architected system registers at or below the exception | |
| 206 | + level where the kernel image will be entered must be initialised by | |
| 207 | + software at a higher exception level to prevent execution in an UNKNOWN | |
| 208 | + state. | |
| 208 | 209 | |
| 209 | 210 | - SCR_EL3.FIQ must have the same value across all CPUs the kernel is |
| 210 | 211 | executing on. |
| @@ -270,9 +271,46 @@ Before jumping into the kernel, the following conditions must be met: · 59 unmodified lines | ||
| 270 | 271 | having 0b1 set for the corresponding bit for each of the auxiliary |
| 271 | 272 | counters present. |
| 272 | 273 | |
| 274 | + For CPUs with the Fine Grained Traps (FEAT_FGT) extension present: | |
| 275 | + | |
| 276 | + - If EL3 is present and the kernel is entered at EL2: | |
| 277 | + | |
| 278 | + - SCR_EL3.FGTEn (bit 27) must be initialised to 0b1. | |
| 279 | + | |
| 280 | + For CPUs with Advanced SIMD and floating point support: | |
| 281 | + | |
| 282 | + - If EL3 is present: | |
| 283 | + | |
| 284 | + - CPTR_EL3.TFP (bit 10) must be initialised to 0b0. | |
| 285 | + | |
| 286 | + - If EL2 is present and the kernel is entered at EL1: | |
| 287 | + | |
| 288 | + - CPTR_EL2.TFP (bit 10) must be initialised to 0b0. | |
| 289 | + | |
| 290 | + For CPUs with the Scalable Vector Extension (FEAT_SVE) present: | |
| 291 | + | |
| 292 | + - if EL3 is present: | |
| 293 | + | |
| 294 | + - CPTR_EL3.EZ (bit 8) must be initialised to 0b1. | |
| 295 | + | |
| 296 | + - ZCR_EL3.LEN must be initialised to the same value for all CPUs the | |
| 297 | + kernel is executed on. | |
| 298 | + | |
| 299 | + - If the kernel is entered at EL1 and EL2 is present: | |
| 300 | + | |
| 301 | + - CPTR_EL2.TZ (bit 8) must be initialised to 0b0. | |
| 302 | + | |
| 303 | + - CPTR_EL2.ZEN (bits 17:16) must be initialised to 0b11. | |
| 304 | + | |
| 305 | + - ZCR_EL2.LEN must be initialised to the same value for all CPUs the | |
| 306 | + kernel will execute on. | |
| 307 | + | |
| 273 | 308 | The requirements described above for CPU mode, caches, MMUs, architected |
| 274 | 309 | timers, coherency and system registers apply to all CPUs. All CPUs must |
| 275 | −enter the kernel in the same exception level. | |
| 310 | +enter the kernel in the same exception level. Where the values documented | |
| 311 | +disable traps it is permissible for these traps to be enabled so long as | |
| 312 | +those traps are handled transparently by higher exception levels as though | |
| 313 | +the values documented were set. | |
| 276 | 314 | |
| 277 | 315 | The boot loader is expected to enter the kernel on each CPU in the |
| 278 | 316 | following manner: |
| @@ -74,7 +74,7 @@ HWCAP_ASIMD · 73 unmodified lines | ||
| 74 | 74 | |
| 75 | 75 | HWCAP_EVTSTRM |
| 76 | 76 | The generic timer is configured to generate events at a frequency of |
| 77 | − approximately 100KHz. | |
| 77 | + approximately 10KHz. | |
| 78 | 78 | |
| 79 | 79 | HWCAP_AES |
| 80 | 80 | Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001. |
| @@ -107,3 +107,37 @@ filter out the Pointer Authentication system key registers from · 106 unmodified lines | ||
| 107 | 107 | KVM_GET/SET_REG_* ioctls and mask those features from cpufeature ID |
| 108 | 108 | register. Any attempt to use the Pointer Authentication instructions will |
| 109 | 109 | result in an UNDEFINED exception being injected into the guest. |
| 110 | + | |
| 111 | + | |
| 112 | +Enabling and disabling keys | |
| 113 | +--------------------------- | |
| 114 | + | |
| 115 | +The prctl PR_PAC_SET_ENABLED_KEYS allows the user program to control which | |
| 116 | +PAC keys are enabled in a particular task. It takes two arguments, the | |
| 117 | +first being a bitmask of PR_PAC_APIAKEY, PR_PAC_APIBKEY, PR_PAC_APDAKEY | |
| 118 | +and PR_PAC_APDBKEY specifying which keys shall be affected by this prctl, | |
| 119 | +and the second being a bitmask of the same bits specifying whether the key | |
| 120 | +should be enabled or disabled. For example:: | |
| 121 | + | |
| 122 | + prctl(PR_PAC_SET_ENABLED_KEYS, | |
| 123 | + PR_PAC_APIAKEY | PR_PAC_APIBKEY | PR_PAC_APDAKEY | PR_PAC_APDBKEY, | |
| 124 | + PR_PAC_APIBKEY, 0, 0); | |
| 125 | + | |
| 126 | +disables all keys except the IB key. | |
| 127 | + | |
| 128 | +The main reason why this is useful is to enable a userspace ABI that uses PAC | |
| 129 | +instructions to sign and authenticate function pointers and other pointers | |
| 130 | +exposed outside of the function, while still allowing binaries conforming to | |
| 131 | +the ABI to interoperate with legacy binaries that do not sign or authenticate | |
| 132 | +pointers. | |
| 133 | + | |
| 134 | +The idea is that a dynamic loader or early startup code would issue this | |
| 135 | +prctl very early after establishing that a process may load legacy binaries, | |
| 136 | +but before executing any PAC instructions. | |
| 137 | + | |
| 138 | +For compatibility with previous kernel versions, processes start up with IA, | |
| 139 | +IB, DA and DB enabled, and are reset to this state on exec(). Processes created | |
| 140 | +via fork() and clone() inherit the key enabled state from the calling process. | |
| 141 | + | |
| 142 | +It is recommended to avoid disabling the IA key, as this has higher performance | |
| 143 | +overhead than disabling any of the other keys. | |
| @@ -40,7 +40,7 @@ space obtained in one of the following ways: · 39 unmodified lines | ||
| 40 | 40 | during creation and with the same restrictions as for ``mmap()`` above |
| 41 | 41 | (e.g. data, bss, stack). |
| 42 | 42 | |
| 43 | −The AArch64 Tagged Address ABI has two stages of relaxation depending | |
| 43 | +The AArch64 Tagged Address ABI has two stages of relaxation depending on | |
| 44 | 44 | how the user addresses are used by the kernel: |
| 45 | 45 | |
| 46 | 46 | 1. User addresses not accessed by the kernel but used for address space |
| @@ -113,6 +113,12 @@ ABI relaxation: · 66 unmodified lines | ||
| 113 | 113 | |
| 114 | 114 | - ``shmat()`` and ``shmdt()``. |
| 115 | 115 | |
| 116 | +- ``brk()`` (since kernel v5.6). | |
| 117 | + | |
| 118 | +- ``mmap()`` (since kernel v5.6). | |
| 119 | + | |
| 120 | +- ``mremap()``, the ``new_address`` argument (since kernel v5.6). | |
| 121 | + | |
| 116 | 122 | Any attempt to use non-zero tagged pointers may result in an error code |
| 117 | 123 | being returned, a (fatal) signal being raised, or other modes of |
| 118 | 124 | failure. |
| @@ -258,3 +258,18 @@ Q: Can BPF functionality such as new program or map types, new · 257 unmodified lines | ||
| 258 | 258 | helpers, etc be added out of kernel module code? |
| 259 | 259 | |
| 260 | 260 | A: NO. |
| 261 | + | |
| 262 | +Q: Directly calling kernel function is an ABI? | |
| 263 | +---------------------------------------------- | |
| 264 | +Q: Some kernel functions (e.g. tcp_slow_start) can be called | |
| 265 | +by BPF programs. Do these kernel functions become an ABI? | |
| 266 | + | |
| 267 | +A: NO. | |
| 268 | + | |
| 269 | +The kernel function protos will change and the bpf programs will be | |
| 270 | +rejected by the verifier. Also, for example, some of the bpf-callable | |
| 271 | +kernel functions have already been used by other kernel tcp | |
| 272 | +cc (congestion-control) implementations. If any of these kernel | |
| 273 | +functions has changed, both the in-tree and out-of-tree kernel tcp cc | |
| 274 | +implementations have to be changed. The same goes for the bpf | |
| 275 | +programs and they have to be adjusted accordingly. | |
| @@ -29,7 +29,7 @@ list: · 28 unmodified lines | ||
| 29 | 29 | This may also include issues related to XDP, BPF tracing, etc. |
| 30 | 30 | |
| 31 | 31 | Given netdev has a high volume of traffic, please also add the BPF |
| 32 | −maintainers to Cc (from kernel MAINTAINERS_ file): | |
| 32 | +maintainers to Cc (from kernel ``MAINTAINERS`` file): | |
| 33 | 33 | |
| 34 | 34 | * Alexei Starovoitov <ast@kernel.org> |
| 35 | 35 | * Daniel Borkmann <daniel@iogearbox.net> |
| @@ -234,11 +234,11 @@ be subject to change. · 198 unmodified lines | ||
| 234 | 234 | |
| 235 | 235 | Q: samples/bpf preference vs selftests? |
| 236 | 236 | --------------------------------------- |
| 237 | −Q: When should I add code to `samples/bpf/`_ and when to BPF kernel | |
| 238 | −selftests_ ? | |
| 237 | +Q: When should I add code to ``samples/bpf/`` and when to BPF kernel | |
| 238 | +selftests_? | |
| 239 | 239 | |
| 240 | 240 | A: In general, we prefer additions to BPF kernel selftests_ rather than |
| 241 | −`samples/bpf/`_. The rationale is very simple: kernel selftests are | |
| 241 | +``samples/bpf/``. The rationale is very simple: kernel selftests are | |
| 242 | 242 | regularly run by various bots to test for kernel regressions. |
| 243 | 243 | |
| 244 | 244 | The more test cases we add to BPF selftests, the better the coverage |
| @@ -246,9 +246,9 @@ and the less likely it is that those could accidentally break. It is · 1 unmodified line | ||
| 246 | 246 | not that BPF kernel selftests cannot demo how a specific feature can |
| 247 | 247 | be used. |
| 248 | 248 | |
| 249 | −That said, `samples/bpf/`_ may be a good place for people to get started, | |
| 249 | +That said, ``samples/bpf/`` may be a good place for people to get started, | |
| 250 | 250 | so it might be advisable that simple demos of features could go into |
| 251 | −`samples/bpf/`_, but advanced functional and corner-case testing rather | |
| 251 | +``samples/bpf/``, but advanced functional and corner-case testing rather | |
| 252 | 252 | into kernel selftests. |
| 253 | 253 | |
| 254 | 254 | If your sample looks like a test case, then go for BPF kernel selftests |
| @@ -449,6 +449,19 @@ from source at · 194 unmodified lines | ||
| 449 | 449 | |
| 450 | 450 | https://github.com/acmel/dwarves |
| 451 | 451 | |
| 452 | +pahole starts to use libbpf definitions and APIs since v1.13 after the | |
| 453 | +commit 21507cd3e97b ("pahole: add libbpf as submodule under lib/bpf"). | |
| 454 | +It works well with the git repository because the libbpf submodule will | |
| 455 | +use "git submodule update --init --recursive" to update. | |
| 456 | + | |
| 457 | +Unfortunately, the default github release source code does not contain | |
| 458 | +libbpf submodule source code and this will cause build issues, the tarball | |
| 459 | +from https://git.kernel.org/pub/scm/devel/pahole/pahole.git/ is same with | |
| 460 | +github, you can get the source tarball with corresponding libbpf submodule | |
| 461 | +codes from | |
| 462 | + | |
| 463 | +https://fedorapeople.org/~acme/dwarves | |
| 464 | + | |
| 452 | 465 | Some distros have pahole version 1.16 packaged already, e.g. |
| 453 | 466 | Fedora, Gentoo. |
| 454 | 467 | |
| @@ -645,10 +658,9 @@ when: · 190 unmodified lines | ||
| 645 | 658 | |
| 646 | 659 | .. Links |
| 647 | 660 | .. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/ |
| 648 | −.. _MAINTAINERS: ../../MAINTAINERS | |
| 649 | 661 | .. _netdev-FAQ: ../networking/netdev-FAQ.rst |
| 650 | −.. _samples/bpf/: ../../samples/bpf/ | |
| 651 | −.. _selftests: ../../tools/testing/selftests/bpf/ | |
| 662 | +.. _selftests: | |
| 663 | + https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/ | |
| 652 | 664 | .. _Documentation/dev-tools/kselftest.rst: |
| 653 | 665 | https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html |
| 654 | 666 | .. _Documentation/bpf/btf.rst: btf.rst |
| @@ -84,6 +84,7 @@ sequentially and type id is assigned to each recognized type starting from id · 83 unmodified lines | ||
| 84 | 84 | #define BTF_KIND_FUNC_PROTO 13 /* Function Proto */ |
| 85 | 85 | #define BTF_KIND_VAR 14 /* Variable */ |
| 86 | 86 | #define BTF_KIND_DATASEC 15 /* Section */ |
| 87 | + #define BTF_KIND_FLOAT 16 /* Floating point */ | |
| 87 | 88 | |
| 88 | 89 | Note that the type section encodes debug info, not just pure types. |
| 89 | 90 | ``BTF_KIND_FUNC`` is not a type, and it represents a defined subprogram. |
| @@ -95,8 +96,8 @@ Each type contains the following common data:: · 5 unmodified lines | ||
| 95 | 96 | /* "info" bits arrangement |
| 96 | 97 | * bits 0-15: vlen (e.g. # of struct's members) |
| 97 | 98 | * bits 16-23: unused |
| 98 | − * bits 24-27: kind (e.g. int, ptr, array...etc) | |
| 99 | − * bits 28-30: unused | |
| 99 | + * bits 24-28: kind (e.g. int, ptr, array...etc) | |
| 100 | + * bits 29-30: unused | |
| 100 | 101 | * bit 31: kind_flag, currently used by |
| 101 | 102 | * struct, union and fwd |
| 102 | 103 | */ |
| @@ -452,6 +453,18 @@ map definition. · 349 unmodified lines | ||
| 452 | 453 | * ``offset``: the in-section offset of the variable |
| 453 | 454 | * ``size``: the size of the variable in bytes |
| 454 | 455 | |
| 456 | +2.2.16 BTF_KIND_FLOAT | |
| 457 | +~~~~~~~~~~~~~~~~~~~~~ | |
| 458 | + | |
| 459 | +``struct btf_type`` encoding requirement: | |
| 460 | + * ``name_off``: any valid offset | |
| 461 | + * ``info.kind_flag``: 0 | |
| 462 | + * ``info.kind``: BTF_KIND_FLOAT | |
| 463 | + * ``info.vlen``: 0 | |
| 464 | + * ``size``: the size of the float type in bytes: 2, 4, 8, 12 or 16. | |
| 465 | + | |
| 466 | +No additional type data follow ``btf_type``. | |
| 467 | + | |
| 455 | 468 | 3. BTF Kernel API |
| 456 | 469 | ***************** |
| 457 | 470 | |
| @@ -12,9 +12,6 @@ BPF instruction-set. · 11 unmodified lines | ||
| 12 | 12 | The Cilium project also maintains a `BPF and XDP Reference Guide`_ |
| 13 | 13 | that goes into great technical depth about the BPF Architecture. |
| 14 | 14 | |
| 15 | −The primary info for the bpf syscall is available in the `man-pages`_ | |
| 16 | −for `bpf(2)`_. | |
| 17 | − | |
| 18 | 15 | BPF Type Format (BTF) |
| 19 | 16 | ===================== |
| 20 | 17 | |
| @@ -35,6 +32,12 @@ Two sets of Questions and Answers (Q&A) are maintained. · 14 unmodified lines | ||
| 35 | 32 | bpf_design_QA |
| 36 | 33 | bpf_devel_QA |
| 37 | 34 | |
| 35 | +Syscall API | |
| 36 | +=========== | |
| 37 | + | |
| 38 | +The primary info for the bpf syscall is available in the `man-pages`_ | |
| 39 | +for `bpf(2)`_. For more information about the userspace API, see | |
| 40 | +Documentation/userspace-api/ebpf/index.rst. | |
| 38 | 41 | |
| 39 | 42 | Helper functions |
| 40 | 43 | ================ |
| @@ -331,27 +331,34 @@ htmlhelp_basename = 'TheLinuxKerneldoc' · 330 unmodified lines | ||
| 331 | 331 | # -- Options for LaTeX output --------------------------------------------- |
| 332 | 332 | |
| 333 | 333 | latex_elements = { |
| 334 | −# The paper size ('letterpaper' or 'a4paper'). | |
| 335 | −'papersize': 'a4paper', | |
| 334 | + # The paper size ('letterpaper' or 'a4paper'). | |
| 335 | + 'papersize': 'a4paper', | |
| 336 | 336 | |
| 337 | −# The font size ('10pt', '11pt' or '12pt'). | |
| 338 | −'pointsize': '11pt', | |
| 337 | + # The font size ('10pt', '11pt' or '12pt'). | |
| 338 | + 'pointsize': '11pt', | |
| 339 | 339 | |
| 340 | −# Latex figure (float) alignment | |
| 341 | −#'figure_align': 'htbp', | |
| 340 | + # Latex figure (float) alignment | |
| 341 | + #'figure_align': 'htbp', | |
| 342 | 342 | |
| 343 | −# Don't mangle with UTF-8 chars | |
| 344 | −'inputenc': '', | |
| 345 | −'utf8extra': '', | |
| 343 | + # Don't mangle with UTF-8 chars | |
| 344 | + 'inputenc': '', | |
| 345 | + 'utf8extra': '', | |
| 346 | 346 | |
| 347 | −# Additional stuff for the LaTeX preamble. | |
| 347 | + # Set document margins | |
| 348 | + 'sphinxsetup': ''' | |
| 349 | + hmargin=0.5in, vmargin=1in, | |
| 350 | + parsedliteralwraps=true, | |
| 351 | + verbatimhintsturnover=false, | |
| 352 | + ''', | |
| 353 | + | |
| 354 | + # Additional stuff for the LaTeX preamble. | |
| 348 | 355 | 'preamble': ''' |
| 349 | − % Use some font with UTF-8 support with XeLaTeX | |
| 356 | + % Use some font with UTF-8 support with XeLaTeX | |
| 350 | 357 | \\usepackage{fontspec} |
| 351 | 358 | \\setsansfont{DejaVu Sans} |
| 352 | 359 | \\setromanfont{DejaVu Serif} |
| 353 | 360 | \\setmonofont{DejaVu Sans Mono} |
| 354 | − ''' | |
| 361 | + ''', | |
| 355 | 362 | } |
| 356 | 363 | |
| 357 | 364 | # At least one book (translations) may have Asian characters |
| @@ -213,9 +213,9 @@ Here are the routines, one by one: · 212 unmodified lines | ||
| 213 | 213 | there will be no entries in the cache for the kernel address |
| 214 | 214 | space for virtual addresses in the range 'start' to 'end-1'. |
| 215 | 215 | |
| 216 | − The first of these two routines is invoked after map_kernel_range() | |
| 216 | + The first of these two routines is invoked after vmap_range() | |
| 217 | 217 | has installed the page table entries. The second is invoked |
| 218 | − before unmap_kernel_range() deletes the page table entries. | |
| 218 | + before vunmap_range() deletes the page table entries. | |
| 219 | 219 | |
| 220 | 220 | There exists another whole class of cpu cache issues which currently |
| 221 | 221 | require a whole different set of interfaces to handle properly. |
| @@ -563,6 +563,16 @@ Free a region of memory previously allocated using dma_alloc_pages(). · 562 unmodified lines | ||
| 563 | 563 | dev, size, dma_handle and dir must all be the same as those passed into |
| 564 | 564 | dma_alloc_pages(). page must be the pointer returned by dma_alloc_pages(). |
| 565 | 565 | |
| 566 | +:: | |
| 567 | + | |
| 568 | + int | |
| 569 | + dma_mmap_pages(struct device *dev, struct vm_area_struct *vma, | |
| 570 | + size_t size, struct page *page) | |
| 571 | + | |
| 572 | +Map an allocation returned from dma_alloc_pages() into a user address space. | |
| 573 | +dev and size must be the same as those passed into dma_alloc_pages(). | |
| 574 | +page must be the pointer returned by dma_alloc_pages(). | |
| 575 | + | |
| 566 | 576 | :: |
| 567 | 577 | |
| 568 | 578 | void * |
| @@ -584,6 +594,84 @@ dev, size, dma_handle and dir must all be the same as those passed into · 15 unmodified lines | ||
| 584 | 594 | dma_alloc_noncoherent(). cpu_addr must be the virtual address returned by |
| 585 | 595 | dma_alloc_noncoherent(). |
| 586 | 596 | |
| 597 | +:: | |
| 598 | + | |
| 599 | + struct sg_table * | |
| 600 | + dma_alloc_noncontiguous(struct device *dev, size_t size, | |
| 601 | + enum dma_data_direction dir, gfp_t gfp, | |
| 602 | + unsigned long attrs); | |
| 603 | + | |
| 604 | +This routine allocates <size> bytes of non-coherent and possibly non-contiguous | |
| 605 | +memory. It returns a pointer to struct sg_table that describes the allocated | |
| 606 | +and DMA mapped memory, or NULL if the allocation failed. The resulting memory | |
| 607 | +can be used for struct page mapped into a scatterlist are suitable for. | |
| 608 | + | |
| 609 | +The return sg_table is guaranteed to have 1 single DMA mapped segment as | |
| 610 | +indicated by sgt->nents, but it might have multiple CPU side segments as | |
| 611 | +indicated by sgt->orig_nents. | |
| 612 | + | |
| 613 | +The dir parameter specified if data is read and/or written by the device, | |
| 614 | +see dma_map_single() for details. | |
| 615 | + | |
| 616 | +The gfp parameter allows the caller to specify the ``GFP_`` flags (see | |
| 617 | +kmalloc()) for the allocation, but rejects flags used to specify a memory | |
| 618 | +zone such as GFP_DMA or GFP_HIGHMEM. | |
| 619 | + | |
| 620 | +The attrs argument must be either 0 or DMA_ATTR_ALLOC_SINGLE_PAGES. | |
| 621 | + | |
| 622 | +Before giving the memory to the device, dma_sync_sgtable_for_device() needs | |
| 623 | +to be called, and before reading memory written by the device, | |
| 624 | +dma_sync_sgtable_for_cpu(), just like for streaming DMA mappings that are | |
| 625 | +reused. | |
| 626 | + | |
| 627 | +:: | |
| 628 | + | |
| 629 | + void | |
| 630 | + dma_free_noncontiguous(struct device *dev, size_t size, | |
| 631 | + struct sg_table *sgt, | |
| 632 | + enum dma_data_direction dir) | |
| 633 | + | |
| 634 | +Free memory previously allocated using dma_alloc_noncontiguous(). dev, size, | |
| 635 | +and dir must all be the same as those passed into dma_alloc_noncontiguous(). | |
| 636 | +sgt must be the pointer returned by dma_alloc_noncontiguous(). | |
| 637 | + | |
| 638 | +:: | |
| 639 | + | |
| 640 | + void * | |
| 641 | + dma_vmap_noncontiguous(struct device *dev, size_t size, | |
| 642 | + struct sg_table *sgt) | |
| 643 | + | |
| 644 | +Return a contiguous kernel mapping for an allocation returned from | |
| 645 | +dma_alloc_noncontiguous(). dev and size must be the same as those passed into | |
| 646 | +dma_alloc_noncontiguous(). sgt must be the pointer returned by | |
| 647 | +dma_alloc_noncontiguous(). | |
| 648 | + | |
| 649 | +Once a non-contiguous allocation is mapped using this function, the | |
| 650 | +flush_kernel_vmap_range() and invalidate_kernel_vmap_range() APIs must be used | |
| 651 | +to manage the coherency between the kernel mapping, the device and user space | |
| 652 | +mappings (if any). | |
| 653 | + | |
| 654 | +:: | |
| 655 | + | |
| 656 | + void | |
| 657 | + dma_vunmap_noncontiguous(struct device *dev, void *vaddr) | |
| 658 | + | |
| 659 | +Unmap a kernel mapping returned by dma_vmap_noncontiguous(). dev must be the | |
| 660 | +same the one passed into dma_alloc_noncontiguous(). vaddr must be the pointer | |
| 661 | +returned by dma_vmap_noncontiguous(). | |
| 662 | + | |
| 663 | + | |
| 664 | +:: | |
| 665 | + | |
| 666 | + int | |
| 667 | + dma_mmap_noncontiguous(struct device *dev, struct vm_area_struct *vma, | |
| 668 | + size_t size, struct sg_table *sgt) | |
| 669 | + | |
| 670 | +Map an allocation returned from dma_alloc_noncontiguous() into a user address | |
| 671 | +space. dev and size must be the same as those passed into | |
| 672 | +dma_alloc_noncontiguous(). sgt must be the pointer returned by | |
| 673 | +dma_alloc_noncontiguous(). | |
| 674 | + | |
| 587 | 675 | :: |
| 588 | 676 | |
| 589 | 677 | int |
| @@ -42,10 +42,10 @@ irq_domain usage · 41 unmodified lines | ||
| 42 | 42 | ================ |
| 43 | 43 | |
| 44 | 44 | An interrupt controller driver creates and registers an irq_domain by |
| 45 | −calling one of the irq_domain_add_*() functions (each mapping method | |
| 46 | −has a different allocator function, more on that later). The function | |
| 47 | −will return a pointer to the irq_domain on success. The caller must | |
| 48 | −provide the allocator function with an irq_domain_ops structure. | |
| 45 | +calling one of the irq_domain_add_*() or irq_domain_create_*() functions | |
| 46 | +(each mapping method has a different allocator function, more on that later). | |
| 47 | +The function will return a pointer to the irq_domain on success. The caller | |
| 48 | +must provide the allocator function with an irq_domain_ops structure. | |
| 49 | 49 | |
| 50 | 50 | In most cases, the irq_domain will begin empty without any mappings |
| 51 | 51 | between hwirq and IRQ numbers. Mappings are added to the irq_domain |
| @@ -147,6 +147,7 @@ Legacy · 95 unmodified lines | ||
| 147 | 147 | irq_domain_add_simple() |
| 148 | 148 | irq_domain_add_legacy() |
| 149 | 149 | irq_domain_add_legacy_isa() |
| 150 | + irq_domain_create_simple() | |
| 150 | 151 | irq_domain_create_legacy() |
| 151 | 152 | |
| 152 | 153 | The Legacy mapping is a special case for drivers that already have a |
| @@ -169,13 +170,13 @@ supported. For example, ISA controllers would use the legacy map for · 16 unmodified lines | ||
| 169 | 170 | mapping Linux IRQs 0-15 so that existing ISA drivers get the correct IRQ |
| 170 | 171 | numbers. |
| 171 | 172 | |
| 172 | −Most users of legacy mappings should use irq_domain_add_simple() which | |
| 173 | −will use a legacy domain only if an IRQ range is supplied by the | |
| 174 | −system and will otherwise use a linear domain mapping. The semantics | |
| 175 | −of this call are such that if an IRQ range is specified then | |
| 173 | +Most users of legacy mappings should use irq_domain_add_simple() or | |
| 174 | +irq_domain_create_simple() which will use a legacy domain only if an IRQ range | |
| 175 | +is supplied by the system and will otherwise use a linear domain mapping. | |
| 176 | +The semantics of this call are such that if an IRQ range is specified then | |
| 176 | 177 | descriptors will be allocated on-the-fly for it, and if no range is |
| 177 | −specified it will fall through to irq_domain_add_linear() which means | |
| 178 | −*no* irq descriptors will be allocated. | |
| 178 | +specified it will fall through to irq_domain_add_linear() or | |
| 179 | +irq_domain_create_linear() which means *no* irq descriptors will be allocated. | |
| 179 | 180 | |
| 180 | 181 | A typical use case for simple domains is where an irqchip provider |
| 181 | 182 | is supporting both dynamic and static IRQ assignments. |
| @@ -186,6 +187,7 @@ that the driver using the simple domain call irq_create_mapping() · 4 unmodified lines | ||
| 186 | 187 | before any irq_find_mapping() since the latter will actually work |
| 187 | 188 | for the static IRQ assignment case. |
| 188 | 189 | |
| 190 | +irq_domain_add_simple() and irq_domain_create_simple() as well as | |
| 189 | 191 | irq_domain_add_legacy() and irq_domain_create_legacy() are functionally |
| 190 | 192 | equivalent, except for the first argument is different - the former |
| 191 | 193 | accepts an Open Firmware specific 'struct device_node', while the latter |
| @@ -92,3 +92,9 @@ More Memory Management Functions · 91 unmodified lines | ||
| 92 | 92 | :export: |
| 93 | 93 | |
| 94 | 94 | .. kernel-doc:: mm/page_alloc.c |
| 95 | +.. kernel-doc:: mm/mempolicy.c | |
| 96 | +.. kernel-doc:: include/linux/mm_types.h | |
| 97 | + :internal: | |
| 98 | +.. kernel-doc:: include/linux/mm.h | |
| 99 | + :internal: | |
| 100 | +.. kernel-doc:: include/linux/mmzone.h | |
| @@ -79,7 +79,19 @@ Pointers printed without a specifier extension (i.e unadorned %p) are · 78 unmodified lines | ||
| 79 | 79 | hashed to prevent leaking information about the kernel memory layout. This |
| 80 | 80 | has the added benefit of providing a unique identifier. On 64-bit machines |
| 81 | 81 | the first 32 bits are zeroed. The kernel will print ``(ptrval)`` until it |
| 82 | −gathers enough entropy. If you *really* want the address see %px below. | |
| 82 | +gathers enough entropy. | |
| 83 | + | |
| 84 | +When possible, use specialised modifiers such as %pS or %pB (described below) | |
| 85 | +to avoid the need of providing an unhashed address that has to be interpreted | |
| 86 | +post-hoc. If not possible, and the aim of printing the address is to provide | |
| 87 | +more information for debugging, use %p and boot the kernel with the | |
| 88 | +``no_hash_pointers`` parameter during debugging, which will print all %p | |
| 89 | +addresses unmodified. If you *really* always want the unmodified address, see | |
| 90 | +%px below. | |
| 91 | + | |
| 92 | +If (and only if) you are printing addresses as a content of a virtual file in | |
| 93 | +e.g. procfs or sysfs (using e.g. seq_printf(), not printk()) read by a | |
| 94 | +userspace process, use the %pK modifier described below instead of %p or %px. | |
| 83 | 95 | |
| 84 | 96 | Error Pointers |
| 85 | 97 | -------------- |
| @@ -139,6 +151,11 @@ For printing kernel pointers which should be hidden from unprivileged · 53 unmodified lines | ||
| 139 | 151 | users. The behaviour of %pK depends on the kptr_restrict sysctl - see |
| 140 | 152 | Documentation/admin-guide/sysctl/kernel.rst for more details. |
| 141 | 153 | |
| 154 | +This modifier is *only* intended when producing content of a file read by | |
| 155 | +userspace from e.g. procfs or sysfs, not for dmesg. Please refer to the | |
| 156 | +section about %p above for discussion about how to manage hashing pointers | |
| 157 | +in printk(). | |
| 158 | + | |
| 142 | 159 | Unmodified Addresses |
| 143 | 160 | -------------------- |
| 144 | 161 | |
| @@ -153,6 +170,13 @@ equivalent to %lx (or %lu). %px is preferred because it is more uniquely · 8 unmodified lines | ||
| 153 | 170 | grep'able. If in the future we need to modify the way the kernel handles |
| 154 | 171 | printing pointers we will be better equipped to find the call sites. |
| 155 | 172 | |
| 173 | +Before using %px, consider if using %p is sufficient together with enabling the | |
| 174 | +``no_hash_pointers`` kernel parameter during debugging sessions (see the %p | |
| 175 | +description above). One valid scenario for %px might be printing information | |
| 176 | +immediately before a panic, which prevents any sensitive information to be | |
| 177 | +exploited anyway, and with %px there would be no need to reproduce the panic | |
| 178 | +with no_hash_pointers. | |
| 179 | + | |
| 156 | 180 | Pointer Differences |
| 157 | 181 | ------------------- |
| 158 | 182 | |
| @@ -540,7 +564,7 @@ Flags bitfields such as page flags, gfp_flags · 381 unmodified lines | ||
| 540 | 564 | |
| 541 | 565 | :: |
| 542 | 566 | |
| 543 | − %pGp referenced|uptodate|lru|active|private | |
| 567 | + %pGp referenced|uptodate|lru|active|private|node=0|zone=2|lastcpupid=0x1fffff | |
| 544 | 568 | %pGg GFP_USER|GFP_DMA32|GFP_NOWARN |
| 545 | 569 | %pGv read|exec|mayread|maywrite|mayexec|denywrite |
| 546 | 570 | |
| @@ -201,7 +201,7 @@ search trees, such as for traversals or users relying on a the particular · 200 unmodified lines | ||
| 201 | 201 | order for their own logic. To this end, users can use 'struct rb_root_cached' |
| 202 | 202 | to optimize O(logN) rb_first() calls to a simple pointer fetch avoiding |
| 203 | 203 | potentially expensive tree iterations. This is done at negligible runtime |
| 204 | −overhead for maintanence; albeit larger memory footprint. | |
| 204 | +overhead for maintenance; albeit larger memory footprint. | |
| 205 | 205 | |
| 206 | 206 | Similar to the rb_root structure, cached rbtrees are initialized to be |
| 207 | 207 | empty via:: |
| @@ -43,14 +43,14 @@ exporting of kernel symbols to the kernel symbol table, variants of these are · 42 unmodified lines | ||
| 43 | 43 | available to export symbols into a certain namespace: EXPORT_SYMBOL_NS() and |
| 44 | 44 | EXPORT_SYMBOL_NS_GPL(). They take one additional argument: the namespace. |
| 45 | 45 | Please note that due to macro expansion that argument needs to be a |
| 46 | −preprocessor symbol. E.g. to export the symbol `usb_stor_suspend` into the | |
| 47 | −namespace `USB_STORAGE`, use:: | |
| 46 | +preprocessor symbol. E.g. to export the symbol ``usb_stor_suspend`` into the | |
| 47 | +namespace ``USB_STORAGE``, use:: | |
| 48 | 48 | |
| 49 | 49 | EXPORT_SYMBOL_NS(usb_stor_suspend, USB_STORAGE); |
| 50 | 50 | |
| 51 | −The corresponding ksymtab entry struct `kernel_symbol` will have the member | |
| 52 | −`namespace` set accordingly. A symbol that is exported without a namespace will | |
| 53 | −refer to `NULL`. There is no default namespace if none is defined. `modpost` | |
| 51 | +The corresponding ksymtab entry struct ``kernel_symbol`` will have the member | |
| 52 | +``namespace`` set accordingly. A symbol that is exported without a namespace will | |
| 53 | +refer to ``NULL``. There is no default namespace if none is defined. ``modpost`` | |
| 54 | 54 | and kernel/module.c make use the namespace at build time or module load time, |
| 55 | 55 | respectively. |
| 56 | 56 | |
| @@ -64,7 +64,7 @@ and EXPORT_SYMBOL_GPL() macro expansions that do not specify a namespace. · 7 unmodified lines | ||
| 64 | 64 | |
| 65 | 65 | There are multiple ways of specifying this define and it depends on the |
| 66 | 66 | subsystem and the maintainer's preference, which one to use. The first option |
| 67 | −is to define the default namespace in the `Makefile` of the subsystem. E.g. to | |
| 67 | +is to define the default namespace in the ``Makefile`` of the subsystem. E.g. to | |
| 68 | 68 | export all symbols defined in usb-common into the namespace USB_COMMON, add a |
| 69 | 69 | line like this to drivers/usb/common/Makefile:: |
| 70 | 70 | |
| @@ -96,7 +96,7 @@ using a statement like:: · 25 unmodified lines | ||
| 96 | 96 | |
| 97 | 97 | MODULE_IMPORT_NS(USB_STORAGE); |
| 98 | 98 | |
| 99 | −This will create a `modinfo` tag in the module for each imported namespace. | |
| 99 | +This will create a ``modinfo`` tag in the module for each imported namespace. | |
| 100 | 100 | This has the side effect, that the imported namespaces of a module can be |
| 101 | 101 | inspected with modinfo:: |
| 102 | 102 | |
| @@ -113,7 +113,7 @@ metadata definitions like MODULE_AUTHOR() or MODULE_LICENSE(). Refer to section · 10 unmodified lines | ||
| 113 | 113 | 4. Loading Modules that use namespaced Symbols |
| 114 | 114 | ============================================== |
| 115 | 115 | |
| 116 | −At module loading time (e.g. `insmod`), the kernel will check each symbol | |
| 116 | +At module loading time (e.g. ``insmod``), the kernel will check each symbol | |
| 117 | 117 | referenced from the module for its availability and whether the namespace it |
| 118 | 118 | might be exported to has been imported by the module. The default behaviour of |
| 119 | 119 | the kernel is to reject loading modules that don't specify sufficient imports. |
| @@ -138,19 +138,19 @@ missing imports. Fixing missing imports can be done with:: · 18 unmodified lines | ||
| 138 | 138 | A typical scenario for module authors would be:: |
| 139 | 139 | |
| 140 | 140 | - write code that depends on a symbol from a not imported namespace |
| 141 | − - `make` | |
| 141 | + - ``make`` | |
| 142 | 142 | - notice the warning of modpost telling about a missing import |
| 143 | − - run `make nsdeps` to add the import to the correct code location | |
| 143 | + - run ``make nsdeps`` to add the import to the correct code location | |
| 144 | 144 | |
| 145 | 145 | For subsystem maintainers introducing a namespace, the steps are very similar. |
| 146 | −Again, `make nsdeps` will eventually add the missing namespace imports for | |
| 146 | +Again, ``make nsdeps`` will eventually add the missing namespace imports for | |
| 147 | 147 | in-tree modules:: |
| 148 | 148 | |
| 149 | 149 | - move or add symbols to a namespace (e.g. with EXPORT_SYMBOL_NS()) |
| 150 | − - `make` (preferably with an allmodconfig to cover all in-kernel | |
| 150 | + - ``make`` (preferably with an allmodconfig to cover all in-kernel | |
| 151 | 151 | modules) |
| 152 | 152 | - notice the warning of modpost telling about a missing import |
| 153 | − - run `make nsdeps` to add the import to the correct code location | |
| 153 | + - run ``make nsdeps`` to add the import to the correct code location | |
| 154 | 154 | |
| 155 | 155 | You can also run nsdeps for external module builds. A typical usage is:: |
| 156 | 156 | |
| @@ -0,0 +1,755 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0-only | |
| 2 | + | |
| 3 | +========== | |
| 4 | +Checkpatch | |
| 5 | +========== | |
| 6 | + | |
| 7 | +Checkpatch (scripts/checkpatch.pl) is a perl script which checks for trivial | |
| 8 | +style violations in patches and optionally corrects them. Checkpatch can | |
| 9 | +also be run on file contexts and without the kernel tree. | |
| 10 | + | |
| 11 | +Checkpatch is not always right. Your judgement takes precedence over checkpatch | |
| 12 | +messages. If your code looks better with the violations, then its probably | |
| 13 | +best left alone. | |
| 14 | + | |
| 15 | + | |
| 16 | +Options | |
| 17 | +======= | |
| 18 | + | |
| 19 | +This section will describe the options checkpatch can be run with. | |
| 20 | + | |
| 21 | +Usage:: | |
| 22 | + | |
| 23 | + ./scripts/checkpatch.pl [OPTION]... [FILE]... | |
| 24 | + | |
| 25 | +Available options: | |
| 26 | + | |
| 27 | + - -q, --quiet | |
| 28 | + | |
| 29 | + Enable quiet mode. | |
| 30 | + | |
| 31 | + - -v, --verbose | |
| 32 | + Enable verbose mode. Additional verbose test descriptions are output | |
| 33 | + so as to provide information on why that particular message is shown. | |
| 34 | + | |
| 35 | + - --no-tree | |
| 36 | + | |
| 37 | + Run checkpatch without the kernel tree. | |
| 38 | + | |
| 39 | + - --no-signoff | |
| 40 | + | |
| 41 | + Disable the 'Signed-off-by' line check. The sign-off is a simple line at | |
| 42 | + the end of the explanation for the patch, which certifies that you wrote it | |
| 43 | + or otherwise have the right to pass it on as an open-source patch. | |
| 44 | + | |
| 45 | + Example:: | |
| 46 | + | |
| 47 | + Signed-off-by: Random J Developer <random@developer.example.org> | |
| 48 | + | |
| 49 | + Setting this flag effectively stops a message for a missing signed-off-by | |
| 50 | + line in a patch context. | |
| 51 | + | |
| 52 | + - --patch | |
| 53 | + | |
| 54 | + Treat FILE as a patch. This is the default option and need not be | |
| 55 | + explicitly specified. | |
| 56 | + | |
| 57 | + - --emacs | |
| 58 | + | |
| 59 | + Set output to emacs compile window format. This allows emacs users to jump | |
| 60 | + from the error in the compile window directly to the offending line in the | |
| 61 | + patch. | |
| 62 | + | |
| 63 | + - --terse | |
| 64 | + | |
| 65 | + Output only one line per report. | |
| 66 | + | |
| 67 | + - --showfile | |
| 68 | + | |
| 69 | + Show the diffed file position instead of the input file position. | |
| 70 | + | |
| 71 | + - -g, --git | |
| 72 | + | |
| 73 | + Treat FILE as a single commit or a git revision range. | |
| 74 | + | |
| 75 | + Single commit with: | |
| 76 | + | |
| 77 | + - <rev> | |
| 78 | + - <rev>^ | |
| 79 | + - <rev>~n | |
| 80 | + | |
| 81 | + Multiple commits with: | |
| 82 | + | |
| 83 | + - <rev1>..<rev2> | |
| 84 | + - <rev1>...<rev2> | |
| 85 | + - <rev>-<count> | |
| 86 | + | |
| 87 | + - -f, --file | |
| 88 | + | |
| 89 | + Treat FILE as a regular source file. This option must be used when running | |
| 90 | + checkpatch on source files in the kernel. | |
| 91 | + | |
| 92 | + - --subjective, --strict | |
| 93 | + | |
| 94 | + Enable stricter tests in checkpatch. By default the tests emitted as CHECK | |
| 95 | + do not activate by default. Use this flag to activate the CHECK tests. | |
| 96 | + | |
| 97 | + - --list-types | |
| 98 | + | |
| 99 | + Every message emitted by checkpatch has an associated TYPE. Add this flag | |
| 100 | + to display all the types in checkpatch. | |
| 101 | + | |
| 102 | + Note that when this flag is active, checkpatch does not read the input FILE, | |
| 103 | + and no message is emitted. Only a list of types in checkpatch is output. | |
| 104 | + | |
| 105 | + - --types TYPE(,TYPE2...) | |
| 106 | + | |
| 107 | + Only display messages with the given types. | |
| 108 | + | |
| 109 | + Example:: | |
| 110 | + | |
| 111 | + ./scripts/checkpatch.pl mypatch.patch --types EMAIL_SUBJECT,BRACES | |
| 112 | + | |
| 113 | + - --ignore TYPE(,TYPE2...) | |
| 114 | + | |
| 115 | + Checkpatch will not emit messages for the specified types. | |
| 116 | + | |
| 117 | + Example:: | |
| 118 | + | |
| 119 | + ./scripts/checkpatch.pl mypatch.patch --ignore EMAIL_SUBJECT,BRACES | |
| 120 | + | |
| 121 | + - --show-types | |
| 122 | + | |
| 123 | + By default checkpatch doesn't display the type associated with the messages. | |
| 124 | + Set this flag to show the message type in the output. | |
| 125 | + | |
| 126 | + - --max-line-length=n | |
| 127 | + | |
| 128 | + Set the max line length (default 100). If a line exceeds the specified | |
| 129 | + length, a LONG_LINE message is emitted. | |
| 130 | + | |
| 131 | + | |
| 132 | + The message level is different for patch and file contexts. For patches, | |
| 133 | + a WARNING is emitted. While a milder CHECK is emitted for files. So for | |
| 134 | + file contexts, the --strict flag must also be enabled. | |
| 135 | + | |
| 136 | + - --min-conf-desc-length=n | |
| 137 | + | |
| 138 | + Set the Kconfig entry minimum description length, if shorter, warn. | |
| 139 | + | |
| 140 | + - --tab-size=n | |
| 141 | + | |
| 142 | + Set the number of spaces for tab (default 8). | |
| 143 | + | |
| 144 | + - --root=PATH | |
| 145 | + | |
| 146 | + PATH to the kernel tree root. | |
| 147 | + | |
| 148 | + This option must be specified when invoking checkpatch from outside | |
| 149 | + the kernel root. | |
| 150 | + | |
| 151 | + - --no-summary | |
| 152 | + | |
| 153 | + Suppress the per file summary. | |
| 154 | + | |
| 155 | + - --mailback | |
| 156 | + | |
| 157 | + Only produce a report in case of Warnings or Errors. Milder Checks are | |
| 158 | + excluded from this. | |
| 159 | + | |
| 160 | + - --summary-file | |
| 161 | + | |
| 162 | + Include the filename in summary. | |
| 163 | + | |
| 164 | + - --debug KEY=[0|1] | |
| 165 | + | |
| 166 | + Turn on/off debugging of KEY, where KEY is one of 'values', 'possible', | |
| 167 | + 'type', and 'attr' (default is all off). | |
| 168 | + | |
| 169 | + - --fix | |
| 170 | + | |
| 171 | + This is an EXPERIMENTAL feature. If correctable errors exists, a file | |
| 172 | + <inputfile>.EXPERIMENTAL-checkpatch-fixes is created which has the | |
| 173 | + automatically fixable errors corrected. | |
| 174 | + | |
| 175 | + - --fix-inplace | |
| 176 | + | |
| 177 | + EXPERIMENTAL - Similar to --fix but input file is overwritten with fixes. | |
| 178 | + | |
| 179 | + DO NOT USE this flag unless you are absolutely sure and you have a backup | |
| 180 | + in place. | |
| 181 | + | |
| 182 | + - --ignore-perl-version | |
| 183 | + | |
| 184 | + Override checking of perl version. Runtime errors maybe encountered after | |
| 185 | + enabling this flag if the perl version does not meet the minimum specified. | |
| 186 | + | |
| 187 | + - --codespell | |
| 188 | + | |
| 189 | + Use the codespell dictionary for checking spelling errors. | |
| 190 | + | |
| 191 | + - --codespellfile | |
| 192 | + | |
| 193 | + Use the specified codespell file. | |
| 194 | + Default is '/usr/share/codespell/dictionary.txt'. | |
| 195 | + | |
| 196 | + - --typedefsfile | |
| 197 | + | |
| 198 | + Read additional types from this file. | |
| 199 | + | |
| 200 | + - --color[=WHEN] | |
| 201 | + | |
| 202 | + Use colors 'always', 'never', or only when output is a terminal ('auto'). | |
| 203 | + Default is 'auto'. | |
| 204 | + | |
| 205 | + - --kconfig-prefix=WORD | |
| 206 | + | |
| 207 | + Use WORD as a prefix for Kconfig symbols (default is `CONFIG_`). | |
| 208 | + | |
| 209 | + - -h, --help, --version | |
| 210 | + | |
| 211 | + Display the help text. | |
| 212 | + | |
| 213 | +Message Levels | |
| 214 | +============== | |
| 215 | + | |
| 216 | +Messages in checkpatch are divided into three levels. The levels of messages | |
| 217 | +in checkpatch denote the severity of the error. They are: | |
| 218 | + | |
| 219 | + - ERROR | |
| 220 | + | |
| 221 | + This is the most strict level. Messages of type ERROR must be taken | |
| 222 | + seriously as they denote things that are very likely to be wrong. | |
| 223 | + | |
| 224 | + - WARNING | |
| 225 | + | |
| 226 | + This is the next stricter level. Messages of type WARNING requires a | |
| 227 | + more careful review. But it is milder than an ERROR. | |
| 228 | + | |
| 229 | + - CHECK | |
| 230 | + | |
| 231 | + This is the mildest level. These are things which may require some thought. | |
| 232 | + | |
| 233 | +Type Descriptions | |
| 234 | +================= | |
| 235 | + | |
| 236 | +This section contains a description of all the message types in checkpatch. | |
| 237 | + | |
| 238 | +.. Types in this section are also parsed by checkpatch. | |
| 239 | +.. The types are grouped into subsections based on use. | |
| 240 | + | |
| 241 | + | |
| 242 | +Allocation style | |
| 243 | +---------------- | |
| 244 | + | |
| 245 | + **ALLOC_ARRAY_ARGS** | |
| 246 | + The first argument for kcalloc or kmalloc_array should be the | |
| 247 | + number of elements. sizeof() as the first argument is generally | |
| 248 | + wrong. | |
| 249 | + See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html | |
| 250 | + | |
| 251 | + **ALLOC_SIZEOF_STRUCT** | |
| 252 | + The allocation style is bad. In general for family of | |
| 253 | + allocation functions using sizeof() to get memory size, | |
| 254 | + constructs like:: | |
| 255 | + | |
| 256 | + p = alloc(sizeof(struct foo), ...) | |
| 257 | + | |
| 258 | + should be:: | |
| 259 | + | |
| 260 | + p = alloc(sizeof(*p), ...) | |
| 261 | + | |
| 262 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#allocating-memory | |
| 263 | + | |
| 264 | + **ALLOC_WITH_MULTIPLY** | |
| 265 | + Prefer kmalloc_array/kcalloc over kmalloc/kzalloc with a | |
| 266 | + sizeof multiply. | |
| 267 | + See: https://www.kernel.org/doc/html/latest/core-api/memory-allocation.html | |
| 268 | + | |
| 269 | + | |
| 270 | +API usage | |
| 271 | +--------- | |
| 272 | + | |
| 273 | + **ARCH_DEFINES** | |
| 274 | + Architecture specific defines should be avoided wherever | |
| 275 | + possible. | |
| 276 | + | |
| 277 | + **ARCH_INCLUDE_LINUX** | |
| 278 | + Whenever asm/file.h is included and linux/file.h exists, a | |
| 279 | + conversion can be made when linux/file.h includes asm/file.h. | |
| 280 | + However this is not always the case (See signal.h). | |
| 281 | + This message type is emitted only for includes from arch/. | |
| 282 | + | |
| 283 | + **AVOID_BUG** | |
| 284 | + BUG() or BUG_ON() should be avoided totally. | |
| 285 | + Use WARN() and WARN_ON() instead, and handle the "impossible" | |
| 286 | + error condition as gracefully as possible. | |
| 287 | + See: https://www.kernel.org/doc/html/latest/process/deprecated.html#bug-and-bug-on | |
| 288 | + | |
| 289 | + **CONSIDER_KSTRTO** | |
| 290 | + The simple_strtol(), simple_strtoll(), simple_strtoul(), and | |
| 291 | + simple_strtoull() functions explicitly ignore overflows, which | |
| 292 | + may lead to unexpected results in callers. The respective kstrtol(), | |
| 293 | + kstrtoll(), kstrtoul(), and kstrtoull() functions tend to be the | |
| 294 | + correct replacements. | |
| 295 | + See: https://www.kernel.org/doc/html/latest/process/deprecated.html#simple-strtol-simple-strtoll-simple-strtoul-simple-strtoull | |
| 296 | + | |
| 297 | + **LOCKDEP** | |
| 298 | + The lockdep_no_validate class was added as a temporary measure to | |
| 299 | + prevent warnings on conversion of device->sem to device->mutex. | |
| 300 | + It should not be used for any other purpose. | |
| 301 | + See: https://lore.kernel.org/lkml/1268959062.9440.467.camel@laptop/ | |
| 302 | + | |
| 303 | + **MALFORMED_INCLUDE** | |
| 304 | + The #include statement has a malformed path. This has happened | |
| 305 | + because the author has included a double slash "//" in the pathname | |
| 306 | + accidentally. | |
| 307 | + | |
| 308 | + **USE_LOCKDEP** | |
| 309 | + lockdep_assert_held() annotations should be preferred over | |
| 310 | + assertions based on spin_is_locked() | |
| 311 | + See: https://www.kernel.org/doc/html/latest/locking/lockdep-design.html#annotations | |
| 312 | + | |
| 313 | + **UAPI_INCLUDE** | |
| 314 | + No #include statements in include/uapi should use a uapi/ path. | |
| 315 | + | |
| 316 | + | |
| 317 | +Comment style | |
| 318 | +------------- | |
| 319 | + | |
| 320 | + **BLOCK_COMMENT_STYLE** | |
| 321 | + The comment style is incorrect. The preferred style for multi- | |
| 322 | + line comments is:: | |
| 323 | + | |
| 324 | + /* | |
| 325 | + * This is the preferred style | |
| 326 | + * for multi line comments. | |
| 327 | + */ | |
| 328 | + | |
| 329 | + The networking comment style is a bit different, with the first line | |
| 330 | + not empty like the former:: | |
| 331 | + | |
| 332 | + /* This is the preferred comment style | |
| 333 | + * for files in net/ and drivers/net/ | |
| 334 | + */ | |
| 335 | + | |
| 336 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting | |
| 337 | + | |
| 338 | + **C99_COMMENTS** | |
| 339 | + C99 style single line comments (//) should not be used. | |
| 340 | + Prefer the block comment style instead. | |
| 341 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting | |
| 342 | + | |
| 343 | + | |
| 344 | +Commit message | |
| 345 | +-------------- | |
| 346 | + | |
| 347 | + **BAD_SIGN_OFF** | |
| 348 | + The signed-off-by line does not fall in line with the standards | |
| 349 | + specified by the community. | |
| 350 | + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#developer-s-certificate-of-origin-1-1 | |
| 351 | + | |
| 352 | + **BAD_STABLE_ADDRESS_STYLE** | |
| 353 | + The email format for stable is incorrect. | |
| 354 | + Some valid options for stable address are:: | |
| 355 | + | |
| 356 | + 1. stable@vger.kernel.org | |
| 357 | + 2. stable@kernel.org | |
| 358 | + | |
| 359 | + For adding version info, the following comment style should be used:: | |
| 360 | + | |
| 361 | + stable@vger.kernel.org # version info | |
| 362 | + | |
| 363 | + **COMMIT_COMMENT_SYMBOL** | |
| 364 | + Commit log lines starting with a '#' are ignored by git as | |
| 365 | + comments. To solve this problem addition of a single space | |
| 366 | + infront of the log line is enough. | |
| 367 | + | |
| 368 | + **COMMIT_MESSAGE** | |
| 369 | + The patch is missing a commit description. A brief | |
| 370 | + description of the changes made by the patch should be added. | |
| 371 | + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes | |
| 372 | + | |
| 373 | + **MISSING_SIGN_OFF** | |
| 374 | + The patch is missing a Signed-off-by line. A signed-off-by | |
| 375 | + line should be added according to Developer's certificate of | |
| 376 | + Origin. | |
| 377 | + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin | |
| 378 | + | |
| 379 | + **NO_AUTHOR_SIGN_OFF** | |
| 380 | + The author of the patch has not signed off the patch. It is | |
| 381 | + required that a simple sign off line should be present at the | |
| 382 | + end of explanation of the patch to denote that the author has | |
| 383 | + written it or otherwise has the rights to pass it on as an open | |
| 384 | + source patch. | |
| 385 | + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#sign-your-work-the-developer-s-certificate-of-origin | |
| 386 | + | |
| 387 | + **DIFF_IN_COMMIT_MSG** | |
| 388 | + Avoid having diff content in commit message. | |
| 389 | + This causes problems when one tries to apply a file containing both | |
| 390 | + the changelog and the diff because patch(1) tries to apply the diff | |
| 391 | + which it found in the changelog. | |
| 392 | + See: https://lore.kernel.org/lkml/20150611134006.9df79a893e3636019ad2759e@linux-foundation.org/ | |
| 393 | + | |
| 394 | + **GERRIT_CHANGE_ID** | |
| 395 | + To be picked up by gerrit, the footer of the commit message might | |
| 396 | + have a Change-Id like:: | |
| 397 | + | |
| 398 | + Change-Id: Ic8aaa0728a43936cd4c6e1ed590e01ba8f0fbf5b | |
| 399 | + Signed-off-by: A. U. Thor <author@example.com> | |
| 400 | + | |
| 401 | + The Change-Id line must be removed before submitting. | |
| 402 | + | |
| 403 | + **GIT_COMMIT_ID** | |
| 404 | + The proper way to reference a commit id is: | |
| 405 | + commit <12+ chars of sha1> ("<title line>") | |
| 406 | + | |
| 407 | + An example may be:: | |
| 408 | + | |
| 409 | + Commit e21d2170f36602ae2708 ("video: remove unnecessary | |
| 410 | + platform_set_drvdata()") removed the unnecessary | |
| 411 | + platform_set_drvdata(), but left the variable "dev" unused, | |
| 412 | + delete it. | |
| 413 | + | |
| 414 | + See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes | |
| 415 | + | |
| 416 | + | |
| 417 | +Comparison style | |
| 418 | +---------------- | |
| 419 | + | |
| 420 | + **ASSIGN_IN_IF** | |
| 421 | + Do not use assignments in if condition. | |
| 422 | + Example:: | |
| 423 | + | |
| 424 | + if ((foo = bar(...)) < BAZ) { | |
| 425 | + | |
| 426 | + should be written as:: | |
| 427 | + | |
| 428 | + foo = bar(...); | |
| 429 | + if (foo < BAZ) { | |
| 430 | + | |
| 431 | + **BOOL_COMPARISON** | |
| 432 | + Comparisons of A to true and false are better written | |
| 433 | + as A and !A. | |
| 434 | + See: https://lore.kernel.org/lkml/1365563834.27174.12.camel@joe-AO722/ | |
| 435 | + | |
| 436 | + **COMPARISON_TO_NULL** | |
| 437 | + Comparisons to NULL in the form (foo == NULL) or (foo != NULL) | |
| 438 | + are better written as (!foo) and (foo). | |
| 439 | + | |
| 440 | + **CONSTANT_COMPARISON** | |
| 441 | + Comparisons with a constant or upper case identifier on the left | |
| 442 | + side of the test should be avoided. | |
| 443 | + | |
| 444 | + | |
| 445 | +Macros, Attributes and Symbols | |
| 446 | +------------------------------ | |
| 447 | + | |
| 448 | + **ARRAY_SIZE** | |
| 449 | + The ARRAY_SIZE(foo) macro should be preferred over | |
| 450 | + sizeof(foo)/sizeof(foo[0]) for finding number of elements in an | |
| 451 | + array. | |
| 452 | + | |
| 453 | + The macro is defined in include/linux/kernel.h:: | |
| 454 | + | |
| 455 | + #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) | |
| 456 | + | |
| 457 | + **AVOID_EXTERNS** | |
| 458 | + Function prototypes don't need to be declared extern in .h | |
| 459 | + files. It's assumed by the compiler and is unnecessary. | |
| 460 | + | |
| 461 | + **AVOID_L_PREFIX** | |
| 462 | + Local symbol names that are prefixed with `.L` should be avoided, | |
| 463 | + as this has special meaning for the assembler; a symbol entry will | |
| 464 | + not be emitted into the symbol table. This can prevent `objtool` | |
| 465 | + from generating correct unwind info. | |
| 466 | + | |
| 467 | + Symbols with STB_LOCAL binding may still be used, and `.L` prefixed | |
| 468 | + local symbol names are still generally usable within a function, | |
| 469 | + but `.L` prefixed local symbol names should not be used to denote | |
| 470 | + the beginning or end of code regions via | |
| 471 | + `SYM_CODE_START_LOCAL`/`SYM_CODE_END` | |
| 472 | + | |
| 473 | + **BIT_MACRO** | |
| 474 | + Defines like: 1 << <digit> could be BIT(digit). | |
| 475 | + The BIT() macro is defined in include/linux/bitops.h:: | |
| 476 | + | |
| 477 | + #define BIT(nr) (1UL << (nr)) | |
| 478 | + | |
| 479 | + **CONST_READ_MOSTLY** | |
| 480 | + When a variable is tagged with the __read_mostly annotation, it is a | |
| 481 | + signal to the compiler that accesses to the variable will be mostly | |
| 482 | + reads and rarely(but NOT never) a write. | |
| 483 | + | |
| 484 | + const __read_mostly does not make any sense as const data is already | |
| 485 | + read-only. The __read_mostly annotation thus should be removed. | |
| 486 | + | |
| 487 | + **DATE_TIME** | |
| 488 | + It is generally desirable that building the same source code with | |
| 489 | + the same set of tools is reproducible, i.e. the output is always | |
| 490 | + exactly the same. | |
| 491 | + | |
| 492 | + The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros, | |
| 493 | + and enables warnings if they are used as they can lead to | |
| 494 | + non-deterministic builds. | |
| 495 | + See: https://www.kernel.org/doc/html/latest/kbuild/reproducible-builds.html#timestamps | |
| 496 | + | |
| 497 | + **DEFINE_ARCH_HAS** | |
| 498 | + The ARCH_HAS_xyz and ARCH_HAVE_xyz patterns are wrong. | |
| 499 | + | |
| 500 | + For big conceptual features use Kconfig symbols instead. And for | |
| 501 | + smaller things where we have compatibility fallback functions but | |
| 502 | + want architectures able to override them with optimized ones, we | |
| 503 | + should either use weak functions (appropriate for some cases), or | |
| 504 | + the symbol that protects them should be the same symbol we use. | |
| 505 | + See: https://lore.kernel.org/lkml/CA+55aFycQ9XJvEOsiM3txHL5bjUc8CeKWJNR_H+MiicaddB42Q@mail.gmail.com/ | |
| 506 | + | |
| 507 | + **INIT_ATTRIBUTE** | |
| 508 | + Const init definitions should use __initconst instead of | |
| 509 | + __initdata. | |
| 510 | + | |
| 511 | + Similarly init definitions without const require a separate | |
| 512 | + use of const. | |
| 513 | + | |
| 514 | + **INLINE_LOCATION** | |
| 515 | + The inline keyword should sit between storage class and type. | |
| 516 | + | |
| 517 | + For example, the following segment:: | |
| 518 | + | |
| 519 | + inline static int example_function(void) | |
| 520 | + { | |
| 521 | + ... | |
| 522 | + } | |
| 523 | + | |
| 524 | + should be:: | |
| 525 | + | |
| 526 | + static inline int example_function(void) | |
| 527 | + { | |
| 528 | + ... | |
| 529 | + } | |
| 530 | + | |
| 531 | + **MULTISTATEMENT_MACRO_USE_DO_WHILE** | |
| 532 | + Macros with multiple statements should be enclosed in a | |
| 533 | + do - while block. Same should also be the case for macros | |
| 534 | + starting with `if` to avoid logic defects:: | |
| 535 | + | |
| 536 | + #define macrofun(a, b, c) \ | |
| 537 | + do { \ | |
| 538 | + if (a == 5) \ | |
| 539 | + do_this(b, c); \ | |
| 540 | + } while (0) | |
| 541 | + | |
| 542 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#macros-enums-and-rtl | |
| 543 | + | |
| 544 | + **WEAK_DECLARATION** | |
| 545 | + Using weak declarations like __attribute__((weak)) or __weak | |
| 546 | + can have unintended link defects. Avoid using them. | |
| 547 | + | |
| 548 | + | |
| 549 | +Functions and Variables | |
| 550 | +----------------------- | |
| 551 | + | |
| 552 | + **CAMELCASE** | |
| 553 | + Avoid CamelCase Identifiers. | |
| 554 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#naming | |
| 555 | + | |
| 556 | + **FUNCTION_WITHOUT_ARGS** | |
| 557 | + Function declarations without arguments like:: | |
| 558 | + | |
| 559 | + int foo() | |
| 560 | + | |
| 561 | + should be:: | |
| 562 | + | |
| 563 | + int foo(void) | |
| 564 | + | |
| 565 | + **GLOBAL_INITIALISERS** | |
| 566 | + Global variables should not be initialized explicitly to | |
| 567 | + 0 (or NULL, false, etc.). Your compiler (or rather your | |
| 568 | + loader, which is responsible for zeroing out the relevant | |
| 569 | + sections) automatically does it for you. | |
| 570 | + | |
| 571 | + **INITIALISED_STATIC** | |
| 572 | + Static variables should not be initialized explicitly to zero. | |
| 573 | + Your compiler (or rather your loader) automatically does | |
| 574 | + it for you. | |
| 575 | + | |
| 576 | + **RETURN_PARENTHESES** | |
| 577 | + return is not a function and as such doesn't need parentheses:: | |
| 578 | + | |
| 579 | + return (bar); | |
| 580 | + | |
| 581 | + can simply be:: | |
| 582 | + | |
| 583 | + return bar; | |
| 584 | + | |
| 585 | + | |
| 586 | +Spacing and Brackets | |
| 587 | +-------------------- | |
| 588 | + | |
| 589 | + **ASSIGNMENT_CONTINUATIONS** | |
| 590 | + Assignment operators should not be written at the start of a | |
| 591 | + line but should follow the operand at the previous line. | |
| 592 | + | |
| 593 | + **BRACES** | |
| 594 | + The placement of braces is stylistically incorrect. | |
| 595 | + The preferred way is to put the opening brace last on the line, | |
| 596 | + and put the closing brace first:: | |
| 597 | + | |
| 598 | + if (x is true) { | |
| 599 | + we do y | |
| 600 | + } | |
| 601 | + | |
| 602 | + This applies for all non-functional blocks. | |
| 603 | + However, there is one special case, namely functions: they have the | |
| 604 | + opening brace at the beginning of the next line, thus:: | |
| 605 | + | |
| 606 | + int function(int x) | |
| 607 | + { | |
| 608 | + body of function | |
| 609 | + } | |
| 610 | + | |
| 611 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces | |
| 612 | + | |
| 613 | + **BRACKET_SPACE** | |
| 614 | + Whitespace before opening bracket '[' is prohibited. | |
| 615 | + There are some exceptions: | |
| 616 | + | |
| 617 | + 1. With a type on the left:: | |
| 618 | + | |
| 619 | + ;int [] a; | |
| 620 | + | |
| 621 | + 2. At the beginning of a line for slice initialisers:: | |
| 622 | + | |
| 623 | + [0...10] = 5, | |
| 624 | + | |
| 625 | + 3. Inside a curly brace:: | |
| 626 | + | |
| 627 | + = { [0...10] = 5 } | |
| 628 | + | |
| 629 | + **CODE_INDENT** | |
| 630 | + Code indent should use tabs instead of spaces. | |
| 631 | + Outside of comments, documentation and Kconfig, | |
| 632 | + spaces are never used for indentation. | |
| 633 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation | |
| 634 | + | |
| 635 | + **CONCATENATED_STRING** | |
| 636 | + Concatenated elements should have a space in between. | |
| 637 | + Example:: | |
| 638 | + | |
| 639 | + printk(KERN_INFO"bar"); | |
| 640 | + | |
| 641 | + should be:: | |
| 642 | + | |
| 643 | + printk(KERN_INFO "bar"); | |
| 644 | + | |
| 645 | + **ELSE_AFTER_BRACE** | |
| 646 | + `else {` should follow the closing block `}` on the same line. | |
| 647 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces | |
| 648 | + | |
| 649 | + **LINE_SPACING** | |
| 650 | + Vertical space is wasted given the limited number of lines an | |
| 651 | + editor window can display when multiple blank lines are used. | |
| 652 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces | |
| 653 | + | |
| 654 | + **OPEN_BRACE** | |
| 655 | + The opening brace should be following the function definitions on the | |
| 656 | + next line. For any non-functional block it should be on the same line | |
| 657 | + as the last construct. | |
| 658 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces | |
| 659 | + | |
| 660 | + **POINTER_LOCATION** | |
| 661 | + When using pointer data or a function that returns a pointer type, | |
| 662 | + the preferred use of * is adjacent to the data name or function name | |
| 663 | + and not adjacent to the type name. | |
| 664 | + Examples:: | |
| 665 | + | |
| 666 | + char *linux_banner; | |
| 667 | + unsigned long long memparse(char *ptr, char **retptr); | |
| 668 | + char *match_strdup(substring_t *s); | |
| 669 | + | |
| 670 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces | |
| 671 | + | |
| 672 | + **SPACING** | |
| 673 | + Whitespace style used in the kernel sources is described in kernel docs. | |
| 674 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces | |
| 675 | + | |
| 676 | + **SWITCH_CASE_INDENT_LEVEL** | |
| 677 | + switch should be at the same indent as case. | |
| 678 | + Example:: | |
| 679 | + | |
| 680 | + switch (suffix) { | |
| 681 | + case 'G': | |
| 682 | + case 'g': | |
| 683 | + mem <<= 30; | |
| 684 | + break; | |
| 685 | + case 'M': | |
| 686 | + case 'm': | |
| 687 | + mem <<= 20; | |
| 688 | + break; | |
| 689 | + case 'K': | |
| 690 | + case 'k': | |
| 691 | + mem <<= 10; | |
| 692 | + /* fall through */ | |
| 693 | + default: | |
| 694 | + break; | |
| 695 | + } | |
| 696 | + | |
| 697 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#indentation | |
| 698 | + | |
| 699 | + **TRAILING_WHITESPACE** | |
| 700 | + Trailing whitespace should always be removed. | |
| 701 | + Some editors highlight the trailing whitespace and cause visual | |
| 702 | + distractions when editing files. | |
| 703 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#spaces | |
| 704 | + | |
| 705 | + **WHILE_AFTER_BRACE** | |
| 706 | + while should follow the closing bracket on the same line:: | |
| 707 | + | |
| 708 | + do { | |
| 709 | + ... | |
| 710 | + } while(something); | |
| 711 | + | |
| 712 | + See: https://www.kernel.org/doc/html/latest/process/coding-style.html#placing-braces-and-spaces | |
| 713 | + | |
| 714 | + | |
| 715 | +Others | |
| 716 | +------ | |
| 717 | + | |
| 718 | + **CONFIG_DESCRIPTION** | |
| 719 | + Kconfig symbols should have a help text which fully describes | |
| 720 | + it. | |
| 721 | + | |
| 722 | + **CORRUPTED_PATCH** | |
| 723 | + The patch seems to be corrupted or lines are wrapped. | |
| 724 | + Please regenerate the patch file before sending it to the maintainer. | |
| 725 | + | |
| 726 | + **DOS_LINE_ENDINGS** | |
| 727 | + For DOS-formatted patches, there are extra ^M symbols at the end of | |
| 728 | + the line. These should be removed. | |
| 729 | + | |
| 730 | + **EXECUTE_PERMISSIONS** | |
| 731 | + There is no reason for source files to be executable. The executable | |
| 732 | + bit can be removed safely. | |
| 733 | + | |
| 734 | + **NON_OCTAL_PERMISSIONS** | |
| 735 | + Permission bits should use 4 digit octal permissions (like 0700 or 0444). | |
| 736 | + Avoid using any other base like decimal. | |
| 737 | + | |
| 738 | + **NOT_UNIFIED_DIFF** | |
| 739 | + The patch file does not appear to be in unified-diff format. Please | |
| 740 | + regenerate the patch file before sending it to the maintainer. | |
| 741 | + | |
| 742 | + **PRINTF_0XDECIMAL** | |
| 743 | + Prefixing 0x with decimal output is defective and should be corrected. | |
| 744 | + | |
| 745 | + **TRAILING_STATEMENTS** | |
| 746 | + Trailing statements (for example after any conditional) should be | |
| 747 | + on the next line. | |
| 748 | + Like:: | |
| 749 | + | |
| 750 | + if (x == y) break; | |
| 751 | + | |
| 752 | + should be:: | |
| 753 | + | |
| 754 | + if (x == y) | |
| 755 | + break; | |
| @@ -124,6 +124,8 @@ box for setups where kernels are built and run on the same machine. In · 123 unmodified lines | ||
| 124 | 124 | cases where the kernel runs on a separate machine, special preparations |
| 125 | 125 | must be made, depending on where the gcov tool is used: |
| 126 | 126 | |
| 127 | +.. _gcov-test: | |
| 128 | + | |
| 127 | 129 | a) gcov is run on the TEST machine |
| 128 | 130 | |
| 129 | 131 | The gcov tool version on the test machine must be compatible with the |
| @@ -143,6 +145,8 @@ a) gcov is run on the TEST machine · 13 unmodified lines | ||
| 143 | 145 | machine. If any of the path components is symbolic link, the actual |
| 144 | 146 | directory needs to be used instead (due to make's CURDIR handling). |
| 145 | 147 | |
| 148 | +.. _gcov-build: | |
| 149 | + | |
| 146 | 150 | b) gcov is run on the BUILD machine |
| 147 | 151 | |
| 148 | 152 | The following files need to be copied after each test case from test |
| @@ -211,7 +215,7 @@ Appendix A: gather_on_build.sh · 62 unmodified lines | ||
| 211 | 215 | ------------------------------ |
| 212 | 216 | |
| 213 | 217 | Sample script to gather coverage meta files on the build machine |
| 214 | −(see 6a): | |
| 218 | +(see :ref:`Separated build and test machines a. <gcov-test>`): | |
| 215 | 219 | |
| 216 | 220 | .. code-block:: sh |
| 217 | 221 | |
| @@ -244,7 +248,7 @@ Appendix B: gather_on_test.sh · 26 unmodified lines | ||
| 244 | 248 | ----------------------------- |
| 245 | 249 | |
| 246 | 250 | Sample script to gather coverage data files on the test machine |
| 247 | −(see 6b): | |
| 251 | +(see :ref:`Separated build and test machines b. <gcov-build>`): | |
| 248 | 252 | |
| 249 | 253 | .. code-block:: sh |
| 250 | 254 | |
| @@ -114,7 +114,7 @@ Examples of using the Linux-provided gdb helpers · 113 unmodified lines | ||
| 114 | 114 | [ 0.000000] BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] reserved |
| 115 | 115 | .... |
| 116 | 116 | |
| 117 | −- Examine fields of the current task struct:: | |
| 117 | +- Examine fields of the current task struct(supported by x86 and arm64 only):: | |
| 118 | 118 | |
| 119 | 119 | (gdb) p $lx_current().pid |
| 120 | 120 | $1 = 4998 |
| @@ -7,6 +7,9 @@ be used to work on the kernel. For now, the documents have been pulled · 6 unmodified lines | ||
| 7 | 7 | together without any significant effort to integrate them into a coherent |
| 8 | 8 | whole; patches welcome! |
| 9 | 9 | |
| 10 | +A brief overview of testing-specific tools can be found in | |
| 11 | +Documentation/dev-tools/testing-overview.rst | |
| 12 | + | |
| 10 | 13 | .. class:: toc-title |
| 11 | 14 | |
| 12 | 15 | Table of contents |
| @@ -14,6 +17,8 @@ whole; patches welcome! · 1 unmodified line | ||
| 14 | 17 | .. toctree:: |
| 15 | 18 | :maxdepth: 2 |
| 16 | 19 | |
| 20 | + testing-overview | |
| 21 | + checkpatch | |
| 17 | 22 | coccinelle |
| 18 | 23 | sparse |
| 19 | 24 | kcov |
| @@ -11,46 +11,56 @@ designed to find out-of-bound and use-after-free bugs. KASAN has three modes: · 10 unmodified lines | ||
| 11 | 11 | 2. software tag-based KASAN (similar to userspace HWASan), |
| 12 | 12 | 3. hardware tag-based KASAN (based on hardware memory tagging). |
| 13 | 13 | |
| 14 | −Software KASAN modes (1 and 2) use compile-time instrumentation to insert | |
| 15 | −validity checks before every memory access, and therefore require a compiler | |
| 14 | +Generic KASAN is mainly used for debugging due to a large memory overhead. | |
| 15 | +Software tag-based KASAN can be used for dogfood testing as it has a lower | |
| 16 | +memory overhead that allows using it with real workloads. Hardware tag-based | |
| 17 | +KASAN comes with low memory and performance overheads and, therefore, can be | |
| 18 | +used in production. Either as an in-field memory bug detector or as a security | |
| 19 | +mitigation. | |
| 20 | + | |
| 21 | +Software KASAN modes (#1 and #2) use compile-time instrumentation to insert | |
| 22 | +validity checks before every memory access and, therefore, require a compiler | |
| 16 | 23 | version that supports that. |
| 17 | 24 | |
| 18 | −Generic KASAN is supported in both GCC and Clang. With GCC it requires version | |
| 25 | +Generic KASAN is supported in GCC and Clang. With GCC, it requires version | |
| 19 | 26 | 8.3.0 or later. Any supported Clang version is compatible, but detection of |
| 20 | 27 | out-of-bounds accesses for global variables is only supported since Clang 11. |
| 21 | 28 | |
| 22 | −Tag-based KASAN is only supported in Clang. | |
| 29 | +Software tag-based KASAN mode is only supported in Clang. | |
| 23 | 30 | |
| 24 | −Currently generic KASAN is supported for the x86_64, arm, arm64, xtensa, s390 | |
| 31 | +The hardware KASAN mode (#3) relies on hardware to perform the checks but | |
| 32 | +still requires a compiler version that supports memory tagging instructions. | |
| 33 | +This mode is supported in GCC 10+ and Clang 11+. | |
| 34 | + | |
| 35 | +Both software KASAN modes work with SLUB and SLAB memory allocators, | |
| 36 | +while the hardware tag-based KASAN currently only supports SLUB. | |
| 37 | + | |
| 38 | +Currently, generic KASAN is supported for the x86_64, arm, arm64, xtensa, s390, | |
| 25 | 39 | and riscv architectures, and tag-based KASAN modes are supported only for arm64. |
| 26 | 40 | |
| 27 | 41 | Usage |
| 28 | 42 | ----- |
| 29 | 43 | |
| 30 | −To enable KASAN configure kernel with:: | |
| 31 | − | |
| 32 | − CONFIG_KASAN = y | |
| 33 | − | |
| 34 | −and choose between CONFIG_KASAN_GENERIC (to enable generic KASAN), | |
| 35 | −CONFIG_KASAN_SW_TAGS (to enable software tag-based KASAN), and | |
| 36 | −CONFIG_KASAN_HW_TAGS (to enable hardware tag-based KASAN). | |
| 44 | +To enable KASAN, configure the kernel with:: | |
| 37 | 45 | |
| 38 | −For software modes, you also need to choose between CONFIG_KASAN_OUTLINE and | |
| 39 | −CONFIG_KASAN_INLINE. Outline and inline are compiler instrumentation types. | |
| 40 | −The former produces smaller binary while the latter is 1.1 - 2 times faster. | |
| 46 | + CONFIG_KASAN=y | |
| 41 | 47 | |
| 42 | −Both software KASAN modes work with both SLUB and SLAB memory allocators, | |
| 43 | −while the hardware tag-based KASAN currently only support SLUB. | |
| 48 | +and choose between ``CONFIG_KASAN_GENERIC`` (to enable generic KASAN), | |
| 49 | +``CONFIG_KASAN_SW_TAGS`` (to enable software tag-based KASAN), and | |
| 50 | +``CONFIG_KASAN_HW_TAGS`` (to enable hardware tag-based KASAN). | |
| 44 | 51 | |
| 45 | −For better error reports that include stack traces, enable CONFIG_STACKTRACE. | |
| 52 | +For software modes, also choose between ``CONFIG_KASAN_OUTLINE`` and | |
| 53 | +``CONFIG_KASAN_INLINE``. Outline and inline are compiler instrumentation types. | |
| 54 | +The former produces a smaller binary while the latter is 1.1-2 times faster. | |
| 46 | 55 | |
| 47 | −To augment reports with last allocation and freeing stack of the physical page, | |
| 48 | −it is recommended to enable also CONFIG_PAGE_OWNER and boot with page_owner=on. | |
| 56 | +To include alloc and free stack traces of affected slab objects into reports, | |
| 57 | +enable ``CONFIG_STACKTRACE``. To include alloc and free stack traces of affected | |
| 58 | +physical pages, enable ``CONFIG_PAGE_OWNER`` and boot with ``page_owner=on``. | |
| 49 | 59 | |
| 50 | 60 | Error reports |
| 51 | 61 | ~~~~~~~~~~~~~ |
| 52 | 62 | |
| 53 | −A typical out-of-bounds access generic KASAN report looks like this:: | |
| 63 | +A typical KASAN report looks like this:: | |
| 54 | 64 | |
| 55 | 65 | ================================================================== |
| 56 | 66 | BUG: KASAN: slab-out-of-bounds in kmalloc_oob_right+0xa8/0xbc [test_kasan] |
| @@ -123,68 +133,75 @@ A typical out-of-bounds access generic KASAN report looks like this:: · 66 unmodified lines | ||
| 123 | 133 | ffff8801f44ec400: fb fb fb fb fb fb fb fb fc fc fc fc fc fc fc fc |
| 124 | 134 | ================================================================== |
| 125 | 135 | |
| 126 | −The header of the report provides a short summary of what kind of bug happened | |
| 127 | −and what kind of access caused it. It's followed by a stack trace of the bad | |
| 128 | −access, a stack trace of where the accessed memory was allocated (in case bad | |
| 129 | −access happens on a slab object), and a stack trace of where the object was | |
| 130 | −freed (in case of a use-after-free bug report). Next comes a description of | |
| 131 | −the accessed slab object and information about the accessed memory page. | |
| 136 | +The report header summarizes what kind of bug happened and what kind of access | |
| 137 | +caused it. It is followed by a stack trace of the bad access, a stack trace of | |
| 138 | +where the accessed memory was allocated (in case a slab object was accessed), | |
| 139 | +and a stack trace of where the object was freed (in case of a use-after-free | |
| 140 | +bug report). Next comes a description of the accessed slab object and the | |
| 141 | +information about the accessed memory page. | |
| 132 | 142 | |
| 133 | −In the last section the report shows memory state around the accessed address. | |
| 134 | −Internally KASAN tracks memory state separately for each memory granule, which | |
| 143 | +In the end, the report shows the memory state around the accessed address. | |
| 144 | +Internally, KASAN tracks memory state separately for each memory granule, which | |
| 135 | 145 | is either 8 or 16 aligned bytes depending on KASAN mode. Each number in the |
| 136 | 146 | memory state section of the report shows the state of one of the memory |
| 137 | 147 | granules that surround the accessed address. |
| 138 | 148 | |
| 139 | −For generic KASAN the size of each memory granule is 8. The state of each | |
| 149 | +For generic KASAN, the size of each memory granule is 8. The state of each | |
| 140 | 150 | granule is encoded in one shadow byte. Those 8 bytes can be accessible, |
| 141 | −partially accessible, freed or be a part of a redzone. KASAN uses the following | |
| 142 | −encoding for each shadow byte: 0 means that all 8 bytes of the corresponding | |
| 151 | +partially accessible, freed, or be a part of a redzone. KASAN uses the following | |
| 152 | +encoding for each shadow byte: 00 means that all 8 bytes of the corresponding | |
| 143 | 153 | memory region are accessible; number N (1 <= N <= 7) means that the first N |
| 144 | 154 | bytes are accessible, and other (8 - N) bytes are not; any negative value |
| 145 | 155 | indicates that the entire 8-byte word is inaccessible. KASAN uses different |
| 146 | 156 | negative values to distinguish between different kinds of inaccessible memory |
| 147 | 157 | like redzones or freed memory (see mm/kasan/kasan.h). |
| 148 | 158 | |
| 149 | −In the report above the arrows point to the shadow byte 03, which means that | |
| 150 | −the accessed address is partially accessible. For tag-based KASAN modes this | |
| 151 | −last report section shows the memory tags around the accessed address | |
| 152 | −(see the `Implementation details`_ section). | |
| 159 | +In the report above, the arrow points to the shadow byte ``03``, which means | |
| 160 | +that the accessed address is partially accessible. | |
| 161 | + | |
| 162 | +For tag-based KASAN modes, this last report section shows the memory tags around | |
| 163 | +the accessed address (see the `Implementation details`_ section). | |
| 164 | + | |
| 165 | +Note that KASAN bug titles (like ``slab-out-of-bounds`` or ``use-after-free``) | |
| 166 | +are best-effort: KASAN prints the most probable bug type based on the limited | |
| 167 | +information it has. The actual type of the bug might be different. | |
| 168 | + | |
| 169 | +Generic KASAN also reports up to two auxiliary call stack traces. These stack | |
| 170 | +traces point to places in code that interacted with the object but that are not | |
| 171 | +directly present in the bad access stack trace. Currently, this includes | |
| 172 | +call_rcu() and workqueue queuing. | |
| 153 | 173 | |
| 154 | 174 | Boot parameters |
| 155 | 175 | ~~~~~~~~~~~~~~~ |
| 156 | 176 | |
| 177 | +KASAN is affected by the generic ``panic_on_warn`` command line parameter. | |
| 178 | +When it is enabled, KASAN panics the kernel after printing a bug report. | |
| 179 | + | |
| 180 | +By default, KASAN prints a bug report only for the first invalid memory access. | |
| 181 | +With ``kasan_multi_shot``, KASAN prints a report on every invalid access. This | |
| 182 | +effectively disables ``panic_on_warn`` for KASAN reports. | |
| 183 | + | |
| 157 | 184 | Hardware tag-based KASAN mode (see the section about various modes below) is |
| 158 | 185 | intended for use in production as a security mitigation. Therefore, it supports |
| 159 | −boot parameters that allow to disable KASAN competely or otherwise control | |
| 160 | −particular KASAN features. | |
| 186 | +boot parameters that allow disabling KASAN or controlling its features. | |
| 161 | 187 | |
| 162 | 188 | - ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``). |
| 163 | 189 | |
| 190 | +- ``kasan.mode=sync`` or ``=async`` controls whether KASAN is configured in | |
| 191 | + synchronous or asynchronous mode of execution (default: ``sync``). | |
| 192 | + Synchronous mode: a bad access is detected immediately when a tag | |
| 193 | + check fault occurs. | |
| 194 | + Asynchronous mode: a bad access detection is delayed. When a tag check | |
| 195 | + fault occurs, the information is stored in hardware (in the TFSR_EL1 | |
| 196 | + register for arm64). The kernel periodically checks the hardware and | |
| 197 | + only reports tag faults during these checks. | |
| 198 | + | |
| 164 | 199 | - ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack |
| 165 | 200 | traces collection (default: ``on``). |
| 166 | 201 | |
| 167 | 202 | - ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN |
| 168 | − report or also panic the kernel (default: ``report``). Note, that tag | |
| 169 | − checking gets disabled after the first reported bug. | |
| 170 | − | |
| 171 | −For developers | |
| 172 | −~~~~~~~~~~~~~~ | |
| 173 | − | |
| 174 | −Software KASAN modes use compiler instrumentation to insert validity checks. | |
| 175 | −Such instrumentation might be incompatible with some part of the kernel, and | |
| 176 | −therefore needs to be disabled. To disable instrumentation for specific files | |
| 177 | −or directories, add a line similar to the following to the respective kernel | |
| 178 | −Makefile: | |
| 179 | − | |
| 180 | −- For a single file (e.g. main.o):: | |
| 181 | − | |
| 182 | − KASAN_SANITIZE_main.o := n | |
| 183 | − | |
| 184 | −- For all files in one directory:: | |
| 185 | − | |
| 186 | − KASAN_SANITIZE := n | |
| 187 | − | |
| 203 | + report or also panic the kernel (default: ``report``). The panic happens even | |
| 204 | + if ``kasan_multi_shot`` is enabled. | |
| 188 | 205 | |
| 189 | 206 | Implementation details |
| 190 | 207 | ---------------------- |
| @@ -192,12 +209,11 @@ Implementation details · 1 unmodified line | ||
| 192 | 209 | Generic KASAN |
| 193 | 210 | ~~~~~~~~~~~~~ |
| 194 | 211 | |
| 195 | −From a high level perspective, KASAN's approach to memory error detection is | |
| 196 | −similar to that of kmemcheck: use shadow memory to record whether each byte of | |
| 197 | −memory is safe to access, and use compile-time instrumentation to insert checks | |
| 198 | −of shadow memory on each memory access. | |
| 212 | +Software KASAN modes use shadow memory to record whether each byte of memory is | |
| 213 | +safe to access and use compile-time instrumentation to insert shadow memory | |
| 214 | +checks before each memory access. | |
| 199 | 215 | |
| 200 | −Generic KASAN dedicates 1/8th of kernel memory to its shadow memory (e.g. 16TB | |
| 216 | +Generic KASAN dedicates 1/8th of kernel memory to its shadow memory (16TB | |
| 201 | 217 | to cover 128TB on x86_64) and uses direct mapping with a scale and offset to |
| 202 | 218 | translate a memory address to its corresponding shadow address. |
| 203 | 219 | |
| @@ -206,113 +222,105 @@ address:: · 2 unmodified lines | ||
| 206 | 222 | |
| 207 | 223 | static inline void *kasan_mem_to_shadow(const void *addr) |
| 208 | 224 | { |
| 209 | − return ((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT) | |
| 225 | + return (void *)((unsigned long)addr >> KASAN_SHADOW_SCALE_SHIFT) | |
| 210 | 226 | + KASAN_SHADOW_OFFSET; |
| 211 | 227 | } |
| 212 | 228 | |
| 213 | 229 | where ``KASAN_SHADOW_SCALE_SHIFT = 3``. |
| 214 | 230 | |
| 215 | 231 | Compile-time instrumentation is used to insert memory access checks. Compiler |
| 216 | −inserts function calls (__asan_load*(addr), __asan_store*(addr)) before each | |
| 217 | −memory access of size 1, 2, 4, 8 or 16. These functions check whether memory | |
| 218 | −access is valid or not by checking corresponding shadow memory. | |
| 219 | − | |
| 220 | −GCC 5.0 has possibility to perform inline instrumentation. Instead of making | |
| 221 | −function calls GCC directly inserts the code to check the shadow memory. | |
| 222 | −This option significantly enlarges kernel but it gives x1.1-x2 performance | |
| 223 | −boost over outline instrumented kernel. | |
| 232 | +inserts function calls (``__asan_load*(addr)``, ``__asan_store*(addr)``) before | |
| 233 | +each memory access of size 1, 2, 4, 8, or 16. These functions check whether | |
| 234 | +memory accesses are valid or not by checking corresponding shadow memory. | |
| 224 | 235 | |
| 225 | −Generic KASAN also reports the last 2 call stacks to creation of work that | |
| 226 | −potentially has access to an object. Call stacks for the following are shown: | |
| 227 | −call_rcu() and workqueue queuing. | |
| 236 | +With inline instrumentation, instead of making function calls, the compiler | |
| 237 | +directly inserts the code to check shadow memory. This option significantly | |
| 238 | +enlarges the kernel, but it gives an x1.1-x2 performance boost over the | |
| 239 | +outline-instrumented kernel. | |
| 228 | 240 | |
| 229 | −Generic KASAN is the only mode that delays the reuse of freed object via | |
| 241 | +Generic KASAN is the only mode that delays the reuse of freed objects via | |
| 230 | 242 | quarantine (see mm/kasan/quarantine.c for implementation). |
| 231 | 243 | |
| 232 | 244 | Software tag-based KASAN |
| 233 | 245 | ~~~~~~~~~~~~~~~~~~~~~~~~ |
| 234 | 246 | |
| 235 | −Software tag-based KASAN requires software memory tagging support in the form | |
| 236 | −of HWASan-like compiler instrumentation (see HWASan documentation for details). | |
| 237 | − | |
| 238 | −Software tag-based KASAN is currently only implemented for arm64 architecture. | |
| 247 | +Software tag-based KASAN uses a software memory tagging approach to checking | |
| 248 | +access validity. It is currently only implemented for the arm64 architecture. | |
| 239 | 249 | |
| 240 | 250 | Software tag-based KASAN uses the Top Byte Ignore (TBI) feature of arm64 CPUs |
| 241 | −to store a pointer tag in the top byte of kernel pointers. Like generic KASAN | |
| 242 | −it uses shadow memory to store memory tags associated with each 16-byte memory | |
| 243 | −cell (therefore it dedicates 1/16th of the kernel memory for shadow memory). | |
| 251 | +to store a pointer tag in the top byte of kernel pointers. It uses shadow memory | |
| 252 | +to store memory tags associated with each 16-byte memory cell (therefore, it | |
| 253 | +dedicates 1/16th of the kernel memory for shadow memory). | |
| 244 | 254 | |
| 245 | −On each memory allocation software tag-based KASAN generates a random tag, tags | |
| 246 | −the allocated memory with this tag, and embeds this tag into the returned | |
| 255 | +On each memory allocation, software tag-based KASAN generates a random tag, tags | |
| 256 | +the allocated memory with this tag, and embeds the same tag into the returned | |
| 247 | 257 | pointer. |
| 248 | 258 | |
| 249 | 259 | Software tag-based KASAN uses compile-time instrumentation to insert checks |
| 250 | −before each memory access. These checks make sure that tag of the memory that | |
| 251 | −is being accessed is equal to tag of the pointer that is used to access this | |
| 252 | −memory. In case of a tag mismatch software tag-based KASAN prints a bug report. | |
| 260 | +before each memory access. These checks make sure that the tag of the memory | |
| 261 | +that is being accessed is equal to the tag of the pointer that is used to access | |
| 262 | +this memory. In case of a tag mismatch, software tag-based KASAN prints a bug | |
| 263 | +report. | |
| 253 | 264 | |
| 254 | −Software tag-based KASAN also has two instrumentation modes (outline, that | |
| 255 | −emits callbacks to check memory accesses; and inline, that performs the shadow | |
| 265 | +Software tag-based KASAN also has two instrumentation modes (outline, which | |
| 266 | +emits callbacks to check memory accesses; and inline, which performs the shadow | |
| 256 | 267 | memory checks inline). With outline instrumentation mode, a bug report is |
| 257 | −simply printed from the function that performs the access check. With inline | |
| 258 | −instrumentation a brk instruction is emitted by the compiler, and a dedicated | |
| 259 | −brk handler is used to print bug reports. | |
| 268 | +printed from the function that performs the access check. With inline | |
| 269 | +instrumentation, a ``brk`` instruction is emitted by the compiler, and a | |
| 270 | +dedicated ``brk`` handler is used to print bug reports. | |
| 260 | 271 | |
| 261 | 272 | Software tag-based KASAN uses 0xFF as a match-all pointer tag (accesses through |
| 262 | −pointers with 0xFF pointer tag aren't checked). The value 0xFE is currently | |
| 273 | +pointers with the 0xFF pointer tag are not checked). The value 0xFE is currently | |
| 263 | 274 | reserved to tag freed memory regions. |
| 264 | 275 | |
| 265 | −Software tag-based KASAN currently only supports tagging of | |
| 266 | −kmem_cache_alloc/kmalloc and page_alloc memory. | |
| 276 | +Software tag-based KASAN currently only supports tagging of slab and page_alloc | |
| 277 | +memory. | |
| 267 | 278 | |
| 268 | 279 | Hardware tag-based KASAN |
| 269 | 280 | ~~~~~~~~~~~~~~~~~~~~~~~~ |
| 270 | 281 | |
| 271 | −Hardware tag-based KASAN is similar to the software mode in concept, but uses | |
| 282 | +Hardware tag-based KASAN is similar to the software mode in concept but uses | |
| 272 | 283 | hardware memory tagging support instead of compiler instrumentation and |
| 273 | 284 | shadow memory. |
| 274 | 285 | |
| 275 | 286 | Hardware tag-based KASAN is currently only implemented for arm64 architecture |
| 276 | 287 | and based on both arm64 Memory Tagging Extension (MTE) introduced in ARMv8.5 |
| 277 | −Instruction Set Architecture, and Top Byte Ignore (TBI). | |
| 288 | +Instruction Set Architecture and Top Byte Ignore (TBI). | |
| 278 | 289 | |
| 279 | 290 | Special arm64 instructions are used to assign memory tags for each allocation. |
| 280 | 291 | Same tags are assigned to pointers to those allocations. On every memory |
| 281 | −access, hardware makes sure that tag of the memory that is being accessed is | |
| 282 | −equal to tag of the pointer that is used to access this memory. In case of a | |
| 283 | −tag mismatch a fault is generated and a report is printed. | |
| 292 | +access, hardware makes sure that the tag of the memory that is being accessed is | |
| 293 | +equal to the tag of the pointer that is used to access this memory. In case of a | |
| 294 | +tag mismatch, a fault is generated, and a report is printed. | |
| 284 | 295 | |
| 285 | 296 | Hardware tag-based KASAN uses 0xFF as a match-all pointer tag (accesses through |
| 286 | −pointers with 0xFF pointer tag aren't checked). The value 0xFE is currently | |
| 297 | +pointers with the 0xFF pointer tag are not checked). The value 0xFE is currently | |
| 287 | 298 | reserved to tag freed memory regions. |
| 288 | 299 | |
| 289 | −Hardware tag-based KASAN currently only supports tagging of | |
| 290 | −kmem_cache_alloc/kmalloc and page_alloc memory. | |
| 300 | +Hardware tag-based KASAN currently only supports tagging of slab and page_alloc | |
| 301 | +memory. | |
| 291 | 302 | |
| 292 | −If the hardware doesn't support MTE (pre ARMv8.5), hardware tag-based KASAN | |
| 293 | −won't be enabled. In this case all boot parameters are ignored. | |
| 303 | +If the hardware does not support MTE (pre ARMv8.5), hardware tag-based KASAN | |
| 304 | +will not be enabled. In this case, all KASAN boot parameters are ignored. | |
| 294 | 305 | |
| 295 | −Note, that enabling CONFIG_KASAN_HW_TAGS always results in in-kernel TBI being | |
| 296 | −enabled. Even when kasan.mode=off is provided, or when the hardware doesn't | |
| 306 | +Note that enabling CONFIG_KASAN_HW_TAGS always results in in-kernel TBI being | |
| 307 | +enabled. Even when ``kasan.mode=off`` is provided or when the hardware does not | |
| 297 | 308 | support MTE (but supports TBI). |
| 298 | 309 | |
| 299 | −Hardware tag-based KASAN only reports the first found bug. After that MTE tag | |
| 310 | +Hardware tag-based KASAN only reports the first found bug. After that, MTE tag | |
| 300 | 311 | checking gets disabled. |
| 301 | 312 | |
| 302 | −What memory accesses are sanitised by KASAN? | |
| 303 | −-------------------------------------------- | |
| 313 | +Shadow memory | |
| 314 | +------------- | |
| 304 | 315 | |
| 305 | −The kernel maps memory in a number of different parts of the address | |
| 306 | −space. This poses something of a problem for KASAN, which requires | |
| 307 | −that all addresses accessed by instrumented code have a valid shadow | |
| 308 | −region. | |
| 316 | +The kernel maps memory in several different parts of the address space. | |
| 317 | +The range of kernel virtual addresses is large: there is not enough real | |
| 318 | +memory to support a real shadow region for every address that could be | |
| 319 | +accessed by the kernel. Therefore, KASAN only maps real shadow for certain | |
| 320 | +parts of the address space. | |
| 309 | 321 | |
| 310 | −The range of kernel virtual addresses is large: there is not enough | |
| 311 | −real memory to support a real shadow region for every address that | |
| 312 | −could be accessed by the kernel. | |
| 313 | − | |
| 314 | −By default | |
| 315 | −~~~~~~~~~~ | |
| 322 | +Default behaviour | |
| 323 | +~~~~~~~~~~~~~~~~~ | |
| 316 | 324 | |
| 317 | 325 | By default, architectures only map real memory over the shadow region |
| 318 | 326 | for the linear mapping (and potentially other small areas). For all |
| @@ -321,10 +329,9 @@ page is mapped over the shadow area. This read-only shadow page · 2 unmodified lines | ||
| 321 | 329 | declares all memory accesses as permitted. |
| 322 | 330 | |
| 323 | 331 | This presents a problem for modules: they do not live in the linear |
| 324 | −mapping, but in a dedicated module space. By hooking in to the module | |
| 325 | −allocator, KASAN can temporarily map real shadow memory to cover | |
| 326 | −them. This allows detection of invalid accesses to module globals, for | |
| 327 | −example. | |
| 332 | +mapping but in a dedicated module space. By hooking into the module | |
| 333 | +allocator, KASAN temporarily maps real shadow memory to cover them. | |
| 334 | +This allows detection of invalid accesses to module globals, for example. | |
| 328 | 335 | |
| 329 | 336 | This also creates an incompatibility with ``VMAP_STACK``: if the stack |
| 330 | 337 | lives in vmalloc space, it will be shadowed by the read-only page, and |
| @@ -335,9 +342,10 @@ CONFIG_KASAN_VMALLOC · 4 unmodified lines | ||
| 335 | 342 | ~~~~~~~~~~~~~~~~~~~~ |
| 336 | 343 | |
| 337 | 344 | With ``CONFIG_KASAN_VMALLOC``, KASAN can cover vmalloc space at the |
| 338 | −cost of greater memory usage. Currently this is only supported on x86. | |
| 345 | +cost of greater memory usage. Currently, this is supported on x86, | |
| 346 | +riscv, s390, and powerpc. | |
| 339 | 347 | |
| 340 | −This works by hooking into vmalloc and vmap, and dynamically | |
| 348 | +This works by hooking into vmalloc and vmap and dynamically | |
| 341 | 349 | allocating real shadow memory to back the mappings. |
| 342 | 350 | |
| 343 | 351 | Most mappings in vmalloc space are small, requiring less than a full |
| @@ -356,28 +364,76 @@ memory. · 12 unmodified lines | ||
| 356 | 364 | |
| 357 | 365 | To avoid the difficulties around swapping mappings around, KASAN expects |
| 358 | 366 | that the part of the shadow region that covers the vmalloc space will |
| 359 | −not be covered by the early shadow page, but will be left | |
| 360 | −unmapped. This will require changes in arch-specific code. | |
| 367 | +not be covered by the early shadow page but will be left unmapped. | |
| 368 | +This will require changes in arch-specific code. | |
| 361 | 369 | |
| 362 | −This allows ``VMAP_STACK`` support on x86, and can simplify support of | |
| 370 | +This allows ``VMAP_STACK`` support on x86 and can simplify support of | |
| 363 | 371 | architectures that do not have a fixed module region. |
| 364 | 372 | |
| 365 | −CONFIG_KASAN_KUNIT_TEST and CONFIG_KASAN_MODULE_TEST | |
| 366 | −---------------------------------------------------- | |
| 373 | +For developers | |
| 374 | +-------------- | |
| 367 | 375 | |
| 368 | −KASAN tests consist of two parts: | |
| 376 | +Ignoring accesses | |
| 377 | +~~~~~~~~~~~~~~~~~ | |
| 378 | + | |
| 379 | +Software KASAN modes use compiler instrumentation to insert validity checks. | |
| 380 | +Such instrumentation might be incompatible with some parts of the kernel, and | |
| 381 | +therefore needs to be disabled. | |
| 382 | + | |
| 383 | +Other parts of the kernel might access metadata for allocated objects. | |
| 384 | +Normally, KASAN detects and reports such accesses, but in some cases (e.g., | |
| 385 | +in memory allocators), these accesses are valid. | |
| 386 | + | |
| 387 | +For software KASAN modes, to disable instrumentation for a specific file or | |
| 388 | +directory, add a ``KASAN_SANITIZE`` annotation to the respective kernel | |
| 389 | +Makefile: | |
| 390 | + | |
| 391 | +- For a single file (e.g., main.o):: | |
| 392 | + | |
| 393 | + KASAN_SANITIZE_main.o := n | |
| 394 | + | |
| 395 | +- For all files in one directory:: | |
| 396 | + | |
| 397 | + KASAN_SANITIZE := n | |
| 398 | + | |
| 399 | +For software KASAN modes, to disable instrumentation on a per-function basis, | |
| 400 | +use the KASAN-specific ``__no_sanitize_address`` function attribute or the | |
| 401 | +generic ``noinstr`` one. | |
| 402 | + | |
| 403 | +Note that disabling compiler instrumentation (either on a per-file or a | |
| 404 | +per-function basis) makes KASAN ignore the accesses that happen directly in | |
| 405 | +that code for software KASAN modes. It does not help when the accesses happen | |
| 406 | +indirectly (through calls to instrumented functions) or with the hardware | |
| 407 | +tag-based mode that does not use compiler instrumentation. | |
| 408 | + | |
| 409 | +For software KASAN modes, to disable KASAN reports in a part of the kernel code | |
| 410 | +for the current task, annotate this part of the code with a | |
| 411 | +``kasan_disable_current()``/``kasan_enable_current()`` section. This also | |
| 412 | +disables the reports for indirect accesses that happen through function calls. | |
| 413 | + | |
| 414 | +For tag-based KASAN modes (include the hardware one), to disable access | |
| 415 | +checking, use ``kasan_reset_tag()`` or ``page_kasan_tag_reset()``. Note that | |
| 416 | +temporarily disabling access checking via ``page_kasan_tag_reset()`` requires | |
| 417 | +saving and restoring the per-page KASAN tag via | |
| 418 | +``page_kasan_tag``/``page_kasan_tag_set``. | |
| 419 | + | |
| 420 | +Tests | |
| 421 | +~~~~~ | |
| 422 | + | |
| 423 | +There are KASAN tests that allow verifying that KASAN works and can detect | |
| 424 | +certain types of memory corruptions. The tests consist of two parts: | |
| 369 | 425 | |
| 370 | 426 | 1. Tests that are integrated with the KUnit Test Framework. Enabled with |
| 371 | 427 | ``CONFIG_KASAN_KUNIT_TEST``. These tests can be run and partially verified |
| 372 | −automatically in a few different ways, see the instructions below. | |
| 428 | +automatically in a few different ways; see the instructions below. | |
| 373 | 429 | |
| 374 | 430 | 2. Tests that are currently incompatible with KUnit. Enabled with |
| 375 | 431 | ``CONFIG_KASAN_MODULE_TEST`` and can only be run as a module. These tests can |
| 376 | −only be verified manually, by loading the kernel module and inspecting the | |
| 432 | +only be verified manually by loading the kernel module and inspecting the | |
| 377 | 433 | kernel log for KASAN reports. |
| 378 | 434 | |
| 379 | −Each KUnit-compatible KASAN test prints a KASAN report if an error is detected. | |
| 380 | −Then the test prints its number and status. | |
| 435 | +Each KUnit-compatible KASAN test prints one of multiple KASAN reports if an | |
| 436 | +error is detected. Then the test prints its number and status. | |
| 381 | 437 | |
| 382 | 438 | When a test passes:: |
| 383 | 439 | |
| @@ -405,30 +461,24 @@ Or, if one of the tests failed:: · 21 unmodified lines | ||
| 405 | 461 | |
| 406 | 462 | not ok 1 - kasan |
| 407 | 463 | |
| 408 | − | |
| 409 | 464 | There are a few ways to run KUnit-compatible KASAN tests. |
| 410 | 465 | |
| 411 | 466 | 1. Loadable module |
| 412 | −~~~~~~~~~~~~~~~~~~ | |
| 413 | 467 | |
| 414 | −With ``CONFIG_KUNIT`` enabled, ``CONFIG_KASAN_KUNIT_TEST`` can be built as | |
| 415 | −a loadable module and run on any architecture that supports KASAN by loading | |
| 416 | −the module with insmod or modprobe. The module is called ``test_kasan``. | |
| 468 | + With ``CONFIG_KUNIT`` enabled, KASAN-KUnit tests can be built as a loadable | |
| 469 | + module and run by loading ``test_kasan.ko`` with ``insmod`` or ``modprobe``. | |
| 417 | 470 | |
| 418 | 471 | 2. Built-In |
| 419 | −~~~~~~~~~~~ | |
| 420 | 472 | |
| 421 | −With ``CONFIG_KUNIT`` built-in, ``CONFIG_KASAN_KUNIT_TEST`` can be built-in | |
| 422 | −on any architecure that supports KASAN. These and any other KUnit tests enabled | |
| 423 | −will run and print the results at boot as a late-init call. | |
| 473 | + With ``CONFIG_KUNIT`` built-in, KASAN-KUnit tests can be built-in as well. | |
| 474 | + In this case, the tests will run at boot as a late-init call. | |
| 424 | 475 | |
| 425 | 476 | 3. Using kunit_tool |
| 426 | −~~~~~~~~~~~~~~~~~~~ | |
| 427 | 477 | |
| 428 | −With ``CONFIG_KUNIT`` and ``CONFIG_KASAN_KUNIT_TEST`` built-in, it's also | |
| 429 | −possible use ``kunit_tool`` to see the results of these and other KUnit tests | |
| 430 | −in a more readable way. This will not print the KASAN reports of the tests that | |
| 431 | −passed. Use `KUnit documentation <https://www.kernel.org/doc/html/latest/dev-tools/kunit/index.html>`_ | |
| 432 | −for more up-to-date information on ``kunit_tool``. | |
| 478 | + With ``CONFIG_KUNIT`` and ``CONFIG_KASAN_KUNIT_TEST`` built-in, it is also | |
| 479 | + possible to use ``kunit_tool`` to see the results of KUnit tests in a more | |
| 480 | + readable way. This will not print the KASAN reports of the tests that passed. | |
| 481 | + See `KUnit documentation <https://www.kernel.org/doc/html/latest/dev-tools/kunit/index.html>`_ | |
| 482 | + for more up-to-date information on ``kunit_tool``. | |
| 433 | 483 | |
| 434 | 484 | .. _KUnit: https://www.kernel.org/doc/html/latest/dev-tools/kunit/index.html |
| @@ -1,3 +1,6 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | +.. Copyright (C) 2019, Google LLC. | |
| 3 | + | |
| 1 | 4 | The Kernel Concurrency Sanitizer (KCSAN) |
| 2 | 5 | ======================================== |
| 3 | 6 | |
| @@ -239,8 +239,8 @@ using a shell script test runner. ``kselftest/module.sh`` is designed · 238 unmodified lines | ||
| 239 | 239 | to facilitate this process. There is also a header file provided to |
| 240 | 240 | assist writing kernel modules that are for use with kselftest: |
| 241 | 241 | |
| 242 | −- ``tools/testing/kselftest/kselftest_module.h`` | |
| 243 | −- ``tools/testing/kselftest/kselftest/module.sh`` | |
| 242 | +- ``tools/testing/selftests/kselftest_module.h`` | |
| 243 | +- ``tools/testing/selftests/kselftest/module.sh`` | |
| 244 | 244 | |
| 245 | 245 | How to use |
| 246 | 246 | ---------- |
| @@ -78,8 +78,82 @@ Similarly to the above, it can be useful to add test-specific logic. · 77 unmodified lines | ||
| 78 | 78 | void test_only_hook(void) { } |
| 79 | 79 | #endif |
| 80 | 80 | |
| 81 | −TODO(dlatypov@google.com): add an example of using ``current->kunit_test`` in | |
| 82 | −such a hook when it's not only updated for ``CONFIG_KASAN=y``. | |
| 81 | +This test-only code can be made more useful by accessing the current kunit | |
| 82 | +test, see below. | |
| 83 | + | |
| 84 | +Accessing the current test | |
| 85 | +-------------------------- | |
| 86 | + | |
| 87 | +In some cases, you need to call test-only code from outside the test file, e.g. | |
| 88 | +like in the example above or if you're providing a fake implementation of an | |
| 89 | +ops struct. | |
| 90 | +There is a ``kunit_test`` field in ``task_struct``, so you can access it via | |
| 91 | +``current->kunit_test``. | |
| 92 | + | |
| 93 | +Here's a slightly in-depth example of how one could implement "mocking": | |
| 94 | + | |
| 95 | +.. code-block:: c | |
| 96 | + | |
| 97 | + #include <linux/sched.h> /* for current */ | |
| 98 | + | |
| 99 | + struct test_data { | |
| 100 | + int foo_result; | |
| 101 | + int want_foo_called_with; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + static int fake_foo(int arg) | |
| 105 | + { | |
| 106 | + struct kunit *test = current->kunit_test; | |
| 107 | + struct test_data *test_data = test->priv; | |
| 108 | + | |
| 109 | + KUNIT_EXPECT_EQ(test, test_data->want_foo_called_with, arg); | |
| 110 | + return test_data->foo_result; | |
| 111 | + } | |
| 112 | + | |
| 113 | + static void example_simple_test(struct kunit *test) | |
| 114 | + { | |
| 115 | + /* Assume priv is allocated in the suite's .init */ | |
| 116 | + struct test_data *test_data = test->priv; | |
| 117 | + | |
| 118 | + test_data->foo_result = 42; | |
| 119 | + test_data->want_foo_called_with = 1; | |
| 120 | + | |
| 121 | + /* In a real test, we'd probably pass a pointer to fake_foo somewhere | |
| 122 | + * like an ops struct, etc. instead of calling it directly. */ | |
| 123 | + KUNIT_EXPECT_EQ(test, fake_foo(1), 42); | |
| 124 | + } | |
| 125 | + | |
| 126 | + | |
| 127 | +Note: here we're able to get away with using ``test->priv``, but if you wanted | |
| 128 | +something more flexible you could use a named ``kunit_resource``, see :doc:`api/test`. | |
| 129 | + | |
| 130 | +Failing the current test | |
| 131 | +------------------------ | |
| 132 | + | |
| 133 | +But sometimes, you might just want to fail the current test. In that case, we | |
| 134 | +have ``kunit_fail_current_test(fmt, args...)`` which is defined in ``<kunit/test-bug.h>`` and | |
| 135 | +doesn't require pulling in ``<kunit/test.h>``. | |
| 136 | + | |
| 137 | +E.g. say we had an option to enable some extra debug checks on some data structure: | |
| 138 | + | |
| 139 | +.. code-block:: c | |
| 140 | + | |
| 141 | + #include <kunit/test-bug.h> | |
| 142 | + | |
| 143 | + #ifdef CONFIG_EXTRA_DEBUG_CHECKS | |
| 144 | + static void validate_my_data(struct data *data) | |
| 145 | + { | |
| 146 | + if (is_valid(data)) | |
| 147 | + return; | |
| 148 | + | |
| 149 | + kunit_fail_current_test("data %p is invalid", data); | |
| 150 | + | |
| 151 | + /* Normal, non-KUnit, error reporting code here. */ | |
| 152 | + } | |
| 153 | + #else | |
| 154 | + static void my_debug_function(void) { } | |
| 155 | + #endif | |
| 156 | + | |
| 83 | 157 | |
| 84 | 158 | Customizing error messages |
| 85 | 159 | -------------------------- |
| @@ -0,0 +1,117 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +==================== | |
| 4 | +Kernel Testing Guide | |
| 5 | +==================== | |
| 6 | + | |
| 7 | + | |
| 8 | +There are a number of different tools for testing the Linux kernel, so knowing | |
| 9 | +when to use each of them can be a challenge. This document provides a rough | |
| 10 | +overview of their differences, and how they fit together. | |
| 11 | + | |
| 12 | + | |
| 13 | +Writing and Running Tests | |
| 14 | +========================= | |
| 15 | + | |
| 16 | +The bulk of kernel tests are written using either the kselftest or KUnit | |
| 17 | +frameworks. These both provide infrastructure to help make running tests and | |
| 18 | +groups of tests easier, as well as providing helpers to aid in writing new | |
| 19 | +tests. | |
| 20 | + | |
| 21 | +If you're looking to verify the behaviour of the Kernel — particularly specific | |
| 22 | +parts of the kernel — then you'll want to use KUnit or kselftest. | |
| 23 | + | |
| 24 | + | |
| 25 | +The Difference Between KUnit and kselftest | |
| 26 | +------------------------------------------ | |
| 27 | + | |
| 28 | +KUnit (Documentation/dev-tools/kunit/index.rst) is an entirely in-kernel system | |
| 29 | +for "white box" testing: because test code is part of the kernel, it can access | |
| 30 | +internal structures and functions which aren't exposed to userspace. | |
| 31 | + | |
| 32 | +KUnit tests therefore are best written against small, self-contained parts | |
| 33 | +of the kernel, which can be tested in isolation. This aligns well with the | |
| 34 | +concept of 'unit' testing. | |
| 35 | + | |
| 36 | +For example, a KUnit test might test an individual kernel function (or even a | |
| 37 | +single codepath through a function, such as an error handling case), rather | |
| 38 | +than a feature as a whole. | |
| 39 | + | |
| 40 | +This also makes KUnit tests very fast to build and run, allowing them to be | |
| 41 | +run frequently as part of the development process. | |
| 42 | + | |
| 43 | +There is a KUnit test style guide which may give further pointers in | |
| 44 | +Documentation/dev-tools/kunit/style.rst | |
| 45 | + | |
| 46 | + | |
| 47 | +kselftest (Documentation/dev-tools/kselftest.rst), on the other hand, is | |
| 48 | +largely implemented in userspace, and tests are normal userspace scripts or | |
| 49 | +programs. | |
| 50 | + | |
| 51 | +This makes it easier to write more complicated tests, or tests which need to | |
| 52 | +manipulate the overall system state more (e.g., spawning processes, etc.). | |
| 53 | +However, it's not possible to call kernel functions directly from kselftest. | |
| 54 | +This means that only kernel functionality which is exposed to userspace somehow | |
| 55 | +(e.g. by a syscall, device, filesystem, etc.) can be tested with kselftest. To | |
| 56 | +work around this, some tests include a companion kernel module which exposes | |
| 57 | +more information or functionality. If a test runs mostly or entirely within the | |
| 58 | +kernel, however, KUnit may be the more appropriate tool. | |
| 59 | + | |
| 60 | +kselftest is therefore suited well to tests of whole features, as these will | |
| 61 | +expose an interface to userspace, which can be tested, but not implementation | |
| 62 | +details. This aligns well with 'system' or 'end-to-end' testing. | |
| 63 | + | |
| 64 | +For example, all new system calls should be accompanied by kselftest tests. | |
| 65 | + | |
| 66 | +Code Coverage Tools | |
| 67 | +=================== | |
| 68 | + | |
| 69 | +The Linux Kernel supports two different code coverage measurement tools. These | |
| 70 | +can be used to verify that a test is executing particular functions or lines | |
| 71 | +of code. This is useful for determining how much of the kernel is being tested, | |
| 72 | +and for finding corner-cases which are not covered by the appropriate test. | |
| 73 | + | |
| 74 | +:doc:`gcov` is GCC's coverage testing tool, which can be used with the kernel | |
| 75 | +to get global or per-module coverage. Unlike KCOV, it does not record per-task | |
| 76 | +coverage. Coverage data can be read from debugfs, and interpreted using the | |
| 77 | +usual gcov tooling. | |
| 78 | + | |
| 79 | +:doc:`kcov` is a feature which can be built in to the kernel to allow | |
| 80 | +capturing coverage on a per-task level. It's therefore useful for fuzzing and | |
| 81 | +other situations where information about code executed during, for example, a | |
| 82 | +single syscall is useful. | |
| 83 | + | |
| 84 | + | |
| 85 | +Dynamic Analysis Tools | |
| 86 | +====================== | |
| 87 | + | |
| 88 | +The kernel also supports a number of dynamic analysis tools, which attempt to | |
| 89 | +detect classes of issues when they occur in a running kernel. These typically | |
| 90 | +each look for a different class of bugs, such as invalid memory accesses, | |
| 91 | +concurrency issues such as data races, or other undefined behaviour like | |
| 92 | +integer overflows. | |
| 93 | + | |
| 94 | +Some of these tools are listed below: | |
| 95 | + | |
| 96 | +* kmemleak detects possible memory leaks. See | |
| 97 | + Documentation/dev-tools/kmemleak.rst | |
| 98 | +* KASAN detects invalid memory accesses such as out-of-bounds and | |
| 99 | + use-after-free errors. See Documentation/dev-tools/kasan.rst | |
| 100 | +* UBSAN detects behaviour that is undefined by the C standard, like integer | |
| 101 | + overflows. See Documentation/dev-tools/ubsan.rst | |
| 102 | +* KCSAN detects data races. See Documentation/dev-tools/kcsan.rst | |
| 103 | +* KFENCE is a low-overhead detector of memory issues, which is much faster than | |
| 104 | + KASAN and can be used in production. See Documentation/dev-tools/kfence.rst | |
| 105 | +* lockdep is a locking correctness validator. See | |
| 106 | + Documentation/locking/lockdep-design.rst | |
| 107 | +* There are several other pieces of debug instrumentation in the kernel, many | |
| 108 | + of which can be found in lib/Kconfig.debug | |
| 109 | + | |
| 110 | +These tools tend to test the kernel as a whole, and do not "pass" like | |
| 111 | +kselftest or KUnit tests. They can be combined with KUnit or kselftest by | |
| 112 | +running tests on a kernel with these tools enabled: you can then be sure | |
| 113 | +that none of these errors are occurring during the test. | |
| 114 | + | |
| 115 | +Some of these tools integrate with KUnit or kselftest and will | |
| 116 | +automatically fail tests if an issue is detected. | |
| 117 | + | |
| @@ -1,4 +1,4 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | 2 | *.example.dts |
| 3 | −processed-schema*.yaml | |
| 4 | −processed-schema*.json | |
| 3 | +/processed-schema*.yaml | |
| 4 | +/processed-schema*.json | |
| @@ -5,7 +5,7 @@ DT_MK_SCHEMA ?= dt-mk-schema · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | DT_SCHEMA_LINT = $(shell which yamllint) |
| 7 | 7 | |
| 8 | −DT_SCHEMA_MIN_VERSION = 2020.8.1 | |
| 8 | +DT_SCHEMA_MIN_VERSION = 2021.2.1 | |
| 9 | 9 | |
| 10 | 10 | PHONY += check_dtschema_version |
| 11 | 11 | check_dtschema_version: |
| @@ -48,13 +48,16 @@ define rule_chkdt · 36 unmodified lines | ||
| 48 | 48 | $(call cmd,mk_schema) |
| 49 | 49 | endef |
| 50 | 50 | |
| 51 | −DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') | |
| 51 | +DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_cmd))) | |
| 52 | 52 | |
| 53 | 53 | override DTC_FLAGS := \ |
| 54 | 54 | -Wno-avoid_unnecessary_addr_size \ |
| 55 | 55 | -Wno-graph_child_address \ |
| 56 | 56 | -Wno-interrupt_provider |
| 57 | 57 | |
| 58 | +# Disable undocumented compatible checks until warning free | |
| 59 | +override DT_CHECKER_FLAGS ?= | |
| 60 | + | |
| 58 | 61 | $(obj)/processed-schema-examples.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE |
| 59 | 62 | $(call if_changed_rule,chkdt) |
| 60 | 63 | |
| @@ -109,6 +109,7 @@ properties: · 108 unmodified lines | ||
| 109 | 109 | - libretech,aml-s905d-pc |
| 110 | 110 | - phicomm,n1 |
| 111 | 111 | - smartlabs,sml5442tw |
| 112 | + - videostrong,gxl-kii-pro | |
| 112 | 113 | - const: amlogic,s905d |
| 113 | 114 | - const: amlogic,meson-gxl |
| 114 | 115 | |
| @@ -120,8 +121,10 @@ properties: · 5 unmodified lines | ||
| 120 | 121 | - khadas,vim2 |
| 121 | 122 | - kingnovel,r-box-pro |
| 122 | 123 | - libretech,aml-s912-pc |
| 124 | + - minix,neo-u9h | |
| 123 | 125 | - nexbox,a1 |
| 124 | 126 | - tronsmart,vega-s96 |
| 127 | + - videostrong,gxm-kiii-pro | |
| 125 | 128 | - wetek,core2 |
| 126 | 129 | - const: amlogic,s912 |
| 127 | 130 | - const: amlogic,meson-gxm |
| @@ -0,0 +1,64 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/arm/apple.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Apple ARM Machine Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Hector Martin <marcan@marcan.st> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon". | |
| 14 | + | |
| 15 | + This currently includes devices based on the "M1" SoC, starting with the | |
| 16 | + three Mac models released in late 2020: | |
| 17 | + | |
| 18 | + - Mac mini (M1, 2020) | |
| 19 | + - MacBook Pro (13-inch, M1, 2020) | |
| 20 | + - MacBook Air (M1, 2020) | |
| 21 | + | |
| 22 | + The compatible property should follow this format: | |
| 23 | + | |
| 24 | + compatible = "apple,<targettype>", "apple,<socid>", "apple,arm-platform"; | |
| 25 | + | |
| 26 | + <targettype> represents the board/device and comes from the `target-type` | |
| 27 | + property of the root node of the Apple Device Tree, lowercased. It can be | |
| 28 | + queried on macOS using the following command: | |
| 29 | + | |
| 30 | + $ ioreg -d2 -l | grep target-type | |
| 31 | + | |
| 32 | + <socid> is the lowercased SoC ID. Apple uses at least *five* different | |
| 33 | + names for their SoCs: | |
| 34 | + | |
| 35 | + - Marketing name ("M1") | |
| 36 | + - Internal name ("H13G") | |
| 37 | + - Codename ("Tonga") | |
| 38 | + - SoC ID ("T8103") | |
| 39 | + - Package/IC part number ("APL1102") | |
| 40 | + | |
| 41 | + Devicetrees should use the lowercased SoC ID, to avoid confusion if | |
| 42 | + multiple SoCs share the same marketing name. This can be obtained from | |
| 43 | + the `compatible` property of the arm-io node of the Apple Device Tree, | |
| 44 | + which can be queried as follows on macOS: | |
| 45 | + | |
| 46 | + $ ioreg -n arm-io | grep compatible | |
| 47 | + | |
| 48 | +properties: | |
| 49 | + $nodename: | |
| 50 | + const: "/" | |
| 51 | + compatible: | |
| 52 | + oneOf: | |
| 53 | + - description: Apple M1 SoC based platforms | |
| 54 | + items: | |
| 55 | + - enum: | |
| 56 | + - apple,j274 # Mac mini (M1, 2020) | |
| 57 | + - apple,j293 # MacBook Pro (13-inch, M1, 2020) | |
| 58 | + - apple,j313 # MacBook Air (M1, 2020) | |
| 59 | + - const: apple,t8103 | |
| 60 | + - const: apple,arm-platform | |
| 61 | + | |
| 62 | +additionalProperties: true | |
| 63 | + | |
| 64 | +... | |
| @@ -21,6 +21,7 @@ properties: · 20 unmodified lines | ||
| 21 | 21 | items: |
| 22 | 22 | - enum: |
| 23 | 23 | - netgear,r8000p |
| 24 | + - tplink,archer-c2300-v1 | |
| 24 | 25 | - const: brcm,bcm4906 |
| 25 | 26 | - const: brcm,bcm4908 |
| 26 | 27 | |
| @@ -26,10 +26,7 @@ properties: · 25 unmodified lines | ||
| 26 | 26 | - const: simple-mfd |
| 27 | 27 | |
| 28 | 28 | mboxes: |
| 29 | − $ref: '/schemas/types.yaml#/definitions/phandle' | |
| 30 | − description: | | |
| 31 | − Phandle to the firmware device's Mailbox. | |
| 32 | − (See: ../mailbox/mailbox.txt for more information) | |
| 29 | + maxItems: 1 | |
| 33 | 30 | |
| 34 | 31 | clocks: |
| 35 | 32 | type: object |
| @@ -64,6 +61,21 @@ properties: · 28 unmodified lines | ||
| 64 | 61 | - compatible |
| 65 | 62 | - "#reset-cells" |
| 66 | 63 | |
| 64 | + pwm: | |
| 65 | + type: object | |
| 66 | + | |
| 67 | + properties: | |
| 68 | + compatible: | |
| 69 | + const: raspberrypi,firmware-poe-pwm | |
| 70 | + | |
| 71 | + "#pwm-cells": | |
| 72 | + # See pwm.yaml in this directory for a description of the cells format. | |
| 73 | + const: 2 | |
| 74 | + | |
| 75 | + required: | |
| 76 | + - compatible | |
| 77 | + - "#pwm-cells" | |
| 78 | + | |
| 67 | 79 | additionalProperties: false |
| 68 | 80 | |
| 69 | 81 | required: |
| @@ -87,5 +99,10 @@ examples: · 17 unmodified lines | ||
| 87 | 99 | compatible = "raspberrypi,firmware-reset"; |
| 88 | 100 | #reset-cells = <1>; |
| 89 | 101 | }; |
| 102 | + | |
| 103 | + pwm: pwm { | |
| 104 | + compatible = "raspberrypi,firmware-poe-pwm"; | |
| 105 | + #pwm-cells = <2>; | |
| 106 | + }; | |
| 90 | 107 | }; |
| 91 | 108 | ... |
| @@ -85,6 +85,8 @@ properties: · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | compatible: |
| 87 | 87 | enum: |
| 88 | + - apple,icestorm | |
| 89 | + - apple,firestorm | |
| 88 | 90 | - arm,arm710t |
| 89 | 91 | - arm,arm720t |
| 90 | 92 | - arm,arm740t |
| @@ -256,13 +258,11 @@ properties: · 165 unmodified lines | ||
| 256 | 258 | where voltage is in V, frequency is in MHz. |
| 257 | 259 | |
| 258 | 260 | power-domains: |
| 259 | − $ref: '/schemas/types.yaml#/definitions/phandle-array' | |
| 260 | 261 | description: |
| 261 | 262 | List of phandles and PM domain specifiers, as defined by bindings of the |
| 262 | 263 | PM domain provider (see also ../power_domain.txt). |
| 263 | 264 | |
| 264 | 265 | power-domain-names: |
| 265 | − $ref: '/schemas/types.yaml#/definitions/string-array' | |
| 266 | 266 | description: |
| 267 | 267 | A list of power domain name strings sorted in the same order as the |
| 268 | 268 | power-domains property. |
| @@ -0,0 +1,75 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause | |
| 2 | +# Copyright 2021, Arm Ltd | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/arm/ete.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: ARM Embedded Trace Extensions | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Suzuki K Poulose <suzuki.poulose@arm.com> | |
| 12 | + - Mathieu Poirier <mathieu.poirier@linaro.org> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + Arm Embedded Trace Extension(ETE) is a per CPU trace component that | |
| 16 | + allows tracing the CPU execution. It overlaps with the CoreSight ETMv4 | |
| 17 | + architecture and has extended support for future architecture changes. | |
| 18 | + The trace generated by the ETE could be stored via legacy CoreSight | |
| 19 | + components (e.g, TMC-ETR) or other means (e.g, using a per CPU buffer | |
| 20 | + Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to | |
| 21 | + legacy CoreSight components, a node must be listed per instance, along | |
| 22 | + with any optional connection graph as per the coresight bindings. | |
| 23 | + See bindings/arm/coresight.txt. | |
| 24 | + | |
| 25 | +properties: | |
| 26 | + $nodename: | |
| 27 | + pattern: "^ete([0-9a-f]+)$" | |
| 28 | + compatible: | |
| 29 | + items: | |
| 30 | + - const: arm,embedded-trace-extension | |
| 31 | + | |
| 32 | + cpu: | |
| 33 | + description: | | |
| 34 | + Handle to the cpu this ETE is bound to. | |
| 35 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 36 | + | |
| 37 | + out-ports: | |
| 38 | + description: | | |
| 39 | + Output connections from the ETE to legacy CoreSight trace bus. | |
| 40 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 41 | + properties: | |
| 42 | + port: | |
| 43 | + description: Output connection from the ETE to legacy CoreSight Trace bus. | |
| 44 | + $ref: /schemas/graph.yaml#/properties/port | |
| 45 | + | |
| 46 | +required: | |
| 47 | + - compatible | |
| 48 | + - cpu | |
| 49 | + | |
| 50 | +additionalProperties: false | |
| 51 | + | |
| 52 | +examples: | |
| 53 | + | |
| 54 | +# An ETE node without legacy CoreSight connections | |
| 55 | + - | | |
| 56 | + ete0 { | |
| 57 | + compatible = "arm,embedded-trace-extension"; | |
| 58 | + cpu = <&cpu_0>; | |
| 59 | + }; | |
| 60 | +# An ETE node with legacy CoreSight connections | |
| 61 | + - | | |
| 62 | + ete1 { | |
| 63 | + compatible = "arm,embedded-trace-extension"; | |
| 64 | + cpu = <&cpu_1>; | |
| 65 | + | |
| 66 | + out-ports { /* legacy coresight connection */ | |
| 67 | + port { | |
| 68 | + ete1_out_port: endpoint { | |
| 69 | + remote-endpoint = <&funnel_in_port0>; | |
| 70 | + }; | |
| 71 | + }; | |
| 72 | + }; | |
| 73 | + }; | |
| 74 | + | |
| 75 | +... | |
| @@ -617,6 +617,7 @@ properties: · 616 unmodified lines | ||
| 617 | 617 | - kam,imx7d-flex-concentrator # Kamstrup OMNIA Flex Concentrator |
| 618 | 618 | - kam,imx7d-flex-concentrator-mfg # Kamstrup OMNIA Flex Concentrator in manufacturing mode |
| 619 | 619 | - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board |
| 620 | + - remarkable,imx7d-remarkable2 # i.MX7D ReMarkable 2 E-Ink Tablet | |
| 620 | 621 | - technexion,imx7d-pico-dwarf # TechNexion i.MX7D Pico-Dwarf |
| 621 | 622 | - technexion,imx7d-pico-hobbit # TechNexion i.MX7D Pico-Hobbit |
| 622 | 623 | - technexion,imx7d-pico-nymph # TechNexion i.MX7D Pico-Nymph |
| @@ -688,6 +689,14 @@ properties: · 65 unmodified lines | ||
| 688 | 689 | - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module |
| 689 | 690 | - const: fsl,imx8mm |
| 690 | 691 | |
| 692 | + - description: Engicam i.Core MX8M Mini SoM based boards | |
| 693 | + items: | |
| 694 | + - enum: | |
| 695 | + - engicam,icore-mx8mm-ctouch2 # i.MX8MM Engicam i.Core MX8M Mini C.TOUCH 2.0 | |
| 696 | + - engicam,icore-mx8mm-edimm2.2 # i.MX8MM Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit | |
| 697 | + - const: engicam,icore-mx8mm # i.MX8MM Engicam i.Core MX8M Mini SoM | |
| 698 | + - const: fsl,imx8mm | |
| 699 | + | |
| 691 | 700 | - description: Kontron BL i.MX8MM (N801X S) Board |
| 692 | 701 | items: |
| 693 | 702 | - const: kontron,imx8mm-n801x-s |
| @@ -733,6 +742,7 @@ properties: · 39 unmodified lines | ||
| 733 | 742 | - einfochips,imx8mq-thor96 # i.MX8MQ Thor96 Board |
| 734 | 743 | - fsl,imx8mq-evk # i.MX8MQ EVK Board |
| 735 | 744 | - google,imx8mq-phanbell # Google Coral Edge TPU |
| 745 | + - kontron,pitx-imx8m # Kontron pITX-imx8m Board | |
| 736 | 746 | - purism,librem5-devkit # Purism Librem5 devkit |
| 737 | 747 | - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse |
| 738 | 748 | - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk |
| @@ -755,6 +765,12 @@ properties: · 16 unmodified lines | ||
| 755 | 765 | - const: zii,imx8mq-ultra |
| 756 | 766 | - const: fsl,imx8mq |
| 757 | 767 | |
| 768 | + - description: i.MX8QM based Boards | |
| 769 | + items: | |
| 770 | + - enum: | |
| 771 | + - fsl,imx8qm-mek # i.MX8QM MEK Board | |
| 772 | + - const: fsl,imx8qm | |
| 773 | + | |
| 758 | 774 | - description: i.MX8QXP based Boards |
| 759 | 775 | items: |
| 760 | 776 | - enum: |
| @@ -142,8 +142,8 @@ mpp50 50 gpio, ge1(rxclk), mss_i2c(sda), spi1(csn0), uart2(txd), uart0(rxd), xg( · 141 unmodified lines | ||
| 142 | 142 | mpp51 51 gpio, ge1(rxd0), mss_i2c(sck), spi1(csn1), uart2(rxd), uart0(cts), sdio(pwr10) |
| 143 | 143 | mpp52 52 gpio, ge1(rxd1), synce1(clk), synce2(clk), spi1(csn2), uart1(cts), led(clk), pcie(rstoutn), pcie0(clkreq) |
| 144 | 144 | mpp53 53 gpio, ge1(rxd2), ptp(clk), spi1(csn3), uart1(rxd), led(stb), sdio(led) |
| 145 | −mpp54 54 gpio, ge1(rxd3), synce2(clk), ptp(pclk_out), synce1(clk), led(data), sdio(hw_rst), sdio(wr_protect) | |
| 146 | −mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio(card_detect) | |
| 145 | +mpp54 54 gpio, ge1(rxd3), synce2(clk), ptp(pclk_out), synce1(clk), led(data), sdio(hw_rst), sdio_wp(wr_protect) | |
| 146 | +mpp55 55 gpio, ge1(rxctl_rxdv), ptp(pulse), sdio(led), sdio_cd(card_detect) | |
| 147 | 147 | mpp56 56 gpio, tdm(drx), au(i2sdo_spdifo), spi0(clk), uart1(rxd), sata1(present_act), sdio(clk) |
| 148 | 148 | mpp57 57 gpio, mss_i2c(sda), ptp(pclk_out), tdm(intn), au(i2sbclk), spi0(mosi), uart1(txd), sata0(present_act), sdio(cmd) |
| 149 | 149 | mpp58 58 gpio, mss_i2c(sck), ptp(clk), tdm(rstn), au(i2sdi), spi0(miso), uart1(cts), led(clk), sdio(d0) |
| @@ -118,6 +118,10 @@ properties: · 117 unmodified lines | ||
| 118 | 118 | - enum: |
| 119 | 119 | - mediatek,mt8183-evb |
| 120 | 120 | - const: mediatek,mt8183 |
| 121 | + - items: | |
| 122 | + - enum: | |
| 123 | + - mediatek,mt8195-evb | |
| 124 | + - const: mediatek,mt8195 | |
| 121 | 125 | - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) |
| 122 | 126 | items: |
| 123 | 127 | - enum: |
| @@ -125,6 +129,38 @@ properties: · 1 unmodified line | ||
| 125 | 129 | - google,krane-sku176 |
| 126 | 130 | - const: google,krane |
| 127 | 131 | - const: mediatek,mt8183 |
| 132 | + - description: Google Damu (ASUS Chromebook Flip CM3) | |
| 133 | + items: | |
| 134 | + - const: google,damu | |
| 135 | + - const: mediatek,mt8183 | |
| 136 | + - description: Google Juniper (Acer Chromebook Spin 311) | |
| 137 | + items: | |
| 138 | + - const: google,juniper-sku16 | |
| 139 | + - const: google,juniper | |
| 140 | + - const: mediatek,mt8183 | |
| 141 | + - description: Google Kakadu (ASUS Chromebook Detachable CM3) | |
| 142 | + items: | |
| 143 | + - const: google,kakadu-rev3 | |
| 144 | + - const: google,kakadu-rev2 | |
| 145 | + - const: google,kakadu | |
| 146 | + - const: mediatek,mt8183 | |
| 147 | + - description: Google Kodama (Lenovo 10e Chromebook Tablet) | |
| 148 | + items: | |
| 149 | + - enum: | |
| 150 | + - google,kodama-sku16 | |
| 151 | + - google,kodama-sku272 | |
| 152 | + - google,kodama-sku288 | |
| 153 | + - google,kodama-sku32 | |
| 154 | + - const: google,kodama | |
| 155 | + - const: mediatek,mt8183 | |
| 156 | + - items: | |
| 157 | + - enum: | |
| 158 | + - mediatek,mt8183-pumpkin | |
| 159 | + - const: mediatek,mt8183 | |
| 160 | + - items: | |
| 161 | + - enum: | |
| 162 | + - mediatek,mt8516-pumpkin | |
| 163 | + - const: mediatek,mt8516 | |
| 128 | 164 | |
| 129 | 165 | additionalProperties: true |
| 130 | 166 | |
| @@ -13,6 +13,7 @@ Required Properties: · 12 unmodified lines | ||
| 13 | 13 | - "mediatek,mt6779-mmsys", "syscon" |
| 14 | 14 | - "mediatek,mt6797-mmsys", "syscon" |
| 15 | 15 | - "mediatek,mt7623-mmsys", "mediatek,mt2701-mmsys", "syscon" |
| 16 | + - "mediatek,mt8167-mmsys", "syscon" | |
| 16 | 17 | - "mediatek,mt8173-mmsys", "syscon" |
| 17 | 18 | - "mediatek,mt8183-mmsys", "syscon" |
| 18 | 19 | - #clock-cells: Must be 1 |
| @@ -22,6 +22,7 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | compatible: |
| 23 | 23 | enum: |
| 24 | 24 | - qcom,sc7180-llcc |
| 25 | + - qcom,sc7280-llcc | |
| 25 | 26 | - qcom,sdm845-llcc |
| 26 | 27 | - qcom,sm8150-llcc |
| 27 | 28 | - qcom,sm8250-llcc |
| @@ -24,6 +24,7 @@ properties: · 23 unmodified lines | ||
| 24 | 24 | items: |
| 25 | 25 | - enum: |
| 26 | 26 | - honestar,ssd201htv2 # Honestar SSD201_HT_V2 devkit |
| 27 | + - m5stack,unitv2 # M5Stack UnitV2 | |
| 27 | 28 | - const: mstar,infinity2m |
| 28 | 29 | |
| 29 | 30 | - description: infinity3 boards |
| @@ -1,6 +0,0 @@ | ||
| 1 | −NPCM Platforms Device Tree Bindings | |
| 2 | −----------------------------------- | |
| 3 | −NPCM750 SoC | |
| 4 | −Required root node properties: | |
| 5 | − - compatible = "nuvoton,npcm750"; | |
| 6 | − | |
| @@ -0,0 +1,29 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/arm/npcm/npcm.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NPCM Platforms Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jonathan Neuschäfer <j.neuschaefer@gmx.net> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + $nodename: | |
| 14 | + const: '/' | |
| 15 | + compatible: | |
| 16 | + oneOf: | |
| 17 | + - description: WPCM450 based boards | |
| 18 | + items: | |
| 19 | + - enum: | |
| 20 | + - supermicro,x9sci-ln4f-bmc # Supermicro X9SCI-LN4F server's BMC | |
| 21 | + - const: nuvoton,wpcm450 | |
| 22 | + | |
| 23 | + - description: NPCM750 based boards | |
| 24 | + items: | |
| 25 | + - enum: | |
| 26 | + - nuvoton,npcm750-evb # NPCM750 evaluation board | |
| 27 | + - const: nuvoton,npcm750 | |
| 28 | + | |
| 29 | +additionalProperties: true | |
| @@ -37,6 +37,7 @@ description: | · 36 unmodified lines | ||
| 37 | 37 | msm8994 |
| 38 | 38 | msm8996 |
| 39 | 39 | sc7180 |
| 40 | + sc7280 | |
| 40 | 41 | sdm630 |
| 41 | 42 | sdm660 |
| 42 | 43 | sdm845 |
| @@ -136,6 +137,16 @@ properties: · 93 unmodified lines | ||
| 136 | 137 | - samsung,a5u-eur |
| 137 | 138 | - const: qcom,msm8916 |
| 138 | 139 | |
| 140 | + - items: | |
| 141 | + - enum: | |
| 142 | + - sony,karin_windy | |
| 143 | + - sony,karin-row | |
| 144 | + - sony,satsuki-row | |
| 145 | + - sony,sumire-row | |
| 146 | + - sony,suzuran-row | |
| 147 | + - qcom,msm8994 | |
| 148 | + - const: qcom,apq8094 | |
| 149 | + | |
| 139 | 150 | - items: |
| 140 | 151 | - const: qcom,msm8996-mtp |
| 141 | 152 | |
| @@ -164,6 +175,11 @@ properties: · 22 unmodified lines | ||
| 164 | 175 | - qcom,sc7180-idp |
| 165 | 176 | - const: qcom,sc7180 |
| 166 | 177 | |
| 178 | + - items: | |
| 179 | + - enum: | |
| 180 | + - qcom,sc7280-idp | |
| 181 | + - const: qcom,sc7280 | |
| 182 | + | |
| 167 | 183 | - items: |
| 168 | 184 | - enum: |
| 169 | 185 | - xiaomi,lavender |
| @@ -172,10 +188,13 @@ properties: · 2 unmodified lines | ||
| 172 | 188 | - items: |
| 173 | 189 | - enum: |
| 174 | 190 | - qcom,sdx55-mtp |
| 191 | + - qcom,sdx55-telit-fn980-tlb | |
| 192 | + - qcom,sdx55-t55 | |
| 175 | 193 | - const: qcom,sdx55 |
| 176 | 194 | |
| 177 | 195 | - items: |
| 178 | 196 | - enum: |
| 197 | + - qcom,ipq6018-cp01 | |
| 179 | 198 | - qcom,ipq6018-cp01-c1 |
| 180 | 199 | - const: qcom,ipq6018 |
| 181 | 200 | |
| @@ -187,6 +206,7 @@ properties: · 5 unmodified lines | ||
| 187 | 206 | |
| 188 | 207 | - items: |
| 189 | 208 | - enum: |
| 209 | + - qcom,sm8350-hdk | |
| 190 | 210 | - qcom,sm8350-mtp |
| 191 | 211 | - const: qcom,sm8350 |
| 192 | 212 | |
| @@ -134,6 +134,7 @@ properties: · 133 unmodified lines | ||
| 134 | 134 | - friendlyarm,nanopi-m4 |
| 135 | 135 | - friendlyarm,nanopi-m4b |
| 136 | 136 | - friendlyarm,nanopi-neo4 |
| 137 | + - friendlyarm,nanopi-r4s | |
| 137 | 138 | - const: rockchip,rk3399 |
| 138 | 139 | |
| 139 | 140 | - description: GeekBuying GeekBox |
| @@ -51,6 +51,10 @@ properties: · 50 unmodified lines | ||
| 51 | 51 | - st,stm32h743i-disco |
| 52 | 52 | - st,stm32h743i-eval |
| 53 | 53 | - const: st,stm32h743 |
| 54 | + - items: | |
| 55 | + - enum: | |
| 56 | + - st,stm32h750i-art-pi | |
| 57 | + - const: st,stm32h750 | |
| 54 | 58 | - items: |
| 55 | 59 | - enum: |
| 56 | 60 | - shiratech,stm32mp157a-iot-box # IoT Box |
| @@ -64,6 +68,23 @@ properties: · 7 unmodified lines | ||
| 64 | 68 | - const: st,stm32mp157c-ev1 |
| 65 | 69 | - const: st,stm32mp157c-ed1 |
| 66 | 70 | - const: st,stm32mp157 |
| 71 | + | |
| 72 | + - description: Engicam i.Core STM32MP1 SoM based Boards | |
| 73 | + items: | |
| 74 | + - enum: | |
| 75 | + - engicam,icore-stm32mp1-ctouch2 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0 | |
| 76 | + - engicam,icore-stm32mp1-edimm2.2 # STM32MP1 Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit | |
| 77 | + - const: engicam,icore-stm32mp1 # STM32MP1 Engicam i.Core STM32MP1 SoM | |
| 78 | + - const: st,stm32mp157 | |
| 79 | + | |
| 80 | + - description: Engicam MicroGEA STM32MP1 SoM based Boards | |
| 81 | + items: | |
| 82 | + - enum: | |
| 83 | + - engicam,microgea-stm32mp1-microdev2.0 | |
| 84 | + - engicam,microgea-stm32mp1-microdev2.0-of7 | |
| 85 | + - const: engicam,microgea-stm32mp1 | |
| 86 | + - const: st,stm32mp157 | |
| 87 | + | |
| 67 | 88 | - description: Octavo OSD32MP15x System-in-Package based boards |
| 68 | 89 | items: |
| 69 | 90 | - enum: |
| @@ -802,6 +802,11 @@ properties: · 801 unmodified lines | ||
| 802 | 802 | - const: tbs-biometrics,a711 |
| 803 | 803 | - const: allwinner,sun8i-a83t |
| 804 | 804 | |
| 805 | + - description: Topwise A721 Tablet | |
| 806 | + items: | |
| 807 | + - const: topwise,a721 | |
| 808 | + - const: allwinner,sun4i-a10 | |
| 809 | + | |
| 805 | 810 | - description: Utoo P66 |
| 806 | 811 | items: |
| 807 | 812 | - const: utoo,p66 |
| @@ -23,6 +23,8 @@ properties: · 22 unmodified lines | ||
| 23 | 23 | items: |
| 24 | 24 | - enum: |
| 25 | 25 | - ti,am654-evm |
| 26 | + - siemens,iot2050-basic | |
| 27 | + - siemens,iot2050-advanced | |
| 26 | 28 | - const: ti,am654 |
| 27 | 29 | |
| 28 | 30 | - description: K3 J721E SoC |
| @@ -33,6 +35,13 @@ properties: · 4 unmodified lines | ||
| 33 | 35 | items: |
| 34 | 36 | - const: ti,j7200 |
| 35 | 37 | |
| 38 | + - description: K3 AM642 SoC | |
| 39 | + items: | |
| 40 | + - enum: | |
| 41 | + - ti,am642-evm | |
| 42 | + - ti,am642-sk | |
| 43 | + - const: ti,am642 | |
| 44 | + | |
| 36 | 45 | additionalProperties: true |
| 37 | 46 | |
| 38 | 47 | ... |
| @@ -0,0 +1,49 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause | |
| 2 | +# Copyright 2021, Arm Ltd | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/arm/trbe.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: ARM Trace Buffer Extensions | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Anshuman Khandual <anshuman.khandual@arm.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + Arm Trace Buffer Extension (TRBE) is a per CPU component | |
| 15 | + for storing trace generated on the CPU to memory. It is | |
| 16 | + accessed via CPU system registers. The software can verify | |
| 17 | + if it is permitted to use the component by checking the | |
| 18 | + TRBIDR register. | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + $nodename: | |
| 22 | + const: "trbe" | |
| 23 | + compatible: | |
| 24 | + items: | |
| 25 | + - const: arm,trace-buffer-extension | |
| 26 | + | |
| 27 | + interrupts: | |
| 28 | + description: | | |
| 29 | + Exactly 1 PPI must be listed. For heterogeneous systems where | |
| 30 | + TRBE is only supported on a subset of the CPUs, please consult | |
| 31 | + the arm,gic-v3 binding for details on describing a PPI partition. | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +required: | |
| 35 | + - compatible | |
| 36 | + - interrupts | |
| 37 | + | |
| 38 | +additionalProperties: false | |
| 39 | + | |
| 40 | +examples: | |
| 41 | + | |
| 42 | + - | | |
| 43 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 44 | + | |
| 45 | + trbe { | |
| 46 | + compatible = "arm,trace-buffer-extension"; | |
| 47 | + interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
| 48 | + }; | |
| 49 | +... | |
| @@ -38,6 +38,8 @@ Required properties: · 37 unmodified lines | ||
| 38 | 38 | |
| 39 | 39 | Optional properties: |
| 40 | 40 | - ceva,broken-gen2: limit to gen1 speed instead of gen2. |
| 41 | + - phys: phandle for the PHY device | |
| 42 | + - resets: phandle to the reset controller for the SATA IP | |
| 41 | 43 | |
| 42 | 44 | Examples: |
| 43 | 45 | ahci@fd0c0000 { |
| @@ -56,4 +58,6 @@ Examples: · 12 unmodified lines | ||
| 56 | 58 | ceva,p1-burst-params = /bits/ 8 <0x0A 0x08 0x4A 0x06>; |
| 57 | 59 | ceva,p1-retry-params = /bits/ 16 <0x0216 0x7F06>; |
| 58 | 60 | ceva,broken-gen2; |
| 61 | + phys = <&psgtr 1 PHY_TYPE_SATA 1 1>; | |
| 62 | + resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; | |
| 59 | 63 | }; |
| @@ -0,0 +1,176 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Tegra AHCI SATA Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Thierry Reding <thierry.reding@gmail.com> | |
| 11 | + - Jonathan Hunter <jonathanh@nvidia.com> | |
| 12 | + | |
| 13 | +properties: | |
| 14 | + compatible: | |
| 15 | + enum: | |
| 16 | + - nvidia,tegra124-ahci | |
| 17 | + - nvidia,tegra132-ahci | |
| 18 | + - nvidia,tegra210-ahci | |
| 19 | + - nvidia,tegra186-ahci | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + minItems: 2 | |
| 23 | + maxItems: 3 | |
| 24 | + items: | |
| 25 | + - description: AHCI registers | |
| 26 | + - description: SATA configuration and IPFS registers | |
| 27 | + - description: SATA AUX registers | |
| 28 | + | |
| 29 | + interrupts: | |
| 30 | + maxItems: 1 | |
| 31 | + | |
| 32 | + clock-names: | |
| 33 | + items: | |
| 34 | + - const: sata | |
| 35 | + - const: sata-oob | |
| 36 | + | |
| 37 | + clocks: | |
| 38 | + maxItems: 2 | |
| 39 | + | |
| 40 | + reset-names: | |
| 41 | + minItems: 2 | |
| 42 | + items: | |
| 43 | + - const: sata | |
| 44 | + - const: sata-cold | |
| 45 | + - const: sata-oob | |
| 46 | + | |
| 47 | + resets: | |
| 48 | + minItems: 2 | |
| 49 | + maxItems: 3 | |
| 50 | + | |
| 51 | + iommus: | |
| 52 | + maxItems: 1 | |
| 53 | + | |
| 54 | + interconnect-names: | |
| 55 | + items: | |
| 56 | + - const: dma-mem | |
| 57 | + - const: write | |
| 58 | + | |
| 59 | + interconnects: | |
| 60 | + maxItems: 2 | |
| 61 | + | |
| 62 | + power-domains: | |
| 63 | + items: | |
| 64 | + - description: SAX power-domain | |
| 65 | + | |
| 66 | + phy-names: | |
| 67 | + items: | |
| 68 | + - const: sata-0 | |
| 69 | + | |
| 70 | + phys: | |
| 71 | + maxItems: 1 | |
| 72 | + | |
| 73 | + hvdd-supply: | |
| 74 | + description: SATA HVDD regulator supply. | |
| 75 | + | |
| 76 | + vddio-supply: | |
| 77 | + description: SATA VDDIO regulator supply. | |
| 78 | + | |
| 79 | + avdd-supply: | |
| 80 | + description: SATA AVDD regulator supply. | |
| 81 | + | |
| 82 | + target-5v-supply: | |
| 83 | + description: SATA 5V power regulator supply. | |
| 84 | + | |
| 85 | + target-12v-supply: | |
| 86 | + description: SATA 12V power regulator supply. | |
| 87 | + | |
| 88 | +required: | |
| 89 | + - compatible | |
| 90 | + - reg | |
| 91 | + - interrupts | |
| 92 | + - clock-names | |
| 93 | + - clocks | |
| 94 | + - reset-names | |
| 95 | + - resets | |
| 96 | + | |
| 97 | +allOf: | |
| 98 | + - if: | |
| 99 | + properties: | |
| 100 | + compatible: | |
| 101 | + contains: | |
| 102 | + enum: | |
| 103 | + - nvidia,tegra124-ahci | |
| 104 | + - nvidia,tegra132-ahci | |
| 105 | + then: | |
| 106 | + properties: | |
| 107 | + reg: | |
| 108 | + maxItems: 2 | |
| 109 | + reset-names: | |
| 110 | + minItems: 3 | |
| 111 | + resets: | |
| 112 | + minItems: 3 | |
| 113 | + required: | |
| 114 | + - phys | |
| 115 | + - phy-names | |
| 116 | + - hvdd-supply | |
| 117 | + - vddio-supply | |
| 118 | + - avdd-supply | |
| 119 | + | |
| 120 | + - if: | |
| 121 | + properties: | |
| 122 | + compatible: | |
| 123 | + contains: | |
| 124 | + enum: | |
| 125 | + - nvidia,tegra210-ahci | |
| 126 | + then: | |
| 127 | + properties: | |
| 128 | + reg: | |
| 129 | + minItems: 3 | |
| 130 | + reset-names: | |
| 131 | + minItems: 3 | |
| 132 | + resets: | |
| 133 | + minItems: 3 | |
| 134 | + | |
| 135 | + - if: | |
| 136 | + properties: | |
| 137 | + compatible: | |
| 138 | + contains: | |
| 139 | + enum: | |
| 140 | + - nvidia,tegra186-ahci | |
| 141 | + then: | |
| 142 | + properties: | |
| 143 | + reg: | |
| 144 | + minItems: 3 | |
| 145 | + reset-names: | |
| 146 | + maxItems: 2 | |
| 147 | + resets: | |
| 148 | + maxItems: 2 | |
| 149 | + required: | |
| 150 | + - iommus | |
| 151 | + - interconnect-names | |
| 152 | + - interconnects | |
| 153 | + - power-domains | |
| 154 | + | |
| 155 | +additionalProperties: true | |
| 156 | + | |
| 157 | +examples: | |
| 158 | + - | | |
| 159 | + #include <dt-bindings/clock/tegra210-car.h> | |
| 160 | + #include <dt-bindings/reset/tegra210-car.h> | |
| 161 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 162 | + | |
| 163 | + sata@70020000 { | |
| 164 | + compatible = "nvidia,tegra210-ahci"; | |
| 165 | + reg = <0x70027000 0x00002000>, /* AHCI */ | |
| 166 | + <0x70020000 0x00007000>, /* SATA */ | |
| 167 | + <0x70001100 0x00010000>; /* SATA AUX */ | |
| 168 | + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | |
| 169 | + clocks = <&tegra_car TEGRA210_CLK_SATA>, | |
| 170 | + <&tegra_car TEGRA210_CLK_SATA_OOB>; | |
| 171 | + clock-names = "sata", "sata-oob"; | |
| 172 | + resets = <&tegra_car 124>, | |
| 173 | + <&tegra_car 129>, | |
| 174 | + <&tegra_car 123>; | |
| 175 | + reset-names = "sata", "sata-cold", "sata-oob"; | |
| 176 | + }; | |
| @@ -1,44 +0,0 @@ | ||
| 1 | −Tegra SoC SATA AHCI controller | |
| 2 | − | |
| 3 | −Required properties : | |
| 4 | −- compatible : Must be one of: | |
| 5 | − - Tegra124 : "nvidia,tegra124-ahci" | |
| 6 | − - Tegra132 : "nvidia,tegra132-ahci", "nvidia,tegra124-ahci" | |
| 7 | − - Tegra210 : "nvidia,tegra210-ahci" | |
| 8 | −- reg : Should contain 2 entries: | |
| 9 | − - AHCI register set (SATA BAR5) | |
| 10 | − - SATA register set | |
| 11 | −- interrupts : Defines the interrupt used by SATA | |
| 12 | −- clocks : Must contain an entry for each entry in clock-names. | |
| 13 | − See ../clocks/clock-bindings.txt for details. | |
| 14 | −- clock-names : Must include the following entries: | |
| 15 | − - sata | |
| 16 | − - sata-oob | |
| 17 | −- resets : Must contain an entry for each entry in reset-names. | |
| 18 | − See ../reset/reset.txt for details. | |
| 19 | −- reset-names : Must include the following entries: | |
| 20 | − - sata | |
| 21 | − - sata-oob | |
| 22 | − - sata-cold | |
| 23 | −- phys : Must contain an entry for each entry in phy-names. | |
| 24 | − See ../phy/phy-bindings.txt for details. | |
| 25 | −- phy-names : Must include the following entries: | |
| 26 | − - For Tegra124 and Tegra132: | |
| 27 | − - sata-phy : XUSB PADCTL SATA PHY | |
| 28 | −- For Tegra124 and Tegra132: | |
| 29 | − - hvdd-supply : Defines the SATA HVDD regulator | |
| 30 | − - vddio-supply : Defines the SATA VDDIO regulator | |
| 31 | − - avdd-supply : Defines the SATA AVDD regulator | |
| 32 | − - target-5v-supply : Defines the SATA 5V power regulator | |
| 33 | − - target-12v-supply : Defines the SATA 12V power regulator | |
| 34 | − | |
| 35 | −Optional properties: | |
| 36 | −- reg : | |
| 37 | − - AUX register set | |
| 38 | −- clock-names : | |
| 39 | − - cml1 : | |
| 40 | − cml1 clock should be defined here if the PHY driver | |
| 41 | − doesn't manage them. If it does, they should not be. | |
| 42 | −- phy-names : | |
| 43 | − - For T210: | |
| 44 | − - sata-phy | |
| @@ -44,7 +44,7 @@ examples: · 43 unmodified lines | ||
| 44 | 44 | - | |
| 45 | 45 | clk@1c20000 { |
| 46 | 46 | #clock-cells = <0>; |
| 47 | − compatible = "allwinner,sun4i-a10-pll1"; | |
| 47 | + compatible = "allwinner,sun4i-a10-pll1-clk"; | |
| 48 | 48 | reg = <0x01c20000 0x4>; |
| 49 | 49 | clocks = <&osc24M>; |
| 50 | 50 | clock-output-names = "osc24M"; |
| @@ -1,6 +1,6 @@ | ||
| 1 | 1 | * Time Base Generator Clock bindings for Marvell Armada 37xx SoCs |
| 2 | 2 | |
| 3 | −Marvell Armada 37xx SoCs provde Time Base Generator clocks which are | |
| 3 | +Marvell Armada 37xx SoCs provide Time Base Generator clocks which are | |
| 4 | 4 | used as parent clocks for the peripheral clocks. |
| 5 | 5 | |
| 6 | 6 | The TBG clock consumer should specify the desired clock by having the |
| @@ -107,8 +107,8 @@ examples: · 106 unmodified lines | ||
| 107 | 107 | interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; |
| 108 | 108 | reg = <0x5b010000 0x10000>; |
| 109 | 109 | clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>, |
| 110 | − <&sdhc0_lpcg IMX_LPCG_CLK_0>, | |
| 111 | − <&sdhc0_lpcg IMX_LPCG_CLK_5>; | |
| 112 | − clock-names = "ipg", "per", "ahb"; | |
| 110 | + <&sdhc0_lpcg IMX_LPCG_CLK_5>, | |
| 111 | + <&sdhc0_lpcg IMX_LPCG_CLK_0>; | |
| 112 | + clock-names = "ipg", "ahb", "per"; | |
| 113 | 113 | power-domains = <&pd IMX_SC_R_SDHC_0>; |
| 114 | 114 | }; |
| @@ -0,0 +1,68 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: MT7621 Clock Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Sergio Paracuellos <sergio.paracuellos@gmail.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The MT7621 has a PLL controller from where the cpu clock is provided | |
| 14 | + as well as derived clocks for the bus and the peripherals. It also | |
| 15 | + can gate SoC device clocks. | |
| 16 | + | |
| 17 | + Each clock is assigned an identifier and client nodes use this identifier | |
| 18 | + to specify the clock which they consume. | |
| 19 | + | |
| 20 | + All these identifiers could be found in: | |
| 21 | + [1]: <include/dt-bindings/clock/mt7621-clk.h>. | |
| 22 | + | |
| 23 | + The clocks are provided inside a system controller node. | |
| 24 | + | |
| 25 | +properties: | |
| 26 | + compatible: | |
| 27 | + items: | |
| 28 | + - const: mediatek,mt7621-sysc | |
| 29 | + - const: syscon | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | + "#clock-cells": | |
| 35 | + description: | |
| 36 | + The first cell indicates the clock number, see [1] for available | |
| 37 | + clocks. | |
| 38 | + const: 1 | |
| 39 | + | |
| 40 | + ralink,memctl: | |
| 41 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 42 | + description: | |
| 43 | + phandle of syscon used to control memory registers | |
| 44 | + | |
| 45 | + clock-output-names: | |
| 46 | + maxItems: 8 | |
| 47 | + | |
| 48 | +required: | |
| 49 | + - compatible | |
| 50 | + - reg | |
| 51 | + - '#clock-cells' | |
| 52 | + - ralink,memctl | |
| 53 | + | |
| 54 | +additionalProperties: false | |
| 55 | + | |
| 56 | +examples: | |
| 57 | + - | | |
| 58 | + #include <dt-bindings/clock/mt7621-clk.h> | |
| 59 | + | |
| 60 | + sysc: sysc@0 { | |
| 61 | + compatible = "mediatek,mt7621-sysc", "syscon"; | |
| 62 | + reg = <0x0 0x100>; | |
| 63 | + #clock-cells = <1>; | |
| 64 | + ralink,memctl = <&memc>; | |
| 65 | + clock-output-names = "xtal", "cpu", "bus", | |
| 66 | + "50m", "125m", "150m", | |
| 67 | + "250m", "270m"; | |
| 68 | + }; | |
| @@ -18,10 +18,12 @@ description: | · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | properties: |
| 20 | 20 | compatible: |
| 21 | − oneOf: | |
| 22 | − - items: | |
| 23 | − - enum: | |
| 24 | − - socionext,milbeaut-m10v-ccu | |
| 21 | + enum: | |
| 22 | + - socionext,milbeaut-m10v-ccu | |
| 23 | + | |
| 24 | + reg: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 25 | 27 | clocks: |
| 26 | 28 | maxItems: 1 |
| 27 | 29 | description: external clock |
| @@ -41,7 +43,7 @@ examples: · 13 unmodified lines | ||
| 41 | 43 | # Clock controller node: |
| 42 | 44 | - | |
| 43 | 45 | m10v-clk-ctrl@1d021000 { |
| 44 | − compatible = "socionext,milbeaut-m10v-clk-ccu"; | |
| 46 | + compatible = "socionext,milbeaut-m10v-ccu"; | |
| 45 | 47 | reg = <0x1d021000 0x4000>; |
| 46 | 48 | #clock-cells = <1>; |
| 47 | 49 | clocks = <&clki40mhz>; |
| @@ -0,0 +1,82 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Global Clock & Reset Controller Binding | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Stephen Boyd <sboyd@kernel.org> | |
| 11 | + - Taniya Das <tdas@codeaurora.org> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + Qualcomm global clock control module which supports the clocks, resets and | |
| 15 | + power domains on SDM845 | |
| 16 | + | |
| 17 | + See also: | |
| 18 | + - dt-bindings/clock/qcom,gcc-sdm845.h | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + compatible: | |
| 22 | + const: qcom,gcc-sdm845 | |
| 23 | + | |
| 24 | + clocks: | |
| 25 | + items: | |
| 26 | + - description: Board XO source | |
| 27 | + - description: Board active XO source | |
| 28 | + - description: Sleep clock source | |
| 29 | + - description: PCIE 0 Pipe clock source | |
| 30 | + - description: PCIE 1 Pipe clock source | |
| 31 | + | |
| 32 | + clock-names: | |
| 33 | + items: | |
| 34 | + - const: bi_tcxo | |
| 35 | + - const: bi_tcxo_ao | |
| 36 | + - const: sleep_clk | |
| 37 | + - const: pcie_0_pipe_clk | |
| 38 | + - const: pcie_1_pipe_clk | |
| 39 | + | |
| 40 | + '#clock-cells': | |
| 41 | + const: 1 | |
| 42 | + | |
| 43 | + '#reset-cells': | |
| 44 | + const: 1 | |
| 45 | + | |
| 46 | + '#power-domain-cells': | |
| 47 | + const: 1 | |
| 48 | + | |
| 49 | + reg: | |
| 50 | + maxItems: 1 | |
| 51 | + | |
| 52 | + protected-clocks: | |
| 53 | + description: | |
| 54 | + Protected clock specifier list as per common clock binding. | |
| 55 | + | |
| 56 | +required: | |
| 57 | + - compatible | |
| 58 | + - reg | |
| 59 | + - '#clock-cells' | |
| 60 | + - '#reset-cells' | |
| 61 | + - '#power-domain-cells' | |
| 62 | + | |
| 63 | +additionalProperties: false | |
| 64 | + | |
| 65 | +examples: | |
| 66 | + # Example for GCC for SDM845: | |
| 67 | + - | | |
| 68 | + #include <dt-bindings/clock/qcom,rpmh.h> | |
| 69 | + clock-controller@100000 { | |
| 70 | + compatible = "qcom,gcc-sdm845"; | |
| 71 | + reg = <0x100000 0x1f0000>; | |
| 72 | + clocks = <&rpmhcc RPMH_CXO_CLK>, | |
| 73 | + <&rpmhcc RPMH_CXO_CLK_A>, | |
| 74 | + <&sleep_clk>, | |
| 75 | + <&pcie0_lane>, | |
| 76 | + <&pcie1_lane>; | |
| 77 | + clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk", "pcie_1_pipe_clk"; | |
| 78 | + #clock-cells = <1>; | |
| 79 | + #reset-cells = <1>; | |
| 80 | + #power-domain-cells = <1>; | |
| 81 | + }; | |
| 82 | +... | |
| @@ -32,7 +32,6 @@ description: | · 31 unmodified lines | ||
| 32 | 32 | - dt-bindings/clock/qcom,gcc-mdm9615.h |
| 33 | 33 | - dt-bindings/reset/qcom,gcc-mdm9615.h |
| 34 | 34 | - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660) |
| 35 | − - dt-bindings/clock/qcom,gcc-sdm845.h | |
| 36 | 35 | |
| 37 | 36 | properties: |
| 38 | 37 | compatible: |
| @@ -52,7 +51,6 @@ properties: · 13 unmodified lines | ||
| 52 | 51 | - qcom,gcc-mdm9615 |
| 53 | 52 | - qcom,gcc-sdm630 |
| 54 | 53 | - qcom,gcc-sdm660 |
| 55 | − - qcom,gcc-sdm845 | |
| 56 | 54 | |
| 57 | 55 | '#clock-cells': |
| 58 | 56 | const: 1 |
| @@ -0,0 +1,60 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: ROCKCHIP rk3568 Family Clock Control Module Binding | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Elaine Zhang <zhangqing@rock-chips.com> | |
| 11 | + - Heiko Stuebner <heiko@sntech.de> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + The RK3568 clock controller generates the clock and also implements a | |
| 15 | + reset controller for SoC peripherals. | |
| 16 | + (examples: provide SCLK_UART1\PCLK_UART1 and SRST_P_UART1\SRST_S_UART1 for UART module) | |
| 17 | + Each clock is assigned an identifier and client nodes can use this identifier | |
| 18 | + to specify the clock which they consume. All available clocks are defined as | |
| 19 | + preprocessor macros in the dt-bindings/clock/rk3568-cru.h headers and can be | |
| 20 | + used in device tree sources. | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + compatible: | |
| 24 | + enum: | |
| 25 | + - rockchip,rk3568-cru | |
| 26 | + - rockchip,rk3568-pmucru | |
| 27 | + | |
| 28 | + reg: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + "#clock-cells": | |
| 32 | + const: 1 | |
| 33 | + | |
| 34 | + "#reset-cells": | |
| 35 | + const: 1 | |
| 36 | + | |
| 37 | +required: | |
| 38 | + - compatible | |
| 39 | + - reg | |
| 40 | + - "#clock-cells" | |
| 41 | + - "#reset-cells" | |
| 42 | + | |
| 43 | +additionalProperties: false | |
| 44 | + | |
| 45 | +examples: | |
| 46 | + # Clock Control Module node: | |
| 47 | + - | | |
| 48 | + pmucru: clock-controller@fdd00000 { | |
| 49 | + compatible = "rockchip,rk3568-pmucru"; | |
| 50 | + reg = <0xfdd00000 0x1000>; | |
| 51 | + #clock-cells = <1>; | |
| 52 | + #reset-cells = <1>; | |
| 53 | + }; | |
| 54 | + - | | |
| 55 | + cru: clock-controller@fdd20000 { | |
| 56 | + compatible = "rockchip,rk3568-cru"; | |
| 57 | + reg = <0xfdd20000 0x1000>; | |
| 58 | + #clock-cells = <1>; | |
| 59 | + #reset-cells = <1>; | |
| 60 | + }; | |
| @@ -197,6 +197,16 @@ properties: · 196 unmodified lines | ||
| 197 | 197 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 198 | 198 | enum: [1, 2, 3] |
| 199 | 199 | |
| 200 | + slow-charger-loop: | |
| 201 | + description: Allows PMIC charger loops which are slow(i.e. cannot meet the 15ms deadline) to | |
| 202 | + still comply to pSnkStby i.e Maximum power that can be consumed by sink while in Sink Standby | |
| 203 | + state as defined in 7.4.2 Sink Electrical Parameters of USB Power Delivery Specification | |
| 204 | + Revision 3.0, Version 1.2. When the property is set, the port requests pSnkStby(2.5W - | |
| 205 | + 5V@500mA) upon entering SNK_DISCOVERY(instead of 3A or the 1.5A, Rp current advertised, during | |
| 206 | + SNK_DISCOVERY) and the actual currrent limit after reception of PS_Ready for PD link or during | |
| 207 | + SNK_READY for non-pd link. | |
| 208 | + type: boolean | |
| 209 | + | |
| 200 | 210 | required: |
| 201 | 211 | - compatible |
| 202 | 212 | |
| @@ -0,0 +1,62 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/counter/interrupt-counter.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Interrupt counter | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Oleksij Rempel <o.rempel@pengutronix.de> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + A generic interrupt counter to measure interrupt frequency. It was developed | |
| 14 | + and used for agricultural devices to measure rotation speed of wheels or | |
| 15 | + other tools. Since the direction of rotation is not important, only one | |
| 16 | + signal line is needed. | |
| 17 | + Interrupts or gpios are required. If both are defined, the interrupt will | |
| 18 | + take precedence for counting interrupts. | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + compatible: | |
| 22 | + const: interrupt-counter | |
| 23 | + | |
| 24 | + interrupts: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + gpios: | |
| 28 | + maxItems: 1 | |
| 29 | + | |
| 30 | +required: | |
| 31 | + - compatible | |
| 32 | + | |
| 33 | +anyOf: | |
| 34 | + - required: [ interrupts-extended ] | |
| 35 | + - required: [ interrupts ] | |
| 36 | + - required: [ gpios ] | |
| 37 | + | |
| 38 | +additionalProperties: false | |
| 39 | + | |
| 40 | +examples: | |
| 41 | + - | | |
| 42 | + | |
| 43 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 44 | + #include <dt-bindings/gpio/gpio.h> | |
| 45 | + | |
| 46 | + counter-0 { | |
| 47 | + compatible = "interrupt-counter"; | |
| 48 | + interrupts-extended = <&gpio 0 IRQ_TYPE_EDGE_RISING>; | |
| 49 | + }; | |
| 50 | + | |
| 51 | + counter-1 { | |
| 52 | + compatible = "interrupt-counter"; | |
| 53 | + gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; | |
| 54 | + }; | |
| 55 | + | |
| 56 | + counter-2 { | |
| 57 | + compatible = "interrupt-counter"; | |
| 58 | + interrupts-extended = <&gpio 2 IRQ_TYPE_EDGE_RISING>; | |
| 59 | + gpios = <&gpio 2 GPIO_ACTIVE_HIGH>; | |
| 60 | + }; | |
| 61 | + | |
| 62 | +... | |
| @@ -14,6 +14,7 @@ properties: · 13 unmodified lines | ||
| 14 | 14 | enum: |
| 15 | 15 | - ti,j721e-sa2ul |
| 16 | 16 | - ti,am654-sa2ul |
| 17 | + - ti,am64-sa2ul | |
| 17 | 18 | |
| 18 | 19 | reg: |
| 19 | 20 | maxItems: 1 |
| @@ -45,6 +46,18 @@ properties: · 25 unmodified lines | ||
| 45 | 46 | description: |
| 46 | 47 | Address translation for the possible RNG child node for SA2UL |
| 47 | 48 | |
| 49 | + clocks: | |
| 50 | + items: | |
| 51 | + - description: Clock used by PKA | |
| 52 | + - description: Main Input Clock | |
| 53 | + - description: Clock used by rng | |
| 54 | + | |
| 55 | + clock-names: | |
| 56 | + items: | |
| 57 | + - const: pka_in_clk | |
| 58 | + - const: x1_clk | |
| 59 | + - const: x2_clk | |
| 60 | + | |
| 48 | 61 | patternProperties: |
| 49 | 62 | "^rng@[a-f0-9]+$": |
| 50 | 63 | type: object |
| @@ -57,7 +70,16 @@ required: · 6 unmodified lines | ||
| 57 | 70 | - power-domains |
| 58 | 71 | - dmas |
| 59 | 72 | - dma-names |
| 60 | − - dma-coherent | |
| 73 | + | |
| 74 | +if: | |
| 75 | + properties: | |
| 76 | + compatible: | |
| 77 | + enum: | |
| 78 | + - ti,j721e-sa2ul | |
| 79 | + - ti,am654-sa2ul | |
| 80 | +then: | |
| 81 | + required: | |
| 82 | + - dma-coherent | |
| 61 | 83 | |
| 62 | 84 | additionalProperties: false |
| 63 | 85 | |
| @@ -12,6 +12,9 @@ Required properties: · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | Optional properties: |
| 14 | 14 | |
| 15 | +- manufacturer-id : <u32> Manufacturer ID value read from Mode Register 5 | |
| 16 | +- revision-id : <u32 u32> Revision IDs read from Mode Registers 6 and 7 | |
| 17 | + | |
| 15 | 18 | The following optional properties represent the minimum value of some AC |
| 16 | 19 | timing parameters of the DDR device in terms of number of clock cycles. |
| 17 | 20 | These values shall be obtained from the device data-sheet. |
| @@ -49,6 +52,8 @@ samsung_K3QF2F20DB: lpddr3 { · 31 unmodified lines | ||
| 49 | 52 | compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; |
| 50 | 53 | density = <16384>; |
| 51 | 54 | io-width = <32>; |
| 55 | + manufacturer-id = <1>; | |
| 56 | + revision-id = <123 234>; | |
| 52 | 57 | #address-cells = <1>; |
| 53 | 58 | #size-cells = <0>; |
| 54 | 59 | |
| @@ -12,6 +12,8 @@ Required properties: · 11 unmodified lines | ||
| 12 | 12 | for details. |
| 13 | 13 | - center-supply: DMC supply node. |
| 14 | 14 | - status: Marks the node enabled/disabled. |
| 15 | +- rockchip,pmu: Phandle to the syscon managing the "PMU general register | |
| 16 | + files". | |
| 15 | 17 | |
| 16 | 18 | Optional properties: |
| 17 | 19 | - interrupts: The CPU interrupt number. The interrupt specifier |
| @@ -77,24 +79,23 @@ Following properties relate to DDR timing: · 59 unmodified lines | ||
| 77 | 79 | |
| 78 | 80 | - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines |
| 79 | 81 | the DRAM side driver strength in ohms. Default |
| 80 | − value is DDR3_DS_40ohm. | |
| 82 | + value is 40. | |
| 81 | 83 | |
| 82 | 84 | - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines |
| 83 | 85 | the DRAM side ODT strength in ohms. Default value |
| 84 | − is DDR3_ODT_120ohm. | |
| 86 | + is 120. | |
| 85 | 87 | |
| 86 | 88 | - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines |
| 87 | 89 | the phy side CA line (incluing command line, |
| 88 | 90 | address line and clock line) driver strength. |
| 89 | − Default value is PHY_DRV_ODT_40. | |
| 91 | + Default value is 40. | |
| 90 | 92 | |
| 91 | 93 | - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines |
| 92 | 94 | the PHY side DQ line (including DQS/DQ/DM line) |
| 93 | − driver strength. Default value is PHY_DRV_ODT_40. | |
| 95 | + driver strength. Default value is 40. | |
| 94 | 96 | |
| 95 | 97 | - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines |
| 96 | − the PHY side ODT strength. Default value is | |
| 97 | − PHY_DRV_ODT_240. | |
| 98 | + the PHY side ODT strength. Default value is 240. | |
| 98 | 99 | |
| 99 | 100 | - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines |
| 100 | 101 | then ODT disable frequency in MHz (Mega Hz). |
| @@ -104,25 +105,23 @@ Following properties relate to DDR timing: · 3 unmodified lines | ||
| 104 | 105 | |
| 105 | 106 | - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines |
| 106 | 107 | the DRAM side driver strength in ohms. Default |
| 107 | − value is LP3_DS_34ohm. | |
| 108 | + value is 34. | |
| 108 | 109 | |
| 109 | 110 | - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines |
| 110 | 111 | the DRAM side ODT strength in ohms. Default value |
| 111 | − is LP3_ODT_240ohm. | |
| 112 | + is 240. | |
| 112 | 113 | |
| 113 | 114 | - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines |
| 114 | 115 | the PHY side CA line (including command line, |
| 115 | 116 | address line and clock line) driver strength. |
| 116 | − Default value is PHY_DRV_ODT_40. | |
| 117 | + Default value is 40. | |
| 117 | 118 | |
| 118 | 119 | - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines |
| 119 | 120 | the PHY side DQ line (including DQS/DQ/DM line) |
| 120 | − driver strength. Default value is | |
| 121 | − PHY_DRV_ODT_40. | |
| 121 | + driver strength. Default value is 40. | |
| 122 | 122 | |
| 123 | 123 | - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define |
| 124 | − the phy side odt strength, default value is | |
| 125 | − PHY_DRV_ODT_240. | |
| 124 | + the phy side odt strength, default value is 240. | |
| 126 | 125 | |
| 127 | 126 | - rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter |
| 128 | 127 | defines the ODT disable frequency in |
| @@ -132,32 +131,30 @@ Following properties relate to DDR timing: · 3 unmodified lines | ||
| 132 | 131 | |
| 133 | 132 | - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines |
| 134 | 133 | the DRAM side driver strength in ohms. Default |
| 135 | − value is LP4_PDDS_60ohm. | |
| 134 | + value is 60. | |
| 136 | 135 | |
| 137 | 136 | - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines |
| 138 | 137 | the DRAM side ODT on DQS/DQ line strength in ohms. |
| 139 | − Default value is LP4_DQ_ODT_40ohm. | |
| 138 | + Default value is 40. | |
| 140 | 139 | |
| 141 | 140 | - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines |
| 142 | 141 | the DRAM side ODT on CA line strength in ohms. |
| 143 | − Default value is LP4_CA_ODT_40ohm. | |
| 142 | + Default value is 40. | |
| 144 | 143 | |
| 145 | 144 | - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines |
| 146 | 145 | the PHY side CA line (including command address |
| 147 | − line) driver strength. Default value is | |
| 148 | − PHY_DRV_ODT_40. | |
| 146 | + line) driver strength. Default value is 40. | |
| 149 | 147 | |
| 150 | 148 | - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines |
| 151 | 149 | the PHY side clock line and CS line driver |
| 152 | − strength. Default value is PHY_DRV_ODT_80. | |
| 150 | + strength. Default value is 80. | |
| 153 | 151 | |
| 154 | 152 | - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines |
| 155 | 153 | the PHY side DQ line (including DQS/DQ/DM line) |
| 156 | − driver strength. Default value is PHY_DRV_ODT_80. | |
| 154 | + driver strength. Default value is 80. | |
| 157 | 155 | |
| 158 | 156 | - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines |
| 159 | − the PHY side ODT strength. Default value is | |
| 160 | − PHY_DRV_ODT_60. | |
| 157 | + the PHY side ODT strength. Default value is 60. | |
| 161 | 158 | |
| 162 | 159 | Example: |
| 163 | 160 | dmc_opp_table: dmc_opp_table { |
| @@ -193,23 +190,23 @@ Example: · 29 unmodified lines | ||
| 193 | 190 | rockchip,phy_dll_dis_freq = <125>; |
| 194 | 191 | rockchip,auto_pd_dis_freq = <666>; |
| 195 | 192 | rockchip,ddr3_odt_dis_freq = <333>; |
| 196 | − rockchip,ddr3_drv = <DDR3_DS_40ohm>; | |
| 197 | − rockchip,ddr3_odt = <DDR3_ODT_120ohm>; | |
| 198 | − rockchip,phy_ddr3_ca_drv = <PHY_DRV_ODT_40>; | |
| 199 | − rockchip,phy_ddr3_dq_drv = <PHY_DRV_ODT_40>; | |
| 200 | − rockchip,phy_ddr3_odt = <PHY_DRV_ODT_240>; | |
| 193 | + rockchip,ddr3_drv = <40>; | |
| 194 | + rockchip,ddr3_odt = <120>; | |
| 195 | + rockchip,phy_ddr3_ca_drv = <40>; | |
| 196 | + rockchip,phy_ddr3_dq_drv = <40>; | |
| 197 | + rockchip,phy_ddr3_odt = <240>; | |
| 201 | 198 | rockchip,lpddr3_odt_dis_freq = <333>; |
| 202 | − rockchip,lpddr3_drv = <LP3_DS_34ohm>; | |
| 203 | − rockchip,lpddr3_odt = <LP3_ODT_240ohm>; | |
| 204 | − rockchip,phy_lpddr3_ca_drv = <PHY_DRV_ODT_40>; | |
| 205 | − rockchip,phy_lpddr3_dq_drv = <PHY_DRV_ODT_40>; | |
| 206 | − rockchip,phy_lpddr3_odt = <PHY_DRV_ODT_240>; | |
| 199 | + rockchip,lpddr3_drv = <34>; | |
| 200 | + rockchip,lpddr3_odt = <240>; | |
| 201 | + rockchip,phy_lpddr3_ca_drv = <40>; | |
| 202 | + rockchip,phy_lpddr3_dq_drv = <40>; | |
| 203 | + rockchip,phy_lpddr3_odt = <240>; | |
| 207 | 204 | rockchip,lpddr4_odt_dis_freq = <333>; |
| 208 | − rockchip,lpddr4_drv = <LP4_PDDS_60ohm>; | |
| 209 | − rockchip,lpddr4_dq_odt = <LP4_DQ_ODT_40ohm>; | |
| 210 | − rockchip,lpddr4_ca_odt = <LP4_CA_ODT_40ohm>; | |
| 211 | − rockchip,phy_lpddr4_ca_drv = <PHY_DRV_ODT_40>; | |
| 212 | − rockchip,phy_lpddr4_ck_cs_drv = <PHY_DRV_ODT_80>; | |
| 213 | − rockchip,phy_lpddr4_dq_drv = <PHY_DRV_ODT_80>; | |
| 214 | − rockchip,phy_lpddr4_odt = <PHY_DRV_ODT_60>; | |
| 205 | + rockchip,lpddr4_drv = <60>; | |
| 206 | + rockchip,lpddr4_dq_odt = <40>; | |
| 207 | + rockchip,lpddr4_ca_odt = <40>; | |
| 208 | + rockchip,phy_lpddr4_ca_drv = <40>; | |
| 209 | + rockchip,phy_lpddr4_ck_cs_drv = <80>; | |
| 210 | + rockchip,phy_lpddr4_dq_drv = <80>; | |
| 211 | + rockchip,phy_lpddr4_odt = <60>; | |
| 215 | 212 | }; |
| @@ -73,7 +73,6 @@ properties: · 72 unmodified lines | ||
| 73 | 73 | clock-output-names: |
| 74 | 74 | description: |
| 75 | 75 | Name of the LCD pixel clock created. |
| 76 | − $ref: /schemas/types.yaml#/definitions/string-array | |
| 77 | 76 | maxItems: 1 |
| 78 | 77 | |
| 79 | 78 | dmas: |
| @@ -109,7 +109,7 @@ required: · 108 unmodified lines | ||
| 109 | 109 | - resets |
| 110 | 110 | - ddc |
| 111 | 111 | |
| 112 | −unevaluatedProperties: false | |
| 112 | +additionalProperties: false | |
| 113 | 113 | |
| 114 | 114 | examples: |
| 115 | 115 | - | |
| @@ -77,12 +77,6 @@ examples: · 76 unmodified lines | ||
| 77 | 77 | |
| 78 | 78 | clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr"; |
| 79 | 79 | |
| 80 | − pitouchscreen: panel@0 { | |
| 81 | − compatible = "raspberrypi,touchscreen"; | |
| 82 | − reg = <0>; | |
| 83 | − | |
| 84 | − /* ... */ | |
| 85 | − }; | |
| 86 | 80 | }; |
| 87 | 81 | |
| 88 | 82 | ... |
| @@ -64,7 +64,7 @@ Required properties (DMA function blocks): · 63 unmodified lines | ||
| 64 | 64 | - larb: Should contain a phandle pointing to the local arbiter device as defined |
| 65 | 65 | in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml |
| 66 | 66 | - iommus: Should point to the respective IOMMU block with master port as |
| 67 | − argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | |
| 67 | + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | |
| 68 | 68 | for details. |
| 69 | 69 | |
| 70 | 70 | Optional properties (RDMA function blocks): |
| @@ -2,14 +2,14 @@ Qualcomm Technologies, Inc. DPU KMS · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | Description: |
| 4 | 4 | |
| 5 | −Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates | |
| 5 | +Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates | |
| 6 | 6 | sub-blocks like DPU display controller, DSI and DP interfaces etc. |
| 7 | 7 | The DPU display controller is found in SDM845 SoC. |
| 8 | 8 | |
| 9 | 9 | MDSS: |
| 10 | 10 | Required properties: |
| 11 | 11 | - compatible: "qcom,sdm845-mdss", "qcom,sc7180-mdss" |
| 12 | −- reg: physical base address and length of contoller's registers. | |
| 12 | +- reg: physical base address and length of controller's registers. | |
| 13 | 13 | - reg-names: register region names. The following region is required: |
| 14 | 14 | * "mdss" |
| 15 | 15 | - power-domains: a power domain consumer specifier according to |
| @@ -47,7 +47,6 @@ examples: · 46 unmodified lines | ||
| 47 | 47 | |
| 48 | 48 | spi-max-frequency = <3125000>; |
| 49 | 49 | spi-3wire; |
| 50 | − spi-cs-high; | |
| 51 | 50 | |
| 52 | 51 | reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>; |
| 53 | 52 | |
| @@ -40,7 +40,7 @@ additionalProperties: false · 39 unmodified lines | ||
| 40 | 40 | examples: |
| 41 | 41 | - | |
| 42 | 42 | panel { |
| 43 | − compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; | |
| 43 | + compatible = "startek,startek-kd050c", "panel-dpi"; | |
| 44 | 44 | label = "osddisplay"; |
| 45 | 45 | power-supply = <&vcc_supply>; |
| 46 | 46 | backlight = <&backlight>; |
| @@ -51,6 +51,9 @@ properties: · 50 unmodified lines | ||
| 51 | 51 | resets: true |
| 52 | 52 | reset-names: true |
| 53 | 53 | |
| 54 | + power-domains: | |
| 55 | + maxItems: 1 | |
| 56 | + | |
| 54 | 57 | ports: |
| 55 | 58 | $ref: /schemas/graph.yaml#/properties/port |
| 56 | 59 | description: | |
| @@ -54,6 +54,7 @@ properties: · 53 unmodified lines | ||
| 54 | 54 | compatible: |
| 55 | 55 | items: |
| 56 | 56 | - enum: |
| 57 | + - apple,simple-framebuffer | |
| 57 | 58 | - allwinner,simple-framebuffer |
| 58 | 59 | - amlogic,simple-framebuffer |
| 59 | 60 | - const: simple-framebuffer |
| @@ -84,9 +85,13 @@ properties: · 24 unmodified lines | ||
| 84 | 85 | Format of the framebuffer: |
| 85 | 86 | * `a8b8g8r8` - 32-bit pixels, d[31:24]=a, d[23:16]=b, d[15:8]=g, d[7:0]=r |
| 86 | 87 | * `r5g6b5` - 16-bit pixels, d[15:11]=r, d[10:5]=g, d[4:0]=b |
| 88 | + * `x2r10g10b10` - 32-bit pixels, d[29:20]=r, d[19:10]=g, d[9:0]=b | |
| 89 | + * `x8r8g8b8` - 32-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b | |
| 87 | 90 | enum: |
| 88 | 91 | - a8b8g8r8 |
| 89 | 92 | - r5g6b5 |
| 93 | + - x2r10g10b10 | |
| 94 | + - x8r8g8b8 | |
| 90 | 95 | |
| 91 | 96 | display: |
| 92 | 97 | $ref: /schemas/types.yaml#/definitions/phandle |
| @@ -20,6 +20,7 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | compatible: |
| 21 | 21 | enum: |
| 22 | 22 | - qcom,sdm845-gpi-dma |
| 23 | + - qcom,sm8150-gpi-dma | |
| 23 | 24 | |
| 24 | 25 | reg: |
| 25 | 26 | maxItems: 1 |
| @@ -64,7 +65,7 @@ examples: · 38 unmodified lines | ||
| 64 | 65 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 65 | 66 | #include <dt-bindings/dma/qcom-gpi.h> |
| 66 | 67 | gpi_dma0: dma-controller@800000 { |
| 67 | − compatible = "qcom,gpi-dma"; | |
| 68 | + compatible = "qcom,sdm845-gpi-dma"; | |
| 68 | 69 | #dma-cells = <3>; |
| 69 | 70 | reg = <0x00800000 0x60000>; |
| 70 | 71 | iommus = <&apps_smmu 0x0016 0x0>; |
| @@ -1,41 +0,0 @@ | ||
| 1 | −Qualcomm's PM8941 USB ID Extcon device | |
| 2 | − | |
| 3 | −Some Qualcomm PMICs have a "misc" module that can be used to detect when | |
| 4 | −the USB ID pin has been pulled low or high. | |
| 5 | − | |
| 6 | −PROPERTIES | |
| 7 | − | |
| 8 | −- compatible: | |
| 9 | − Usage: required | |
| 10 | − Value type: <string> | |
| 11 | − Definition: Should contain "qcom,pm8941-misc"; | |
| 12 | − | |
| 13 | −- reg: | |
| 14 | − Usage: required | |
| 15 | − Value type: <u32> | |
| 16 | − Definition: Should contain the offset to the misc address space | |
| 17 | − | |
| 18 | −- interrupts: | |
| 19 | − Usage: required | |
| 20 | − Value type: <prop-encoded-array> | |
| 21 | − Definition: Should contain the usb id interrupt | |
| 22 | − | |
| 23 | −- interrupt-names: | |
| 24 | − Usage: required | |
| 25 | − Value type: <stringlist> | |
| 26 | − Definition: Should contain the string "usb_id" for the usb id interrupt | |
| 27 | − | |
| 28 | −Example: | |
| 29 | − | |
| 30 | − pmic { | |
| 31 | − usb_id: misc@900 { | |
| 32 | − compatible = "qcom,pm8941-misc"; | |
| 33 | − reg = <0x900>; | |
| 34 | − interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; | |
| 35 | − interrupt-names = "usb_id"; | |
| 36 | − }; | |
| 37 | − } | |
| 38 | − | |
| 39 | − usb-controller { | |
| 40 | − extcon = <&usb_id>; | |
| 41 | − }; | |
| @@ -0,0 +1,62 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/extcon/qcom,pm8941-misc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm Technologies, Inc. PM8941 USB ID Extcon device | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Guru Das Srinagesh <gurus@codeaurora.org> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Some Qualcomm PMICs have a "misc" module that can be used to detect when | |
| 14 | + the USB ID pin has been pulled low or high. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + items: | |
| 19 | + - const: qcom,pm8941-misc | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + interrupts: | |
| 25 | + minItems: 1 | |
| 26 | + maxItems: 2 | |
| 27 | + | |
| 28 | + interrupt-names: | |
| 29 | + minItems: 1 | |
| 30 | + items: | |
| 31 | + - const: usb_id | |
| 32 | + - const: usb_vbus | |
| 33 | + | |
| 34 | +required: | |
| 35 | + - compatible | |
| 36 | + - reg | |
| 37 | + - interrupts | |
| 38 | + - interrupt-names | |
| 39 | + | |
| 40 | +additionalProperties: false | |
| 41 | + | |
| 42 | +examples: | |
| 43 | + - | | |
| 44 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 45 | + | |
| 46 | + pmic { | |
| 47 | + #address-cells = <1>; | |
| 48 | + #size-cells = <0>; | |
| 49 | + interrupt-controller; | |
| 50 | + #interrupt-cells = <4>; | |
| 51 | + | |
| 52 | + usb_id: misc@900 { | |
| 53 | + compatible = "qcom,pm8941-misc"; | |
| 54 | + reg = <0x900>; | |
| 55 | + interrupts = <0x0 0x9 0 IRQ_TYPE_EDGE_BOTH>; | |
| 56 | + interrupt-names = "usb_id"; | |
| 57 | + }; | |
| 58 | + }; | |
| 59 | + | |
| 60 | + usb-controller { | |
| 61 | + extcon = <&usb_id>; | |
| 62 | + }; | |
| @@ -20,7 +20,9 @@ Required properties: · 19 unmodified lines | ||
| 20 | 20 | * "qcom,scm-msm8996" |
| 21 | 21 | * "qcom,scm-msm8998" |
| 22 | 22 | * "qcom,scm-sc7180" |
| 23 | + * "qcom,scm-sc7280" | |
| 23 | 24 | * "qcom,scm-sdm845" |
| 25 | + * "qcom,scm-sdx55" | |
| 24 | 26 | * "qcom,scm-sm8150" |
| 25 | 27 | * "qcom,scm-sm8250" |
| 26 | 28 | * "qcom,scm-sm8350" |
| @@ -245,36 +245,31 @@ Base tree contains: · 244 unmodified lines | ||
| 245 | 245 | |
| 246 | 246 | Overlay contains: |
| 247 | 247 | |
| 248 | −/dts-v1/ /plugin/; | |
| 249 | −/ { | |
| 250 | − fragment@0 { | |
| 251 | − target = <&fpga_region0>; | |
| 252 | − #address-cells = <1>; | |
| 253 | − #size-cells = <1>; | |
| 254 | − __overlay__ { | |
| 255 | − #address-cells = <1>; | |
| 256 | − #size-cells = <1>; | |
| 257 | − | |
| 258 | − firmware-name = "soc_system.rbf"; | |
| 259 | − fpga-bridges = <&fpga_bridge1>; | |
| 260 | − ranges = <0x20000 0xff200000 0x100000>, | |
| 261 | − <0x0 0xc0000000 0x20000000>; | |
| 262 | − | |
| 263 | − gpio@10040 { | |
| 264 | − compatible = "altr,pio-1.0"; | |
| 265 | − reg = <0x10040 0x20>; | |
| 266 | − altr,ngpio = <4>; | |
| 267 | − #gpio-cells = <2>; | |
| 268 | − clocks = <2>; | |
| 269 | − gpio-controller; | |
| 270 | − }; | |
| 271 | − | |
| 272 | − onchip-memory { | |
| 273 | − device_type = "memory"; | |
| 274 | − compatible = "altr,onchipmem-15.1"; | |
| 275 | − reg = <0x0 0x10000>; | |
| 276 | − }; | |
| 277 | − }; | |
| 248 | +/dts-v1/; | |
| 249 | +/plugin/; | |
| 250 | + | |
| 251 | +&fpga_region0 { | |
| 252 | + #address-cells = <1>; | |
| 253 | + #size-cells = <1>; | |
| 254 | + | |
| 255 | + firmware-name = "soc_system.rbf"; | |
| 256 | + fpga-bridges = <&fpga_bridge1>; | |
| 257 | + ranges = <0x20000 0xff200000 0x100000>, | |
| 258 | + <0x0 0xc0000000 0x20000000>; | |
| 259 | + | |
| 260 | + gpio@10040 { | |
| 261 | + compatible = "altr,pio-1.0"; | |
| 262 | + reg = <0x10040 0x20>; | |
| 263 | + altr,ngpio = <4>; | |
| 264 | + #gpio-cells = <2>; | |
| 265 | + clocks = <2>; | |
| 266 | + gpio-controller; | |
| 267 | + }; | |
| 268 | + | |
| 269 | + onchip-memory { | |
| 270 | + device_type = "memory"; | |
| 271 | + compatible = "altr,onchipmem-15.1"; | |
| 272 | + reg = <0x0 0x10000>; | |
| 278 | 273 | }; |
| 279 | 274 | }; |
| 280 | 275 | |
| @@ -371,25 +366,22 @@ Live Device Tree contains: · 90 unmodified lines | ||
| 371 | 366 | }; |
| 372 | 367 | |
| 373 | 368 | DT Overlay contains: |
| 374 | −/dts-v1/ /plugin/; | |
| 375 | −/ { | |
| 376 | −fragment@0 { | |
| 377 | − target = <&fpga_region0>; | |
| 369 | + | |
| 370 | +/dts-v1/; | |
| 371 | +/plugin/; | |
| 372 | + | |
| 373 | +&fpga_region0 { | |
| 378 | 374 | #address-cells = <1>; |
| 379 | 375 | #size-cells = <1>; |
| 380 | − __overlay__ { | |
| 381 | − #address-cells = <1>; | |
| 382 | − #size-cells = <1>; | |
| 383 | 376 | |
| 384 | − firmware-name = "zynq-gpio.bin"; | |
| 377 | + firmware-name = "zynq-gpio.bin"; | |
| 385 | 378 | |
| 386 | − gpio1: gpio@40000000 { | |
| 387 | − compatible = "xlnx,xps-gpio-1.00.a"; | |
| 388 | − reg = <0x40000000 0x10000>; | |
| 389 | − gpio-controller; | |
| 390 | − #gpio-cells = <0x2>; | |
| 391 | − xlnx,gpio-width= <0x6>; | |
| 392 | − }; | |
| 379 | + gpio1: gpio@40000000 { | |
| 380 | + compatible = "xlnx,xps-gpio-1.00.a"; | |
| 381 | + reg = <0x40000000 0x10000>; | |
| 382 | + gpio-controller; | |
| 383 | + #gpio-cells = <0x2>; | |
| 384 | + xlnx,gpio-width= <0x6>; | |
| 393 | 385 | }; |
| 394 | 386 | }; |
| 395 | 387 | |
| @@ -402,41 +394,37 @@ This example programs the FPGA to have two regions that can later be partially · 6 unmodified lines | ||
| 402 | 394 | configured. Each region has its own bridge in the FPGA fabric. |
| 403 | 395 | |
| 404 | 396 | DT Overlay contains: |
| 405 | −/dts-v1/ /plugin/; | |
| 406 | −/ { | |
| 407 | − fragment@0 { | |
| 408 | − target = <&fpga_region0>; | |
| 409 | − #address-cells = <1>; | |
| 410 | − #size-cells = <1>; | |
| 411 | − __overlay__ { | |
| 412 | − #address-cells = <1>; | |
| 413 | − #size-cells = <1>; | |
| 414 | − | |
| 415 | − firmware-name = "base.rbf"; | |
| 416 | − | |
| 417 | − fpga-bridge@4400 { | |
| 418 | − compatible = "altr,freeze-bridge-controller"; | |
| 419 | − reg = <0x4400 0x10>; | |
| 420 | − | |
| 421 | − fpga_region1: fpga-region1 { | |
| 422 | − compatible = "fpga-region"; | |
| 423 | − #address-cells = <0x1>; | |
| 424 | − #size-cells = <0x1>; | |
| 425 | − ranges; | |
| 426 | − }; | |
| 427 | − }; | |
| 428 | − | |
| 429 | − fpga-bridge@4420 { | |
| 430 | − compatible = "altr,freeze-bridge-controller"; | |
| 431 | − reg = <0x4420 0x10>; | |
| 432 | − | |
| 433 | − fpga_region2: fpga-region2 { | |
| 434 | − compatible = "fpga-region"; | |
| 435 | − #address-cells = <0x1>; | |
| 436 | − #size-cells = <0x1>; | |
| 437 | − ranges; | |
| 438 | − }; | |
| 439 | − }; | |
| 397 | + | |
| 398 | +/dts-v1/; | |
| 399 | +/plugin/; | |
| 400 | + | |
| 401 | +&fpga_region0 { | |
| 402 | + #address-cells = <1>; | |
| 403 | + #size-cells = <1>; | |
| 404 | + | |
| 405 | + firmware-name = "base.rbf"; | |
| 406 | + | |
| 407 | + fpga-bridge@4400 { | |
| 408 | + compatible = "altr,freeze-bridge-controller"; | |
| 409 | + reg = <0x4400 0x10>; | |
| 410 | + | |
| 411 | + fpga_region1: fpga-region1 { | |
| 412 | + compatible = "fpga-region"; | |
| 413 | + #address-cells = <0x1>; | |
| 414 | + #size-cells = <0x1>; | |
| 415 | + ranges; | |
| 416 | + }; | |
| 417 | + }; | |
| 418 | + | |
| 419 | + fpga-bridge@4420 { | |
| 420 | + compatible = "altr,freeze-bridge-controller"; | |
| 421 | + reg = <0x4420 0x10>; | |
| 422 | + | |
| 423 | + fpga_region2: fpga-region2 { | |
| 424 | + compatible = "fpga-region"; | |
| 425 | + #address-cells = <0x1>; | |
| 426 | + #size-cells = <0x1>; | |
| 427 | + ranges; | |
| 440 | 428 | }; |
| 441 | 429 | }; |
| 442 | 430 | }; |
| @@ -451,28 +439,23 @@ differences are that the FPGA is partially reconfigured due to the · 8 unmodified lines | ||
| 451 | 439 | "partial-fpga-config" boolean and the only bridge that is controlled during |
| 452 | 440 | programming is the FPGA based bridge of fpga_region1. |
| 453 | 441 | |
| 454 | −/dts-v1/ /plugin/; | |
| 455 | −/ { | |
| 456 | − fragment@0 { | |
| 457 | − target = <&fpga_region1>; | |
| 458 | − #address-cells = <1>; | |
| 459 | − #size-cells = <1>; | |
| 460 | − __overlay__ { | |
| 461 | − #address-cells = <1>; | |
| 462 | − #size-cells = <1>; | |
| 463 | − | |
| 464 | − firmware-name = "soc_image2.rbf"; | |
| 465 | − partial-fpga-config; | |
| 466 | − | |
| 467 | − gpio@10040 { | |
| 468 | − compatible = "altr,pio-1.0"; | |
| 469 | − reg = <0x10040 0x20>; | |
| 470 | − clocks = <0x2>; | |
| 471 | − altr,ngpio = <0x4>; | |
| 472 | − #gpio-cells = <0x2>; | |
| 473 | − gpio-controller; | |
| 474 | − }; | |
| 475 | − }; | |
| 442 | +/dts-v1/; | |
| 443 | +/plugin/; | |
| 444 | + | |
| 445 | +&fpga_region1 { | |
| 446 | + #address-cells = <1>; | |
| 447 | + #size-cells = <1>; | |
| 448 | + | |
| 449 | + firmware-name = "soc_image2.rbf"; | |
| 450 | + partial-fpga-config; | |
| 451 | + | |
| 452 | + gpio@10040 { | |
| 453 | + compatible = "altr,pio-1.0"; | |
| 454 | + reg = <0x10040 0x20>; | |
| 455 | + clocks = <0x2>; | |
| 456 | + altr,ngpio = <0x4>; | |
| 457 | + #gpio-cells = <0x2>; | |
| 458 | + gpio-controller; | |
| 476 | 459 | }; |
| 477 | 460 | }; |
| 478 | 461 | |
| @@ -7,13 +7,24 @@ changes from passing through the bridge. The controller can also · 6 unmodified lines | ||
| 7 | 7 | couple / enable the bridges which allows traffic to pass through the |
| 8 | 8 | bridge normally. |
| 9 | 9 | |
| 10 | +Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager | |
| 11 | +Softcore is compatible with the Xilinx LogiCORE pr-decoupler. | |
| 12 | + | |
| 13 | +The Dynamic Function eXchange AXI shutdown manager prevents AXI traffic | |
| 14 | +from passing through the bridge. The controller safely handles AXI4MM | |
| 15 | +and AXI4-Lite interfaces on a Reconfigurable Partition when it is | |
| 16 | +undergoing dynamic reconfiguration, preventing the system deadlock | |
| 17 | +that can occur if AXI transactions are interrupted by DFX | |
| 18 | + | |
| 10 | 19 | The Driver supports only MMIO handling. A PR region can have multiple |
| 11 | 20 | PR Decouplers which can be handled independently or chained via decouple/ |
| 12 | 21 | decouple_status signals. |
| 13 | 22 | |
| 14 | 23 | Required properties: |
| 15 | 24 | - compatible : Should contain "xlnx,pr-decoupler-1.00" followed by |
| 16 | − "xlnx,pr-decoupler" | |
| 25 | + "xlnx,pr-decoupler" or | |
| 26 | + "xlnx,dfx-axi-shutdown-manager-1.00" followed by | |
| 27 | + "xlnx,dfx-axi-shutdown-manager" | |
| 17 | 28 | - regs : base address and size for decoupler module |
| 18 | 29 | - clocks : input clock to IP |
| 19 | 30 | - clock-names : should contain "aclk" |
| @@ -22,6 +33,7 @@ See Documentation/devicetree/bindings/fpga/fpga-region.txt and · 2 unmodified lines | ||
| 22 | 33 | Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. |
| 23 | 34 | |
| 24 | 35 | Example: |
| 36 | +Partial Reconfig Decoupler: | |
| 25 | 37 | fpga-bridge@100000450 { |
| 26 | 38 | compatible = "xlnx,pr-decoupler-1.00", |
| 27 | 39 | "xlnx-pr-decoupler"; |
| @@ -30,3 +42,13 @@ Example: · 2 unmodified lines | ||
| 30 | 42 | clock-names = "aclk"; |
| 31 | 43 | bridge-enable = <0>; |
| 32 | 44 | }; |
| 45 | + | |
| 46 | +Dynamic Function eXchange AXI shutdown manager: | |
| 47 | + fpga-bridge@100000450 { | |
| 48 | + compatible = "xlnx,dfx-axi-shutdown-manager-1.00", | |
| 49 | + "xlnx,dfx-axi-shutdown-manager"; | |
| 50 | + regs = <0x10000045 0x10>; | |
| 51 | + clocks = <&clkc 15>; | |
| 52 | + clock-names = "aclk"; | |
| 53 | + bridge-enable = <0>; | |
| 54 | + }; | |
| @@ -1,46 +0,0 @@ | ||
| 1 | −Bindings for the Broadcom's brcm,bcm6345-gpio memory-mapped GPIO controllers. | |
| 2 | − | |
| 3 | −These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 | |
| 4 | −are the only ones which don't need a pinctrl driver. | |
| 5 | −BCM6338 have 8-bit data and dirout registers, where GPIO state can be read | |
| 6 | −and/or written, and the direction changed from input to output. | |
| 7 | −BCM6345 have 16-bit data and dirout registers, where GPIO state can be read | |
| 8 | −and/or written, and the direction changed from input to output. | |
| 9 | − | |
| 10 | −Required properties: | |
| 11 | − - compatible: should be "brcm,bcm6345-gpio" | |
| 12 | − - reg-names: must contain | |
| 13 | − "dat" - data register | |
| 14 | − "dirout" - direction (output) register | |
| 15 | − - reg: address + size pairs describing the GPIO register sets; | |
| 16 | − order must correspond with the order of entries in reg-names | |
| 17 | − - #gpio-cells: must be set to 2. The first cell is the pin number and | |
| 18 | − the second cell is used to specify the gpio polarity: | |
| 19 | − 0 = active high | |
| 20 | − 1 = active low | |
| 21 | − - gpio-controller: Marks the device node as a gpio controller. | |
| 22 | − | |
| 23 | −Optional properties: | |
| 24 | − - native-endian: use native endian memory. | |
| 25 | − | |
| 26 | −Examples: | |
| 27 | − - BCM6338: | |
| 28 | − gpio: gpio-controller@fffe0407 { | |
| 29 | − compatible = "brcm,bcm6345-gpio"; | |
| 30 | − reg-names = "dirout", "dat"; | |
| 31 | − reg = <0xfffe0407 1>, <0xfffe040f 1>; | |
| 32 | − | |
| 33 | − #gpio-cells = <2>; | |
| 34 | − gpio-controller; | |
| 35 | − }; | |
| 36 | − | |
| 37 | − - BCM6345: | |
| 38 | − gpio: gpio-controller@fffe0406 { | |
| 39 | − compatible = "brcm,bcm6345-gpio"; | |
| 40 | − reg-names = "dirout", "dat"; | |
| 41 | − reg = <0xfffe0406 2>, <0xfffe040a 2>; | |
| 42 | − native-endian; | |
| 43 | − | |
| 44 | − #gpio-cells = <2>; | |
| 45 | − gpio-controller; | |
| 46 | − }; | |
| @@ -0,0 +1,86 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/gpio/brcm,bcm6345-gpio.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6345 GPIO controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: |+ | |
| 14 | + Bindings for Broadcom's BCM63xx memory-mapped GPIO controllers. | |
| 15 | + | |
| 16 | + These bindings can be used on any BCM63xx SoC. However, BCM6338 and BCM6345 | |
| 17 | + are the only ones which don't need a pinctrl driver. | |
| 18 | + | |
| 19 | + BCM6338 have 8-bit data and dirout registers, where GPIO state can be read | |
| 20 | + and/or written, and the direction changed from input to output. | |
| 21 | + BCM6345 have 16-bit data and dirout registers, where GPIO state can be read | |
| 22 | + and/or written, and the direction changed from input to output. | |
| 23 | + BCM6318, BCM6328, BCM6358, BCM6362, BCM6368 and BCM63268 have 32-bit data | |
| 24 | + and dirout registers, where GPIO state can be read and/or written, and the | |
| 25 | + direction changed from input to output. | |
| 26 | + | |
| 27 | +properties: | |
| 28 | + compatible: | |
| 29 | + enum: | |
| 30 | + - brcm,bcm6318-gpio | |
| 31 | + - brcm,bcm6328-gpio | |
| 32 | + - brcm,bcm6345-gpio | |
| 33 | + - brcm,bcm6358-gpio | |
| 34 | + - brcm,bcm6362-gpio | |
| 35 | + - brcm,bcm6368-gpio | |
| 36 | + - brcm,bcm63268-gpio | |
| 37 | + | |
| 38 | + gpio-controller: true | |
| 39 | + | |
| 40 | + "#gpio-cells": | |
| 41 | + const: 2 | |
| 42 | + | |
| 43 | + gpio-ranges: | |
| 44 | + maxItems: 1 | |
| 45 | + | |
| 46 | + native-endian: true | |
| 47 | + | |
| 48 | + reg: | |
| 49 | + maxItems: 2 | |
| 50 | + | |
| 51 | + reg-names: | |
| 52 | + items: | |
| 53 | + - const: dirout | |
| 54 | + - const: dat | |
| 55 | + | |
| 56 | +required: | |
| 57 | + - compatible | |
| 58 | + - reg | |
| 59 | + - reg-names | |
| 60 | + - gpio-controller | |
| 61 | + - '#gpio-cells' | |
| 62 | + | |
| 63 | +additionalProperties: false | |
| 64 | + | |
| 65 | +examples: | |
| 66 | + - | | |
| 67 | + gpio@fffe0406 { | |
| 68 | + compatible = "brcm,bcm6345-gpio"; | |
| 69 | + reg-names = "dirout", "dat"; | |
| 70 | + reg = <0xfffe0406 2>, <0xfffe040a 2>; | |
| 71 | + native-endian; | |
| 72 | + | |
| 73 | + gpio-controller; | |
| 74 | + #gpio-cells = <2>; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + - | | |
| 78 | + gpio@0 { | |
| 79 | + compatible = "brcm,bcm63268-gpio"; | |
| 80 | + reg-names = "dirout", "dat"; | |
| 81 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 82 | + | |
| 83 | + gpio-controller; | |
| 84 | + gpio-ranges = <&pinctrl 0 0 52>; | |
| 85 | + #gpio-cells = <2>; | |
| 86 | + }; | |
| @@ -0,0 +1,77 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/gpio/fairchild,74hc595.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Generic 8-bit shift register | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Maxime Ripard <mripard@kernel.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - fairchild,74hc595 | |
| 16 | + - nxp,74lvc594 | |
| 17 | + | |
| 18 | + reg: | |
| 19 | + maxItems: 1 | |
| 20 | + | |
| 21 | + gpio-controller: true | |
| 22 | + | |
| 23 | + '#gpio-cells': | |
| 24 | + description: | |
| 25 | + The second cell is only used to specify the GPIO polarity. | |
| 26 | + const: 2 | |
| 27 | + | |
| 28 | + registers-number: | |
| 29 | + description: Number of daisy-chained shift registers | |
| 30 | + | |
| 31 | + enable-gpios: | |
| 32 | + description: GPIO connected to the OE (Output Enable) pin. | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + spi-max-frequency: true | |
| 36 | + | |
| 37 | +patternProperties: | |
| 38 | + "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": | |
| 39 | + type: object | |
| 40 | + | |
| 41 | + properties: | |
| 42 | + gpio-hog: true | |
| 43 | + gpios: true | |
| 44 | + output-high: true | |
| 45 | + output-low: true | |
| 46 | + line-name: true | |
| 47 | + | |
| 48 | + required: | |
| 49 | + - gpio-hog | |
| 50 | + - gpios | |
| 51 | + | |
| 52 | + additionalProperties: false | |
| 53 | + | |
| 54 | +required: | |
| 55 | + - compatible | |
| 56 | + - reg | |
| 57 | + - gpio-controller | |
| 58 | + - '#gpio-cells' | |
| 59 | + - registers-number | |
| 60 | + | |
| 61 | +additionalProperties: false | |
| 62 | + | |
| 63 | +examples: | |
| 64 | + - | | |
| 65 | + spi { | |
| 66 | + #address-cells = <1>; | |
| 67 | + #size-cells = <0>; | |
| 68 | + | |
| 69 | + gpio5: gpio5@0 { | |
| 70 | + compatible = "fairchild,74hc595"; | |
| 71 | + reg = <0>; | |
| 72 | + gpio-controller; | |
| 73 | + #gpio-cells = <2>; | |
| 74 | + registers-number = <4>; | |
| 75 | + spi-max-frequency = <100000>; | |
| 76 | + }; | |
| 77 | + }; | |
| @@ -1,27 +0,0 @@ | ||
| 1 | −* Generic 8-bits shift register GPIO driver | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: Should contain one of the following: | |
| 5 | − "fairchild,74hc595" | |
| 6 | − "nxp,74lvc594" | |
| 7 | −- reg : chip select number | |
| 8 | −- gpio-controller : Marks the device node as a gpio controller. | |
| 9 | −- #gpio-cells : Should be two. The first cell is the pin number and | |
| 10 | − the second cell is used to specify the gpio polarity: | |
| 11 | − 0 = active high | |
| 12 | − 1 = active low | |
| 13 | −- registers-number: Number of daisy-chained shift registers | |
| 14 | − | |
| 15 | −Optional properties: | |
| 16 | −- enable-gpios: GPIO connected to the OE (Output Enable) pin. | |
| 17 | − | |
| 18 | −Example: | |
| 19 | − | |
| 20 | −gpio5: gpio5@0 { | |
| 21 | − compatible = "fairchild,74hc595"; | |
| 22 | − reg = <0>; | |
| 23 | − gpio-controller; | |
| 24 | − #gpio-cells = <2>; | |
| 25 | − registers-number = <4>; | |
| 26 | − spi-max-frequency = <100000>; | |
| 27 | −}; | |
| @@ -0,0 +1,78 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/gpio/realtek,otto-gpio.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Realtek Otto GPIO controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Sander Vanheule <sander@svanheule.net> | |
| 11 | + - Bert Vermeulen <bert@biot.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + Realtek's GPIO controller on their MIPS switch SoCs (Otto platform) consists | |
| 15 | + of two banks of 32 GPIOs. These GPIOs can generate edge-triggered interrupts. | |
| 16 | + Each bank's interrupts are cascased into one interrupt line on the parent | |
| 17 | + interrupt controller, if provided. | |
| 18 | + This binding allows defining a single bank in the devicetree. The interrupt | |
| 19 | + controller is not supported on the fallback compatible name, which only | |
| 20 | + allows for GPIO port use. | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + $nodename: | |
| 24 | + pattern: "^gpio@[0-9a-f]+$" | |
| 25 | + | |
| 26 | + compatible: | |
| 27 | + items: | |
| 28 | + - enum: | |
| 29 | + - realtek,rtl8380-gpio | |
| 30 | + - realtek,rtl8390-gpio | |
| 31 | + - const: realtek,otto-gpio | |
| 32 | + | |
| 33 | + reg: | |
| 34 | + maxItems: 1 | |
| 35 | + | |
| 36 | + "#gpio-cells": | |
| 37 | + const: 2 | |
| 38 | + | |
| 39 | + gpio-controller: true | |
| 40 | + | |
| 41 | + ngpios: | |
| 42 | + minimum: 1 | |
| 43 | + maximum: 32 | |
| 44 | + | |
| 45 | + interrupt-controller: true | |
| 46 | + | |
| 47 | + "#interrupt-cells": | |
| 48 | + const: 2 | |
| 49 | + | |
| 50 | + interrupts: | |
| 51 | + maxItems: 1 | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - compatible | |
| 55 | + - reg | |
| 56 | + - "#gpio-cells" | |
| 57 | + - gpio-controller | |
| 58 | + | |
| 59 | +additionalProperties: false | |
| 60 | + | |
| 61 | +dependencies: | |
| 62 | + interrupt-controller: [ interrupts ] | |
| 63 | + | |
| 64 | +examples: | |
| 65 | + - | | |
| 66 | + gpio@3500 { | |
| 67 | + compatible = "realtek,rtl8380-gpio", "realtek,otto-gpio"; | |
| 68 | + reg = <0x3500 0x1c>; | |
| 69 | + gpio-controller; | |
| 70 | + #gpio-cells = <2>; | |
| 71 | + ngpios = <24>; | |
| 72 | + interrupt-controller; | |
| 73 | + #interrupt-cells = <2>; | |
| 74 | + interrupt-parent = <&rtlintc>; | |
| 75 | + interrupts = <23>; | |
| 76 | + }; | |
| 77 | + | |
| 78 | +... | |
| @@ -0,0 +1,82 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/gpio/rockchip,gpio-bank.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Rockchip GPIO bank | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Heiko Stuebner <heiko@sntech.de> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - rockchip,gpio-bank | |
| 16 | + - rockchip,rk3188-gpio-bank0 | |
| 17 | + | |
| 18 | + reg: | |
| 19 | + maxItems: 1 | |
| 20 | + | |
| 21 | + interrupts: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + clocks: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + gpio-controller: true | |
| 28 | + | |
| 29 | + "#gpio-cells": | |
| 30 | + const: 2 | |
| 31 | + | |
| 32 | + interrupt-controller: true | |
| 33 | + | |
| 34 | + "#interrupt-cells": | |
| 35 | + const: 2 | |
| 36 | + | |
| 37 | +required: | |
| 38 | + - compatible | |
| 39 | + - reg | |
| 40 | + - interrupts | |
| 41 | + - clocks | |
| 42 | + - gpio-controller | |
| 43 | + - "#gpio-cells" | |
| 44 | + - interrupt-controller | |
| 45 | + - "#interrupt-cells" | |
| 46 | + | |
| 47 | +additionalProperties: false | |
| 48 | + | |
| 49 | +examples: | |
| 50 | + - | | |
| 51 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 52 | + pinctrl: pinctrl { | |
| 53 | + #address-cells = <1>; | |
| 54 | + #size-cells = <1>; | |
| 55 | + ranges; | |
| 56 | + | |
| 57 | + gpio0: gpio@2000a000 { | |
| 58 | + compatible = "rockchip,rk3188-gpio-bank0"; | |
| 59 | + reg = <0x2000a000 0x100>; | |
| 60 | + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; | |
| 61 | + clocks = <&clk_gates8 9>; | |
| 62 | + | |
| 63 | + gpio-controller; | |
| 64 | + #gpio-cells = <2>; | |
| 65 | + | |
| 66 | + interrupt-controller; | |
| 67 | + #interrupt-cells = <2>; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + gpio1: gpio@2003c000 { | |
| 71 | + compatible = "rockchip,gpio-bank"; | |
| 72 | + reg = <0x2003c000 0x100>; | |
| 73 | + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; | |
| 74 | + clocks = <&clk_gates8 10>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + #gpio-cells = <2>; | |
| 78 | + | |
| 79 | + interrupt-controller; | |
| 80 | + #interrupt-cells = <2>; | |
| 81 | + }; | |
| 82 | + }; | |
| @@ -43,8 +43,7 @@ properties: · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | gpio-ranges: true |
| 45 | 45 | |
| 46 | − gpio-ranges-group-names: | |
| 47 | − $ref: /schemas/types.yaml#/definitions/string-array | |
| 46 | + gpio-ranges-group-names: true | |
| 48 | 47 | |
| 49 | 48 | socionext,interrupt-ranges: |
| 50 | 49 | description: | |
| @@ -69,6 +69,8 @@ properties: · 68 unmodified lines | ||
| 69 | 69 | |
| 70 | 70 | where voltage is in V, frequency is in MHz. |
| 71 | 71 | |
| 72 | + dma-coherent: true | |
| 73 | + | |
| 72 | 74 | required: |
| 73 | 75 | - compatible |
| 74 | 76 | - reg |
| @@ -1,28 +0,0 @@ | ||
| 1 | −SIRF Hardware spinlock device Binding | |
| 2 | −----------------------------------------------- | |
| 3 | − | |
| 4 | −Required properties : | |
| 5 | −- compatible : shall contain only one of the following: | |
| 6 | − "sirf,hwspinlock" | |
| 7 | − | |
| 8 | −- reg : the register address of hwspinlock | |
| 9 | − | |
| 10 | −- #hwlock-cells : hwlock users only use the hwlock id to represent a specific | |
| 11 | − hwlock, so the number of cells should be <1> here. | |
| 12 | − | |
| 13 | −Please look at the generic hwlock binding for usage information for consumers, | |
| 14 | −"Documentation/devicetree/bindings/hwlock/hwlock.txt" | |
| 15 | − | |
| 16 | −Example of hwlock provider: | |
| 17 | − hwlock { | |
| 18 | − compatible = "sirf,hwspinlock"; | |
| 19 | − reg = <0x13240000 0x00010000>; | |
| 20 | − #hwlock-cells = <1>; | |
| 21 | − }; | |
| 22 | − | |
| 23 | −Example of hwlock users: | |
| 24 | − node { | |
| 25 | − ... | |
| 26 | − hwlocks = <&hwlock 2>; | |
| 27 | − ... | |
| 28 | − }; | |
| @@ -1,62 +0,0 @@ | ||
| 1 | −* I2C | |
| 2 | − | |
| 3 | −Required properties : | |
| 4 | − | |
| 5 | − - reg : Offset and length of the register set for the device | |
| 6 | − - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a | |
| 7 | − compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121, | |
| 8 | − mpc5200 or mpc5200b. For the mpc5121, an additional node | |
| 9 | − "fsl,mpc5121-i2c-ctrl" is required as shown in the example below. | |
| 10 | − | |
| 11 | −Recommended properties : | |
| 12 | − | |
| 13 | − - interrupts : <a b> where a is the interrupt number and b is a | |
| 14 | − field that represents an encoding of the sense and level | |
| 15 | − information for the interrupt. This should be encoded based on | |
| 16 | − the information in section 2) depending on the type of interrupt | |
| 17 | − controller you have. | |
| 18 | − - fsl,preserve-clocking : boolean; if defined, the clock settings | |
| 19 | − from the bootloader are preserved (not touched). | |
| 20 | − - clock-frequency : desired I2C bus clock frequency in Hz. | |
| 21 | − - fsl,timeout : I2C bus timeout in microseconds. | |
| 22 | − | |
| 23 | −Examples : | |
| 24 | − | |
| 25 | − /* MPC5121 based board */ | |
| 26 | − i2c@1740 { | |
| 27 | − #address-cells = <1>; | |
| 28 | − #size-cells = <0>; | |
| 29 | − compatible = "fsl,mpc5121-i2c", "fsl-i2c"; | |
| 30 | − reg = <0x1740 0x20>; | |
| 31 | − interrupts = <11 0x8>; | |
| 32 | − interrupt-parent = <&ipic>; | |
| 33 | − clock-frequency = <100000>; | |
| 34 | − }; | |
| 35 | − | |
| 36 | − i2ccontrol@1760 { | |
| 37 | − compatible = "fsl,mpc5121-i2c-ctrl"; | |
| 38 | − reg = <0x1760 0x8>; | |
| 39 | − }; | |
| 40 | − | |
| 41 | − /* MPC5200B based board */ | |
| 42 | − i2c@3d00 { | |
| 43 | − #address-cells = <1>; | |
| 44 | − #size-cells = <0>; | |
| 45 | − compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; | |
| 46 | − reg = <0x3d00 0x40>; | |
| 47 | − interrupts = <2 15 0>; | |
| 48 | − interrupt-parent = <&mpc5200_pic>; | |
| 49 | − fsl,preserve-clocking; | |
| 50 | − }; | |
| 51 | − | |
| 52 | − /* MPC8544 base board */ | |
| 53 | − i2c@3100 { | |
| 54 | − #address-cells = <1>; | |
| 55 | − #size-cells = <0>; | |
| 56 | − compatible = "fsl,mpc8544-i2c", "fsl-i2c"; | |
| 57 | − reg = <0x3100 0x100>; | |
| 58 | − interrupts = <43 2>; | |
| 59 | − interrupt-parent = <&mpic>; | |
| 60 | − clock-frequency = <400000>; | |
| 61 | − fsl,timeout = <10000>; | |
| 62 | − }; | |
| @@ -0,0 +1,91 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Chris Packham <chris.packham@alliedtelesis.co.nz> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: /schemas/i2c/i2c-controller.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + oneOf: | |
| 18 | + - items: | |
| 19 | + - enum: | |
| 20 | + - mpc5200-i2c | |
| 21 | + - fsl,mpc5200-i2c | |
| 22 | + - fsl,mpc5121-i2c | |
| 23 | + - fsl,mpc8313-i2c | |
| 24 | + - fsl,mpc8543-i2c | |
| 25 | + - fsl,mpc8544-i2c | |
| 26 | + - const: fsl-i2c | |
| 27 | + - items: | |
| 28 | + - const: fsl,mpc5200b-i2c | |
| 29 | + - const: fsl,mpc5200-i2c | |
| 30 | + - const: fsl-i2c | |
| 31 | + | |
| 32 | + reg: | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + interrupts: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | + fsl,preserve-clocking: | |
| 39 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 40 | + description: | | |
| 41 | + if defined, the clock settings from the bootloader are | |
| 42 | + preserved (not touched) | |
| 43 | + | |
| 44 | + fsl,timeout: | |
| 45 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 46 | + description: | | |
| 47 | + I2C bus timeout in microseconds | |
| 48 | + | |
| 49 | +required: | |
| 50 | + - compatible | |
| 51 | + - reg | |
| 52 | + - interrupts | |
| 53 | + | |
| 54 | +unevaluatedProperties: false | |
| 55 | + | |
| 56 | +examples: | |
| 57 | + - | | |
| 58 | + /* MPC5121 based board */ | |
| 59 | + i2c@1740 { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <0>; | |
| 62 | + compatible = "fsl,mpc5121-i2c", "fsl-i2c"; | |
| 63 | + reg = <0x1740 0x20>; | |
| 64 | + interrupts = <11 0x8>; | |
| 65 | + interrupt-parent = <&ipic>; | |
| 66 | + clock-frequency = <100000>; | |
| 67 | + }; | |
| 68 | + | |
| 69 | + /* MPC5200B based board */ | |
| 70 | + i2c@3d00 { | |
| 71 | + #address-cells = <1>; | |
| 72 | + #size-cells = <0>; | |
| 73 | + compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c"; | |
| 74 | + reg = <0x3d00 0x40>; | |
| 75 | + interrupts = <2 15 0>; | |
| 76 | + interrupt-parent = <&mpc5200_pic>; | |
| 77 | + fsl,preserve-clocking; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + /* MPC8544 base board */ | |
| 81 | + i2c@3100 { | |
| 82 | + #address-cells = <1>; | |
| 83 | + #size-cells = <0>; | |
| 84 | + compatible = "fsl,mpc8544-i2c", "fsl-i2c"; | |
| 85 | + reg = <0x3100 0x100>; | |
| 86 | + interrupts = <43 2>; | |
| 87 | + interrupt-parent = <&mpic>; | |
| 88 | + clock-frequency = <400000>; | |
| 89 | + fsl,timeout = <10000>; | |
| 90 | + }; | |
| 91 | +... | |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | $id: "http://devicetree.org/schemas/i2c/xlnx,xps-iic-2.00.a.yaml#" |
| 5 | 5 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 6 | 6 | |
| 7 | −title: ilinx IIC controller Device Tree Bindings | |
| 7 | +title: Xilinx IIC controller Device Tree Bindings | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - info@mocean-labs.com |
| @@ -10,19 +10,19 @@ Required properties: · 9 unmodified lines | ||
| 10 | 10 | - reg: I3C master registers |
| 11 | 11 | |
| 12 | 12 | Mandatory properties defined by the generic binding (see |
| 13 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details): | |
| 13 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details): | |
| 14 | 14 | |
| 15 | 15 | - #address-cells: shall be set to 1 |
| 16 | 16 | - #size-cells: shall be set to 0 |
| 17 | 17 | |
| 18 | 18 | Optional properties defined by the generic binding (see |
| 19 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details): | |
| 19 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details): | |
| 20 | 20 | |
| 21 | 21 | - i2c-scl-hz |
| 22 | 22 | - i3c-scl-hz |
| 23 | 23 | |
| 24 | 24 | I3C device connected on the bus follow the generic description (see |
| 25 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details). | |
| 25 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details). | |
| 26 | 26 | |
| 27 | 27 | Example: |
| 28 | 28 | |
| @@ -157,9 +157,10 @@ examples: · 156 unmodified lines | ||
| 157 | 157 | i2c-scl-hz = <100000>; |
| 158 | 158 | |
| 159 | 159 | /* I2C device. */ |
| 160 | − nunchuk: nunchuk@52 { | |
| 161 | − compatible = "nintendo,nunchuk"; | |
| 162 | − reg = <0x52 0x0 0x10>; | |
| 160 | + eeprom@57 { | |
| 161 | + compatible = "atmel,24c01"; | |
| 162 | + reg = <0x57 0x0 0x10>; | |
| 163 | + pagesize = <0x8>; | |
| 163 | 164 | }; |
| 164 | 165 | |
| 165 | 166 | /* I3C device with a static I2C address. */ |
| @@ -49,7 +49,7 @@ additionalProperties: true · 48 unmodified lines | ||
| 49 | 49 | examples: |
| 50 | 50 | - | |
| 51 | 51 | i3c-master@a0000000 { |
| 52 | − compatible = "silvaco,i3c-master"; | |
| 52 | + compatible = "silvaco,i3c-master-v1"; | |
| 53 | 53 | clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>; |
| 54 | 54 | clock-names = "pclk", "fast_clk", "slow_clk"; |
| 55 | 55 | interrupt-parent = <&gic>; |
| @@ -9,19 +9,19 @@ Required properties: · 8 unmodified lines | ||
| 9 | 9 | - reg: Offset and length of I3C master registers |
| 10 | 10 | |
| 11 | 11 | Mandatory properties defined by the generic binding (see |
| 12 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details): | |
| 12 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details): | |
| 13 | 13 | |
| 14 | 14 | - #address-cells: shall be set to 3 |
| 15 | 15 | - #size-cells: shall be set to 0 |
| 16 | 16 | |
| 17 | 17 | Optional properties defined by the generic binding (see |
| 18 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details): | |
| 18 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details): | |
| 19 | 19 | |
| 20 | 20 | - i2c-scl-hz |
| 21 | 21 | - i3c-scl-hz |
| 22 | 22 | |
| 23 | 23 | I3C device connected on the bus follow the generic description (see |
| 24 | −Documentation/devicetree/bindings/i3c/i3c.txt for more details). | |
| 24 | +Documentation/devicetree/bindings/i3c/i3c.yaml for more details). | |
| 25 | 25 | |
| 26 | 26 | Example: |
| 27 | 27 | |
| @@ -0,0 +1,68 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/accel/bosch,bmi088.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Bosch BMI088 IMU accelerometer part | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Mike Looijmans <mike.looijmans@topic.nl> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Acceleration part of the IMU sensor with an SPI interface | |
| 14 | + Specifications about the sensor can be found at: | |
| 15 | + https://www.bosch-sensortec.com/media/boschsensortec/downloads/datasheets/bst-bmi088-ds001.pdf | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + enum: | |
| 20 | + - bosch,bmi088-accel | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + spi-max-frequency: true | |
| 26 | + | |
| 27 | + vdd-supply: true | |
| 28 | + | |
| 29 | + vddio-supply: true | |
| 30 | + | |
| 31 | + interrupts: | |
| 32 | + minItems: 1 | |
| 33 | + maxItems: 2 | |
| 34 | + description: | | |
| 35 | + Type should be either IRQ_TYPE_LEVEL_HIGH or IRQ_TYPE_LEVEL_LOW. | |
| 36 | + Two configurable interrupt lines exist. | |
| 37 | + | |
| 38 | + interrupt-names: | |
| 39 | + description: Specify which interrupt line is in use. | |
| 40 | + items: | |
| 41 | + enum: | |
| 42 | + - INT1 | |
| 43 | + - INT2 | |
| 44 | + minItems: 1 | |
| 45 | + maxItems: 2 | |
| 46 | + | |
| 47 | +required: | |
| 48 | + - compatible | |
| 49 | + - reg | |
| 50 | + | |
| 51 | +additionalProperties: false | |
| 52 | + | |
| 53 | +examples: | |
| 54 | + - | | |
| 55 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 56 | + spi { | |
| 57 | + #address-cells = <1>; | |
| 58 | + #size-cells = <0>; | |
| 59 | + bmi088-accel@1 { | |
| 60 | + compatible = "bosch,bmi088-accel"; | |
| 61 | + reg = <1>; | |
| 62 | + spi-max-frequency = <10000000>; | |
| 63 | + interrupt-parent = <&gpio6>; | |
| 64 | + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; | |
| 65 | + interrupt-names = "INT2"; | |
| 66 | + }; | |
| 67 | + }; | |
| 68 | +... | |
| @@ -53,11 +53,6 @@ examples: · 52 unmodified lines | ||
| 53 | 53 | #address-cells = <1>; |
| 54 | 54 | #size-cells = <1>; |
| 55 | 55 | |
| 56 | − ts_adc_syscon: ts_adc_syscon@180a6000 { | |
| 57 | − compatible = "brcm,iproc-ts-adc-syscon","syscon"; | |
| 58 | − reg = <0x180a6000 0xc30>; | |
| 59 | − }; | |
| 60 | − | |
| 61 | 56 | adc { |
| 62 | 57 | compatible = "brcm,iproc-static-adc"; |
| 63 | 58 | adc-syscon = <&ts_adc_syscon>; |
| @@ -34,6 +34,7 @@ properties: · 33 unmodified lines | ||
| 34 | 34 | - items: |
| 35 | 35 | - enum: |
| 36 | 36 | - mediatek,mt8183-auxadc |
| 37 | + - mediatek,mt8195-auxadc | |
| 37 | 38 | - mediatek,mt8516-auxadc |
| 38 | 39 | - const: mediatek,mt8173-auxadc |
| 39 | 40 | |
| @@ -0,0 +1,181 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/adc/ti,ads131e08.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Tomislav Denis <tomislav.denis@avl.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The ADS131E0x are a family of multichannel, simultaneous sampling, | |
| 14 | + 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a | |
| 15 | + built-in programmable gain amplifier (PGA), internal reference | |
| 16 | + and an onboard oscillator. | |
| 17 | + The communication with ADC chip is via the SPI bus (mode 1). | |
| 18 | + | |
| 19 | + https://www.ti.com/lit/ds/symlink/ads131e08.pdf | |
| 20 | + | |
| 21 | +properties: | |
| 22 | + compatible: | |
| 23 | + enum: | |
| 24 | + - ti,ads131e04 | |
| 25 | + - ti,ads131e06 | |
| 26 | + - ti,ads131e08 | |
| 27 | + | |
| 28 | + reg: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + spi-max-frequency: true | |
| 32 | + | |
| 33 | + spi-cpha: true | |
| 34 | + | |
| 35 | + clocks: | |
| 36 | + description: | | |
| 37 | + Device tree identifier to the clock source (2.048 MHz). | |
| 38 | + Note: clock source is selected using CLKSEL pin. | |
| 39 | + maxItems: 1 | |
| 40 | + | |
| 41 | + clock-names: | |
| 42 | + items: | |
| 43 | + - const: adc-clk | |
| 44 | + | |
| 45 | + interrupts: | |
| 46 | + description: | | |
| 47 | + IRQ line for the ADC data ready. | |
| 48 | + maxItems: 1 | |
| 49 | + | |
| 50 | + vref-supply: | |
| 51 | + description: | | |
| 52 | + Optional external voltage reference. If not supplied, internal voltage | |
| 53 | + reference is used. | |
| 54 | + | |
| 55 | + ti,vref-internal: | |
| 56 | + description: | | |
| 57 | + Select the internal voltage reference value. | |
| 58 | + 0: 2.4V | |
| 59 | + 1: 4.0V | |
| 60 | + If this field is left empty, 2.4V is selected. | |
| 61 | + Note: internal voltage reference is used only if vref-supply is not supplied. | |
| 62 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 63 | + enum: [0, 1] | |
| 64 | + default: 0 | |
| 65 | + | |
| 66 | + '#address-cells': | |
| 67 | + const: 1 | |
| 68 | + | |
| 69 | + '#size-cells': | |
| 70 | + const: 0 | |
| 71 | + | |
| 72 | +required: | |
| 73 | + - compatible | |
| 74 | + - reg | |
| 75 | + - spi-cpha | |
| 76 | + - clocks | |
| 77 | + - clock-names | |
| 78 | + - interrupts | |
| 79 | + | |
| 80 | +patternProperties: | |
| 81 | + "^channel@([0-7])$": | |
| 82 | + $ref: "adc.yaml" | |
| 83 | + type: object | |
| 84 | + description: | | |
| 85 | + Represents the external channels which are connected to the ADC. | |
| 86 | + | |
| 87 | + properties: | |
| 88 | + reg: | |
| 89 | + description: | | |
| 90 | + The channel number. | |
| 91 | + Up to 4 channels, numbered from 0 to 3 for ti,ads131e04. | |
| 92 | + Up to 6 channels, numbered from 0 to 5 for ti,ads131e06. | |
| 93 | + Up to 8 channels, numbered from 0 to 7 for ti,ads131e08. | |
| 94 | + items: | |
| 95 | + minimum: 0 | |
| 96 | + maximum: 7 | |
| 97 | + | |
| 98 | + ti,gain: | |
| 99 | + description: | | |
| 100 | + The PGA gain value for the channel. | |
| 101 | + If this field is left empty, PGA gain 1 is used. | |
| 102 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 103 | + enum: [1, 2, 4, 8, 12] | |
| 104 | + default: 1 | |
| 105 | + | |
| 106 | + ti,mux: | |
| 107 | + description: | | |
| 108 | + Channel input selection(muliplexer). | |
| 109 | + 0: Normal input. | |
| 110 | + 1: Input shorted to (VREFP + VREFN) / 2 (for offset or noise measurements). | |
| 111 | + 3: MVDD (for supply measurement) | |
| 112 | + 4: Temperature sensor | |
| 113 | + If this field is left empty, normal input is selected. | |
| 114 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 115 | + enum: [0, 1, 3, 4] | |
| 116 | + default: 0 | |
| 117 | + | |
| 118 | + required: | |
| 119 | + - reg | |
| 120 | + | |
| 121 | + additionalProperties: false | |
| 122 | + | |
| 123 | +additionalProperties: false | |
| 124 | + | |
| 125 | +examples: | |
| 126 | + - | | |
| 127 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 128 | + | |
| 129 | + spi { | |
| 130 | + #address-cells = <1>; | |
| 131 | + #size-cells = <0>; | |
| 132 | + | |
| 133 | + adc@0 { | |
| 134 | + compatible = "ti,ads131e08"; | |
| 135 | + reg = <0>; | |
| 136 | + spi-max-frequency = <1000000>; | |
| 137 | + spi-cpha; | |
| 138 | + clocks = <&clk2048k>; | |
| 139 | + clock-names = "adc-clk"; | |
| 140 | + interrupt-parent = <&gpio5>; | |
| 141 | + interrupts = <28 IRQ_TYPE_EDGE_FALLING>; | |
| 142 | + vref-supply = <&adc_vref>; | |
| 143 | + | |
| 144 | + #address-cells = <1>; | |
| 145 | + #size-cells = <0>; | |
| 146 | + | |
| 147 | + channel@0 { | |
| 148 | + reg = <0>; | |
| 149 | + }; | |
| 150 | + | |
| 151 | + channel@1 { | |
| 152 | + reg = <1>; | |
| 153 | + }; | |
| 154 | + | |
| 155 | + channel@2 { | |
| 156 | + reg = <2>; | |
| 157 | + ti,gain = <2>; | |
| 158 | + }; | |
| 159 | + | |
| 160 | + channel@3 { | |
| 161 | + reg = <3>; | |
| 162 | + }; | |
| 163 | + | |
| 164 | + channel@4 { | |
| 165 | + reg = <4>; | |
| 166 | + }; | |
| 167 | + | |
| 168 | + channel@5 { | |
| 169 | + reg = <5>; | |
| 170 | + }; | |
| 171 | + | |
| 172 | + channel@6 { | |
| 173 | + reg = <6>; | |
| 174 | + }; | |
| 175 | + | |
| 176 | + channel@7 { | |
| 177 | + reg = <7>; | |
| 178 | + ti,mux = <4>; | |
| 179 | + }; | |
| 180 | + }; | |
| 181 | + }; | |
| @@ -0,0 +1,69 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/iio/cdc/adi,ad7150.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Analog device AD7150 and similar capacitance to digital convertors. | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jonathan Cameron <jic23@kernel.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - adi,ad7150 | |
| 16 | + - adi,ad7151 | |
| 17 | + - adi,ad7156 | |
| 18 | + | |
| 19 | + reg: | |
| 20 | + maxItems: 1 | |
| 21 | + | |
| 22 | + vdd-supply: true | |
| 23 | + | |
| 24 | + interrupts: true | |
| 25 | + | |
| 26 | +allOf: | |
| 27 | + - if: | |
| 28 | + properties: | |
| 29 | + compatible: | |
| 30 | + contains: | |
| 31 | + enum: | |
| 32 | + - adi,ad7150 | |
| 33 | + - adi,ad7156 | |
| 34 | + then: | |
| 35 | + properties: | |
| 36 | + interrupts: | |
| 37 | + minItems: 2 | |
| 38 | + maxItems: 2 | |
| 39 | + - if: | |
| 40 | + properties: | |
| 41 | + compatible: | |
| 42 | + contains: | |
| 43 | + const: adi,ad7151 | |
| 44 | + then: | |
| 45 | + properties: | |
| 46 | + interrupts: | |
| 47 | + minItems: 1 | |
| 48 | + maxItems: 1 | |
| 49 | + | |
| 50 | +required: | |
| 51 | + - compatible | |
| 52 | + - reg | |
| 53 | + | |
| 54 | +additionalProperties: false | |
| 55 | + | |
| 56 | +examples: | |
| 57 | + - | | |
| 58 | + i2c { | |
| 59 | + #address-cells = <1>; | |
| 60 | + #size-cells = <0>; | |
| 61 | + | |
| 62 | + cdc@48 { | |
| 63 | + compatible = "adi,ad7150"; | |
| 64 | + reg = <0x48>; | |
| 65 | + interrupts = <25 2>, <26 2>; | |
| 66 | + interrupt-parent = <&gpio>; | |
| 67 | + }; | |
| 68 | + }; | |
| 69 | +... | |
| @@ -83,7 +83,7 @@ examples: · 82 unmodified lines | ||
| 83 | 83 | #size-cells = <0>; |
| 84 | 84 | |
| 85 | 85 | gyroscope@0 { |
| 86 | − compatible = "nxp,fxas2102c"; | |
| 86 | + compatible = "nxp,fxas21002c"; | |
| 87 | 87 | reg = <0x0>; |
| 88 | 88 | |
| 89 | 89 | spi-max-frequency = <2000000>; |
| @@ -71,15 +71,6 @@ properties: · 70 unmodified lines | ||
| 71 | 71 | minimum: 0 |
| 72 | 72 | maximum: 3 |
| 73 | 73 | |
| 74 | − adi,scaled-output-hz: | |
| 75 | − description: | |
| 76 | − This property must be present if the clock mode is scaled-sync through | |
| 77 | − clock-names property. In this mode, the input clock can have a range | |
| 78 | − of 1Hz to 128HZ which must be scaled to originate an allowable sample | |
| 79 | − rate. This property specifies that rate. | |
| 80 | − minimum: 1900 | |
| 81 | − maximum: 2100 | |
| 82 | − | |
| 83 | 74 | required: |
| 84 | 75 | - compatible |
| 85 | 76 | - reg |
| @@ -48,7 +48,6 @@ properties: · 47 unmodified lines | ||
| 48 | 48 | vdd-supply: true |
| 49 | 49 | |
| 50 | 50 | capella,aset-resistance-ohms: |
| 51 | − $ref: /schemas/types.yaml#/definitions/uint32 | |
| 52 | 51 | enum: [50000, 100000, 300000, 600000] |
| 53 | 52 | description: > |
| 54 | 53 | Sensitivity calibration resistance. Note that calibration curves |
| @@ -11,12 +11,12 @@ maintainers: · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | properties: |
| 13 | 13 | compatible: |
| 14 | − const: upisemi,asd5182 | |
| 14 | + const: upisemi,usd5182 | |
| 15 | 15 | |
| 16 | 16 | reg: |
| 17 | 17 | maxItems: 1 |
| 18 | 18 | |
| 19 | − upsemi,glass-coef: | |
| 19 | + upisemi,glass-coef: | |
| 20 | 20 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 21 | 21 | description: | |
| 22 | 22 | glass attenuation factor - compensation factor of resolution 1000 |
| @@ -0,0 +1,37 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | + | |
| 5 | +$id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml# | |
| 6 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 7 | + | |
| 8 | +title: ChromeOS EC MKBP Proximity Sensor | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Stephen Boyd <swboyd@chromium.org> | |
| 12 | + - Benson Leung <bleung@chromium.org> | |
| 13 | + - Enric Balletbo i Serra <enric.balletbo@collabora.com> | |
| 14 | + | |
| 15 | +description: | | |
| 16 | + Google's ChromeOS EC sometimes has the ability to detect user proximity. | |
| 17 | + This is implemented on the EC as near/far logic and exposed to the OS | |
| 18 | + via an MKBP switch bit. | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + compatible: | |
| 22 | + const: google,cros-ec-mkbp-proximity | |
| 23 | + | |
| 24 | + label: | |
| 25 | + description: Name for proximity sensor | |
| 26 | + | |
| 27 | +required: | |
| 28 | + - compatible | |
| 29 | + | |
| 30 | +additionalProperties: false | |
| 31 | + | |
| 32 | +examples: | |
| 33 | + - | | |
| 34 | + proximity { | |
| 35 | + compatible = "google,cros-ec-mkbp-proximity"; | |
| 36 | + label = "proximity-wifi-lte"; | |
| 37 | + }; | |
| @@ -66,6 +66,7 @@ properties: · 65 unmodified lines | ||
| 66 | 66 | - st,lis3mdl-magn |
| 67 | 67 | - st,lis2mdl |
| 68 | 68 | - st,lsm9ds1-magn |
| 69 | + - st,iis2mdc | |
| 69 | 70 | # Pressure sensors |
| 70 | 71 | - st,lps001wp-press |
| 71 | 72 | - st,lps25h-press |
| @@ -1,12 +1,9 @@ | ||
| 1 | 1 | .. SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | |
| 3 | −=========== | |
| 4 | −Device Tree | |
| 5 | −=========== | |
| 6 | − | |
| 7 | 3 | .. toctree:: |
| 8 | 4 | :maxdepth: 1 |
| 9 | 5 | |
| 10 | 6 | ABI |
| 11 | − submitting-patches | |
| 12 | 7 | writing-bindings |
| 8 | + writing-schema | |
| 9 | + submitting-patches | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | Hisilicon RoCE DT description |
| 2 | 2 | |
| 3 | 3 | Hisilicon RoCE engine is a part of network subsystem. |
| 4 | −It works depending on other part of network wubsytem, such as, gmac and | |
| 4 | +It works depending on other part of network subsystem, such as gmac and | |
| 5 | 5 | dsa fabric. |
| 6 | 6 | |
| 7 | 7 | Additional properties are described here: |
| @@ -39,6 +39,13 @@ properties: · 38 unmodified lines | ||
| 39 | 39 | (active low). The line must be flagged with |
| 40 | 40 | GPIO_ACTIVE_LOW. |
| 41 | 41 | |
| 42 | + wake-gpios: | |
| 43 | + maxItems: 1 | |
| 44 | + description: | |
| 45 | + Optional GPIO specifier for the touchscreen's wake pin | |
| 46 | + (active low). The line must be flagged with | |
| 47 | + GPIO_ACTIVE_LOW. | |
| 48 | + | |
| 42 | 49 | linux,gpio-keymap: |
| 43 | 50 | $ref: /schemas/types.yaml#/definitions/uint32-array |
| 44 | 51 | description: | |
| @@ -53,6 +60,29 @@ properties: · 8 unmodified lines | ||
| 53 | 60 | or experiment to determine which bit corresponds to which input. Use |
| 54 | 61 | KEY_RESERVED for unused padding values. |
| 55 | 62 | |
| 63 | + atmel,wakeup-method: | |
| 64 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 65 | + description: | | |
| 66 | + The WAKE line is an active-low input that is used to wake up the touch | |
| 67 | + controller from deep-sleep mode before communication with the controller | |
| 68 | + could be started. This optional feature used to minimize current | |
| 69 | + consumption when the controller is in deep sleep mode. This feature is | |
| 70 | + relevant only to some controller families, like mXT1386 controller for | |
| 71 | + example. | |
| 72 | + | |
| 73 | + The WAKE pin can be connected in one of the following ways: | |
| 74 | + 1) left permanently low | |
| 75 | + 2) connected to the I2C-compatible SCL pin | |
| 76 | + 3) connected to a GPIO pin on the host | |
| 77 | + enum: | |
| 78 | + - 0 # ATMEL_MXT_WAKEUP_NONE | |
| 79 | + - 1 # ATMEL_MXT_WAKEUP_I2C_SCL | |
| 80 | + - 2 # ATMEL_MXT_WAKEUP_GPIO | |
| 81 | + default: 0 | |
| 82 | + | |
| 83 | + wakeup-source: | |
| 84 | + type: boolean | |
| 85 | + | |
| 56 | 86 | required: |
| 57 | 87 | - compatible |
| 58 | 88 | - reg |
| @@ -63,6 +93,7 @@ additionalProperties: false · 4 unmodified lines | ||
| 63 | 93 | examples: |
| 64 | 94 | - | |
| 65 | 95 | #include <dt-bindings/interrupt-controller/irq.h> |
| 96 | + #include <dt-bindings/input/atmel-maxtouch.h> | |
| 66 | 97 | #include <dt-bindings/gpio/gpio.h> |
| 67 | 98 | i2c { |
| 68 | 99 | #address-cells = <1>; |
| @@ -75,6 +106,7 @@ examples: · 6 unmodified lines | ||
| 75 | 106 | reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; |
| 76 | 107 | vdda-supply = <&ab8500_ldo_aux2_reg>; |
| 77 | 108 | vdd-supply = <&ab8500_ldo_aux5_reg>; |
| 109 | + atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>; | |
| 78 | 110 | }; |
| 79 | 111 | }; |
| 80 | 112 | |
| @@ -32,6 +32,12 @@ properties: · 31 unmodified lines | ||
| 32 | 32 | Duration in seconds which the key should be kept pressed for device to |
| 33 | 33 | power off automatically. Device with key pressed shutdown feature can |
| 34 | 34 | specify this property. |
| 35 | + | |
| 36 | + reset-time-sec: | |
| 37 | + description: | |
| 38 | + Duration in seconds which the key should be kept pressed for device to | |
| 39 | + reset automatically. Device with key pressed reset feature can specify | |
| 40 | + this property. | |
| 35 | 41 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 36 | 42 | |
| 37 | 43 | additionalProperties: true |
| @@ -0,0 +1,843 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/iqs626a.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Azoteq IQS626A Capacitive Touch Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jeff LaBundy <jeff@labundy.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The Azoteq IQS626A is a 14-channel capacitive touch controller that features | |
| 14 | + additional Hall-effect and inductive sensing capabilities. | |
| 15 | + | |
| 16 | + Link to datasheet: https://www.azoteq.com/ | |
| 17 | + | |
| 18 | +allOf: | |
| 19 | + - $ref: touchscreen/touchscreen.yaml# | |
| 20 | + | |
| 21 | +properties: | |
| 22 | + compatible: | |
| 23 | + const: azoteq,iqs626a | |
| 24 | + | |
| 25 | + reg: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + interrupts: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + "#address-cells": | |
| 32 | + const: 1 | |
| 33 | + | |
| 34 | + "#size-cells": | |
| 35 | + const: 0 | |
| 36 | + | |
| 37 | + azoteq,suspend-mode: | |
| 38 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 39 | + enum: [0, 1, 2, 3] | |
| 40 | + default: 0 | |
| 41 | + description: | | |
| 42 | + Specifies the power mode during suspend as follows: | |
| 43 | + 0: Automatic (same as normal runtime, i.e. suspend/resume disabled) | |
| 44 | + 1: Low power (all sensing at a reduced reporting rate) | |
| 45 | + 2: Ultra-low power (ULP channel proximity sensing) | |
| 46 | + 3: Halt (no sensing) | |
| 47 | + | |
| 48 | + azoteq,clk-div: | |
| 49 | + type: boolean | |
| 50 | + description: Divides the device's core clock by a factor of 4. | |
| 51 | + | |
| 52 | + azoteq,ulp-enable: | |
| 53 | + type: boolean | |
| 54 | + description: | |
| 55 | + Permits the device to automatically enter ultra-low-power mode from low- | |
| 56 | + power mode. | |
| 57 | + | |
| 58 | + azoteq,ulp-update: | |
| 59 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 60 | + enum: [0, 1, 2, 3, 4, 5, 6, 7] | |
| 61 | + default: 3 | |
| 62 | + description: | | |
| 63 | + Specifies the rate at which the trackpad, generic and Hall channels are | |
| 64 | + updated during ultra-low-power mode as follows: | |
| 65 | + 0: 8 | |
| 66 | + 1: 13 | |
| 67 | + 2: 28 | |
| 68 | + 3: 54 | |
| 69 | + 4: 89 | |
| 70 | + 5: 135 | |
| 71 | + 6: 190 | |
| 72 | + 7: 256 | |
| 73 | + | |
| 74 | + azoteq,ati-band-disable: | |
| 75 | + type: boolean | |
| 76 | + description: Disables the ATI band check. | |
| 77 | + | |
| 78 | + azoteq,ati-lp-only: | |
| 79 | + type: boolean | |
| 80 | + description: Limits automatic ATI to low-power mode. | |
| 81 | + | |
| 82 | + azoteq,gpio3-select: | |
| 83 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 84 | + enum: [0, 1, 2, 3, 4, 5, 6, 7] | |
| 85 | + default: 1 | |
| 86 | + description: | | |
| 87 | + Selects the channel or group of channels for which the GPIO3 pin | |
| 88 | + represents touch state as follows: | |
| 89 | + 0: None | |
| 90 | + 1: ULP channel | |
| 91 | + 2: Trackpad | |
| 92 | + 3: Trackpad | |
| 93 | + 4: Generic channel 0 | |
| 94 | + 5: Generic channel 1 | |
| 95 | + 6: Generic channel 2 | |
| 96 | + 7: Hall channel | |
| 97 | + | |
| 98 | + azoteq,reseed-select: | |
| 99 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 100 | + enum: [0, 1, 2, 3] | |
| 101 | + default: 0 | |
| 102 | + description: | | |
| 103 | + Specifies the event(s) that prompt the device to reseed (i.e. reset the | |
| 104 | + long-term average) of an associated channel as follows: | |
| 105 | + 0: None | |
| 106 | + 1: Proximity | |
| 107 | + 2: Proximity or touch | |
| 108 | + 3: Proximity, touch or deep touch | |
| 109 | + | |
| 110 | + azoteq,thresh-extend: | |
| 111 | + type: boolean | |
| 112 | + description: Multiplies all touch and deep-touch thresholds by 4. | |
| 113 | + | |
| 114 | + azoteq,tracking-enable: | |
| 115 | + type: boolean | |
| 116 | + description: | |
| 117 | + Enables all associated channels to track their respective reference | |
| 118 | + channels. | |
| 119 | + | |
| 120 | + azoteq,reseed-offset: | |
| 121 | + type: boolean | |
| 122 | + description: | |
| 123 | + Applies an 8-count offset to all long-term averages upon either ATI or | |
| 124 | + reseed events. | |
| 125 | + | |
| 126 | + azoteq,rate-np-ms: | |
| 127 | + minimum: 0 | |
| 128 | + maximum: 255 | |
| 129 | + default: 150 | |
| 130 | + description: Specifies the report rate (in ms) during normal-power mode. | |
| 131 | + | |
| 132 | + azoteq,rate-lp-ms: | |
| 133 | + minimum: 0 | |
| 134 | + maximum: 255 | |
| 135 | + default: 150 | |
| 136 | + description: Specifies the report rate (in ms) during low-power mode. | |
| 137 | + | |
| 138 | + azoteq,rate-ulp-ms: | |
| 139 | + multipleOf: 16 | |
| 140 | + minimum: 0 | |
| 141 | + maximum: 4080 | |
| 142 | + default: 0 | |
| 143 | + description: Specifies the report rate (in ms) during ultra-low-power mode. | |
| 144 | + | |
| 145 | + azoteq,timeout-pwr-ms: | |
| 146 | + multipleOf: 512 | |
| 147 | + minimum: 0 | |
| 148 | + maximum: 130560 | |
| 149 | + default: 2560 | |
| 150 | + description: | |
| 151 | + Specifies the length of time (in ms) to wait for an event before moving | |
| 152 | + from normal-power mode to low-power mode, or (if 'azoteq,ulp-enable' is | |
| 153 | + present) from low-power mode to ultra-low-power mode. | |
| 154 | + | |
| 155 | + azoteq,timeout-lta-ms: | |
| 156 | + multipleOf: 512 | |
| 157 | + minimum: 0 | |
| 158 | + maximum: 130560 | |
| 159 | + default: 40960 | |
| 160 | + description: | |
| 161 | + Specifies the length of time (in ms) to wait before resetting the long- | |
| 162 | + term average of all channels. Specify the maximum timeout to disable it | |
| 163 | + altogether. | |
| 164 | + | |
| 165 | + touchscreen-inverted-x: true | |
| 166 | + touchscreen-inverted-y: true | |
| 167 | + touchscreen-swapped-x-y: true | |
| 168 | + | |
| 169 | +patternProperties: | |
| 170 | + "^ulp-0|generic-[0-2]|hall$": | |
| 171 | + type: object | |
| 172 | + description: | |
| 173 | + Represents a single sensing channel. A channel is active if defined and | |
| 174 | + inactive otherwise. | |
| 175 | + | |
| 176 | + properties: | |
| 177 | + azoteq,ati-exclude: | |
| 178 | + type: boolean | |
| 179 | + description: | |
| 180 | + Prevents the channel from participating in an ATI event that is | |
| 181 | + manually triggered during initialization. | |
| 182 | + | |
| 183 | + azoteq,reseed-disable: | |
| 184 | + type: boolean | |
| 185 | + description: | |
| 186 | + Prevents the channel from being reseeded if the long-term average | |
| 187 | + timeout (defined in 'azoteq,timeout-lta') expires. | |
| 188 | + | |
| 189 | + azoteq,meas-cap-decrease: | |
| 190 | + type: boolean | |
| 191 | + description: | |
| 192 | + Decreases the internal measurement capacitance from 60 pF to 15 pF. | |
| 193 | + | |
| 194 | + azoteq,rx-inactive: | |
| 195 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 196 | + enum: [0, 1, 2] | |
| 197 | + default: 0 | |
| 198 | + description: | | |
| 199 | + Specifies how inactive CRX pins are to be terminated as follows: | |
| 200 | + 0: VSS | |
| 201 | + 1: Floating | |
| 202 | + 2: VREG (generic channels only) | |
| 203 | + | |
| 204 | + azoteq,linearize: | |
| 205 | + type: boolean | |
| 206 | + description: | |
| 207 | + Enables linearization of the channel's counts (generic and Hall | |
| 208 | + channels) or inverts the polarity of the channel's proximity or | |
| 209 | + touch states (ULP channel). | |
| 210 | + | |
| 211 | + azoteq,dual-direction: | |
| 212 | + type: boolean | |
| 213 | + description: | |
| 214 | + Specifies that the channel's long-term average is to freeze in the | |
| 215 | + presence of either increasing or decreasing counts, thereby permit- | |
| 216 | + ting events to be reported in either direction. | |
| 217 | + | |
| 218 | + azoteq,filt-disable: | |
| 219 | + type: boolean | |
| 220 | + description: Disables raw count filtering for the channel. | |
| 221 | + | |
| 222 | + azoteq,ati-mode: | |
| 223 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 224 | + enum: [0, 1, 2, 3] | |
| 225 | + description: | | |
| 226 | + Specifies the channel's ATI mode as follows: | |
| 227 | + 0: Disabled | |
| 228 | + 1: Semi-partial | |
| 229 | + 2: Partial | |
| 230 | + 3: Full | |
| 231 | + | |
| 232 | + The default value is a function of the channel and the device's reset | |
| 233 | + user interface (RUI); reference the datasheet for further information | |
| 234 | + about the available RUI options. | |
| 235 | + | |
| 236 | + azoteq,ati-base: | |
| 237 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 238 | + enum: [75, 100, 150, 200] | |
| 239 | + description: | |
| 240 | + Specifies the channel's ATI base. The default value is a function | |
| 241 | + of the channel and the device's RUI. | |
| 242 | + | |
| 243 | + azoteq,ati-target: | |
| 244 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 245 | + multipleOf: 32 | |
| 246 | + minimum: 0 | |
| 247 | + maximum: 2016 | |
| 248 | + description: | |
| 249 | + Specifies the channel's ATI target. The default value is a function | |
| 250 | + of the channel and the device's RUI. | |
| 251 | + | |
| 252 | + azoteq,cct-increase: | |
| 253 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 254 | + minimum: 0 | |
| 255 | + maximum: 16 | |
| 256 | + default: 0 | |
| 257 | + description: | |
| 258 | + Specifies the degree to which the channel's charge cycle time is to | |
| 259 | + be increased, with 0 representing no increase. The maximum value is | |
| 260 | + limited to 4 in the case of the ULP channel, and the property is un- | |
| 261 | + available entirely in the case of the Hall channel. | |
| 262 | + | |
| 263 | + azoteq,proj-bias: | |
| 264 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 265 | + enum: [0, 1, 2, 3] | |
| 266 | + default: 0 | |
| 267 | + description: | | |
| 268 | + Specifies the bias current applied during projected-capacitance | |
| 269 | + sensing as follows: | |
| 270 | + 0: 2.5 uA | |
| 271 | + 1: 5 uA | |
| 272 | + 2: 10 uA | |
| 273 | + 3: 20 uA | |
| 274 | + | |
| 275 | + This property is unavailable in the case of the Hall channel. | |
| 276 | + | |
| 277 | + azoteq,sense-freq: | |
| 278 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 279 | + enum: [0, 1, 2, 3] | |
| 280 | + description: | | |
| 281 | + Specifies the channel's sensing frequency as follows (parenthesized | |
| 282 | + numbers represent the frequency if 'azoteq,clk-div' is present): | |
| 283 | + 0: 4 MHz (1 MHz) | |
| 284 | + 1: 2 MHz (500 kHz) | |
| 285 | + 2: 1 MHz (250 kHz) | |
| 286 | + 3: 500 kHz (125 kHz) | |
| 287 | + | |
| 288 | + This property is unavailable in the case of the Hall channel. The | |
| 289 | + default value is a function of the channel and the device's RUI. | |
| 290 | + | |
| 291 | + azoteq,ati-band-tighten: | |
| 292 | + type: boolean | |
| 293 | + description: | |
| 294 | + Tightens the ATI band from 1/8 to 1/16 of the desired target (ULP and | |
| 295 | + generic channels only). | |
| 296 | + | |
| 297 | + azoteq,proj-enable: | |
| 298 | + type: boolean | |
| 299 | + description: Enables projected-capacitance sensing (ULP channel only). | |
| 300 | + | |
| 301 | + azoteq,filt-str-np-cnt: | |
| 302 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 303 | + enum: [0, 1, 2, 3] | |
| 304 | + default: 0 | |
| 305 | + description: | |
| 306 | + Specifies the raw count filter strength during normal-power mode (ULP | |
| 307 | + and generic channels only). | |
| 308 | + | |
| 309 | + azoteq,filt-str-lp-cnt: | |
| 310 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 311 | + enum: [0, 1, 2, 3] | |
| 312 | + default: 0 | |
| 313 | + description: | |
| 314 | + Specifies the raw count filter strength during low-power mode (ULP and | |
| 315 | + generic channels only). | |
| 316 | + | |
| 317 | + azoteq,filt-str-np-lta: | |
| 318 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 319 | + enum: [0, 1, 2, 3] | |
| 320 | + default: 0 | |
| 321 | + description: | |
| 322 | + Specifies the long-term average filter strength during normal-power | |
| 323 | + mode (ULP and generic channels only). | |
| 324 | + | |
| 325 | + azoteq,filt-str-lp-lta: | |
| 326 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 327 | + enum: [0, 1, 2, 3] | |
| 328 | + default: 0 | |
| 329 | + description: | |
| 330 | + Specifies the long-term average filter strength during low-power mode | |
| 331 | + (ULP and generic channels only). | |
| 332 | + | |
| 333 | + azoteq,rx-enable: | |
| 334 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 335 | + minItems: 1 | |
| 336 | + maxItems: 8 | |
| 337 | + items: | |
| 338 | + minimum: 0 | |
| 339 | + maximum: 7 | |
| 340 | + description: | |
| 341 | + Specifies the CRX pin(s) associated with the channel. | |
| 342 | + | |
| 343 | + This property is unavailable in the case of the Hall channel. The | |
| 344 | + default value is a function of the channel and the device's RUI. | |
| 345 | + | |
| 346 | + azoteq,tx-enable: | |
| 347 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 348 | + minItems: 1 | |
| 349 | + maxItems: 8 | |
| 350 | + items: | |
| 351 | + minimum: 0 | |
| 352 | + maximum: 7 | |
| 353 | + description: | |
| 354 | + Specifies the TX pin(s) associated with the channel. | |
| 355 | + | |
| 356 | + This property is unavailable in the case of the Hall channel. The | |
| 357 | + default value is a function of the channel and the device's RUI. | |
| 358 | + | |
| 359 | + azoteq,local-cap-size: | |
| 360 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 361 | + enum: [0, 1, 2, 3, 4] | |
| 362 | + default: 0 | |
| 363 | + description: | | |
| 364 | + Specifies the capacitance to be added to the channel as follows: | |
| 365 | + 0: 0 pF | |
| 366 | + 1: 0.5 pF | |
| 367 | + 2: 1.0 pF | |
| 368 | + 3: 1.5 pF | |
| 369 | + 4: 2.0 pF | |
| 370 | + | |
| 371 | + This property is unavailable in the case of the ULP or Hall channels. | |
| 372 | + | |
| 373 | + azoteq,sense-mode: | |
| 374 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 375 | + enum: [0, 1, 8, 9, 12, 14, 15] | |
| 376 | + description: | | |
| 377 | + Specifies the channel's sensing mode as follows: | |
| 378 | + 0: Self capacitance | |
| 379 | + 1: Projected capacitance | |
| 380 | + 8: Self inductance | |
| 381 | + 9: Mutual inductance | |
| 382 | + 12: External | |
| 383 | + 14: Hall effect | |
| 384 | + 15: Temperature | |
| 385 | + | |
| 386 | + This property is unavailable in the case of the ULP or Hall channels. | |
| 387 | + The default value is a function of the channel and the device's RUI. | |
| 388 | + | |
| 389 | + azoteq,tx-freq: | |
| 390 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 391 | + enum: [0, 1, 2, 3] | |
| 392 | + default: 0 | |
| 393 | + description: | | |
| 394 | + Specifies the inductive sensing excitation frequency as follows | |
| 395 | + (parenthesized numbers represent the frequency if 'azoteq,clk-div' | |
| 396 | + is present): | |
| 397 | + 0: 16 MHz (4 MHz) | |
| 398 | + 1: 8 MHz (2 MHz) | |
| 399 | + 2: 4 MHz (1 MHz) | |
| 400 | + 3: 2 MHz (500 kHz) | |
| 401 | + | |
| 402 | + This property is unavailable in the case of the ULP or Hall channels. | |
| 403 | + | |
| 404 | + azoteq,invert-enable: | |
| 405 | + type: boolean | |
| 406 | + description: | |
| 407 | + Inverts the polarity of the states reported for proximity, touch and | |
| 408 | + deep-touch events relative to their respective thresholds (generic | |
| 409 | + channels only). | |
| 410 | + | |
| 411 | + azoteq,comp-disable: | |
| 412 | + type: boolean | |
| 413 | + description: | |
| 414 | + Disables compensation for the channel (generic channels only). | |
| 415 | + | |
| 416 | + azoteq,static-enable: | |
| 417 | + type: boolean | |
| 418 | + description: | |
| 419 | + Enables the static front-end for the channel (generic channels only). | |
| 420 | + | |
| 421 | + azoteq,assoc-select: | |
| 422 | + $ref: /schemas/types.yaml#/definitions/string-array | |
| 423 | + minItems: 1 | |
| 424 | + maxItems: 6 | |
| 425 | + items: | |
| 426 | + enum: | |
| 427 | + - ulp-0 | |
| 428 | + - trackpad-3x2 | |
| 429 | + - trackpad-3x3 | |
| 430 | + - generic-0 | |
| 431 | + - generic-1 | |
| 432 | + - generic-2 | |
| 433 | + - hall | |
| 434 | + description: | |
| 435 | + Specifies the associated channels for which the channel serves as a | |
| 436 | + reference channel. By default, no channels are selected. This prop- | |
| 437 | + erty is only available for the generic channels. | |
| 438 | + | |
| 439 | + azoteq,assoc-weight: | |
| 440 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 441 | + minimum: 0 | |
| 442 | + maximum: 255 | |
| 443 | + default: 0 | |
| 444 | + description: | |
| 445 | + Specifies the channel's impact weight if it acts as an associated | |
| 446 | + channel (0 = 0% impact, 255 = 200% impact). This property is only | |
| 447 | + available for the generic channels. | |
| 448 | + | |
| 449 | + patternProperties: | |
| 450 | + "^event-(prox|touch|deep)(-alt)?$": | |
| 451 | + type: object | |
| 452 | + description: | |
| 453 | + Represents a proximity, touch or deep-touch event reported by the | |
| 454 | + channel in response to a decrease in counts. Node names suffixed with | |
| 455 | + '-alt' instead correspond to an increase in counts. | |
| 456 | + | |
| 457 | + By default, the long-term average tracks an increase in counts such | |
| 458 | + that only events corresponding to a decrease in counts are reported | |
| 459 | + (refer to the datasheet for more information). | |
| 460 | + | |
| 461 | + Specify 'azoteq,dual-direction' to freeze the long-term average when | |
| 462 | + the counts increase or decrease such that events of either direction | |
| 463 | + can be reported. Alternatively, specify 'azoteq,invert-enable' to in- | |
| 464 | + vert the polarity of the states reported by the channel. | |
| 465 | + | |
| 466 | + Complementary events (e.g. event-touch and event-touch-alt) can both | |
| 467 | + be present and specify different key or switch codes, but not differ- | |
| 468 | + ent thresholds or hysteresis (if applicable). | |
| 469 | + | |
| 470 | + Proximity events are unavailable in the case of the Hall channel, and | |
| 471 | + deep-touch events are only available for the generic channels. Unless | |
| 472 | + otherwise specified, default values are a function of the channel and | |
| 473 | + the device's RUI. | |
| 474 | + | |
| 475 | + properties: | |
| 476 | + azoteq,thresh: | |
| 477 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 478 | + minimum: 0 | |
| 479 | + maximum: 255 | |
| 480 | + description: Specifies the threshold for the event. | |
| 481 | + | |
| 482 | + azoteq,hyst: | |
| 483 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 484 | + minimum: 0 | |
| 485 | + maximum: 15 | |
| 486 | + description: | |
| 487 | + Specifies the hysteresis for the event (touch and deep-touch | |
| 488 | + events only). | |
| 489 | + | |
| 490 | + linux,code: | |
| 491 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 492 | + description: Numeric key or switch code associated with the event. | |
| 493 | + | |
| 494 | + linux,input-type: | |
| 495 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 496 | + enum: [1, 5] | |
| 497 | + description: | |
| 498 | + Specifies whether the event is to be interpreted as a key (1) or | |
| 499 | + a switch (5). By default, Hall-channel events are interpreted as | |
| 500 | + switches and all others are interpreted as keys. | |
| 501 | + | |
| 502 | + dependencies: | |
| 503 | + linux,input-type: ["linux,code"] | |
| 504 | + | |
| 505 | + additionalProperties: false | |
| 506 | + | |
| 507 | + dependencies: | |
| 508 | + azoteq,assoc-weight: ["azoteq,assoc-select"] | |
| 509 | + | |
| 510 | + additionalProperties: false | |
| 511 | + | |
| 512 | + "^trackpad-3x[2-3]$": | |
| 513 | + type: object | |
| 514 | + description: | |
| 515 | + Represents all channels associated with the trackpad. The channels are | |
| 516 | + collectively active if the trackpad is defined and inactive otherwise. | |
| 517 | + | |
| 518 | + properties: | |
| 519 | + azoteq,ati-exclude: | |
| 520 | + type: boolean | |
| 521 | + description: | |
| 522 | + Prevents the trackpad channels from participating in an ATI event | |
| 523 | + that is manually triggered during initialization. | |
| 524 | + | |
| 525 | + azoteq,reseed-disable: | |
| 526 | + type: boolean | |
| 527 | + description: | |
| 528 | + Prevents the trackpad channels from being reseeded if the long-term | |
| 529 | + average timeout (defined in 'azoteq,timeout-lta') expires. | |
| 530 | + | |
| 531 | + azoteq,meas-cap-decrease: | |
| 532 | + type: boolean | |
| 533 | + description: | |
| 534 | + Decreases the internal measurement capacitance from 60 pF to 15 pF. | |
| 535 | + | |
| 536 | + azoteq,rx-inactive: | |
| 537 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 538 | + enum: [0, 1] | |
| 539 | + default: 0 | |
| 540 | + description: | | |
| 541 | + Specifies how inactive CRX pins are to be terminated as follows: | |
| 542 | + 0: VSS | |
| 543 | + 1: Floating | |
| 544 | + | |
| 545 | + azoteq,linearize: | |
| 546 | + type: boolean | |
| 547 | + description: Inverts the polarity of the trackpad's touch state. | |
| 548 | + | |
| 549 | + azoteq,dual-direction: | |
| 550 | + type: boolean | |
| 551 | + description: | |
| 552 | + Specifies that the trackpad's long-term averages are to freeze in | |
| 553 | + the presence of either increasing or decreasing counts, thereby | |
| 554 | + permitting events to be reported in either direction. | |
| 555 | + | |
| 556 | + azoteq,filt-disable: | |
| 557 | + type: boolean | |
| 558 | + description: Disables raw count filtering for the trackpad channels. | |
| 559 | + | |
| 560 | + azoteq,ati-mode: | |
| 561 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 562 | + enum: [0, 1, 2, 3] | |
| 563 | + default: 0 | |
| 564 | + description: | | |
| 565 | + Specifies the trackpad's ATI mode as follows: | |
| 566 | + 0: Disabled | |
| 567 | + 1: Semi-partial | |
| 568 | + 2: Partial | |
| 569 | + 3: Full | |
| 570 | + | |
| 571 | + azoteq,ati-base: | |
| 572 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 573 | + minItems: 6 | |
| 574 | + maxItems: 9 | |
| 575 | + items: | |
| 576 | + minimum: 45 | |
| 577 | + maximum: 300 | |
| 578 | + default: [45, 45, 45, 45, 45, 45, 45, 45, 45] | |
| 579 | + description: Specifies each individual trackpad channel's ATI base. | |
| 580 | + | |
| 581 | + azoteq,ati-target: | |
| 582 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 583 | + multipleOf: 32 | |
| 584 | + minimum: 0 | |
| 585 | + maximum: 2016 | |
| 586 | + default: 0 | |
| 587 | + description: Specifies the trackpad's ATI target. | |
| 588 | + | |
| 589 | + azoteq,cct-increase: | |
| 590 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 591 | + minimum: 0 | |
| 592 | + maximum: 4 | |
| 593 | + default: 0 | |
| 594 | + description: | |
| 595 | + Specifies the degree to which the trackpad's charge cycle time is to | |
| 596 | + be increased, with 0 representing no increase. | |
| 597 | + | |
| 598 | + azoteq,proj-bias: | |
| 599 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 600 | + enum: [0, 1, 2, 3] | |
| 601 | + default: 0 | |
| 602 | + description: | | |
| 603 | + Specifies the bias current applied during projected-capacitance | |
| 604 | + sensing as follows: | |
| 605 | + 0: 2.5 uA | |
| 606 | + 1: 5 uA | |
| 607 | + 2: 10 uA | |
| 608 | + 3: 20 uA | |
| 609 | + | |
| 610 | + azoteq,sense-freq: | |
| 611 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 612 | + enum: [0, 1, 2, 3] | |
| 613 | + default: 0 | |
| 614 | + description: | | |
| 615 | + Specifies the trackpad's sensing frequency as follows (parenthesized | |
| 616 | + numbers represent the frequency if 'azoteq,clk-div' is present): | |
| 617 | + 0: 4 MHz (1 MHz) | |
| 618 | + 1: 2 MHz (500 kHz) | |
| 619 | + 2: 1 MHz (250 kHz) | |
| 620 | + 3: 500 kHz (125 kHz) | |
| 621 | + | |
| 622 | + azoteq,ati-band-tighten: | |
| 623 | + type: boolean | |
| 624 | + description: | |
| 625 | + Tightens the ATI band from 1/8 to 1/16 of the desired target. | |
| 626 | + | |
| 627 | + azoteq,thresh: | |
| 628 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 629 | + minItems: 6 | |
| 630 | + maxItems: 9 | |
| 631 | + items: | |
| 632 | + minimum: 0 | |
| 633 | + maximum: 255 | |
| 634 | + default: [0, 0, 0, 0, 0, 0, 0, 0, 0] | |
| 635 | + description: | |
| 636 | + Specifies each individual trackpad channel's touch threshold. | |
| 637 | + | |
| 638 | + azoteq,hyst: | |
| 639 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 640 | + minimum: 0 | |
| 641 | + maximum: 15 | |
| 642 | + default: 0 | |
| 643 | + description: Specifies the trackpad's touch hysteresis. | |
| 644 | + | |
| 645 | + azoteq,lta-update: | |
| 646 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 647 | + enum: [0, 1, 2, 3, 4, 5, 6, 7] | |
| 648 | + default: 0 | |
| 649 | + description: | | |
| 650 | + Specifies the update rate of the trackpad's long-term average during | |
| 651 | + ultra-low-power mode as follows: | |
| 652 | + 0: 2 | |
| 653 | + 1: 4 | |
| 654 | + 2: 8 | |
| 655 | + 3: 16 | |
| 656 | + 4: 32 | |
| 657 | + 5: 64 | |
| 658 | + 6: 128 | |
| 659 | + 7: 255 | |
| 660 | + | |
| 661 | + azoteq,filt-str-trackpad: | |
| 662 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 663 | + enum: [0, 1, 2, 3] | |
| 664 | + default: 0 | |
| 665 | + description: Specifies the trackpad coordinate filter strength. | |
| 666 | + | |
| 667 | + azoteq,filt-str-np-cnt: | |
| 668 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 669 | + enum: [0, 1, 2, 3] | |
| 670 | + default: 0 | |
| 671 | + description: | |
| 672 | + Specifies the raw count filter strength during normal-power mode. | |
| 673 | + | |
| 674 | + azoteq,filt-str-lp-cnt: | |
| 675 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 676 | + enum: [0, 1, 2, 3] | |
| 677 | + default: 0 | |
| 678 | + description: | |
| 679 | + Specifies the raw count filter strength during low-power mode. | |
| 680 | + | |
| 681 | + linux,keycodes: | |
| 682 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 683 | + minItems: 1 | |
| 684 | + maxItems: 6 | |
| 685 | + description: | | |
| 686 | + Specifies the numeric keycodes associated with each available gesture | |
| 687 | + in the following order (enter 0 for unused gestures): | |
| 688 | + 0: Positive flick or swipe in X direction | |
| 689 | + 1: Negative flick or swipe in X direction | |
| 690 | + 2: Positive flick or swipe in Y direction | |
| 691 | + 3: Negative flick or swipe in Y direction | |
| 692 | + 4: Tap | |
| 693 | + 5: Hold | |
| 694 | + | |
| 695 | + azoteq,gesture-swipe: | |
| 696 | + type: boolean | |
| 697 | + description: | |
| 698 | + Directs the device to interpret axial gestures as a swipe (finger | |
| 699 | + remains on trackpad) instead of a flick (finger leaves trackpad). | |
| 700 | + | |
| 701 | + azoteq,timeout-tap-ms: | |
| 702 | + multipleOf: 16 | |
| 703 | + minimum: 0 | |
| 704 | + maximum: 4080 | |
| 705 | + default: 0 | |
| 706 | + description: | |
| 707 | + Specifies the length of time (in ms) within which a trackpad touch | |
| 708 | + must be released in order to be interpreted as a tap. | |
| 709 | + | |
| 710 | + azoteq,timeout-swipe-ms: | |
| 711 | + multipleOf: 16 | |
| 712 | + minimum: 0 | |
| 713 | + maximum: 4080 | |
| 714 | + default: 0 | |
| 715 | + description: | |
| 716 | + Specifies the length of time (in ms) within which an axial gesture | |
| 717 | + must be completed in order to be interpreted as a flick or swipe. | |
| 718 | + | |
| 719 | + azoteq,thresh-swipe: | |
| 720 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 721 | + minimum: 0 | |
| 722 | + maximum: 255 | |
| 723 | + default: 0 | |
| 724 | + description: | |
| 725 | + Specifies the number of points across which an axial gesture must | |
| 726 | + travel in order to be interpreted as a flick or swipe. | |
| 727 | + | |
| 728 | + dependencies: | |
| 729 | + azoteq,gesture-swipe: ["linux,keycodes"] | |
| 730 | + azoteq,timeout-tap-ms: ["linux,keycodes"] | |
| 731 | + azoteq,timeout-swipe-ms: ["linux,keycodes"] | |
| 732 | + azoteq,thresh-swipe: ["linux,keycodes"] | |
| 733 | + | |
| 734 | + additionalProperties: false | |
| 735 | + | |
| 736 | +required: | |
| 737 | + - compatible | |
| 738 | + - reg | |
| 739 | + - interrupts | |
| 740 | + - "#address-cells" | |
| 741 | + - "#size-cells" | |
| 742 | + | |
| 743 | +additionalProperties: false | |
| 744 | + | |
| 745 | +examples: | |
| 746 | + - | | |
| 747 | + #include <dt-bindings/input/input.h> | |
| 748 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 749 | + | |
| 750 | + i2c { | |
| 751 | + #address-cells = <1>; | |
| 752 | + #size-cells = <0>; | |
| 753 | + | |
| 754 | + iqs626a@44 { | |
| 755 | + #address-cells = <1>; | |
| 756 | + #size-cells = <0>; | |
| 757 | + | |
| 758 | + compatible = "azoteq,iqs626a"; | |
| 759 | + reg = <0x44>; | |
| 760 | + interrupt-parent = <&gpio>; | |
| 761 | + interrupts = <17 IRQ_TYPE_LEVEL_LOW>; | |
| 762 | + | |
| 763 | + azoteq,rate-np-ms = <16>; | |
| 764 | + azoteq,rate-lp-ms = <160>; | |
| 765 | + | |
| 766 | + azoteq,timeout-pwr-ms = <2560>; | |
| 767 | + azoteq,timeout-lta-ms = <32768>; | |
| 768 | + | |
| 769 | + ulp-0 { | |
| 770 | + azoteq,meas-cap-decrease; | |
| 771 | + | |
| 772 | + azoteq,ati-base = <75>; | |
| 773 | + azoteq,ati-target = <1024>; | |
| 774 | + | |
| 775 | + azoteq,rx-enable = <2>, <3>, <4>, | |
| 776 | + <5>, <6>, <7>; | |
| 777 | + | |
| 778 | + event-prox { | |
| 779 | + linux,code = <KEY_POWER>; | |
| 780 | + }; | |
| 781 | + }; | |
| 782 | + | |
| 783 | + trackpad-3x3 { | |
| 784 | + azoteq,filt-str-np-cnt = <1>; | |
| 785 | + azoteq,filt-str-lp-cnt = <1>; | |
| 786 | + | |
| 787 | + azoteq,hyst = <4>; | |
| 788 | + azoteq,thresh = <35>, <40>, <40>, | |
| 789 | + <38>, <33>, <38>, | |
| 790 | + <35>, <35>, <35>; | |
| 791 | + | |
| 792 | + azoteq,ati-mode = <3>; | |
| 793 | + azoteq,ati-base = <195>, <195>, <195>, | |
| 794 | + <195>, <195>, <195>, | |
| 795 | + <195>, <195>, <195>; | |
| 796 | + azoteq,ati-target = <512>; | |
| 797 | + | |
| 798 | + azoteq,proj-bias = <1>; | |
| 799 | + azoteq,sense-freq = <2>; | |
| 800 | + | |
| 801 | + linux,keycodes = <KEY_VOLUMEUP>, | |
| 802 | + <KEY_VOLUMEDOWN>, | |
| 803 | + <KEY_NEXTSONG>, | |
| 804 | + <KEY_PREVIOUSSONG>, | |
| 805 | + <KEY_PLAYPAUSE>, | |
| 806 | + <KEY_STOPCD>; | |
| 807 | + | |
| 808 | + azoteq,gesture-swipe; | |
| 809 | + azoteq,timeout-swipe-ms = <800>; | |
| 810 | + azoteq,timeout-tap-ms = <400>; | |
| 811 | + azoteq,thresh-swipe = <40>; | |
| 812 | + }; | |
| 813 | + | |
| 814 | + /* | |
| 815 | + * Preserve the default register settings for | |
| 816 | + * the temperature-tracking channel leveraged | |
| 817 | + * by reset user interface (RUI) 1. | |
| 818 | + * | |
| 819 | + * Scalar properties (e.g. ATI mode) are left | |
| 820 | + * untouched by simply omitting them; boolean | |
| 821 | + * properties must be specified explicitly as | |
| 822 | + * needed. | |
| 823 | + */ | |
| 824 | + generic-2 { | |
| 825 | + azoteq,reseed-disable; | |
| 826 | + azoteq,meas-cap-decrease; | |
| 827 | + azoteq,dual-direction; | |
| 828 | + azoteq,comp-disable; | |
| 829 | + azoteq,static-enable; | |
| 830 | + }; | |
| 831 | + | |
| 832 | + hall { | |
| 833 | + azoteq,reseed-disable; | |
| 834 | + azoteq,meas-cap-decrease; | |
| 835 | + | |
| 836 | + event-touch { | |
| 837 | + linux,code = <SW_LID>; | |
| 838 | + }; | |
| 839 | + }; | |
| 840 | + }; | |
| 841 | + }; | |
| 842 | + | |
| 843 | +... | |
| @@ -0,0 +1,75 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/azoteq,iqs5xx.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Azoteq IQS550/572/525 Trackpad/Touchscreen Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jeff LaBundy <jeff@labundy.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The Azoteq IQS550, IQS572 and IQS525 trackpad and touchscreen controllers | |
| 14 | + employ projected-capacitance sensing and can track up to five independent | |
| 15 | + contacts. | |
| 16 | + | |
| 17 | + Link to datasheet: https://www.azoteq.com/ | |
| 18 | + | |
| 19 | +allOf: | |
| 20 | + - $ref: touchscreen.yaml# | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + compatible: | |
| 24 | + enum: | |
| 25 | + - azoteq,iqs550 | |
| 26 | + - azoteq,iqs572 | |
| 27 | + - azoteq,iqs525 | |
| 28 | + | |
| 29 | + reg: | |
| 30 | + maxItems: 1 | |
| 31 | + | |
| 32 | + interrupts: | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + reset-gpios: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | + wakeup-source: true | |
| 39 | + | |
| 40 | + touchscreen-size-x: true | |
| 41 | + touchscreen-size-y: true | |
| 42 | + touchscreen-inverted-x: true | |
| 43 | + touchscreen-inverted-y: true | |
| 44 | + touchscreen-swapped-x-y: true | |
| 45 | + | |
| 46 | +required: | |
| 47 | + - compatible | |
| 48 | + - reg | |
| 49 | + - interrupts | |
| 50 | + | |
| 51 | +additionalProperties: false | |
| 52 | + | |
| 53 | +examples: | |
| 54 | + - | | |
| 55 | + #include <dt-bindings/gpio/gpio.h> | |
| 56 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 57 | + | |
| 58 | + i2c { | |
| 59 | + #address-cells = <1>; | |
| 60 | + #size-cells = <0>; | |
| 61 | + | |
| 62 | + touchscreen@74 { | |
| 63 | + compatible = "azoteq,iqs550"; | |
| 64 | + reg = <0x74>; | |
| 65 | + interrupt-parent = <&gpio>; | |
| 66 | + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; | |
| 67 | + reset-gpios = <&gpio 22 (GPIO_ACTIVE_LOW | | |
| 68 | + GPIO_PUSH_PULL)>; | |
| 69 | + | |
| 70 | + touchscreen-size-x = <800>; | |
| 71 | + touchscreen-size-y = <480>; | |
| 72 | + }; | |
| 73 | + }; | |
| 74 | + | |
| 75 | +... | |
| @@ -0,0 +1,119 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/hycon,hy46xx.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Hycon HY46XX series touchscreen controller bindings | |
| 8 | + | |
| 9 | +description: | | |
| 10 | + There are 6 variants of the chip for various touch panel sizes and cover lens material | |
| 11 | + Glass: 0.3mm--4.0mm | |
| 12 | + PET/PMMA: 0.2mm--2.0mm | |
| 13 | + HY4613(B)-N048 < 6" | |
| 14 | + HY4614(B)-N068 7" .. 10.1" | |
| 15 | + HY4621-NS32 < 5" | |
| 16 | + HY4623-NS48 5.1" .. 7" | |
| 17 | + Glass: 0.3mm--8.0mm | |
| 18 | + PET/PMMA: 0.2mm--4.0mm | |
| 19 | + HY4633(B)-N048 < 6" | |
| 20 | + HY4635(B)-N048 < 7" .. 10.1" | |
| 21 | + | |
| 22 | +maintainers: | |
| 23 | + - Giulio Benetti <giulio.benetti@benettiengineering.com> | |
| 24 | + | |
| 25 | +allOf: | |
| 26 | + - $ref: touchscreen.yaml# | |
| 27 | + | |
| 28 | +properties: | |
| 29 | + compatible: | |
| 30 | + enum: | |
| 31 | + - hycon,hy4613 | |
| 32 | + - hycon,hy4614 | |
| 33 | + - hycon,hy4621 | |
| 34 | + - hycon,hy4623 | |
| 35 | + - hycon,hy4633 | |
| 36 | + - hycon,hy4635 | |
| 37 | + | |
| 38 | + reg: | |
| 39 | + maxItems: 1 | |
| 40 | + | |
| 41 | + interrupts: | |
| 42 | + maxItems: 1 | |
| 43 | + | |
| 44 | + reset-gpios: | |
| 45 | + maxItems: 1 | |
| 46 | + | |
| 47 | + vcc-supply: true | |
| 48 | + | |
| 49 | + hycon,threshold: | |
| 50 | + description: Allows setting the sensitivity in the range from 0 to 255. | |
| 51 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 52 | + minimum: 0 | |
| 53 | + maximum: 255 | |
| 54 | + | |
| 55 | + hycon,glove-enable: | |
| 56 | + type: boolean | |
| 57 | + description: Allows enabling glove setting. | |
| 58 | + | |
| 59 | + hycon,report-speed-hz: | |
| 60 | + description: Allows setting the report speed in Hertz. | |
| 61 | + minimum: 1 | |
| 62 | + maximum: 255 | |
| 63 | + | |
| 64 | + hycon,noise-filter-enable: | |
| 65 | + type: boolean | |
| 66 | + description: Allows enabling power noise filter. | |
| 67 | + | |
| 68 | + hycon,filter-data: | |
| 69 | + description: Allows setting how many samples throw before reporting touch | |
| 70 | + in the range from 0 to 5. | |
| 71 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 72 | + minimum: 0 | |
| 73 | + maximum: 5 | |
| 74 | + | |
| 75 | + hycon,gain: | |
| 76 | + description: Allows setting the sensitivity distance in the range from 0 to 5. | |
| 77 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 78 | + minimum: 0 | |
| 79 | + maximum: 5 | |
| 80 | + | |
| 81 | + hycon,edge-offset: | |
| 82 | + description: Allows setting the edge compensation in the range from 0 to 16. | |
| 83 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 84 | + minimum: 0 | |
| 85 | + maximum: 16 | |
| 86 | + | |
| 87 | + touchscreen-size-x: true | |
| 88 | + touchscreen-size-y: true | |
| 89 | + touchscreen-fuzz-x: true | |
| 90 | + touchscreen-fuzz-y: true | |
| 91 | + touchscreen-inverted-x: true | |
| 92 | + touchscreen-inverted-y: true | |
| 93 | + touchscreen-swapped-x-y: true | |
| 94 | + interrupt-controller: true | |
| 95 | + | |
| 96 | +additionalProperties: false | |
| 97 | + | |
| 98 | +required: | |
| 99 | + - compatible | |
| 100 | + - reg | |
| 101 | + - interrupts | |
| 102 | + | |
| 103 | +examples: | |
| 104 | + - | | |
| 105 | + #include <dt-bindings/gpio/gpio.h> | |
| 106 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 107 | + i2c { | |
| 108 | + #address-cells = <1>; | |
| 109 | + #size-cells = <0>; | |
| 110 | + touchscreen@1c { | |
| 111 | + compatible = "hycon,hy4633"; | |
| 112 | + reg = <0x1c>; | |
| 113 | + interrupt-parent = <&gpio2>; | |
| 114 | + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; | |
| 115 | + reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>; | |
| 116 | + }; | |
| 117 | + }; | |
| 118 | + | |
| 119 | +... | |
| @@ -0,0 +1,73 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/ilitek_ts_i2c.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Ilitek I2C Touchscreen Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Dmitry Torokhov <dmitry.torokhov@gmail.com> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: touchscreen.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + enum: | |
| 18 | + - ilitek,ili2130 | |
| 19 | + - ilitek,ili2131 | |
| 20 | + - ilitek,ili2132 | |
| 21 | + - ilitek,ili2316 | |
| 22 | + - ilitek,ili2322 | |
| 23 | + - ilitek,ili2323 | |
| 24 | + - ilitek,ili2326 | |
| 25 | + - ilitek,ili2520 | |
| 26 | + - ilitek,ili2521 | |
| 27 | + | |
| 28 | + reg: | |
| 29 | + const: 0x41 | |
| 30 | + | |
| 31 | + interrupts: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | + reset-gpios: | |
| 35 | + maxItems: 1 | |
| 36 | + | |
| 37 | + wakeup-source: | |
| 38 | + type: boolean | |
| 39 | + description: touchscreen can be used as a wakeup source. | |
| 40 | + | |
| 41 | + touchscreen-size-x: true | |
| 42 | + touchscreen-size-y: true | |
| 43 | + touchscreen-inverted-x: true | |
| 44 | + touchscreen-inverted-y: true | |
| 45 | + touchscreen-swapped-x-y: true | |
| 46 | + | |
| 47 | +additionalProperties: false | |
| 48 | + | |
| 49 | +required: | |
| 50 | + - compatible | |
| 51 | + - reg | |
| 52 | + - interrupts | |
| 53 | + - reset-gpios | |
| 54 | + | |
| 55 | +examples: | |
| 56 | + - | | |
| 57 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 58 | + #include <dt-bindings/gpio/gpio.h> | |
| 59 | + i2c { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <0>; | |
| 62 | + | |
| 63 | + touchscreen@41 { | |
| 64 | + compatible = "ilitek,ili2520"; | |
| 65 | + reg = <0x41>; | |
| 66 | + | |
| 67 | + interrupt-parent = <&gpio1>; | |
| 68 | + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; | |
| 69 | + reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; | |
| 70 | + touchscreen-inverted-y; | |
| 71 | + wakeup-source; | |
| 72 | + }; | |
| 73 | + }; | |
| @@ -1,80 +0,0 @@ | ||
| 1 | −Azoteq IQS550/572/525 Trackpad/Touchscreen Controller | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | − | |
| 5 | −- compatible : Must be equal to one of the following: | |
| 6 | − "azoteq,iqs550" | |
| 7 | − "azoteq,iqs572" | |
| 8 | − "azoteq,iqs525" | |
| 9 | − | |
| 10 | −- reg : I2C slave address for the device. | |
| 11 | − | |
| 12 | −- interrupts : GPIO to which the device's active-high RDY | |
| 13 | − output is connected (see [0]). | |
| 14 | − | |
| 15 | −- reset-gpios : GPIO to which the device's active-low NRST | |
| 16 | − input is connected (see [1]). | |
| 17 | − | |
| 18 | −Optional properties: | |
| 19 | − | |
| 20 | −- touchscreen-min-x : See [2]. | |
| 21 | − | |
| 22 | −- touchscreen-min-y : See [2]. | |
| 23 | − | |
| 24 | −- touchscreen-size-x : See [2]. If this property is omitted, the | |
| 25 | − maximum x-coordinate is specified by the | |
| 26 | − device's "X Resolution" register. | |
| 27 | − | |
| 28 | −- touchscreen-size-y : See [2]. If this property is omitted, the | |
| 29 | − maximum y-coordinate is specified by the | |
| 30 | − device's "Y Resolution" register. | |
| 31 | − | |
| 32 | −- touchscreen-max-pressure : See [2]. Pressure is expressed as the sum of | |
| 33 | − the deltas across all channels impacted by a | |
| 34 | − touch event. A channel's delta is calculated | |
| 35 | − as its count value minus a reference, where | |
| 36 | − the count value is inversely proportional to | |
| 37 | − the channel's capacitance. | |
| 38 | − | |
| 39 | −- touchscreen-fuzz-x : See [2]. | |
| 40 | − | |
| 41 | −- touchscreen-fuzz-y : See [2]. | |
| 42 | − | |
| 43 | −- touchscreen-fuzz-pressure : See [2]. | |
| 44 | − | |
| 45 | −- touchscreen-inverted-x : See [2]. Inversion is applied relative to that | |
| 46 | − which may already be specified by the device's | |
| 47 | − FLIP_X and FLIP_Y register fields. | |
| 48 | − | |
| 49 | −- touchscreen-inverted-y : See [2]. Inversion is applied relative to that | |
| 50 | − which may already be specified by the device's | |
| 51 | − FLIP_X and FLIP_Y register fields. | |
| 52 | − | |
| 53 | −- touchscreen-swapped-x-y : See [2]. Swapping is applied relative to that | |
| 54 | − which may already be specified by the device's | |
| 55 | − SWITCH_XY_AXIS register field. | |
| 56 | − | |
| 57 | −[0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | |
| 58 | −[1]: Documentation/devicetree/bindings/gpio/gpio.txt | |
| 59 | −[2]: Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt | |
| 60 | − | |
| 61 | −Example: | |
| 62 | − | |
| 63 | − &i2c1 { | |
| 64 | − /* ... */ | |
| 65 | − | |
| 66 | − touchscreen@74 { | |
| 67 | − compatible = "azoteq,iqs550"; | |
| 68 | − reg = <0x74>; | |
| 69 | − interrupt-parent = <&gpio>; | |
| 70 | − interrupts = <17 4>; | |
| 71 | − reset-gpios = <&gpio 27 1>; | |
| 72 | − | |
| 73 | − touchscreen-size-x = <640>; | |
| 74 | − touchscreen-size-y = <480>; | |
| 75 | − | |
| 76 | − touchscreen-max-pressure = <16000>; | |
| 77 | − }; | |
| 78 | − | |
| 79 | − /* ... */ | |
| 80 | − }; | |
| @@ -0,0 +1,87 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/melfas,mms114.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Melfas MMS114 family touchscreen controller bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Linus Walleij <linus.walleij@linaro.org> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: touchscreen.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + $nodename: | |
| 17 | + pattern: "^touchscreen(@.*)?$" | |
| 18 | + | |
| 19 | + compatible: | |
| 20 | + items: | |
| 21 | + - enum: | |
| 22 | + - melfas,mms114 | |
| 23 | + - melfas,mms134s | |
| 24 | + - melfas,mms136 | |
| 25 | + - melfas,mms152 | |
| 26 | + - melfas,mms345l | |
| 27 | + | |
| 28 | + reg: | |
| 29 | + description: I2C address | |
| 30 | + | |
| 31 | + clock-frequency: | |
| 32 | + description: I2C client clock frequency, defined for host | |
| 33 | + minimum: 100000 | |
| 34 | + maximum: 400000 | |
| 35 | + | |
| 36 | + interrupts: | |
| 37 | + maxItems: 1 | |
| 38 | + | |
| 39 | + avdd-supply: | |
| 40 | + description: Analog power supply regulator on AVDD pin | |
| 41 | + | |
| 42 | + vdd-supply: | |
| 43 | + description: Digital power supply regulator on VDD pin | |
| 44 | + | |
| 45 | + touchscreen-size-x: true | |
| 46 | + touchscreen-size-y: true | |
| 47 | + touchscreen-fuzz-x: true | |
| 48 | + touchscreen-fuzz-y: true | |
| 49 | + touchscreen-fuzz-pressure: true | |
| 50 | + touchscreen-inverted-x: true | |
| 51 | + touchscreen-inverted-y: true | |
| 52 | + touchscreen-swapped-x-y: true | |
| 53 | + touchscreen-max-pressure: true | |
| 54 | + | |
| 55 | +additionalProperties: false | |
| 56 | + | |
| 57 | +required: | |
| 58 | + - compatible | |
| 59 | + - reg | |
| 60 | + - interrupts | |
| 61 | + - touchscreen-size-x | |
| 62 | + - touchscreen-size-y | |
| 63 | + | |
| 64 | +examples: | |
| 65 | + - | | |
| 66 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 67 | + i2c { | |
| 68 | + #address-cells = <1>; | |
| 69 | + #size-cells = <0>; | |
| 70 | + touchscreen@48 { | |
| 71 | + compatible = "melfas,mms114"; | |
| 72 | + reg = <0x48>; | |
| 73 | + interrupt-parent = <&gpio>; | |
| 74 | + interrupts = <39 IRQ_TYPE_EDGE_FALLING>; | |
| 75 | + avdd-supply = <&ldo1_reg>; | |
| 76 | + vdd-supply = <&ldo2_reg>; | |
| 77 | + touchscreen-size-x = <720>; | |
| 78 | + touchscreen-size-y = <1280>; | |
| 79 | + touchscreen-fuzz-x = <10>; | |
| 80 | + touchscreen-fuzz-y = <10>; | |
| 81 | + touchscreen-fuzz-pressure = <10>; | |
| 82 | + touchscreen-inverted-x; | |
| 83 | + touchscreen-inverted-y; | |
| 84 | + }; | |
| 85 | + }; | |
| 86 | + | |
| 87 | +... | |
| @@ -1,42 +0,0 @@ | ||
| 1 | −* MELFAS MMS114/MMS152/MMS345L touchscreen controller | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: should be one of: | |
| 5 | − - "melfas,mms114" | |
| 6 | − - "melfas,mms152" | |
| 7 | − - "melfas,mms345l" | |
| 8 | −- reg: I2C address of the chip | |
| 9 | −- interrupts: interrupt to which the chip is connected | |
| 10 | −- touchscreen-size-x: See [1] | |
| 11 | −- touchscreen-size-y: See [1] | |
| 12 | − | |
| 13 | −Optional properties: | |
| 14 | −- touchscreen-fuzz-x: See [1] | |
| 15 | −- touchscreen-fuzz-y: See [1] | |
| 16 | −- touchscreen-fuzz-pressure: See [1] | |
| 17 | −- touchscreen-inverted-x: See [1] | |
| 18 | −- touchscreen-inverted-y: See [1] | |
| 19 | −- touchscreen-swapped-x-y: See [1] | |
| 20 | − | |
| 21 | −[1]: Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt | |
| 22 | − | |
| 23 | −Example: | |
| 24 | − | |
| 25 | − i2c@00000000 { | |
| 26 | − /* ... */ | |
| 27 | − | |
| 28 | − touchscreen@48 { | |
| 29 | − compatible = "melfas,mms114"; | |
| 30 | − reg = <0x48>; | |
| 31 | − interrupts = <39 0>; | |
| 32 | − touchscreen-size-x = <720>; | |
| 33 | − touchscreen-size-y = <1280>; | |
| 34 | − touchscreen-fuzz-x = <10>; | |
| 35 | − touchscreen-fuzz-y = <10>; | |
| 36 | − touchscreen-fuzz-pressure = <10>; | |
| 37 | − touchscreen-inverted-x; | |
| 38 | − touchscreen-inverted-y; | |
| 39 | − }; | |
| 40 | − | |
| 41 | − /* ... */ | |
| 42 | − }; | |
| @@ -0,0 +1,69 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/input/touchscreen/mstar,msg2638.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: MStar msg2638 touchscreen controller Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Vincent Knecht <vincent.knecht@mailoo.org> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: touchscreen.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + const: mstar,msg2638 | |
| 18 | + | |
| 19 | + reg: | |
| 20 | + const: 0x26 | |
| 21 | + | |
| 22 | + interrupts: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + reset-gpios: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + vdd-supply: | |
| 29 | + description: Power supply regulator for the chip | |
| 30 | + | |
| 31 | + vddio-supply: | |
| 32 | + description: Power supply regulator for the I2C bus | |
| 33 | + | |
| 34 | + touchscreen-size-x: true | |
| 35 | + touchscreen-size-y: true | |
| 36 | + | |
| 37 | +additionalProperties: false | |
| 38 | + | |
| 39 | +required: | |
| 40 | + - compatible | |
| 41 | + - reg | |
| 42 | + - interrupts | |
| 43 | + - reset-gpios | |
| 44 | + - touchscreen-size-x | |
| 45 | + - touchscreen-size-y | |
| 46 | + | |
| 47 | +examples: | |
| 48 | + - | | |
| 49 | + #include <dt-bindings/gpio/gpio.h> | |
| 50 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 51 | + i2c { | |
| 52 | + #address-cells = <1>; | |
| 53 | + #size-cells = <0>; | |
| 54 | + touchscreen@26 { | |
| 55 | + compatible = "mstar,msg2638"; | |
| 56 | + reg = <0x26>; | |
| 57 | + interrupt-parent = <&msmgpio>; | |
| 58 | + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; | |
| 59 | + reset-gpios = <&msmgpio 100 GPIO_ACTIVE_LOW>; | |
| 60 | + pinctrl-names = "default"; | |
| 61 | + pinctrl-0 = <&ts_int_reset_default>; | |
| 62 | + vdd-supply = <&pm8916_l17>; | |
| 63 | + vddio-supply = <&pm8916_l5>; | |
| 64 | + touchscreen-size-x = <2048>; | |
| 65 | + touchscreen-size-y = <2048>; | |
| 66 | + }; | |
| 67 | + }; | |
| 68 | + | |
| 69 | +... | |
| @@ -71,6 +71,16 @@ properties: · 70 unmodified lines | ||
| 71 | 71 | - qcom,sm8250-mmss-noc |
| 72 | 72 | - qcom,sm8250-npu-noc |
| 73 | 73 | - qcom,sm8250-system-noc |
| 74 | + - qcom,sm8350-aggre1-noc | |
| 75 | + - qcom,sm8350-aggre2-noc | |
| 76 | + - qcom,sm8350-config-noc | |
| 77 | + - qcom,sm8350-dc-noc | |
| 78 | + - qcom,sm8350-gem-noc | |
| 79 | + - qcom,sm8350-lpass-ag-noc | |
| 80 | + - qcom,sm8350-mc-virt | |
| 81 | + - qcom,sm8350-mmss-noc | |
| 82 | + - qcom,sm8350-compute-noc | |
| 83 | + - qcom,sm8350-system-noc | |
| 74 | 84 | |
| 75 | 85 | '#interconnect-cells': |
| 76 | 86 | enum: [ 1, 2 ] |
| @@ -0,0 +1,147 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm SDM660 Network-On-Chip interconnect | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - AngeloGioacchino Del Regno <kholk11@gmail.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The Qualcomm SDM660 interconnect providers support adjusting the | |
| 14 | + bandwidth requirements between the various NoC fabrics. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + reg: | |
| 18 | + maxItems: 1 | |
| 19 | + | |
| 20 | + compatible: | |
| 21 | + enum: | |
| 22 | + - qcom,sdm660-a2noc | |
| 23 | + - qcom,sdm660-bimc | |
| 24 | + - qcom,sdm660-cnoc | |
| 25 | + - qcom,sdm660-gnoc | |
| 26 | + - qcom,sdm660-mnoc | |
| 27 | + - qcom,sdm660-snoc | |
| 28 | + | |
| 29 | + '#interconnect-cells': | |
| 30 | + const: 1 | |
| 31 | + | |
| 32 | + clocks: | |
| 33 | + minItems: 1 | |
| 34 | + maxItems: 3 | |
| 35 | + | |
| 36 | + clock-names: | |
| 37 | + minItems: 1 | |
| 38 | + maxItems: 3 | |
| 39 | + | |
| 40 | +required: | |
| 41 | + - compatible | |
| 42 | + - reg | |
| 43 | + - '#interconnect-cells' | |
| 44 | + - clock-names | |
| 45 | + - clocks | |
| 46 | + | |
| 47 | +additionalProperties: false | |
| 48 | + | |
| 49 | +allOf: | |
| 50 | + - if: | |
| 51 | + properties: | |
| 52 | + compatible: | |
| 53 | + contains: | |
| 54 | + enum: | |
| 55 | + - qcom,sdm660-mnoc | |
| 56 | + then: | |
| 57 | + properties: | |
| 58 | + clocks: | |
| 59 | + items: | |
| 60 | + - description: Bus Clock. | |
| 61 | + - description: Bus A Clock. | |
| 62 | + - description: CPU-NoC High-performance Bus Clock. | |
| 63 | + clock-names: | |
| 64 | + items: | |
| 65 | + - const: bus | |
| 66 | + - const: bus_a | |
| 67 | + - const: iface | |
| 68 | + | |
| 69 | + - if: | |
| 70 | + properties: | |
| 71 | + compatible: | |
| 72 | + contains: | |
| 73 | + enum: | |
| 74 | + - qcom,sdm660-a2noc | |
| 75 | + - qcom,sdm660-bimc | |
| 76 | + - qcom,sdm660-cnoc | |
| 77 | + - qcom,sdm660-gnoc | |
| 78 | + - qcom,sdm660-snoc | |
| 79 | + then: | |
| 80 | + properties: | |
| 81 | + clocks: | |
| 82 | + items: | |
| 83 | + - description: Bus Clock. | |
| 84 | + - description: Bus A Clock. | |
| 85 | + clock-names: | |
| 86 | + items: | |
| 87 | + - const: bus | |
| 88 | + - const: bus_a | |
| 89 | + | |
| 90 | +examples: | |
| 91 | + - | | |
| 92 | + #include <dt-bindings/clock/qcom,rpmcc.h> | |
| 93 | + #include <dt-bindings/clock/qcom,mmcc-sdm660.h> | |
| 94 | + | |
| 95 | + bimc: interconnect@1008000 { | |
| 96 | + compatible = "qcom,sdm660-bimc"; | |
| 97 | + reg = <0x01008000 0x78000>; | |
| 98 | + #interconnect-cells = <1>; | |
| 99 | + clock-names = "bus", "bus_a"; | |
| 100 | + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, | |
| 101 | + <&rpmcc RPM_SMD_BIMC_A_CLK>; | |
| 102 | + }; | |
| 103 | + | |
| 104 | + cnoc: interconnect@1500000 { | |
| 105 | + compatible = "qcom,sdm660-cnoc"; | |
| 106 | + reg = <0x01500000 0x10000>; | |
| 107 | + #interconnect-cells = <1>; | |
| 108 | + clock-names = "bus", "bus_a"; | |
| 109 | + clocks = <&rpmcc RPM_SMD_CNOC_CLK>, | |
| 110 | + <&rpmcc RPM_SMD_CNOC_A_CLK>; | |
| 111 | + }; | |
| 112 | + | |
| 113 | + snoc: interconnect@1626000 { | |
| 114 | + compatible = "qcom,sdm660-snoc"; | |
| 115 | + reg = <0x01626000 0x7090>; | |
| 116 | + #interconnect-cells = <1>; | |
| 117 | + clock-names = "bus", "bus_a"; | |
| 118 | + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, | |
| 119 | + <&rpmcc RPM_SMD_SNOC_A_CLK>; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + a2noc: interconnect@1704000 { | |
| 123 | + compatible = "qcom,sdm660-a2noc"; | |
| 124 | + reg = <0x01704000 0xc100>; | |
| 125 | + #interconnect-cells = <1>; | |
| 126 | + clock-names = "bus", "bus_a"; | |
| 127 | + clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, | |
| 128 | + <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + mnoc: interconnect@1745000 { | |
| 132 | + compatible = "qcom,sdm660-mnoc"; | |
| 133 | + reg = <0x01745000 0xa010>; | |
| 134 | + #interconnect-cells = <1>; | |
| 135 | + clock-names = "bus", "bus_a", "iface"; | |
| 136 | + clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>, | |
| 137 | + <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>, | |
| 138 | + <&mmcc AHB_CLK_SRC>; | |
| 139 | + }; | |
| 140 | + | |
| 141 | + gnoc: interconnect@17900000 { | |
| 142 | + compatible = "qcom,sdm660-gnoc"; | |
| 143 | + reg = <0x17900000 0xe000>; | |
| 144 | + #interconnect-cells = <1>; | |
| 145 | + clock-names = "bus", "bus_a"; | |
| 146 | + clocks = <&xo_board>, <&xo_board>; | |
| 147 | + }; | |
| @@ -0,0 +1,88 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interrupt-controller/apple,aic.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Apple Interrupt Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Hector Martin <marcan@marcan.st> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The Apple Interrupt Controller is a simple interrupt controller present on | |
| 14 | + Apple ARM SoC platforms, including various iPhone and iPad devices and the | |
| 15 | + "Apple Silicon" Macs. | |
| 16 | + | |
| 17 | + It provides the following features: | |
| 18 | + | |
| 19 | + - Level-triggered hardware IRQs wired to SoC blocks | |
| 20 | + - Single mask bit per IRQ | |
| 21 | + - Per-IRQ affinity setting | |
| 22 | + - Automatic masking on event delivery (auto-ack) | |
| 23 | + - Software triggering (ORed with hw line) | |
| 24 | + - 2 per-CPU IPIs (meant as "self" and "other", but they are interchangeable | |
| 25 | + if not symmetric) | |
| 26 | + - Automatic prioritization (single event/ack register per CPU, lower IRQs = | |
| 27 | + higher priority) | |
| 28 | + - Automatic masking on ack | |
| 29 | + - Default "this CPU" register view and explicit per-CPU views | |
| 30 | + | |
| 31 | + This device also represents the FIQ interrupt sources on platforms using AIC, | |
| 32 | + which do not go through a discrete interrupt controller. | |
| 33 | + | |
| 34 | +allOf: | |
| 35 | + - $ref: /schemas/interrupt-controller.yaml# | |
| 36 | + | |
| 37 | +properties: | |
| 38 | + compatible: | |
| 39 | + items: | |
| 40 | + - const: apple,t8103-aic | |
| 41 | + - const: apple,aic | |
| 42 | + | |
| 43 | + interrupt-controller: true | |
| 44 | + | |
| 45 | + '#interrupt-cells': | |
| 46 | + const: 3 | |
| 47 | + description: | | |
| 48 | + The 1st cell contains the interrupt type: | |
| 49 | + - 0: Hardware IRQ | |
| 50 | + - 1: FIQ | |
| 51 | + | |
| 52 | + The 2nd cell contains the interrupt number. | |
| 53 | + - HW IRQs: interrupt number | |
| 54 | + - FIQs: | |
| 55 | + - 0: physical HV timer | |
| 56 | + - 1: virtual HV timer | |
| 57 | + - 2: physical guest timer | |
| 58 | + - 3: virtual guest timer | |
| 59 | + | |
| 60 | + The 3rd cell contains the interrupt flags. This is normally | |
| 61 | + IRQ_TYPE_LEVEL_HIGH (4). | |
| 62 | + | |
| 63 | + reg: | |
| 64 | + description: | | |
| 65 | + Specifies base physical address and size of the AIC registers. | |
| 66 | + maxItems: 1 | |
| 67 | + | |
| 68 | +required: | |
| 69 | + - compatible | |
| 70 | + - '#interrupt-cells' | |
| 71 | + - interrupt-controller | |
| 72 | + - reg | |
| 73 | + | |
| 74 | +additionalProperties: false | |
| 75 | + | |
| 76 | +examples: | |
| 77 | + - | | |
| 78 | + soc { | |
| 79 | + #address-cells = <2>; | |
| 80 | + #size-cells = <2>; | |
| 81 | + | |
| 82 | + aic: interrupt-controller@23b100000 { | |
| 83 | + compatible = "apple,t8103-aic", "apple,aic"; | |
| 84 | + #interrupt-cells = <3>; | |
| 85 | + interrupt-controller; | |
| 86 | + reg = <0x2 0x3b100000 0x0 0x8000>; | |
| 87 | + }; | |
| 88 | + }; | |
| @@ -0,0 +1,52 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: IDT 79RC32434 Interrupt Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Thomas Bogendoerfer <tsbogend@alpha.franken.de> | |
| 11 | + | |
| 12 | +allOf: | |
| 13 | + - $ref: /schemas/interrupt-controller.yaml# | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + "#interrupt-cells": | |
| 17 | + const: 1 | |
| 18 | + | |
| 19 | + compatible: | |
| 20 | + const: idt,32434-pic | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + interrupts: | |
| 26 | + maxItems: 1 | |
| 27 | + | |
| 28 | + interrupt-controller: true | |
| 29 | + | |
| 30 | +required: | |
| 31 | + - "#interrupt-cells" | |
| 32 | + - compatible | |
| 33 | + - reg | |
| 34 | + - interrupt-controller | |
| 35 | + - interrupts | |
| 36 | + | |
| 37 | +additionalProperties: false | |
| 38 | + | |
| 39 | +examples: | |
| 40 | + - | | |
| 41 | + idtpic3: interrupt-controller@3800c { | |
| 42 | + compatible = "idt,32434-pic"; | |
| 43 | + reg = <0x3800c 0x0c>; | |
| 44 | + | |
| 45 | + interrupt-controller; | |
| 46 | + #interrupt-cells = <1>; | |
| 47 | + | |
| 48 | + interrupt-parent = <&cpuintc>; | |
| 49 | + interrupts = <3>; | |
| 50 | + }; | |
| 51 | + | |
| 52 | +... | |
| @@ -47,7 +47,7 @@ examples: · 46 unmodified lines | ||
| 47 | 47 | - | |
| 48 | 48 | #include <dt-bindings/interrupt-controller/irq.h> |
| 49 | 49 | htintc: interrupt-controller@1fb000080 { |
| 50 | − compatible = "loongson,htintc-1.0"; | |
| 50 | + compatible = "loongson,htpic-1.0"; | |
| 51 | 51 | reg = <0xfb000080 0x40>; |
| 52 | 52 | interrupt-controller; |
| 53 | 53 | #interrupt-cells = <1>; |
| @@ -10,9 +10,9 @@ maintainers: · 9 unmodified lines | ||
| 10 | 10 | - Jiaxun Yang <jiaxun.yang@flygoat.com> |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | − This interrupt controller is found in the Loongson-3 family of chips as the primary | |
| 14 | − package interrupt controller which can route local I/O interrupt to interrupt lines | |
| 15 | − of cores. | |
| 13 | + This interrupt controller is found in the Loongson-3 family of chips and | |
| 14 | + Loongson-2K1000 chip, as the primary package interrupt controller which | |
| 15 | + can route local I/O interrupt to interrupt lines of cores. | |
| 16 | 16 | |
| 17 | 17 | allOf: |
| 18 | 18 | - $ref: /schemas/interrupt-controller.yaml# |
| @@ -22,9 +22,17 @@ properties: · 3 unmodified lines | ||
| 22 | 22 | oneOf: |
| 23 | 23 | - const: loongson,liointc-1.0 |
| 24 | 24 | - const: loongson,liointc-1.0a |
| 25 | + - const: loongson,liointc-2.0 | |
| 25 | 26 | |
| 26 | 27 | reg: |
| 27 | − maxItems: 1 | |
| 28 | + minItems: 1 | |
| 29 | + maxItems: 3 | |
| 30 | + | |
| 31 | + reg-names: | |
| 32 | + items: | |
| 33 | + - const: main | |
| 34 | + - const: isr0 | |
| 35 | + - const: isr1 | |
| 28 | 36 | |
| 29 | 37 | interrupt-controller: true |
| 30 | 38 | |
| @@ -69,6 +77,26 @@ required: · 38 unmodified lines | ||
| 69 | 77 | |
| 70 | 78 | unevaluatedProperties: false |
| 71 | 79 | |
| 80 | +if: | |
| 81 | + properties: | |
| 82 | + compatible: | |
| 83 | + contains: | |
| 84 | + enum: | |
| 85 | + - loongson,liointc-2.0 | |
| 86 | + | |
| 87 | +then: | |
| 88 | + properties: | |
| 89 | + reg: | |
| 90 | + minItems: 3 | |
| 91 | + | |
| 92 | + required: | |
| 93 | + - reg-names | |
| 94 | + | |
| 95 | +else: | |
| 96 | + properties: | |
| 97 | + reg: | |
| 98 | + maxItems: 1 | |
| 99 | + | |
| 72 | 100 | examples: |
| 73 | 101 | - | |
| 74 | 102 | iointc: interrupt-controller@3ff01400 { |
| @@ -0,0 +1,39 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/interrupt-controller/nuvoton,wpcm450-aic.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Nuvoton WPCM450 Advanced Interrupt Controller bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jonathan Neuschäfer <j.neuschaefer@gmx.net> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + '#interrupt-cells': | |
| 14 | + const: 2 | |
| 15 | + | |
| 16 | + compatible: | |
| 17 | + const: nuvoton,wpcm450-aic | |
| 18 | + | |
| 19 | + interrupt-controller: true | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | +additionalProperties: false | |
| 25 | + | |
| 26 | +required: | |
| 27 | + - '#interrupt-cells' | |
| 28 | + - compatible | |
| 29 | + - reg | |
| 30 | + - interrupt-controller | |
| 31 | + | |
| 32 | +examples: | |
| 33 | + - | | |
| 34 | + aic: interrupt-controller@b8002000 { | |
| 35 | + compatible = "nuvoton,wpcm450-aic"; | |
| 36 | + reg = <0xb8002000 0x1000>; | |
| 37 | + interrupt-controller; | |
| 38 | + #interrupt-cells = <2>; | |
| 39 | + }; | |
| @@ -19,6 +19,7 @@ Properties: · 18 unmodified lines | ||
| 19 | 19 | Value type: <string> |
| 20 | 20 | Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc" |
| 21 | 21 | - "qcom,sc7180-pdc": For SC7180 |
| 22 | + - "qcom,sc7280-pdc": For SC7280 | |
| 22 | 23 | - "qcom,sdm845-pdc": For SDM845 |
| 23 | 24 | - "qcom,sdm8250-pdc": For SM8250 |
| 24 | 25 | - "qcom,sdm8350-pdc": For SM8350 |
| @@ -34,6 +34,7 @@ properties: · 33 unmodified lines | ||
| 34 | 34 | items: |
| 35 | 35 | - enum: |
| 36 | 36 | - qcom,sc7180-smmu-500 |
| 37 | + - qcom,sc7280-smmu-500 | |
| 37 | 38 | - qcom,sc8180x-smmu-500 |
| 38 | 39 | - qcom,sdm845-smmu-500 |
| 39 | 40 | - qcom,sm8150-smmu-500 |
| @@ -0,0 +1,57 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +# Copyright 2020 Unisoc Inc. | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml# | |
| 6 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 7 | + | |
| 8 | +title: Unisoc IOMMU and Multi-media MMU | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Chunyan Zhang <zhang.lyra@gmail.com> | |
| 12 | + | |
| 13 | +properties: | |
| 14 | + compatible: | |
| 15 | + enum: | |
| 16 | + - sprd,iommu-v1 | |
| 17 | + | |
| 18 | + "#iommu-cells": | |
| 19 | + const: 0 | |
| 20 | + description: | |
| 21 | + Unisoc IOMMUs are all single-master IOMMU devices, therefore no | |
| 22 | + additional information needs to associate with its master device. | |
| 23 | + Please refer to the generic bindings document for more details, | |
| 24 | + Documentation/devicetree/bindings/iommu/iommu.txt | |
| 25 | + | |
| 26 | + reg: | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 29 | + clocks: | |
| 30 | + description: | |
| 31 | + Reference to a gate clock phandle, since access to some of IOMMUs are | |
| 32 | + controlled by gate clock, but this is not required. | |
| 33 | + | |
| 34 | +required: | |
| 35 | + - compatible | |
| 36 | + - reg | |
| 37 | + - "#iommu-cells" | |
| 38 | + | |
| 39 | +additionalProperties: false | |
| 40 | + | |
| 41 | +examples: | |
| 42 | + - | | |
| 43 | + iommu_disp: iommu@63000800 { | |
| 44 | + compatible = "sprd,iommu-v1"; | |
| 45 | + reg = <0x63000800 0x80>; | |
| 46 | + #iommu-cells = <0>; | |
| 47 | + }; | |
| 48 | + | |
| 49 | + - | | |
| 50 | + iommu_jpg: iommu@62300300 { | |
| 51 | + compatible = "sprd,iommu-v1"; | |
| 52 | + reg = <0x62300300 0x80>; | |
| 53 | + #iommu-cells = <0>; | |
| 54 | + clocks = <&mm_gate 1>; | |
| 55 | + }; | |
| 56 | + | |
| 57 | +... | |
| @@ -4,13 +4,13 @@ · 3 unmodified lines | ||
| 4 | 4 | $id: http://devicetree.org/schemas/leds/backlight/kinetic,ktd253.yaml# |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | −title: Kinetic Technologies KTD253 one-wire backlight | |
| 7 | +title: Kinetic Technologies KTD253 and KTD259 one-wire backlight | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Linus Walleij <linus.walleij@linaro.org> |
| 11 | 11 | |
| 12 | 12 | description: | |
| 13 | − The Kinetic Technologies KTD253 is a white LED backlight that is | |
| 13 | + The Kinetic Technologies KTD253 and KTD259 are white LED backlights | |
| 14 | 14 | controlled by a single GPIO line. If you just turn on the backlight |
| 15 | 15 | it goes to maximum backlight then you can set the level of backlight |
| 16 | 16 | using pulses on the enable wire. This is sometimes referred to as |
| @@ -21,7 +21,10 @@ allOf: · 4 unmodified lines | ||
| 21 | 21 | |
| 22 | 22 | properties: |
| 23 | 23 | compatible: |
| 24 | − const: kinetic,ktd253 | |
| 24 | + items: | |
| 25 | + - enum: | |
| 26 | + - kinetic,ktd253 | |
| 27 | + - kinetic,ktd259 | |
| 25 | 28 | |
| 26 | 29 | enable-gpios: |
| 27 | 30 | description: GPIO to use to enable/disable and dim the backlight. |
| @@ -19,6 +19,7 @@ properties: · 18 unmodified lines | ||
| 19 | 19 | compatible: |
| 20 | 20 | enum: |
| 21 | 21 | - qcom,pm8941-wled |
| 22 | + - qcom,pmi8994-wled | |
| 22 | 23 | - qcom,pmi8998-wled |
| 23 | 24 | - qcom,pm660l-wled |
| 24 | 25 | - qcom,pm8150l-wled |
| @@ -14,6 +14,17 @@ properties: · 13 unmodified lines | ||
| 14 | 14 | compatible: |
| 15 | 15 | const: intel,lgm-ssoled |
| 16 | 16 | |
| 17 | + reg: | |
| 18 | + maxItems: 1 | |
| 19 | + | |
| 20 | + clocks: | |
| 21 | + maxItems: 2 | |
| 22 | + | |
| 23 | + clock-names: | |
| 24 | + items: | |
| 25 | + - const: sso | |
| 26 | + - const: fpid | |
| 27 | + | |
| 17 | 28 | gpio-controller: true |
| 18 | 29 | |
| 19 | 30 | '#gpio-cells': |
| @@ -36,8 +47,15 @@ properties: · 16 unmodified lines | ||
| 36 | 47 | |
| 37 | 48 | additionalProperties: false |
| 38 | 49 | |
| 50 | + properties: | |
| 51 | + '#address-cells': | |
| 52 | + const: 1 | |
| 53 | + | |
| 54 | + '#size-cells': | |
| 55 | + const: 0 | |
| 56 | + | |
| 39 | 57 | patternProperties: |
| 40 | − "^led@[0-23]$": | |
| 58 | + "^led@[0-2]$": | |
| 41 | 59 | type: object |
| 42 | 60 | |
| 43 | 61 | properties: |
| @@ -81,7 +99,7 @@ examples: · 37 unmodified lines | ||
| 81 | 99 | #include <dt-bindings/leds/common.h> |
| 82 | 100 | |
| 83 | 101 | ssogpio: ssogpio@e0d40000 { |
| 84 | − compatible = "intel,sso-led"; | |
| 102 | + compatible = "intel,lgm-ssoled"; | |
| 85 | 103 | reg = <0xE0D40000 0x2E4>; |
| 86 | 104 | gpio-controller; |
| 87 | 105 | #gpio-cells = <2>; |
| @@ -103,8 +121,8 @@ examples: · 15 unmodified lines | ||
| 103 | 121 | led-gpio = <&ssogpio 0 0>; |
| 104 | 122 | }; |
| 105 | 123 | |
| 106 | − led@23 { | |
| 107 | − reg = <23>; | |
| 124 | + led@2 { | |
| 125 | + reg = <2>; | |
| 108 | 126 | function = LED_FUNCTION_POWER; |
| 109 | 127 | color = <LED_COLOR_ID_GREEN>; |
| 110 | 128 | led-gpio = <&ssogpio 23 0>; |
| @@ -0,0 +1,57 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/leds/leds-rt4505.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Richtek RT4505 Single Channel LED Driver | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - ChiYuan Huang <cy_huang@richtek.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The RT4505 is a flash LED driver that can support up to 375mA and 1.5A for | |
| 14 | + torch and flash mode, respectively. | |
| 15 | + | |
| 16 | + The data sheet can be found at: | |
| 17 | + https://www.richtek.com/assets/product_file/RT4505/DS4505-02.pdf | |
| 18 | + | |
| 19 | +properties: | |
| 20 | + compatible: | |
| 21 | + const: richtek,rt4505 | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + description: I2C slave address of the controller. | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + led: | |
| 28 | + type: object | |
| 29 | + $ref: common.yaml# | |
| 30 | + | |
| 31 | +required: | |
| 32 | + - compatible | |
| 33 | + - reg | |
| 34 | + | |
| 35 | +additionalProperties: false | |
| 36 | + | |
| 37 | +examples: | |
| 38 | + - | | |
| 39 | + #include <dt-bindings/leds/common.h> | |
| 40 | + | |
| 41 | + i2c0 { | |
| 42 | + #address-cells = <1>; | |
| 43 | + #size-cells = <0>; | |
| 44 | + | |
| 45 | + led-controller@63 { | |
| 46 | + compatible = "richtek,rt4505"; | |
| 47 | + reg = <0x63>; | |
| 48 | + | |
| 49 | + rt4505_flash: led { | |
| 50 | + function = LED_FUNCTION_FLASH; | |
| 51 | + color = <LED_COLOR_ID_WHITE>; | |
| 52 | + led-max-microamp = <375000>; | |
| 53 | + flash-max-microamp = <1500000>; | |
| 54 | + flash-max-timeout-us = <800000>; | |
| 55 | + }; | |
| 56 | + }; | |
| 57 | + }; | |
| @@ -34,12 +34,15 @@ properties: · 33 unmodified lines | ||
| 34 | 34 | - fsl,imx8mm-mu |
| 35 | 35 | - fsl,imx8mn-mu |
| 36 | 36 | - fsl,imx8mp-mu |
| 37 | + - fsl,imx8qm-mu | |
| 37 | 38 | - fsl,imx8qxp-mu |
| 38 | 39 | - const: fsl,imx6sx-mu |
| 39 | 40 | - description: To communicate with i.MX8 SCU with fast IPC |
| 40 | 41 | items: |
| 41 | 42 | - const: fsl,imx8-mu-scu |
| 42 | − - const: fsl,imx8qxp-mu | |
| 43 | + - enum: | |
| 44 | + - fsl,imx8qm-mu | |
| 45 | + - fsl,imx8qxp-mu | |
| 43 | 46 | - const: fsl,imx6sx-mu |
| 44 | 47 | |
| 45 | 48 | reg: |
| @@ -25,6 +25,8 @@ properties: · 24 unmodified lines | ||
| 25 | 25 | items: |
| 26 | 26 | - enum: |
| 27 | 27 | - qcom,sm8250-ipcc |
| 28 | + - qcom,sm8350-ipcc | |
| 29 | + - qcom,sc7280-ipcc | |
| 28 | 30 | - const: qcom,ipcc |
| 29 | 31 | |
| 30 | 32 | reg: |
| @@ -15,6 +15,7 @@ properties: · 14 unmodified lines | ||
| 15 | 15 | compatible: |
| 16 | 16 | enum: |
| 17 | 17 | - sprd,sc9860-mailbox |
| 18 | + - sprd,sc9863a-mailbox | |
| 18 | 19 | |
| 19 | 20 | reg: |
| 20 | 21 | items: |
| @@ -22,9 +23,15 @@ properties: · 1 unmodified line | ||
| 22 | 23 | - description: outbox registers' base address |
| 23 | 24 | |
| 24 | 25 | interrupts: |
| 26 | + minItems: 2 | |
| 27 | + maxItems: 3 | |
| 28 | + | |
| 29 | + interrupt-names: | |
| 30 | + minItems: 2 | |
| 25 | 31 | items: |
| 26 | − - description: inbox interrupt | |
| 27 | − - description: outbox interrupt | |
| 32 | + - const: inbox | |
| 33 | + - const: outbox | |
| 34 | + - const: supp-outbox | |
| 28 | 35 | |
| 29 | 36 | clocks: |
| 30 | 37 | maxItems: 1 |
| @@ -40,6 +47,7 @@ required: · 9 unmodified lines | ||
| 40 | 47 | - compatible |
| 41 | 48 | - reg |
| 42 | 49 | - interrupts |
| 50 | + - interrupt-names | |
| 43 | 51 | - "#mbox-cells" |
| 44 | 52 | - clocks |
| 45 | 53 | - clock-names |
| @@ -56,5 +64,6 @@ examples: · 10 unmodified lines | ||
| 56 | 64 | clock-names = "enable"; |
| 57 | 65 | clocks = <&aon_gate 53>; |
| 58 | 66 | interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
| 67 | + interrupt-names = "inbox", "outbox"; | |
| 59 | 68 | }; |
| 60 | 69 | ... |
| @@ -1,50 +0,0 @@ | ||
| 1 | −Texas Instruments' Secure Proxy | |
| 2 | −======================================== | |
| 3 | − | |
| 4 | −The Texas Instruments' secure proxy is a mailbox controller that has | |
| 5 | −configurable queues selectable at SoC(System on Chip) integration. The | |
| 6 | −Message manager is broken up into different address regions that are | |
| 7 | −called "threads" or "proxies" - each instance is unidirectional and is | |
| 8 | −instantiated at SoC integration level by system controller to indicate | |
| 9 | −receive or transmit path. | |
| 10 | − | |
| 11 | −Message Manager Device Node: | |
| 12 | −=========================== | |
| 13 | −Required properties: | |
| 14 | −-------------------- | |
| 15 | −- compatible: Shall be "ti,am654-secure-proxy" | |
| 16 | −- reg-names target_data - Map the proxy data region | |
| 17 | − rt - Map the realtime status region | |
| 18 | − scfg - Map the configuration region | |
| 19 | −- reg: Contains the register map per reg-names. | |
| 20 | −- #mbox-cells Shall be 1 and shall refer to the transfer path | |
| 21 | − called thread. | |
| 22 | −- interrupt-names: Contains interrupt names matching the rx transfer path | |
| 23 | − for a given SoC. Receive interrupts shall be of the | |
| 24 | − format: "rx_<PID>". | |
| 25 | −- interrupts: Contains the interrupt information corresponding to | |
| 26 | − interrupt-names property. | |
| 27 | − | |
| 28 | −Example(AM654): | |
| 29 | −------------ | |
| 30 | − | |
| 31 | − secure_proxy: mailbox@32c00000 { | |
| 32 | − compatible = "ti,am654-secure-proxy"; | |
| 33 | − #mbox-cells = <1>; | |
| 34 | − reg-names = "target_data", "rt", "scfg"; | |
| 35 | − reg = <0x0 0x32c00000 0x0 0x100000>, | |
| 36 | − <0x0 0x32400000 0x0 0x100000>, | |
| 37 | − <0x0 0x32800000 0x0 0x100000>; | |
| 38 | − interrupt-names = "rx_011"; | |
| 39 | − interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | |
| 40 | − }; | |
| 41 | − | |
| 42 | − dmsc: dmsc { | |
| 43 | − [...] | |
| 44 | − mbox-names = "rx", "tx"; | |
| 45 | − # RX Thread ID is 11 | |
| 46 | − # TX Thread ID is 13 | |
| 47 | − mboxes= <&secure_proxy 11>, | |
| 48 | − <&secure_proxy 13>; | |
| 49 | − [...] | |
| 50 | − }; | |
| @@ -0,0 +1,79 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Texas Instruments' Secure Proxy | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Nishanth Menon <nm@ti.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The Texas Instruments' secure proxy is a mailbox controller that has | |
| 14 | + configurable queues selectable at SoC(System on Chip) integration. The | |
| 15 | + Message manager is broken up into different address regions that are | |
| 16 | + called "threads" or "proxies" - each instance is unidirectional and is | |
| 17 | + instantiated at SoC integration level by system controller to indicate | |
| 18 | + receive or transmit path. | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + $nodename: | |
| 22 | + pattern: "^mailbox@[0-9a-f]+$" | |
| 23 | + | |
| 24 | + compatible: | |
| 25 | + const: ti,am654-secure-proxy | |
| 26 | + | |
| 27 | + "#mbox-cells": | |
| 28 | + const: 1 | |
| 29 | + description: | |
| 30 | + Contains the secure proxy thread ID used for the specific transfer path. | |
| 31 | + | |
| 32 | + reg-names: | |
| 33 | + items: | |
| 34 | + - const: target_data | |
| 35 | + - const: rt | |
| 36 | + - const: scfg | |
| 37 | + | |
| 38 | + reg: | |
| 39 | + minItems: 3 | |
| 40 | + | |
| 41 | + interrupt-names: | |
| 42 | + minItems: 1 | |
| 43 | + maxItems: 100 | |
| 44 | + items: | |
| 45 | + pattern: "^rx_[0-9]{3}$" | |
| 46 | + description: | |
| 47 | + Contains the interrupt name information for the Rx interrupt path for | |
| 48 | + secure proxy thread in the form 'rx_<PID>'. | |
| 49 | + | |
| 50 | + interrupts: | |
| 51 | + minItems: 1 | |
| 52 | + maxItems: 100 | |
| 53 | + description: | |
| 54 | + Contains the interrupt information for the Rx interrupt path for secure | |
| 55 | + proxy. | |
| 56 | + | |
| 57 | +required: | |
| 58 | + - compatible | |
| 59 | + - reg-names | |
| 60 | + - reg | |
| 61 | + - interrupt-names | |
| 62 | + - interrupts | |
| 63 | + - "#mbox-cells" | |
| 64 | + | |
| 65 | +additionalProperties: false | |
| 66 | + | |
| 67 | +examples: | |
| 68 | + - | | |
| 69 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 70 | + secure_proxy: mailbox@32c00000 { | |
| 71 | + compatible = "ti,am654-secure-proxy"; | |
| 72 | + #mbox-cells = <1>; | |
| 73 | + reg-names = "target_data", "rt", "scfg"; | |
| 74 | + reg = <0x32c00000 0x100000>, | |
| 75 | + <0x32400000 0x100000>, | |
| 76 | + <0x32800000 0x100000>; | |
| 77 | + interrupt-names = "rx_011"; | |
| 78 | + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | |
| 79 | + }; | |
| @@ -20,16 +20,12 @@ properties: · 19 unmodified lines | ||
| 20 | 20 | - const: allwinner,sun5i-a13-ir |
| 21 | 21 | - const: allwinner,sun6i-a31-ir |
| 22 | 22 | - items: |
| 23 | − - const: allwinner,sun8i-a83t-ir | |
| 24 | − - const: allwinner,sun6i-a31-ir | |
| 25 | − - items: | |
| 26 | − - const: allwinner,sun8i-r40-ir | |
| 27 | − - const: allwinner,sun6i-a31-ir | |
| 28 | − - items: | |
| 29 | − - const: allwinner,sun50i-a64-ir | |
| 30 | − - const: allwinner,sun6i-a31-ir | |
| 31 | − - items: | |
| 32 | − - const: allwinner,sun50i-h6-ir | |
| 23 | + - enum: | |
| 24 | + - allwinner,sun8i-a83t-ir | |
| 25 | + - allwinner,sun8i-r40-ir | |
| 26 | + - allwinner,sun50i-a64-ir | |
| 27 | + - allwinner,sun50i-h6-ir | |
| 28 | + - allwinner,sun50i-h616-ir | |
| 33 | 29 | - const: allwinner,sun6i-a31-ir |
| 34 | 30 | |
| 35 | 31 | reg: |
| @@ -19,7 +19,7 @@ Required properties: · 18 unmodified lines | ||
| 19 | 19 | Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml |
| 20 | 20 | for details. |
| 21 | 21 | - iommus: should point to the respective IOMMU block with master port as |
| 22 | − argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | |
| 22 | + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | |
| 23 | 23 | for details. |
| 24 | 24 | |
| 25 | 25 | Example: |
| @@ -17,7 +17,7 @@ Required properties: · 16 unmodified lines | ||
| 17 | 17 | Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml |
| 18 | 18 | for details. |
| 19 | 19 | - iommus: should point to the respective IOMMU block with master port as |
| 20 | − argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | |
| 20 | + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | |
| 21 | 21 | for details. |
| 22 | 22 | |
| 23 | 23 | Example: |
| @@ -25,7 +25,7 @@ Required properties (DMA function blocks, child node): · 24 unmodified lines | ||
| 25 | 25 | "mediatek,mt8173-mdp-wdma" |
| 26 | 26 | "mediatek,mt8173-mdp-wrot" |
| 27 | 27 | - iommus: should point to the respective IOMMU block with master port as |
| 28 | − argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | |
| 28 | + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | |
| 29 | 29 | for details. |
| 30 | 30 | - mediatek,larb: must contain the local arbiters in the current Socs, see |
| 31 | 31 | Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml |
| @@ -4,7 +4,9 @@ Mediatek Video Codec is the video codec hw present in Mediatek SoCs which · 3 unmodified lines | ||
| 4 | 4 | supports high resolution encoding and decoding functionalities. |
| 5 | 5 | |
| 6 | 6 | Required properties: |
| 7 | −- compatible : "mediatek,mt8173-vcodec-enc" for MT8173 encoder | |
| 7 | +- compatible : must be one of the following string: | |
| 8 | + "mediatek,mt8173-vcodec-enc-vp8" for mt8173 vp8 encoder. | |
| 9 | + "mediatek,mt8173-vcodec-enc" for mt8173 avc encoder. | |
| 8 | 10 | "mediatek,mt8183-vcodec-enc" for MT8183 encoder. |
| 9 | 11 | "mediatek,mt8173-vcodec-dec" for MT8173 decoder. |
| 10 | 12 | - reg : Physical base address of the video codec registers and length of |
| @@ -13,12 +15,12 @@ Required properties: · 2 unmodified lines | ||
| 13 | 15 | - mediatek,larb : must contain the local arbiters in the current Socs. |
| 14 | 16 | - clocks : list of clock specifiers, corresponding to entries in |
| 15 | 17 | the clock-names property. |
| 16 | −- clock-names: encoder must contain "venc_sel_src", "venc_sel",, | |
| 17 | − "venc_lt_sel_src", "venc_lt_sel", decoder must contain "vcodecpll", | |
| 18 | − "univpll_d2", "clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll", | |
| 19 | − "venc_lt_sel", "vdec_bus_clk_src". | |
| 18 | +- clock-names: avc encoder must contain "venc_sel", vp8 encoder must | |
| 19 | + contain "venc_lt_sel", decoder must contain "vcodecpll", "univpll_d2", | |
| 20 | + "clk_cci400_sel", "vdec_sel", "vdecpll", "vencpll", "venc_lt_sel", | |
| 21 | + "vdec_bus_clk_src". | |
| 20 | 22 | - iommus : should point to the respective IOMMU block with master port as |
| 21 | − argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | |
| 23 | + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | |
| 22 | 24 | for details. |
| 23 | 25 | One of the two following nodes: |
| 24 | 26 | - mediatek,vpu : the node of the video processor unit, if using VPU. |
| @@ -80,14 +82,10 @@ vcodec_dec: vcodec@16000000 { · 55 unmodified lines | ||
| 80 | 82 | assigned-clock-rates = <0>, <0>, <0>, <1482000000>, <800000000>; |
| 81 | 83 | }; |
| 82 | 84 | |
| 83 | − vcodec_enc: vcodec@18002000 { | |
| 85 | +vcodec_enc_avc: vcodec@18002000 { | |
| 84 | 86 | compatible = "mediatek,mt8173-vcodec-enc"; |
| 85 | − reg = <0 0x18002000 0 0x1000>, /*VENC_SYS*/ | |
| 86 | − <0 0x19002000 0 0x1000>; /*VENC_LT_SYS*/ | |
| 87 | − interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>, | |
| 88 | − <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; | |
| 89 | − mediatek,larb = <&larb3>, | |
| 90 | − <&larb5>; | |
| 87 | + reg = <0 0x18002000 0 0x1000>; | |
| 88 | + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_LOW>; | |
| 91 | 89 | iommus = <&iommu M4U_PORT_VENC_RCPU>, |
| 92 | 90 | <&iommu M4U_PORT_VENC_REC>, |
| 93 | 91 | <&iommu M4U_PORT_VENC_BSDMA>, |
| @@ -98,8 +96,20 @@ vcodec_dec: vcodec@16000000 { · 4 unmodified lines | ||
| 98 | 96 | <&iommu M4U_PORT_VENC_REF_LUMA>, |
| 99 | 97 | <&iommu M4U_PORT_VENC_REF_CHROMA>, |
| 100 | 98 | <&iommu M4U_PORT_VENC_NBM_RDMA>, |
| 101 | − <&iommu M4U_PORT_VENC_NBM_WDMA>, | |
| 102 | − <&iommu M4U_PORT_VENC_RCPU_SET2>, | |
| 99 | + <&iommu M4U_PORT_VENC_NBM_WDMA>; | |
| 100 | + mediatek,larb = <&larb3>; | |
| 101 | + mediatek,vpu = <&vpu>; | |
| 102 | + clocks = <&topckgen CLK_TOP_VENC_SEL>; | |
| 103 | + clock-names = "venc_sel"; | |
| 104 | + assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>; | |
| 105 | + assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>; | |
| 106 | + }; | |
| 107 | + | |
| 108 | +vcodec_enc_vp8: vcodec@19002000 { | |
| 109 | + compatible = "mediatek,mt8173-vcodec-enc-vp8"; | |
| 110 | + reg = <0 0x19002000 0 0x1000>; /* VENC_LT_SYS */ | |
| 111 | + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_LOW>; | |
| 112 | + iommus = <&iommu M4U_PORT_VENC_RCPU_SET2>, | |
| 103 | 113 | <&iommu M4U_PORT_VENC_REC_FRM_SET2>, |
| 104 | 114 | <&iommu M4U_PORT_VENC_BSDMA_SET2>, |
| 105 | 115 | <&iommu M4U_PORT_VENC_SV_COMA_SET2>, |
| @@ -108,17 +118,10 @@ vcodec_dec: vcodec@16000000 { · 2 unmodified lines | ||
| 108 | 118 | <&iommu M4U_PORT_VENC_CUR_CHROMA_SET2>, |
| 109 | 119 | <&iommu M4U_PORT_VENC_REF_LUMA_SET2>, |
| 110 | 120 | <&iommu M4U_PORT_VENC_REC_CHROMA_SET2>; |
| 121 | + mediatek,larb = <&larb5>; | |
| 111 | 122 | mediatek,vpu = <&vpu>; |
| 112 | − clocks = <&topckgen CLK_TOP_VENCPLL_D2>, | |
| 113 | − <&topckgen CLK_TOP_VENC_SEL>, | |
| 114 | − <&topckgen CLK_TOP_UNIVPLL1_D2>, | |
| 115 | − <&topckgen CLK_TOP_VENC_LT_SEL>; | |
| 116 | − clock-names = "venc_sel_src", | |
| 117 | − "venc_sel", | |
| 118 | − "venc_lt_sel_src", | |
| 119 | − "venc_lt_sel"; | |
| 120 | − assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>, | |
| 121 | − <&topckgen CLK_TOP_VENC_LT_SEL>; | |
| 122 | − assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>, | |
| 123 | − <&topckgen CLK_TOP_UNIVPLL1_D2>; | |
| 123 | + clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; | |
| 124 | + clock-names = "venc_lt_sel"; | |
| 125 | + assigned-clocks = <&topckgen CLK_TOP_VENC_LT_SEL>; | |
| 126 | + assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL_370P5>; | |
| 124 | 127 | }; |
| @@ -4,14 +4,19 @@ · 3 unmodified lines | ||
| 4 | 4 | $id: http://devicetree.org/schemas/media/nxp,imx7-mipi-csi2.yaml# |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | −title: NXP i.MX7 Mipi CSI2 | |
| 7 | +title: NXP i.MX7 MIPI CSI-2 receiver | |
| 8 | 8 | |
| 9 | 9 | maintainers: |
| 10 | 10 | - Rui Miguel Silva <rmfrfs@gmail.com> |
| 11 | 11 | |
| 12 | −description: | | |
| 13 | − This is the device node for the MIPI CSI-2 receiver core in i.MX7 soc. It is | |
| 14 | − compatible with previous version of samsung d-phy. | |
| 12 | +description: |- | |
| 13 | + The NXP i.MX7 SoC family includes a MIPI CSI-2 receiver IP core, documented | |
| 14 | + as "CSIS V3.3". The IP core seems to originate from Samsung, and may be | |
| 15 | + compatible with some of the Exynos4 ad S5P SoCs. | |
| 16 | + | |
| 17 | + While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is | |
| 18 | + completely wrapped by the CSIS and doesn't expose a control interface of its | |
| 19 | + own. This binding thus covers both IP cores. | |
| 15 | 20 | |
| 16 | 21 | properties: |
| 17 | 22 | compatible: |
| @@ -24,8 +29,10 @@ properties: · 6 unmodified lines | ||
| 24 | 29 | maxItems: 1 |
| 25 | 30 | |
| 26 | 31 | clocks: |
| 27 | − minItems: 3 | |
| 28 | − maxItems: 3 | |
| 32 | + items: | |
| 33 | + - description: The peripheral clock (a.k.a. APB clock) | |
| 34 | + - description: The external clock (optionally used as the pixel clock) | |
| 35 | + - description: The MIPI D-PHY clock | |
| 29 | 36 | |
| 30 | 37 | clock-names: |
| 31 | 38 | items: |
| @@ -37,26 +44,16 @@ properties: · 5 unmodified lines | ||
| 37 | 44 | maxItems: 1 |
| 38 | 45 | |
| 39 | 46 | phy-supply: |
| 40 | − description: | |
| 41 | − Phandle to a regulator that provides power to the PHY. This | |
| 42 | − regulator will be managed during the PHY power on/off sequence. | |
| 47 | + description: The MIPI D-PHY digital power supply | |
| 43 | 48 | |
| 44 | 49 | resets: |
| 45 | − maxItems: 1 | |
| 46 | − | |
| 47 | − reset-names: | |
| 48 | − const: mrst | |
| 50 | + items: | |
| 51 | + - description: MIPI D-PHY slave reset | |
| 49 | 52 | |
| 50 | 53 | clock-frequency: |
| 51 | − description: | |
| 52 | − The IP main (system bus) clock frequency in Hertz | |
| 54 | + description: The desired external clock ("wrap") frequency, in Hz | |
| 53 | 55 | default: 166000000 |
| 54 | 56 | |
| 55 | − fsl,csis-hs-settle: | |
| 56 | − $ref: /schemas/types.yaml#/definitions/uint32 | |
| 57 | − description: | |
| 58 | − Differential receiver (HS-RX) settle time | |
| 59 | − | |
| 60 | 57 | ports: |
| 61 | 58 | $ref: /schemas/graph.yaml#/properties/ports |
| 62 | 59 | |
| @@ -98,7 +95,6 @@ required: · 35 unmodified lines | ||
| 98 | 95 | - power-domains |
| 99 | 96 | - phy-supply |
| 100 | 97 | - resets |
| 101 | − - reset-names | |
| 102 | 98 | - ports |
| 103 | 99 | |
| 104 | 100 | additionalProperties: false |
| @@ -111,43 +107,41 @@ examples: · 6 unmodified lines | ||
| 111 | 107 | #include <dt-bindings/reset/imx7-reset.h> |
| 112 | 108 | |
| 113 | 109 | mipi_csi: mipi-csi@30750000 { |
| 114 | − compatible = "fsl,imx7-mipi-csi2"; | |
| 115 | − reg = <0x30750000 0x10000>; | |
| 116 | − interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
| 117 | − | |
| 118 | − clocks = <&clks IMX7D_IPG_ROOT_CLK>, | |
| 119 | − <&clks IMX7D_MIPI_CSI_ROOT_CLK>, | |
| 120 | − <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; | |
| 121 | − clock-names = "pclk", "wrap", "phy"; | |
| 122 | − clock-frequency = <166000000>; | |
| 123 | − | |
| 124 | − power-domains = <&pgc_mipi_phy>; | |
| 125 | − phy-supply = <®_1p0d>; | |
| 126 | − resets = <&src IMX7_RESET_MIPI_PHY_MRST>; | |
| 127 | − reset-names = "mrst"; | |
| 128 | − fsl,csis-hs-settle = <3>; | |
| 129 | − | |
| 130 | − ports { | |
| 131 | − #address-cells = <1>; | |
| 132 | − #size-cells = <0>; | |
| 133 | − | |
| 134 | − port@0 { | |
| 135 | − reg = <0>; | |
| 136 | − | |
| 137 | − mipi_from_sensor: endpoint { | |
| 138 | − remote-endpoint = <&ov2680_to_mipi>; | |
| 139 | − data-lanes = <1>; | |
| 140 | − }; | |
| 141 | − }; | |
| 142 | − | |
| 143 | − port@1 { | |
| 144 | − reg = <1>; | |
| 145 | − | |
| 146 | − mipi_vc0_to_csi_mux: endpoint { | |
| 147 | − remote-endpoint = <&csi_mux_from_mipi_vc0>; | |
| 148 | − }; | |
| 149 | − }; | |
| 110 | + compatible = "fsl,imx7-mipi-csi2"; | |
| 111 | + reg = <0x30750000 0x10000>; | |
| 112 | + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | |
| 113 | + | |
| 114 | + clocks = <&clks IMX7D_IPG_ROOT_CLK>, | |
| 115 | + <&clks IMX7D_MIPI_CSI_ROOT_CLK>, | |
| 116 | + <&clks IMX7D_MIPI_DPHY_ROOT_CLK>; | |
| 117 | + clock-names = "pclk", "wrap", "phy"; | |
| 118 | + clock-frequency = <166000000>; | |
| 119 | + | |
| 120 | + power-domains = <&pgc_mipi_phy>; | |
| 121 | + phy-supply = <®_1p0d>; | |
| 122 | + resets = <&src IMX7_RESET_MIPI_PHY_MRST>; | |
| 123 | + | |
| 124 | + ports { | |
| 125 | + #address-cells = <1>; | |
| 126 | + #size-cells = <0>; | |
| 127 | + | |
| 128 | + port@0 { | |
| 129 | + reg = <0>; | |
| 130 | + | |
| 131 | + mipi_from_sensor: endpoint { | |
| 132 | + remote-endpoint = <&ov2680_to_mipi>; | |
| 133 | + data-lanes = <1>; | |
| 134 | + }; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + port@1 { | |
| 138 | + reg = <1>; | |
| 139 | + | |
| 140 | + mipi_vc0_to_csi_mux: endpoint { | |
| 141 | + remote-endpoint = <&csi_mux_from_mipi_vc0>; | |
| 142 | + }; | |
| 150 | 143 | }; |
| 144 | + }; | |
| 151 | 145 | }; |
| 152 | 146 | |
| 153 | 147 | ... |
| @@ -0,0 +1,84 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: i.MX8QXP/QM JPEG decoder/encoder Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Mirela Rabulea <mirela.rabulea@nxp.com> | |
| 11 | + | |
| 12 | +description: |- | |
| 13 | + The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs is an | |
| 14 | + ISO/IEC 10918-1 JPEG standard compliant decoder/encoder, for Baseline | |
| 15 | + and Extended Sequential DCT modes. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + items: | |
| 20 | + - enum: | |
| 21 | + # JPEG decoder | |
| 22 | + - nxp,imx8qxp-jpgdec | |
| 23 | + # JPEG encoder | |
| 24 | + - nxp,imx8qxp-jpgenc | |
| 25 | + | |
| 26 | + reg: | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 29 | + interrupts: | |
| 30 | + description: | | |
| 31 | + There are 4 slots available in the IP, which the driver may use | |
| 32 | + If a certain slot is used, it should have an associated interrupt | |
| 33 | + The interrupt with index i is assumed to be for slot i | |
| 34 | + minItems: 1 # At least one slot is needed by the driver | |
| 35 | + maxItems: 4 # The IP has 4 slots available for use | |
| 36 | + | |
| 37 | + power-domains: | |
| 38 | + description: | |
| 39 | + List of phandle and PM domain specifier as documented in | |
| 40 | + Documentation/devicetree/bindings/power/power_domain.txt | |
| 41 | + minItems: 2 # Wrapper and 1 slot | |
| 42 | + maxItems: 5 # Wrapper and 4 slots | |
| 43 | + | |
| 44 | +required: | |
| 45 | + - compatible | |
| 46 | + - reg | |
| 47 | + - interrupts | |
| 48 | + - power-domains | |
| 49 | + | |
| 50 | +additionalProperties: false | |
| 51 | + | |
| 52 | +examples: | |
| 53 | + - | | |
| 54 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 55 | + #include <dt-bindings/firmware/imx/rsrc.h> | |
| 56 | + | |
| 57 | + jpegdec: jpegdec@58400000 { | |
| 58 | + compatible = "nxp,imx8qxp-jpgdec"; | |
| 59 | + reg = <0x58400000 0x00050000 >; | |
| 60 | + interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, | |
| 61 | + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, | |
| 62 | + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, | |
| 63 | + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>; | |
| 64 | + power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>, | |
| 65 | + <&pd IMX_SC_R_MJPEG_DEC_S0>, | |
| 66 | + <&pd IMX_SC_R_MJPEG_DEC_S1>, | |
| 67 | + <&pd IMX_SC_R_MJPEG_DEC_S2>, | |
| 68 | + <&pd IMX_SC_R_MJPEG_DEC_S3>; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + jpegenc: jpegenc@58450000 { | |
| 72 | + compatible = "nxp,imx8qxp-jpgenc"; | |
| 73 | + reg = <0x58450000 0x00050000 >; | |
| 74 | + interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, | |
| 75 | + <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>, | |
| 76 | + <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>, | |
| 77 | + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>; | |
| 78 | + power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>, | |
| 79 | + <&pd IMX_SC_R_MJPEG_ENC_S0>, | |
| 80 | + <&pd IMX_SC_R_MJPEG_ENC_S1>, | |
| 81 | + <&pd IMX_SC_R_MJPEG_ENC_S2>, | |
| 82 | + <&pd IMX_SC_R_MJPEG_ENC_S3>; | |
| 83 | + }; | |
| 84 | +... | |
| @@ -1,236 +0,0 @@ | ||
| 1 | −Qualcomm Camera Subsystem | |
| 2 | − | |
| 3 | −* Properties | |
| 4 | − | |
| 5 | −- compatible: | |
| 6 | − Usage: required | |
| 7 | − Value type: <stringlist> | |
| 8 | − Definition: Should contain one of: | |
| 9 | − - "qcom,msm8916-camss" | |
| 10 | − - "qcom,msm8996-camss" | |
| 11 | − - "qcom,sdm660-camss" | |
| 12 | −- reg: | |
| 13 | − Usage: required | |
| 14 | − Value type: <prop-encoded-array> | |
| 15 | − Definition: Register ranges as listed in the reg-names property. | |
| 16 | −- reg-names: | |
| 17 | − Usage: required | |
| 18 | − Value type: <stringlist> | |
| 19 | − Definition: Should contain the following entries: | |
| 20 | − - "csiphy0" | |
| 21 | − - "csiphy0_clk_mux" | |
| 22 | − - "csiphy1" | |
| 23 | − - "csiphy1_clk_mux" | |
| 24 | − - "csiphy2" (8996 only) | |
| 25 | − - "csiphy2_clk_mux" (8996 only) | |
| 26 | − - "csid0" | |
| 27 | − - "csid1" | |
| 28 | − - "csid2" (8996 only) | |
| 29 | − - "csid3" (8996 only) | |
| 30 | − - "ispif" | |
| 31 | − - "csi_clk_mux" | |
| 32 | − - "vfe0" | |
| 33 | − - "vfe1" (8996 only) | |
| 34 | −- interrupts: | |
| 35 | − Usage: required | |
| 36 | − Value type: <prop-encoded-array> | |
| 37 | − Definition: Interrupts as listed in the interrupt-names property. | |
| 38 | −- interrupt-names: | |
| 39 | − Usage: required | |
| 40 | − Value type: <stringlist> | |
| 41 | − Definition: Should contain the following entries: | |
| 42 | − - "csiphy0" | |
| 43 | − - "csiphy1" | |
| 44 | − - "csiphy2" (8996 only) | |
| 45 | − - "csid0" | |
| 46 | − - "csid1" | |
| 47 | − - "csid2" (8996 only) | |
| 48 | − - "csid3" (8996 only) | |
| 49 | − - "ispif" | |
| 50 | − - "vfe0" | |
| 51 | − - "vfe1" (8996 only) | |
| 52 | −- power-domains: | |
| 53 | − Usage: required | |
| 54 | − Value type: <prop-encoded-array> | |
| 55 | − Definition: A phandle and power domain specifier pairs to the | |
| 56 | − power domain which is responsible for collapsing | |
| 57 | − and restoring power to the peripheral. | |
| 58 | −- clocks: | |
| 59 | − Usage: required | |
| 60 | − Value type: <prop-encoded-array> | |
| 61 | − Definition: A list of phandle and clock specifier pairs as listed | |
| 62 | − in clock-names property. | |
| 63 | −- clock-names: | |
| 64 | − Usage: required | |
| 65 | − Value type: <stringlist> | |
| 66 | − Definition: Should contain the following entries: | |
| 67 | − - "top_ahb" | |
| 68 | − - "throttle_axi" (660 only) | |
| 69 | − - "ispif_ahb" | |
| 70 | − - "csiphy0_timer" | |
| 71 | − - "csiphy1_timer" | |
| 72 | − - "csiphy2_timer" (8996 only) | |
| 73 | − - "csiphy_ahb2crif" (660 only) | |
| 74 | − - "csi0_ahb" | |
| 75 | − - "csi0" | |
| 76 | − - "csi0_phy" | |
| 77 | − - "csi0_pix" | |
| 78 | − - "csi0_rdi" | |
| 79 | − - "cphy_csid0" (660 only) | |
| 80 | − - "csi1_ahb" | |
| 81 | − - "csi1" | |
| 82 | − - "csi1_phy" | |
| 83 | − - "csi1_pix" | |
| 84 | − - "csi1_rdi" | |
| 85 | − - "cphy_csid1" (660 only) | |
| 86 | − - "csi2_ahb" (8996 only) | |
| 87 | − - "csi2" (8996 only) | |
| 88 | − - "csi2_phy" (8996 only) | |
| 89 | − - "csi2_pix" (8996 only) | |
| 90 | − - "csi2_rdi" (8996 only) | |
| 91 | − - "cphy_csid2" (660 only) | |
| 92 | − - "csi3_ahb" (8996 only) | |
| 93 | − - "csi3" (8996 only) | |
| 94 | − - "csi3_phy" (8996 only) | |
| 95 | − - "csi3_pix" (8996 only) | |
| 96 | − - "csi3_rdi" (8996 only) | |
| 97 | − - "cphy_csid3" (660 only) | |
| 98 | − - "ahb" | |
| 99 | − - "vfe0" | |
| 100 | − - "csi_vfe0" | |
| 101 | − - "vfe0_ahb", (8996 only) | |
| 102 | − - "vfe0_stream", (8996 only) | |
| 103 | − - "vfe1", (8996 only) | |
| 104 | − - "csi_vfe1", (8996 only) | |
| 105 | − - "vfe1_ahb", (8996 only) | |
| 106 | − - "vfe1_stream", (8996 only) | |
| 107 | − - "vfe_ahb" | |
| 108 | − - "vfe_axi" | |
| 109 | −- vdda-supply: | |
| 110 | − Usage: required | |
| 111 | − Value type: <phandle> | |
| 112 | − Definition: A phandle to voltage supply for CSI2. | |
| 113 | −- iommus: | |
| 114 | − Usage: required | |
| 115 | − Value type: <prop-encoded-array> | |
| 116 | − Definition: A list of phandle and IOMMU specifier pairs. | |
| 117 | − | |
| 118 | −* Nodes | |
| 119 | − | |
| 120 | −- ports: | |
| 121 | − Usage: required | |
| 122 | − Definition: As described in video-interfaces.txt in same directory. | |
| 123 | − Properties: | |
| 124 | − - reg: | |
| 125 | − Usage: required | |
| 126 | − Value type: <u32> | |
| 127 | − Definition: Selects CSI2 PHY interface - PHY0, PHY1 | |
| 128 | − or PHY2 (8996 only) | |
| 129 | − Endpoint node properties: | |
| 130 | − - clock-lanes: | |
| 131 | − Usage: required | |
| 132 | − Value type: <u32> | |
| 133 | − Definition: The physical clock lane index. On 8916 | |
| 134 | − the value must always be <1> as the physical | |
| 135 | − clock lane is lane 1. On 8996 the value must | |
| 136 | − always be <7> as the hardware supports D-PHY | |
| 137 | − and C-PHY, indexes are in a common set and | |
| 138 | − D-PHY physical clock lane is labeled as 7. | |
| 139 | − - data-lanes: | |
| 140 | − Usage: required | |
| 141 | − Value type: <prop-encoded-array> | |
| 142 | − Definition: An array of physical data lanes indexes. | |
| 143 | − Position of an entry determines the logical | |
| 144 | − lane number, while the value of an entry | |
| 145 | − indicates physical lane index. Lane swapping | |
| 146 | − is supported. Physical lane indexes for | |
| 147 | − 8916: 0, 2, 3, 4; for 8996: 0, 1, 2, 3. | |
| 148 | − | |
| 149 | −* An Example | |
| 150 | − | |
| 151 | − camss: camss@1b00000 { | |
| 152 | − compatible = "qcom,msm8916-camss"; | |
| 153 | − reg = <0x1b0ac00 0x200>, | |
| 154 | − <0x1b00030 0x4>, | |
| 155 | − <0x1b0b000 0x200>, | |
| 156 | − <0x1b00038 0x4>, | |
| 157 | − <0x1b08000 0x100>, | |
| 158 | − <0x1b08400 0x100>, | |
| 159 | − <0x1b0a000 0x500>, | |
| 160 | − <0x1b00020 0x10>, | |
| 161 | − <0x1b10000 0x1000>; | |
| 162 | − reg-names = "csiphy0", | |
| 163 | − "csiphy0_clk_mux", | |
| 164 | − "csiphy1", | |
| 165 | − "csiphy1_clk_mux", | |
| 166 | − "csid0", | |
| 167 | − "csid1", | |
| 168 | − "ispif", | |
| 169 | − "csi_clk_mux", | |
| 170 | − "vfe0"; | |
| 171 | − interrupts = <GIC_SPI 78 0>, | |
| 172 | − <GIC_SPI 79 0>, | |
| 173 | − <GIC_SPI 51 0>, | |
| 174 | − <GIC_SPI 52 0>, | |
| 175 | − <GIC_SPI 55 0>, | |
| 176 | − <GIC_SPI 57 0>; | |
| 177 | − interrupt-names = "csiphy0", | |
| 178 | − "csiphy1", | |
| 179 | − "csid0", | |
| 180 | − "csid1", | |
| 181 | − "ispif", | |
| 182 | − "vfe0"; | |
| 183 | − power-domains = <&gcc VFE_GDSC>; | |
| 184 | − clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, | |
| 185 | − <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, | |
| 186 | − <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, | |
| 187 | − <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, | |
| 188 | − <&gcc GCC_CAMSS_CSI0_AHB_CLK>, | |
| 189 | − <&gcc GCC_CAMSS_CSI0_CLK>, | |
| 190 | − <&gcc GCC_CAMSS_CSI0PHY_CLK>, | |
| 191 | − <&gcc GCC_CAMSS_CSI0PIX_CLK>, | |
| 192 | − <&gcc GCC_CAMSS_CSI0RDI_CLK>, | |
| 193 | − <&gcc GCC_CAMSS_CSI1_AHB_CLK>, | |
| 194 | − <&gcc GCC_CAMSS_CSI1_CLK>, | |
| 195 | − <&gcc GCC_CAMSS_CSI1PHY_CLK>, | |
| 196 | − <&gcc GCC_CAMSS_CSI1PIX_CLK>, | |
| 197 | − <&gcc GCC_CAMSS_CSI1RDI_CLK>, | |
| 198 | − <&gcc GCC_CAMSS_AHB_CLK>, | |
| 199 | − <&gcc GCC_CAMSS_VFE0_CLK>, | |
| 200 | − <&gcc GCC_CAMSS_CSI_VFE0_CLK>, | |
| 201 | − <&gcc GCC_CAMSS_VFE_AHB_CLK>, | |
| 202 | − <&gcc GCC_CAMSS_VFE_AXI_CLK>; | |
| 203 | − clock-names = "top_ahb", | |
| 204 | − "ispif_ahb", | |
| 205 | − "csiphy0_timer", | |
| 206 | − "csiphy1_timer", | |
| 207 | − "csi0_ahb", | |
| 208 | − "csi0", | |
| 209 | − "csi0_phy", | |
| 210 | − "csi0_pix", | |
| 211 | − "csi0_rdi", | |
| 212 | − "csi1_ahb", | |
| 213 | − "csi1", | |
| 214 | − "csi1_phy", | |
| 215 | − "csi1_pix", | |
| 216 | − "csi1_rdi", | |
| 217 | − "ahb", | |
| 218 | − "vfe0", | |
| 219 | − "csi_vfe0", | |
| 220 | − "vfe_ahb", | |
| 221 | − "vfe_axi"; | |
| 222 | − vdda-supply = <&pm8916_l2>; | |
| 223 | − iommus = <&apps_iommu 3>; | |
| 224 | − ports { | |
| 225 | − #address-cells = <1>; | |
| 226 | − #size-cells = <0>; | |
| 227 | − port@0 { | |
| 228 | − reg = <0>; | |
| 229 | − csiphy0_ep: endpoint { | |
| 230 | − clock-lanes = <1>; | |
| 231 | − data-lanes = <0 2>; | |
| 232 | − remote-endpoint = <&ov5645_ep>; | |
| 233 | − }; | |
| 234 | − }; | |
| 235 | − }; | |
| 236 | − }; | |
| @@ -0,0 +1,256 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | + | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Qualcomm CAMSS ISP | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Robert Foss <robert.foss@linaro.org> | |
| 12 | + - Todor Tomov <todor.too@gmail.com> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: qcom,msm8916-camss | |
| 20 | + | |
| 21 | + clocks: | |
| 22 | + minItems: 19 | |
| 23 | + maxItems: 19 | |
| 24 | + | |
| 25 | + clock-names: | |
| 26 | + items: | |
| 27 | + - const: top_ahb | |
| 28 | + - const: ispif_ahb | |
| 29 | + - const: csiphy0_timer | |
| 30 | + - const: csiphy1_timer | |
| 31 | + - const: csi0_ahb | |
| 32 | + - const: csi0 | |
| 33 | + - const: csi0_phy | |
| 34 | + - const: csi0_pix | |
| 35 | + - const: csi0_rdi | |
| 36 | + - const: csi1_ahb | |
| 37 | + - const: csi1 | |
| 38 | + - const: csi1_phy | |
| 39 | + - const: csi1_pix | |
| 40 | + - const: csi1_rdi | |
| 41 | + - const: ahb | |
| 42 | + - const: vfe0 | |
| 43 | + - const: csi_vfe0 | |
| 44 | + - const: vfe_ahb | |
| 45 | + - const: vfe_axi | |
| 46 | + | |
| 47 | + interrupts: | |
| 48 | + minItems: 6 | |
| 49 | + maxItems: 6 | |
| 50 | + | |
| 51 | + interrupt-names: | |
| 52 | + items: | |
| 53 | + - const: csiphy0 | |
| 54 | + - const: csiphy1 | |
| 55 | + - const: csid0 | |
| 56 | + - const: csid1 | |
| 57 | + - const: ispif | |
| 58 | + - const: vfe0 | |
| 59 | + | |
| 60 | + iommus: | |
| 61 | + maxItems: 1 | |
| 62 | + | |
| 63 | + power-domains: | |
| 64 | + items: | |
| 65 | + - description: VFE GDSC - Video Front End, Global Distributed Switch Controller. | |
| 66 | + | |
| 67 | + ports: | |
| 68 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 69 | + | |
| 70 | + description: | |
| 71 | + CSI input ports. | |
| 72 | + | |
| 73 | + properties: | |
| 74 | + port@0: | |
| 75 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 76 | + unevaluatedProperties: false | |
| 77 | + description: | |
| 78 | + Input port for receiving CSI data. | |
| 79 | + | |
| 80 | + properties: | |
| 81 | + endpoint: | |
| 82 | + $ref: video-interfaces.yaml# | |
| 83 | + unevaluatedProperties: false | |
| 84 | + | |
| 85 | + properties: | |
| 86 | + clock-lanes: | |
| 87 | + items: | |
| 88 | + - const: 1 | |
| 89 | + | |
| 90 | + data-lanes: | |
| 91 | + description: | |
| 92 | + An array of physical data lanes indexes. | |
| 93 | + Position of an entry determines the logical | |
| 94 | + lane number, while the value of an entry | |
| 95 | + indicates physical lane index. Lane swapping | |
| 96 | + is supported. Physical lane indexes; | |
| 97 | + 0, 2, 3, 4. | |
| 98 | + minItems: 1 | |
| 99 | + maxItems: 4 | |
| 100 | + | |
| 101 | + required: | |
| 102 | + - clock-lanes | |
| 103 | + - data-lanes | |
| 104 | + | |
| 105 | + port@1: | |
| 106 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 107 | + unevaluatedProperties: false | |
| 108 | + description: | |
| 109 | + Input port for receiving CSI data. | |
| 110 | + | |
| 111 | + properties: | |
| 112 | + endpoint: | |
| 113 | + $ref: video-interfaces.yaml# | |
| 114 | + unevaluatedProperties: false | |
| 115 | + | |
| 116 | + properties: | |
| 117 | + clock-lanes: | |
| 118 | + items: | |
| 119 | + - const: 1 | |
| 120 | + | |
| 121 | + data-lanes: | |
| 122 | + minItems: 1 | |
| 123 | + maxItems: 4 | |
| 124 | + | |
| 125 | + required: | |
| 126 | + - clock-lanes | |
| 127 | + - data-lanes | |
| 128 | + | |
| 129 | + reg: | |
| 130 | + minItems: 9 | |
| 131 | + maxItems: 9 | |
| 132 | + | |
| 133 | + reg-names: | |
| 134 | + items: | |
| 135 | + - const: csiphy0 | |
| 136 | + - const: csiphy0_clk_mux | |
| 137 | + - const: csiphy1 | |
| 138 | + - const: csiphy1_clk_mux | |
| 139 | + - const: csid0 | |
| 140 | + - const: csid1 | |
| 141 | + - const: ispif | |
| 142 | + - const: csi_clk_mux | |
| 143 | + - const: vfe0 | |
| 144 | + | |
| 145 | + vdda-supply: | |
| 146 | + description: | |
| 147 | + Definition of the regulator used as analog power supply. | |
| 148 | + | |
| 149 | +required: | |
| 150 | + - clock-names | |
| 151 | + - clocks | |
| 152 | + - compatible | |
| 153 | + - interrupt-names | |
| 154 | + - interrupts | |
| 155 | + - iommus | |
| 156 | + - power-domains | |
| 157 | + - reg | |
| 158 | + - reg-names | |
| 159 | + - vdda-supply | |
| 160 | + | |
| 161 | +additionalProperties: false | |
| 162 | + | |
| 163 | +examples: | |
| 164 | + - | | |
| 165 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 166 | + #include <dt-bindings/clock/qcom,gcc-msm8916.h> | |
| 167 | + | |
| 168 | + camss: camss@1b00000 { | |
| 169 | + compatible = "qcom,msm8916-camss"; | |
| 170 | + | |
| 171 | + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, | |
| 172 | + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, | |
| 173 | + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, | |
| 174 | + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, | |
| 175 | + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, | |
| 176 | + <&gcc GCC_CAMSS_CSI0_CLK>, | |
| 177 | + <&gcc GCC_CAMSS_CSI0PHY_CLK>, | |
| 178 | + <&gcc GCC_CAMSS_CSI0PIX_CLK>, | |
| 179 | + <&gcc GCC_CAMSS_CSI0RDI_CLK>, | |
| 180 | + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, | |
| 181 | + <&gcc GCC_CAMSS_CSI1_CLK>, | |
| 182 | + <&gcc GCC_CAMSS_CSI1PHY_CLK>, | |
| 183 | + <&gcc GCC_CAMSS_CSI1PIX_CLK>, | |
| 184 | + <&gcc GCC_CAMSS_CSI1RDI_CLK>, | |
| 185 | + <&gcc GCC_CAMSS_AHB_CLK>, | |
| 186 | + <&gcc GCC_CAMSS_VFE0_CLK>, | |
| 187 | + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, | |
| 188 | + <&gcc GCC_CAMSS_VFE_AHB_CLK>, | |
| 189 | + <&gcc GCC_CAMSS_VFE_AXI_CLK>; | |
| 190 | + | |
| 191 | + clock-names = "top_ahb", | |
| 192 | + "ispif_ahb", | |
| 193 | + "csiphy0_timer", | |
| 194 | + "csiphy1_timer", | |
| 195 | + "csi0_ahb", | |
| 196 | + "csi0", | |
| 197 | + "csi0_phy", | |
| 198 | + "csi0_pix", | |
| 199 | + "csi0_rdi", | |
| 200 | + "csi1_ahb", | |
| 201 | + "csi1", | |
| 202 | + "csi1_phy", | |
| 203 | + "csi1_pix", | |
| 204 | + "csi1_rdi", | |
| 205 | + "ahb", | |
| 206 | + "vfe0", | |
| 207 | + "csi_vfe0", | |
| 208 | + "vfe_ahb", | |
| 209 | + "vfe_axi"; | |
| 210 | + | |
| 211 | + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, | |
| 212 | + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, | |
| 213 | + <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, | |
| 214 | + <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, | |
| 215 | + <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, | |
| 216 | + <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>; | |
| 217 | + | |
| 218 | + interrupt-names = "csiphy0", | |
| 219 | + "csiphy1", | |
| 220 | + "csid0", | |
| 221 | + "csid1", | |
| 222 | + "ispif", | |
| 223 | + "vfe0"; | |
| 224 | + | |
| 225 | + iommus = <&apps_iommu 3>; | |
| 226 | + | |
| 227 | + power-domains = <&gcc VFE_GDSC>; | |
| 228 | + | |
| 229 | + reg = <0x01b0ac00 0x200>, | |
| 230 | + <0x01b00030 0x4>, | |
| 231 | + <0x01b0b000 0x200>, | |
| 232 | + <0x01b00038 0x4>, | |
| 233 | + <0x01b08000 0x100>, | |
| 234 | + <0x01b08400 0x100>, | |
| 235 | + <0x01b0a000 0x500>, | |
| 236 | + <0x01b00020 0x10>, | |
| 237 | + <0x01b10000 0x1000>; | |
| 238 | + | |
| 239 | + reg-names = "csiphy0", | |
| 240 | + "csiphy0_clk_mux", | |
| 241 | + "csiphy1", | |
| 242 | + "csiphy1_clk_mux", | |
| 243 | + "csid0", | |
| 244 | + "csid1", | |
| 245 | + "ispif", | |
| 246 | + "csi_clk_mux", | |
| 247 | + "vfe0"; | |
| 248 | + | |
| 249 | + vdda-supply = <®_2v8>; | |
| 250 | + | |
| 251 | + ports { | |
| 252 | + #address-cells = <1>; | |
| 253 | + #size-cells = <0>; | |
| 254 | + }; | |
| 255 | + | |
| 256 | + }; | |
| @@ -0,0 +1,387 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | + | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Qualcomm CAMSS ISP | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Robert Foss <robert.foss@linaro.org> | |
| 12 | + - Todor Tomov <todor.too@gmail.com> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: qcom,msm8996-camss | |
| 20 | + | |
| 21 | + clocks: | |
| 22 | + minItems: 36 | |
| 23 | + maxItems: 36 | |
| 24 | + | |
| 25 | + clock-names: | |
| 26 | + items: | |
| 27 | + - const: top_ahb | |
| 28 | + - const: ispif_ahb | |
| 29 | + - const: csiphy0_timer | |
| 30 | + - const: csiphy1_timer | |
| 31 | + - const: csiphy2_timer | |
| 32 | + - const: csi0_ahb | |
| 33 | + - const: csi0 | |
| 34 | + - const: csi0_phy | |
| 35 | + - const: csi0_pix | |
| 36 | + - const: csi0_rdi | |
| 37 | + - const: csi1_ahb | |
| 38 | + - const: csi1 | |
| 39 | + - const: csi1_phy | |
| 40 | + - const: csi1_pix | |
| 41 | + - const: csi1_rdi | |
| 42 | + - const: csi2_ahb | |
| 43 | + - const: csi2 | |
| 44 | + - const: csi2_phy | |
| 45 | + - const: csi2_pix | |
| 46 | + - const: csi2_rdi | |
| 47 | + - const: csi3_ahb | |
| 48 | + - const: csi3 | |
| 49 | + - const: csi3_phy | |
| 50 | + - const: csi3_pix | |
| 51 | + - const: csi3_rdi | |
| 52 | + - const: ahb | |
| 53 | + - const: vfe0 | |
| 54 | + - const: csi_vfe0 | |
| 55 | + - const: vfe0_ahb | |
| 56 | + - const: vfe0_stream | |
| 57 | + - const: vfe1 | |
| 58 | + - const: csi_vfe1 | |
| 59 | + - const: vfe1_ahb | |
| 60 | + - const: vfe1_stream | |
| 61 | + - const: vfe_ahb | |
| 62 | + - const: vfe_axi | |
| 63 | + | |
| 64 | + interrupts: | |
| 65 | + minItems: 10 | |
| 66 | + maxItems: 10 | |
| 67 | + | |
| 68 | + interrupt-names: | |
| 69 | + items: | |
| 70 | + - const: csiphy0 | |
| 71 | + - const: csiphy1 | |
| 72 | + - const: csiphy2 | |
| 73 | + - const: csid0 | |
| 74 | + - const: csid1 | |
| 75 | + - const: csid2 | |
| 76 | + - const: csid3 | |
| 77 | + - const: ispif | |
| 78 | + - const: vfe0 | |
| 79 | + - const: vfe1 | |
| 80 | + | |
| 81 | + iommus: | |
| 82 | + maxItems: 4 | |
| 83 | + | |
| 84 | + power-domains: | |
| 85 | + items: | |
| 86 | + - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller. | |
| 87 | + - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller. | |
| 88 | + | |
| 89 | + ports: | |
| 90 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 91 | + | |
| 92 | + description: | |
| 93 | + CSI input ports. | |
| 94 | + | |
| 95 | + properties: | |
| 96 | + port@0: | |
| 97 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 98 | + unevaluatedProperties: false | |
| 99 | + description: | |
| 100 | + Input port for receiving CSI data. | |
| 101 | + | |
| 102 | + properties: | |
| 103 | + endpoint: | |
| 104 | + $ref: video-interfaces.yaml# | |
| 105 | + unevaluatedProperties: false | |
| 106 | + | |
| 107 | + properties: | |
| 108 | + clock-lanes: | |
| 109 | + items: | |
| 110 | + - const: 7 | |
| 111 | + | |
| 112 | + data-lanes: | |
| 113 | + description: | |
| 114 | + An array of physical data lanes indexes. | |
| 115 | + Position of an entry determines the logical | |
| 116 | + lane number, while the value of an entry | |
| 117 | + indicates physical lane index. Lane swapping | |
| 118 | + is supported. Physical lane indexes are; | |
| 119 | + 0, 1, 2, 3 | |
| 120 | + minItems: 1 | |
| 121 | + maxItems: 4 | |
| 122 | + | |
| 123 | + required: | |
| 124 | + - clock-lanes | |
| 125 | + - data-lanes | |
| 126 | + | |
| 127 | + port@1: | |
| 128 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 129 | + unevaluatedProperties: false | |
| 130 | + description: | |
| 131 | + Input port for receiving CSI data. | |
| 132 | + | |
| 133 | + properties: | |
| 134 | + endpoint: | |
| 135 | + $ref: video-interfaces.yaml# | |
| 136 | + unevaluatedProperties: false | |
| 137 | + | |
| 138 | + properties: | |
| 139 | + clock-lanes: | |
| 140 | + items: | |
| 141 | + - const: 7 | |
| 142 | + | |
| 143 | + data-lanes: | |
| 144 | + minItems: 1 | |
| 145 | + maxItems: 4 | |
| 146 | + | |
| 147 | + required: | |
| 148 | + - clock-lanes | |
| 149 | + - data-lanes | |
| 150 | + | |
| 151 | + port@2: | |
| 152 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 153 | + unevaluatedProperties: false | |
| 154 | + description: | |
| 155 | + Input port for receiving CSI data. | |
| 156 | + | |
| 157 | + properties: | |
| 158 | + endpoint: | |
| 159 | + $ref: video-interfaces.yaml# | |
| 160 | + unevaluatedProperties: false | |
| 161 | + | |
| 162 | + properties: | |
| 163 | + clock-lanes: | |
| 164 | + items: | |
| 165 | + - const: 7 | |
| 166 | + | |
| 167 | + data-lanes: | |
| 168 | + minItems: 1 | |
| 169 | + maxItems: 4 | |
| 170 | + | |
| 171 | + required: | |
| 172 | + - clock-lanes | |
| 173 | + - data-lanes | |
| 174 | + | |
| 175 | + port@3: | |
| 176 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 177 | + unevaluatedProperties: false | |
| 178 | + description: | |
| 179 | + Input port for receiving CSI data. | |
| 180 | + | |
| 181 | + properties: | |
| 182 | + endpoint: | |
| 183 | + $ref: video-interfaces.yaml# | |
| 184 | + unevaluatedProperties: false | |
| 185 | + | |
| 186 | + properties: | |
| 187 | + clock-lanes: | |
| 188 | + items: | |
| 189 | + - const: 7 | |
| 190 | + | |
| 191 | + data-lanes: | |
| 192 | + minItems: 1 | |
| 193 | + maxItems: 4 | |
| 194 | + | |
| 195 | + required: | |
| 196 | + - clock-lanes | |
| 197 | + - data-lanes | |
| 198 | + | |
| 199 | + reg: | |
| 200 | + minItems: 14 | |
| 201 | + maxItems: 14 | |
| 202 | + | |
| 203 | + reg-names: | |
| 204 | + items: | |
| 205 | + - const: csiphy0 | |
| 206 | + - const: csiphy0_clk_mux | |
| 207 | + - const: csiphy1 | |
| 208 | + - const: csiphy1_clk_mux | |
| 209 | + - const: csiphy2 | |
| 210 | + - const: csiphy2_clk_mux | |
| 211 | + - const: csid0 | |
| 212 | + - const: csid1 | |
| 213 | + - const: csid2 | |
| 214 | + - const: csid3 | |
| 215 | + - const: ispif | |
| 216 | + - const: csi_clk_mux | |
| 217 | + - const: vfe0 | |
| 218 | + - const: vfe1 | |
| 219 | + | |
| 220 | + vdda-supply: | |
| 221 | + description: | |
| 222 | + Definition of the regulator used as analog power supply. | |
| 223 | + | |
| 224 | +required: | |
| 225 | + - clock-names | |
| 226 | + - clocks | |
| 227 | + - compatible | |
| 228 | + - interrupt-names | |
| 229 | + - interrupts | |
| 230 | + - iommus | |
| 231 | + - power-domains | |
| 232 | + - reg | |
| 233 | + - reg-names | |
| 234 | + - vdda-supply | |
| 235 | + | |
| 236 | +additionalProperties: false | |
| 237 | + | |
| 238 | +examples: | |
| 239 | + - | | |
| 240 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 241 | + #include <dt-bindings/clock/qcom,gcc-msm8996.h> | |
| 242 | + #include <dt-bindings/clock/qcom,mmcc-msm8996.h> | |
| 243 | + | |
| 244 | + camss: camss@a00000 { | |
| 245 | + compatible = "qcom,msm8996-camss"; | |
| 246 | + | |
| 247 | + clocks = <&mmcc CAMSS_TOP_AHB_CLK>, | |
| 248 | + <&mmcc CAMSS_ISPIF_AHB_CLK>, | |
| 249 | + <&mmcc CAMSS_CSI0PHYTIMER_CLK>, | |
| 250 | + <&mmcc CAMSS_CSI1PHYTIMER_CLK>, | |
| 251 | + <&mmcc CAMSS_CSI2PHYTIMER_CLK>, | |
| 252 | + <&mmcc CAMSS_CSI0_AHB_CLK>, | |
| 253 | + <&mmcc CAMSS_CSI0_CLK>, | |
| 254 | + <&mmcc CAMSS_CSI0PHY_CLK>, | |
| 255 | + <&mmcc CAMSS_CSI0PIX_CLK>, | |
| 256 | + <&mmcc CAMSS_CSI0RDI_CLK>, | |
| 257 | + <&mmcc CAMSS_CSI1_AHB_CLK>, | |
| 258 | + <&mmcc CAMSS_CSI1_CLK>, | |
| 259 | + <&mmcc CAMSS_CSI1PHY_CLK>, | |
| 260 | + <&mmcc CAMSS_CSI1PIX_CLK>, | |
| 261 | + <&mmcc CAMSS_CSI1RDI_CLK>, | |
| 262 | + <&mmcc CAMSS_CSI2_AHB_CLK>, | |
| 263 | + <&mmcc CAMSS_CSI2_CLK>, | |
| 264 | + <&mmcc CAMSS_CSI2PHY_CLK>, | |
| 265 | + <&mmcc CAMSS_CSI2PIX_CLK>, | |
| 266 | + <&mmcc CAMSS_CSI2RDI_CLK>, | |
| 267 | + <&mmcc CAMSS_CSI3_AHB_CLK>, | |
| 268 | + <&mmcc CAMSS_CSI3_CLK>, | |
| 269 | + <&mmcc CAMSS_CSI3PHY_CLK>, | |
| 270 | + <&mmcc CAMSS_CSI3PIX_CLK>, | |
| 271 | + <&mmcc CAMSS_CSI3RDI_CLK>, | |
| 272 | + <&mmcc CAMSS_AHB_CLK>, | |
| 273 | + <&mmcc CAMSS_VFE0_CLK>, | |
| 274 | + <&mmcc CAMSS_CSI_VFE0_CLK>, | |
| 275 | + <&mmcc CAMSS_VFE0_AHB_CLK>, | |
| 276 | + <&mmcc CAMSS_VFE0_STREAM_CLK>, | |
| 277 | + <&mmcc CAMSS_VFE1_CLK>, | |
| 278 | + <&mmcc CAMSS_CSI_VFE1_CLK>, | |
| 279 | + <&mmcc CAMSS_VFE1_AHB_CLK>, | |
| 280 | + <&mmcc CAMSS_VFE1_STREAM_CLK>, | |
| 281 | + <&mmcc CAMSS_VFE_AHB_CLK>, | |
| 282 | + <&mmcc CAMSS_VFE_AXI_CLK>; | |
| 283 | + | |
| 284 | + clock-names = "top_ahb", | |
| 285 | + "ispif_ahb", | |
| 286 | + "csiphy0_timer", | |
| 287 | + "csiphy1_timer", | |
| 288 | + "csiphy2_timer", | |
| 289 | + "csi0_ahb", | |
| 290 | + "csi0", | |
| 291 | + "csi0_phy", | |
| 292 | + "csi0_pix", | |
| 293 | + "csi0_rdi", | |
| 294 | + "csi1_ahb", | |
| 295 | + "csi1", | |
| 296 | + "csi1_phy", | |
| 297 | + "csi1_pix", | |
| 298 | + "csi1_rdi", | |
| 299 | + "csi2_ahb", | |
| 300 | + "csi2", | |
| 301 | + "csi2_phy", | |
| 302 | + "csi2_pix", | |
| 303 | + "csi2_rdi", | |
| 304 | + "csi3_ahb", | |
| 305 | + "csi3", | |
| 306 | + "csi3_phy", | |
| 307 | + "csi3_pix", | |
| 308 | + "csi3_rdi", | |
| 309 | + "ahb", | |
| 310 | + "vfe0", | |
| 311 | + "csi_vfe0", | |
| 312 | + "vfe0_ahb", | |
| 313 | + "vfe0_stream", | |
| 314 | + "vfe1", | |
| 315 | + "csi_vfe1", | |
| 316 | + "vfe1_ahb", | |
| 317 | + "vfe1_stream", | |
| 318 | + "vfe_ahb", | |
| 319 | + "vfe_axi"; | |
| 320 | + | |
| 321 | + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, | |
| 322 | + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, | |
| 323 | + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, | |
| 324 | + <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>, | |
| 325 | + <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>, | |
| 326 | + <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>, | |
| 327 | + <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>, | |
| 328 | + <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>, | |
| 329 | + <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>, | |
| 330 | + <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>; | |
| 331 | + | |
| 332 | + interrupt-names = "csiphy0", | |
| 333 | + "csiphy1", | |
| 334 | + "csiphy2", | |
| 335 | + "csid0", | |
| 336 | + "csid1", | |
| 337 | + "csid2", | |
| 338 | + "csid3", | |
| 339 | + "ispif", | |
| 340 | + "vfe0", | |
| 341 | + "vfe1"; | |
| 342 | + | |
| 343 | + iommus = <&vfe_smmu 0>, | |
| 344 | + <&vfe_smmu 1>, | |
| 345 | + <&vfe_smmu 2>, | |
| 346 | + <&vfe_smmu 3>; | |
| 347 | + | |
| 348 | + power-domains = <&mmcc VFE0_GDSC>, | |
| 349 | + <&mmcc VFE1_GDSC>; | |
| 350 | + | |
| 351 | + reg = <0x00a34000 0x1000>, | |
| 352 | + <0x00a00030 0x4>, | |
| 353 | + <0x00a35000 0x1000>, | |
| 354 | + <0x00a00038 0x4>, | |
| 355 | + <0x00a36000 0x1000>, | |
| 356 | + <0x00a00040 0x4>, | |
| 357 | + <0x00a30000 0x100>, | |
| 358 | + <0x00a30400 0x100>, | |
| 359 | + <0x00a30800 0x100>, | |
| 360 | + <0x00a30c00 0x100>, | |
| 361 | + <0x00a31000 0x500>, | |
| 362 | + <0x00a00020 0x10>, | |
| 363 | + <0x00a10000 0x1000>, | |
| 364 | + <0x00a14000 0x1000>; | |
| 365 | + | |
| 366 | + reg-names = "csiphy0", | |
| 367 | + "csiphy0_clk_mux", | |
| 368 | + "csiphy1", | |
| 369 | + "csiphy1_clk_mux", | |
| 370 | + "csiphy2", | |
| 371 | + "csiphy2_clk_mux", | |
| 372 | + "csid0", | |
| 373 | + "csid1", | |
| 374 | + "csid2", | |
| 375 | + "csid3", | |
| 376 | + "ispif", | |
| 377 | + "csi_clk_mux", | |
| 378 | + "vfe0", | |
| 379 | + "vfe1"; | |
| 380 | + | |
| 381 | + vdda-supply = <®_2v8>; | |
| 382 | + | |
| 383 | + ports { | |
| 384 | + #address-cells = <1>; | |
| 385 | + #size-cells = <0>; | |
| 386 | + }; | |
| 387 | + }; | |
| @@ -0,0 +1,398 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | + | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Qualcomm CAMSS ISP | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Robert Foss <robert.foss@linaro.org> | |
| 12 | + - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: qcom,sdm660-camss | |
| 20 | + | |
| 21 | + clocks: | |
| 22 | + minItems: 42 | |
| 23 | + maxItems: 42 | |
| 24 | + | |
| 25 | + clock-names: | |
| 26 | + items: | |
| 27 | + - const: ahb | |
| 28 | + - const: cphy_csid0 | |
| 29 | + - const: cphy_csid1 | |
| 30 | + - const: cphy_csid2 | |
| 31 | + - const: cphy_csid3 | |
| 32 | + - const: csi0_ahb | |
| 33 | + - const: csi0 | |
| 34 | + - const: csi0_phy | |
| 35 | + - const: csi0_pix | |
| 36 | + - const: csi0_rdi | |
| 37 | + - const: csi1_ahb | |
| 38 | + - const: csi1 | |
| 39 | + - const: csi1_phy | |
| 40 | + - const: csi1_pix | |
| 41 | + - const: csi1_rdi | |
| 42 | + - const: csi2_ahb | |
| 43 | + - const: csi2 | |
| 44 | + - const: csi2_phy | |
| 45 | + - const: csi2_pix | |
| 46 | + - const: csi2_rdi | |
| 47 | + - const: csi3_ahb | |
| 48 | + - const: csi3 | |
| 49 | + - const: csi3_phy | |
| 50 | + - const: csi3_pix | |
| 51 | + - const: csi3_rdi | |
| 52 | + - const: csiphy0_timer | |
| 53 | + - const: csiphy1_timer | |
| 54 | + - const: csiphy2_timer | |
| 55 | + - const: csiphy_ahb2crif | |
| 56 | + - const: csi_vfe0 | |
| 57 | + - const: csi_vfe1 | |
| 58 | + - const: ispif_ahb | |
| 59 | + - const: throttle_axi | |
| 60 | + - const: top_ahb | |
| 61 | + - const: vfe0_ahb | |
| 62 | + - const: vfe0 | |
| 63 | + - const: vfe0_stream | |
| 64 | + - const: vfe1_ahb | |
| 65 | + - const: vfe1 | |
| 66 | + - const: vfe1_stream | |
| 67 | + - const: vfe_ahb | |
| 68 | + - const: vfe_axi | |
| 69 | + | |
| 70 | + interrupts: | |
| 71 | + minItems: 10 | |
| 72 | + maxItems: 10 | |
| 73 | + | |
| 74 | + interrupt-names: | |
| 75 | + items: | |
| 76 | + - const: csid0 | |
| 77 | + - const: csid1 | |
| 78 | + - const: csid2 | |
| 79 | + - const: csid3 | |
| 80 | + - const: csiphy0 | |
| 81 | + - const: csiphy1 | |
| 82 | + - const: csiphy2 | |
| 83 | + - const: ispif | |
| 84 | + - const: vfe0 | |
| 85 | + - const: vfe1 | |
| 86 | + | |
| 87 | + iommus: | |
| 88 | + maxItems: 4 | |
| 89 | + | |
| 90 | + power-domains: | |
| 91 | + items: | |
| 92 | + - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller. | |
| 93 | + - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller. | |
| 94 | + | |
| 95 | + ports: | |
| 96 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 97 | + | |
| 98 | + description: | |
| 99 | + CSI input ports. | |
| 100 | + | |
| 101 | + properties: | |
| 102 | + port@0: | |
| 103 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 104 | + unevaluatedProperties: false | |
| 105 | + description: | |
| 106 | + Input port for receiving CSI data. | |
| 107 | + | |
| 108 | + properties: | |
| 109 | + endpoint: | |
| 110 | + $ref: video-interfaces.yaml# | |
| 111 | + unevaluatedProperties: false | |
| 112 | + | |
| 113 | + properties: | |
| 114 | + clock-lanes: | |
| 115 | + items: | |
| 116 | + - const: 7 | |
| 117 | + | |
| 118 | + data-lanes: | |
| 119 | + minItems: 1 | |
| 120 | + maxItems: 4 | |
| 121 | + | |
| 122 | + required: | |
| 123 | + - clock-lanes | |
| 124 | + - data-lanes | |
| 125 | + | |
| 126 | + port@1: | |
| 127 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 128 | + unevaluatedProperties: false | |
| 129 | + description: | |
| 130 | + Input port for receiving CSI data. | |
| 131 | + | |
| 132 | + properties: | |
| 133 | + endpoint: | |
| 134 | + $ref: video-interfaces.yaml# | |
| 135 | + unevaluatedProperties: false | |
| 136 | + | |
| 137 | + properties: | |
| 138 | + clock-lanes: | |
| 139 | + items: | |
| 140 | + - const: 7 | |
| 141 | + | |
| 142 | + data-lanes: | |
| 143 | + minItems: 1 | |
| 144 | + maxItems: 4 | |
| 145 | + | |
| 146 | + required: | |
| 147 | + - clock-lanes | |
| 148 | + - data-lanes | |
| 149 | + | |
| 150 | + port@2: | |
| 151 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 152 | + unevaluatedProperties: false | |
| 153 | + description: | |
| 154 | + Input port for receiving CSI data. | |
| 155 | + | |
| 156 | + properties: | |
| 157 | + endpoint: | |
| 158 | + $ref: video-interfaces.yaml# | |
| 159 | + unevaluatedProperties: false | |
| 160 | + | |
| 161 | + properties: | |
| 162 | + clock-lanes: | |
| 163 | + items: | |
| 164 | + - const: 7 | |
| 165 | + | |
| 166 | + data-lanes: | |
| 167 | + minItems: 1 | |
| 168 | + maxItems: 4 | |
| 169 | + | |
| 170 | + required: | |
| 171 | + - clock-lanes | |
| 172 | + - data-lanes | |
| 173 | + | |
| 174 | + port@3: | |
| 175 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 176 | + unevaluatedProperties: false | |
| 177 | + description: | |
| 178 | + Input port for receiving CSI data. | |
| 179 | + | |
| 180 | + properties: | |
| 181 | + endpoint: | |
| 182 | + $ref: video-interfaces.yaml# | |
| 183 | + unevaluatedProperties: false | |
| 184 | + | |
| 185 | + properties: | |
| 186 | + clock-lanes: | |
| 187 | + items: | |
| 188 | + - const: 7 | |
| 189 | + | |
| 190 | + data-lanes: | |
| 191 | + minItems: 1 | |
| 192 | + maxItems: 4 | |
| 193 | + | |
| 194 | + required: | |
| 195 | + - clock-lanes | |
| 196 | + - data-lanes | |
| 197 | + | |
| 198 | + reg: | |
| 199 | + minItems: 14 | |
| 200 | + maxItems: 14 | |
| 201 | + | |
| 202 | + reg-names: | |
| 203 | + items: | |
| 204 | + - const: csi_clk_mux | |
| 205 | + - const: csid0 | |
| 206 | + - const: csid1 | |
| 207 | + - const: csid2 | |
| 208 | + - const: csid3 | |
| 209 | + - const: csiphy0 | |
| 210 | + - const: csiphy0_clk_mux | |
| 211 | + - const: csiphy1 | |
| 212 | + - const: csiphy1_clk_mux | |
| 213 | + - const: csiphy2 | |
| 214 | + - const: csiphy2_clk_mux | |
| 215 | + - const: ispif | |
| 216 | + - const: vfe0 | |
| 217 | + - const: vfe1 | |
| 218 | + | |
| 219 | + vdda-supply: | |
| 220 | + description: | |
| 221 | + Definition of the regulator used as analog power supply. | |
| 222 | + | |
| 223 | +required: | |
| 224 | + - clock-names | |
| 225 | + - clocks | |
| 226 | + - compatible | |
| 227 | + - interrupt-names | |
| 228 | + - interrupts | |
| 229 | + - iommus | |
| 230 | + - power-domains | |
| 231 | + - reg | |
| 232 | + - reg-names | |
| 233 | + - vdda-supply | |
| 234 | + | |
| 235 | +additionalProperties: false | |
| 236 | + | |
| 237 | +examples: | |
| 238 | + - | | |
| 239 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 240 | + #include <dt-bindings/clock/qcom,gcc-sdm660.h> | |
| 241 | + #include <dt-bindings/clock/qcom,mmcc-sdm660.h> | |
| 242 | + | |
| 243 | + camss: camss@ca00000 { | |
| 244 | + compatible = "qcom,sdm660-camss"; | |
| 245 | + | |
| 246 | + clocks = <&mmcc CAMSS_AHB_CLK>, | |
| 247 | + <&mmcc CAMSS_CPHY_CSID0_CLK>, | |
| 248 | + <&mmcc CAMSS_CPHY_CSID1_CLK>, | |
| 249 | + <&mmcc CAMSS_CPHY_CSID2_CLK>, | |
| 250 | + <&mmcc CAMSS_CPHY_CSID3_CLK>, | |
| 251 | + <&mmcc CAMSS_CSI0_AHB_CLK>, | |
| 252 | + <&mmcc CAMSS_CSI0_CLK>, | |
| 253 | + <&mmcc CAMSS_CPHY_CSID0_CLK>, | |
| 254 | + <&mmcc CAMSS_CSI0PIX_CLK>, | |
| 255 | + <&mmcc CAMSS_CSI0RDI_CLK>, | |
| 256 | + <&mmcc CAMSS_CSI1_AHB_CLK>, | |
| 257 | + <&mmcc CAMSS_CSI1_CLK>, | |
| 258 | + <&mmcc CAMSS_CPHY_CSID1_CLK>, | |
| 259 | + <&mmcc CAMSS_CSI1PIX_CLK>, | |
| 260 | + <&mmcc CAMSS_CSI1RDI_CLK>, | |
| 261 | + <&mmcc CAMSS_CSI2_AHB_CLK>, | |
| 262 | + <&mmcc CAMSS_CSI2_CLK>, | |
| 263 | + <&mmcc CAMSS_CPHY_CSID2_CLK>, | |
| 264 | + <&mmcc CAMSS_CSI2PIX_CLK>, | |
| 265 | + <&mmcc CAMSS_CSI2RDI_CLK>, | |
| 266 | + <&mmcc CAMSS_CSI3_AHB_CLK>, | |
| 267 | + <&mmcc CAMSS_CSI3_CLK>, | |
| 268 | + <&mmcc CAMSS_CPHY_CSID3_CLK>, | |
| 269 | + <&mmcc CAMSS_CSI3PIX_CLK>, | |
| 270 | + <&mmcc CAMSS_CSI3RDI_CLK>, | |
| 271 | + <&mmcc CAMSS_CSI0PHYTIMER_CLK>, | |
| 272 | + <&mmcc CAMSS_CSI1PHYTIMER_CLK>, | |
| 273 | + <&mmcc CAMSS_CSI2PHYTIMER_CLK>, | |
| 274 | + <&mmcc CSIPHY_AHB2CRIF_CLK>, | |
| 275 | + <&mmcc CAMSS_CSI_VFE0_CLK>, | |
| 276 | + <&mmcc CAMSS_CSI_VFE1_CLK>, | |
| 277 | + <&mmcc CAMSS_ISPIF_AHB_CLK>, | |
| 278 | + <&mmcc THROTTLE_CAMSS_AXI_CLK>, | |
| 279 | + <&mmcc CAMSS_TOP_AHB_CLK>, | |
| 280 | + <&mmcc CAMSS_VFE0_AHB_CLK>, | |
| 281 | + <&mmcc CAMSS_VFE0_CLK>, | |
| 282 | + <&mmcc CAMSS_VFE0_STREAM_CLK>, | |
| 283 | + <&mmcc CAMSS_VFE1_AHB_CLK>, | |
| 284 | + <&mmcc CAMSS_VFE1_CLK>, | |
| 285 | + <&mmcc CAMSS_VFE1_STREAM_CLK>, | |
| 286 | + <&mmcc CAMSS_VFE_VBIF_AHB_CLK>, | |
| 287 | + <&mmcc CAMSS_VFE_VBIF_AXI_CLK>; | |
| 288 | + | |
| 289 | + clock-names = "ahb", | |
| 290 | + "cphy_csid0", | |
| 291 | + "cphy_csid1", | |
| 292 | + "cphy_csid2", | |
| 293 | + "cphy_csid3", | |
| 294 | + "csi0_ahb", | |
| 295 | + "csi0", | |
| 296 | + "csi0_phy", | |
| 297 | + "csi0_pix", | |
| 298 | + "csi0_rdi", | |
| 299 | + "csi1_ahb", | |
| 300 | + "csi1", | |
| 301 | + "csi1_phy", | |
| 302 | + "csi1_pix", | |
| 303 | + "csi1_rdi", | |
| 304 | + "csi2_ahb", | |
| 305 | + "csi2", | |
| 306 | + "csi2_phy", | |
| 307 | + "csi2_pix", | |
| 308 | + "csi2_rdi", | |
| 309 | + "csi3_ahb", | |
| 310 | + "csi3", | |
| 311 | + "csi3_phy", | |
| 312 | + "csi3_pix", | |
| 313 | + "csi3_rdi", | |
| 314 | + "csiphy0_timer", | |
| 315 | + "csiphy1_timer", | |
| 316 | + "csiphy2_timer", | |
| 317 | + "csiphy_ahb2crif", | |
| 318 | + "csi_vfe0", | |
| 319 | + "csi_vfe1", | |
| 320 | + "ispif_ahb", | |
| 321 | + "throttle_axi", | |
| 322 | + "top_ahb", | |
| 323 | + "vfe0_ahb", | |
| 324 | + "vfe0", | |
| 325 | + "vfe0_stream", | |
| 326 | + "vfe1_ahb", | |
| 327 | + "vfe1", | |
| 328 | + "vfe1_stream", | |
| 329 | + "vfe_ahb", | |
| 330 | + "vfe_axi"; | |
| 331 | + | |
| 332 | + interrupts = <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>, | |
| 333 | + <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>, | |
| 334 | + <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>, | |
| 335 | + <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>, | |
| 336 | + <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, | |
| 337 | + <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, | |
| 338 | + <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>, | |
| 339 | + <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>, | |
| 340 | + <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>, | |
| 341 | + <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>; | |
| 342 | + | |
| 343 | + interrupt-names = "csid0", | |
| 344 | + "csid1", | |
| 345 | + "csid2", | |
| 346 | + "csid3", | |
| 347 | + "csiphy0", | |
| 348 | + "csiphy1", | |
| 349 | + "csiphy2", | |
| 350 | + "ispif", | |
| 351 | + "vfe0", | |
| 352 | + "vfe1"; | |
| 353 | + | |
| 354 | + iommus = <&mmss_smmu 0xc00>, | |
| 355 | + <&mmss_smmu 0xc01>, | |
| 356 | + <&mmss_smmu 0xc02>, | |
| 357 | + <&mmss_smmu 0xc03>; | |
| 358 | + | |
| 359 | + power-domains = <&mmcc CAMSS_VFE0_GDSC>, | |
| 360 | + <&mmcc CAMSS_VFE1_GDSC>; | |
| 361 | + | |
| 362 | + reg = <0x0ca00020 0x10>, | |
| 363 | + <0x0ca30000 0x100>, | |
| 364 | + <0x0ca30400 0x100>, | |
| 365 | + <0x0ca30800 0x100>, | |
| 366 | + <0x0ca30c00 0x100>, | |
| 367 | + <0x0c824000 0x1000>, | |
| 368 | + <0x0ca00120 0x4>, | |
| 369 | + <0x0c825000 0x1000>, | |
| 370 | + <0x0ca00124 0x4>, | |
| 371 | + <0x0c826000 0x1000>, | |
| 372 | + <0x0ca00128 0x4>, | |
| 373 | + <0x0ca31000 0x500>, | |
| 374 | + <0x0ca10000 0x1000>, | |
| 375 | + <0x0ca14000 0x1000>; | |
| 376 | + | |
| 377 | + reg-names = "csi_clk_mux", | |
| 378 | + "csid0", | |
| 379 | + "csid1", | |
| 380 | + "csid2", | |
| 381 | + "csid3", | |
| 382 | + "csiphy0", | |
| 383 | + "csiphy0_clk_mux", | |
| 384 | + "csiphy1", | |
| 385 | + "csiphy1_clk_mux", | |
| 386 | + "csiphy2", | |
| 387 | + "csiphy2_clk_mux", | |
| 388 | + "ispif", | |
| 389 | + "vfe0", | |
| 390 | + "vfe1"; | |
| 391 | + | |
| 392 | + vdda-supply = <®_2v8>; | |
| 393 | + | |
| 394 | + ports { | |
| 395 | + #address-cells = <1>; | |
| 396 | + #size-cells = <0>; | |
| 397 | + }; | |
| 398 | + }; | |
| @@ -0,0 +1,371 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | + | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Qualcomm CAMSS ISP | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Robert Foss <robert.foss@linaro.org> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + const: qcom,sdm845-camss | |
| 19 | + | |
| 20 | + clocks: | |
| 21 | + minItems: 36 | |
| 22 | + maxItems: 36 | |
| 23 | + | |
| 24 | + clock-names: | |
| 25 | + items: | |
| 26 | + - const: camnoc_axi | |
| 27 | + - const: cpas_ahb | |
| 28 | + - const: cphy_rx_src | |
| 29 | + - const: csi0 | |
| 30 | + - const: csi0_src | |
| 31 | + - const: csi1 | |
| 32 | + - const: csi1_src | |
| 33 | + - const: csi2 | |
| 34 | + - const: csi2_src | |
| 35 | + - const: csiphy0 | |
| 36 | + - const: csiphy0_timer | |
| 37 | + - const: csiphy0_timer_src | |
| 38 | + - const: csiphy1 | |
| 39 | + - const: csiphy1_timer | |
| 40 | + - const: csiphy1_timer_src | |
| 41 | + - const: csiphy2 | |
| 42 | + - const: csiphy2_timer | |
| 43 | + - const: csiphy2_timer_src | |
| 44 | + - const: csiphy3 | |
| 45 | + - const: csiphy3_timer | |
| 46 | + - const: csiphy3_timer_src | |
| 47 | + - const: gcc_camera_ahb | |
| 48 | + - const: gcc_camera_axi | |
| 49 | + - const: slow_ahb_src | |
| 50 | + - const: soc_ahb | |
| 51 | + - const: vfe0_axi | |
| 52 | + - const: vfe0 | |
| 53 | + - const: vfe0_cphy_rx | |
| 54 | + - const: vfe0_src | |
| 55 | + - const: vfe1_axi | |
| 56 | + - const: vfe1 | |
| 57 | + - const: vfe1_cphy_rx | |
| 58 | + - const: vfe1_src | |
| 59 | + - const: vfe_lite | |
| 60 | + - const: vfe_lite_cphy_rx | |
| 61 | + - const: vfe_lite_src | |
| 62 | + | |
| 63 | + interrupts: | |
| 64 | + minItems: 10 | |
| 65 | + maxItems: 10 | |
| 66 | + | |
| 67 | + interrupt-names: | |
| 68 | + items: | |
| 69 | + - const: csid0 | |
| 70 | + - const: csid1 | |
| 71 | + - const: csid2 | |
| 72 | + - const: csiphy0 | |
| 73 | + - const: csiphy1 | |
| 74 | + - const: csiphy2 | |
| 75 | + - const: csiphy3 | |
| 76 | + - const: vfe0 | |
| 77 | + - const: vfe1 | |
| 78 | + - const: vfe_lite | |
| 79 | + | |
| 80 | + iommus: | |
| 81 | + maxItems: 4 | |
| 82 | + | |
| 83 | + power-domains: | |
| 84 | + items: | |
| 85 | + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. | |
| 86 | + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. | |
| 87 | + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. | |
| 88 | + | |
| 89 | + ports: | |
| 90 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 91 | + | |
| 92 | + description: | |
| 93 | + CSI input ports. | |
| 94 | + | |
| 95 | + properties: | |
| 96 | + port@0: | |
| 97 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 98 | + unevaluatedProperties: false | |
| 99 | + description: | |
| 100 | + Input port for receiving CSI data. | |
| 101 | + | |
| 102 | + properties: | |
| 103 | + endpoint: | |
| 104 | + $ref: video-interfaces.yaml# | |
| 105 | + unevaluatedProperties: false | |
| 106 | + | |
| 107 | + properties: | |
| 108 | + clock-lanes: | |
| 109 | + maxItems: 1 | |
| 110 | + | |
| 111 | + data-lanes: | |
| 112 | + minItems: 1 | |
| 113 | + maxItems: 4 | |
| 114 | + | |
| 115 | + required: | |
| 116 | + - clock-lanes | |
| 117 | + - data-lanes | |
| 118 | + | |
| 119 | + port@1: | |
| 120 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 121 | + unevaluatedProperties: false | |
| 122 | + description: | |
| 123 | + Input port for receiving CSI data. | |
| 124 | + | |
| 125 | + properties: | |
| 126 | + endpoint: | |
| 127 | + $ref: video-interfaces.yaml# | |
| 128 | + unevaluatedProperties: false | |
| 129 | + | |
| 130 | + properties: | |
| 131 | + clock-lanes: | |
| 132 | + items: | |
| 133 | + - const: 7 | |
| 134 | + | |
| 135 | + data-lanes: | |
| 136 | + minItems: 1 | |
| 137 | + maxItems: 4 | |
| 138 | + | |
| 139 | + required: | |
| 140 | + - clock-lanes | |
| 141 | + - data-lanes | |
| 142 | + | |
| 143 | + port@2: | |
| 144 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 145 | + unevaluatedProperties: false | |
| 146 | + description: | |
| 147 | + Input port for receiving CSI data. | |
| 148 | + | |
| 149 | + properties: | |
| 150 | + endpoint: | |
| 151 | + $ref: video-interfaces.yaml# | |
| 152 | + unevaluatedProperties: false | |
| 153 | + | |
| 154 | + properties: | |
| 155 | + clock-lanes: | |
| 156 | + maxItems: 1 | |
| 157 | + | |
| 158 | + data-lanes: | |
| 159 | + minItems: 1 | |
| 160 | + maxItems: 4 | |
| 161 | + | |
| 162 | + required: | |
| 163 | + - clock-lanes | |
| 164 | + - data-lanes | |
| 165 | + | |
| 166 | + port@3: | |
| 167 | + $ref: /schemas/graph.yaml#/$defs/port-base | |
| 168 | + unevaluatedProperties: false | |
| 169 | + description: | |
| 170 | + Input port for receiving CSI data. | |
| 171 | + | |
| 172 | + properties: | |
| 173 | + endpoint: | |
| 174 | + $ref: video-interfaces.yaml# | |
| 175 | + unevaluatedProperties: false | |
| 176 | + | |
| 177 | + properties: | |
| 178 | + clock-lanes: | |
| 179 | + maxItems: 1 | |
| 180 | + | |
| 181 | + data-lanes: | |
| 182 | + minItems: 1 | |
| 183 | + maxItems: 4 | |
| 184 | + | |
| 185 | + required: | |
| 186 | + - clock-lanes | |
| 187 | + - data-lanes | |
| 188 | + | |
| 189 | + reg: | |
| 190 | + minItems: 10 | |
| 191 | + maxItems: 10 | |
| 192 | + | |
| 193 | + reg-names: | |
| 194 | + items: | |
| 195 | + - const: csid0 | |
| 196 | + - const: csid1 | |
| 197 | + - const: csid2 | |
| 198 | + - const: csiphy0 | |
| 199 | + - const: csiphy1 | |
| 200 | + - const: csiphy2 | |
| 201 | + - const: csiphy3 | |
| 202 | + - const: vfe0 | |
| 203 | + - const: vfe1 | |
| 204 | + - const: vfe_lite | |
| 205 | + | |
| 206 | + vdda-supply: | |
| 207 | + description: | |
| 208 | + Definition of the regulator used as analog power supply. | |
| 209 | + | |
| 210 | +required: | |
| 211 | + - clock-names | |
| 212 | + - clocks | |
| 213 | + - compatible | |
| 214 | + - interrupt-names | |
| 215 | + - interrupts | |
| 216 | + - iommus | |
| 217 | + - power-domains | |
| 218 | + - reg | |
| 219 | + - reg-names | |
| 220 | + - vdda-supply | |
| 221 | + | |
| 222 | +additionalProperties: false | |
| 223 | + | |
| 224 | +examples: | |
| 225 | + - | | |
| 226 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 227 | + #include <dt-bindings/clock/qcom,camcc-sdm845.h> | |
| 228 | + #include <dt-bindings/clock/qcom,gcc-sdm845.h> | |
| 229 | + | |
| 230 | + soc { | |
| 231 | + #address-cells = <2>; | |
| 232 | + #size-cells = <2>; | |
| 233 | + | |
| 234 | + camss: camss@a00000 { | |
| 235 | + compatible = "qcom,sdm845-camss"; | |
| 236 | + | |
| 237 | + clocks = <&clock_camcc CAM_CC_CAMNOC_AXI_CLK>, | |
| 238 | + <&clock_camcc CAM_CC_CPAS_AHB_CLK>, | |
| 239 | + <&clock_camcc CAM_CC_CPHY_RX_CLK_SRC>, | |
| 240 | + <&clock_camcc CAM_CC_IFE_0_CSID_CLK>, | |
| 241 | + <&clock_camcc CAM_CC_IFE_0_CSID_CLK_SRC>, | |
| 242 | + <&clock_camcc CAM_CC_IFE_1_CSID_CLK>, | |
| 243 | + <&clock_camcc CAM_CC_IFE_1_CSID_CLK_SRC>, | |
| 244 | + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK>, | |
| 245 | + <&clock_camcc CAM_CC_IFE_LITE_CSID_CLK_SRC>, | |
| 246 | + <&clock_camcc CAM_CC_CSIPHY0_CLK>, | |
| 247 | + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK>, | |
| 248 | + <&clock_camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, | |
| 249 | + <&clock_camcc CAM_CC_CSIPHY1_CLK>, | |
| 250 | + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK>, | |
| 251 | + <&clock_camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, | |
| 252 | + <&clock_camcc CAM_CC_CSIPHY2_CLK>, | |
| 253 | + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK>, | |
| 254 | + <&clock_camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, | |
| 255 | + <&clock_camcc CAM_CC_CSIPHY3_CLK>, | |
| 256 | + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK>, | |
| 257 | + <&clock_camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, | |
| 258 | + <&gcc GCC_CAMERA_AHB_CLK>, | |
| 259 | + <&gcc GCC_CAMERA_AXI_CLK>, | |
| 260 | + <&clock_camcc CAM_CC_SLOW_AHB_CLK_SRC>, | |
| 261 | + <&clock_camcc CAM_CC_SOC_AHB_CLK>, | |
| 262 | + <&clock_camcc CAM_CC_IFE_0_AXI_CLK>, | |
| 263 | + <&clock_camcc CAM_CC_IFE_0_CLK>, | |
| 264 | + <&clock_camcc CAM_CC_IFE_0_CPHY_RX_CLK>, | |
| 265 | + <&clock_camcc CAM_CC_IFE_0_CLK_SRC>, | |
| 266 | + <&clock_camcc CAM_CC_IFE_1_AXI_CLK>, | |
| 267 | + <&clock_camcc CAM_CC_IFE_1_CLK>, | |
| 268 | + <&clock_camcc CAM_CC_IFE_1_CPHY_RX_CLK>, | |
| 269 | + <&clock_camcc CAM_CC_IFE_1_CLK_SRC>, | |
| 270 | + <&clock_camcc CAM_CC_IFE_LITE_CLK>, | |
| 271 | + <&clock_camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, | |
| 272 | + <&clock_camcc CAM_CC_IFE_LITE_CLK_SRC>; | |
| 273 | + | |
| 274 | + clock-names = "camnoc_axi", | |
| 275 | + "cpas_ahb", | |
| 276 | + "cphy_rx_src", | |
| 277 | + "csi0", | |
| 278 | + "csi0_src", | |
| 279 | + "csi1", | |
| 280 | + "csi1_src", | |
| 281 | + "csi2", | |
| 282 | + "csi2_src", | |
| 283 | + "csiphy0", | |
| 284 | + "csiphy0_timer", | |
| 285 | + "csiphy0_timer_src", | |
| 286 | + "csiphy1", | |
| 287 | + "csiphy1_timer", | |
| 288 | + "csiphy1_timer_src", | |
| 289 | + "csiphy2", | |
| 290 | + "csiphy2_timer", | |
| 291 | + "csiphy2_timer_src", | |
| 292 | + "csiphy3", | |
| 293 | + "csiphy3_timer", | |
| 294 | + "csiphy3_timer_src", | |
| 295 | + "gcc_camera_ahb", | |
| 296 | + "gcc_camera_axi", | |
| 297 | + "slow_ahb_src", | |
| 298 | + "soc_ahb", | |
| 299 | + "vfe0_axi", | |
| 300 | + "vfe0", | |
| 301 | + "vfe0_cphy_rx", | |
| 302 | + "vfe0_src", | |
| 303 | + "vfe1_axi", | |
| 304 | + "vfe1", | |
| 305 | + "vfe1_cphy_rx", | |
| 306 | + "vfe1_src", | |
| 307 | + "vfe_lite", | |
| 308 | + "vfe_lite_cphy_rx", | |
| 309 | + "vfe_lite_src"; | |
| 310 | + | |
| 311 | + interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>, | |
| 312 | + <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>, | |
| 313 | + <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>, | |
| 314 | + <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>, | |
| 315 | + <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>, | |
| 316 | + <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>, | |
| 317 | + <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, | |
| 318 | + <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>, | |
| 319 | + <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>, | |
| 320 | + <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; | |
| 321 | + | |
| 322 | + interrupt-names = "csid0", | |
| 323 | + "csid1", | |
| 324 | + "csid2", | |
| 325 | + "csiphy0", | |
| 326 | + "csiphy1", | |
| 327 | + "csiphy2", | |
| 328 | + "csiphy3", | |
| 329 | + "vfe0", | |
| 330 | + "vfe1", | |
| 331 | + "vfe_lite"; | |
| 332 | + | |
| 333 | + iommus = <&apps_smmu 0x0808 0x0>, | |
| 334 | + <&apps_smmu 0x0810 0x8>, | |
| 335 | + <&apps_smmu 0x0c08 0x0>, | |
| 336 | + <&apps_smmu 0x0c10 0x8>; | |
| 337 | + | |
| 338 | + power-domains = <&clock_camcc IFE_0_GDSC>, | |
| 339 | + <&clock_camcc IFE_1_GDSC>, | |
| 340 | + <&clock_camcc TITAN_TOP_GDSC>; | |
| 341 | + | |
| 342 | + reg = <0 0xacb3000 0 0x1000>, | |
| 343 | + <0 0xacba000 0 0x1000>, | |
| 344 | + <0 0xacc8000 0 0x1000>, | |
| 345 | + <0 0xac65000 0 0x1000>, | |
| 346 | + <0 0xac66000 0 0x1000>, | |
| 347 | + <0 0xac67000 0 0x1000>, | |
| 348 | + <0 0xac68000 0 0x1000>, | |
| 349 | + <0 0xacaf000 0 0x4000>, | |
| 350 | + <0 0xacb6000 0 0x4000>, | |
| 351 | + <0 0xacc4000 0 0x4000>; | |
| 352 | + | |
| 353 | + reg-names = "csid0", | |
| 354 | + "csid1", | |
| 355 | + "csid2", | |
| 356 | + "csiphy0", | |
| 357 | + "csiphy1", | |
| 358 | + "csiphy2", | |
| 359 | + "csiphy3", | |
| 360 | + "vfe0", | |
| 361 | + "vfe1", | |
| 362 | + "vfe_lite"; | |
| 363 | + | |
| 364 | + vdda-supply = <®_2v8>; | |
| 365 | + | |
| 366 | + ports { | |
| 367 | + #address-cells = <1>; | |
| 368 | + #size-cells = <0>; | |
| 369 | + }; | |
| 370 | + }; | |
| 371 | + }; | |
| @@ -0,0 +1,167 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | + | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Qualcomm Venus video encode and decode accelerators | |
| 9 | + | |
| 10 | +maintainers: | |
| 11 | + - Stanimir Varbanov <stanimir.varbanov@linaro.org> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + The Venus IP is a video encode and decode accelerator present | |
| 15 | + on Qualcomm platforms | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: qcom,sm8250-venus | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + interrupts: | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + power-domains: | |
| 28 | + minItems: 2 | |
| 29 | + maxItems: 3 | |
| 30 | + | |
| 31 | + power-domain-names: | |
| 32 | + minItems: 2 | |
| 33 | + maxItems: 3 | |
| 34 | + items: | |
| 35 | + - const: venus | |
| 36 | + - const: vcodec0 | |
| 37 | + - const: mx | |
| 38 | + | |
| 39 | + clocks: | |
| 40 | + maxItems: 3 | |
| 41 | + | |
| 42 | + clock-names: | |
| 43 | + items: | |
| 44 | + - const: iface | |
| 45 | + - const: core | |
| 46 | + - const: vcodec0_core | |
| 47 | + | |
| 48 | + iommus: | |
| 49 | + maxItems: 1 | |
| 50 | + | |
| 51 | + memory-region: | |
| 52 | + maxItems: 1 | |
| 53 | + | |
| 54 | + interconnects: | |
| 55 | + maxItems: 2 | |
| 56 | + | |
| 57 | + interconnect-names: | |
| 58 | + items: | |
| 59 | + - const: cpu-cfg | |
| 60 | + - const: video-mem | |
| 61 | + | |
| 62 | + resets: | |
| 63 | + maxItems: 2 | |
| 64 | + | |
| 65 | + reset-names: | |
| 66 | + items: | |
| 67 | + - const: bus | |
| 68 | + - const: core | |
| 69 | + | |
| 70 | + video-decoder: | |
| 71 | + type: object | |
| 72 | + | |
| 73 | + properties: | |
| 74 | + compatible: | |
| 75 | + const: venus-decoder | |
| 76 | + | |
| 77 | + required: | |
| 78 | + - compatible | |
| 79 | + | |
| 80 | + additionalProperties: false | |
| 81 | + | |
| 82 | + video-encoder: | |
| 83 | + type: object | |
| 84 | + | |
| 85 | + properties: | |
| 86 | + compatible: | |
| 87 | + const: venus-encoder | |
| 88 | + | |
| 89 | + required: | |
| 90 | + - compatible | |
| 91 | + | |
| 92 | + additionalProperties: false | |
| 93 | + | |
| 94 | + video-firmware: | |
| 95 | + type: object | |
| 96 | + | |
| 97 | + description: | | |
| 98 | + Firmware subnode is needed when the platform does not | |
| 99 | + have TrustZone. | |
| 100 | + | |
| 101 | + properties: | |
| 102 | + iommus: | |
| 103 | + maxItems: 1 | |
| 104 | + | |
| 105 | + required: | |
| 106 | + - iommus | |
| 107 | + | |
| 108 | +required: | |
| 109 | + - compatible | |
| 110 | + - reg | |
| 111 | + - interrupts | |
| 112 | + - power-domains | |
| 113 | + - power-domain-names | |
| 114 | + - clocks | |
| 115 | + - clock-names | |
| 116 | + - interconnects | |
| 117 | + - interconnect-names | |
| 118 | + - iommus | |
| 119 | + - memory-region | |
| 120 | + - resets | |
| 121 | + - reset-names | |
| 122 | + - video-decoder | |
| 123 | + - video-encoder | |
| 124 | + | |
| 125 | +additionalProperties: false | |
| 126 | + | |
| 127 | +examples: | |
| 128 | + - | | |
| 129 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 130 | + #include <dt-bindings/clock/qcom,videocc-sm8250.h> | |
| 131 | + #include <dt-bindings/interconnect/qcom,sm8250.h> | |
| 132 | + #include <dt-bindings/clock/qcom,gcc-sm8250.h> | |
| 133 | + #include <dt-bindings/power/qcom-rpmpd.h> | |
| 134 | + | |
| 135 | + venus: video-codec@aa00000 { | |
| 136 | + compatible = "qcom,sm8250-venus"; | |
| 137 | + reg = <0x0aa00000 0xff000>; | |
| 138 | + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; | |
| 139 | + power-domains = <&videocc MVS0C_GDSC>, | |
| 140 | + <&videocc MVS0_GDSC>, | |
| 141 | + <&rpmhpd SM8250_MX>; | |
| 142 | + power-domain-names = "venus", "vcodec0", "mx"; | |
| 143 | + | |
| 144 | + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, | |
| 145 | + <&videocc VIDEO_CC_MVS0C_CLK>, | |
| 146 | + <&videocc VIDEO_CC_MVS0_CLK>; | |
| 147 | + clock-names = "iface", "core", "vcodec0_core"; | |
| 148 | + | |
| 149 | + interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, | |
| 150 | + <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>; | |
| 151 | + interconnect-names = "cpu-cfg", "video-mem"; | |
| 152 | + | |
| 153 | + iommus = <&apps_smmu 0x2100 0x0400>; | |
| 154 | + memory-region = <&video_mem>; | |
| 155 | + | |
| 156 | + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, | |
| 157 | + <&videocc VIDEO_CC_MVS0C_CLK_ARES>; | |
| 158 | + reset-names = "bus", "core"; | |
| 159 | + | |
| 160 | + video-decoder { | |
| 161 | + compatible = "venus-decoder"; | |
| 162 | + }; | |
| 163 | + | |
| 164 | + video-encoder { | |
| 165 | + compatible = "venus-encoder"; | |
| 166 | + }; | |
| 167 | + }; | |
| @@ -90,9 +90,12 @@ properties: · 89 unmodified lines | ||
| 90 | 90 | - rc-leadtek-y04g0051 |
| 91 | 91 | - rc-lme2510 |
| 92 | 92 | - rc-manli |
| 93 | + - rc-mecool-kii-pro | |
| 94 | + - rc-mecool-kiii-pro | |
| 93 | 95 | - rc-medion-x10 |
| 94 | 96 | - rc-medion-x10-digitainer |
| 95 | 97 | - rc-medion-x10-or2x |
| 98 | + - rc-minix-neo | |
| 96 | 99 | - rc-msi-digivox-ii |
| 97 | 100 | - rc-msi-digivox-iii |
| 98 | 101 | - rc-msi-tvanywhere |
| @@ -145,11 +148,13 @@ properties: · 46 unmodified lines | ||
| 145 | 148 | - rc-videomate-s350 |
| 146 | 149 | - rc-videomate-tv-pvr |
| 147 | 150 | - rc-videostrong-kii-pro |
| 151 | + - rc-vega-s9x | |
| 148 | 152 | - rc-wetek-hub |
| 149 | 153 | - rc-wetek-play2 |
| 150 | 154 | - rc-winfast |
| 151 | 155 | - rc-winfast-usbii-deluxe |
| 152 | 156 | - rc-x96max |
| 157 | + - rc-xbox-360 | |
| 153 | 158 | - rc-xbox-dvd |
| 154 | 159 | - rc-zx-irdec |
| 155 | 160 | |
| @@ -1,177 +0,0 @@ | ||
| 1 | −Renesas R-Car Gen3 Digital Radio Interface controller (DRIF) | |
| 2 | −------------------------------------------------------------ | |
| 3 | − | |
| 4 | −R-Car Gen3 DRIF is a SPI like receive only slave device. A general | |
| 5 | −representation of DRIF interfacing with a master device is shown below. | |
| 6 | − | |
| 7 | −+---------------------+ +---------------------+ | |
| 8 | −| |-----SCK------->|CLK | | |
| 9 | −| Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 10 | −| |-----SD0------->|D0 | | |
| 11 | −| |-----SD1------->|D1 | | |
| 12 | −+---------------------+ +---------------------+ | |
| 13 | − | |
| 14 | −As per datasheet, each DRIF channel (drifn) is made up of two internal | |
| 15 | −channels (drifn0 & drifn1). These two internal channels share the common | |
| 16 | −CLK & SYNC. Each internal channel has its own dedicated resources like | |
| 17 | −irq, dma channels, address space & clock. This internal split is not | |
| 18 | −visible to the external master device. | |
| 19 | − | |
| 20 | −The device tree model represents each internal channel as a separate node. | |
| 21 | −The internal channels sharing the CLK & SYNC are tied together by their | |
| 22 | −phandles using a property called "renesas,bonding". For the rest of | |
| 23 | −the documentation, unless explicitly stated, the word channel implies an | |
| 24 | −internal channel. | |
| 25 | − | |
| 26 | −When both internal channels are enabled they need to be managed together | |
| 27 | −as one (i.e.) they cannot operate alone as independent devices. Out of the | |
| 28 | −two, one of them needs to act as a primary device that accepts common | |
| 29 | −properties of both the internal channels. This channel is identified by a | |
| 30 | −property called "renesas,primary-bond". | |
| 31 | − | |
| 32 | −To summarize, | |
| 33 | − - When both the internal channels that are bonded together are enabled, | |
| 34 | − the zeroth channel is selected as primary-bond. This channels accepts | |
| 35 | − properties common to all the members of the bond. | |
| 36 | − - When only one of the bonded channels need to be enabled, the property | |
| 37 | − "renesas,bonding" or "renesas,primary-bond" will have no effect. That | |
| 38 | − enabled channel can act alone as any other independent device. | |
| 39 | − | |
| 40 | −Required properties of an internal channel: | |
| 41 | −------------------------------------------- | |
| 42 | −- compatible: "renesas,r8a7795-drif" if DRIF controller is a part of R8A7795 SoC. | |
| 43 | − "renesas,r8a7796-drif" if DRIF controller is a part of R8A7796 SoC. | |
| 44 | − "renesas,rcar-gen3-drif" for a generic R-Car Gen3 compatible device. | |
| 45 | − | |
| 46 | − When compatible with the generic version, nodes must list the | |
| 47 | − SoC-specific version corresponding to the platform first | |
| 48 | − followed by the generic version. | |
| 49 | − | |
| 50 | −- reg: offset and length of that channel. | |
| 51 | −- interrupts: associated with that channel. | |
| 52 | −- clocks: phandle and clock specifier of that channel. | |
| 53 | −- clock-names: clock input name string: "fck". | |
| 54 | −- dmas: phandles to the DMA channels. | |
| 55 | −- dma-names: names of the DMA channel: "rx". | |
| 56 | −- renesas,bonding: phandle to the other channel. | |
| 57 | − | |
| 58 | −Optional properties of an internal channel: | |
| 59 | −------------------------------------------- | |
| 60 | −- power-domains: phandle to the respective power domain. | |
| 61 | − | |
| 62 | −Required properties of an internal channel when: | |
| 63 | − - It is the only enabled channel of the bond (or) | |
| 64 | − - If it acts as primary among enabled bonds | |
| 65 | −-------------------------------------------------------- | |
| 66 | −- pinctrl-0: pin control group to be used for this channel. | |
| 67 | −- pinctrl-names: must be "default". | |
| 68 | −- renesas,primary-bond: empty property indicating the channel acts as primary | |
| 69 | − among the bonded channels. | |
| 70 | −- port: child port node corresponding to the data input, in accordance with | |
| 71 | − the video interface bindings defined in | |
| 72 | − Documentation/devicetree/bindings/media/video-interfaces.txt. The port | |
| 73 | − node must contain at least one endpoint. | |
| 74 | − | |
| 75 | −Optional endpoint property: | |
| 76 | −--------------------------- | |
| 77 | −- sync-active: Indicates sync signal polarity, 0/1 for low/high respectively. | |
| 78 | − This property maps to SYNCAC bit in the hardware manual. The | |
| 79 | − default is 1 (active high). | |
| 80 | − | |
| 81 | −Example: | |
| 82 | −-------- | |
| 83 | − | |
| 84 | −(1) Both internal channels enabled: | |
| 85 | −----------------------------------- | |
| 86 | − | |
| 87 | −When interfacing with a third party tuner device with two data pins as shown | |
| 88 | −below. | |
| 89 | − | |
| 90 | −+---------------------+ +---------------------+ | |
| 91 | −| |-----SCK------->|CLK | | |
| 92 | −| Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 93 | −| |-----SD0------->|D0 | | |
| 94 | −| |-----SD1------->|D1 | | |
| 95 | −+---------------------+ +---------------------+ | |
| 96 | − | |
| 97 | − drif00: rif@e6f40000 { | |
| 98 | − compatible = "renesas,r8a7795-drif", | |
| 99 | − "renesas,rcar-gen3-drif"; | |
| 100 | − reg = <0 0xe6f40000 0 0x64>; | |
| 101 | − interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
| 102 | − clocks = <&cpg CPG_MOD 515>; | |
| 103 | − clock-names = "fck"; | |
| 104 | − dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
| 105 | − dma-names = "rx", "rx"; | |
| 106 | − power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 107 | − renesas,bonding = <&drif01>; | |
| 108 | − renesas,primary-bond; | |
| 109 | − pinctrl-0 = <&drif0_pins>; | |
| 110 | − pinctrl-names = "default"; | |
| 111 | − port { | |
| 112 | − drif0_ep: endpoint { | |
| 113 | − remote-endpoint = <&tuner_ep>; | |
| 114 | − }; | |
| 115 | − }; | |
| 116 | − }; | |
| 117 | − | |
| 118 | − drif01: rif@e6f50000 { | |
| 119 | − compatible = "renesas,r8a7795-drif", | |
| 120 | − "renesas,rcar-gen3-drif"; | |
| 121 | − reg = <0 0xe6f50000 0 0x64>; | |
| 122 | − interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 123 | − clocks = <&cpg CPG_MOD 514>; | |
| 124 | − clock-names = "fck"; | |
| 125 | − dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
| 126 | − dma-names = "rx", "rx"; | |
| 127 | − power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 128 | − renesas,bonding = <&drif00>; | |
| 129 | − }; | |
| 130 | − | |
| 131 | − | |
| 132 | −(2) Internal channel 1 alone is enabled: | |
| 133 | −---------------------------------------- | |
| 134 | − | |
| 135 | −When interfacing with a third party tuner device with one data pin as shown | |
| 136 | −below. | |
| 137 | − | |
| 138 | −+---------------------+ +---------------------+ | |
| 139 | −| |-----SCK------->|CLK | | |
| 140 | −| Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 141 | −| | |D0 (unused) | | |
| 142 | −| |-----SD-------->|D1 | | |
| 143 | −+---------------------+ +---------------------+ | |
| 144 | − | |
| 145 | − drif00: rif@e6f40000 { | |
| 146 | − compatible = "renesas,r8a7795-drif", | |
| 147 | − "renesas,rcar-gen3-drif"; | |
| 148 | − reg = <0 0xe6f40000 0 0x64>; | |
| 149 | − interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
| 150 | − clocks = <&cpg CPG_MOD 515>; | |
| 151 | − clock-names = "fck"; | |
| 152 | − dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
| 153 | − dma-names = "rx", "rx"; | |
| 154 | − power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 155 | − renesas,bonding = <&drif01>; | |
| 156 | − }; | |
| 157 | − | |
| 158 | − drif01: rif@e6f50000 { | |
| 159 | − compatible = "renesas,r8a7795-drif", | |
| 160 | − "renesas,rcar-gen3-drif"; | |
| 161 | − reg = <0 0xe6f50000 0 0x64>; | |
| 162 | − interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 163 | − clocks = <&cpg CPG_MOD 514>; | |
| 164 | − clock-names = "fck"; | |
| 165 | − dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
| 166 | − dma-names = "rx", "rx"; | |
| 167 | − power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 168 | − renesas,bonding = <&drif00>; | |
| 169 | − pinctrl-0 = <&drif0_pins>; | |
| 170 | − pinctrl-names = "default"; | |
| 171 | − port { | |
| 172 | − drif0_ep: endpoint { | |
| 173 | − remote-endpoint = <&tuner_ep>; | |
| 174 | − sync-active = <0>; | |
| 175 | − }; | |
| 176 | − }; | |
| 177 | − }; | |
| @@ -0,0 +1,279 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/media/renesas,drif.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Renesas R-Car Gen3 Digital Radio Interface Controller (DRIF) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ramesh Shanmugasundaram <rashanmu@gmail.com> | |
| 11 | + - Fabrizio Castro <fabrizio.castro.jz@renesas.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + R-Car Gen3 DRIF is a SPI like receive only slave device. A general | |
| 15 | + representation of DRIF interfacing with a master device is shown below. | |
| 16 | + | |
| 17 | + +---------------------+ +---------------------+ | |
| 18 | + | |-----SCK------->|CLK | | |
| 19 | + | Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 20 | + | |-----SD0------->|D0 | | |
| 21 | + | |-----SD1------->|D1 | | |
| 22 | + +---------------------+ +---------------------+ | |
| 23 | + | |
| 24 | + As per datasheet, each DRIF channel (drifn) is made up of two internal | |
| 25 | + channels (drifn0 & drifn1). These two internal channels share the common | |
| 26 | + CLK & SYNC. Each internal channel has its own dedicated resources like | |
| 27 | + irq, dma channels, address space & clock. This internal split is not | |
| 28 | + visible to the external master device. | |
| 29 | + | |
| 30 | + The device tree model represents each internal channel as a separate node. | |
| 31 | + The internal channels sharing the CLK & SYNC are tied together by their | |
| 32 | + phandles using a property called "renesas,bonding". For the rest of | |
| 33 | + the documentation, unless explicitly stated, the word channel implies an | |
| 34 | + internal channel. | |
| 35 | + | |
| 36 | + When both internal channels are enabled they need to be managed together | |
| 37 | + as one (i.e.) they cannot operate alone as independent devices. Out of the | |
| 38 | + two, one of them needs to act as a primary device that accepts common | |
| 39 | + properties of both the internal channels. This channel is identified by a | |
| 40 | + property called "renesas,primary-bond". | |
| 41 | + | |
| 42 | + To summarize, | |
| 43 | + * When both the internal channels that are bonded together are enabled, | |
| 44 | + the zeroth channel is selected as primary-bond. This channels accepts | |
| 45 | + properties common to all the members of the bond. | |
| 46 | + * When only one of the bonded channels need to be enabled, the property | |
| 47 | + "renesas,bonding" or "renesas,primary-bond" will have no effect. That | |
| 48 | + enabled channel can act alone as any other independent device. | |
| 49 | + | |
| 50 | +properties: | |
| 51 | + compatible: | |
| 52 | + items: | |
| 53 | + - enum: | |
| 54 | + - renesas,r8a7795-drif # R-Car H3 | |
| 55 | + - renesas,r8a7796-drif # R-Car M3-W | |
| 56 | + - renesas,r8a77965-drif # R-Car M3-N | |
| 57 | + - renesas,r8a77990-drif # R-Car E3 | |
| 58 | + - const: renesas,rcar-gen3-drif # Generic R-Car Gen3 compatible device | |
| 59 | + | |
| 60 | + reg: | |
| 61 | + maxItems: 1 | |
| 62 | + | |
| 63 | + interrupts: | |
| 64 | + maxItems: 1 | |
| 65 | + | |
| 66 | + clocks: | |
| 67 | + maxItems: 1 | |
| 68 | + | |
| 69 | + clock-names: | |
| 70 | + maxItems: 1 | |
| 71 | + items: | |
| 72 | + - const: fck | |
| 73 | + | |
| 74 | + resets: | |
| 75 | + maxItems: 1 | |
| 76 | + | |
| 77 | + dmas: | |
| 78 | + minItems: 1 | |
| 79 | + maxItems: 2 | |
| 80 | + | |
| 81 | + dma-names: | |
| 82 | + minItems: 1 | |
| 83 | + maxItems: 2 | |
| 84 | + items: | |
| 85 | + - const: rx | |
| 86 | + - const: rx | |
| 87 | + | |
| 88 | + renesas,bonding: | |
| 89 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 90 | + description: | |
| 91 | + The phandle to the other internal channel of DRIF | |
| 92 | + | |
| 93 | + power-domains: | |
| 94 | + maxItems: 1 | |
| 95 | + | |
| 96 | + renesas,primary-bond: | |
| 97 | + type: boolean | |
| 98 | + description: | |
| 99 | + Indicates that the channel acts as primary among the bonded channels. | |
| 100 | + | |
| 101 | + port: | |
| 102 | + type: object | |
| 103 | + description: | |
| 104 | + Child port node corresponding to the data input, in accordance with the | |
| 105 | + video interface bindings defined in | |
| 106 | + Documentation/devicetree/bindings/media/video-interfaces.txt. | |
| 107 | + The port node must contain at least one endpoint. | |
| 108 | + | |
| 109 | + properties: | |
| 110 | + endpoint: | |
| 111 | + type: object | |
| 112 | + | |
| 113 | + properties: | |
| 114 | + remote-endpoint: | |
| 115 | + description: | |
| 116 | + A phandle to the remote tuner endpoint subnode in remote node | |
| 117 | + port. | |
| 118 | + | |
| 119 | + sync-active: | |
| 120 | + enum: [0, 1] | |
| 121 | + description: | |
| 122 | + Indicates sync signal polarity, 0/1 for low/high respectively. | |
| 123 | + This property maps to SYNCAC bit in the hardware manual. The | |
| 124 | + default is 1 (active high). | |
| 125 | + | |
| 126 | + additionalProperties: false | |
| 127 | + | |
| 128 | +required: | |
| 129 | + - compatible | |
| 130 | + - reg | |
| 131 | + - interrupts | |
| 132 | + - clocks | |
| 133 | + - clock-names | |
| 134 | + - resets | |
| 135 | + - dmas | |
| 136 | + - dma-names | |
| 137 | + - renesas,bonding | |
| 138 | + - power-domains | |
| 139 | + | |
| 140 | +allOf: | |
| 141 | + - if: | |
| 142 | + required: | |
| 143 | + - renesas,primary-bond | |
| 144 | + then: | |
| 145 | + required: | |
| 146 | + - pinctrl-0 | |
| 147 | + - pinctrl-names | |
| 148 | + - port | |
| 149 | + | |
| 150 | + - if: | |
| 151 | + required: | |
| 152 | + - port | |
| 153 | + then: | |
| 154 | + required: | |
| 155 | + - pinctrl-0 | |
| 156 | + - pinctrl-names | |
| 157 | + else: | |
| 158 | + properties: | |
| 159 | + pinctrl-0: false | |
| 160 | + pinctrl-names: false | |
| 161 | + | |
| 162 | +additionalProperties: false | |
| 163 | + | |
| 164 | +examples: | |
| 165 | + # Example with both internal channels enabled. | |
| 166 | + # | |
| 167 | + # When interfacing with a third party tuner device with two data pins as shown | |
| 168 | + # below. | |
| 169 | + # | |
| 170 | + # +---------------------+ +---------------------+ | |
| 171 | + # | |-----SCK------->|CLK | | |
| 172 | + # | Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 173 | + # | |-----SD0------->|D0 | | |
| 174 | + # | |-----SD1------->|D1 | | |
| 175 | + # +---------------------+ +---------------------+ | |
| 176 | + - | | |
| 177 | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> | |
| 178 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 179 | + #include <dt-bindings/power/r8a7795-sysc.h> | |
| 180 | + | |
| 181 | + soc { | |
| 182 | + #address-cells = <2>; | |
| 183 | + #size-cells = <2>; | |
| 184 | + | |
| 185 | + drif00: rif@e6f40000 { | |
| 186 | + compatible = "renesas,r8a7795-drif", | |
| 187 | + "renesas,rcar-gen3-drif"; | |
| 188 | + reg = <0 0xe6f40000 0 0x64>; | |
| 189 | + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; | |
| 190 | + clocks = <&cpg CPG_MOD 515>; | |
| 191 | + clock-names = "fck"; | |
| 192 | + dmas = <&dmac1 0x20>, <&dmac2 0x20>; | |
| 193 | + dma-names = "rx", "rx"; | |
| 194 | + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 195 | + renesas,bonding = <&drif01>; | |
| 196 | + resets = <&cpg 515>; | |
| 197 | + renesas,primary-bond; | |
| 198 | + pinctrl-0 = <&drif0_pins>; | |
| 199 | + pinctrl-names = "default"; | |
| 200 | + port { | |
| 201 | + drif0_ep: endpoint { | |
| 202 | + remote-endpoint = <&tuner_ep>; | |
| 203 | + }; | |
| 204 | + }; | |
| 205 | + }; | |
| 206 | + | |
| 207 | + drif01: rif@e6f50000 { | |
| 208 | + compatible = "renesas,r8a7795-drif", | |
| 209 | + "renesas,rcar-gen3-drif"; | |
| 210 | + reg = <0 0xe6f50000 0 0x64>; | |
| 211 | + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; | |
| 212 | + clocks = <&cpg CPG_MOD 514>; | |
| 213 | + clock-names = "fck"; | |
| 214 | + dmas = <&dmac1 0x22>, <&dmac2 0x22>; | |
| 215 | + dma-names = "rx", "rx"; | |
| 216 | + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 217 | + renesas,bonding = <&drif00>; | |
| 218 | + resets = <&cpg 514>; | |
| 219 | + }; | |
| 220 | + }; | |
| 221 | + | |
| 222 | + # Example with internal channel 1 alone enabled. | |
| 223 | + # | |
| 224 | + # When interfacing with a third party tuner device with one data pin as shown | |
| 225 | + # below. | |
| 226 | + # | |
| 227 | + # +---------------------+ +---------------------+ | |
| 228 | + # | |-----SCK------->|CLK | | |
| 229 | + # | Master |-----SS-------->|SYNC DRIFn (slave) | | |
| 230 | + # | | |D0 (unused) | | |
| 231 | + # | |-----SD-------->|D1 | | |
| 232 | + # +---------------------+ +---------------------+ | |
| 233 | + - | | |
| 234 | + #include <dt-bindings/clock/r8a7795-cpg-mssr.h> | |
| 235 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 236 | + #include <dt-bindings/power/r8a7795-sysc.h> | |
| 237 | + | |
| 238 | + soc { | |
| 239 | + #address-cells = <2>; | |
| 240 | + #size-cells = <2>; | |
| 241 | + | |
| 242 | + drif10: rif@e6f60000 { | |
| 243 | + compatible = "renesas,r8a7795-drif", | |
| 244 | + "renesas,rcar-gen3-drif"; | |
| 245 | + reg = <0 0xe6f60000 0 0x64>; | |
| 246 | + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; | |
| 247 | + clocks = <&cpg CPG_MOD 513>; | |
| 248 | + clock-names = "fck"; | |
| 249 | + dmas = <&dmac1 0x24>, <&dmac2 0x24>; | |
| 250 | + dma-names = "rx", "rx"; | |
| 251 | + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 252 | + resets = <&cpg 513>; | |
| 253 | + renesas,bonding = <&drif11>; | |
| 254 | + status = "disabled"; | |
| 255 | + }; | |
| 256 | + | |
| 257 | + drif11: rif@e6f70000 { | |
| 258 | + compatible = "renesas,r8a7795-drif", | |
| 259 | + "renesas,rcar-gen3-drif"; | |
| 260 | + reg = <0 0xe6f70000 0 0x64>; | |
| 261 | + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | |
| 262 | + clocks = <&cpg CPG_MOD 512>; | |
| 263 | + clock-names = "fck"; | |
| 264 | + dmas = <&dmac1 0x26>, <&dmac2 0x26>; | |
| 265 | + dma-names = "rx", "rx"; | |
| 266 | + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; | |
| 267 | + resets = <&cpg 512>; | |
| 268 | + renesas,bonding = <&drif10>; | |
| 269 | + pinctrl-0 = <&drif1_pins>; | |
| 270 | + pinctrl-names = "default"; | |
| 271 | + port { | |
| 272 | + drif1_ep: endpoint { | |
| 273 | + remote-endpoint = <&tuner_ep1>; | |
| 274 | + sync-active = <0>; | |
| 275 | + }; | |
| 276 | + }; | |
| 277 | + }; | |
| 278 | + }; | |
| 279 | +... | |
| @@ -193,23 +193,35 @@ required: · 192 unmodified lines | ||
| 193 | 193 | - interrupts |
| 194 | 194 | - clocks |
| 195 | 195 | - power-domains |
| 196 | − - resets | |
| 197 | − | |
| 198 | −if: | |
| 199 | − properties: | |
| 200 | − compatible: | |
| 201 | − contains: | |
| 202 | − enum: | |
| 203 | − - renesas,vin-r8a7778 | |
| 204 | − - renesas,vin-r8a7779 | |
| 205 | − - renesas,rcar-gen2-vin | |
| 206 | −then: | |
| 207 | − required: | |
| 208 | − - port | |
| 209 | −else: | |
| 210 | − required: | |
| 211 | − - renesas,id | |
| 212 | − - ports | |
| 196 | + | |
| 197 | +allOf: | |
| 198 | + - if: | |
| 199 | + not: | |
| 200 | + properties: | |
| 201 | + compatible: | |
| 202 | + contains: | |
| 203 | + enum: | |
| 204 | + - renesas,vin-r8a7778 | |
| 205 | + - renesas,vin-r8a7779 | |
| 206 | + then: | |
| 207 | + required: | |
| 208 | + - resets | |
| 209 | + | |
| 210 | + - if: | |
| 211 | + properties: | |
| 212 | + compatible: | |
| 213 | + contains: | |
| 214 | + enum: | |
| 215 | + - renesas,vin-r8a7778 | |
| 216 | + - renesas,vin-r8a7779 | |
| 217 | + - renesas,rcar-gen2-vin | |
| 218 | + then: | |
| 219 | + required: | |
| 220 | + - port | |
| 221 | + else: | |
| 222 | + required: | |
| 223 | + - renesas,id | |
| 224 | + - ports | |
| 213 | 225 | |
| 214 | 226 | additionalProperties: false |
| 215 | 227 | |
| @@ -215,130 +215,3 @@ properties: · 214 unmodified lines | ||
| 215 | 215 | CCP2, for instance. |
| 216 | 216 | |
| 217 | 217 | additionalProperties: true |
| 218 | − | |
| 219 | −examples: | |
| 220 | − # The example snippet below describes two data pipelines. ov772x and imx074 | |
| 221 | − # are camera sensors with a parallel and serial (MIPI CSI-2) video bus | |
| 222 | − # respectively. Both sensors are on the I2C control bus corresponding to the | |
| 223 | − # i2c0 controller node. ov772x sensor is linked directly to the ceu0 video | |
| 224 | − # host interface. imx074 is linked to ceu0 through the MIPI CSI-2 receiver | |
| 225 | − # (csi2). ceu0 has a (single) DMA engine writing captured data to memory. | |
| 226 | − # ceu0 node has a single 'port' node which may indicate that at any time | |
| 227 | − # only one of the following data pipelines can be active: | |
| 228 | − # ov772x -> ceu0 or imx074 -> csi2 -> ceu0. | |
| 229 | − - | | |
| 230 | − ceu@fe910000 { | |
| 231 | − compatible = "renesas,sh-mobile-ceu"; | |
| 232 | − reg = <0xfe910000 0xa0>; | |
| 233 | − interrupts = <0x880>; | |
| 234 | − | |
| 235 | − mclk: master_clock { | |
| 236 | − compatible = "renesas,ceu-clock"; | |
| 237 | − #clock-cells = <1>; | |
| 238 | − clock-frequency = <50000000>; /* Max clock frequency */ | |
| 239 | − clock-output-names = "mclk"; | |
| 240 | − }; | |
| 241 | − | |
| 242 | − port { | |
| 243 | − #address-cells = <1>; | |
| 244 | − #size-cells = <0>; | |
| 245 | − | |
| 246 | − /* Parallel bus endpoint */ | |
| 247 | − ceu0_1: endpoint@1 { | |
| 248 | − reg = <1>; /* Local endpoint # */ | |
| 249 | − remote-endpoint = <&ov772x_1_1>; /* Remote phandle */ | |
| 250 | − bus-width = <8>; /* Used data lines */ | |
| 251 | − data-shift = <2>; /* Lines 9:2 are used */ | |
| 252 | − | |
| 253 | − /* If hsync-active/vsync-active are missing, | |
| 254 | − embedded BT.656 sync is used */ | |
| 255 | − hsync-active = <0>; /* Active low */ | |
| 256 | − vsync-active = <0>; /* Active low */ | |
| 257 | − data-active = <1>; /* Active high */ | |
| 258 | − pclk-sample = <1>; /* Rising */ | |
| 259 | − }; | |
| 260 | − | |
| 261 | − /* MIPI CSI-2 bus endpoint */ | |
| 262 | − ceu0_0: endpoint@0 { | |
| 263 | − reg = <0>; | |
| 264 | − remote-endpoint = <&csi2_2>; | |
| 265 | − }; | |
| 266 | − }; | |
| 267 | − }; | |
| 268 | − | |
| 269 | − i2c { | |
| 270 | − #address-cells = <1>; | |
| 271 | − #size-cells = <0>; | |
| 272 | − | |
| 273 | − camera@21 { | |
| 274 | − compatible = "ovti,ov772x"; | |
| 275 | − reg = <0x21>; | |
| 276 | − vddio-supply = <®ulator1>; | |
| 277 | − vddcore-supply = <®ulator2>; | |
| 278 | − | |
| 279 | − clock-frequency = <20000000>; | |
| 280 | − clocks = <&mclk 0>; | |
| 281 | − clock-names = "xclk"; | |
| 282 | − | |
| 283 | − port { | |
| 284 | − /* With 1 endpoint per port no need for addresses. */ | |
| 285 | − ov772x_1_1: endpoint { | |
| 286 | − bus-width = <8>; | |
| 287 | − remote-endpoint = <&ceu0_1>; | |
| 288 | − hsync-active = <1>; | |
| 289 | − vsync-active = <0>; /* Who came up with an | |
| 290 | − inverter here ?... */ | |
| 291 | − data-active = <1>; | |
| 292 | − pclk-sample = <1>; | |
| 293 | − }; | |
| 294 | − }; | |
| 295 | − }; | |
| 296 | − | |
| 297 | − camera@1a { | |
| 298 | − compatible = "sony,imx074"; | |
| 299 | − reg = <0x1a>; | |
| 300 | − vddio-supply = <®ulator1>; | |
| 301 | − vddcore-supply = <®ulator2>; | |
| 302 | − | |
| 303 | − clock-frequency = <30000000>; /* Shared clock with ov772x_1 */ | |
| 304 | − clocks = <&mclk 0>; | |
| 305 | − clock-names = "sysclk"; /* Assuming this is the | |
| 306 | − name in the datasheet */ | |
| 307 | − port { | |
| 308 | − imx074_1: endpoint { | |
| 309 | − clock-lanes = <0>; | |
| 310 | − data-lanes = <1 2>; | |
| 311 | − remote-endpoint = <&csi2_1>; | |
| 312 | − }; | |
| 313 | − }; | |
| 314 | − }; | |
| 315 | − }; | |
| 316 | − | |
| 317 | − csi2: csi2@ffc90000 { | |
| 318 | − compatible = "renesas,sh-mobile-csi2"; | |
| 319 | − reg = <0xffc90000 0x1000>; | |
| 320 | − interrupts = <0x17a0>; | |
| 321 | − #address-cells = <1>; | |
| 322 | − #size-cells = <0>; | |
| 323 | − | |
| 324 | − port@1 { | |
| 325 | − compatible = "renesas,csi2c"; /* One of CSI2I and CSI2C. */ | |
| 326 | − reg = <1>; /* CSI-2 PHY #1 of 2: PHY_S, | |
| 327 | − PHY_M has port address 0, | |
| 328 | − is unused. */ | |
| 329 | − csi2_1: endpoint { | |
| 330 | − clock-lanes = <0>; | |
| 331 | − data-lanes = <2 1>; | |
| 332 | − remote-endpoint = <&imx074_1>; | |
| 333 | − }; | |
| 334 | − }; | |
| 335 | − port@2 { | |
| 336 | − reg = <2>; /* port 2: link to the CEU */ | |
| 337 | − | |
| 338 | − csi2_2: endpoint { | |
| 339 | − remote-endpoint = <&ceu0_0>; | |
| 340 | − }; | |
| 341 | − }; | |
| 342 | − }; | |
| 343 | − | |
| 344 | −... | |
| @@ -1,60 +0,0 @@ | ||
| 1 | −Video Multiplexer | |
| 2 | −================= | |
| 3 | − | |
| 4 | −Video multiplexers allow to select between multiple input ports. Video received | |
| 5 | −on the active input port is passed through to the output port. Muxes described | |
| 6 | −by this binding are controlled by a multiplexer controller that is described by | |
| 7 | −the bindings in Documentation/devicetree/bindings/mux/mux-controller.txt | |
| 8 | − | |
| 9 | −Required properties: | |
| 10 | −- compatible : should be "video-mux" | |
| 11 | −- mux-controls : mux controller node to use for operating the mux | |
| 12 | −- #address-cells: should be <1> | |
| 13 | −- #size-cells: should be <0> | |
| 14 | −- port@*: at least three port nodes containing endpoints connecting to the | |
| 15 | − source and sink devices according to of_graph bindings. The last port is | |
| 16 | − the output port, all others are inputs. | |
| 17 | − | |
| 18 | −Optionally, #address-cells, #size-cells, and port nodes can be grouped under a | |
| 19 | −ports node as described in Documentation/devicetree/bindings/graph.txt. | |
| 20 | − | |
| 21 | −Example: | |
| 22 | − | |
| 23 | − mux: mux-controller { | |
| 24 | − compatible = "gpio-mux"; | |
| 25 | − #mux-control-cells = <0>; | |
| 26 | − | |
| 27 | − mux-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; | |
| 28 | − }; | |
| 29 | − | |
| 30 | − video-mux { | |
| 31 | − compatible = "video-mux"; | |
| 32 | − mux-controls = <&mux>; | |
| 33 | − #address-cells = <1>; | |
| 34 | − #size-cells = <0>; | |
| 35 | − | |
| 36 | − port@0 { | |
| 37 | − reg = <0>; | |
| 38 | − | |
| 39 | − mux_in0: endpoint { | |
| 40 | − remote-endpoint = <&video_source0_out>; | |
| 41 | − }; | |
| 42 | − }; | |
| 43 | − | |
| 44 | − port@1 { | |
| 45 | − reg = <1>; | |
| 46 | − | |
| 47 | − mux_in1: endpoint { | |
| 48 | − remote-endpoint = <&video_source1_out>; | |
| 49 | − }; | |
| 50 | − }; | |
| 51 | − | |
| 52 | − port@2 { | |
| 53 | − reg = <2>; | |
| 54 | − | |
| 55 | − mux_out: endpoint { | |
| 56 | − remote-endpoint = <&capture_interface_in>; | |
| 57 | − }; | |
| 58 | − }; | |
| 59 | − }; | |
| 60 | −}; | |
| @@ -0,0 +1,106 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/media/video-mux.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Video Multiplexer | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Sakari Ailus <sakari.ailus@linux.intel.com> | |
| 11 | + - Laurent Pinchart <laurent.pinchart@ideasonboard.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Video multiplexers allow to select between multiple input ports. Video | |
| 15 | + received on the active input port is passed through to the output port. Muxes | |
| 16 | + described by this binding are controlled by a multiplexer controller. | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: video-mux | |
| 21 | + | |
| 22 | + mux-controls: | |
| 23 | + maxItems: 1 | |
| 24 | + | |
| 25 | + '#address-cells': | |
| 26 | + const: 1 | |
| 27 | + | |
| 28 | + '#size-cells': | |
| 29 | + const: 0 | |
| 30 | + | |
| 31 | + ports: | |
| 32 | + $ref: /schemas/graph.yaml#/properties/ports | |
| 33 | + | |
| 34 | + patternProperties: | |
| 35 | + '^port@': | |
| 36 | + $ref: /schemas/graph.yaml#/properties/port | |
| 37 | + | |
| 38 | + required: | |
| 39 | + - port@0 | |
| 40 | + - port@1 | |
| 41 | + - port@2 | |
| 42 | + | |
| 43 | +patternProperties: | |
| 44 | + '^port@': | |
| 45 | + $ref: /schemas/graph.yaml#/properties/port | |
| 46 | + description: | |
| 47 | + At least three port nodes containing endpoints connecting to the source | |
| 48 | + and sink devices according to of_graph bindings. The last port is the | |
| 49 | + output port, all others are inputs. | |
| 50 | + | |
| 51 | +required: | |
| 52 | + - compatible | |
| 53 | + - mux-controls | |
| 54 | + | |
| 55 | +oneOf: | |
| 56 | + - required: | |
| 57 | + - ports | |
| 58 | + - required: | |
| 59 | + - port@0 | |
| 60 | + - port@1 | |
| 61 | + - port@2 | |
| 62 | + | |
| 63 | +additionalProperties: false | |
| 64 | + | |
| 65 | +examples: | |
| 66 | + - | | |
| 67 | + #include <dt-bindings/gpio/gpio.h> | |
| 68 | + | |
| 69 | + mux: mux-controller { | |
| 70 | + compatible = "gpio-mux"; | |
| 71 | + #mux-control-cells = <0>; | |
| 72 | + | |
| 73 | + mux-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; | |
| 74 | + }; | |
| 75 | + | |
| 76 | + video-mux { | |
| 77 | + compatible = "video-mux"; | |
| 78 | + mux-controls = <&mux>; | |
| 79 | + #address-cells = <1>; | |
| 80 | + #size-cells = <0>; | |
| 81 | + | |
| 82 | + port@0 { | |
| 83 | + reg = <0>; | |
| 84 | + | |
| 85 | + mux_in0: endpoint { | |
| 86 | + remote-endpoint = <&video_source0_out>; | |
| 87 | + }; | |
| 88 | + }; | |
| 89 | + | |
| 90 | + port@1 { | |
| 91 | + reg = <1>; | |
| 92 | + | |
| 93 | + mux_in1: endpoint { | |
| 94 | + remote-endpoint = <&video_source1_out>; | |
| 95 | + }; | |
| 96 | + }; | |
| 97 | + | |
| 98 | + port@2 { | |
| 99 | + reg = <2>; | |
| 100 | + | |
| 101 | + mux_out: endpoint { | |
| 102 | + remote-endpoint = <&capture_interface_in>; | |
| 103 | + }; | |
| 104 | + }; | |
| 105 | + }; | |
| 106 | +... | |
| @@ -1,14 +0,0 @@ | ||
| 1 | −IR Decoder (IRDEC) on ZTE ZX family SoCs | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | − - compatible: Should be "zte,zx296718-irdec". | |
| 5 | − - reg: Physical base address and length of IRDEC registers. | |
| 6 | − - interrupts: Interrupt number of IRDEC. | |
| 7 | − | |
| 8 | −Exmaples: | |
| 9 | − | |
| 10 | − irdec: ir-decoder@111000 { | |
| 11 | − compatible = "zte,zx296718-irdec"; | |
| 12 | − reg = <0x111000 0x1000>; | |
| 13 | − interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; | |
| 14 | − }; | |
| @@ -37,9 +37,10 @@ properties: · 36 unmodified lines | ||
| 37 | 37 | description: |
| 38 | 38 | phandle of the memory controller node |
| 39 | 39 | |
| 40 | − core-supply: | |
| 40 | + power-domains: | |
| 41 | + maxItems: 1 | |
| 41 | 42 | description: |
| 42 | − Phandle of voltage regulator of the SoC "core" power domain. | |
| 43 | + Phandle of the SoC "core" power domain. | |
| 43 | 44 | |
| 44 | 45 | operating-points-v2: |
| 45 | 46 | description: |
| @@ -370,7 +371,7 @@ examples: · 324 unmodified lines | ||
| 370 | 371 | |
| 371 | 372 | nvidia,memory-controller = <&mc>; |
| 372 | 373 | operating-points-v2 = <&dvfs_opp_table>; |
| 373 | − core-supply = <&vdd_core>; | |
| 374 | + power-domains = <&domain>; | |
| 374 | 375 | |
| 375 | 376 | #interconnect-cells = <0>; |
| 376 | 377 | |
| @@ -23,7 +23,7 @@ For each opp entry in 'operating-points-v2' table: · 22 unmodified lines | ||
| 23 | 23 | matches, the OPP gets enabled. |
| 24 | 24 | |
| 25 | 25 | Optional properties: |
| 26 | −- core-supply: Phandle of voltage regulator of the SoC "core" power domain. | |
| 26 | +- power-domains: Phandle of the SoC "core" power domain. | |
| 27 | 27 | |
| 28 | 28 | Child device nodes describe the memory settings for different configurations and clock rates. |
| 29 | 29 | |
| @@ -48,7 +48,7 @@ Example: · 18 unmodified lines | ||
| 48 | 48 | interrupts = <0 78 0x04>; |
| 49 | 49 | clocks = <&tegra_car TEGRA20_CLK_EMC>; |
| 50 | 50 | nvidia,memory-controller = <&mc>; |
| 51 | − core-supply = <&core_vdd_reg>; | |
| 51 | + power-domains = <&domain>; | |
| 52 | 52 | operating-points-v2 = <&opp_table>; |
| 53 | 53 | } |
| 54 | 54 | |
| @@ -1,40 +0,0 @@ | ||
| 1 | −NVIDIA Tegra20 MC(Memory Controller) | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible : "nvidia,tegra20-mc-gart" | |
| 5 | −- reg : Should contain 2 register ranges: physical base address and length of | |
| 6 | − the controller's registers and the GART aperture respectively. | |
| 7 | −- clocks: Must contain an entry for each entry in clock-names. | |
| 8 | − See ../clocks/clock-bindings.txt for details. | |
| 9 | −- clock-names: Must include the following entries: | |
| 10 | − - mc: the module's clock input | |
| 11 | −- interrupts : Should contain MC General interrupt. | |
| 12 | −- #reset-cells : Should be 1. This cell represents memory client module ID. | |
| 13 | − The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h> | |
| 14 | − or in the TRM documentation. | |
| 15 | −- #iommu-cells: Should be 0. This cell represents the number of cells in an | |
| 16 | − IOMMU specifier needed to encode an address. GART supports only a single | |
| 17 | − address space that is shared by all devices, therefore no additional | |
| 18 | − information needed for the address encoding. | |
| 19 | −- #interconnect-cells : Should be 1. This cell represents memory client. | |
| 20 | − The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>. | |
| 21 | − | |
| 22 | −Example: | |
| 23 | − mc: memory-controller@7000f000 { | |
| 24 | − compatible = "nvidia,tegra20-mc-gart"; | |
| 25 | − reg = <0x7000f000 0x400 /* controller registers */ | |
| 26 | − 0x58000000 0x02000000>; /* GART aperture */ | |
| 27 | − clocks = <&tegra_car TEGRA20_CLK_MC>; | |
| 28 | − clock-names = "mc"; | |
| 29 | − interrupts = <GIC_SPI 77 0x04>; | |
| 30 | − #reset-cells = <1>; | |
| 31 | − #iommu-cells = <0>; | |
| 32 | − #interconnect-cells = <1>; | |
| 33 | − }; | |
| 34 | − | |
| 35 | − video-codec@6001a000 { | |
| 36 | − compatible = "nvidia,tegra20-vde"; | |
| 37 | − ... | |
| 38 | − resets = <&mc TEGRA20_MC_RESET_VDE>; | |
| 39 | − iommus = <&mc>; | |
| 40 | − }; | |
| @@ -0,0 +1,79 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-mc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NVIDIA Tegra20 SoC Memory Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Dmitry Osipenko <digetx@gmail.com> | |
| 11 | + - Jon Hunter <jonathanh@nvidia.com> | |
| 12 | + - Thierry Reding <thierry.reding@gmail.com> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + The Tegra20 Memory Controller merges request streams from various client | |
| 16 | + interfaces into request stream(s) for the various memory target devices, | |
| 17 | + and returns response data to the various clients. The Memory Controller | |
| 18 | + has a configurable arbitration algorithm to allow the user to fine-tune | |
| 19 | + performance among the various clients. | |
| 20 | + | |
| 21 | + Tegra20 Memory Controller includes the GART (Graphics Address Relocation | |
| 22 | + Table) which allows Memory Controller to provide a linear view of a | |
| 23 | + fragmented memory pages. | |
| 24 | + | |
| 25 | +properties: | |
| 26 | + compatible: | |
| 27 | + const: nvidia,tegra20-mc-gart | |
| 28 | + | |
| 29 | + reg: | |
| 30 | + items: | |
| 31 | + - description: controller registers | |
| 32 | + - description: GART registers | |
| 33 | + | |
| 34 | + clocks: | |
| 35 | + maxItems: 1 | |
| 36 | + | |
| 37 | + clock-names: | |
| 38 | + items: | |
| 39 | + - const: mc | |
| 40 | + | |
| 41 | + interrupts: | |
| 42 | + maxItems: 1 | |
| 43 | + | |
| 44 | + "#reset-cells": | |
| 45 | + const: 1 | |
| 46 | + | |
| 47 | + "#iommu-cells": | |
| 48 | + const: 0 | |
| 49 | + | |
| 50 | + "#interconnect-cells": | |
| 51 | + const: 1 | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - compatible | |
| 55 | + - reg | |
| 56 | + - interrupts | |
| 57 | + - clocks | |
| 58 | + - clock-names | |
| 59 | + - "#reset-cells" | |
| 60 | + - "#iommu-cells" | |
| 61 | + - "#interconnect-cells" | |
| 62 | + | |
| 63 | +additionalProperties: false | |
| 64 | + | |
| 65 | +examples: | |
| 66 | + - | | |
| 67 | + memory-controller@7000f000 { | |
| 68 | + compatible = "nvidia,tegra20-mc-gart"; | |
| 69 | + reg = <0x7000f000 0x400>, /* Controller registers */ | |
| 70 | + <0x58000000 0x02000000>; /* GART aperture */ | |
| 71 | + clocks = <&clock_controller 32>; | |
| 72 | + clock-names = "mc"; | |
| 73 | + | |
| 74 | + interrupts = <0 77 4>; | |
| 75 | + | |
| 76 | + #iommu-cells = <0>; | |
| 77 | + #reset-cells = <1>; | |
| 78 | + #interconnect-cells = <1>; | |
| 79 | + }; | |
| @@ -34,7 +34,7 @@ properties: · 33 unmodified lines | ||
| 34 | 34 | - description: EMC general interrupt |
| 35 | 35 | |
| 36 | 36 | memory-region: |
| 37 | − $ref: /schemas/types.yaml#/definitions/phandle | |
| 37 | + maxItems: 1 | |
| 38 | 38 | description: |
| 39 | 39 | phandle to a reserved memory region describing the table of EMC |
| 40 | 40 | frequencies trained by the firmware |
| @@ -39,9 +39,10 @@ properties: · 38 unmodified lines | ||
| 39 | 39 | description: |
| 40 | 40 | Phandle of the Memory Controller node. |
| 41 | 41 | |
| 42 | − core-supply: | |
| 42 | + power-domains: | |
| 43 | + maxItems: 1 | |
| 43 | 44 | description: |
| 44 | − Phandle of voltage regulator of the SoC "core" power domain. | |
| 45 | + Phandle of the SoC "core" power domain. | |
| 45 | 46 | |
| 46 | 47 | operating-points-v2: |
| 47 | 48 | description: |
| @@ -241,7 +242,7 @@ examples: · 193 unmodified lines | ||
| 241 | 242 | |
| 242 | 243 | nvidia,memory-controller = <&mc>; |
| 243 | 244 | operating-points-v2 = <&dvfs_opp_table>; |
| 244 | − core-supply = <&vdd_core>; | |
| 245 | + power-domains = <&domain>; | |
| 245 | 246 | |
| 246 | 247 | #interconnect-cells = <0>; |
| 247 | 248 | |
| @@ -0,0 +1,183 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/actions,atc260x.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Actions Semi ATC260x Power Management IC bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | |
| 11 | + - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> | |
| 12 | + | |
| 13 | +description: | | |
| 14 | + ATC260x series PMICs integrates Audio Codec, Power Management, RTC, IR | |
| 15 | + and GPIO controller blocks. Currently only the PM related functionalities | |
| 16 | + (i.e. regulators and system power-off/reboot) for the ATC2603C and ATC2609A | |
| 17 | + chip variants are supported. | |
| 18 | + ATC2603C includes 3 programmable DC-DC converters, 9 programmable LDO | |
| 19 | + regulators and 1 fixed LDO regulator. | |
| 20 | + ATC2609A includes 5 programmable DC-DC converters and 10 programmable LDO | |
| 21 | + regulators. | |
| 22 | + | |
| 23 | +allOf: | |
| 24 | + - $ref: ../input/input.yaml | |
| 25 | + | |
| 26 | +properties: | |
| 27 | + compatible: | |
| 28 | + enum: | |
| 29 | + - actions,atc2603c | |
| 30 | + - actions,atc2609a | |
| 31 | + | |
| 32 | + reg: | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + interrupts: | |
| 36 | + maxItems: 1 | |
| 37 | + | |
| 38 | + reset-time-sec: | |
| 39 | + description: | | |
| 40 | + Duration in seconds which the key should be kept pressed for device | |
| 41 | + to reset automatically. The hardware default is 8. Use 0 to disable | |
| 42 | + this functionality. | |
| 43 | + enum: [0, 6, 8, 10, 12] | |
| 44 | + | |
| 45 | + regulators: | |
| 46 | + type: object | |
| 47 | + description: | | |
| 48 | + List of child nodes specifying the regulators, depending on chip variant: | |
| 49 | + * ATC2603C: dcdc[1-3], ldo[1-3,5-8,11,12], switchldo1 | |
| 50 | + * ATC2609A: dcdc[0-4], ldo[0-9] | |
| 51 | + | |
| 52 | + properties: | |
| 53 | + compatible: | |
| 54 | + enum: | |
| 55 | + - actions,atc2603c-regulator | |
| 56 | + - actions,atc2609a-regulator | |
| 57 | + | |
| 58 | + switchldo1: | |
| 59 | + type: object | |
| 60 | + $ref: ../regulator/regulator.yaml | |
| 61 | + | |
| 62 | + properties: | |
| 63 | + regulator-name: true | |
| 64 | + regulator-boot-on: true | |
| 65 | + regulator-always-on: true | |
| 66 | + regulator-min-microvolt: true | |
| 67 | + regulator-max-microvolt: true | |
| 68 | + regulator-allow-bypass: true | |
| 69 | + regulator-active-discharge: true | |
| 70 | + | |
| 71 | + additionalProperties: false | |
| 72 | + | |
| 73 | + patternProperties: | |
| 74 | + "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2]|switchldo1)-supply$": | |
| 75 | + description: ATC260x voltage regulators supplies | |
| 76 | + | |
| 77 | + "^(dcdc[0-4]|ldo[0-9]|ldo1[1-2])$": | |
| 78 | + type: object | |
| 79 | + $ref: ../regulator/regulator.yaml | |
| 80 | + | |
| 81 | + properties: | |
| 82 | + regulator-name: true | |
| 83 | + regulator-boot-on: true | |
| 84 | + regulator-always-on: true | |
| 85 | + regulator-min-microvolt: true | |
| 86 | + regulator-max-microvolt: true | |
| 87 | + regulator-allow-bypass: true | |
| 88 | + | |
| 89 | + additionalProperties: false | |
| 90 | + | |
| 91 | + allOf: | |
| 92 | + - if: | |
| 93 | + properties: | |
| 94 | + compatible: | |
| 95 | + contains: | |
| 96 | + const: actions,atc2603c-regulator | |
| 97 | + then: | |
| 98 | + patternProperties: | |
| 99 | + "^(dcdc[0,4]|ldo[0,4,9])(-supply)?$": false | |
| 100 | + | |
| 101 | + "^(ldo|dcdc)": | |
| 102 | + properties: | |
| 103 | + regulator-allow-bypass: false | |
| 104 | + - if: | |
| 105 | + properties: | |
| 106 | + compatible: | |
| 107 | + contains: | |
| 108 | + const: actions,atc2609a-regulator | |
| 109 | + then: | |
| 110 | + patternProperties: | |
| 111 | + "^(ldo1[1-2]|switchldo1)(-supply)?$": false | |
| 112 | + | |
| 113 | + "^(dcdc|ldo[3-9])": | |
| 114 | + properties: | |
| 115 | + regulator-allow-bypass: false | |
| 116 | + | |
| 117 | + required: | |
| 118 | + - compatible | |
| 119 | + | |
| 120 | + additionalProperties: false | |
| 121 | + | |
| 122 | +additionalProperties: false | |
| 123 | + | |
| 124 | +required: | |
| 125 | + - compatible | |
| 126 | + - reg | |
| 127 | + - interrupts | |
| 128 | + | |
| 129 | +examples: | |
| 130 | + - | | |
| 131 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 132 | + i2c0 { | |
| 133 | + #address-cells = <1>; | |
| 134 | + #size-cells = <0>; | |
| 135 | + | |
| 136 | + pmic@65 { | |
| 137 | + compatible = "actions,atc2603c"; | |
| 138 | + reg = <0x65>; | |
| 139 | + interrupt-parent = <&sirq>; | |
| 140 | + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; | |
| 141 | + | |
| 142 | + reset-time-sec = <6>; | |
| 143 | + | |
| 144 | + regulators { | |
| 145 | + compatible = "actions,atc2603c-regulator"; | |
| 146 | + | |
| 147 | + dcdc1-supply = <®_5v0>; | |
| 148 | + dcdc3-supply = <®_5v0>; | |
| 149 | + ldo5-supply = <®_5v0>; | |
| 150 | + switchldo1-supply = <&vcc>; | |
| 151 | + | |
| 152 | + vdd_cpu: dcdc1 { | |
| 153 | + regulator-name = "VDD_CPU"; | |
| 154 | + regulator-min-microvolt = <700000>; | |
| 155 | + regulator-max-microvolt = <1400000>; | |
| 156 | + regulator-always-on; | |
| 157 | + }; | |
| 158 | + | |
| 159 | + vcc: dcdc3 { | |
| 160 | + regulator-name = "VCC"; | |
| 161 | + regulator-min-microvolt = <2600000>; | |
| 162 | + regulator-max-microvolt = <3300000>; | |
| 163 | + regulator-always-on; | |
| 164 | + }; | |
| 165 | + | |
| 166 | + vcc_3v1: ldo5 { | |
| 167 | + regulator-name = "VCC_3V1"; | |
| 168 | + regulator-min-microvolt = <2600000>; | |
| 169 | + regulator-max-microvolt = <3300000>; | |
| 170 | + }; | |
| 171 | + | |
| 172 | + sd_vcc: switchldo1 { | |
| 173 | + regulator-name = "SD_VCC"; | |
| 174 | + regulator-min-microvolt = <3000000>; | |
| 175 | + regulator-max-microvolt = <3300000>; | |
| 176 | + regulator-always-on; | |
| 177 | + regulator-boot-on; | |
| 178 | + }; | |
| 179 | + }; | |
| 180 | + }; | |
| 181 | + }; | |
| 182 | + | |
| 183 | +... | |
| @@ -9,13 +9,7 @@ primary use case of the Aspeed LPC controller is as a slave on the bus · 8 unmodified lines | ||
| 9 | 9 | conditions it can also take the role of bus master. |
| 10 | 10 | |
| 11 | 11 | The LPC controller is represented as a multi-function device to account for the |
| 12 | −mix of functionality it provides. The principle split is between the register | |
| 13 | −layout at the start of the I/O space which is, to quote the Aspeed datasheet, | |
| 14 | −"basically compatible with the [LPC registers from the] popular BMC controller | |
| 15 | −H8S/2168[1]", and everything else, where everything else is an eclectic | |
| 16 | −collection of functions with a esoteric register layout. "Everything else", | |
| 17 | −here labeled the "host" portion of the controller, includes, but is not limited | |
| 18 | −to: | |
| 12 | +mix of functionality, which includes, but is not limited to: | |
| 19 | 13 | |
| 20 | 14 | * An IPMI Block Transfer[2] Controller |
| 21 | 15 | |
| @@ -44,80 +38,36 @@ Required properties · 22 unmodified lines | ||
| 44 | 38 | =================== |
| 45 | 39 | |
| 46 | 40 | - compatible: One of: |
| 47 | − "aspeed,ast2400-lpc", "simple-mfd" | |
| 48 | − "aspeed,ast2500-lpc", "simple-mfd" | |
| 49 | − "aspeed,ast2600-lpc", "simple-mfd" | |
| 41 | + "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon" | |
| 42 | + "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon" | |
| 43 | + "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon" | |
| 50 | 44 | |
| 51 | 45 | - reg: contains the physical address and length values of the Aspeed |
| 52 | 46 | LPC memory region. |
| 53 | 47 | |
| 54 | 48 | - #address-cells: <1> |
| 55 | 49 | - #size-cells: <1> |
| 56 | −- ranges: Maps 0 to the physical address and length of the LPC memory | |
| 57 | − region | |
| 58 | − | |
| 59 | −Required LPC Child nodes | |
| 60 | −======================== | |
| 61 | − | |
| 62 | −BMC Node | |
| 63 | −-------- | |
| 64 | − | |
| 65 | −- compatible: One of: | |
| 66 | − "aspeed,ast2400-lpc-bmc" | |
| 67 | − "aspeed,ast2500-lpc-bmc" | |
| 68 | − "aspeed,ast2600-lpc-bmc" | |
| 69 | − | |
| 70 | −- reg: contains the physical address and length values of the | |
| 71 | − H8S/2168-compatible LPC controller memory region | |
| 72 | − | |
| 73 | −Host Node | |
| 74 | −--------- | |
| 75 | − | |
| 76 | −- compatible: One of: | |
| 77 | − "aspeed,ast2400-lpc-host", "simple-mfd", "syscon" | |
| 78 | − "aspeed,ast2500-lpc-host", "simple-mfd", "syscon" | |
| 79 | − "aspeed,ast2600-lpc-host", "simple-mfd", "syscon" | |
| 80 | − | |
| 81 | −- reg: contains the address and length values of the host-related | |
| 82 | − register space for the Aspeed LPC controller | |
| 83 | − | |
| 84 | −- #address-cells: <1> | |
| 85 | −- #size-cells: <1> | |
| 86 | −- ranges: Maps 0 to the address and length of the host-related LPC memory | |
| 50 | +- ranges: Maps 0 to the physical address and length of the LPC memory | |
| 87 | 51 | region |
| 88 | 52 | |
| 89 | 53 | Example: |
| 90 | 54 | |
| 91 | 55 | lpc: lpc@1e789000 { |
| 92 | − compatible = "aspeed,ast2500-lpc", "simple-mfd"; | |
| 56 | + compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon"; | |
| 93 | 57 | reg = <0x1e789000 0x1000>; |
| 94 | 58 | |
| 95 | 59 | #address-cells = <1>; |
| 96 | 60 | #size-cells = <1>; |
| 97 | 61 | ranges = <0x0 0x1e789000 0x1000>; |
| 98 | 62 | |
| 99 | − lpc_bmc: lpc-bmc@0 { | |
| 100 | − compatible = "aspeed,ast2500-lpc-bmc"; | |
| 63 | + lpc_snoop: lpc-snoop@0 { | |
| 64 | + compatible = "aspeed,ast2600-lpc-snoop"; | |
| 101 | 65 | reg = <0x0 0x80>; |
| 102 | − }; | |
| 103 | − | |
| 104 | − lpc_host: lpc-host@80 { | |
| 105 | − compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; | |
| 106 | − reg = <0x80 0x1e0>; | |
| 107 | − reg-io-width = <4>; | |
| 108 | − | |
| 109 | − #address-cells = <1>; | |
| 110 | − #size-cells = <1>; | |
| 111 | − ranges = <0x0 0x80 0x1e0>; | |
| 66 | + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; | |
| 67 | + snoop-ports = <0x80>; | |
| 112 | 68 | }; |
| 113 | 69 | }; |
| 114 | 70 | |
| 115 | −BMC Node Children | |
| 116 | −================== | |
| 117 | − | |
| 118 | − | |
| 119 | −Host Node Children | |
| 120 | −================== | |
| 121 | 71 | |
| 122 | 72 | LPC Host Interface Controller |
| 123 | 73 | ------------------- |
| @@ -149,14 +99,12 @@ Optional properties: · 25 unmodified lines | ||
| 149 | 99 | |
| 150 | 100 | Example: |
| 151 | 101 | |
| 152 | −lpc-host@80 { | |
| 153 | − lpc_ctrl: lpc-ctrl@0 { | |
| 154 | − compatible = "aspeed,ast2500-lpc-ctrl"; | |
| 155 | − reg = <0x0 0x80>; | |
| 156 | − clocks = <&syscon ASPEED_CLK_GATE_LCLK>; | |
| 157 | − memory-region = <&flash_memory>; | |
| 158 | − flash = <&spi>; | |
| 159 | − }; | |
| 102 | +lpc_ctrl: lpc-ctrl@80 { | |
| 103 | + compatible = "aspeed,ast2500-lpc-ctrl"; | |
| 104 | + reg = <0x80 0x80>; | |
| 105 | + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; | |
| 106 | + memory-region = <&flash_memory>; | |
| 107 | + flash = <&spi>; | |
| 160 | 108 | }; |
| 161 | 109 | |
| 162 | 110 | LPC Host Controller |
| @@ -179,9 +127,9 @@ Required properties: · 16 unmodified lines | ||
| 179 | 127 | |
| 180 | 128 | Example: |
| 181 | 129 | |
| 182 | −lhc: lhc@20 { | |
| 130 | +lhc: lhc@a0 { | |
| 183 | 131 | compatible = "aspeed,ast2500-lhc"; |
| 184 | − reg = <0x20 0x24 0x48 0x8>; | |
| 132 | + reg = <0xa0 0x24 0xc8 0x8>; | |
| 185 | 133 | }; |
| 186 | 134 | |
| 187 | 135 | LPC reset control |
| @@ -192,16 +140,18 @@ state of the LPC bus. Some systems may chose to modify this configuration. · 4 unmodified lines | ||
| 192 | 140 | |
| 193 | 141 | Required properties: |
| 194 | 142 | |
| 195 | − - compatible: "aspeed,ast2600-lpc-reset" or | |
| 196 | − "aspeed,ast2500-lpc-reset" | |
| 197 | − "aspeed,ast2400-lpc-reset" | |
| 143 | + - compatible: One of: | |
| 144 | + "aspeed,ast2600-lpc-reset"; | |
| 145 | + "aspeed,ast2500-lpc-reset"; | |
| 146 | + "aspeed,ast2400-lpc-reset"; | |
| 147 | + | |
| 198 | 148 | - reg: offset and length of the IP in the LHC memory region |
| 199 | 149 | - #reset-controller indicates the number of reset cells expected |
| 200 | 150 | |
| 201 | 151 | Example: |
| 202 | 152 | |
| 203 | −lpc_reset: reset-controller@18 { | |
| 153 | +lpc_reset: reset-controller@98 { | |
| 204 | 154 | compatible = "aspeed,ast2500-lpc-reset"; |
| 205 | − reg = <0x18 0x4>; | |
| 155 | + reg = <0x98 0x4>; | |
| 206 | 156 | #reset-cells = <1>; |
| 207 | 157 | }; |
| @@ -0,0 +1,177 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6318 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM6318 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm6318-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm6318-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@10000080 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm6318-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0x10000080 0x80>; | |
| 69 | + ranges = <0 0x10000080 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm6318-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 50>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@10 { | |
| 82 | + compatible = "brcm,bcm6318-pinctrl"; | |
| 83 | + reg = <0x18 0x10>, <0x54 0x18>; | |
| 84 | + | |
| 85 | + pinctrl_ephy0_spd_led: ephy0_spd_led-pins { | |
| 86 | + function = "ephy0_spd_led"; | |
| 87 | + pins = "gpio0"; | |
| 88 | + }; | |
| 89 | + | |
| 90 | + pinctrl_ephy1_spd_led: ephy1_spd_led-pins { | |
| 91 | + function = "ephy1_spd_led"; | |
| 92 | + pins = "gpio1"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + pinctrl_ephy2_spd_led: ephy2_spd_led-pins { | |
| 96 | + function = "ephy2_spd_led"; | |
| 97 | + pins = "gpio2"; | |
| 98 | + }; | |
| 99 | + | |
| 100 | + pinctrl_ephy3_spd_led: ephy3_spd_led-pins { | |
| 101 | + function = "ephy3_spd_led"; | |
| 102 | + pins = "gpio3"; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + pinctrl_ephy0_act_led: ephy0_act_led-pins { | |
| 106 | + function = "ephy0_act_led"; | |
| 107 | + pins = "gpio4"; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + pinctrl_ephy1_act_led: ephy1_act_led-pins { | |
| 111 | + function = "ephy1_act_led"; | |
| 112 | + pins = "gpio5"; | |
| 113 | + }; | |
| 114 | + | |
| 115 | + pinctrl_ephy2_act_led: ephy2_act_led-pins { | |
| 116 | + function = "ephy2_act_led"; | |
| 117 | + pins = "gpio6"; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + pinctrl_ephy3_act_led: ephy3_act_led-pins { | |
| 121 | + function = "ephy3_act_led"; | |
| 122 | + pins = "gpio7"; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + pinctrl_serial_led: serial_led-pins { | |
| 126 | + pinctrl_serial_led_data: serial_led_data-pins { | |
| 127 | + function = "serial_led_data"; | |
| 128 | + pins = "gpio6"; | |
| 129 | + }; | |
| 130 | + | |
| 131 | + pinctrl_serial_led_clk: serial_led_clk-pins { | |
| 132 | + function = "serial_led_clk"; | |
| 133 | + pins = "gpio7"; | |
| 134 | + }; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + pinctrl_inet_act_led: inet_act_led-pins { | |
| 138 | + function = "inet_act_led"; | |
| 139 | + pins = "gpio8"; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + pinctrl_inet_fail_led: inet_fail_led-pins { | |
| 143 | + function = "inet_fail_led"; | |
| 144 | + pins = "gpio9"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + pinctrl_dsl_led: dsl_led-pins { | |
| 148 | + function = "dsl_led"; | |
| 149 | + pins = "gpio10"; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + pinctrl_post_fail_led: post_fail_led-pins { | |
| 153 | + function = "post_fail_led"; | |
| 154 | + pins = "gpio11"; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + pinctrl_wlan_wps_led: wlan_wps_led-pins { | |
| 158 | + function = "wlan_wps_led"; | |
| 159 | + pins = "gpio12"; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + pinctrl_usb_pwron: usb_pwron-pins { | |
| 163 | + function = "usb_pwron"; | |
| 164 | + pins = "gpio13"; | |
| 165 | + }; | |
| 166 | + | |
| 167 | + pinctrl_usb_device_led: usb_device_led-pins { | |
| 168 | + function = "usb_device_led"; | |
| 169 | + pins = "gpio13"; | |
| 170 | + }; | |
| 171 | + | |
| 172 | + pinctrl_usb_active: usb_active-pins { | |
| 173 | + function = "usb_active"; | |
| 174 | + pins = "gpio40"; | |
| 175 | + }; | |
| 176 | + }; | |
| 177 | + }; | |
| @@ -0,0 +1,194 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM63268 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm63268-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm63268-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@100000c0 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm63268-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0x100000c0 0x80>; | |
| 69 | + ranges = <0 0x100000c0 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm63268-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 52>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@10 { | |
| 82 | + compatible = "brcm,bcm63268-pinctrl"; | |
| 83 | + reg = <0x10 0x4>, <0x18 0x8>, <0x38 0x4>; | |
| 84 | + | |
| 85 | + pinctrl_serial_led: serial_led-pins { | |
| 86 | + pinctrl_serial_led_clk: serial_led_clk-pins { | |
| 87 | + function = "serial_led_clk"; | |
| 88 | + pins = "gpio0"; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + pinctrl_serial_led_data: serial_led_data-pins { | |
| 92 | + function = "serial_led_data"; | |
| 93 | + pins = "gpio1"; | |
| 94 | + }; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + pinctrl_hsspi_cs4: hsspi_cs4-pins { | |
| 98 | + function = "hsspi_cs4"; | |
| 99 | + pins = "gpio16"; | |
| 100 | + }; | |
| 101 | + | |
| 102 | + pinctrl_hsspi_cs5: hsspi_cs5-pins { | |
| 103 | + function = "hsspi_cs5"; | |
| 104 | + pins = "gpio17"; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + pinctrl_hsspi_cs6: hsspi_cs6-pins { | |
| 108 | + function = "hsspi_cs6"; | |
| 109 | + pins = "gpio8"; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + pinctrl_hsspi_cs7: hsspi_cs7-pins { | |
| 113 | + function = "hsspi_cs7"; | |
| 114 | + pins = "gpio9"; | |
| 115 | + }; | |
| 116 | + | |
| 117 | + pinctrl_adsl_spi: adsl_spi-pins { | |
| 118 | + pinctrl_adsl_spi_miso: adsl_spi_miso-pins { | |
| 119 | + function = "adsl_spi_miso"; | |
| 120 | + pins = "gpio18"; | |
| 121 | + }; | |
| 122 | + | |
| 123 | + pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { | |
| 124 | + function = "adsl_spi_mosi"; | |
| 125 | + pins = "gpio19"; | |
| 126 | + }; | |
| 127 | + }; | |
| 128 | + | |
| 129 | + pinctrl_vreq_clk: vreq_clk-pins { | |
| 130 | + function = "vreq_clk"; | |
| 131 | + pins = "gpio22"; | |
| 132 | + }; | |
| 133 | + | |
| 134 | + pinctrl_pcie_clkreq_b: pcie_clkreq_b-pins { | |
| 135 | + function = "pcie_clkreq_b"; | |
| 136 | + pins = "gpio23"; | |
| 137 | + }; | |
| 138 | + | |
| 139 | + pinctrl_robosw_led_clk: robosw_led_clk-pins { | |
| 140 | + function = "robosw_led_clk"; | |
| 141 | + pins = "gpio30"; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + pinctrl_robosw_led_data: robosw_led_data-pins { | |
| 145 | + function = "robosw_led_data"; | |
| 146 | + pins = "gpio31"; | |
| 147 | + }; | |
| 148 | + | |
| 149 | + pinctrl_nand: nand-pins { | |
| 150 | + function = "nand"; | |
| 151 | + group = "nand_grp"; | |
| 152 | + }; | |
| 153 | + | |
| 154 | + pinctrl_gpio35_alt: gpio35_alt-pins { | |
| 155 | + function = "gpio35_alt"; | |
| 156 | + pin = "gpio35"; | |
| 157 | + }; | |
| 158 | + | |
| 159 | + pinctrl_dectpd: dectpd-pins { | |
| 160 | + function = "dectpd"; | |
| 161 | + group = "dectpd_grp"; | |
| 162 | + }; | |
| 163 | + | |
| 164 | + pinctrl_vdsl_phy_override_0: vdsl_phy_override_0-pins { | |
| 165 | + function = "vdsl_phy_override_0"; | |
| 166 | + group = "vdsl_phy_override_0_grp"; | |
| 167 | + }; | |
| 168 | + | |
| 169 | + pinctrl_vdsl_phy_override_1: vdsl_phy_override_1-pins { | |
| 170 | + function = "vdsl_phy_override_1"; | |
| 171 | + group = "vdsl_phy_override_1_grp"; | |
| 172 | + }; | |
| 173 | + | |
| 174 | + pinctrl_vdsl_phy_override_2: vdsl_phy_override_2-pins { | |
| 175 | + function = "vdsl_phy_override_2"; | |
| 176 | + group = "vdsl_phy_override_2_grp"; | |
| 177 | + }; | |
| 178 | + | |
| 179 | + pinctrl_vdsl_phy_override_3: vdsl_phy_override_3-pins { | |
| 180 | + function = "vdsl_phy_override_3"; | |
| 181 | + group = "vdsl_phy_override_3_grp"; | |
| 182 | + }; | |
| 183 | + | |
| 184 | + pinctrl_dsl_gpio8: dsl_gpio8-pins { | |
| 185 | + function = "dsl_gpio8"; | |
| 186 | + group = "dsl_gpio8"; | |
| 187 | + }; | |
| 188 | + | |
| 189 | + pinctrl_dsl_gpio9: dsl_gpio9-pins { | |
| 190 | + function = "dsl_gpio9"; | |
| 191 | + group = "dsl_gpio9"; | |
| 192 | + }; | |
| 193 | + }; | |
| 194 | + }; | |
| @@ -0,0 +1,162 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM6328 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm6328-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm6328-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@10000080 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm6328-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0x10000080 0x80>; | |
| 69 | + ranges = <0 0x10000080 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm6328-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 32>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@18 { | |
| 82 | + compatible = "brcm,bcm6328-pinctrl"; | |
| 83 | + reg = <0x18 0x10>; | |
| 84 | + | |
| 85 | + pinctrl_serial_led: serial_led-pins { | |
| 86 | + pinctrl_serial_led_data: serial_led_data-pins { | |
| 87 | + function = "serial_led_data"; | |
| 88 | + pins = "gpio6"; | |
| 89 | + }; | |
| 90 | + | |
| 91 | + pinctrl_serial_led_clk: serial_led_clk-pins { | |
| 92 | + function = "serial_led_clk"; | |
| 93 | + pins = "gpio7"; | |
| 94 | + }; | |
| 95 | + }; | |
| 96 | + | |
| 97 | + pinctrl_inet_act_led: inet_act_led-pins { | |
| 98 | + function = "inet_act_led"; | |
| 99 | + pins = "gpio11"; | |
| 100 | + }; | |
| 101 | + | |
| 102 | + pinctrl_pcie_clkreq: pcie_clkreq-pins { | |
| 103 | + function = "pcie_clkreq"; | |
| 104 | + pins = "gpio16"; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + pinctrl_ephy0_spd_led: ephy0_spd_led-pins { | |
| 108 | + function = "led"; | |
| 109 | + pins = "gpio17"; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + pinctrl_ephy1_spd_led: ephy1_spd_led-pins { | |
| 113 | + function = "led"; | |
| 114 | + pins = "gpio18"; | |
| 115 | + }; | |
| 116 | + | |
| 117 | + pinctrl_ephy2_spd_led: ephy2_spd_led-pins { | |
| 118 | + function = "led"; | |
| 119 | + pins = "gpio19"; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + pinctrl_ephy3_spd_led: ephy3_spd_led-pins { | |
| 123 | + function = "led"; | |
| 124 | + pins = "gpio20"; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + pinctrl_ephy0_act_led: ephy0_act_led-pins { | |
| 128 | + function = "ephy0_act_led"; | |
| 129 | + pins = "gpio25"; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + pinctrl_ephy1_act_led: ephy1_act_led-pins { | |
| 133 | + function = "ephy1_act_led"; | |
| 134 | + pins = "gpio26"; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + pinctrl_ephy2_act_led: ephy2_act_led-pins { | |
| 138 | + function = "ephy2_act_led"; | |
| 139 | + pins = "gpio27"; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + pinctrl_ephy3_act_led: ephy3_act_led-pins { | |
| 143 | + function = "ephy3_act_led"; | |
| 144 | + pins = "gpio28"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + pinctrl_hsspi_cs1: hsspi_cs1-pins { | |
| 148 | + function = "hsspi_cs1"; | |
| 149 | + pins = "hsspi_cs1"; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + pinctrl_usb_port1_device: usb_port1_device-pins { | |
| 153 | + function = "usb_device_port"; | |
| 154 | + pins = "usb_port1"; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + pinctrl_usb_port1_host: usb_port1_host-pins { | |
| 158 | + function = "usb_host_port"; | |
| 159 | + pins = "usb_port1"; | |
| 160 | + }; | |
| 161 | + }; | |
| 162 | + }; | |
| @@ -0,0 +1,130 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6358 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM6358 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm6358-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm6358-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@fffe0080 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm6358-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0xfffe0080 0x80>; | |
| 69 | + ranges = <0 0xfffe0080 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm6358-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 40>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@18 { | |
| 82 | + compatible = "brcm,bcm6358-pinctrl"; | |
| 83 | + reg = <0x18 0x4>; | |
| 84 | + | |
| 85 | + pinctrl_ebi_cs: ebi_cs-pins { | |
| 86 | + function = "ebi_cs"; | |
| 87 | + groups = "ebi_cs_grp"; | |
| 88 | + }; | |
| 89 | + | |
| 90 | + pinctrl_uart1: uart1-pins { | |
| 91 | + function = "uart1"; | |
| 92 | + groups = "uart1_grp"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + pinctrl_serial_led: serial_led-pins { | |
| 96 | + function = "serial_led"; | |
| 97 | + groups = "serial_led_grp"; | |
| 98 | + }; | |
| 99 | + | |
| 100 | + pinctrl_legacy_led: legacy_led-pins { | |
| 101 | + function = "legacy_led"; | |
| 102 | + groups = "legacy_led_grp"; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + pinctrl_led: led-pins { | |
| 106 | + function = "led"; | |
| 107 | + groups = "led_grp"; | |
| 108 | + }; | |
| 109 | + | |
| 110 | + pinctrl_spi_cs_23: spi_cs-pins { | |
| 111 | + function = "spi_cs"; | |
| 112 | + groups = "spi_cs_grp"; | |
| 113 | + }; | |
| 114 | + | |
| 115 | + pinctrl_utopia: utopia-pins { | |
| 116 | + function = "utopia"; | |
| 117 | + groups = "utopia_grp"; | |
| 118 | + }; | |
| 119 | + | |
| 120 | + pinctrl_pwm_syn_clk: pwm_syn_clk-pins { | |
| 121 | + function = "pwm_syn_clk"; | |
| 122 | + groups = "pwm_syn_clk_grp"; | |
| 123 | + }; | |
| 124 | + | |
| 125 | + pinctrl_sys_irq: sys_irq-pins { | |
| 126 | + function = "sys_irq"; | |
| 127 | + groups = "sys_irq_grp"; | |
| 128 | + }; | |
| 129 | + }; | |
| 130 | + }; | |
| @@ -0,0 +1,236 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6362 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM6362 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm6362-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm6362-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@10000080 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm6362-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0x10000080 0x80>; | |
| 69 | + ranges = <0 0x10000080 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm6362-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 48>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@18 { | |
| 82 | + compatible = "brcm,bcm6362-pinctrl"; | |
| 83 | + reg = <0x18 0x10>, <0x38 0x4>; | |
| 84 | + | |
| 85 | + pinctrl_usb_device_led: usb_device_led-pins { | |
| 86 | + function = "usb_device_led"; | |
| 87 | + pins = "gpio0"; | |
| 88 | + }; | |
| 89 | + | |
| 90 | + pinctrl_sys_irq: sys_irq-pins { | |
| 91 | + function = "sys_irq"; | |
| 92 | + pins = "gpio1"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + pinctrl_serial_led: serial_led-pins { | |
| 96 | + pinctrl_serial_led_clk: serial_led_clk-pins { | |
| 97 | + function = "serial_led_clk"; | |
| 98 | + pins = "gpio2"; | |
| 99 | + }; | |
| 100 | + | |
| 101 | + pinctrl_serial_led_data: serial_led_data-pins { | |
| 102 | + function = "serial_led_data"; | |
| 103 | + pins = "gpio3"; | |
| 104 | + }; | |
| 105 | + }; | |
| 106 | + | |
| 107 | + pinctrl_robosw_led_data: robosw_led_data-pins { | |
| 108 | + function = "robosw_led_data"; | |
| 109 | + pins = "gpio4"; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + pinctrl_robosw_led_clk: robosw_led_clk-pins { | |
| 113 | + function = "robosw_led_clk"; | |
| 114 | + pins = "gpio5"; | |
| 115 | + }; | |
| 116 | + | |
| 117 | + pinctrl_robosw_led0: robosw_led0-pins { | |
| 118 | + function = "robosw_led0"; | |
| 119 | + pins = "gpio6"; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + pinctrl_robosw_led1: robosw_led1-pins { | |
| 123 | + function = "robosw_led1"; | |
| 124 | + pins = "gpio7"; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + pinctrl_inet_led: inet_led-pins { | |
| 128 | + function = "inet_led"; | |
| 129 | + pins = "gpio8"; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + pinctrl_spi_cs2: spi_cs2-pins { | |
| 133 | + function = "spi_cs2"; | |
| 134 | + pins = "gpio9"; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + pinctrl_spi_cs3: spi_cs3-pins { | |
| 138 | + function = "spi_cs3"; | |
| 139 | + pins = "gpio10"; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + pinctrl_ntr_pulse: ntr_pulse-pins { | |
| 143 | + function = "ntr_pulse"; | |
| 144 | + pins = "gpio11"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + pinctrl_uart1_scts: uart1_scts-pins { | |
| 148 | + function = "uart1_scts"; | |
| 149 | + pins = "gpio12"; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + pinctrl_uart1_srts: uart1_srts-pins { | |
| 153 | + function = "uart1_srts"; | |
| 154 | + pins = "gpio13"; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + pinctrl_uart1: uart1-pins { | |
| 158 | + pinctrl_uart1_sdin: uart1_sdin-pins { | |
| 159 | + function = "uart1_sdin"; | |
| 160 | + pins = "gpio14"; | |
| 161 | + }; | |
| 162 | + | |
| 163 | + pinctrl_uart1_sdout: uart1_sdout-pins { | |
| 164 | + function = "uart1_sdout"; | |
| 165 | + pins = "gpio15"; | |
| 166 | + }; | |
| 167 | + }; | |
| 168 | + | |
| 169 | + pinctrl_adsl_spi: adsl_spi-pins { | |
| 170 | + pinctrl_adsl_spi_miso: adsl_spi_miso-pins { | |
| 171 | + function = "adsl_spi_miso"; | |
| 172 | + pins = "gpio16"; | |
| 173 | + }; | |
| 174 | + | |
| 175 | + pinctrl_adsl_spi_mosi: adsl_spi_mosi-pins { | |
| 176 | + function = "adsl_spi_mosi"; | |
| 177 | + pins = "gpio17"; | |
| 178 | + }; | |
| 179 | + | |
| 180 | + pinctrl_adsl_spi_clk: adsl_spi_clk-pins { | |
| 181 | + function = "adsl_spi_clk"; | |
| 182 | + pins = "gpio18"; | |
| 183 | + }; | |
| 184 | + | |
| 185 | + pinctrl_adsl_spi_cs: adsl_spi_cs-pins { | |
| 186 | + function = "adsl_spi_cs"; | |
| 187 | + pins = "gpio19"; | |
| 188 | + }; | |
| 189 | + }; | |
| 190 | + | |
| 191 | + pinctrl_ephy0_led: ephy0_led-pins { | |
| 192 | + function = "ephy0_led"; | |
| 193 | + pins = "gpio20"; | |
| 194 | + }; | |
| 195 | + | |
| 196 | + pinctrl_ephy1_led: ephy1_led-pins { | |
| 197 | + function = "ephy1_led"; | |
| 198 | + pins = "gpio21"; | |
| 199 | + }; | |
| 200 | + | |
| 201 | + pinctrl_ephy2_led: ephy2_led-pins { | |
| 202 | + function = "ephy2_led"; | |
| 203 | + pins = "gpio22"; | |
| 204 | + }; | |
| 205 | + | |
| 206 | + pinctrl_ephy3_led: ephy3_led-pins { | |
| 207 | + function = "ephy3_led"; | |
| 208 | + pins = "gpio23"; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + pinctrl_ext_irq0: ext_irq0-pins { | |
| 212 | + function = "ext_irq0"; | |
| 213 | + pins = "gpio24"; | |
| 214 | + }; | |
| 215 | + | |
| 216 | + pinctrl_ext_irq1: ext_irq1-pins { | |
| 217 | + function = "ext_irq1"; | |
| 218 | + pins = "gpio25"; | |
| 219 | + }; | |
| 220 | + | |
| 221 | + pinctrl_ext_irq2: ext_irq2-pins { | |
| 222 | + function = "ext_irq2"; | |
| 223 | + pins = "gpio26"; | |
| 224 | + }; | |
| 225 | + | |
| 226 | + pinctrl_ext_irq3: ext_irq3-pins { | |
| 227 | + function = "ext_irq3"; | |
| 228 | + pins = "gpio27"; | |
| 229 | + }; | |
| 230 | + | |
| 231 | + pinctrl_nand: nand-pins { | |
| 232 | + function = "nand"; | |
| 233 | + group = "nand_grp"; | |
| 234 | + }; | |
| 235 | + }; | |
| 236 | + }; | |
| @@ -0,0 +1,246 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + - Jonas Gorski <jonas.gorski@gmail.com> | |
| 12 | + | |
| 13 | +description: | |
| 14 | + Broadcom BCM6368 SoC GPIO system controller which provides a register map | |
| 15 | + for controlling the GPIO and pins of the SoC. | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + "#address-cells": true | |
| 19 | + | |
| 20 | + "#size-cells": true | |
| 21 | + | |
| 22 | + compatible: | |
| 23 | + items: | |
| 24 | + - const: brcm,bcm6368-gpio-sysctl | |
| 25 | + - const: syscon | |
| 26 | + - const: simple-mfd | |
| 27 | + | |
| 28 | + ranges: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + reg: | |
| 32 | + maxItems: 1 | |
| 33 | + | |
| 34 | +patternProperties: | |
| 35 | + "^gpio@[0-9a-f]+$": | |
| 36 | + # Child node | |
| 37 | + type: object | |
| 38 | + $ref: "../gpio/brcm,bcm6345-gpio.yaml" | |
| 39 | + description: | |
| 40 | + GPIO controller for the SoC GPIOs. This child node definition | |
| 41 | + should follow the bindings specified in | |
| 42 | + Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml. | |
| 43 | + | |
| 44 | + "^pinctrl@[0-9a-f]+$": | |
| 45 | + # Child node | |
| 46 | + type: object | |
| 47 | + $ref: "../pinctrl/brcm,bcm6368-pinctrl.yaml" | |
| 48 | + description: | |
| 49 | + Pin controller for the SoC pins. This child node definition | |
| 50 | + should follow the bindings specified in | |
| 51 | + Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml. | |
| 52 | + | |
| 53 | +required: | |
| 54 | + - "#address-cells" | |
| 55 | + - compatible | |
| 56 | + - ranges | |
| 57 | + - reg | |
| 58 | + - "#size-cells" | |
| 59 | + | |
| 60 | +additionalProperties: false | |
| 61 | + | |
| 62 | +examples: | |
| 63 | + - | | |
| 64 | + syscon@10000080 { | |
| 65 | + #address-cells = <1>; | |
| 66 | + #size-cells = <1>; | |
| 67 | + compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd"; | |
| 68 | + reg = <0x10000080 0x80>; | |
| 69 | + ranges = <0 0x10000080 0x80>; | |
| 70 | + | |
| 71 | + gpio@0 { | |
| 72 | + compatible = "brcm,bcm6368-gpio"; | |
| 73 | + reg-names = "dirout", "dat"; | |
| 74 | + reg = <0x0 0x8>, <0x8 0x8>; | |
| 75 | + | |
| 76 | + gpio-controller; | |
| 77 | + gpio-ranges = <&pinctrl 0 0 38>; | |
| 78 | + #gpio-cells = <2>; | |
| 79 | + }; | |
| 80 | + | |
| 81 | + pinctrl: pinctrl@18 { | |
| 82 | + compatible = "brcm,bcm6368-pinctrl"; | |
| 83 | + reg = <0x18 0x4>, <0x38 0x4>; | |
| 84 | + | |
| 85 | + pinctrl_analog_afe_0: analog_afe_0-pins { | |
| 86 | + function = "analog_afe_0"; | |
| 87 | + pins = "gpio0"; | |
| 88 | + }; | |
| 89 | + | |
| 90 | + pinctrl_analog_afe_1: analog_afe_1-pins { | |
| 91 | + function = "analog_afe_1"; | |
| 92 | + pins = "gpio1"; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + pinctrl_sys_irq: sys_irq-pins { | |
| 96 | + function = "sys_irq"; | |
| 97 | + pins = "gpio2"; | |
| 98 | + }; | |
| 99 | + | |
| 100 | + pinctrl_serial_led: serial_led-pins { | |
| 101 | + pinctrl_serial_led_data: serial_led_data-pins { | |
| 102 | + function = "serial_led_data"; | |
| 103 | + pins = "gpio3"; | |
| 104 | + }; | |
| 105 | + | |
| 106 | + pinctrl_serial_led_clk: serial_led_clk-pins { | |
| 107 | + function = "serial_led_clk"; | |
| 108 | + pins = "gpio4"; | |
| 109 | + }; | |
| 110 | + }; | |
| 111 | + | |
| 112 | + pinctrl_inet_led: inet_led-pins { | |
| 113 | + function = "inet_led"; | |
| 114 | + pins = "gpio5"; | |
| 115 | + }; | |
| 116 | + | |
| 117 | + pinctrl_ephy0_led: ephy0_led-pins { | |
| 118 | + function = "ephy0_led"; | |
| 119 | + pins = "gpio6"; | |
| 120 | + }; | |
| 121 | + | |
| 122 | + pinctrl_ephy1_led: ephy1_led-pins { | |
| 123 | + function = "ephy1_led"; | |
| 124 | + pins = "gpio7"; | |
| 125 | + }; | |
| 126 | + | |
| 127 | + pinctrl_ephy2_led: ephy2_led-pins { | |
| 128 | + function = "ephy2_led"; | |
| 129 | + pins = "gpio8"; | |
| 130 | + }; | |
| 131 | + | |
| 132 | + pinctrl_ephy3_led: ephy3_led-pins { | |
| 133 | + function = "ephy3_led"; | |
| 134 | + pins = "gpio9"; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + pinctrl_robosw_led_data: robosw_led_data-pins { | |
| 138 | + function = "robosw_led_data"; | |
| 139 | + pins = "gpio10"; | |
| 140 | + }; | |
| 141 | + | |
| 142 | + pinctrl_robosw_led_clk: robosw_led_clk-pins { | |
| 143 | + function = "robosw_led_clk"; | |
| 144 | + pins = "gpio11"; | |
| 145 | + }; | |
| 146 | + | |
| 147 | + pinctrl_robosw_led0: robosw_led0-pins { | |
| 148 | + function = "robosw_led0"; | |
| 149 | + pins = "gpio12"; | |
| 150 | + }; | |
| 151 | + | |
| 152 | + pinctrl_robosw_led1: robosw_led1-pins { | |
| 153 | + function = "robosw_led1"; | |
| 154 | + pins = "gpio13"; | |
| 155 | + }; | |
| 156 | + | |
| 157 | + pinctrl_usb_device_led: usb_device_led-pins { | |
| 158 | + function = "usb_device_led"; | |
| 159 | + pins = "gpio14"; | |
| 160 | + }; | |
| 161 | + | |
| 162 | + pinctrl_pci: pci-pins { | |
| 163 | + pinctrl_pci_req1: pci_req1-pins { | |
| 164 | + function = "pci_req1"; | |
| 165 | + pins = "gpio16"; | |
| 166 | + }; | |
| 167 | + | |
| 168 | + pinctrl_pci_gnt1: pci_gnt1-pins { | |
| 169 | + function = "pci_gnt1"; | |
| 170 | + pins = "gpio17"; | |
| 171 | + }; | |
| 172 | + | |
| 173 | + pinctrl_pci_intb: pci_intb-pins { | |
| 174 | + function = "pci_intb"; | |
| 175 | + pins = "gpio18"; | |
| 176 | + }; | |
| 177 | + | |
| 178 | + pinctrl_pci_req0: pci_req0-pins { | |
| 179 | + function = "pci_req0"; | |
| 180 | + pins = "gpio19"; | |
| 181 | + }; | |
| 182 | + | |
| 183 | + pinctrl_pci_gnt0: pci_gnt0-pins { | |
| 184 | + function = "pci_gnt0"; | |
| 185 | + pins = "gpio20"; | |
| 186 | + }; | |
| 187 | + }; | |
| 188 | + | |
| 189 | + pinctrl_pcmcia: pcmcia-pins { | |
| 190 | + pinctrl_pcmcia_cd1: pcmcia_cd1-pins { | |
| 191 | + function = "pcmcia_cd1"; | |
| 192 | + pins = "gpio22"; | |
| 193 | + }; | |
| 194 | + | |
| 195 | + pinctrl_pcmcia_cd2: pcmcia_cd2-pins { | |
| 196 | + function = "pcmcia_cd2"; | |
| 197 | + pins = "gpio23"; | |
| 198 | + }; | |
| 199 | + | |
| 200 | + pinctrl_pcmcia_vs1: pcmcia_vs1-pins { | |
| 201 | + function = "pcmcia_vs1"; | |
| 202 | + pins = "gpio24"; | |
| 203 | + }; | |
| 204 | + | |
| 205 | + pinctrl_pcmcia_vs2: pcmcia_vs2-pins { | |
| 206 | + function = "pcmcia_vs2"; | |
| 207 | + pins = "gpio25"; | |
| 208 | + }; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + pinctrl_ebi_cs2: ebi_cs2-pins { | |
| 212 | + function = "ebi_cs2"; | |
| 213 | + pins = "gpio26"; | |
| 214 | + }; | |
| 215 | + | |
| 216 | + pinctrl_ebi_cs3: ebi_cs3-pins { | |
| 217 | + function = "ebi_cs3"; | |
| 218 | + pins = "gpio27"; | |
| 219 | + }; | |
| 220 | + | |
| 221 | + pinctrl_spi_cs2: spi_cs2-pins { | |
| 222 | + function = "spi_cs2"; | |
| 223 | + pins = "gpio28"; | |
| 224 | + }; | |
| 225 | + | |
| 226 | + pinctrl_spi_cs3: spi_cs3-pins { | |
| 227 | + function = "spi_cs3"; | |
| 228 | + pins = "gpio29"; | |
| 229 | + }; | |
| 230 | + | |
| 231 | + pinctrl_spi_cs4: spi_cs4-pins { | |
| 232 | + function = "spi_cs4"; | |
| 233 | + pins = "gpio30"; | |
| 234 | + }; | |
| 235 | + | |
| 236 | + pinctrl_spi_cs5: spi_cs5-pins { | |
| 237 | + function = "spi_cs5"; | |
| 238 | + pins = "gpio31"; | |
| 239 | + }; | |
| 240 | + | |
| 241 | + pinctrl_uart1: uart1-pins { | |
| 242 | + function = "uart1"; | |
| 243 | + group = "uart1_grp"; | |
| 244 | + }; | |
| 245 | + }; | |
| 246 | + }; | |
| @@ -94,6 +94,9 @@ properties: · 93 unmodified lines | ||
| 94 | 94 | keyboard-controller: |
| 95 | 95 | $ref: "/schemas/input/google,cros-ec-keyb.yaml#" |
| 96 | 96 | |
| 97 | + proximity: | |
| 98 | + $ref: "/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#" | |
| 99 | + | |
| 97 | 100 | codecs: |
| 98 | 101 | type: object |
| 99 | 102 | additionalProperties: false |
| @@ -180,6 +183,10 @@ examples: · 80 unmodified lines | ||
| 180 | 183 | interrupts = <99 0>; |
| 181 | 184 | interrupt-parent = <&gpio7>; |
| 182 | 185 | spi-max-frequency = <5000000>; |
| 186 | + | |
| 187 | + proximity { | |
| 188 | + compatible = "google,cros-ec-mkbp-proximity"; | |
| 189 | + }; | |
| 183 | 190 | }; |
| 184 | 191 | }; |
| 185 | 192 | |
| @@ -0,0 +1,76 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/netronix,ntxec.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Netronix Embedded Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jonathan Neuschäfer <j.neuschaefer@gmx.net> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + This EC is found in e-book readers of multiple brands (e.g. Kobo, Tolino), and | |
| 14 | + is typically implemented as a TI MSP430 microcontroller. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + const: netronix,ntxec | |
| 19 | + | |
| 20 | + reg: | |
| 21 | + items: | |
| 22 | + - description: The I2C address of the EC | |
| 23 | + | |
| 24 | + system-power-controller: | |
| 25 | + type: boolean | |
| 26 | + description: See Documentation/devicetree/bindings/power/power-controller.txt | |
| 27 | + | |
| 28 | + interrupts: | |
| 29 | + minItems: 1 | |
| 30 | + description: | |
| 31 | + The EC can signal interrupts via a GPIO line | |
| 32 | + | |
| 33 | + "#pwm-cells": | |
| 34 | + const: 2 | |
| 35 | + description: | | |
| 36 | + Number of cells in a PWM specifier. | |
| 37 | + | |
| 38 | + The following PWM channels are supported: | |
| 39 | + - 0: The PWM channel controlled by registers 0xa1-0xa7 | |
| 40 | + | |
| 41 | +required: | |
| 42 | + - compatible | |
| 43 | + - reg | |
| 44 | + | |
| 45 | +additionalProperties: false | |
| 46 | + | |
| 47 | +examples: | |
| 48 | + - | | |
| 49 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 50 | + i2c { | |
| 51 | + #address-cells = <1>; | |
| 52 | + #size-cells = <0>; | |
| 53 | + | |
| 54 | + ec: embedded-controller@43 { | |
| 55 | + pinctrl-names = "default"; | |
| 56 | + pinctrl-0 = <&pinctrl_ntxec>; | |
| 57 | + | |
| 58 | + compatible = "netronix,ntxec"; | |
| 59 | + reg = <0x43>; | |
| 60 | + system-power-controller; | |
| 61 | + interrupt-parent = <&gpio4>; | |
| 62 | + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; | |
| 63 | + #pwm-cells = <2>; | |
| 64 | + }; | |
| 65 | + }; | |
| 66 | + | |
| 67 | + backlight { | |
| 68 | + compatible = "pwm-backlight"; | |
| 69 | + pwms = <&ec 0 50000>; | |
| 70 | + power-supply = <&backlight_regulator>; | |
| 71 | + }; | |
| 72 | + | |
| 73 | + backlight_regulator: regulator-dummy { | |
| 74 | + compatible = "regulator-fixed"; | |
| 75 | + regulator-name = "backlight"; | |
| 76 | + }; | |
| @@ -1,99 +0,0 @@ | ||
| 1 | −Qualcomm PM8xxx PMIC multi-function devices | |
| 2 | − | |
| 3 | −The PM8xxx family of Power Management ICs are used to provide regulated | |
| 4 | −voltages and other various functionality to Qualcomm SoCs. | |
| 5 | − | |
| 6 | −= PROPERTIES | |
| 7 | − | |
| 8 | −- compatible: | |
| 9 | − Usage: required | |
| 10 | − Value type: <string> | |
| 11 | − Definition: must be one of: | |
| 12 | − "qcom,pm8058" | |
| 13 | − "qcom,pm8821" | |
| 14 | − "qcom,pm8921" | |
| 15 | − | |
| 16 | −- #address-cells: | |
| 17 | − Usage: required | |
| 18 | − Value type: <u32> | |
| 19 | − Definition: must be 1 | |
| 20 | − | |
| 21 | −- #size-cells: | |
| 22 | − Usage: required | |
| 23 | − Value type: <u32> | |
| 24 | − Definition: must be 0 | |
| 25 | − | |
| 26 | −- interrupts: | |
| 27 | − Usage: required | |
| 28 | − Value type: <prop-encoded-array> | |
| 29 | − Definition: specifies the interrupt that indicates a subdevice | |
| 30 | − has generated an interrupt (summary interrupt). The | |
| 31 | − format of the specifier is defined by the binding document | |
| 32 | − describing the node's interrupt parent. | |
| 33 | − | |
| 34 | −- #interrupt-cells: | |
| 35 | − Usage: required | |
| 36 | − Value type : <u32> | |
| 37 | − Definition: must be 2. Specifies the number of cells needed to encode | |
| 38 | − an interrupt source. The 1st cell contains the interrupt | |
| 39 | − number. The 2nd cell is the trigger type and level flags | |
| 40 | − encoded as follows: | |
| 41 | − | |
| 42 | − 1 = low-to-high edge triggered | |
| 43 | − 2 = high-to-low edge triggered | |
| 44 | − 4 = active high level-sensitive | |
| 45 | − 8 = active low level-sensitive | |
| 46 | − | |
| 47 | −- interrupt-controller: | |
| 48 | − Usage: required | |
| 49 | − Value type: <empty> | |
| 50 | − Definition: identifies this node as an interrupt controller | |
| 51 | − | |
| 52 | −= SUBCOMPONENTS | |
| 53 | − | |
| 54 | −The PMIC contains multiple independent functions, each described in a subnode. | |
| 55 | −The below bindings specify the set of valid subnodes. | |
| 56 | − | |
| 57 | −== Real-Time Clock | |
| 58 | − | |
| 59 | −- compatible: | |
| 60 | − Usage: required | |
| 61 | − Value type: <string> | |
| 62 | − Definition: must be one of: | |
| 63 | − "qcom,pm8058-rtc" | |
| 64 | − "qcom,pm8921-rtc" | |
| 65 | − "qcom,pm8941-rtc" | |
| 66 | − "qcom,pm8018-rtc" | |
| 67 | − | |
| 68 | −- reg: | |
| 69 | − Usage: required | |
| 70 | − Value type: <prop-encoded-array> | |
| 71 | − Definition: single entry specifying the base address of the RTC registers | |
| 72 | − | |
| 73 | −- interrupts: | |
| 74 | − Usage: required | |
| 75 | − Value type: <prop-encoded-array> | |
| 76 | − Definition: single entry specifying the RTC's alarm interrupt | |
| 77 | − | |
| 78 | −- allow-set-time: | |
| 79 | − Usage: optional | |
| 80 | − Value type: <empty> | |
| 81 | − Definition: indicates that the setting of RTC time is allowed by | |
| 82 | − the host CPU | |
| 83 | − | |
| 84 | −= EXAMPLE | |
| 85 | − | |
| 86 | − pmicintc: pmic@0 { | |
| 87 | − compatible = "qcom,pm8921"; | |
| 88 | − interrupts = <104 8>; | |
| 89 | − #interrupt-cells = <2>; | |
| 90 | − interrupt-controller; | |
| 91 | − #address-cells = <1>; | |
| 92 | − #size-cells = <0>; | |
| 93 | − | |
| 94 | − rtc@11d { | |
| 95 | − compatible = "qcom,pm8921-rtc"; | |
| 96 | − reg = <0x11d>; | |
| 97 | − interrupts = <0x27 0>; | |
| 98 | − }; | |
| 99 | − }; | |
| @@ -0,0 +1,54 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/qcom-pm8xxx.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm PM8xxx PMIC multi-function devices | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Satya Priya <skakit@codeaurora.org> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + The PM8xxx family of Power Management ICs are used to provide regulated | |
| 14 | + voltages and other various functionality to Qualcomm SoCs. | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + enum: | |
| 19 | + - qcom,pm8058 | |
| 20 | + - qcom,pm8821 | |
| 21 | + - qcom,pm8921 | |
| 22 | + | |
| 23 | + reg: | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 26 | + '#address-cells': | |
| 27 | + const: 1 | |
| 28 | + | |
| 29 | + '#size-cells': | |
| 30 | + const: 0 | |
| 31 | + | |
| 32 | + interrupts: | |
| 33 | + maxItems: 1 | |
| 34 | + | |
| 35 | + '#interrupt-cells': | |
| 36 | + const: 2 | |
| 37 | + | |
| 38 | + interrupt-controller: true | |
| 39 | + | |
| 40 | +patternProperties: | |
| 41 | + "rtc@[0-9a-f]+$": | |
| 42 | + type: object | |
| 43 | + $ref: "../rtc/qcom-pm8xxx-rtc.yaml" | |
| 44 | + | |
| 45 | +required: | |
| 46 | + - compatible | |
| 47 | + - '#address-cells' | |
| 48 | + - '#size-cells' | |
| 49 | + - interrupts | |
| 50 | + - '#interrupt-cells' | |
| 51 | + - interrupt-controller | |
| 52 | + | |
| 53 | +additionalProperties: false | |
| 54 | +... | |
| @@ -0,0 +1,111 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/ricoh,rn5t618.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Ricoh RN5T567/RN5T618/RC5T619 PMIC | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Andreas Kemnade <andreas@kemnade.info> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which | |
| 14 | + integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators, | |
| 15 | + GPIOs, and a watchdog timer. It can be controlled through an I2C interface. | |
| 16 | + The RN5T618/RC5T619 provides additionally a Li-ion battery charger, | |
| 17 | + fuel gauge, and an ADC. | |
| 18 | + The RC5T619 additionally includes USB charger detection and an RTC. | |
| 19 | + | |
| 20 | +allOf: | |
| 21 | + - if: | |
| 22 | + properties: | |
| 23 | + compatible: | |
| 24 | + contains: | |
| 25 | + const: ricoh,rn5t567 | |
| 26 | + then: | |
| 27 | + properties: | |
| 28 | + regulators: | |
| 29 | + patternProperties: | |
| 30 | + "^(DCDC[1-4]|LDO[1-5]|LDORTC[12])$": | |
| 31 | + $ref: ../regulator/regulator.yaml | |
| 32 | + additionalProperties: false | |
| 33 | + - if: | |
| 34 | + properties: | |
| 35 | + compatible: | |
| 36 | + contains: | |
| 37 | + const: ricoh,rn5t618 | |
| 38 | + then: | |
| 39 | + properties: | |
| 40 | + regulators: | |
| 41 | + patternProperties: | |
| 42 | + "^(DCDC[1-3]|LDO[1-5]|LDORTC[12])$": | |
| 43 | + $ref: ../regulator/regulator.yaml | |
| 44 | + additionalProperties: false | |
| 45 | + - if: | |
| 46 | + properties: | |
| 47 | + compatible: | |
| 48 | + contains: | |
| 49 | + const: ricoh,rc5t619 | |
| 50 | + then: | |
| 51 | + properties: | |
| 52 | + regulators: | |
| 53 | + patternProperties: | |
| 54 | + "^(DCDC[1-5]|LDO[1-9]|LDO10|LDORTC[12])$": | |
| 55 | + $ref: ../regulator/regulator.yaml | |
| 56 | + additionalProperties: false | |
| 57 | + | |
| 58 | +properties: | |
| 59 | + compatible: | |
| 60 | + enum: | |
| 61 | + - ricoh,rn5t567 | |
| 62 | + - ricoh,rn5t618 | |
| 63 | + - ricoh,rc5t619 | |
| 64 | + | |
| 65 | + reg: | |
| 66 | + maxItems: 1 | |
| 67 | + | |
| 68 | + interrupts: | |
| 69 | + maxItems: 1 | |
| 70 | + | |
| 71 | + system-power-controller: | |
| 72 | + type: boolean | |
| 73 | + description: | | |
| 74 | + See Documentation/devicetree/bindings/power/power-controller.txt | |
| 75 | + | |
| 76 | + regulators: | |
| 77 | + type: object | |
| 78 | + | |
| 79 | +additionalProperties: false | |
| 80 | + | |
| 81 | +required: | |
| 82 | + - compatible | |
| 83 | + - reg | |
| 84 | + | |
| 85 | +examples: | |
| 86 | + - | | |
| 87 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 88 | + i2c { | |
| 89 | + #address-cells = <1>; | |
| 90 | + #size-cells = <0>; | |
| 91 | + | |
| 92 | + pmic@32 { | |
| 93 | + compatible = "ricoh,rn5t618"; | |
| 94 | + reg = <0x32>; | |
| 95 | + interrupt-parent = <&gpio5>; | |
| 96 | + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; | |
| 97 | + system-power-controller; | |
| 98 | + | |
| 99 | + regulators { | |
| 100 | + DCDC1 { | |
| 101 | + regulator-min-microvolt = <1050000>; | |
| 102 | + regulator-max-microvolt = <1050000>; | |
| 103 | + }; | |
| 104 | + | |
| 105 | + DCDC2 { | |
| 106 | + regulator-min-microvolt = <1175000>; | |
| 107 | + regulator-max-microvolt = <1175000>; | |
| 108 | + }; | |
| 109 | + }; | |
| 110 | + }; | |
| 111 | + }; | |
| @@ -1,52 +0,0 @@ | ||
| 1 | −* Ricoh RN5T567/RN5T618 PMIC | |
| 2 | − | |
| 3 | −Ricoh RN5T567/RN5T618/RC5T619 is a power management IC family which | |
| 4 | −integrates 3 to 5 step-down DCDC converters, 7 to 10 low-dropout regulators, | |
| 5 | −GPIOs, and a watchdog timer. It can be controlled through an I2C interface. | |
| 6 | −The RN5T618/RC5T619 provides additionally a Li-ion battery charger, | |
| 7 | −fuel gauge, and an ADC. | |
| 8 | −The RC5T619 additionnally includes USB charger detection and an RTC. | |
| 9 | − | |
| 10 | −Required properties: | |
| 11 | − - compatible: must be one of | |
| 12 | − "ricoh,rn5t567" | |
| 13 | − "ricoh,rn5t618" | |
| 14 | − "ricoh,rc5t619" | |
| 15 | − - reg: the I2C slave address of the device | |
| 16 | − | |
| 17 | −Optional properties: | |
| 18 | − - interrupts: interrupt mapping for IRQ | |
| 19 | − See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | |
| 20 | − - system-power-controller: | |
| 21 | − See Documentation/devicetree/bindings/power/power-controller.txt | |
| 22 | − | |
| 23 | −Sub-nodes: | |
| 24 | − - regulators: the node is required if the regulator functionality is | |
| 25 | − needed. The valid regulator names are: DCDC1, DCDC2, DCDC3, DCDC4 | |
| 26 | − (RN5T567/RC5T619), LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7, LDO8, | |
| 27 | − LDO9, LDO10, LDORTC1 and LDORTC2. | |
| 28 | − LDO7-10 are specific to RC5T619. | |
| 29 | − The common bindings for each individual regulator can be found in: | |
| 30 | − Documentation/devicetree/bindings/regulator/regulator.txt | |
| 31 | − | |
| 32 | −Example: | |
| 33 | − | |
| 34 | − pmic@32 { | |
| 35 | − compatible = "ricoh,rn5t618"; | |
| 36 | − reg = <0x32>; | |
| 37 | − interrupt-parent = <&gpio5>; | |
| 38 | − interrupts = <11 IRQ_TYPE_EDGE_FALLING>; | |
| 39 | − system-power-controller; | |
| 40 | − | |
| 41 | − regulators { | |
| 42 | − DCDC1 { | |
| 43 | − regulator-min-microvolt = <1050000>; | |
| 44 | − regulator-max-microvolt = <1050000>; | |
| 45 | − }; | |
| 46 | − | |
| 47 | − DCDC2 { | |
| 48 | − regulator-min-microvolt = <1175000>; | |
| 49 | − regulator-max-microvolt = <1175000>; | |
| 50 | − }; | |
| 51 | − }; | |
| 52 | − }; | |
| @@ -0,0 +1,201 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: ROHM BD71815 Power Management Integrated Circuit bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + BD71815AGW is a single-chip power management ICs for battery-powered | |
| 14 | + portable devices. It integrates 5 buck converters, 8 LDOs, a boost driver | |
| 15 | + for LED and a 500 mA single-cell linear charger. Also included is a Coulomb | |
| 16 | + counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs. | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + const: rohm,bd71815 | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + description: | |
| 24 | + I2C slave address. | |
| 25 | + maxItems: 1 | |
| 26 | + | |
| 27 | + interrupts: | |
| 28 | + maxItems: 1 | |
| 29 | + | |
| 30 | + gpio-controller: true | |
| 31 | + | |
| 32 | + "#gpio-cells": | |
| 33 | + const: 2 | |
| 34 | + description: | | |
| 35 | + The first cell is the pin number and the second cell is used to specify | |
| 36 | + flags. See ../gpio/gpio.txt for more information. | |
| 37 | + | |
| 38 | + clocks: | |
| 39 | + maxItems: 1 | |
| 40 | + | |
| 41 | + "#clock-cells": | |
| 42 | + const: 0 | |
| 43 | + | |
| 44 | + clock-output-names: | |
| 45 | + const: bd71815-32k-out | |
| 46 | + | |
| 47 | + rohm,clkout-open-drain: | |
| 48 | + description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos". | |
| 49 | + $ref: "/schemas/types.yaml#/definitions/uint32" | |
| 50 | + minimum: 0 | |
| 51 | + maximum: 1 | |
| 52 | + | |
| 53 | + rohm,charger-sense-resistor-ohms: | |
| 54 | + minimum: 10000000 | |
| 55 | + maximum: 50000000 | |
| 56 | + description: | | |
| 57 | + BD71827 and BD71828 have SAR ADC for measuring charging currents. | |
| 58 | + External sense resistor (RSENSE in data sheet) should be used. If | |
| 59 | + something other but 30MOhm resistor is used the resistance value | |
| 60 | + should be given here in Ohms. | |
| 61 | + default: 30000000 | |
| 62 | + | |
| 63 | + regulators: | |
| 64 | + $ref: ../regulator/rohm,bd71815-regulator.yaml | |
| 65 | + description: | |
| 66 | + List of child nodes that specify the regulators. | |
| 67 | + | |
| 68 | + gpio-reserved-ranges: | |
| 69 | + description: | | |
| 70 | + Usage of BD71828 GPIO pins can be changed via OTP. This property can be | |
| 71 | + used to mark the pins which should not be configured for GPIO. Please see | |
| 72 | + the ../gpio/gpio.txt for more information. | |
| 73 | + | |
| 74 | + rohm,enable-hidden-gpo: | |
| 75 | + description: | | |
| 76 | + The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the | |
| 77 | + data-sheet as it's location in the middle of GND pins makes it hard to | |
| 78 | + use on PCB. If your board has managed to use this pin you can enable the | |
| 79 | + second GPO by defining this property. Dont enable this if you are unsure | |
| 80 | + about how the E5 pin is connected on your board. | |
| 81 | + type: boolean | |
| 82 | + | |
| 83 | +required: | |
| 84 | + - compatible | |
| 85 | + - reg | |
| 86 | + - interrupts | |
| 87 | + - clocks | |
| 88 | + - "#clock-cells" | |
| 89 | + - regulators | |
| 90 | + - gpio-controller | |
| 91 | + - "#gpio-cells" | |
| 92 | + | |
| 93 | +additionalProperties: false | |
| 94 | + | |
| 95 | +examples: | |
| 96 | + - | | |
| 97 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 98 | + #include <dt-bindings/leds/common.h> | |
| 99 | + i2c { | |
| 100 | + #address-cells = <1>; | |
| 101 | + #size-cells = <0>; | |
| 102 | + pmic: pmic@4b { | |
| 103 | + compatible = "rohm,bd71815"; | |
| 104 | + reg = <0x4b>; | |
| 105 | + | |
| 106 | + interrupt-parent = <&gpio1>; | |
| 107 | + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; | |
| 108 | + | |
| 109 | + clocks = <&osc 0>; | |
| 110 | + #clock-cells = <0>; | |
| 111 | + clock-output-names = "bd71815-32k-out"; | |
| 112 | + | |
| 113 | + gpio-controller; | |
| 114 | + #gpio-cells = <2>; | |
| 115 | + | |
| 116 | + rohm,charger-sense-resistor-ohms = <10000000>; | |
| 117 | + | |
| 118 | + regulators { | |
| 119 | + buck1: buck1 { | |
| 120 | + regulator-name = "buck1"; | |
| 121 | + regulator-min-microvolt = <800000>; | |
| 122 | + regulator-max-microvolt = <2000000>; | |
| 123 | + regulator-always-on; | |
| 124 | + regulator-ramp-delay = <1250>; | |
| 125 | + rohm,dvs-run-voltage = <1150000>; | |
| 126 | + rohm,dvs-suspend-voltage = <950000>; | |
| 127 | + }; | |
| 128 | + buck2: buck2 { | |
| 129 | + regulator-name = "buck2"; | |
| 130 | + regulator-min-microvolt = <800000>; | |
| 131 | + regulator-max-microvolt = <2000000>; | |
| 132 | + regulator-always-on; | |
| 133 | + regulator-ramp-delay = <1250>; | |
| 134 | + rohm,dvs-run-voltage = <1150000>; | |
| 135 | + rohm,dvs-suspend-voltage = <950000>; | |
| 136 | + }; | |
| 137 | + buck3: buck3 { | |
| 138 | + regulator-name = "buck3"; | |
| 139 | + regulator-min-microvolt = <1200000>; | |
| 140 | + regulator-max-microvolt = <2700000>; | |
| 141 | + regulator-always-on; | |
| 142 | + }; | |
| 143 | + buck4: buck4 { | |
| 144 | + regulator-name = "buck4"; | |
| 145 | + regulator-min-microvolt = <1100000>; | |
| 146 | + regulator-max-microvolt = <1850000>; | |
| 147 | + regulator-always-on; | |
| 148 | + }; | |
| 149 | + buck5: buck5 { | |
| 150 | + regulator-name = "buck5"; | |
| 151 | + regulator-min-microvolt = <1800000>; | |
| 152 | + regulator-max-microvolt = <3300000>; | |
| 153 | + regulator-always-on; | |
| 154 | + }; | |
| 155 | + ldo1: ldo1 { | |
| 156 | + regulator-name = "ldo1"; | |
| 157 | + regulator-min-microvolt = <800000>; | |
| 158 | + regulator-max-microvolt = <3300000>; | |
| 159 | + regulator-always-on; | |
| 160 | + }; | |
| 161 | + ldo2: ldo2 { | |
| 162 | + regulator-name = "ldo2"; | |
| 163 | + regulator-min-microvolt = <800000>; | |
| 164 | + regulator-max-microvolt = <3300000>; | |
| 165 | + regulator-always-on; | |
| 166 | + }; | |
| 167 | + ldo3: ldo3 { | |
| 168 | + regulator-name = "ldo3"; | |
| 169 | + regulator-min-microvolt = <800000>; | |
| 170 | + regulator-max-microvolt = <3300000>; | |
| 171 | + regulator-always-on; | |
| 172 | + }; | |
| 173 | + ldo4: ldo4 { | |
| 174 | + regulator-name = "ldo4"; | |
| 175 | + regulator-min-microvolt = <800000>; | |
| 176 | + regulator-max-microvolt = <3300000>; | |
| 177 | + regulator-always-on; | |
| 178 | + }; | |
| 179 | + ldo5: ldo5 { | |
| 180 | + regulator-name = "ldo5"; | |
| 181 | + regulator-min-microvolt = <800000>; | |
| 182 | + regulator-max-microvolt = <3300000>; | |
| 183 | + regulator-always-on; | |
| 184 | + }; | |
| 185 | + ldo6: ldodvref { | |
| 186 | + regulator-name = "ldodvref"; | |
| 187 | + regulator-always-on; | |
| 188 | + }; | |
| 189 | + ldo7: ldolpsr { | |
| 190 | + regulator-name = "ldolpsr"; | |
| 191 | + regulator-always-on; | |
| 192 | + }; | |
| 193 | + | |
| 194 | + boost: wled { | |
| 195 | + regulator-name = "wled"; | |
| 196 | + regulator-min-microamp = <10>; | |
| 197 | + regulator-max-microamp = <25000>; | |
| 198 | + }; | |
| 199 | + }; | |
| 200 | + }; | |
| 201 | + }; | |
| @@ -44,6 +44,12 @@ properties: · 43 unmodified lines | ||
| 44 | 44 | clock-output-names: |
| 45 | 45 | const: bd71828-32k-out |
| 46 | 46 | |
| 47 | + rohm,clkout-open-drain: | |
| 48 | + description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos". | |
| 49 | + $ref: "/schemas/types.yaml#/definitions/uint32" | |
| 50 | + minimum: 0 | |
| 51 | + maximum: 1 | |
| 52 | + | |
| 47 | 53 | rohm,charger-sense-resistor-ohms: |
| 48 | 54 | minimum: 10000000 |
| 49 | 55 | maximum: 50000000 |
| @@ -0,0 +1,123 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: ROHM BD9576MUF and BD9573MUF Power Management Integrated Circuit bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + BD9576MUF and BD9573MUF are power management ICs primarily intended for | |
| 14 | + powering the R-Car series processors. | |
| 15 | + The IC provides 6 power outputs with configurable sequencing and safety | |
| 16 | + monitoring. A watchdog logic with slow ping/windowed modes is also included. | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + enum: | |
| 21 | + - rohm,bd9576 | |
| 22 | + - rohm,bd9573 | |
| 23 | + | |
| 24 | + reg: | |
| 25 | + description: | |
| 26 | + I2C slave address. | |
| 27 | + maxItems: 1 | |
| 28 | + | |
| 29 | + interrupts: | |
| 30 | + maxItems: 1 | |
| 31 | + | |
| 32 | + rohm,vout1-en-low: | |
| 33 | + description: | |
| 34 | + BD9576 and BD9573 VOUT1 regulator enable state can be individually | |
| 35 | + controlled by a GPIO. This is dictated by state of vout1-en pin during | |
| 36 | + the PMIC startup. If vout1-en is LOW during PMIC startup then the VOUT1 | |
| 37 | + enable sate is controlled via this pin. Set this property if vout1-en | |
| 38 | + is wired to be down at PMIC start-up. | |
| 39 | + type: boolean | |
| 40 | + | |
| 41 | + rohm,vout1-en-gpios: | |
| 42 | + description: | |
| 43 | + GPIO specifier to specify the GPIO connected to vout1-en for vout1 ON/OFF | |
| 44 | + state control. | |
| 45 | + maxItems: 1 | |
| 46 | + | |
| 47 | + rohm,ddr-sel-low: | |
| 48 | + description: | |
| 49 | + The BD9576 and BD9573 output voltage for DDR can be selected by setting | |
| 50 | + the ddr-sel pin low or high. Set this property if ddr-sel is grounded. | |
| 51 | + type: boolean | |
| 52 | + | |
| 53 | + rohm,watchdog-enable-gpios: | |
| 54 | + description: The GPIO line used to enable the watchdog. | |
| 55 | + maxItems: 1 | |
| 56 | + | |
| 57 | + rohm,watchdog-ping-gpios: | |
| 58 | + description: The GPIO line used to ping the watchdog. | |
| 59 | + maxItems: 1 | |
| 60 | + | |
| 61 | + rohm,hw-timeout-ms: | |
| 62 | + maxItems: 2 | |
| 63 | + description: | |
| 64 | + Watchog timeout in milliseconds. If single value is given it is | |
| 65 | + the maximum timeout. Eg. if pinging watchdog is not done within this time | |
| 66 | + limit the watchdog will be triggered. If two values are given watchdog | |
| 67 | + is configured in "window mode". Then first value is limit for short-ping | |
| 68 | + Eg. if watchdog is pinged sooner than that the watchdog will trigger. | |
| 69 | + When two values is given the second value is the maximum timeout. | |
| 70 | + # (HW) minimum for short timeout is 2ms, maximum 220 ms. | |
| 71 | + # (HW) minimum for max timeout is 4ms, maximum 4416 ms. | |
| 72 | + | |
| 73 | + regulators: | |
| 74 | + $ref: ../regulator/rohm,bd9576-regulator.yaml | |
| 75 | + description: | |
| 76 | + List of child nodes that specify the regulators. | |
| 77 | + | |
| 78 | +required: | |
| 79 | + - compatible | |
| 80 | + - reg | |
| 81 | + - regulators | |
| 82 | + | |
| 83 | +additionalProperties: false | |
| 84 | + | |
| 85 | +examples: | |
| 86 | + - | | |
| 87 | + #include <dt-bindings/gpio/gpio.h> | |
| 88 | + #include <dt-bindings/leds/common.h> | |
| 89 | + i2c { | |
| 90 | + #address-cells = <1>; | |
| 91 | + #size-cells = <0>; | |
| 92 | + pmic: pmic@30 { | |
| 93 | + compatible = "rohm,bd9576"; | |
| 94 | + reg = <0x30>; | |
| 95 | + rohm,vout1-en-low; | |
| 96 | + rohm,vout1-en-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; | |
| 97 | + rohm,ddr-sel-low; | |
| 98 | + rohm,watchdog-enable-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; | |
| 99 | + rohm,watchdog-ping-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; | |
| 100 | + rohm,hw-timeout-ms = <150>, <2300>; | |
| 101 | + | |
| 102 | + regulators { | |
| 103 | + boost1: regulator-vd50 { | |
| 104 | + regulator-name = "VD50"; | |
| 105 | + }; | |
| 106 | + buck1: regulator-vd18 { | |
| 107 | + regulator-name = "VD18"; | |
| 108 | + }; | |
| 109 | + buck2: regulator-vdddr { | |
| 110 | + regulator-name = "VDDDR"; | |
| 111 | + }; | |
| 112 | + buck3: regulator-vd10 { | |
| 113 | + regulator-name = "VD10"; | |
| 114 | + }; | |
| 115 | + ldo: regulator-voutl1 { | |
| 116 | + regulator-name = "VOUTL1"; | |
| 117 | + }; | |
| 118 | + sw: regulator-vouts1 { | |
| 119 | + regulator-name = "VOUTS1"; | |
| 120 | + }; | |
| 121 | + }; | |
| 122 | + }; | |
| 123 | + }; | |
| @@ -17,6 +17,10 @@ properties: · 16 unmodified lines | ||
| 17 | 17 | description: I2C slave address |
| 18 | 18 | const: 0x60 |
| 19 | 19 | |
| 20 | + reset-gpios: | |
| 21 | + description: GPIO connected to NRST pin (active low reset, pin 20) | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 20 | 24 | gpio-controller: true |
| 21 | 25 | |
| 22 | 26 | '#gpio-cells': |
| @@ -17,6 +17,10 @@ properties: · 16 unmodified lines | ||
| 17 | 17 | description: I2C slave address |
| 18 | 18 | const: 0x60 |
| 19 | 19 | |
| 20 | + reset-gpios: | |
| 21 | + description: GPIO connected to NRST pin (active low reset, pin 20) | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 20 | 24 | gpio-controller: true |
| 21 | 25 | |
| 22 | 26 | '#gpio-cells': |
| @@ -19,6 +19,10 @@ properties: · 18 unmodified lines | ||
| 19 | 19 | description: I2C slave address |
| 20 | 20 | const: 0x60 |
| 21 | 21 | |
| 22 | + reset-gpios: | |
| 23 | + description: GPIO connected to NRST pin (active low reset, pin 20) | |
| 24 | + maxItems: 1 | |
| 25 | + | |
| 22 | 26 | gpio-controller: true |
| 23 | 27 | |
| 24 | 28 | '#gpio-cells': |
| @@ -0,0 +1,63 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mmc/brcm,iproc-sdhci.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom IPROC SDHCI controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ray Jui <ray.jui@broadcom.com> | |
| 11 | + - Scott Branden <scott.branden@broadcom.com> | |
| 12 | + - Nicolas Saenz Julienne <nsaenz@kernel.org> | |
| 13 | + | |
| 14 | +allOf: | |
| 15 | + - $ref: mmc-controller.yaml# | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + enum: | |
| 20 | + - brcm,bcm2835-sdhci | |
| 21 | + - brcm,bcm2711-emmc2 | |
| 22 | + - brcm,sdhci-iproc-cygnus | |
| 23 | + - brcm,sdhci-iproc | |
| 24 | + | |
| 25 | + reg: | |
| 26 | + minItems: 1 | |
| 27 | + | |
| 28 | + interrupts: | |
| 29 | + maxItems: 1 | |
| 30 | + | |
| 31 | + clocks: | |
| 32 | + maxItems: 1 | |
| 33 | + description: | |
| 34 | + Handle to core clock for the sdhci controller. | |
| 35 | + | |
| 36 | + sdhci,auto-cmd12: | |
| 37 | + type: boolean | |
| 38 | + description: Specifies that controller should use auto CMD12 | |
| 39 | + | |
| 40 | +required: | |
| 41 | + - compatible | |
| 42 | + - reg | |
| 43 | + - interrupts | |
| 44 | + - clocks | |
| 45 | + | |
| 46 | +unevaluatedProperties: false | |
| 47 | + | |
| 48 | +examples: | |
| 49 | + - | | |
| 50 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 51 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 52 | + #include <dt-bindings/clock/bcm-cygnus.h> | |
| 53 | + | |
| 54 | + mmc@18041000 { | |
| 55 | + compatible = "brcm,sdhci-iproc-cygnus"; | |
| 56 | + reg = <0x18041000 0x100>; | |
| 57 | + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 58 | + clocks = <&lcpll0_clks BCM_CYGNUS_LCPLL0_SDIO_CLK>; | |
| 59 | + bus-width = <4>; | |
| 60 | + sdhci,auto-cmd12; | |
| 61 | + no-1-8-v; | |
| 62 | + }; | |
| 63 | +... | |
| @@ -1,37 +0,0 @@ | ||
| 1 | −Broadcom IPROC SDHCI controller | |
| 2 | − | |
| 3 | −This file documents differences between the core properties described | |
| 4 | −by mmc.txt and the properties that represent the IPROC SDHCI controller. | |
| 5 | − | |
| 6 | −Required properties: | |
| 7 | −- compatible : Should be one of the following | |
| 8 | − "brcm,bcm2835-sdhci" | |
| 9 | − "brcm,bcm2711-emmc2" | |
| 10 | − "brcm,sdhci-iproc-cygnus" | |
| 11 | − "brcm,sdhci-iproc" | |
| 12 | − | |
| 13 | −Use brcm2835-sdhci for the eMMC controller on the BCM2835 (Raspberry Pi) and | |
| 14 | −bcm2711-emmc2 for the additional eMMC2 controller on BCM2711. | |
| 15 | − | |
| 16 | −Use sdhci-iproc-cygnus for Broadcom SDHCI Controllers | |
| 17 | −restricted to 32bit host accesses to SDHCI registers. | |
| 18 | − | |
| 19 | −Use sdhci-iproc for Broadcom SDHCI Controllers that allow standard | |
| 20 | −8, 16, 32-bit host access to SDHCI register. | |
| 21 | − | |
| 22 | −- clocks : The clock feeding the SDHCI controller. | |
| 23 | − | |
| 24 | −Optional properties: | |
| 25 | − - sdhci,auto-cmd12: specifies that controller should use auto CMD12. | |
| 26 | − | |
| 27 | −Example: | |
| 28 | − | |
| 29 | −sdhci0: sdhci@18041000 { | |
| 30 | − compatible = "brcm,sdhci-iproc-cygnus"; | |
| 31 | − reg = <0x18041000 0x100>; | |
| 32 | − interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; | |
| 33 | − clocks = <&lcpll0_clks BCM_CYGNUS_LCPLL0_SDIO_CLK>; | |
| 34 | − bus-width = <4>; | |
| 35 | − sdhci,auto-cmd12; | |
| 36 | − no-1-8-v; | |
| 37 | −}; | |
| @@ -103,6 +103,26 @@ properties: · 102 unmodified lines | ||
| 103 | 103 | Only eMMC HS400 mode need to take care of this property. |
| 104 | 104 | default: 0 |
| 105 | 105 | |
| 106 | + clocks: | |
| 107 | + maxItems: 3 | |
| 108 | + description: | |
| 109 | + Handle clocks for the sdhc controller. | |
| 110 | + | |
| 111 | + clock-names: | |
| 112 | + items: | |
| 113 | + - const: ipg | |
| 114 | + - const: ahb | |
| 115 | + - const: per | |
| 116 | + | |
| 117 | + pinctrl-names: | |
| 118 | + minItems: 1 | |
| 119 | + maxItems: 4 | |
| 120 | + items: | |
| 121 | + - const: default | |
| 122 | + - const: state_100mhz | |
| 123 | + - const: state_200mhz | |
| 124 | + - const: sleep | |
| 125 | + | |
| 106 | 126 | required: |
| 107 | 127 | - compatible |
| 108 | 128 | - reg |
| @@ -5,11 +5,11 @@ by mmc.txt and the properties used by the mmc_spi driver. · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | Required properties: |
| 7 | 7 | - spi-max-frequency : maximum frequency for this device (Hz). |
| 8 | −- voltage-ranges : two cells are required, first cell specifies minimum | |
| 9 | − slot voltage (mV), second cell specifies maximum slot voltage (mV). | |
| 10 | − Several ranges could be specified. | |
| 11 | 8 | |
| 12 | 9 | Optional properties: |
| 10 | +- voltage-ranges : two cells are required, first cell specifies minimum | |
| 11 | + slot voltage (mV), second cell specifies maximum slot voltage (mV). | |
| 12 | + Several ranges could be specified. If not provided, 3.2v..3.4v is assumed. | |
| 13 | 13 | - gpios : may specify GPIOs in this order: Card-Detect GPIO, |
| 14 | 14 | Write-Protect GPIO. Note that this does not follow the |
| 15 | 15 | binding from mmc.txt, for historical reasons. |
| @@ -31,6 +31,7 @@ properties: · 30 unmodified lines | ||
| 31 | 31 | - const: mediatek,mt2701-mmc |
| 32 | 32 | - items: |
| 33 | 33 | - const: mediatek,mt8192-mmc |
| 34 | + - const: mediatek,mt8195-mmc | |
| 34 | 35 | - const: mediatek,mt8183-mmc |
| 35 | 36 | |
| 36 | 37 | clocks: |
| @@ -1,20 +0,0 @@ | ||
| 1 | −* Synopsys DesignWare Cores Mobile Storage Host Controller | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: should be one of the following: | |
| 5 | − "snps,dwcmshc-sdhci" | |
| 6 | −- reg: offset and length of the register set for the device. | |
| 7 | −- interrupts: a single interrupt specifier. | |
| 8 | −- clocks: Array of clocks required for SDHCI; requires at least one for | |
| 9 | − core clock. | |
| 10 | −- clock-names: Array of names corresponding to clocks property; shall be | |
| 11 | − "core" for core clock and "bus" for optional bus clock. | |
| 12 | − | |
| 13 | −Example: | |
| 14 | − sdhci2: sdhci@aa0000 { | |
| 15 | − compatible = "snps,dwcmshc-sdhci"; | |
| 16 | − reg = <0xaa0000 0x1000>; | |
| 17 | − interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | |
| 18 | − clocks = <&emmcclk>; | |
| 19 | − bus-width = <8>; | |
| 20 | − } | |
| @@ -0,0 +1,87 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Synopsys Designware Mobile Storage Host Controller Binding | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Ulf Hansson <ulf.hansson@linaro.org> | |
| 11 | + - Jisheng Zhang <Jisheng.Zhang@synaptics.com> | |
| 12 | + | |
| 13 | +allOf: | |
| 14 | + - $ref: mmc-controller.yaml# | |
| 15 | + | |
| 16 | +properties: | |
| 17 | + compatible: | |
| 18 | + enum: | |
| 19 | + - rockchip,rk3568-dwcmshc | |
| 20 | + - snps,dwcmshc-sdhci | |
| 21 | + | |
| 22 | + reg: | |
| 23 | + minItems: 1 | |
| 24 | + items: | |
| 25 | + - description: Offset and length of the register set for the device | |
| 26 | + | |
| 27 | + interrupts: | |
| 28 | + maxItems: 1 | |
| 29 | + | |
| 30 | + clocks: | |
| 31 | + minItems: 1 | |
| 32 | + items: | |
| 33 | + - description: core clock | |
| 34 | + - description: bus clock for optional | |
| 35 | + - description: axi clock for rockchip specified | |
| 36 | + - description: block clock for rockchip specified | |
| 37 | + - description: timer clock for rockchip specified | |
| 38 | + | |
| 39 | + | |
| 40 | + clock-names: | |
| 41 | + minItems: 1 | |
| 42 | + items: | |
| 43 | + - const: core | |
| 44 | + - const: bus | |
| 45 | + - const: axi | |
| 46 | + - const: block | |
| 47 | + - const: timer | |
| 48 | + | |
| 49 | + rockchip,txclk-tapnum: | |
| 50 | + description: Specify the number of delay for tx sampling. | |
| 51 | + $ref: /schemas/types.yaml#/definitions/uint8 | |
| 52 | + | |
| 53 | + | |
| 54 | +required: | |
| 55 | + - compatible | |
| 56 | + - reg | |
| 57 | + - interrupts | |
| 58 | + - clocks | |
| 59 | + - clock-names | |
| 60 | + | |
| 61 | +unevaluatedProperties: false | |
| 62 | + | |
| 63 | +examples: | |
| 64 | + - | | |
| 65 | + mmc@fe310000 { | |
| 66 | + compatible = "rockchip,rk3568-dwcmshc"; | |
| 67 | + reg = <0xfe310000 0x10000>; | |
| 68 | + interrupts = <0 25 0x4>; | |
| 69 | + clocks = <&cru 17>, <&cru 18>, <&cru 19>, <&cru 20>, <&cru 21>; | |
| 70 | + clock-names = "core", "bus", "axi", "block", "timer"; | |
| 71 | + bus-width = <8>; | |
| 72 | + #address-cells = <1>; | |
| 73 | + #size-cells = <0>; | |
| 74 | + }; | |
| 75 | + - | | |
| 76 | + mmc@aa0000 { | |
| 77 | + compatible = "snps,dwcmshc-sdhci"; | |
| 78 | + reg = <0xaa000 0x1000>; | |
| 79 | + interrupts = <0 25 0x4>; | |
| 80 | + clocks = <&cru 17>, <&cru 18>; | |
| 81 | + clock-names = "core", "bus"; | |
| 82 | + bus-width = <8>; | |
| 83 | + #address-cells = <1>; | |
| 84 | + #size-cells = <0>; | |
| 85 | + }; | |
| 86 | + | |
| 87 | +... | |
| @@ -143,6 +143,13 @@ patternProperties: · 142 unmodified lines | ||
| 143 | 143 | Ready/Busy pins. Active state refers to the NAND ready state and |
| 144 | 144 | should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. |
| 145 | 145 | |
| 146 | + secure-regions: | |
| 147 | + $ref: /schemas/types.yaml#/definitions/uint64-matrix | |
| 148 | + description: | |
| 149 | + Regions in the NAND chip which are protected using a secure element | |
| 150 | + like Trustzone. This property contains the start address and size of | |
| 151 | + the secure regions present. | |
| 152 | + | |
| 146 | 153 | required: |
| 147 | 154 | - reg |
| 148 | 155 | |
| @@ -0,0 +1,74 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mtd/partitions/linksys,ns-partitions.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Linksys Northstar partitioning | |
| 8 | + | |
| 9 | +description: | | |
| 10 | + Linksys devices based on Broadcom Northstar architecture often use two | |
| 11 | + firmware partitions. One is used for regular booting, the other is treated as | |
| 12 | + fallback. | |
| 13 | + | |
| 14 | + This binding allows defining all fixed partitions and marking those containing | |
| 15 | + firmware. System can use that information e.g. for booting or flashing | |
| 16 | + purposes. | |
| 17 | + | |
| 18 | +maintainers: | |
| 19 | + - Rafał Miłecki <rafal@milecki.pl> | |
| 20 | + | |
| 21 | +properties: | |
| 22 | + compatible: | |
| 23 | + const: linksys,ns-partitions | |
| 24 | + | |
| 25 | + "#address-cells": | |
| 26 | + enum: [ 1, 2 ] | |
| 27 | + | |
| 28 | + "#size-cells": | |
| 29 | + enum: [ 1, 2 ] | |
| 30 | + | |
| 31 | +patternProperties: | |
| 32 | + "^partition@[0-9a-f]+$": | |
| 33 | + $ref: "partition.yaml#" | |
| 34 | + properties: | |
| 35 | + compatible: | |
| 36 | + items: | |
| 37 | + - const: linksys,ns-firmware | |
| 38 | + - const: brcm,trx | |
| 39 | + unevaluatedProperties: false | |
| 40 | + | |
| 41 | +required: | |
| 42 | + - "#address-cells" | |
| 43 | + - "#size-cells" | |
| 44 | + | |
| 45 | +additionalProperties: false | |
| 46 | + | |
| 47 | +examples: | |
| 48 | + - | | |
| 49 | + partitions { | |
| 50 | + compatible = "linksys,ns-partitions"; | |
| 51 | + #address-cells = <1>; | |
| 52 | + #size-cells = <1>; | |
| 53 | + | |
| 54 | + partition@0 { | |
| 55 | + label = "boot"; | |
| 56 | + reg = <0x0 0x100000>; | |
| 57 | + read-only; | |
| 58 | + }; | |
| 59 | + | |
| 60 | + partition@100000 { | |
| 61 | + label = "nvram"; | |
| 62 | + reg = <0x100000 0x100000>; | |
| 63 | + }; | |
| 64 | + | |
| 65 | + partition@200000 { | |
| 66 | + compatible = "linksys,ns-firmware", "brcm,trx"; | |
| 67 | + reg = <0x200000 0xf00000>; | |
| 68 | + }; | |
| 69 | + | |
| 70 | + partition@1100000 { | |
| 71 | + compatible = "linksys,ns-firmware", "brcm,trx"; | |
| 72 | + reg = <0x1100000 0xf00000>; | |
| 73 | + }; | |
| 74 | + }; | |
| @@ -0,0 +1,99 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mtd/partitions/nvmem-cells.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Nvmem cells | |
| 8 | + | |
| 9 | +description: | | |
| 10 | + Any partition containing the compatible "nvmem-cells" will register as a | |
| 11 | + nvmem provider. | |
| 12 | + Each direct subnodes represents a nvmem cell following the nvmem binding. | |
| 13 | + Nvmem binding to declare nvmem-cells can be found in: | |
| 14 | + Documentation/devicetree/bindings/nvmem/nvmem.yaml | |
| 15 | + | |
| 16 | +maintainers: | |
| 17 | + - Ansuel Smith <ansuelsmth@gmail.com> | |
| 18 | + | |
| 19 | +allOf: | |
| 20 | + - $ref: /schemas/nvmem/nvmem.yaml# | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + compatible: | |
| 24 | + const: nvmem-cells | |
| 25 | + | |
| 26 | +required: | |
| 27 | + - compatible | |
| 28 | + | |
| 29 | +additionalProperties: true | |
| 30 | + | |
| 31 | +examples: | |
| 32 | + - | | |
| 33 | + partitions { | |
| 34 | + compatible = "fixed-partitions"; | |
| 35 | + #address-cells = <1>; | |
| 36 | + #size-cells = <1>; | |
| 37 | + | |
| 38 | + /* ... */ | |
| 39 | + | |
| 40 | + }; | |
| 41 | + art: art@1200000 { | |
| 42 | + compatible = "nvmem-cells"; | |
| 43 | + reg = <0x1200000 0x0140000>; | |
| 44 | + label = "art"; | |
| 45 | + read-only; | |
| 46 | + #address-cells = <1>; | |
| 47 | + #size-cells = <1>; | |
| 48 | + | |
| 49 | + macaddr_gmac1: macaddr_gmac1@0 { | |
| 50 | + reg = <0x0 0x6>; | |
| 51 | + }; | |
| 52 | + | |
| 53 | + macaddr_gmac2: macaddr_gmac2@6 { | |
| 54 | + reg = <0x6 0x6>; | |
| 55 | + }; | |
| 56 | + | |
| 57 | + pre_cal_24g: pre_cal_24g@1000 { | |
| 58 | + reg = <0x1000 0x2f20>; | |
| 59 | + }; | |
| 60 | + | |
| 61 | + pre_cal_5g: pre_cal_5g@5000{ | |
| 62 | + reg = <0x5000 0x2f20>; | |
| 63 | + }; | |
| 64 | + }; | |
| 65 | + - | | |
| 66 | + partitions { | |
| 67 | + compatible = "fixed-partitions"; | |
| 68 | + #address-cells = <1>; | |
| 69 | + #size-cells = <1>; | |
| 70 | + | |
| 71 | + partition@0 { | |
| 72 | + label = "bootloader"; | |
| 73 | + reg = <0x000000 0x100000>; | |
| 74 | + read-only; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + firmware@100000 { | |
| 78 | + compatible = "brcm,trx"; | |
| 79 | + label = "firmware"; | |
| 80 | + reg = <0x100000 0xe00000>; | |
| 81 | + }; | |
| 82 | + | |
| 83 | + calibration@f00000 { | |
| 84 | + compatible = "nvmem-cells"; | |
| 85 | + label = "calibration"; | |
| 86 | + reg = <0xf00000 0x100000>; | |
| 87 | + ranges = <0 0xf00000 0x100000>; | |
| 88 | + #address-cells = <1>; | |
| 89 | + #size-cells = <1>; | |
| 90 | + | |
| 91 | + wifi0@0 { | |
| 92 | + reg = <0x000000 0x080000>; | |
| 93 | + }; | |
| 94 | + | |
| 95 | + wifi1@80000 { | |
| 96 | + reg = <0x080000 0x080000>; | |
| 97 | + }; | |
| 98 | + }; | |
| 99 | + }; | |
| @@ -0,0 +1,196 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/mtd/qcom,nandc.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Qualcomm NAND controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | |
| 11 | + | |
| 12 | +properties: | |
| 13 | + compatible: | |
| 14 | + enum: | |
| 15 | + - qcom,ipq806x-nand | |
| 16 | + - qcom,ipq4019-nand | |
| 17 | + - qcom,ipq6018-nand | |
| 18 | + - qcom,ipq8074-nand | |
| 19 | + - qcom,sdx55-nand | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 1 | |
| 23 | + | |
| 24 | + clocks: | |
| 25 | + items: | |
| 26 | + - description: Core Clock | |
| 27 | + - description: Always ON Clock | |
| 28 | + | |
| 29 | + clock-names: | |
| 30 | + items: | |
| 31 | + - const: core | |
| 32 | + - const: aon | |
| 33 | + | |
| 34 | + "#address-cells": true | |
| 35 | + "#size-cells": true | |
| 36 | + | |
| 37 | +patternProperties: | |
| 38 | + "^nand@[a-f0-9]$": | |
| 39 | + type: object | |
| 40 | + properties: | |
| 41 | + nand-bus-width: | |
| 42 | + const: 8 | |
| 43 | + | |
| 44 | + nand-ecc-strength: | |
| 45 | + enum: [1, 4, 8] | |
| 46 | + | |
| 47 | + nand-ecc-step-size: | |
| 48 | + enum: | |
| 49 | + - 512 | |
| 50 | + | |
| 51 | +allOf: | |
| 52 | + - $ref: "nand-controller.yaml#" | |
| 53 | + | |
| 54 | + - if: | |
| 55 | + properties: | |
| 56 | + compatible: | |
| 57 | + contains: | |
| 58 | + const: qcom,ipq806x-nand | |
| 59 | + then: | |
| 60 | + properties: | |
| 61 | + dmas: | |
| 62 | + items: | |
| 63 | + - description: rxtx DMA channel | |
| 64 | + | |
| 65 | + dma-names: | |
| 66 | + items: | |
| 67 | + - const: rxtx | |
| 68 | + | |
| 69 | + qcom,cmd-crci: | |
| 70 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 71 | + description: | |
| 72 | + Must contain the ADM command type CRCI block instance number | |
| 73 | + specified for the NAND controller on the given platform | |
| 74 | + | |
| 75 | + qcom,data-crci: | |
| 76 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 77 | + description: | |
| 78 | + Must contain the ADM data type CRCI block instance number | |
| 79 | + specified for the NAND controller on the given platform | |
| 80 | + | |
| 81 | + - if: | |
| 82 | + properties: | |
| 83 | + compatible: | |
| 84 | + contains: | |
| 85 | + enum: | |
| 86 | + - qcom,ipq4019-nand | |
| 87 | + - qcom,ipq6018-nand | |
| 88 | + - qcom,ipq8074-nand | |
| 89 | + - qcom,sdx55-nand | |
| 90 | + | |
| 91 | + then: | |
| 92 | + properties: | |
| 93 | + dmas: | |
| 94 | + items: | |
| 95 | + - description: tx DMA channel | |
| 96 | + - description: rx DMA channel | |
| 97 | + - description: cmd DMA channel | |
| 98 | + | |
| 99 | + dma-names: | |
| 100 | + items: | |
| 101 | + - const: tx | |
| 102 | + - const: rx | |
| 103 | + - const: cmd | |
| 104 | + | |
| 105 | +required: | |
| 106 | + - compatible | |
| 107 | + - reg | |
| 108 | + - clocks | |
| 109 | + - clock-names | |
| 110 | + | |
| 111 | +unevaluatedProperties: false | |
| 112 | + | |
| 113 | +examples: | |
| 114 | + - | | |
| 115 | + #include <dt-bindings/clock/qcom,gcc-ipq806x.h> | |
| 116 | + nand-controller@1ac00000 { | |
| 117 | + compatible = "qcom,ipq806x-nand"; | |
| 118 | + reg = <0x1ac00000 0x800>; | |
| 119 | + | |
| 120 | + clocks = <&gcc EBI2_CLK>, | |
| 121 | + <&gcc EBI2_AON_CLK>; | |
| 122 | + clock-names = "core", "aon"; | |
| 123 | + | |
| 124 | + dmas = <&adm_dma 3>; | |
| 125 | + dma-names = "rxtx"; | |
| 126 | + qcom,cmd-crci = <15>; | |
| 127 | + qcom,data-crci = <3>; | |
| 128 | + | |
| 129 | + #address-cells = <1>; | |
| 130 | + #size-cells = <0>; | |
| 131 | + | |
| 132 | + nand@0 { | |
| 133 | + reg = <0>; | |
| 134 | + | |
| 135 | + nand-ecc-strength = <4>; | |
| 136 | + nand-bus-width = <8>; | |
| 137 | + | |
| 138 | + partitions { | |
| 139 | + compatible = "fixed-partitions"; | |
| 140 | + #address-cells = <1>; | |
| 141 | + #size-cells = <1>; | |
| 142 | + | |
| 143 | + partition@0 { | |
| 144 | + label = "boot-nand"; | |
| 145 | + reg = <0 0x58a0000>; | |
| 146 | + }; | |
| 147 | + | |
| 148 | + partition@58a0000 { | |
| 149 | + label = "fs-nand"; | |
| 150 | + reg = <0x58a0000 0x4000000>; | |
| 151 | + }; | |
| 152 | + }; | |
| 153 | + }; | |
| 154 | + }; | |
| 155 | + | |
| 156 | + #include <dt-bindings/clock/qcom,gcc-ipq4019.h> | |
| 157 | + nand-controller@79b0000 { | |
| 158 | + compatible = "qcom,ipq4019-nand"; | |
| 159 | + reg = <0x79b0000 0x1000>; | |
| 160 | + | |
| 161 | + clocks = <&gcc GCC_QPIC_CLK>, | |
| 162 | + <&gcc GCC_QPIC_AHB_CLK>; | |
| 163 | + clock-names = "core", "aon"; | |
| 164 | + | |
| 165 | + dmas = <&qpicbam 0>, | |
| 166 | + <&qpicbam 1>, | |
| 167 | + <&qpicbam 2>; | |
| 168 | + dma-names = "tx", "rx", "cmd"; | |
| 169 | + | |
| 170 | + #address-cells = <1>; | |
| 171 | + #size-cells = <0>; | |
| 172 | + | |
| 173 | + nand@0 { | |
| 174 | + reg = <0>; | |
| 175 | + nand-ecc-strength = <4>; | |
| 176 | + nand-bus-width = <8>; | |
| 177 | + | |
| 178 | + partitions { | |
| 179 | + compatible = "fixed-partitions"; | |
| 180 | + #address-cells = <1>; | |
| 181 | + #size-cells = <1>; | |
| 182 | + | |
| 183 | + partition@0 { | |
| 184 | + label = "boot-nand"; | |
| 185 | + reg = <0 0x58a0000>; | |
| 186 | + }; | |
| 187 | + | |
| 188 | + partition@58a0000 { | |
| 189 | + label = "fs-nand"; | |
| 190 | + reg = <0x58a0000 0x4000000>; | |
| 191 | + }; | |
| 192 | + }; | |
| 193 | + }; | |
| 194 | + }; | |
| 195 | + | |
| 196 | +... | |
| @@ -1,142 +0,0 @@ | ||
| 1 | −* Qualcomm NAND controller | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | −- compatible: must be one of the following: | |
| 5 | − * "qcom,ipq806x-nand" - for EBI2 NAND controller being used in IPQ806x | |
| 6 | − SoC and it uses ADM DMA | |
| 7 | − * "qcom,ipq4019-nand" - for QPIC NAND controller v1.4.0 being used in | |
| 8 | − IPQ4019 SoC and it uses BAM DMA | |
| 9 | − * "qcom,ipq6018-nand" - for QPIC NAND controller v1.5.0 being used in | |
| 10 | − IPQ6018 SoC and it uses BAM DMA | |
| 11 | − * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in | |
| 12 | − IPQ8074 SoC and it uses BAM DMA | |
| 13 | − * "qcom,sdx55-nand" - for QPIC NAND controller v2.0.0 being used in | |
| 14 | − SDX55 SoC and it uses BAM DMA | |
| 15 | − | |
| 16 | −- reg: MMIO address range | |
| 17 | −- clocks: must contain core clock and always on clock | |
| 18 | −- clock-names: must contain "core" for the core clock and "aon" for the | |
| 19 | − always on clock | |
| 20 | − | |
| 21 | −EBI2 specific properties: | |
| 22 | −- dmas: DMA specifier, consisting of a phandle to the ADM DMA | |
| 23 | − controller node and the channel number to be used for | |
| 24 | − NAND. Refer to dma.txt and qcom_adm.txt for more details | |
| 25 | −- dma-names: must be "rxtx" | |
| 26 | −- qcom,cmd-crci: must contain the ADM command type CRCI block instance | |
| 27 | − number specified for the NAND controller on the given | |
| 28 | − platform | |
| 29 | −- qcom,data-crci: must contain the ADM data type CRCI block instance | |
| 30 | − number specified for the NAND controller on the given | |
| 31 | − platform | |
| 32 | − | |
| 33 | −QPIC specific properties: | |
| 34 | −- dmas: DMA specifier, consisting of a phandle to the BAM DMA | |
| 35 | − and the channel number to be used for NAND. Refer to | |
| 36 | − dma.txt, qcom_bam_dma.txt for more details | |
| 37 | −- dma-names: must contain all 3 channel names : "tx", "rx", "cmd" | |
| 38 | −- #address-cells: <1> - subnodes give the chip-select number | |
| 39 | −- #size-cells: <0> | |
| 40 | − | |
| 41 | −* NAND chip-select | |
| 42 | − | |
| 43 | −Each controller may contain one or more subnodes to represent enabled | |
| 44 | −chip-selects which (may) contain NAND flash chips. Their properties are as | |
| 45 | −follows. | |
| 46 | − | |
| 47 | −Required properties: | |
| 48 | −- reg: a single integer representing the chip-select | |
| 49 | − number (e.g., 0, 1, 2, etc.) | |
| 50 | −- #address-cells: see partition.txt | |
| 51 | −- #size-cells: see partition.txt | |
| 52 | − | |
| 53 | −Optional properties: | |
| 54 | −- nand-bus-width: see nand-controller.yaml | |
| 55 | −- nand-ecc-strength: see nand-controller.yaml. If not specified, then ECC strength will | |
| 56 | − be used according to chip requirement and available | |
| 57 | − OOB size. | |
| 58 | − | |
| 59 | −Each nandcs device node may optionally contain a 'partitions' sub-node, which | |
| 60 | −further contains sub-nodes describing the flash partition mapping. See | |
| 61 | −partition.txt for more detail. | |
| 62 | − | |
| 63 | −Example: | |
| 64 | − | |
| 65 | −nand-controller@1ac00000 { | |
| 66 | − compatible = "qcom,ipq806x-nand"; | |
| 67 | − reg = <0x1ac00000 0x800>; | |
| 68 | − | |
| 69 | − clocks = <&gcc EBI2_CLK>, | |
| 70 | − <&gcc EBI2_AON_CLK>; | |
| 71 | − clock-names = "core", "aon"; | |
| 72 | − | |
| 73 | − dmas = <&adm_dma 3>; | |
| 74 | − dma-names = "rxtx"; | |
| 75 | − qcom,cmd-crci = <15>; | |
| 76 | − qcom,data-crci = <3>; | |
| 77 | − | |
| 78 | − #address-cells = <1>; | |
| 79 | − #size-cells = <0>; | |
| 80 | − | |
| 81 | − nand@0 { | |
| 82 | − reg = <0>; | |
| 83 | − | |
| 84 | − nand-ecc-strength = <4>; | |
| 85 | − nand-bus-width = <8>; | |
| 86 | − | |
| 87 | − partitions { | |
| 88 | − compatible = "fixed-partitions"; | |
| 89 | − #address-cells = <1>; | |
| 90 | − #size-cells = <1>; | |
| 91 | − | |
| 92 | − partition@0 { | |
| 93 | − label = "boot-nand"; | |
| 94 | − reg = <0 0x58a0000>; | |
| 95 | − }; | |
| 96 | − | |
| 97 | − partition@58a0000 { | |
| 98 | − label = "fs-nand"; | |
| 99 | − reg = <0x58a0000 0x4000000>; | |
| 100 | − }; | |
| 101 | − }; | |
| 102 | − }; | |
| 103 | −}; | |
| 104 | − | |
| 105 | −nand-controller@79b0000 { | |
| 106 | − compatible = "qcom,ipq4019-nand"; | |
| 107 | − reg = <0x79b0000 0x1000>; | |
| 108 | − | |
| 109 | − clocks = <&gcc GCC_QPIC_CLK>, | |
| 110 | − <&gcc GCC_QPIC_AHB_CLK>; | |
| 111 | − clock-names = "core", "aon"; | |
| 112 | − | |
| 113 | − dmas = <&qpicbam 0>, | |
| 114 | − <&qpicbam 1>, | |
| 115 | − <&qpicbam 2>; | |
| 116 | − dma-names = "tx", "rx", "cmd"; | |
| 117 | − | |
| 118 | − #address-cells = <1>; | |
| 119 | − #size-cells = <0>; | |
| 120 | − | |
| 121 | − nand@0 { | |
| 122 | − reg = <0>; | |
| 123 | − nand-ecc-strength = <4>; | |
| 124 | − nand-bus-width = <8>; | |
| 125 | − | |
| 126 | − partitions { | |
| 127 | − compatible = "fixed-partitions"; | |
| 128 | − #address-cells = <1>; | |
| 129 | − #size-cells = <1>; | |
| 130 | − | |
| 131 | − partition@0 { | |
| 132 | − label = "boot-nand"; | |
| 133 | − reg = <0 0x58a0000>; | |
| 134 | − }; | |
| 135 | − | |
| 136 | − partition@58a0000 { | |
| 137 | − label = "fs-nand"; | |
| 138 | − reg = <0x58a0000 0x4000000>; | |
| 139 | − }; | |
| 140 | − }; | |
| 141 | − }; | |
| 142 | −}; | |
| @@ -1,38 +0,0 @@ | ||
| 1 | −Sigma Designs Tango4 NAND Flash Controller (NFC) | |
| 2 | − | |
| 3 | −Required properties: | |
| 4 | − | |
| 5 | −- compatible: "sigma,smp8758-nand" | |
| 6 | −- reg: address/size of nfc_reg, nfc_mem, and pbus_reg | |
| 7 | −- dmas: reference to the DMA channel used by the controller | |
| 8 | −- dma-names: "rxtx" | |
| 9 | −- clocks: reference to the system clock | |
| 10 | −- #address-cells: <1> | |
| 11 | −- #size-cells: <0> | |
| 12 | − | |
| 13 | −Children nodes represent the available NAND chips. | |
| 14 | −See Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings. | |
| 15 | − | |
| 16 | −Example: | |
| 17 | − | |
| 18 | − nandc: nand-controller@2c000 { | |
| 19 | − compatible = "sigma,smp8758-nand"; | |
| 20 | − reg = <0x2c000 0x30>, <0x2d000 0x800>, <0x20000 0x1000>; | |
| 21 | − dmas = <&dma0 3>; | |
| 22 | − dma-names = "rxtx"; | |
| 23 | − clocks = <&clkgen SYS_CLK>; | |
| 24 | − #address-cells = <1>; | |
| 25 | − #size-cells = <0>; | |
| 26 | − | |
| 27 | − nand@0 { | |
| 28 | − reg = <0>; /* CS0 */ | |
| 29 | − nand-ecc-strength = <14>; | |
| 30 | − nand-ecc-step-size = <1024>; | |
| 31 | − }; | |
| 32 | − | |
| 33 | − nand@1 { | |
| 34 | − reg = <1>; /* CS1 */ | |
| 35 | − nand-ecc-strength = <14>; | |
| 36 | − nand-ecc-step-size = <1024>; | |
| 37 | − }; | |
| 38 | − }; | |
| @@ -0,0 +1,92 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/net/actions,owl-emac.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Actions Semi Owl SoCs Ethernet MAC Controller | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Cristian Ciocaltea <cristian.ciocaltea@gmail.com> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + This Ethernet MAC is used on the Owl family of SoCs from Actions Semi. | |
| 14 | + It provides the RMII and SMII interfaces and is compliant with the | |
| 15 | + IEEE 802.3 CSMA/CD standard, supporting both half-duplex and full-duplex | |
| 16 | + operation modes at 10/100 Mb/s data transfer rates. | |
| 17 | + | |
| 18 | +allOf: | |
| 19 | + - $ref: "ethernet-controller.yaml#" | |
| 20 | + | |
| 21 | +properties: | |
| 22 | + compatible: | |
| 23 | + oneOf: | |
| 24 | + - const: actions,owl-emac | |
| 25 | + - items: | |
| 26 | + - enum: | |
| 27 | + - actions,s500-emac | |
| 28 | + - const: actions,owl-emac | |
| 29 | + | |
| 30 | + reg: | |
| 31 | + maxItems: 1 | |
| 32 | + | |
| 33 | + interrupts: | |
| 34 | + maxItems: 1 | |
| 35 | + | |
| 36 | + clocks: | |
| 37 | + minItems: 2 | |
| 38 | + maxItems: 2 | |
| 39 | + | |
| 40 | + clock-names: | |
| 41 | + additionalItems: false | |
| 42 | + items: | |
| 43 | + - const: eth | |
| 44 | + - const: rmii | |
| 45 | + | |
| 46 | + resets: | |
| 47 | + maxItems: 1 | |
| 48 | + | |
| 49 | + actions,ethcfg: | |
| 50 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 51 | + description: | |
| 52 | + Phandle to the device containing custom config. | |
| 53 | + | |
| 54 | +required: | |
| 55 | + - compatible | |
| 56 | + - reg | |
| 57 | + - interrupts | |
| 58 | + - clocks | |
| 59 | + - clock-names | |
| 60 | + - resets | |
| 61 | + - phy-mode | |
| 62 | + - phy-handle | |
| 63 | + | |
| 64 | +unevaluatedProperties: false | |
| 65 | + | |
| 66 | +examples: | |
| 67 | + - | | |
| 68 | + #include <dt-bindings/clock/actions,s500-cmu.h> | |
| 69 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 70 | + #include <dt-bindings/reset/actions,s500-reset.h> | |
| 71 | + | |
| 72 | + ethernet@b0310000 { | |
| 73 | + compatible = "actions,s500-emac", "actions,owl-emac"; | |
| 74 | + reg = <0xb0310000 0x10000>; | |
| 75 | + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; | |
| 76 | + clocks = <&cmu 59 /*CLK_ETHERNET*/>, <&cmu CLK_RMII_REF>; | |
| 77 | + clock-names = "eth", "rmii"; | |
| 78 | + resets = <&cmu RESET_ETHERNET>; | |
| 79 | + phy-mode = "rmii"; | |
| 80 | + phy-handle = <ð_phy>; | |
| 81 | + | |
| 82 | + mdio { | |
| 83 | + #address-cells = <1>; | |
| 84 | + #size-cells = <0>; | |
| 85 | + | |
| 86 | + eth_phy: ethernet-phy@3 { | |
| 87 | + reg = <0x3>; | |
| 88 | + interrupt-parent = <&sirq>; | |
| 89 | + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; | |
| 90 | + }; | |
| 91 | + }; | |
| 92 | + }; | |
| @@ -22,10 +22,18 @@ properties: · 21 unmodified lines | ||
| 22 | 22 | maxItems: 1 |
| 23 | 23 | |
| 24 | 24 | interrupts: |
| 25 | − description: RX interrupt | |
| 25 | + minItems: 1 | |
| 26 | + maxItems: 2 | |
| 27 | + items: | |
| 28 | + - description: RX interrupt | |
| 29 | + - description: TX interrupt | |
| 26 | 30 | |
| 27 | 31 | interrupt-names: |
| 28 | − const: rx | |
| 32 | + minItems: 1 | |
| 33 | + maxItems: 2 | |
| 34 | + items: | |
| 35 | + - const: rx | |
| 36 | + - const: tx | |
| 29 | 37 | |
| 30 | 38 | required: |
| 31 | 39 | - reg |
| @@ -43,6 +51,7 @@ examples: · 11 unmodified lines | ||
| 43 | 51 | compatible = "brcm,bcm4908-enet"; |
| 44 | 52 | reg = <0x80002000 0x1000>; |
| 45 | 53 | |
| 46 | − interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
| 47 | − interrupt-names = "rx"; | |
| 54 | + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, | |
| 55 | + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
| 56 | + interrupt-names = "rx", "tx"; | |
| 48 | 57 | }; |
| @@ -0,0 +1,76 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/net/brcm,bcm6368-mdio-mux.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM6368 MDIO bus multiplexer | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Álvaro Fernández Rojas <noltari@gmail.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + This MDIO bus multiplexer defines buses that could be internal as well as | |
| 14 | + external to SoCs. When child bus is selected, one needs to select these two | |
| 15 | + properties as well to generate desired MDIO transaction on appropriate bus. | |
| 16 | + | |
| 17 | +allOf: | |
| 18 | + - $ref: "mdio.yaml#" | |
| 19 | + | |
| 20 | +properties: | |
| 21 | + compatible: | |
| 22 | + const: brcm,bcm6368-mdio-mux | |
| 23 | + | |
| 24 | + "#address-cells": | |
| 25 | + const: 1 | |
| 26 | + | |
| 27 | + "#size-cells": | |
| 28 | + const: 0 | |
| 29 | + | |
| 30 | + reg: | |
| 31 | + maxItems: 1 | |
| 32 | + | |
| 33 | +required: | |
| 34 | + - compatible | |
| 35 | + - reg | |
| 36 | + | |
| 37 | +patternProperties: | |
| 38 | + '^mdio@[0-1]$': | |
| 39 | + type: object | |
| 40 | + properties: | |
| 41 | + reg: | |
| 42 | + maxItems: 1 | |
| 43 | + | |
| 44 | + "#address-cells": | |
| 45 | + const: 1 | |
| 46 | + | |
| 47 | + "#size-cells": | |
| 48 | + const: 0 | |
| 49 | + | |
| 50 | + required: | |
| 51 | + - reg | |
| 52 | + - "#address-cells" | |
| 53 | + - "#size-cells" | |
| 54 | + | |
| 55 | +unevaluatedProperties: false | |
| 56 | + | |
| 57 | +examples: | |
| 58 | + - | | |
| 59 | + mdio0: mdio@10e000b0 { | |
| 60 | + #address-cells = <1>; | |
| 61 | + #size-cells = <0>; | |
| 62 | + compatible = "brcm,bcm6368-mdio-mux"; | |
| 63 | + reg = <0x10e000b0 0x6>; | |
| 64 | + | |
| 65 | + mdio_int: mdio@0 { | |
| 66 | + #address-cells = <1>; | |
| 67 | + #size-cells = <0>; | |
| 68 | + reg = <0>; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + mdio_ext: mdio@1 { | |
| 72 | + #address-cells = <1>; | |
| 73 | + #size-cells = <0>; | |
| 74 | + reg = <1>; | |
| 75 | + }; | |
| 76 | + }; | |
| @@ -1,56 +0,0 @@ | ||
| 1 | −Broadcom Bluetooth Chips | |
| 2 | −--------------------- | |
| 3 | − | |
| 4 | −This documents the binding structure and common properties for serial | |
| 5 | −attached Broadcom devices. | |
| 6 | − | |
| 7 | −Serial attached Broadcom devices shall be a child node of the host UART | |
| 8 | −device the slave device is attached to. | |
| 9 | − | |
| 10 | −Required properties: | |
| 11 | − | |
| 12 | − - compatible: should contain one of the following: | |
| 13 | − * "brcm,bcm20702a1" | |
| 14 | − * "brcm,bcm4329-bt" | |
| 15 | − * "brcm,bcm4330-bt" | |
| 16 | − * "brcm,bcm43438-bt" | |
| 17 | − * "brcm,bcm4345c5" | |
| 18 | − * "brcm,bcm43540-bt" | |
| 19 | − * "brcm,bcm4335a0" | |
| 20 | − | |
| 21 | −Optional properties: | |
| 22 | − | |
| 23 | − - max-speed: see Documentation/devicetree/bindings/serial/serial.yaml | |
| 24 | − - shutdown-gpios: GPIO specifier, used to enable the BT module | |
| 25 | − - device-wakeup-gpios: GPIO specifier, used to wakeup the controller | |
| 26 | − - host-wakeup-gpios: GPIO specifier, used to wakeup the host processor. | |
| 27 | − deprecated, replaced by interrupts and | |
| 28 | − "host-wakeup" interrupt-names | |
| 29 | − - clocks: 1 or 2 clocks as defined in clock-names below, in that order | |
| 30 | − - clock-names: names for clock inputs, matching the clocks given | |
| 31 | − - "extclk": deprecated, replaced by "txco" | |
| 32 | − - "txco": external reference clock (not a standalone crystal) | |
| 33 | − - "lpo": external low power 32.768 kHz clock | |
| 34 | − - vbat-supply: phandle to regulator supply for VBAT | |
| 35 | − - vddio-supply: phandle to regulator supply for VDDIO | |
| 36 | − - brcm,bt-pcm-int-params: configure PCM parameters via a 5-byte array | |
| 37 | − - sco-routing: 0 = PCM, 1 = Transport, 2 = Codec, 3 = I2S | |
| 38 | − - pcm-interface-rate: 128KBps, 256KBps, 512KBps, 1024KBps, 2048KBps | |
| 39 | − - pcm-frame-type: short, long | |
| 40 | − - pcm-sync-mode: slave, master | |
| 41 | − - pcm-clock-mode: slave, master | |
| 42 | − - interrupts: must be one, used to wakeup the host processor | |
| 43 | − - interrupt-names: must be "host-wakeup" | |
| 44 | − | |
| 45 | −Example: | |
| 46 | − | |
| 47 | −&uart2 { | |
| 48 | − pinctrl-names = "default"; | |
| 49 | − pinctrl-0 = <&uart2_pins>; | |
| 50 | − | |
| 51 | − bluetooth { | |
| 52 | − compatible = "brcm,bcm43438-bt"; | |
| 53 | − max-speed = <921600>; | |
| 54 | − brcm,bt-pcm-int-params = [01 02 00 01 01]; | |
| 55 | − }; | |
| 56 | −}; | |
| @@ -0,0 +1,118 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/net/broadcom-bluetooth.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom Bluetooth Chips | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Linus Walleij <linus.walleij@linaro.org> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + This binding describes Broadcom UART-attached bluetooth chips. | |
| 14 | + | |
| 15 | +properties: | |
| 16 | + compatible: | |
| 17 | + enum: | |
| 18 | + - brcm,bcm20702a1 | |
| 19 | + - brcm,bcm4329-bt | |
| 20 | + - brcm,bcm4330-bt | |
| 21 | + - brcm,bcm4334-bt | |
| 22 | + - brcm,bcm43438-bt | |
| 23 | + - brcm,bcm4345c5 | |
| 24 | + - brcm,bcm43540-bt | |
| 25 | + - brcm,bcm4335a0 | |
| 26 | + | |
| 27 | + shutdown-gpios: | |
| 28 | + maxItems: 1 | |
| 29 | + description: GPIO specifier for the line BT_REG_ON used to | |
| 30 | + power on the BT module | |
| 31 | + | |
| 32 | + reset-gpios: | |
| 33 | + maxItems: 1 | |
| 34 | + description: GPIO specifier for the line BT_RST_N used to | |
| 35 | + reset the BT module. This should be marked as | |
| 36 | + GPIO_ACTIVE_LOW. | |
| 37 | + | |
| 38 | + device-wakeup-gpios: | |
| 39 | + maxItems: 1 | |
| 40 | + description: GPIO specifier for the line BT_WAKE used to | |
| 41 | + wakeup the controller. This is using the BT_GPIO_0 | |
| 42 | + pin on the chip when in use. | |
| 43 | + | |
| 44 | + host-wakeup-gpios: | |
| 45 | + maxItems: 1 | |
| 46 | + deprecated: true | |
| 47 | + description: GPIO specifier for the line HOST_WAKE used | |
| 48 | + to wakeup the host processor. This is using he BT_GPIO_1 | |
| 49 | + pin on the chip when in use. This is deprecated and replaced | |
| 50 | + by interrupts and "host-wakeup" interrupt-names | |
| 51 | + | |
| 52 | + clocks: | |
| 53 | + maxItems: 2 | |
| 54 | + description: 1 or 2 clocks as defined in clock-names below, | |
| 55 | + in that order | |
| 56 | + | |
| 57 | + clock-names: | |
| 58 | + description: Names of the 1 to 2 supplied clocks | |
| 59 | + items: | |
| 60 | + - const: txco | |
| 61 | + - const: lpo | |
| 62 | + - const: extclk | |
| 63 | + | |
| 64 | + vbat-supply: | |
| 65 | + description: phandle to regulator supply for VBAT | |
| 66 | + | |
| 67 | + vddio-supply: | |
| 68 | + description: phandle to regulator supply for VDDIO | |
| 69 | + | |
| 70 | + brcm,bt-pcm-int-params: | |
| 71 | + $ref: /schemas/types.yaml#/definitions/uint8-array | |
| 72 | + minItems: 5 | |
| 73 | + maxItems: 5 | |
| 74 | + description: |- | |
| 75 | + configure PCM parameters via a 5-byte array: | |
| 76 | + sco-routing: 0 = PCM, 1 = Transport, 2 = Codec, 3 = I2S | |
| 77 | + pcm-interface-rate: 128KBps, 256KBps, 512KBps, 1024KBps, 2048KBps | |
| 78 | + pcm-frame-type: short, long | |
| 79 | + pcm-sync-mode: slave, master | |
| 80 | + pcm-clock-mode: slave, master | |
| 81 | + | |
| 82 | + interrupts: | |
| 83 | + items: | |
| 84 | + - description: Handle to the line HOST_WAKE used to wake | |
| 85 | + up the host processor. This uses the BT_GPIO_1 pin on | |
| 86 | + the chip when in use. | |
| 87 | + | |
| 88 | + interrupt-names: | |
| 89 | + items: | |
| 90 | + - const: host-wakeup | |
| 91 | + | |
| 92 | + max-speed: true | |
| 93 | + current-speed: true | |
| 94 | + | |
| 95 | +required: | |
| 96 | + - compatible | |
| 97 | + | |
| 98 | +additionalProperties: false | |
| 99 | + | |
| 100 | +examples: | |
| 101 | + - | | |
| 102 | + #include <dt-bindings/gpio/gpio.h> | |
| 103 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 104 | + | |
| 105 | + uart { | |
| 106 | + uart-has-rtscts; | |
| 107 | + | |
| 108 | + bluetooth { | |
| 109 | + compatible = "brcm,bcm4330-bt"; | |
| 110 | + max-speed = <921600>; | |
| 111 | + brcm,bt-pcm-int-params = [01 02 00 01 01]; | |
| 112 | + shutdown-gpios = <&gpio 30 GPIO_ACTIVE_HIGH>; | |
| 113 | + device-wakeup-gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; | |
| 114 | + reset-gpios = <&gpio 9 GPIO_ACTIVE_LOW>; | |
| 115 | + interrupt-parent = <&gpio>; | |
| 116 | + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; | |
| 117 | + }; | |
| 118 | + }; | |
| @@ -57,7 +57,6 @@ properties: · 56 unmodified lines | ||
| 57 | 57 | - const: per |
| 58 | 58 | |
| 59 | 59 | clock-frequency: |
| 60 | − $ref: /schemas/types.yaml#/definitions/uint32 | |
| 61 | 60 | description: | |
| 62 | 61 | The oscillator frequency driving the flexcan device, filled in by the |
| 63 | 62 | boot loader. This property should only be used the used operating system |
| @@ -19,7 +19,8 @@ Required properties: · 18 unmodified lines | ||
| 19 | 19 | "renesas,can-r8a7793" if CAN controller is a part of R8A7793 SoC. |
| 20 | 20 | "renesas,can-r8a7794" if CAN controller is a part of R8A7794 SoC. |
| 21 | 21 | "renesas,can-r8a7795" if CAN controller is a part of R8A7795 SoC. |
| 22 | − "renesas,can-r8a7796" if CAN controller is a part of R8A7796 SoC. | |
| 22 | + "renesas,can-r8a7796" if CAN controller is a part of R8A77960 SoC. | |
| 23 | + "renesas,can-r8a77961" if CAN controller is a part of R8A77961 SoC. | |
| 23 | 24 | "renesas,can-r8a77965" if CAN controller is a part of R8A77965 SoC. |
| 24 | 25 | "renesas,can-r8a77990" if CAN controller is a part of R8A77990 SoC. |
| 25 | 26 | "renesas,can-r8a77995" if CAN controller is a part of R8A77995 SoC. |
| @@ -40,7 +41,7 @@ Required properties: · 14 unmodified lines | ||
| 40 | 41 | - pinctrl-names: must be "default". |
| 41 | 42 | |
| 42 | 43 | Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, |
| 43 | −R8A7796, R8A77965, R8A77990, and R8A77995: | |
| 44 | +R8A77960, R8A77961, R8A77965, R8A77990, and R8A77995: | |
| 44 | 45 | For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can |
| 45 | 46 | be used by both CAN and CAN FD controller at the same time. It needs to be |
| 46 | 47 | scaled to maximum frequency if any of these controllers use it. This is done |
| @@ -70,6 +70,15 @@ patternProperties: · 69 unmodified lines | ||
| 70 | 70 | device is what the switch port is connected to |
| 71 | 71 | $ref: /schemas/types.yaml#/definitions/phandle |
| 72 | 72 | |
| 73 | + dsa-tag-protocol: | |
| 74 | + description: | |
| 75 | + Instead of the default, the switch will use this tag protocol if | |
| 76 | + possible. Useful when a device supports multiple protcols and | |
| 77 | + the default is incompatible with the Ethernet device. | |
| 78 | + enum: | |
| 79 | + - dsa | |
| 80 | + - edsa | |
| 81 | + | |
| 73 | 82 | phy-handle: true |
| 74 | 83 | |
| 75 | 84 | phy-mode: true |
| @@ -5,6 +5,10 @@ Required properties for GSWIP core: · 4 unmodified lines | ||
| 5 | 5 | |
| 6 | 6 | - compatible : "lantiq,xrx200-gswip" for the embedded GSWIP in the |
| 7 | 7 | xRX200 SoC |
| 8 | + "lantiq,xrx300-gswip" for the embedded GSWIP in the | |
| 9 | + xRX300 SoC | |
| 10 | + "lantiq,xrx330-gswip" for the embedded GSWIP in the | |
| 11 | + xRX330 SoC | |
| 8 | 12 | - reg : memory range of the GSWIP core registers |
| 9 | 13 | : memory range of the GSWIP MDIO registers |
| 10 | 14 | : memory range of the GSWIP MII registers |
| @@ -21,6 +21,8 @@ properties: · 20 unmodified lines | ||
| 21 | 21 | - microchip,ksz8765 |
| 22 | 22 | - microchip,ksz8794 |
| 23 | 23 | - microchip,ksz8795 |
| 24 | + - microchip,ksz8863 | |
| 25 | + - microchip,ksz8873 | |
| 24 | 26 | - microchip,ksz9477 |
| 25 | 27 | - microchip,ksz9897 |
| 26 | 28 | - microchip,ksz9896 |
| @@ -102,3 +102,18 @@ Example: · 101 unmodified lines | ||
| 102 | 102 | full-duplex; |
| 103 | 103 | }; |
| 104 | 104 | }; |
| 105 | + | |
| 106 | +* Integrated Endpoint Register Block bindings | |
| 107 | + | |
| 108 | +Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register | |
| 109 | +Block, which preconfigures the FIFO limits for the ENETC ports. This is a node | |
| 110 | +with the following properties: | |
| 111 | + | |
| 112 | +- reg : Specifies the address in the SoC memory space. | |
| 113 | +- compatible : Must be "fsl,ls1028a-enetc-ierb". | |
| 114 | + | |
| 115 | +Example: | |
| 116 | + ierb@1f0800000 { | |
| 117 | + compatible = "fsl,ls1028a-enetc-ierb"; | |
| 118 | + reg = <0x01 0xf0800000 0x0 0x10000>; | |
| 119 | + }; | |
| @@ -0,0 +1,73 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/net/idt,3243x-emac.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: IDT 79rc3243x Ethernet controller | |
| 8 | + | |
| 9 | +description: Ethernet controller integrated into IDT 79RC3243x family SoCs | |
| 10 | + | |
| 11 | +maintainers: | |
| 12 | + - Thomas Bogendoerfer <tsbogend@alpha.franken.de> | |
| 13 | + | |
| 14 | +allOf: | |
| 15 | + - $ref: ethernet-controller.yaml# | |
| 16 | + | |
| 17 | +properties: | |
| 18 | + compatible: | |
| 19 | + const: idt,3243x-emac | |
| 20 | + | |
| 21 | + reg: | |
| 22 | + maxItems: 3 | |
| 23 | + | |
| 24 | + reg-names: | |
| 25 | + items: | |
| 26 | + - const: emac | |
| 27 | + - const: dma_rx | |
| 28 | + - const: dma_tx | |
| 29 | + | |
| 30 | + interrupts: | |
| 31 | + items: | |
| 32 | + - description: RX interrupt | |
| 33 | + - description: TX interrupt | |
| 34 | + | |
| 35 | + interrupt-names: | |
| 36 | + items: | |
| 37 | + - const: rx | |
| 38 | + - const: tx | |
| 39 | + | |
| 40 | + clocks: | |
| 41 | + maxItems: 1 | |
| 42 | + | |
| 43 | + clock-names: | |
| 44 | + items: | |
| 45 | + - const: mdioclk | |
| 46 | + | |
| 47 | +required: | |
| 48 | + - compatible | |
| 49 | + - reg | |
| 50 | + - reg-names | |
| 51 | + - interrupts | |
| 52 | + - interrupt-names | |
| 53 | + | |
| 54 | +additionalProperties: false | |
| 55 | + | |
| 56 | +examples: | |
| 57 | + - | | |
| 58 | + | |
| 59 | + ethernet@60000 { | |
| 60 | + compatible = "idt,3243x-emac"; | |
| 61 | + | |
| 62 | + reg = <0x60000 0x10000>, | |
| 63 | + <0x40000 0x14>, | |
| 64 | + <0x40014 0x14>; | |
| 65 | + reg-names = "emac", "dma_rx", "dma_tx"; | |
| 66 | + | |
| 67 | + interrupt-parent = <&rcpic3>; | |
| 68 | + interrupts = <0>, <1>; | |
| 69 | + interrupt-names = "rx", "tx"; | |
| 70 | + | |
| 71 | + clocks = <&iclk>; | |
| 72 | + clock-names = "mdioclk"; | |
| 73 | + }; | |
| @@ -0,0 +1,102 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +# Copyright 2018 Linaro Ltd. | |
| 3 | +%YAML 1.2 | |
| 4 | +--- | |
| 5 | +$id: "http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#" | |
| 6 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 7 | + | |
| 8 | +title: Intel IXP4xx ethernet | |
| 9 | + | |
| 10 | +allOf: | |
| 11 | + - $ref: "ethernet-controller.yaml#" | |
| 12 | + | |
| 13 | +maintainers: | |
| 14 | + - Linus Walleij <linus.walleij@linaro.org> | |
| 15 | + | |
| 16 | +description: | | |
| 17 | + The Intel IXP4xx ethernet makes use of the IXP4xx NPE (Network | |
| 18 | + Processing Engine) and the IXP4xx Queue Manager to process | |
| 19 | + the ethernet frames. It can optionally contain an MDIO bus to | |
| 20 | + talk to PHYs. | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + compatible: | |
| 24 | + const: intel,ixp4xx-ethernet | |
| 25 | + | |
| 26 | + reg: | |
| 27 | + maxItems: 1 | |
| 28 | + description: Ethernet MMIO address range | |
| 29 | + | |
| 30 | + queue-rx: | |
| 31 | + $ref: '/schemas/types.yaml#/definitions/phandle-array' | |
| 32 | + maxItems: 1 | |
| 33 | + description: phandle to the RX queue on the NPE | |
| 34 | + | |
| 35 | + queue-txready: | |
| 36 | + $ref: '/schemas/types.yaml#/definitions/phandle-array' | |
| 37 | + maxItems: 1 | |
| 38 | + description: phandle to the TX READY queue on the NPE | |
| 39 | + | |
| 40 | + phy-mode: true | |
| 41 | + | |
| 42 | + phy-handle: true | |
| 43 | + | |
| 44 | + intel,npe-handle: | |
| 45 | + $ref: '/schemas/types.yaml#/definitions/phandle-array' | |
| 46 | + maxItems: 1 | |
| 47 | + description: phandle to the NPE this ethernet instance is using | |
| 48 | + and the instance to use in the second cell | |
| 49 | + | |
| 50 | + mdio: | |
| 51 | + type: object | |
| 52 | + $ref: "mdio.yaml#" | |
| 53 | + description: optional node for embedded MDIO controller | |
| 54 | + | |
| 55 | +required: | |
| 56 | + - compatible | |
| 57 | + - reg | |
| 58 | + - queue-rx | |
| 59 | + - queue-txready | |
| 60 | + - intel,npe-handle | |
| 61 | + | |
| 62 | +additionalProperties: false | |
| 63 | + | |
| 64 | +examples: | |
| 65 | + - | | |
| 66 | + npe: npe@c8006000 { | |
| 67 | + compatible = "intel,ixp4xx-network-processing-engine"; | |
| 68 | + reg = <0xc8006000 0x1000>, <0xc8007000 0x1000>, <0xc8008000 0x1000>; | |
| 69 | + }; | |
| 70 | + | |
| 71 | + ethernet@c8009000 { | |
| 72 | + compatible = "intel,ixp4xx-ethernet"; | |
| 73 | + reg = <0xc8009000 0x1000>; | |
| 74 | + status = "disabled"; | |
| 75 | + queue-rx = <&qmgr 4>; | |
| 76 | + queue-txready = <&qmgr 21>; | |
| 77 | + intel,npe-handle = <&npe 1>; | |
| 78 | + phy-mode = "rgmii"; | |
| 79 | + phy-handle = <&phy1>; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + ethernet@c800c000 { | |
| 83 | + compatible = "intel,ixp4xx-ethernet"; | |
| 84 | + reg = <0xc800c000 0x1000>; | |
| 85 | + status = "disabled"; | |
| 86 | + queue-rx = <&qmgr 3>; | |
| 87 | + queue-txready = <&qmgr 20>; | |
| 88 | + intel,npe-handle = <&npe 2>; | |
| 89 | + phy-mode = "rgmii"; | |
| 90 | + phy-handle = <&phy2>; | |
| 91 | + | |
| 92 | + mdio { | |
| 93 | + #address-cells = <1>; | |
| 94 | + #size-cells = <0>; | |
| 95 | + phy1: ethernet-phy@1 { | |
| 96 | + reg = <1>; | |
| 97 | + }; | |
| 98 | + phy2: ethernet-phy@2 { | |
| 99 | + reg = <2>; | |
| 100 | + }; | |
| 101 | + }; | |
| 102 | + }; | |
| @@ -2,6 +2,7 @@ MDIO on GPIOs · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | Currently defined compatibles: |
| 4 | 4 | - virtual,gpio-mdio |
| 5 | +- microchip,mdio-smi0 | |
| 5 | 6 | |
| 6 | 7 | MDC and MDIO lines connected to GPIO controllers are listed in the |
| 7 | 8 | gpios property as described in section VIII.1 in the following order: |
| @@ -43,7 +43,12 @@ description: · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | properties: |
| 45 | 45 | compatible: |
| 46 | − const: "qcom,sdm845-ipa" | |
| 46 | + enum: | |
| 47 | + - qcom,sc7180-ipa | |
| 48 | + - qcom,sc7280-ipa | |
| 49 | + - qcom,sdm845-ipa | |
| 50 | + - qcom,sdx55-ipa | |
| 51 | + - qcom,sm8350-ipa | |
| 47 | 52 | |
| 48 | 53 | reg: |
| 49 | 54 | items: |
| @@ -120,6 +125,14 @@ properties: · 70 unmodified lines | ||
| 120 | 125 | the firmware passed to Trust Zone for authentication. Required |
| 121 | 126 | when Trust Zone (not the modem) performs early initialization. |
| 122 | 127 | |
| 128 | + firmware-name: | |
| 129 | + $ref: /schemas/types.yaml#/definitions/string | |
| 130 | + description: | |
| 131 | + If present, name (or relative path) of the file within the | |
| 132 | + firmware search path containing the firmware image used when | |
| 133 | + initializing IPA hardware. Optional, and only used when | |
| 134 | + Trust Zone performs early initialization. | |
| 135 | + | |
| 123 | 136 | required: |
| 124 | 137 | - compatible |
| 125 | 138 | - iommus |
| @@ -129,12 +142,23 @@ required: · 3 unmodified lines | ||
| 129 | 142 | - interconnects |
| 130 | 143 | - qcom,smem-states |
| 131 | 144 | |
| 145 | +# Either modem-init is present, or memory-region must be present. | |
| 132 | 146 | oneOf: |
| 133 | 147 | - required: |
| 134 | 148 | - modem-init |
| 135 | 149 | - required: |
| 136 | 150 | - memory-region |
| 137 | 151 | |
| 152 | +# If memory-region is present, firmware-name may optionally be present. | |
| 153 | +# But if modem-init is present, firmware-name must not be present. | |
| 154 | +if: | |
| 155 | + required: | |
| 156 | + - modem-init | |
| 157 | +then: | |
| 158 | + not: | |
| 159 | + required: | |
| 160 | + - firmware-name | |
| 161 | + | |
| 138 | 162 | additionalProperties: false |
| 139 | 163 | |
| 140 | 164 | examples: |
| @@ -50,7 +50,16 @@ properties: · 49 unmodified lines | ||
| 50 | 50 | interrupt-names: true |
| 51 | 51 | |
| 52 | 52 | clocks: |
| 53 | − maxItems: 1 | |
| 53 | + minItems: 1 | |
| 54 | + items: | |
| 55 | + - description: AVB functional clock | |
| 56 | + - description: Optional TXC reference clock | |
| 57 | + | |
| 58 | + clock-names: | |
| 59 | + minItems: 1 | |
| 60 | + items: | |
| 61 | + - const: fck | |
| 62 | + - const: refclk | |
| 54 | 63 | |
| 55 | 64 | iommus: |
| 56 | 65 | maxItems: 1 |
| @@ -1,76 +0,0 @@ | ||
| 1 | −Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC) | |
| 2 | − | |
| 3 | −The device node has following properties. | |
| 4 | − | |
| 5 | −Required properties: | |
| 6 | − - compatible: should be "rockchip,<name>-gamc" | |
| 7 | − "rockchip,px30-gmac": found on PX30 SoCs | |
| 8 | − "rockchip,rk3128-gmac": found on RK312x SoCs | |
| 9 | − "rockchip,rk3228-gmac": found on RK322x SoCs | |
| 10 | − "rockchip,rk3288-gmac": found on RK3288 SoCs | |
| 11 | − "rockchip,rk3328-gmac": found on RK3328 SoCs | |
| 12 | − "rockchip,rk3366-gmac": found on RK3366 SoCs | |
| 13 | − "rockchip,rk3368-gmac": found on RK3368 SoCs | |
| 14 | − "rockchip,rk3399-gmac": found on RK3399 SoCs | |
| 15 | − "rockchip,rv1108-gmac": found on RV1108 SoCs | |
| 16 | − - reg: addresses and length of the register sets for the device. | |
| 17 | − - interrupts: Should contain the GMAC interrupts. | |
| 18 | − - interrupt-names: Should contain the interrupt names "macirq". | |
| 19 | − - rockchip,grf: phandle to the syscon grf used to control speed and mode. | |
| 20 | − - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY. | |
| 21 | − <&cru SCLK_MAC_PLL>: PLL clock for SCLK_MAC | |
| 22 | − <&cru SCLK_MAC_RX>: clock gate for RX | |
| 23 | − <&cru SCLK_MAC_TX>: clock gate for TX | |
| 24 | − <&cru SCLK_MACREF>: clock gate for RMII referce clock | |
| 25 | − <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output | |
| 26 | − <&cru ACLK_GMAC>: AXI clock gate for GMAC | |
| 27 | − <&cru PCLK_GMAC>: APB clock gate for GMAC | |
| 28 | − - clock-names: One name for each entry in the clocks property. | |
| 29 | − - phy-mode: See ethernet.txt file in the same directory. | |
| 30 | − - pinctrl-names: Names corresponding to the numbered pinctrl states. | |
| 31 | − - pinctrl-0: pin-control mode. can be <&rgmii_pins> or <&rmii_pins>. | |
| 32 | − - clock_in_out: For RGMII, it must be "input", means main clock(125MHz) | |
| 33 | − is not sourced from SoC's PLL, but input from PHY; For RMII, "input" means | |
| 34 | − PHY provides the reference clock(50MHz), "output" means GMAC provides the | |
| 35 | − reference clock. | |
| 36 | − - snps,reset-gpio gpio number for phy reset. | |
| 37 | − - snps,reset-active-low boolean flag to indicate if phy reset is active low. | |
| 38 | − - assigned-clocks: main clock, should be <&cru SCLK_MAC>; | |
| 39 | − - assigned-clock-parents = parent of main clock. | |
| 40 | − can be <&ext_gmac> or <&cru SCLK_MAC_PLL>. | |
| 41 | − | |
| 42 | −Optional properties: | |
| 43 | − - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. | |
| 44 | − - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default. | |
| 45 | − - phy-supply: phandle to a regulator if the PHY needs one | |
| 46 | − | |
| 47 | −Example: | |
| 48 | − | |
| 49 | −gmac: ethernet@ff290000 { | |
| 50 | − compatible = "rockchip,rk3288-gmac"; | |
| 51 | − reg = <0xff290000 0x10000>; | |
| 52 | − interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; | |
| 53 | − interrupt-names = "macirq"; | |
| 54 | − rockchip,grf = <&grf>; | |
| 55 | − clocks = <&cru SCLK_MAC>, | |
| 56 | − <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, | |
| 57 | − <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, | |
| 58 | − <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; | |
| 59 | − clock-names = "stmmaceth", | |
| 60 | − "mac_clk_rx", "mac_clk_tx", | |
| 61 | − "clk_mac_ref", "clk_mac_refout", | |
| 62 | − "aclk_mac", "pclk_mac"; | |
| 63 | − phy-mode = "rgmii"; | |
| 64 | − pinctrl-names = "default"; | |
| 65 | − pinctrl-0 = <&rgmii_pins /*&rmii_pins*/>; | |
| 66 | − | |
| 67 | − clock_in_out = "input"; | |
| 68 | − snps,reset-gpio = <&gpio4 7 0>; | |
| 69 | − snps,reset-active-low; | |
| 70 | − | |
| 71 | − assigned-clocks = <&cru SCLK_MAC>; | |
| 72 | − assigned-clock-parents = <&ext_gmac>; | |
| 73 | − tx_delay = <0x30>; | |
| 74 | − rx_delay = <0x10>; | |
| 75 | − | |
| 76 | −}; | |
| @@ -0,0 +1,120 @@ | ||
| 1 | +# SPDX-License-Identifier: GPL-2.0 | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#" | |
| 5 | +$schema: "http://devicetree.org/meta-schemas/core.yaml#" | |
| 6 | + | |
| 7 | +title: Rockchip 10/100/1000 Ethernet driver(GMAC) | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - David Wu <david.wu@rock-chips.com> | |
| 11 | + | |
| 12 | +# We need a select here so we don't match all nodes with 'snps,dwmac' | |
| 13 | +select: | |
| 14 | + properties: | |
| 15 | + compatible: | |
| 16 | + contains: | |
| 17 | + enum: | |
| 18 | + - rockchip,px30-gmac | |
| 19 | + - rockchip,rk3128-gmac | |
| 20 | + - rockchip,rk3228-gmac | |
| 21 | + - rockchip,rk3288-gmac | |
| 22 | + - rockchip,rk3328-gmac | |
| 23 | + - rockchip,rk3366-gmac | |
| 24 | + - rockchip,rk3368-gmac | |
| 25 | + - rockchip,rk3399-gmac | |
| 26 | + - rockchip,rv1108-gmac | |
| 27 | + required: | |
| 28 | + - compatible | |
| 29 | + | |
| 30 | +allOf: | |
| 31 | + - $ref: "snps,dwmac.yaml#" | |
| 32 | + | |
| 33 | +properties: | |
| 34 | + compatible: | |
| 35 | + items: | |
| 36 | + - enum: | |
| 37 | + - rockchip,px30-gmac | |
| 38 | + - rockchip,rk3128-gmac | |
| 39 | + - rockchip,rk3228-gmac | |
| 40 | + - rockchip,rk3288-gmac | |
| 41 | + - rockchip,rk3328-gmac | |
| 42 | + - rockchip,rk3366-gmac | |
| 43 | + - rockchip,rk3368-gmac | |
| 44 | + - rockchip,rk3399-gmac | |
| 45 | + - rockchip,rv1108-gmac | |
| 46 | + | |
| 47 | + clocks: | |
| 48 | + minItems: 5 | |
| 49 | + maxItems: 8 | |
| 50 | + | |
| 51 | + clock-names: | |
| 52 | + contains: | |
| 53 | + enum: | |
| 54 | + - stmmaceth | |
| 55 | + - mac_clk_tx | |
| 56 | + - mac_clk_rx | |
| 57 | + - aclk_mac | |
| 58 | + - pclk_mac | |
| 59 | + - clk_mac_ref | |
| 60 | + - clk_mac_refout | |
| 61 | + - clk_mac_speed | |
| 62 | + | |
| 63 | + clock_in_out: | |
| 64 | + description: | |
| 65 | + For RGMII, it must be "input", means main clock(125MHz) | |
| 66 | + is not sourced from SoC's PLL, but input from PHY. | |
| 67 | + For RMII, "input" means PHY provides the reference clock(50MHz), | |
| 68 | + "output" means GMAC provides the reference clock. | |
| 69 | + $ref: /schemas/types.yaml#/definitions/string | |
| 70 | + enum: [input, output] | |
| 71 | + | |
| 72 | + rockchip,grf: | |
| 73 | + description: The phandle of the syscon node for the general register file. | |
| 74 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 75 | + | |
| 76 | + tx_delay: | |
| 77 | + description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. | |
| 78 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 79 | + | |
| 80 | + rx_delay: | |
| 81 | + description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default. | |
| 82 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 83 | + | |
| 84 | + phy-supply: | |
| 85 | + description: PHY regulator | |
| 86 | + | |
| 87 | +required: | |
| 88 | + - compatible | |
| 89 | + - clocks | |
| 90 | + - clock-names | |
| 91 | + | |
| 92 | +unevaluatedProperties: false | |
| 93 | + | |
| 94 | +examples: | |
| 95 | + - | | |
| 96 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 97 | + #include <dt-bindings/clock/rk3288-cru.h> | |
| 98 | + | |
| 99 | + gmac: ethernet@ff290000 { | |
| 100 | + compatible = "rockchip,rk3288-gmac"; | |
| 101 | + reg = <0xff290000 0x10000>; | |
| 102 | + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; | |
| 103 | + interrupt-names = "macirq"; | |
| 104 | + clocks = <&cru SCLK_MAC>, | |
| 105 | + <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, | |
| 106 | + <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, | |
| 107 | + <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; | |
| 108 | + clock-names = "stmmaceth", | |
| 109 | + "mac_clk_rx", "mac_clk_tx", | |
| 110 | + "clk_mac_ref", "clk_mac_refout", | |
| 111 | + "aclk_mac", "pclk_mac"; | |
| 112 | + assigned-clocks = <&cru SCLK_MAC>; | |
| 113 | + assigned-clock-parents = <&ext_gmac>; | |
| 114 | + | |
| 115 | + rockchip,grf = <&grf>; | |
| 116 | + phy-mode = "rgmii"; | |
| 117 | + clock_in_out = "input"; | |
| 118 | + tx_delay = <0x30>; | |
| 119 | + rx_delay = <0x10>; | |
| 120 | + }; | |
| @@ -56,6 +56,15 @@ properties: · 55 unmodified lines | ||
| 56 | 56 | - amlogic,meson8m2-dwmac |
| 57 | 57 | - amlogic,meson-gxbb-dwmac |
| 58 | 58 | - amlogic,meson-axg-dwmac |
| 59 | + - rockchip,px30-gmac | |
| 60 | + - rockchip,rk3128-gmac | |
| 61 | + - rockchip,rk3228-gmac | |
| 62 | + - rockchip,rk3288-gmac | |
| 63 | + - rockchip,rk3328-gmac | |
| 64 | + - rockchip,rk3366-gmac | |
| 65 | + - rockchip,rk3368-gmac | |
| 66 | + - rockchip,rk3399-gmac | |
| 67 | + - rockchip,rv1108-gmac | |
| 59 | 68 | - snps,dwmac |
| 60 | 69 | - snps,dwmac-3.50a |
| 61 | 70 | - snps,dwmac-3.610 |
| @@ -89,7 +98,7 @@ properties: · 27 unmodified lines | ||
| 89 | 98 | |
| 90 | 99 | clocks: |
| 91 | 100 | minItems: 1 |
| 92 | − maxItems: 5 | |
| 101 | + maxItems: 8 | |
| 93 | 102 | additionalItems: true |
| 94 | 103 | items: |
| 95 | 104 | - description: GMAC main clock |
| @@ -101,7 +110,7 @@ properties: · 5 unmodified lines | ||
| 101 | 110 | |
| 102 | 111 | clock-names: |
| 103 | 112 | minItems: 1 |
| 104 | − maxItems: 5 | |
| 113 | + maxItems: 8 | |
| 105 | 114 | additionalItems: true |
| 106 | 115 | contains: |
| 107 | 116 | enum: |
| @@ -0,0 +1,109 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom BCM4329 family fullmac wireless SDIO devices | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Arend van Spriel <arend@broadcom.com> | |
| 11 | + | |
| 12 | +description: | |
| 13 | + The Broadcom Single chip MAC part for the BCM4329 family and | |
| 14 | + later Cypress chips in the same family named CYW4373 and similar. | |
| 15 | + These chips also have a Bluetooth portion described in a separate | |
| 16 | + binding. | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + compatible: | |
| 20 | + oneOf: | |
| 21 | + - items: | |
| 22 | + - enum: | |
| 23 | + - brcm,bcm43143-fmac | |
| 24 | + - brcm,bcm4341b0-fmac | |
| 25 | + - brcm,bcm4341b4-fmac | |
| 26 | + - brcm,bcm4341b5-fmac | |
| 27 | + - brcm,bcm4329-fmac | |
| 28 | + - brcm,bcm4330-fmac | |
| 29 | + - brcm,bcm4334-fmac | |
| 30 | + - brcm,bcm43340-fmac | |
| 31 | + - brcm,bcm4335-fmac | |
| 32 | + - brcm,bcm43362-fmac | |
| 33 | + - brcm,bcm4339-fmac | |
| 34 | + - brcm,bcm43430a0-fmac | |
| 35 | + - brcm,bcm43430a1-fmac | |
| 36 | + - brcm,bcm43455-fmac | |
| 37 | + - brcm,bcm43456-fmac | |
| 38 | + - brcm,bcm4354-fmac | |
| 39 | + - brcm,bcm4356-fmac | |
| 40 | + - brcm,bcm4359-fmac | |
| 41 | + - cypress,cyw4373-fmac | |
| 42 | + - cypress,cyw43012-fmac | |
| 43 | + - const: brcm,bcm4329-fmac | |
| 44 | + - const: brcm,bcm4329-fmac | |
| 45 | + | |
| 46 | + reg: | |
| 47 | + description: SDIO function number for the device, for most cases | |
| 48 | + this will be 1. | |
| 49 | + | |
| 50 | + interrupts: | |
| 51 | + maxItems: 1 | |
| 52 | + description: Out-of-band (OOB) IRQ line for waking up the host | |
| 53 | + in response to WLAN activity. This corresponds to the HOST_WAKE | |
| 54 | + line into the chip. | |
| 55 | + | |
| 56 | + interrupt-names: | |
| 57 | + description: Name for the OOB IRQ, this must be set to "host-wake". | |
| 58 | + const: host-wake | |
| 59 | + | |
| 60 | + brcm,drive-strength: | |
| 61 | + $ref: /schemas/types.yaml#/definitions/uint32 | |
| 62 | + description: Drive strength used for the SDIO pins on the device in mA. | |
| 63 | + minimum: 0 | |
| 64 | + maximum: 32 | |
| 65 | + | |
| 66 | + reset-gpios: | |
| 67 | + maxItems: 1 | |
| 68 | + description: A GPIO line connected to the WL_RST line, if present | |
| 69 | + this shall be flagged as active low. | |
| 70 | + | |
| 71 | + brcm,ccode-map: | |
| 72 | + $ref: /schemas/types.yaml#/definitions/string-array | |
| 73 | + description: Multiple strings for translating ISO3166 country code to | |
| 74 | + brcmfmac firmware country code and revision. | |
| 75 | + items: | |
| 76 | + pattern: '^[A-Z][A-Z]-[A-Z][0-9A-Z]-[0-9]+$' | |
| 77 | + | |
| 78 | +required: | |
| 79 | + - compatible | |
| 80 | + - reg | |
| 81 | + | |
| 82 | +additionalProperties: false | |
| 83 | + | |
| 84 | +examples: | |
| 85 | + - | | |
| 86 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 87 | + #include <dt-bindings/gpio/gpio.h> | |
| 88 | + mmc@80118000 { | |
| 89 | + compatible = "arm,pl18x", "arm,primecell"; | |
| 90 | + reg = <0x80118000 0x1000>; | |
| 91 | + clocks = <&clk 0>, <&clk 1>; | |
| 92 | + clock-names = "mclk", "apb_pclk"; | |
| 93 | + interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; | |
| 94 | + bus-width = <4>; | |
| 95 | + non-removable; | |
| 96 | + vmmc-supply = <&wl_bt_reg>; | |
| 97 | + #address-cells = <1>; | |
| 98 | + #size-cells = <0>; | |
| 99 | + | |
| 100 | + wifi@1 { | |
| 101 | + compatible = "brcm,bcm4334-fmac", "brcm,bcm4329-fmac"; | |
| 102 | + reg = <1>; | |
| 103 | + interrupt-parent = <&gpio>; | |
| 104 | + interrupts = <24 IRQ_TYPE_EDGE_FALLING>; | |
| 105 | + interrupt-names = "host-wake"; | |
| 106 | + reset-gpios = <&gpio 23 GPIO_ACTIVE_LOW>; | |
| 107 | + brcm,ccode-map = "JP-JP-78", "US-Q2-86"; | |
| 108 | + }; | |
| 109 | + }; | |
| @@ -1,38 +0,0 @@ | ||
| 1 | −Broadcom BCM43xx Fullmac wireless SDIO devices | |
| 2 | − | |
| 3 | −This node provides properties for controlling the Broadcom wireless device. The | |
| 4 | −node is expected to be specified as a child node to the SDIO controller that | |
| 5 | −connects the device to the system. | |
| 6 | − | |
| 7 | −Required properties: | |
| 8 | − | |
| 9 | − - compatible : Should be "brcm,bcm4329-fmac". | |
| 10 | − | |
| 11 | −Optional properties: | |
| 12 | − - brcm,drive-strength : drive strength used for SDIO pins on device in mA | |
| 13 | − (default = 6). | |
| 14 | − - interrupts : specifies attributes for the out-of-band interrupt (host-wake). | |
| 15 | − When not specified the device will use in-band SDIO interrupts. | |
| 16 | − - interrupt-names : name of the out-of-band interrupt, which must be set | |
| 17 | − to "host-wake". | |
| 18 | − | |
| 19 | −Example: | |
| 20 | − | |
| 21 | −mmc3: mmc@1c12000 { | |
| 22 | − #address-cells = <1>; | |
| 23 | − #size-cells = <0>; | |
| 24 | − | |
| 25 | − pinctrl-names = "default"; | |
| 26 | − pinctrl-0 = <&mmc3_pins_a>; | |
| 27 | − vmmc-supply = <®_vmmc3>; | |
| 28 | − bus-width = <4>; | |
| 29 | − non-removable; | |
| 30 | − | |
| 31 | − brcmf: wifi@1 { | |
| 32 | − reg = <1>; | |
| 33 | − compatible = "brcm,bcm4329-fmac"; | |
| 34 | − interrupt-parent = <&pio>; | |
| 35 | − interrupts = <10 8>; /* PH10 / EINT10 */ | |
| 36 | − interrupt-names = "host-wake"; | |
| 37 | − }; | |
| 38 | −}; | |
| @@ -1,24 +0,0 @@ | ||
| 1 | −Common IEEE 802.11 properties | |
| 2 | − | |
| 3 | −This provides documentation of common properties that are valid for all wireless | |
| 4 | −devices. | |
| 5 | − | |
| 6 | −Optional properties: | |
| 7 | − - ieee80211-freq-limit : list of supported frequency ranges in KHz. This can be | |
| 8 | − used for devices that in a given config support less channels than | |
| 9 | − normally. It may happen chipset supports a wide wireless band but it is | |
| 10 | − limited to some part of it due to used antennas or power amplifier. | |
| 11 | − An example case for this can be tri-band wireless router with two | |
| 12 | − identical chipsets used for two different 5 GHz subbands. Using them | |
| 13 | − incorrectly could not work or decrease performance noticeably. | |
| 14 | − | |
| 15 | −Example: | |
| 16 | − | |
| 17 | −pcie@0,0 { | |
| 18 | − reg = <0x0000 0 0 0 0>; | |
| 19 | − wifi@0,0 { | |
| 20 | − reg = <0x0000 0 0 0 0>; | |
| 21 | − ieee80211-freq-limit = <2402000 2482000>, | |
| 22 | − <5170000 5250000>; | |
| 23 | − }; | |
| 24 | −}; | |
| @@ -0,0 +1,45 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. | |
| 3 | + | |
| 4 | +%YAML 1.2 | |
| 5 | +--- | |
| 6 | +$id: http://devicetree.org/schemas/net/wireless/ieee80211.yaml# | |
| 7 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 8 | + | |
| 9 | +title: Common IEEE 802.11 Binding | |
| 10 | + | |
| 11 | +maintainers: | |
| 12 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 13 | + | |
| 14 | +description: | | |
| 15 | + This provides documentation of common properties that are valid for | |
| 16 | + all wireless devices | |
| 17 | + | |
| 18 | +properties: | |
| 19 | + ieee80211-freq-limit: | |
| 20 | + $ref: /schemas/types.yaml#/definitions/uint32-matrix | |
| 21 | + items: | |
| 22 | + minItems: 2 | |
| 23 | + maxItems: 2 | |
| 24 | + description: | |
| 25 | + List of supported frequency ranges in KHz. This can be used for devices | |
| 26 | + that in a given config support less channels than normally. It may happen | |
| 27 | + chipset supports a wide wireless band but it is limited to some part of | |
| 28 | + it due to used antennas or power amplifier. An example case for this | |
| 29 | + can be tri-band wireless router with two identical chipsets used for two | |
| 30 | + different 5 GHz subbands. Using them incorrectly could not work or | |
| 31 | + decrease performance noticeably | |
| 32 | + | |
| 33 | +additionalProperties: true | |
| 34 | + | |
| 35 | +examples: | |
| 36 | + - | | |
| 37 | + pcie0 { | |
| 38 | + #address-cells = <3>; | |
| 39 | + #size-cells = <2>; | |
| 40 | + wifi@0,0 { | |
| 41 | + reg = <0x0000 0 0 0 0>; | |
| 42 | + ieee80211-freq-limit = <2402000 2482000>, | |
| 43 | + <5170000 5250000>; | |
| 44 | + }; | |
| 45 | + }; | |
| @@ -1,78 +0,0 @@ | ||
| 1 | −* MediaTek mt76xx devices | |
| 2 | − | |
| 3 | −This node provides properties for configuring the MediaTek mt76xx wireless | |
| 4 | −device. The node is expected to be specified as a child node of the PCI | |
| 5 | −controller to which the wireless chip is connected. | |
| 6 | − | |
| 7 | −Alternatively, it can specify the wireless part of the MT7628/MT7688 or | |
| 8 | −MT7622 SoC. For SoC, use the following compatible strings: | |
| 9 | − | |
| 10 | −compatible: | |
| 11 | −- "mediatek,mt7628-wmac" for MT7628/MT7688 | |
| 12 | −- "mediatek,mt7622-wmac" for MT7622 | |
| 13 | − | |
| 14 | −properties: | |
| 15 | −- reg: Address and length of the register set for the device. | |
| 16 | −- interrupts: Main device interrupt | |
| 17 | − | |
| 18 | −MT7622 specific properties: | |
| 19 | −- power-domains: phandle to the power domain that the WMAC is part of | |
| 20 | −- mediatek,infracfg: phandle to the infrastructure bus fabric syscon node | |
| 21 | − | |
| 22 | −Optional properties: | |
| 23 | − | |
| 24 | −- ieee80211-freq-limit: See ieee80211.txt | |
| 25 | −- mediatek,mtd-eeprom: Specify a MTD partition + offset containing EEPROM data | |
| 26 | −- big-endian: if the radio eeprom partition is written in big-endian, specify | |
| 27 | − this property | |
| 28 | −- mediatek,eeprom-merge-otp: Merge EEPROM data with OTP data. Can be used on | |
| 29 | − boards where the flash calibration data is generic and specific calibration | |
| 30 | − data should be pulled from the OTP ROM | |
| 31 | − | |
| 32 | −The MAC address can as well be set with corresponding optional properties | |
| 33 | −defined in net/ethernet.txt. | |
| 34 | − | |
| 35 | −Optional nodes: | |
| 36 | −- led: Properties for a connected LED | |
| 37 | − Optional properties: | |
| 38 | − - led-sources: See Documentation/devicetree/bindings/leds/common.txt | |
| 39 | − | |
| 40 | −&pcie { | |
| 41 | − pcie0 { | |
| 42 | − wifi@0,0 { | |
| 43 | − compatible = "mediatek,mt76"; | |
| 44 | − reg = <0x0000 0 0 0 0>; | |
| 45 | − ieee80211-freq-limit = <5000000 6000000>; | |
| 46 | − mediatek,mtd-eeprom = <&factory 0x8000>; | |
| 47 | − big-endian; | |
| 48 | − | |
| 49 | − led { | |
| 50 | − led-sources = <2>; | |
| 51 | − }; | |
| 52 | − }; | |
| 53 | − }; | |
| 54 | −}; | |
| 55 | − | |
| 56 | −MT7628 example: | |
| 57 | − | |
| 58 | −wmac: wmac@10300000 { | |
| 59 | − compatible = "mediatek,mt7628-wmac"; | |
| 60 | − reg = <0x10300000 0x100000>; | |
| 61 | − | |
| 62 | − interrupt-parent = <&cpuintc>; | |
| 63 | − interrupts = <6>; | |
| 64 | − | |
| 65 | − mediatek,mtd-eeprom = <&factory 0x0000>; | |
| 66 | −}; | |
| 67 | − | |
| 68 | −MT7622 example: | |
| 69 | − | |
| 70 | −wmac: wmac@18000000 { | |
| 71 | − compatible = "mediatek,mt7622-wmac"; | |
| 72 | − reg = <0 0x18000000 0 0x100000>; | |
| 73 | − interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; | |
| 74 | − | |
| 75 | − mediatek,infracfg = <&infracfg>; | |
| 76 | − | |
| 77 | − power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; | |
| 78 | −}; | |
| @@ -0,0 +1,228 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. | |
| 3 | + | |
| 4 | +%YAML 1.2 | |
| 5 | +--- | |
| 6 | +$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# | |
| 7 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 8 | + | |
| 9 | +title: MediaTek mt76 wireless devices Generic Binding | |
| 10 | + | |
| 11 | +maintainers: | |
| 12 | + - Felix Fietkau <nbd@nbd.name> | |
| 13 | + - Lorenzo Bianconi <lorenzo@kernel.org> | |
| 14 | + - Ryder Lee <ryder.lee@mediatek.com> | |
| 15 | + | |
| 16 | +description: | | |
| 17 | + This node provides properties for configuring the MediaTek mt76xx | |
| 18 | + wireless device. The node is expected to be specified as a child | |
| 19 | + node of the PCI controller to which the wireless chip is connected. | |
| 20 | + Alternatively, it can specify the wireless part of the MT7628/MT7688 | |
| 21 | + or MT7622 SoC. | |
| 22 | + | |
| 23 | +allOf: | |
| 24 | + - $ref: ieee80211.yaml# | |
| 25 | + | |
| 26 | +properties: | |
| 27 | + compatible: | |
| 28 | + enum: | |
| 29 | + - mediatek,mt76 | |
| 30 | + - mediatek,mt7628-wmac | |
| 31 | + - mediatek,mt7622-wmac | |
| 32 | + | |
| 33 | + reg: | |
| 34 | + maxItems: 1 | |
| 35 | + | |
| 36 | + interrupts: | |
| 37 | + maxItems: 1 | |
| 38 | + | |
| 39 | + power-domains: | |
| 40 | + maxItems: 1 | |
| 41 | + | |
| 42 | + mediatek,infracfg: | |
| 43 | + $ref: /schemas/types.yaml#/definitions/phandle | |
| 44 | + description: | |
| 45 | + Phandle to the infrastructure bus fabric syscon node. | |
| 46 | + This property is MT7622 specific | |
| 47 | + | |
| 48 | + ieee80211-freq-limit: true | |
| 49 | + | |
| 50 | + mediatek,mtd-eeprom: | |
| 51 | + $ref: /schemas/types.yaml#/definitions/phandle-array | |
| 52 | + description: | |
| 53 | + Phandle to a MTD partition + offset containing EEPROM data | |
| 54 | + | |
| 55 | + big-endian: | |
| 56 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 57 | + description: | |
| 58 | + Specify if the radio eeprom partition is written in big-endian | |
| 59 | + | |
| 60 | + mediatek,eeprom-merge-otp: | |
| 61 | + type: boolean | |
| 62 | + description: | |
| 63 | + Merge EEPROM data with OTP data. Can be used on boards where the flash | |
| 64 | + calibration data is generic and specific calibration data should be | |
| 65 | + pulled from the OTP ROM | |
| 66 | + | |
| 67 | + led: | |
| 68 | + type: object | |
| 69 | + $ref: /schemas/leds/common.yaml# | |
| 70 | + additionalProperties: false | |
| 71 | + properties: | |
| 72 | + led-sources: | |
| 73 | + maxItems: 1 | |
| 74 | + | |
| 75 | + power-limits: | |
| 76 | + type: object | |
| 77 | + additionalProperties: false | |
| 78 | + patternProperties: | |
| 79 | + "^r[0-9]+": | |
| 80 | + type: object | |
| 81 | + additionalProperties: false | |
| 82 | + properties: | |
| 83 | + regdomain: | |
| 84 | + $ref: /schemas/types.yaml#/definitions/string | |
| 85 | + description: | |
| 86 | + Regdomain refers to a legal regulatory region. Different | |
| 87 | + countries define different levels of allowable transmitter | |
| 88 | + power, time that a channel can be occupied, and different | |
| 89 | + available channels | |
| 90 | + enum: | |
| 91 | + - FCC | |
| 92 | + - ETSI | |
| 93 | + - JP | |
| 94 | + | |
| 95 | + patternProperties: | |
| 96 | + "^txpower-[256]g$": | |
| 97 | + type: object | |
| 98 | + additionalProperties: false | |
| 99 | + patternProperties: | |
| 100 | + "^b[0-9]+$": | |
| 101 | + type: object | |
| 102 | + additionalProperties: false | |
| 103 | + properties: | |
| 104 | + channels: | |
| 105 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 106 | + minItems: 2 | |
| 107 | + maxItems: 2 | |
| 108 | + description: | |
| 109 | + Pairs of first and last channel number of the selected | |
| 110 | + band | |
| 111 | + | |
| 112 | + rates-cck: | |
| 113 | + $ref: /schemas/types.yaml#/definitions/uint8-array | |
| 114 | + minItems: 4 | |
| 115 | + maxItems: 4 | |
| 116 | + description: | |
| 117 | + 4 half-dBm per-rate power limit values | |
| 118 | + | |
| 119 | + rates-ofdm: | |
| 120 | + $ref: /schemas/types.yaml#/definitions/uint8-array | |
| 121 | + minItems: 8 | |
| 122 | + maxItems: 8 | |
| 123 | + description: | |
| 124 | + 8 half-dBm per-rate power limit values | |
| 125 | + | |
| 126 | + rates-mcs: | |
| 127 | + $ref: /schemas/types.yaml#/definitions/uint8-matrix | |
| 128 | + description: | |
| 129 | + Sets of per-rate power limit values for 802.11n/802.11ac | |
| 130 | + rates for multiple channel bandwidth settings. | |
| 131 | + Each set starts with the number of channel bandwidth | |
| 132 | + settings for which the rate set applies, followed by | |
| 133 | + either 8 or 10 power limit values. The order of the | |
| 134 | + channel bandwidth settings is 20, 40, 80 and 160 MHz. | |
| 135 | + maxItems: 4 | |
| 136 | + items: | |
| 137 | + minItems: 9 | |
| 138 | + maxItems: 11 | |
| 139 | + | |
| 140 | + rates-ru: | |
| 141 | + $ref: /schemas/types.yaml#/definitions/uint8-matrix | |
| 142 | + description: | |
| 143 | + Sets of per-rate power limit values for 802.11ax rates | |
| 144 | + for multiple channel bandwidth or resource unit settings. | |
| 145 | + Each set starts with the number of channel bandwidth or | |
| 146 | + resource unit settings for which the rate set applies, | |
| 147 | + followed by 12 power limit values. The order of the | |
| 148 | + channel resource unit settings is RU26, RU52, RU106, | |
| 149 | + RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. | |
| 150 | + items: | |
| 151 | + minItems: 13 | |
| 152 | + maxItems: 13 | |
| 153 | + | |
| 154 | + txs-delta: | |
| 155 | + $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 156 | + description: | |
| 157 | + Half-dBm power delta for different numbers of antennas | |
| 158 | + | |
| 159 | +required: | |
| 160 | + - compatible | |
| 161 | + - reg | |
| 162 | + | |
| 163 | +additionalProperties: false | |
| 164 | + | |
| 165 | +examples: | |
| 166 | + - | | |
| 167 | + pcie0 { | |
| 168 | + #address-cells = <3>; | |
| 169 | + #size-cells = <2>; | |
| 170 | + wifi@0,0 { | |
| 171 | + compatible = "mediatek,mt76"; | |
| 172 | + reg = <0x0000 0 0 0 0>; | |
| 173 | + ieee80211-freq-limit = <5000000 6000000>; | |
| 174 | + mediatek,mtd-eeprom = <&factory 0x8000>; | |
| 175 | + big-endian; | |
| 176 | + | |
| 177 | + led { | |
| 178 | + led-sources = <2>; | |
| 179 | + }; | |
| 180 | + | |
| 181 | + power-limits { | |
| 182 | + r0 { | |
| 183 | + regdomain = "FCC"; | |
| 184 | + txpower-5g { | |
| 185 | + b0 { | |
| 186 | + channels = <36 48>; | |
| 187 | + rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>; | |
| 188 | + rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>, | |
| 189 | + <3 22 22 22 22 22 22 22 22 22 22>; | |
| 190 | + rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>, | |
| 191 | + <4 20 20 20 20 20 20 20 20 20 20 20 20>; | |
| 192 | + }; | |
| 193 | + b1 { | |
| 194 | + channels = <100 181>; | |
| 195 | + rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>; | |
| 196 | + rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>; | |
| 197 | + txs-delta = <12 9 6>; | |
| 198 | + rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>; | |
| 199 | + }; | |
| 200 | + }; | |
| 201 | + }; | |
| 202 | + }; | |
| 203 | + }; | |
| 204 | + }; | |
| 205 | + | |
| 206 | + - | | |
| 207 | + wifi@10300000 { | |
| 208 | + compatible = "mediatek,mt7628-wmac"; | |
| 209 | + reg = <0x10300000 0x100000>; | |
| 210 | + | |
| 211 | + interrupt-parent = <&cpuintc>; | |
| 212 | + interrupts = <6>; | |
| 213 | + | |
| 214 | + mediatek,mtd-eeprom = <&factory 0x0>; | |
| 215 | + }; | |
| 216 | + | |
| 217 | + - | | |
| 218 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 219 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 220 | + wifi@18000000 { | |
| 221 | + compatible = "mediatek,mt7622-wmac"; | |
| 222 | + reg = <0x10300000 0x100000>; | |
| 223 | + interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; | |
| 224 | + | |
| 225 | + mediatek,infracfg = <&infracfg>; | |
| 226 | + | |
| 227 | + power-domains = <&scpsys 3>; | |
| 228 | + }; | |
| @@ -42,11 +42,23 @@ Optional properties: · 41 unmodified lines | ||
| 42 | 42 | support both 1000BaseX and SGMII modes. If set, the phy-mode |
| 43 | 43 | should be set to match the mode selected on core reset (i.e. |
| 44 | 44 | by the basex_or_sgmii core input line). |
| 45 | −- clocks : AXI bus clock for the device. Refer to common clock bindings. | |
| 46 | − Used to calculate MDIO clock divisor. If not specified, it is | |
| 47 | − auto-detected from the CPU clock (but only on platforms where | |
| 48 | − this is possible). New device trees should specify this - the | |
| 49 | − auto detection is only for backward compatibility. | |
| 45 | +- clock-names: Tuple listing input clock names. Possible clocks: | |
| 46 | + s_axi_lite_clk: Clock for AXI register slave interface | |
| 47 | + axis_clk: AXI4-Stream clock for TXD RXD TXC and RXS interfaces | |
| 48 | + ref_clk: Ethernet reference clock, used by signal delay | |
| 49 | + primitives and transceivers | |
| 50 | + mgt_clk: MGT reference clock (used by optional internal | |
| 51 | + PCS/PMA PHY) | |
| 52 | + | |
| 53 | + Note that if s_axi_lite_clk is not specified by name, the | |
| 54 | + first clock of any name is used for this. If that is also not | |
| 55 | + specified, the clock rate is auto-detected from the CPU clock | |
| 56 | + (but only on platforms where this is possible). New device | |
| 57 | + trees should specify all applicable clocks by name - the | |
| 58 | + fallbacks to an unnamed clock or to CPU clock are only for | |
| 59 | + backward compatibility. | |
| 60 | +- clocks: Phandles to input clocks matching clock-names. Refer to common | |
| 61 | + clock bindings. | |
| 50 | 62 | - axistream-connected: Reference to another node which contains the resources |
| 51 | 63 | for the AXI DMA controller used by this device. |
| 52 | 64 | If this is specified, the DMA-related resources from that |
| @@ -62,7 +74,8 @@ Example: · 9 unmodified lines | ||
| 62 | 74 | device_type = "network"; |
| 63 | 75 | interrupt-parent = <µblaze_0_axi_intc>; |
| 64 | 76 | interrupts = <2 0 1>; |
| 65 | − clocks = <&axi_clk>; | |
| 77 | + clock-names = "s_axi_lite_clk", "axis_clk", "ref_clk", "mgt_clk"; | |
| 78 | + clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>; | |
| 66 | 79 | phy-mode = "mii"; |
| 67 | 80 | reg = <0x40c00000 0x40000 0x50c00000 0x40000>; |
| 68 | 81 | xlnx,rxcsum = <0x2>; |
| @@ -0,0 +1,34 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/brcm,nvram.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Broadcom's NVRAM | |
| 8 | + | |
| 9 | +description: | | |
| 10 | + Broadcom's NVRAM is a structure containing device specific environment | |
| 11 | + variables. It is used for storing device configuration, booting parameters | |
| 12 | + and calibration data. | |
| 13 | + | |
| 14 | + NVRAM can be accessed on Broadcom BCM47xx MIPS and Northstar ARM Cortex-A9 | |
| 15 | + devices usiong I/O mapped memory. | |
| 16 | + | |
| 17 | +maintainers: | |
| 18 | + - Rafał Miłecki <rafal@milecki.pl> | |
| 19 | + | |
| 20 | +allOf: | |
| 21 | + - $ref: "nvmem.yaml#" | |
| 22 | + | |
| 23 | +properties: | |
| 24 | + compatible: | |
| 25 | + const: brcm,nvram | |
| 26 | + | |
| 27 | +unevaluatedProperties: false | |
| 28 | + | |
| 29 | +examples: | |
| 30 | + - | | |
| 31 | + nvram@1eff0000 { | |
| 32 | + compatible = "brcm,nvram"; | |
| 33 | + reg = <0x1eff0000 0x10000>; | |
| 34 | + }; | |
| @@ -7,7 +7,9 @@ Required properties: · 6 unmodified lines | ||
| 7 | 7 | "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622 |
| 8 | 8 | "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623 |
| 9 | 9 | "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173 |
| 10 | + "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192 | |
| 10 | 11 | "mediatek,mt8516-efuse", "mediatek,efuse": for MT8516 |
| 12 | + "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192 | |
| 11 | 13 | - reg: Should contain registers location and length |
| 12 | 14 | |
| 13 | 15 | = Data cells = |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | 4 | $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml# |
| 5 | −$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/base.yaml# | |
| 6 | 6 | |
| 7 | 7 | title: NVMEM (Non Volatile Memory) Consumer Device Tree Bindings |
| 8 | 8 | |
| @@ -23,12 +23,10 @@ properties: · 14 unmodified lines | ||
| 23 | 23 | List of phandle to the nvmem data cells. |
| 24 | 24 | |
| 25 | 25 | nvmem-names: |
| 26 | − $ref: /schemas/types.yaml#/definitions/string-array | |
| 27 | 26 | description: |
| 28 | 27 | Names for the each nvmem provider. |
| 29 | 28 | |
| 30 | 29 | nvmem-cell-names: |
| 31 | − $ref: /schemas/types.yaml#/definitions/string-array | |
| 32 | 30 | description: |
| 33 | 31 | Names for each nvmem-cells specified. |
| 34 | 32 | |
| @@ -20,9 +20,6 @@ description: | · 19 unmodified lines | ||
| 20 | 20 | storage device. |
| 21 | 21 | |
| 22 | 22 | properties: |
| 23 | − $nodename: | |
| 24 | − pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$" | |
| 25 | − | |
| 26 | 23 | "#address-cells": |
| 27 | 24 | const: 1 |
| 28 | 25 | |
| @@ -24,6 +24,7 @@ properties: · 23 unmodified lines | ||
| 24 | 24 | - qcom,msm8998-qfprom |
| 25 | 25 | - qcom,qcs404-qfprom |
| 26 | 26 | - qcom,sc7180-qfprom |
| 27 | + - qcom,sc7280-qfprom | |
| 27 | 28 | - qcom,sdm845-qfprom |
| 28 | 29 | - const: qcom,qfprom |
| 29 | 30 | |
| @@ -1,43 +0,0 @@ | ||
| 1 | −HiSilicon Hip05 and Hip06 PCIe host bridge DT description | |
| 2 | − | |
| 3 | −HiSilicon PCIe host controller is based on the Synopsys DesignWare PCI core. | |
| 4 | −It shares common functions with the PCIe DesignWare core driver and inherits | |
| 5 | −common properties defined in | |
| 6 | −Documentation/devicetree/bindings/pci/designware-pcie.txt. | |
| 7 | − | |
| 8 | −Additional properties are described here: | |
| 9 | − | |
| 10 | −Required properties | |
| 11 | −- compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie". | |
| 12 | −- reg: Should contain rc_dbi, config registers location and length. | |
| 13 | −- reg-names: Must include the following entries: | |
| 14 | − "rc_dbi": controller configuration registers; | |
| 15 | − "config": PCIe configuration space registers. | |
| 16 | −- msi-parent: Should be its_pcie which is an ITS receiving MSI interrupts. | |
| 17 | −- port-id: Should be 0, 1, 2 or 3. | |
| 18 | − | |
| 19 | −Optional properties: | |
| 20 | −- status: Either "ok" or "disabled". | |
| 21 | −- dma-coherent: Present if DMA operations are coherent. | |
| 22 | − | |
| 23 | −Hip05 Example (note that Hip06 is the same except compatible): | |
| 24 | − pcie@b0080000 { | |
| 25 | − compatible = "hisilicon,hip05-pcie", "snps,dw-pcie"; | |
| 26 | − reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>; | |
| 27 | − reg-names = "rc_dbi", "config"; | |
| 28 | − bus-range = <0 15>; | |
| 29 | − msi-parent = <&its_pcie>; | |
| 30 | − #address-cells = <3>; | |
| 31 | − #size-cells = <2>; | |
| 32 | − device_type = "pci"; | |
| 33 | − dma-coherent; | |
| 34 | − ranges = <0x82000000 0 0x00000000 0x220 0x00000000 0 0x10000000>; | |
| 35 | − num-lanes = <8>; | |
| 36 | − port-id = <1>; | |
| 37 | − #interrupt-cells = <1>; | |
| 38 | − interrupt-map-mask = <0xf800 0 0 7>; | |
| 39 | − interrupt-map = <0x0 0 0 1 &mbigen_pcie 1 10 | |
| 40 | − 0x0 0 0 2 &mbigen_pcie 2 11 | |
| 41 | − 0x0 0 0 3 &mbigen_pcie 3 12 | |
| 42 | − 0x0 0 0 4 &mbigen_pcie 4 13>; | |
| 43 | − }; | |
| @@ -0,0 +1,181 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/pci/mediatek-pcie-gen3.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: Gen3 PCIe controller on MediaTek SoCs | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Jianjun Wang <jianjun.wang@mediatek.com> | |
| 11 | + | |
| 12 | +description: |+ | |
| 13 | + PCIe Gen3 MAC controller for MediaTek SoCs, it supports Gen3 speed | |
| 14 | + and compatible with Gen2, Gen1 speed. | |
| 15 | + | |
| 16 | + This PCIe controller supports up to 256 MSI vectors, the MSI hardware | |
| 17 | + block diagram is as follows: | |
| 18 | + | |
| 19 | + +-----+ | |
| 20 | + | GIC | | |
| 21 | + +-----+ | |
| 22 | + ^ | |
| 23 | + | | |
| 24 | + port->irq | |
| 25 | + | | |
| 26 | + +-+-+-+-+-+-+-+-+ | |
| 27 | + |0|1|2|3|4|5|6|7| (PCIe intc) | |
| 28 | + +-+-+-+-+-+-+-+-+ | |
| 29 | + ^ ^ ^ | |
| 30 | + | | ... | | |
| 31 | + +-------+ +------+ +-----------+ | |
| 32 | + | | | | |
| 33 | + +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ | |
| 34 | + |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets) | |
| 35 | + +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ | |
| 36 | + ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ | |
| 37 | + | | | | | | | | | | | | (MSI vectors) | |
| 38 | + | | | | | | | | | | | | | |
| 39 | + | |
| 40 | + (MSI SET0) (MSI SET1) ... (MSI SET7) | |
| 41 | + | |
| 42 | + With 256 MSI vectors supported, the MSI vectors are composed of 8 sets, | |
| 43 | + each set has its own address for MSI message, and supports 32 MSI vectors | |
| 44 | + to generate interrupt. | |
| 45 | + | |
| 46 | +allOf: | |
| 47 | + - $ref: /schemas/pci/pci-bus.yaml# | |
| 48 | + | |
| 49 | +properties: | |
| 50 | + compatible: | |
| 51 | + const: mediatek,mt8192-pcie | |
| 52 | + | |
| 53 | + reg: | |
| 54 | + maxItems: 1 | |
| 55 | + | |
| 56 | + reg-names: | |
| 57 | + items: | |
| 58 | + - const: pcie-mac | |
| 59 | + | |
| 60 | + interrupts: | |
| 61 | + maxItems: 1 | |
| 62 | + | |
| 63 | + ranges: | |
| 64 | + minItems: 1 | |
| 65 | + maxItems: 8 | |
| 66 | + | |
| 67 | + resets: | |
| 68 | + minItems: 1 | |
| 69 | + maxItems: 2 | |
| 70 | + | |
| 71 | + reset-names: | |
| 72 | + minItems: 1 | |
| 73 | + maxItems: 2 | |
| 74 | + items: | |
| 75 | + - const: phy | |
| 76 | + - const: mac | |
| 77 | + | |
| 78 | + clocks: | |
| 79 | + maxItems: 6 | |
| 80 | + | |
| 81 | + clock-names: | |
| 82 | + items: | |
| 83 | + - const: pl_250m | |
| 84 | + - const: tl_26m | |
| 85 | + - const: tl_96m | |
| 86 | + - const: tl_32k | |
| 87 | + - const: peri_26m | |
| 88 | + - const: top_133m | |
| 89 | + | |
| 90 | + assigned-clocks: | |
| 91 | + maxItems: 1 | |
| 92 | + | |
| 93 | + assigned-clock-parents: | |
| 94 | + maxItems: 1 | |
| 95 | + | |
| 96 | + phys: | |
| 97 | + maxItems: 1 | |
| 98 | + | |
| 99 | + '#interrupt-cells': | |
| 100 | + const: 1 | |
| 101 | + | |
| 102 | + interrupt-controller: | |
| 103 | + description: Interrupt controller node for handling legacy PCI interrupts. | |
| 104 | + type: object | |
| 105 | + properties: | |
| 106 | + '#address-cells': | |
| 107 | + const: 0 | |
| 108 | + '#interrupt-cells': | |
| 109 | + const: 1 | |
| 110 | + interrupt-controller: true | |
| 111 | + | |
| 112 | + required: | |
| 113 | + - '#address-cells' | |
| 114 | + - '#interrupt-cells' | |
| 115 | + - interrupt-controller | |
| 116 | + | |
| 117 | + additionalProperties: false | |
| 118 | + | |
| 119 | +required: | |
| 120 | + - compatible | |
| 121 | + - reg | |
| 122 | + - reg-names | |
| 123 | + - interrupts | |
| 124 | + - ranges | |
| 125 | + - clocks | |
| 126 | + - '#interrupt-cells' | |
| 127 | + - interrupt-controller | |
| 128 | + | |
| 129 | +unevaluatedProperties: false | |
| 130 | + | |
| 131 | +examples: | |
| 132 | + - | | |
| 133 | + #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 134 | + #include <dt-bindings/interrupt-controller/irq.h> | |
| 135 | + | |
| 136 | + bus { | |
| 137 | + #address-cells = <2>; | |
| 138 | + #size-cells = <2>; | |
| 139 | + | |
| 140 | + pcie: pcie@11230000 { | |
| 141 | + compatible = "mediatek,mt8192-pcie"; | |
| 142 | + device_type = "pci"; | |
| 143 | + #address-cells = <3>; | |
| 144 | + #size-cells = <2>; | |
| 145 | + reg = <0x00 0x11230000 0x00 0x4000>; | |
| 146 | + reg-names = "pcie-mac"; | |
| 147 | + interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>; | |
| 148 | + bus-range = <0x00 0xff>; | |
| 149 | + ranges = <0x82000000 0x00 0x12000000 0x00 | |
| 150 | + 0x12000000 0x00 0x1000000>; | |
| 151 | + clocks = <&infracfg 44>, | |
| 152 | + <&infracfg 40>, | |
| 153 | + <&infracfg 43>, | |
| 154 | + <&infracfg 97>, | |
| 155 | + <&infracfg 99>, | |
| 156 | + <&infracfg 111>; | |
| 157 | + clock-names = "pl_250m", "tl_26m", "tl_96m", | |
| 158 | + "tl_32k", "peri_26m", "top_133m"; | |
| 159 | + assigned-clocks = <&topckgen 50>; | |
| 160 | + assigned-clock-parents = <&topckgen 91>; | |
| 161 | + | |
| 162 | + phys = <&pciephy>; | |
| 163 | + phy-names = "pcie-phy"; | |
| 164 | + | |
| 165 | + resets = <&infracfg_rst 2>, | |
| 166 | + <&infracfg_rst 3>; | |
| 167 | + reset-names = "phy", "mac"; | |
| 168 | + | |
| 169 | + #interrupt-cells = <1>; | |
| 170 | + interrupt-map-mask = <0 0 0 0x7>; | |
| 171 | + interrupt-map = <0 0 0 1 &pcie_intc 0>, | |
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File renamed without changes.
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