History

Merge tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX dt-bindings change for 5.18: - New board compatible for Protonic PRT8MM, Toradex Verdin-imx8mm, emCON-MX8M Mini, i.MX8MM GW7903. - A series of patches from Lucas Stach adding support for i.MX8M VPU and HSIO blk-ctrl power domains. * tag 'imx-bindings-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: imx: add imx8mm gw7903 support dt-bindings: soc: add binding for i.MX8MP HSIO blk-ctrl dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domains dt-bindings: power: add defines for i.MX8MP power domain dt-bindings: arm: fsl: add toradex,verdin-imx8mm et al. dt-bindings: arm: Add emtrion hardware emCON-MX8M Mini dt-bindings: arm: imx: add Protonic PRT8MM board compatible dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains

Arnd Bergmann committed 4 years ago

Commit fd9eff22 parents 3b36435 039facb6 files · +213 −0Browse files

Unified · Split

6 files
  1. Documentation/devicetree/bindings/arm/fsl.yaml +24 −0
  2. Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +2 −0
  3. Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml +78 −0
  4. Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml +71 −0
  5. include/dt-bindings/power/imx8mp-power.h +35 −0
  6. include/dt-bindings/power/imx8mq-power.h +3 −0
Documentation/devicetree/bindings/arm/fsl.yaml+24−0
@@ -762,6 +762,7 @@ properties: · 761 unmodified lines
762 - enum:762 - enum:
763 - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit763 - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit
764 - boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board764 - boundary,imx8mm-nitrogen8mm # i.MX8MM Nitrogen Board
765 - emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base
765 - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board766 - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board
766 - fsl,imx8mm-evk # i.MX8MM EVK Board767 - fsl,imx8mm-evk # i.MX8MM EVK Board
767 - gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit768 - gw,imx8mm-gw71xx-0x # i.MX8MM Gateworks Development Kit
@@ -769,8 +770,13 @@ properties: · 1 unmodified line
769 - gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit770 - gw,imx8mm-gw73xx-0x # i.MX8MM Gateworks Development Kit
770 - gw,imx8mm-gw7901 # i.MX8MM Gateworks Board771 - gw,imx8mm-gw7901 # i.MX8MM Gateworks Board
771 - gw,imx8mm-gw7902 # i.MX8MM Gateworks Board772 - gw,imx8mm-gw7902 # i.MX8MM Gateworks Board
773 - gw,imx8mm-gw7903 # i.MX8MM Gateworks Board
772 - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM774 - kontron,imx8mm-n801x-som # i.MX8MM Kontron SL (N801X) SOM
775 - toradex,verdin-imx8mm # Verdin iMX8M Mini Modules
776 - toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Modules without Wi-Fi / BT
777 - toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Modules
773 - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module778 - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module
779 - prt,prt8mm # i.MX8MM Protonic PRT8MM Board
774 - const: fsl,imx8mm780 - const: fsl,imx8mm
775 781
776 - description: Engicam i.Core MX8M Mini SoM based boards782 - description: Engicam i.Core MX8M Mini SoM based boards
@@ -787,6 +793,24 @@ properties: · 10 unmodified lines
787 - const: kontron,imx8mm-n801x-som793 - const: kontron,imx8mm-n801x-som
788 - const: fsl,imx8mm794 - const: fsl,imx8mm
789 795
796 - description: Toradex Boards with Verdin iMX8M Mini Modules
797 items:
798 - enum:
799 - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia
800 - toradex,verdin-imx8mm-nonwifi-dev # Verdin iMX8M Mini Module on Verdin Development Board
801 - const: toradex,verdin-imx8mm-nonwifi # Verdin iMX8M Mini Module without Wi-Fi / BT
802 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
803 - const: fsl,imx8mm
804
805 - description: Toradex Boards with Verdin iMX8M Mini Wi-Fi / BT Modules
806 items:
807 - enum:
808 - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia
809 - toradex,verdin-imx8mm-wifi-dev # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.
810 - const: toradex,verdin-imx8mm-wifi # Verdin iMX8M Mini Wi-Fi / BT Module
811 - const: toradex,verdin-imx8mm # Verdin iMX8M Mini Module
812 - const: fsl,imx8mm
813
790 - description: Variscite VAR-SOM-MX8MM based boards814 - description: Variscite VAR-SOM-MX8MM based boards
791 items:815 items:
792 - const: variscite,var-som-mx8mm-symphony816 - const: variscite,var-som-mx8mm-symphony
Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml+2−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
28 - fsl,imx8mn-gpc28 - fsl,imx8mn-gpc
29 - fsl,imx8mq-gpc29 - fsl,imx8mq-gpc
30 - fsl,imx8mm-gpc30 - fsl,imx8mm-gpc
31 - fsl,imx8mp-gpc
31 32
32 reg:33 reg:
33 maxItems: 134 maxItems: 1
@@ -57,6 +58,7 @@ properties: · 23 unmodified lines
57 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and58 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
58 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc59 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
59 include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc60 include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
61 include/dt-bindings/power/imx8mp-power.h for fsl,imx8mp-gpc
60 maxItems: 162 maxItems: 1
61 63
62 clocks:64 clocks:
Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml+78−0
@@ -0,0 +1,78 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8MP HSIO blk-ctrl
8
9maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11
12description:
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
15 (USB an PCIe) peripherals located in the HSIO domain of the SoC.
16
17properties:
18 compatible:
19 items:
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
22
23 reg:
24 maxItems: 1
25
26 '#power-domain-cells':
27 const: 1
28
29 power-domains:
30 minItems: 6
31 maxItems: 6
32
33 power-domain-names:
34 items:
35 - const: bus
36 - const: usb
37 - const: usb-phy1
38 - const: usb-phy2
39 - const: pcie
40 - const: pcie-phy
41
42 clocks:
43 minItems: 2
44 maxItems: 2
45
46 clock-names:
47 items:
48 - const: usb
49 - const: pcie
50
51required:
52 - compatible
53 - reg
54 - power-domains
55 - power-domain-names
56 - clocks
57 - clock-names
58
59additionalProperties: false
60
61examples:
62 - |
63 #include <dt-bindings/clock/imx8mp-clock.h>
64 #include <dt-bindings/power/imx8mp-power.h>
65
66 hsio_blk_ctrl: blk-ctrl@32f10000 {
67 compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
68 reg = <0x32f10000 0x24>;
69 clocks = <&clk IMX8MP_CLK_USB_ROOT>,
70 <&clk IMX8MP_CLK_PCIE_ROOT>;
71 clock-names = "usb", "pcie";
72 power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
73 <&pgc_usb1_phy>, <&pgc_usb2_phy>,
74 <&pgc_hsiomix>, <&pgc_pcie_phy>;
75 power-domain-names = "bus", "usb", "usb-phy1",
76 "usb-phy2", "pcie", "pcie-phy";
77 #power-domain-cells = <1>;
78 };
Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml+71−0
@@ -0,0 +1,71 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX8MQ VPU blk-ctrl
8
9maintainers:
10 - Lucas Stach <l.stach@pengutronix.de>
11
12description:
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
15 located in the VPU domain of the SoC.
16
17properties:
18 compatible:
19 items:
20 - const: fsl,imx8mq-vpu-blk-ctrl
21
22 reg:
23 maxItems: 1
24
25 '#power-domain-cells':
26 const: 1
27
28 power-domains:
29 minItems: 3
30 maxItems: 3
31
32 power-domain-names:
33 items:
34 - const: bus
35 - const: g1
36 - const: g2
37
38 clocks:
39 minItems: 2
40 maxItems: 2
41
42 clock-names:
43 items:
44 - const: g1
45 - const: g2
46
47required:
48 - compatible
49 - reg
50 - power-domains
51 - power-domain-names
52 - clocks
53 - clock-names
54
55additionalProperties: false
56
57examples:
58 - |
59 #include <dt-bindings/clock/imx8mq-clock.h>
60 #include <dt-bindings/power/imx8mq-power.h>
61
62 vpu_blk_ctrl: blk-ctrl@38320000 {
63 compatible = "fsl,imx8mq-vpu-blk-ctrl";
64 reg = <0x38320000 0x100>;
65 power-domains = <&pgc_vpu>, <&pgc_vpu>, <&pgc_vpu>;
66 power-domain-names = "bus", "g1", "g2";
67 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>,
68 <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
69 clock-names = "g1", "g2";
70 #power-domain-cells = <1>;
71 };
include/dt-bindings/power/imx8mp-power.h+35−0
@@ -0,0 +1,35 @@
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/*
3 * Copyright (C) 2020 Pengutronix, Sascha Hauer <kernel@pengutronix.de>
4 */
5
6#ifndef __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
7#define __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__
8
9#define IMX8MP_POWER_DOMAIN_MIPI_PHY1 0
10#define IMX8MP_POWER_DOMAIN_PCIE_PHY 1
11#define IMX8MP_POWER_DOMAIN_USB1_PHY 2
12#define IMX8MP_POWER_DOMAIN_USB2_PHY 3
13#define IMX8MP_POWER_DOMAIN_MLMIX 4
14#define IMX8MP_POWER_DOMAIN_AUDIOMIX 5
15#define IMX8MP_POWER_DOMAIN_GPU2D 6
16#define IMX8MP_POWER_DOMAIN_GPUMIX 7
17#define IMX8MP_POWER_DOMAIN_VPUMIX 8
18#define IMX8MP_POWER_DOMAIN_GPU3D 9
19#define IMX8MP_POWER_DOMAIN_MEDIAMIX 10
20#define IMX8MP_POWER_DOMAIN_VPU_G1 11
21#define IMX8MP_POWER_DOMAIN_VPU_G2 12
22#define IMX8MP_POWER_DOMAIN_VPU_VC8000E 13
23#define IMX8MP_POWER_DOMAIN_HDMIMIX 14
24#define IMX8MP_POWER_DOMAIN_HDMI_PHY 15
25#define IMX8MP_POWER_DOMAIN_MIPI_PHY2 16
26#define IMX8MP_POWER_DOMAIN_HSIOMIX 17
27#define IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP 18
28
29#define IMX8MP_HSIOBLK_PD_USB 0
30#define IMX8MP_HSIOBLK_PD_USB_PHY1 1
31#define IMX8MP_HSIOBLK_PD_USB_PHY2 2
32#define IMX8MP_HSIOBLK_PD_PCIE 3
33#define IMX8MP_HSIOBLK_PD_PCIE_PHY 4
34
35#endif
include/dt-bindings/power/imx8mq-power.h+3−0
@@ -18,4 +18,7 @@ · 17 unmodified lines
18#define IMX8M_POWER_DOMAIN_MIPI_CSI2 918#define IMX8M_POWER_DOMAIN_MIPI_CSI2 9
19#define IMX8M_POWER_DOMAIN_PCIE2 1019#define IMX8M_POWER_DOMAIN_PCIE2 10
20 20
21#define IMX8MQ_VPUBLK_PD_G1 0
22#define IMX8MQ_VPUBLK_PD_G2 1
23
21#endif24#endif

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