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arm-gen.c: replace register constants with enum values

and support sp in intr

Daniel Glöckner committed 10 years ago

Commit 52a15221 parent 6775c7c1 file · +17 −10Browse files

Unified · Split

arm-gen.c+17−10
@@ -79,6 +79,8 @@ enum { · 78 unmodified lines
79 TREG_F6,79 TREG_F6,
80 TREG_F7,80 TREG_F7,
81#endif81#endif
82 TREG_SP = 13,
83 TREG_LR,
82};84};
83 85
84#ifdef TCC_ARM_VFP86#ifdef TCC_ARM_VFP
@@ -406,24 +408,26 @@ static uint32_t vfpr(int r) · 321 unmodified lines
406{408{
407 if(r<TREG_F0 || r>TREG_F7)409 if(r<TREG_F0 || r>TREG_F7)
408 tcc_error("compiler error! register %i is no vfp register",r);410 tcc_error("compiler error! register %i is no vfp register",r);
409 return r-5;411 return r - TREG_F0;
410}412}
411#else413#else
412static uint32_t fpr(int r)414static uint32_t fpr(int r)
413{415{
414 if(r<TREG_F0 || r>TREG_F3)416 if(r<TREG_F0 || r>TREG_F3)
415 tcc_error("compiler error! register %i is no fpa register",r);417 tcc_error("compiler error! register %i is no fpa register",r);
416 return r-5;418 return r - TREG_F0;
417}419}
418#endif420#endif
419 421
420static uint32_t intr(int r)422static uint32_t intr(int r)
421{423{
422 if(r==4)424 if(r == TREG_R12)
423 return 12;425 return 12;
424 if((r<0 || r>4) && r!=14)426 if(r >= TREG_R0 && r <= TREG_R3)
425 tcc_error("compiler error! register %i is no int register",r);427 return r - TREG_R0;
426 return r;428 if (r >= TREG_SP && r <= TREG_LR)
429 return r + (13 - TREG_SP);
430 tcc_error("compiler error! register %i is no int register",r);
427}431}
428 432
429static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)433static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)
@@ -544,7 +548,8 @@ void load(int r, SValue *sv) · 114 unmodified lines
544 v1.type.t = VT_PTR;548 v1.type.t = VT_PTR;
545 v1.r = VT_LOCAL | VT_LVAL;549 v1.r = VT_LOCAL | VT_LVAL;
546 v1.c.i = sv->c.i;550 v1.c.i = sv->c.i;
547 load(base=14 /* lr */, &v1);551 load(TREG_LR, &v1);
552 base = 14; /* lr */
548 fc=sign=0;553 fc=sign=0;
549 v=VT_LOCAL;554 v=VT_LOCAL;
550 } else if(v == VT_CONST) {555 } else if(v == VT_CONST) {
@@ -552,7 +557,8 @@ void load(int r, SValue *sv) · 1 unmodified line
552 v1.r = fr&~VT_LVAL;557 v1.r = fr&~VT_LVAL;
553 v1.c.i = sv->c.i;558 v1.c.i = sv->c.i;
554 v1.sym=sv->sym;559 v1.sym=sv->sym;
555 load(base=14, &v1);560 load(TREG_LR, &v1);
561 base = 14; /* lr */
556 fc=sign=0;562 fc=sign=0;
557 v=VT_LOCAL;563 v=VT_LOCAL;
558 } else if(v < VT_CONST) {564 } else if(v < VT_CONST) {
@@ -678,7 +684,7 @@ void store(int r, SValue *sv) · 119 unmodified lines
678 684
679 v = fr & VT_VALMASK;685 v = fr & VT_VALMASK;
680 if (fr & VT_LVAL || fr == VT_LOCAL) {686 if (fr & VT_LVAL || fr == VT_LOCAL) {
681 uint32_t base = 0xb;687 uint32_t base = 0xb; /* fp */
682 if(v < VT_CONST) {688 if(v < VT_CONST) {
683 base=intr(v);689 base=intr(v);
684 v=VT_LOCAL;690 v=VT_LOCAL;
@@ -688,7 +694,8 @@ void store(int r, SValue *sv) · 3 unmodified lines
688 v1.r = fr&~VT_LVAL;694 v1.r = fr&~VT_LVAL;
689 v1.c.i = sv->c.i;695 v1.c.i = sv->c.i;
690 v1.sym=sv->sym;696 v1.sym=sv->sym;
691 load(base=14, &v1);697 load(TREG_LR, &v1);
698 base = 14; /* lr */
692 fc=sign=0;699 fc=sign=0;
693 v=VT_LOCAL;700 v=VT_LOCAL;
694 }701 }