Unified · Split
| @@ -191,6 +191,7 @@ static int oad(int c, int s) · 190 unmodified lines | |||
| 191 | return s; | 191 | return s; |
| 192 | } | 192 | } |
| 193 | 193 | ||
| 194 | #if 0 | ||
| 194 | /* output constant with relocation if 'r & VT_SYM' is true */ | 195 | /* output constant with relocation if 'r & VT_SYM' is true */ |
| 195 | static void gen_addr64(int r, Sym *sym, int64_t c) | 196 | static void gen_addr64(int r, Sym *sym, int64_t c) |
| 196 | { | 197 | { |
| @@ -198,6 +199,7 @@ static void gen_addr64(int r, Sym *sym, int64_t c) · 1 unmodified line | |||
| 198 | greloc(cur_text_section, sym, ind, R_X86_64_64); | 199 | greloc(cur_text_section, sym, ind, R_X86_64_64); |
| 199 | gen_le64(c); | 200 | gen_le64(c); |
| 200 | } | 201 | } |
| 202 | #endif | ||
| 201 | 203 | ||
| 202 | /* output constant with relocation if 'r & VT_SYM' is true */ | 204 | /* output constant with relocation if 'r & VT_SYM' is true */ |
| 203 | static void gen_addrpc32(int r, Sym *sym, int c) | 205 | static void gen_addrpc32(int r, Sym *sym, int c) |
| @@ -354,30 +356,29 @@ void load(int r, SValue *sv) · 150 unmodified lines | |||
| 354 | gen_modrm(r, fr, sv->sym, fc); | 356 | gen_modrm(r, fr, sv->sym, fc); |
| 355 | } else { | 357 | } else { |
| 356 | if (v == VT_CONST) { | 358 | if (v == VT_CONST) { |
| 357 | if ((ft & VT_BTYPE) == VT_LLONG) { | 359 | if (fr & VT_SYM) { |
| 358 | assert(!(fr & VT_SYM)); | 360 | #ifdef TCC_TARGET_PE |
| 361 | o(0x8d48); | ||
| 362 | o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */ | ||
| 363 | gen_addrpc32(fr, sv->sym, fc); | ||
| 364 | #else | ||
| 365 | if (sv->sym->type.t & VT_STATIC) { | ||
| 366 | o(0x8d48); | ||
| 367 | o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */ | ||
| 368 | gen_addrpc32(fr, sv->sym, fc); | ||
| 369 | } else { | ||
| 370 | o(0x8b48); | ||
| 371 | o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */ | ||
| 372 | gen_gotpcrel(r, sv->sym, fc); | ||
| 373 | } | ||
| 374 | #endif | ||
| 375 | } else if (is64_type(ft)) { | ||
| 359 | o(0x48); | 376 | o(0x48); |
| 360 | o(0xb8 + REG_VALUE(r)); /* mov $xx, r */ | 377 | o(0xb8 + REG_VALUE(r)); /* mov $xx, r */ |
| 361 | gen_addr64(fr, sv->sym, sv->c.ull); | 378 | gen_le64(sv->c.ull); |
| 362 | } else { | 379 | } else { |
| 363 | if (fr & VT_SYM) { | 380 | o(0xb8 + REG_VALUE(r)); /* mov $xx, r */ |
| 364 | #ifndef TCC_TARGET_PE | 381 | gen_le32(fc); |
| 365 | if (sv->sym->type.t & VT_STATIC) { | ||
| 366 | #endif | ||
| 367 | o(0x8d48); | ||
| 368 | o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */ | ||
| 369 | gen_addrpc32(fr, sv->sym, fc); | ||
| 370 | #ifndef TCC_TARGET_PE | ||
| 371 | } else { | ||
| 372 | o(0x8b48); | ||
| 373 | o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */ | ||
| 374 | gen_gotpcrel(r, sv->sym, fc); | ||
| 375 | } | ||
| 376 | #endif | ||
| 377 | } else { | ||
| 378 | o(0xb8 + REG_VALUE(r)); /* mov $xx, r */ | ||
| 379 | gen_le32(fc); | ||
| 380 | } | ||
| 381 | } | 382 | } |
| 382 | } else if (v == VT_LOCAL) { | 383 | } else if (v == VT_LOCAL) { |
| 383 | o(0x48 | REX_BASE(r)); | 384 | o(0x48 | REX_BASE(r)); |