Unified · Split
| @@ -368,6 +368,7 @@ Optimization options (experts only): · 367 unmodified lines | ||
| 368 | 368 | --disable-fma3 disable FMA3 optimizations |
| 369 | 369 | --disable-fma4 disable FMA4 optimizations |
| 370 | 370 | --disable-avx2 disable AVX2 optimizations |
| 371 | + --disable-aesni disable AESNI optimizations | |
| 371 | 372 | --disable-armv5te disable armv5te optimizations |
| 372 | 373 | --disable-armv6 disable armv6 optimizations |
| 373 | 374 | --disable-armv6t2 disable armv6t2 optimizations |
| @@ -1635,6 +1636,7 @@ ARCH_EXT_LIST_LOONGSON=" · 1261 unmodified lines | ||
| 1635 | 1636 | " |
| 1636 | 1637 | |
| 1637 | 1638 | ARCH_EXT_LIST_X86_SIMD=" |
| 1639 | + aesni | |
| 1638 | 1640 | amd3dnow |
| 1639 | 1641 | amd3dnowext |
| 1640 | 1642 | avx |
| @@ -2128,6 +2130,7 @@ sse3_deps="sse2" · 487 unmodified lines | ||
| 2128 | 2130 | ssse3_deps="sse3" |
| 2129 | 2131 | sse4_deps="ssse3" |
| 2130 | 2132 | sse42_deps="sse4" |
| 2133 | +aesni_deps="sse42" | |
| 2131 | 2134 | avx_deps="sse42" |
| 2132 | 2135 | xop_deps="avx" |
| 2133 | 2136 | fma3_deps="avx" |
| @@ -6011,6 +6014,7 @@ if enabled x86; then · 3877 unmodified lines | ||
| 6011 | 6014 | echo "3DNow! extended enabled ${amd3dnowext-no}" |
| 6012 | 6015 | echo "SSE enabled ${sse-no}" |
| 6013 | 6016 | echo "SSSE3 enabled ${ssse3-no}" |
| 6017 | + echo "AESNI enabled ${aesni-no}" | |
| 6014 | 6018 | echo "AVX enabled ${avx-no}" |
| 6015 | 6019 | echo "XOP enabled ${xop-no}" |
| 6016 | 6020 | echo "FMA3 enabled ${fma3-no}" |
| @@ -15,6 +15,9 @@ libavutil: 2015-08-28 · 14 unmodified lines | ||
| 15 | 15 | |
| 16 | 16 | API changes, most recent first: |
| 17 | 17 | |
| 18 | +2015-10-27 - xxxxxxx - lavu 55.5.100 - cpu.h | |
| 19 | + Add AV_CPU_FLAG_AESNI. | |
| 20 | + | |
| 18 | 21 | 2015-10-27 - xxxxxxx - lavc 57.12.100 / 57.8.0 - avcodec.h |
| 19 | 22 | Deprecate av_free_packet(). Use av_packet_unref() as replacement, |
| 20 | 23 | it resets the packet in a more consistent way. |
| @@ -118,6 +118,7 @@ int av_parse_cpu_flags(const char *s) · 117 unmodified lines | ||
| 118 | 118 | #define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX) |
| 119 | 119 | #define CPUFLAG_AVX2 (AV_CPU_FLAG_AVX2 | CPUFLAG_AVX) |
| 120 | 120 | #define CPUFLAG_BMI2 (AV_CPU_FLAG_BMI2 | AV_CPU_FLAG_BMI1) |
| 121 | +#define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42) | |
| 121 | 122 | static const AVOption cpuflags_opts[] = { |
| 122 | 123 | { "flags" , NULL, 0, AV_OPT_TYPE_FLAGS, { .i64 = 0 }, INT64_MIN, INT64_MAX, .unit = "flags" }, |
| 123 | 124 | #if ARCH_PPC |
| @@ -145,6 +146,7 @@ int av_parse_cpu_flags(const char *s) · 21 unmodified lines | ||
| 145 | 146 | { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW }, .unit = "flags" }, |
| 146 | 147 | { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT }, .unit = "flags" }, |
| 147 | 148 | { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" }, |
| 149 | + { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI }, .unit = "flags" }, | |
| 148 | 150 | #elif ARCH_ARM |
| 149 | 151 | { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV5TE }, .unit = "flags" }, |
| 150 | 152 | { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6 }, .unit = "flags" }, |
| @@ -205,6 +207,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s) · 54 unmodified lines | ||
| 205 | 207 | { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW }, .unit = "flags" }, |
| 206 | 208 | { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" }, |
| 207 | 209 | { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" }, |
| 210 | + { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" }, | |
| 208 | 211 | |
| 209 | 212 | #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX |
| 210 | 213 | #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE |
| @@ -340,6 +343,7 @@ static const struct { · 129 unmodified lines | ||
| 340 | 343 | { AV_CPU_FLAG_AVX2, "avx2" }, |
| 341 | 344 | { AV_CPU_FLAG_BMI1, "bmi1" }, |
| 342 | 345 | { AV_CPU_FLAG_BMI2, "bmi2" }, |
| 346 | + { AV_CPU_FLAG_AESNI, "aesni" }, | |
| 343 | 347 | #endif |
| 344 | 348 | { 0 } |
| 345 | 349 | }; |
| @@ -42,6 +42,7 @@ · 41 unmodified lines | ||
| 42 | 42 | #define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3 instructions are slower |
| 43 | 43 | #define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions |
| 44 | 44 | #define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions |
| 45 | +#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard functions | |
| 45 | 46 | #define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used |
| 46 | 47 | #define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when using YMM registers (e.g. Bulldozer) |
| 47 | 48 | #define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions |
| @@ -56,7 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | */ |
| 57 | 57 | |
| 58 | 58 | #define LIBAVUTIL_VERSION_MAJOR 55 |
| 59 | −#define LIBAVUTIL_VERSION_MINOR 4 | |
| 59 | +#define LIBAVUTIL_VERSION_MINOR 5 | |
| 60 | 60 | #define LIBAVUTIL_VERSION_MICRO 100 |
| 61 | 61 | |
| 62 | 62 | #define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \ |
| @@ -126,6 +126,8 @@ int ff_get_cpu_flags_x86(void) · 125 unmodified lines | ||
| 126 | 126 | rval |= AV_CPU_FLAG_SSE4; |
| 127 | 127 | if (ecx & 0x00100000 ) |
| 128 | 128 | rval |= AV_CPU_FLAG_SSE42; |
| 129 | + if (ecx & 0x01000000 ) | |
| 130 | + rval |= AV_CPU_FLAG_AESNI; | |
| 129 | 131 | #if HAVE_AVX |
| 130 | 132 | /* Check OXSAVE and AVX bits */ |
| 131 | 133 | if ((ecx & 0x18000000) == 0x18000000) { |
| @@ -47,6 +47,7 @@ · 46 unmodified lines | ||
| 47 | 47 | #define X86_FMA3(flags) CPUEXT(flags, FMA3) |
| 48 | 48 | #define X86_FMA4(flags) CPUEXT(flags, FMA4) |
| 49 | 49 | #define X86_AVX2(flags) CPUEXT(flags, AVX2) |
| 50 | +#define X86_AESNI(flags) CPUEXT(flags, AESNI) | |
| 50 | 51 | |
| 51 | 52 | #define EXTERNAL_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOW) |
| 52 | 53 | #define EXTERNAL_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOWEXT) |
| @@ -69,6 +70,7 @@ · 16 unmodified lines | ||
| 69 | 70 | #define EXTERNAL_FMA3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA3) |
| 70 | 71 | #define EXTERNAL_FMA4(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA4) |
| 71 | 72 | #define EXTERNAL_AVX2(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX2) |
| 73 | +#define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI) | |
| 72 | 74 | |
| 73 | 75 | #define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW) |
| 74 | 76 | #define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOWEXT) |
| @@ -91,6 +93,7 @@ · 16 unmodified lines | ||
| 91 | 93 | #define INLINE_FMA3(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA3) |
| 92 | 94 | #define INLINE_FMA4(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA4) |
| 93 | 95 | #define INLINE_AVX2(flags) CPUEXT_SUFFIX(flags, _INLINE, AVX2) |
| 96 | +#define INLINE_AESNI(flags) CPUEXT_SUFFIX(flags, _INLINE, AESNI) | |
| 94 | 97 | |
| 95 | 98 | void ff_cpu_cpuid(int index, int *eax, int *ebx, int *ecx, int *edx); |
| 96 | 99 | void ff_cpu_xgetbv(int op, int *eax, int *edx); |
| @@ -772,6 +772,7 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae, · 771 unmodified lines | ||
| 772 | 772 | %assign cpuflags_atom (1<<21) |
| 773 | 773 | %assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt |
| 774 | 774 | %assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1 |
| 775 | +%assign cpuflags_aesni (1<<24)|cpuflags_sse42 | |
| 775 | 776 | |
| 776 | 777 | ; Returns a boolean value expressing whether or not the specified cpuflag is enabled. |
| 777 | 778 | %define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) - 1) >> 31) & 1) |
| @@ -1171,12 +1172,12 @@ AVX_INSTR addsd, sse2, 1, 0, 1 · 393 unmodified lines | ||
| 1171 | 1172 | AVX_INSTR addss, sse, 1, 0, 1 |
| 1172 | 1173 | AVX_INSTR addsubpd, sse3, 1, 0, 0 |
| 1173 | 1174 | AVX_INSTR addsubps, sse3, 1, 0, 0 |
| 1174 | −AVX_INSTR aesdec, fnord, 0, 0, 0 | |
| 1175 | −AVX_INSTR aesdeclast, fnord, 0, 0, 0 | |
| 1176 | −AVX_INSTR aesenc, fnord, 0, 0, 0 | |
| 1177 | −AVX_INSTR aesenclast, fnord, 0, 0, 0 | |
| 1178 | −AVX_INSTR aesimc | |
| 1179 | −AVX_INSTR aeskeygenassist | |
| 1175 | +AVX_INSTR aesdec, aesni, 0, 0, 0 | |
| 1176 | +AVX_INSTR aesdeclast, aesni, 0, 0, 0 | |
| 1177 | +AVX_INSTR aesenc, aesni, 0, 0, 0 | |
| 1178 | +AVX_INSTR aesenclast, aesni, 0, 0, 0 | |
| 1179 | +AVX_INSTR aesimc, aesni | |
| 1180 | +AVX_INSTR aeskeygenassist, aesni | |
| 1180 | 1181 | AVX_INSTR andnpd, sse2, 1, 0, 0 |
| 1181 | 1182 | AVX_INSTR andnps, sse, 1, 0, 0 |
| 1182 | 1183 | AVX_INSTR andpd, sse2, 1, 0, 1 |
| @@ -117,6 +117,7 @@ static const struct { · 116 unmodified lines | ||
| 117 | 117 | { "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM }, |
| 118 | 118 | { "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 }, |
| 119 | 119 | { "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 }, |
| 120 | + { "AES-NI", "aesni", AV_CPU_FLAG_AESNI }, | |
| 120 | 121 | { "AVX", "avx", AV_CPU_FLAG_AVX }, |
| 121 | 122 | { "XOP", "xop", AV_CPU_FLAG_XOP }, |
| 122 | 123 | { "FMA3", "fma3", AV_CPU_FLAG_FMA3 }, |