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x86: h264_idct: port to cpuflags

Diego Biurrun committed 14 years ago

Commit 2e89aee1 parent 490df521 file · +70 −69Browse files

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libavcodec/x86/h264_idct.asm+70−69
@@ -76,9 +76,9 @@ SECTION .text · 75 unmodified lines
76 STORE_DIFFx2 m2, m3, m4, m5, m7, 6, %1, %376 STORE_DIFFx2 m2, m3, m4, m5, m7, 6, %1, %3
77%endmacro77%endmacro
78 78
79INIT_MMX79INIT_MMX mmx
80; ff_h264_idct_add_mmx(uint8_t *dst, int16_t *block, int stride)80; ff_h264_idct_add_mmx(uint8_t *dst, int16_t *block, int stride)
81cglobal h264_idct_add_8_mmx, 3, 3, 081cglobal h264_idct_add_8, 3, 3, 0
82 IDCT4_ADD r0, r1, r282 IDCT4_ADD r0, r1, r2
83 RET83 RET
84 84
@@ -180,9 +180,9 @@ cglobal h264_idct_add_8_mmx, 3, 3, 0 · 95 unmodified lines
180 STORE_DIFFx2 m1, m2, m5, m6, m7, 6, %1, %3180 STORE_DIFFx2 m1, m2, m5, m6, m7, 6, %1, %3
181%endmacro181%endmacro
182 182
183INIT_MMX183INIT_MMX mmx
184; ff_h264_idct8_add_mmx(uint8_t *dst, int16_t *block, int stride)184; ff_h264_idct8_add_mmx(uint8_t *dst, int16_t *block, int stride)
185cglobal h264_idct8_add_8_mmx, 3, 4, 0185cglobal h264_idct8_add_8, 3, 4, 0
186 %assign pad 128+4-(stack_offset&7)186 %assign pad 128+4-(stack_offset&7)
187 SUB rsp, pad187 SUB rsp, pad
188 188
@@ -240,9 +240,9 @@ cglobal h264_idct8_add_8_mmx, 3, 4, 0 · 51 unmodified lines
240 STORE_DIFF m1, m6, m7, [%1+%4 ]240 STORE_DIFF m1, m6, m7, [%1+%4 ]
241%endmacro241%endmacro
242 242
243INIT_XMM243INIT_XMM sse2
244; ff_h264_idct8_add_sse2(uint8_t *dst, int16_t *block, int stride)244; ff_h264_idct8_add_sse2(uint8_t *dst, int16_t *block, int stride)
245cglobal h264_idct8_add_8_sse2, 3, 4, 10245cglobal h264_idct8_add_8, 3, 4, 10
246 IDCT8_ADD_SSE r0, r1, r2, r3246 IDCT8_ADD_SSE r0, r1, r2, r3
247 RET247 RET
248 248
@@ -285,24 +285,25 @@ cglobal h264_idct8_add_8_sse2, 3, 4, 10 · 36 unmodified lines
285 %1 [%2+%4 ], m5285 %1 [%2+%4 ], m5
286%endmacro286%endmacro
287 287
288INIT_MMX288INIT_MMX mmxext
289; ff_h264_idct_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)289; ff_h264_idct_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)
290cglobal h264_idct_dc_add_8_mmxext, 3, 3, 0290cglobal h264_idct_dc_add_8, 3, 3, 0
291 DC_ADD_MMXEXT_INIT r1, r2291 DC_ADD_MMXEXT_INIT r1, r2
292 DC_ADD_MMXEXT_OP movh, r0, r2, r1292 DC_ADD_MMXEXT_OP movh, r0, r2, r1
293 RET293 RET
294 294
295; ff_h264_idct8_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)295; ff_h264_idct8_dc_add_mmxext(uint8_t *dst, int16_t *block, int stride)
296cglobal h264_idct8_dc_add_8_mmxext, 3, 3, 0296cglobal h264_idct8_dc_add_8, 3, 3, 0
297 DC_ADD_MMXEXT_INIT r1, r2297 DC_ADD_MMXEXT_INIT r1, r2
298 DC_ADD_MMXEXT_OP mova, r0, r2, r1298 DC_ADD_MMXEXT_OP mova, r0, r2, r1
299 lea r0, [r0+r2*4]299 lea r0, [r0+r2*4]
300 DC_ADD_MMXEXT_OP mova, r0, r2, r1300 DC_ADD_MMXEXT_OP mova, r0, r2, r1
301 RET301 RET
302 302
303INIT_MMX mmx
303; ff_h264_idct_add16_mmx(uint8_t *dst, const int *block_offset,304; ff_h264_idct_add16_mmx(uint8_t *dst, const int *block_offset,
304; DCTELEM *block, int stride, const uint8_t nnzc[6*8])305; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
305cglobal h264_idct_add16_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg306cglobal h264_idct_add16_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
306 xor r5, r5307 xor r5, r5
307%ifdef PIC308%ifdef PIC
308 lea picregq, [scan8_mem]309 lea picregq, [scan8_mem]
@@ -324,7 +325,7 @@ cglobal h264_idct_add16_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, str · 15 unmodified lines
324 325
325; ff_h264_idct8_add4_mmx(uint8_t *dst, const int *block_offset,326; ff_h264_idct8_add4_mmx(uint8_t *dst, const int *block_offset,
326; DCTELEM *block, int stride, const uint8_t nnzc[6*8])327; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
327cglobal h264_idct8_add4_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg328cglobal h264_idct8_add4_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
328 %assign pad 128+4-(stack_offset&7)329 %assign pad 128+4-(stack_offset&7)
329 SUB rsp, pad330 SUB rsp, pad
330 331
@@ -354,9 +355,10 @@ cglobal h264_idct8_add4_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, str · 23 unmodified lines
354 ADD rsp, pad355 ADD rsp, pad
355 RET356 RET
356 357
358INIT_MMX mmxext
357; ff_h264_idct_add16_mmxext(uint8_t *dst, const int *block_offset,359; ff_h264_idct_add16_mmxext(uint8_t *dst, const int *block_offset,
358; DCTELEM *block, int stride, const uint8_t nnzc[6*8])360; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
359cglobal h264_idct_add16_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg361cglobal h264_idct_add16_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
360 xor r5, r5362 xor r5, r5
361%ifdef PIC363%ifdef PIC
362 lea picregq, [scan8_mem]364 lea picregq, [scan8_mem]
@@ -398,9 +400,10 @@ cglobal h264_idct_add16_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, · 35 unmodified lines
398 jl .nextblock400 jl .nextblock
399 REP_RET401 REP_RET
400 402
403INIT_MMX mmx
401; ff_h264_idct_add16intra_mmx(uint8_t *dst, const int *block_offset,404; ff_h264_idct_add16intra_mmx(uint8_t *dst, const int *block_offset,
402; DCTELEM *block, int stride, const uint8_t nnzc[6*8])405; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
403cglobal h264_idct_add16intra_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg406cglobal h264_idct_add16intra_8, 5, 7 + npicregs, 0, dst, block_offset, block, stride, nnzc, cntr, coeff, picreg
404 xor r5, r5407 xor r5, r5
405%ifdef PIC408%ifdef PIC
406 lea picregq, [scan8_mem]409 lea picregq, [scan8_mem]
@@ -421,10 +424,11 @@ cglobal h264_idct_add16intra_8_mmx, 5, 7 + npicregs, 0, dst, block_offset, block · 14 unmodified lines
421 jl .nextblock424 jl .nextblock
422 REP_RET425 REP_RET
423 426
427INIT_MMX mmxext
424; ff_h264_idct_add16intra_mmxext(uint8_t *dst, const int *block_offset,428; ff_h264_idct_add16intra_mmxext(uint8_t *dst, const int *block_offset,
425; DCTELEM *block, int stride,429; DCTELEM *block, int stride,
426; const uint8_t nnzc[6*8])430; const uint8_t nnzc[6*8])
427cglobal h264_idct_add16intra_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg431cglobal h264_idct_add16intra_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
428 xor r5, r5432 xor r5, r5
429%ifdef PIC433%ifdef PIC
430 lea picregq, [scan8_mem]434 lea picregq, [scan8_mem]
@@ -467,7 +471,7 @@ cglobal h264_idct_add16intra_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, b · 36 unmodified lines
467; ff_h264_idct8_add4_mmxext(uint8_t *dst, const int *block_offset,471; ff_h264_idct8_add4_mmxext(uint8_t *dst, const int *block_offset,
468; DCTELEM *block, int stride,472; DCTELEM *block, int stride,
469; const uint8_t nnzc[6*8])473; const uint8_t nnzc[6*8])
470cglobal h264_idct8_add4_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg474cglobal h264_idct8_add4_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
471 %assign pad 128+4-(stack_offset&7)475 %assign pad 128+4-(stack_offset&7)
472 SUB rsp, pad476 SUB rsp, pad
473 477
@@ -524,10 +528,10 @@ cglobal h264_idct8_add4_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, · 50 unmodified lines
524 ADD rsp, pad528 ADD rsp, pad
525 RET529 RET
526 530
527INIT_XMM531INIT_XMM sse2
528; ff_h264_idct8_add4_sse2(uint8_t *dst, const int *block_offset,532; ff_h264_idct8_add4_sse2(uint8_t *dst, const int *block_offset,
529; DCTELEM *block, int stride, const uint8_t nnzc[6*8])533; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
530cglobal h264_idct8_add4_8_sse2, 5, 8 + npicregs, 10, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg534cglobal h264_idct8_add4_8, 5, 8 + npicregs, 10, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
531 xor r5, r5535 xor r5, r5
532%ifdef PIC536%ifdef PIC
533 lea picregq, [scan8_mem]537 lea picregq, [scan8_mem]
@@ -542,7 +546,7 @@ cglobal h264_idct8_add4_8_sse2, 5, 8 + npicregs, 10, dst1, block_offset, block, · 8 unmodified lines
542 movsx r6, word [r2]546 movsx r6, word [r2]
543 test r6, r6547 test r6, r6
544 jz .no_dc548 jz .no_dc
545INIT_MMX549INIT_MMX cpuname
546 DC_ADD_MMXEXT_INIT r2, r3, r6550 DC_ADD_MMXEXT_INIT r2, r3, r6
547%if ARCH_X86_64 == 0551%if ARCH_X86_64 == 0
548%define dst2q r1552%define dst2q r1
@@ -562,7 +566,7 @@ INIT_MMX · 13 unmodified lines
562 jl .nextblock566 jl .nextblock
563 REP_RET567 REP_RET
564.no_dc:568.no_dc:
565INIT_XMM569INIT_XMM cpuname
566 mov dst2d, dword [r1+r5*4]570 mov dst2d, dword [r1+r5*4]
567 add dst2q, r0571 add dst2q, r0
568 IDCT8_ADD_SSE dst2q, r2, r3, r6572 IDCT8_ADD_SSE dst2q, r2, r3, r6
@@ -576,7 +580,7 @@ INIT_XMM · 7 unmodified lines
576 jl .nextblock580 jl .nextblock
577 REP_RET581 REP_RET
578 582
579INIT_MMX583INIT_MMX mmx
580h264_idct_add8_mmx_plane:584h264_idct_add8_mmx_plane:
581.nextblock:585.nextblock:
582 movzx r6, byte [scan8+r5]586 movzx r6, byte [scan8+r5]
@@ -602,7 +606,7 @@ h264_idct_add8_mmx_plane: · 19 unmodified lines
602 606
603; ff_h264_idct_add8_mmx(uint8_t **dest, const int *block_offset,607; ff_h264_idct_add8_mmx(uint8_t **dest, const int *block_offset,
604; DCTELEM *block, int stride, const uint8_t nnzc[6*8])608; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
605cglobal h264_idct_add8_8_mmx, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg609cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
606 mov r5, 16610 mov r5, 16
607 add r2, 512611 add r2, 512
608%ifdef PIC612%ifdef PIC
@@ -663,9 +667,10 @@ h264_idct_add8_mmxext_plane: · 54 unmodified lines
663 jnz .nextblock667 jnz .nextblock
664 rep ret668 rep ret
665 669
670INIT_MMX mmxext
666; ff_h264_idct_add8_mmxext(uint8_t **dest, const int *block_offset,671; ff_h264_idct_add8_mmxext(uint8_t **dest, const int *block_offset,
667; DCTELEM *block, int stride, const uint8_t nnzc[6*8])672; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
668cglobal h264_idct_add8_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg673cglobal h264_idct_add8_8, 5, 8 + npicregs, 0, dst1, block_offset, block, stride, nnzc, cntr, coeff, dst2, picreg
669 mov r5, 16674 mov r5, 16
670 add r2, 512675 add r2, 512
671%if ARCH_X86_64676%if ARCH_X86_64
@@ -685,7 +690,6 @@ cglobal h264_idct_add8_8_mmxext, 5, 8 + npicregs, 0, dst1, block_offset, block, · 13 unmodified lines
685 call h264_idct_add8_mmxext_plane690 call h264_idct_add8_mmxext_plane
686 RET691 RET
687 692
688INIT_MMX
689; r0 = uint8_t *dst, r2 = int16_t *block, r3 = int stride, r6=clobbered693; r0 = uint8_t *dst, r2 = int16_t *block, r3 = int stride, r6=clobbered
690h264_idct_dc_add8_mmxext:694h264_idct_dc_add8_mmxext:
691 movd m0, [r2 ] ; 0 0 X D695 movd m0, [r2 ] ; 0 0 X D
@@ -703,7 +707,7 @@ h264_idct_dc_add8_mmxext: · 11 unmodified lines
703 ret707 ret
704 708
705ALIGN 16709ALIGN 16
706INIT_XMM710INIT_XMM sse2
707; r0 = uint8_t *dst (clobbered), r2 = int16_t *block, r3 = int stride711; r0 = uint8_t *dst (clobbered), r2 = int16_t *block, r3 = int stride
708h264_add8x4_idct_sse2:712h264_add8x4_idct_sse2:
709 movq m0, [r2+ 0]713 movq m0, [r2+ 0]
@@ -743,7 +747,7 @@ h264_add8x4_idct_sse2: · 33 unmodified lines
743 747
744; ff_h264_idct_add16_sse2(uint8_t *dst, const int *block_offset,748; ff_h264_idct_add16_sse2(uint8_t *dst, const int *block_offset,
745; DCTELEM *block, int stride, const uint8_t nnzc[6*8])749; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
746cglobal h264_idct_add16_8_sse2, 5, 5 + ARCH_X86_64, 8750cglobal h264_idct_add16_8, 5, 5 + ARCH_X86_64, 8
747%if ARCH_X86_64751%if ARCH_X86_64
748 mov r5, r0752 mov r5, r0
749%endif753%endif
@@ -790,7 +794,7 @@ cglobal h264_idct_add16_8_sse2, 5, 5 + ARCH_X86_64, 8 · 40 unmodified lines
790 794
791; ff_h264_idct_add16intra_sse2(uint8_t *dst, const int *block_offset,795; ff_h264_idct_add16intra_sse2(uint8_t *dst, const int *block_offset,
792; DCTELEM *block, int stride, const uint8_t nnzc[6*8])796; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
793cglobal h264_idct_add16intra_8_sse2, 5, 7 + ARCH_X86_64, 8797cglobal h264_idct_add16intra_8, 5, 7 + ARCH_X86_64, 8
794%if ARCH_X86_64798%if ARCH_X86_64
795 mov r7, r0799 mov r7, r0
796%endif800%endif
@@ -841,7 +845,7 @@ cglobal h264_idct_add16intra_8_sse2, 5, 7 + ARCH_X86_64, 8 · 44 unmodified lines
841 845
842; ff_h264_idct_add8_sse2(uint8_t **dest, const int *block_offset,846; ff_h264_idct_add8_sse2(uint8_t **dest, const int *block_offset,
843; DCTELEM *block, int stride, const uint8_t nnzc[6*8])847; DCTELEM *block, int stride, const uint8_t nnzc[6*8])
844cglobal h264_idct_add8_8_sse2, 5, 7 + ARCH_X86_64, 8848cglobal h264_idct_add8_8, 5, 7 + ARCH_X86_64, 8
845 add r2, 512849 add r2, 512
846%if ARCH_X86_64850%if ARCH_X86_64
847 mov r7, r0851 mov r7, r0
@@ -887,29 +891,8 @@ cglobal h264_idct_add8_8_sse2, 5, 7 + ARCH_X86_64, 8 · 39 unmodified lines
887 packssdw %2, m5891 packssdw %2, m5
888%endmacro892%endmacro
889 893
890%macro STORE_WORDS_MMX 5894%macro STORE_WORDS 5-9
891 movd t0d, %1895%if cpuflag(sse)
892 psrlq %1, 32
893 movd t1d, %1
894 mov [t2+%2*32], t0w
895 mov [t2+%4*32], t1w
896 shr t0d, 16
897 shr t1d, 16
898 mov [t2+%3*32], t0w
899 mov [t2+%5*32], t1w
900%endmacro
901
902%macro DEQUANT_STORE_MMX 1
903 DEQUANT_MMX m0, m1, %1
904 STORE_WORDS_MMX m0, 0, 1, 4, 5
905 STORE_WORDS_MMX m1, 2, 3, 6, 7
906
907 DEQUANT_MMX m2, m3, %1
908 STORE_WORDS_MMX m2, 8, 9, 12, 13
909 STORE_WORDS_MMX m3, 10, 11, 14, 15
910%endmacro
911
912%macro STORE_WORDS_SSE 9
913 movd t0d, %1896 movd t0d, %1
914 psrldq %1, 4897 psrldq %1, 4
915 movd t1d, %1898 movd t1d, %1
@@ -929,9 +912,21 @@ cglobal h264_idct_add8_8_sse2, 5, 7 + ARCH_X86_64, 8 · 13 unmodified lines
929 shr t1d, 16912 shr t1d, 16
930 mov [t2+%7*32], t0w913 mov [t2+%7*32], t0w
931 mov [t2+%9*32], t1w914 mov [t2+%9*32], t1w
915%else
916 movd t0d, %1
917 psrlq %1, 32
918 movd t1d, %1
919 mov [t2+%2*32], t0w
920 mov [t2+%4*32], t1w
921 shr t0d, 16
922 shr t1d, 16
923 mov [t2+%3*32], t0w
924 mov [t2+%5*32], t1w
925%endif
932%endmacro926%endmacro
933 927
934%macro DEQUANT_STORE_SSE2 1928%macro DEQUANT_STORE 1
929%if cpuflag(sse2)
935 movd xmm4, t3d930 movd xmm4, t3d
936 movq xmm5, [pw_1]931 movq xmm5, [pw_1]
937 pshufd xmm4, xmm4, 0932 pshufd xmm4, xmm4, 0
@@ -953,15 +948,24 @@ cglobal h264_idct_add8_8_sse2, 5, 7 + ARCH_X86_64, 8 · 15 unmodified lines
953 psrad xmm3, %1948 psrad xmm3, %1
954 packssdw xmm0, xmm1949 packssdw xmm0, xmm1
955 packssdw xmm2, xmm3950 packssdw xmm2, xmm3
956 STORE_WORDS_SSE xmm0, 0, 1, 4, 5, 2, 3, 6, 7951 STORE_WORDS xmm0, 0, 1, 4, 5, 2, 3, 6, 7
957 STORE_WORDS_SSE xmm2, 8, 9, 12, 13, 10, 11, 14, 15952 STORE_WORDS xmm2, 8, 9, 12, 13, 10, 11, 14, 15
953%else
954 DEQUANT_MMX m0, m1, %1
955 STORE_WORDS m0, 0, 1, 4, 5
956 STORE_WORDS m1, 2, 3, 6, 7
957
958 DEQUANT_MMX m2, m3, %1
959 STORE_WORDS m2, 8, 9, 12, 13
960 STORE_WORDS m3, 10, 11, 14, 15
961%endif
958%endmacro962%endmacro
959 963
960%macro IDCT_DC_DEQUANT 2964%macro IDCT_DC_DEQUANT 1
961cglobal h264_luma_dc_dequant_idct_%1, 3,4,%2965cglobal h264_luma_dc_dequant_idct, 3, 4, %1
962 ; manually spill XMM registers for Win64 because966 ; manually spill XMM registers for Win64 because
963 ; the code here is initialized with INIT_MMX967 ; the code here is initialized with INIT_MMX
964 WIN64_SPILL_XMM %2968 WIN64_SPILL_XMM %1
965 movq m3, [r1+24]969 movq m3, [r1+24]
966 movq m2, [r1+16]970 movq m2, [r1+16]
967 movq m1, [r1+ 8]971 movq m1, [r1+ 8]
@@ -984,11 +988,7 @@ cglobal h264_luma_dc_dequant_idct_%1, 3,4,%2 · 16 unmodified lines
984 cmp t3d, 32767988 cmp t3d, 32767
985 jg .big_qmul989 jg .big_qmul
986 add t3d, 128 << 16990 add t3d, 128 << 16
987%ifidn %1,mmx991 DEQUANT_STORE 8
988 DEQUANT_STORE_MMX 8
989%else
990 DEQUANT_STORE_SSE2 8
991%endif
992 RET992 RET
993.big_qmul:993.big_qmul:
994 bsr t0d, t3d994 bsr t0d, t3d
@@ -999,16 +999,17 @@ cglobal h264_luma_dc_dequant_idct_%1, 3,4,%2 · 4 unmodified lines
999 inc t1d999 inc t1d
1000 shr t3d, t0b1000 shr t3d, t0b
1001 sub t1d, t0d1001 sub t1d, t0d
1002%ifidn %1,mmx1002%if cpuflag(sse2)
1003 movd m6, t1d
1004 DEQUANT_STORE_MMX m6
1005%else
1006 movd xmm6, t1d1003 movd xmm6, t1d
1007 DEQUANT_STORE_SSE2 xmm61004 DEQUANT_STORE xmm6
1005%else
1006 movd m6, t1d
1007 DEQUANT_STORE m6
1008%endif1008%endif
1009 RET1009 RET
1010%endmacro1010%endmacro
1011 1011
1012INIT_MMX1012INIT_MMX mmx
1013IDCT_DC_DEQUANT mmx, 01013IDCT_DC_DEQUANT 0
1014IDCT_DC_DEQUANT sse2, 71014INIT_MMX sse2
1015IDCT_DC_DEQUANT 7

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