There is no known (real) hardware with V and without the complete B extension. B was indeed required in the RISC-V application profile from 2022, earlier than V. There should not be any relevant hardware in the future either. In practice, different R-V Vector optimisations in FFmpeg already depend on every constituent of the B extension anyhow, so it would not work well.
Showing the changes to libavcodec (22 of 22 files). Show all
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| @@ -35,7 +35,7 @@ av_cold void ff_aacenc_dsp_init_riscv(AACEncDSPContext *s) · 34 unmodified lines | ||
| 35 | 35 | int flags = av_get_cpu_flags(); |
| 36 | 36 | |
| 37 | 37 | if (flags & AV_CPU_FLAG_RVV_F32) { |
| 38 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 38 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 39 | 39 | s->abs_pow34 = ff_abs_pow34_rvv; |
| 40 | 40 | s->quant_bands = ff_aac_quant_bands_rvv; |
| 41 | 41 | } |
| @@ -42,20 +42,25 @@ av_cold void ff_psdsp_init_riscv(PSDSPContext *c) · 41 unmodified lines | ||
| 42 | 42 | #if HAVE_RVV |
| 43 | 43 | int flags = av_get_cpu_flags(); |
| 44 | 44 | |
| 45 | − if (flags & AV_CPU_FLAG_RVV_F32) { | |
| 46 | − c->hybrid_analysis = ff_ps_hybrid_analysis_rvv; | |
| 45 | + if (flags & AV_CPU_FLAG_RVV_I32) { | |
| 46 | + if (flags & AV_CPU_FLAG_RVV_F32) { | |
| 47 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 48 | + if (flags & AV_CPU_FLAG_RVV_I64) | |
| 49 | + c->add_squares = ff_ps_add_squares_rvv; | |
| 47 | 50 | |
| 48 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 49 | − if (flags & AV_CPU_FLAG_RVV_I64) { | |
| 50 | − c->add_squares = ff_ps_add_squares_rvv; | |
| 51 | − c->hybrid_synthesis_deint = ff_ps_hybrid_synthesis_deint_rvv; | |
| 51 | + c->mul_pair_single = ff_ps_mul_pair_single_rvv; | |
| 52 | 52 | } |
| 53 | − c->mul_pair_single = ff_ps_mul_pair_single_rvv; | |
| 54 | − c->stereo_interpolate[0] = ff_ps_stereo_interpolate_rvv; | |
| 53 | + c->hybrid_analysis = ff_ps_hybrid_analysis_rvv; | |
| 55 | 54 | } |
| 56 | − } | |
| 57 | 55 | |
| 58 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) | |
| 59 | − c->hybrid_analysis_ileave = ff_ps_hybrid_analysis_ileave_rvv; | |
| 56 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 57 | + c->hybrid_analysis_ileave = ff_ps_hybrid_analysis_ileave_rvv; | |
| 58 | + | |
| 59 | + if (flags & AV_CPU_FLAG_RVV_I64) | |
| 60 | + c->hybrid_synthesis_deint = ff_ps_hybrid_synthesis_deint_rvv; | |
| 61 | + if (flags & AV_CPU_FLAG_RVV_F32) | |
| 62 | + c->stereo_interpolate[0] = ff_ps_stereo_interpolate_rvv; | |
| 63 | + } | |
| 64 | + } | |
| 60 | 65 | #endif |
| 61 | 66 | } |
| @@ -41,7 +41,7 @@ av_cold void ff_alacdsp_init_riscv(ALACDSPContext *c) · 40 unmodified lines | ||
| 41 | 41 | #if HAVE_RVV && (__riscv_xlen == 64) |
| 42 | 42 | int flags = av_get_cpu_flags(); |
| 43 | 43 | |
| 44 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 44 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 45 | 45 | c->decorrelate_stereo = ff_alac_decorrelate_stereo_rvv; |
| 46 | 46 | c->append_extra_bits[0] = ff_alac_append_extra_bits_mono_rvv; |
| 47 | 47 | c->append_extra_bits[1] = ff_alac_append_extra_bits_stereo_rvv; |
| @@ -34,11 +34,10 @@ av_cold void ff_audiodsp_init_riscv(AudioDSPContext *c) · 33 unmodified lines | ||
| 34 | 34 | #if HAVE_RVV |
| 35 | 35 | int flags = av_get_cpu_flags(); |
| 36 | 36 | |
| 37 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 38 | − if (flags & AV_CPU_FLAG_RVV_I32) { | |
| 39 | − c->scalarproduct_int16 = ff_scalarproduct_int16_rvv; | |
| 40 | − c->vector_clip_int32 = ff_vector_clip_int32_rvv; | |
| 41 | − } | |
| 37 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 38 | + c->scalarproduct_int16 = ff_scalarproduct_int16_rvv; | |
| 39 | + c->vector_clip_int32 = ff_vector_clip_int32_rvv; | |
| 40 | + | |
| 42 | 41 | if (flags & AV_CPU_FLAG_RVV_F32) |
| 43 | 42 | c->vector_clipf = ff_vector_clipf_rvv; |
| 44 | 43 | } |
| @@ -31,8 +31,7 @@ av_cold void ff_exrdsp_init_riscv(ExrDSPContext *c) · 30 unmodified lines | ||
| 31 | 31 | #if HAVE_RVV |
| 32 | 32 | int flags = av_get_cpu_flags(); |
| 33 | 33 | |
| 34 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 34 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) | |
| 35 | 35 | c->reorder_pixels = ff_reorder_pixels_rvv; |
| 36 | − } | |
| 37 | 36 | #endif |
| 38 | 37 | } |
| @@ -70,10 +70,10 @@ av_cold void ff_flacdsp_init_riscv(FLACDSPContext *c, enum AVSampleFormat fmt, · 69 unmodified lines | ||
| 70 | 70 | #if HAVE_RVV |
| 71 | 71 | int flags = av_get_cpu_flags(); |
| 72 | 72 | |
| 73 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 73 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 74 | 74 | int vlenb = ff_get_rv_vlenb(); |
| 75 | 75 | |
| 76 | − if ((flags & AV_CPU_FLAG_RVB_BASIC) && vlenb >= 16) { | |
| 76 | + if (vlenb >= 16) { | |
| 77 | 77 | c->lpc16 = ff_flac_lpc16_rvv; |
| 78 | 78 | |
| 79 | 79 | # if (__riscv_xlen >= 64) |
| @@ -36,7 +36,7 @@ av_cold void ff_fmt_convert_init_riscv(FmtConvertContext *c) · 35 unmodified lines | ||
| 36 | 36 | #if HAVE_RVV |
| 37 | 37 | int flags = av_get_cpu_flags(); |
| 38 | 38 | |
| 39 | − if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 39 | + if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 40 | 40 | c->int32_to_float_fmul_scalar = ff_int32_to_float_fmul_scalar_rvv; |
| 41 | 41 | c->int32_to_float_fmul_array8 = ff_int32_to_float_fmul_array8_rvv; |
| 42 | 42 | } |
| @@ -38,7 +38,7 @@ av_cold void ff_h264chroma_init_riscv(H264ChromaContext *c, int bit_depth) · 37 unmodified lines | ||
| 38 | 38 | int flags = av_get_cpu_flags(); |
| 39 | 39 | |
| 40 | 40 | if (bit_depth == 8 && (flags & AV_CPU_FLAG_RVV_I32) && |
| 41 | − (flags & AV_CPU_FLAG_RVB_ADDR) && ff_rv_vlen_least(128)) { | |
| 41 | + (flags & AV_CPU_FLAG_RVB) && ff_rv_vlen_least(128)) { | |
| 42 | 42 | c->put_h264_chroma_pixels_tab[0] = h264_put_chroma_mc8_rvv; |
| 43 | 43 | c->avg_h264_chroma_pixels_tab[0] = h264_avg_chroma_mc8_rvv; |
| 44 | 44 | c->put_h264_chroma_pixels_tab[1] = h264_put_chroma_mc4_rvv; |
| @@ -128,7 +128,7 @@ av_cold void ff_h264dsp_init_riscv(H264DSPContext *dsp, const int bit_depth, · 127 unmodified lines | ||
| 128 | 128 | if (bit_depth == depth) { \ |
| 129 | 129 | if (zvl128b) \ |
| 130 | 130 | dsp->h264_idct_add = ff_h264_idct_add_##depth##_rvv; \ |
| 131 | − if (flags & AV_CPU_FLAG_RVB_ADDR) \ | |
| 131 | + if (flags & AV_CPU_FLAG_RVB) \ | |
| 132 | 132 | dsp->h264_idct8_add = ff_h264_idct8_add_##depth##_rvv; \ |
| 133 | 133 | if (zvl128b && (flags & AV_CPU_FLAG_RVB)) { \ |
| 134 | 134 | dsp->h264_idct_dc_add = ff_h264_idct4_dc_add_##depth##_rvv; \ |
| @@ -33,10 +33,9 @@ av_cold void ff_huffyuvdsp_init_riscv(HuffYUVDSPContext *c, · 32 unmodified lines | ||
| 33 | 33 | #if HAVE_RVV |
| 34 | 34 | int flags = av_get_cpu_flags(); |
| 35 | 35 | |
| 36 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 36 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 37 | 37 | c->add_int16 = ff_add_int16_rvv; |
| 38 | − if (flags & AV_CPU_FLAG_RVB_BASIC) | |
| 39 | − c->add_hfyu_left_pred_bgr32 = ff_add_hfyu_left_pred_bgr32_rvv; | |
| 38 | + c->add_hfyu_left_pred_bgr32 = ff_add_hfyu_left_pred_bgr32_rvv; | |
| 40 | 39 | } |
| 41 | 40 | #endif |
| 42 | 41 | } |
| @@ -31,7 +31,7 @@ av_cold void ff_jpeg2000dsp_init_riscv(Jpeg2000DSPContext *c) · 30 unmodified lines | ||
| 31 | 31 | #if HAVE_RVV |
| 32 | 32 | int flags = av_get_cpu_flags(); |
| 33 | 33 | |
| 34 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 34 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 35 | 35 | if (flags & AV_CPU_FLAG_RVV_F32) |
| 36 | 36 | c->mct_decode[FF_DWT97] = ff_ict_float_rvv; |
| 37 | 37 | c->mct_decode[FF_DWT53] = ff_rct_int_rvv; |
| @@ -36,7 +36,7 @@ av_cold void ff_llauddsp_init_riscv(LLAudDSPContext *c) · 35 unmodified lines | ||
| 36 | 36 | #if HAVE_RVV |
| 37 | 37 | int flags = av_get_cpu_flags(); |
| 38 | 38 | |
| 39 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 39 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 40 | 40 | c->scalarproduct_and_madd_int16 = ff_scalarproduct_and_madd_int16_rvv; |
| 41 | 41 | c->scalarproduct_and_madd_int32 = ff_scalarproduct_and_madd_int32_rvv; |
| 42 | 42 | } |
| @@ -33,11 +33,10 @@ av_cold void ff_lpc_init_riscv(LPCContext *c) · 32 unmodified lines | ||
| 33 | 33 | #if HAVE_RVV && (__riscv_xlen >= 64) |
| 34 | 34 | int flags = av_get_cpu_flags(); |
| 35 | 35 | |
| 36 | − if ((flags & AV_CPU_FLAG_RVV_F64) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 36 | + if ((flags & AV_CPU_FLAG_RVV_F64) && (flags & AV_CPU_FLAG_RVB)) { | |
| 37 | 37 | c->lpc_apply_welch_window = ff_lpc_apply_welch_window_rvv; |
| 38 | 38 | |
| 39 | − if ((flags & AV_CPU_FLAG_RVB_BASIC) && | |
| 40 | − ff_get_rv_vlenb() > c->max_order) | |
| 39 | + if (ff_get_rv_vlenb() > c->max_order) | |
| 41 | 40 | c->lpc_compute_autocorr = ff_lpc_compute_autocorr_rvv; |
| 42 | 41 | } |
| 43 | 42 | #endif |
| @@ -32,8 +32,7 @@ av_cold void ff_opus_dsp_init_riscv(OpusDSP *d) · 31 unmodified lines | ||
| 32 | 32 | #if HAVE_RVV |
| 33 | 33 | int flags = av_get_cpu_flags(); |
| 34 | 34 | |
| 35 | − if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB_ADDR) && | |
| 36 | − (flags & AV_CPU_FLAG_RVB_BASIC)) | |
| 35 | + if ((flags & AV_CPU_FLAG_RVV_F32) && (flags & AV_CPU_FLAG_RVB)) | |
| 37 | 36 | d->postfilter = ff_opus_postfilter_rvv; |
| 38 | 37 | #endif |
| 39 | 38 | } |
| @@ -41,7 +41,7 @@ av_cold void ff_rv40dsp_init_riscv(RV34DSPContext *c) · 40 unmodified lines | ||
| 41 | 41 | int flags = av_get_cpu_flags(); |
| 42 | 42 | |
| 43 | 43 | if ((flags & AV_CPU_FLAG_RVV_I32) && ff_rv_vlen_least(128) && |
| 44 | − (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 44 | + (flags & AV_CPU_FLAG_RVB)) { | |
| 45 | 45 | c->put_chroma_pixels_tab[0] = ff_put_rv40_chroma_mc8_rvv; |
| 46 | 46 | c->put_chroma_pixels_tab[1] = ff_put_rv40_chroma_mc4_rvv; |
| 47 | 47 | c->avg_chroma_pixels_tab[0] = ff_avg_rv40_chroma_mc8_rvv; |
| @@ -47,7 +47,7 @@ av_cold void ff_sbrdsp_init_riscv(SBRDSPContext *c) · 46 unmodified lines | ||
| 47 | 47 | int flags = av_get_cpu_flags(); |
| 48 | 48 | |
| 49 | 49 | if (flags & AV_CPU_FLAG_RVV_F32) { |
| 50 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 50 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 51 | 51 | c->sum64x5 = ff_sbr_sum64x5_rvv; |
| 52 | 52 | c->sum_square = ff_sbr_sum_square_rvv; |
| 53 | 53 | c->hf_gen = ff_sbr_hf_gen_rvv; |
| @@ -55,10 +55,8 @@ av_cold void ff_sbrdsp_init_riscv(SBRDSPContext *c) · 1 unmodified line | ||
| 55 | 55 | if (ff_get_rv_vlenb() <= 32) { |
| 56 | 56 | c->hf_apply_noise[0] = ff_sbr_hf_apply_noise_0_rvv; |
| 57 | 57 | c->hf_apply_noise[2] = ff_sbr_hf_apply_noise_2_rvv; |
| 58 | − if (flags & AV_CPU_FLAG_RVB_BASIC) { | |
| 59 | − c->hf_apply_noise[1] = ff_sbr_hf_apply_noise_1_rvv; | |
| 60 | − c->hf_apply_noise[3] = ff_sbr_hf_apply_noise_3_rvv; | |
| 61 | − } | |
| 58 | + c->hf_apply_noise[1] = ff_sbr_hf_apply_noise_1_rvv; | |
| 59 | + c->hf_apply_noise[3] = ff_sbr_hf_apply_noise_3_rvv; | |
| 62 | 60 | } |
| 63 | 61 | } |
| 64 | 62 | c->autocorrelate = ff_sbr_autocorrelate_rvv; |
| @@ -33,7 +33,7 @@ av_cold void ff_svq1enc_init_riscv(SVQ1EncDSPContext *c) · 32 unmodified lines | ||
| 33 | 33 | int flags = av_get_cpu_flags(); |
| 34 | 34 | |
| 35 | 35 | if (flags & AV_CPU_FLAG_RVV_I32) { |
| 36 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 36 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 37 | 37 | c->ssd_int8_vs_int16 = ff_ssd_int8_vs_int16_rvv; |
| 38 | 38 | } |
| 39 | 39 | } |
| @@ -35,7 +35,7 @@ av_cold void ff_takdsp_init_riscv(TAKDSPContext *dsp) · 34 unmodified lines | ||
| 35 | 35 | #if HAVE_RVV |
| 36 | 36 | int flags = av_get_cpu_flags(); |
| 37 | 37 | |
| 38 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) { | |
| 38 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) { | |
| 39 | 39 | dsp->decorrelate_ls = ff_decorrelate_ls_rvv; |
| 40 | 40 | dsp->decorrelate_sr = ff_decorrelate_sr_rvv; |
| 41 | 41 | dsp->decorrelate_sm = ff_decorrelate_sm_rvv; |
| @@ -38,7 +38,7 @@ av_cold void ff_utvideodsp_init_riscv(UTVideoDSPContext *c) · 37 unmodified lines | ||
| 38 | 38 | if (flags & AV_CPU_FLAG_RVV_I32) { |
| 39 | 39 | c->restore_rgb_planes = ff_restore_rgb_planes_rvv; |
| 40 | 40 | |
| 41 | − if (flags & AV_CPU_FLAG_RVB_ADDR) | |
| 41 | + if (flags & AV_CPU_FLAG_RVB) | |
| 42 | 42 | c->restore_rgb_planes10 = ff_restore_rgb_planes10_rvv; |
| 43 | 43 | } |
| 44 | 44 | #endif |
| @@ -31,7 +31,7 @@ av_cold void ff_vorbisdsp_init_riscv(VorbisDSPContext *c) · 30 unmodified lines | ||
| 31 | 31 | #if HAVE_RVV |
| 32 | 32 | int flags = av_get_cpu_flags(); |
| 33 | 33 | |
| 34 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR)) | |
| 34 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB)) | |
| 35 | 35 | c->vorbis_inverse_coupling = ff_vorbis_inverse_coupling_rvv; |
| 36 | 36 | #endif |
| 37 | 37 | } |
| @@ -44,7 +44,7 @@ av_cold void ff_vp7dsp_init_riscv(VP8DSPContext *c) · 43 unmodified lines | ||
| 44 | 44 | #if HAVE_RVV |
| 45 | 45 | int flags = av_get_cpu_flags(); |
| 46 | 46 | |
| 47 | − if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB_ADDR) && | |
| 47 | + if ((flags & AV_CPU_FLAG_RVV_I32) && (flags & AV_CPU_FLAG_RVB) && | |
| 48 | 48 | ff_rv_vlen_least(128)) { |
| 49 | 49 | #if __riscv_xlen >= 64 |
| 50 | 50 | c->vp8_luma_dc_wht = ff_vp7_luma_dc_wht_rvv; |
| @@ -86,7 +86,7 @@ av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c) · 85 unmodified lines | ||
| 86 | 86 | c->put_vp8_bilinear_pixels_tab[2][2][1] = ff_put_vp8_bilin4_hv_rvv; |
| 87 | 87 | c->put_vp8_bilinear_pixels_tab[2][2][2] = ff_put_vp8_bilin4_hv_rvv; |
| 88 | 88 | |
| 89 | − if (flags & AV_CPU_FLAG_RVB_ADDR) { | |
| 89 | + if (flags & AV_CPU_FLAG_RVB) { | |
| 90 | 90 | c->put_vp8_epel_pixels_tab[0][0][2] = ff_put_vp8_epel16_h6_rvv; |
| 91 | 91 | c->put_vp8_epel_pixels_tab[1][0][2] = ff_put_vp8_epel8_h6_rvv; |
| 92 | 92 | c->put_vp8_epel_pixels_tab[2][0][2] = ff_put_vp8_epel4_h6_rvv; |