Unified · Split
| @@ -215,6 +215,18 @@ ALF_FUNCS(16, 12, avx2) · 214 unmodified lines | |||
| 215 | 215 | ||
| 216 | #endif | 216 | #endif |
| 217 | 217 | ||
| 218 | #define AVG_INIT(bd, opt) do { \ | ||
| 219 | c->inter.avg = bf(vvc_avg, bd, opt); \ | ||
| 220 | c->inter.w_avg = bf(vvc_w_avg, bd, opt); \ | ||
| 221 | } while (0) | ||
| 222 | |||
| 223 | #define DMVR_INIT(bd) do { \ | ||
| 224 | c->inter.dmvr[0][0] = ff_vvc_dmvr_##bd##_avx2; \ | ||
| 225 | c->inter.dmvr[0][1] = ff_vvc_dmvr_h_##bd##_avx2; \ | ||
| 226 | c->inter.dmvr[1][0] = ff_vvc_dmvr_v_##bd##_avx2; \ | ||
| 227 | c->inter.dmvr[1][1] = ff_vvc_dmvr_hv_##bd##_avx2; \ | ||
| 228 | } while (0) | ||
| 229 | |||
| 218 | #define PEL_LINK(dst, C, W, idx1, idx2, name, D, opt) \ | 230 | #define PEL_LINK(dst, C, W, idx1, idx2, name, D, opt) \ |
| 219 | dst[C][W][idx1][idx2] = vvc_put_## name ## _ ## D ## _##opt; \ | 231 | dst[C][W][idx1][idx2] = vvc_put_## name ## _ ## D ## _##opt; \ |
| 220 | dst ## _uni[C][W][idx1][idx2] = ff_h2656_put_uni_ ## name ## _ ## D ## _##opt; \ | 232 | dst ## _uni[C][W][idx1][idx2] = ff_h2656_put_uni_ ## name ## _ ## D ## _##opt; \ |
| @@ -280,17 +292,8 @@ ALF_FUNCS(16, 12, avx2) · 59 unmodified lines | |||
| 280 | MC_TAP_LINKS_16BPC_AVX2(LUMA, 8, bd); \ | 292 | MC_TAP_LINKS_16BPC_AVX2(LUMA, 8, bd); \ |
| 281 | MC_TAP_LINKS_16BPC_AVX2(CHROMA, 4, bd); | 293 | MC_TAP_LINKS_16BPC_AVX2(CHROMA, 4, bd); |
| 282 | 294 | ||
| 283 | #define AVG_INIT(bd, opt) do { \ | 295 | int ff_vvc_sad_avx2(const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h); |
| 284 | c->inter.avg = bf(vvc_avg, bd, opt); \ | 296 | #define SAD_INIT() c->inter.sad = ff_vvc_sad_avx2 |
| 285 | c->inter.w_avg = bf(vvc_w_avg, bd, opt); \ | ||
| 286 | } while (0) | ||
| 287 | |||
| 288 | #define DMVR_INIT(bd) do { \ | ||
| 289 | c->inter.dmvr[0][0] = ff_vvc_dmvr_##bd##_avx2; \ | ||
| 290 | c->inter.dmvr[0][1] = ff_vvc_dmvr_h_##bd##_avx2; \ | ||
| 291 | c->inter.dmvr[1][0] = ff_vvc_dmvr_v_##bd##_avx2; \ | ||
| 292 | c->inter.dmvr[1][1] = ff_vvc_dmvr_hv_##bd##_avx2; \ | ||
| 293 | } while (0) | ||
| 294 | 297 | ||
| 295 | #define ALF_INIT(bd) do { \ | 298 | #define ALF_INIT(bd) do { \ |
| 296 | c->alf.filter[LUMA] = vvc_alf_filter_luma_##bd##_avx2; \ | 299 | c->alf.filter[LUMA] = vvc_alf_filter_luma_##bd##_avx2; \ |
| @@ -298,8 +301,6 @@ ALF_FUNCS(16, 12, avx2) · 1 unmodified line | |||
| 298 | c->alf.classify = vvc_alf_classify_##bd##_avx2; \ | 301 | c->alf.classify = vvc_alf_classify_##bd##_avx2; \ |
| 299 | } while (0) | 302 | } while (0) |
| 300 | 303 | ||
| 301 | int ff_vvc_sad_avx2(const int16_t *src0, const int16_t *src1, int dx, int dy, int block_w, int block_h); | ||
| 302 | #define SAD_INIT() c->inter.sad = ff_vvc_sad_avx2 | ||
| 303 | #endif | 304 | #endif |
| 304 | 305 | ||
| 305 | 306 | ||
| @@ -319,12 +320,15 @@ void ff_vvc_dsp_init_x86(VVCDSPContext *const c, const int bd) · 13 unmodified lines | |||
| 319 | #endif | 320 | #endif |
| 320 | #if HAVE_AVX2_EXTERNAL | 321 | #if HAVE_AVX2_EXTERNAL |
| 321 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { | 322 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { |
| 322 | ALF_INIT(8); | 323 | // inter |
| 323 | AVG_INIT(8, avx2); | 324 | AVG_INIT(8, avx2); |
| 325 | DMVR_INIT(8); | ||
| 324 | MC_LINKS_AVX2(8); | 326 | MC_LINKS_AVX2(8); |
| 325 | OF_INIT(8); | 327 | OF_INIT(8); |
| 326 | DMVR_INIT(8); | ||
| 327 | SAD_INIT(); | 328 | SAD_INIT(); |
| 329 | |||
| 330 | // filter | ||
| 331 | ALF_INIT(8); | ||
| 328 | } | 332 | } |
| 329 | #endif | 333 | #endif |
| 330 | break; | 334 | break; |
| @@ -336,13 +340,16 @@ void ff_vvc_dsp_init_x86(VVCDSPContext *const c, const int bd) · 5 unmodified lines | |||
| 336 | #endif | 340 | #endif |
| 337 | #if HAVE_AVX2_EXTERNAL | 341 | #if HAVE_AVX2_EXTERNAL |
| 338 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { | 342 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { |
| 339 | ALF_INIT(10); | 343 | // inter |
| 340 | AVG_INIT(10, avx2); | 344 | AVG_INIT(10, avx2); |
| 345 | DMVR_INIT(10); | ||
| 341 | MC_LINKS_AVX2(10); | 346 | MC_LINKS_AVX2(10); |
| 342 | MC_LINKS_16BPC_AVX2(10); | 347 | MC_LINKS_16BPC_AVX2(10); |
| 343 | OF_INIT(10); | 348 | OF_INIT(10); |
| 344 | DMVR_INIT(10); | ||
| 345 | SAD_INIT(); | 349 | SAD_INIT(); |
| 350 | |||
| 351 | // filter | ||
| 352 | ALF_INIT(10); | ||
| 346 | } | 353 | } |
| 347 | #endif | 354 | #endif |
| 348 | break; | 355 | break; |
| @@ -354,13 +361,16 @@ void ff_vvc_dsp_init_x86(VVCDSPContext *const c, const int bd) · 5 unmodified lines | |||
| 354 | #endif | 361 | #endif |
| 355 | #if HAVE_AVX2_EXTERNAL | 362 | #if HAVE_AVX2_EXTERNAL |
| 356 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { | 363 | if (EXTERNAL_AVX2_FAST(cpu_flags)) { |
| 357 | ALF_INIT(12); | 364 | // inter |
| 358 | AVG_INIT(12, avx2); | 365 | AVG_INIT(12, avx2); |
| 366 | DMVR_INIT(12); | ||
| 359 | MC_LINKS_AVX2(12); | 367 | MC_LINKS_AVX2(12); |
| 360 | MC_LINKS_16BPC_AVX2(12); | 368 | MC_LINKS_16BPC_AVX2(12); |
| 361 | OF_INIT(12); | 369 | OF_INIT(12); |
| 362 | DMVR_INIT(12); | ||
| 363 | SAD_INIT(); | 370 | SAD_INIT(); |
| 371 | |||
| 372 | // filter | ||
| 373 | ALF_INIT(12); | ||
| 364 | } | 374 | } |
| 365 | #endif | 375 | #endif |
| 366 | break; | 376 | break; |