* commit '5bcbb516f2ff45290ef7995b081762e668693672': arm: Add X() around all references to extern symbols
Unified · Split
| @@ -70,7 +70,7 @@ function ff_float_to_int16_interleave_neon, export=1 · 69 unmodified lines | ||
| 70 | 70 | cmp r3, #2 |
| 71 | 71 | itt lt |
| 72 | 72 | ldrlt r1, [r1] |
| 73 | − blt ff_float_to_int16_neon | |
| 73 | + blt X(ff_float_to_int16_neon) | |
| 74 | 74 | bne 4f |
| 75 | 75 | |
| 76 | 76 | ldr r3, [r1] |
| @@ -113,8 +113,8 @@ function ff_h264_idct_add16_neon, export=1 · 112 unmodified lines | ||
| 113 | 113 | movne lr, #0 |
| 114 | 114 | cmp lr, #0 |
| 115 | 115 | ite ne |
| 116 | − adrne lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB | |
| 117 | − adreq lr, ff_h264_idct_add_neon + CONFIG_THUMB | |
| 116 | + adrne lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB | |
| 117 | + adreq lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB | |
| 118 | 118 | blx lr |
| 119 | 119 | 2: subs ip, ip, #1 |
| 120 | 120 | add r1, r1, #32 |
| @@ -138,8 +138,8 @@ function ff_h264_idct_add16intra_neon, export=1 · 17 unmodified lines | ||
| 138 | 138 | cmp r8, #0 |
| 139 | 139 | ldrsh r8, [r1] |
| 140 | 140 | iteet ne |
| 141 | − adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB | |
| 142 | − adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB | |
| 141 | + adrne lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB | |
| 142 | + adreq lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB | |
| 143 | 143 | cmpeq r8, #0 |
| 144 | 144 | blxne lr |
| 145 | 145 | subs ip, ip, #1 |
| @@ -166,8 +166,8 @@ function ff_h264_idct_add8_neon, export=1 · 20 unmodified lines | ||
| 166 | 166 | cmp r8, #0 |
| 167 | 167 | ldrsh r8, [r1] |
| 168 | 168 | iteet ne |
| 169 | − adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB | |
| 170 | − adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB | |
| 169 | + adrne lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB | |
| 170 | + adreq lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB | |
| 171 | 171 | cmpeq r8, #0 |
| 172 | 172 | blxne lr |
| 173 | 173 | add r12, r12, #1 |
| @@ -388,8 +388,8 @@ function ff_h264_idct8_add4_neon, export=1 · 214 unmodified lines | ||
| 388 | 388 | movne lr, #0 |
| 389 | 389 | cmp lr, #0 |
| 390 | 390 | ite ne |
| 391 | − adrne lr, ff_h264_idct8_dc_add_neon + CONFIG_THUMB | |
| 392 | − adreq lr, ff_h264_idct8_add_neon + CONFIG_THUMB | |
| 391 | + adrne lr, X(ff_h264_idct8_dc_add_neon) + CONFIG_THUMB | |
| 392 | + adreq lr, X(ff_h264_idct8_add_neon) + CONFIG_THUMB | |
| 393 | 393 | blx lr |
| 394 | 394 | 2: subs r12, r12, #4 |
| 395 | 395 | add r1, r1, #128 |
| @@ -23,11 +23,11 @@ · 22 unmodified lines | ||
| 23 | 23 | .macro call_2x_pixels type, subp |
| 24 | 24 | function ff_\type\()_pixels16\subp\()_armv6, export=1 |
| 25 | 25 | push {r0-r3, lr} |
| 26 | − bl ff_\type\()_pixels8\subp\()_armv6 | |
| 26 | + bl X(ff_\type\()_pixels8\subp\()_armv6) | |
| 27 | 27 | pop {r0-r3, lr} |
| 28 | 28 | add r0, r0, #8 |
| 29 | 29 | add r1, r1, #8 |
| 30 | − b ff_\type\()_pixels8\subp\()_armv6 | |
| 30 | + b X(ff_\type\()_pixels8\subp\()_armv6) | |
| 31 | 31 | endfunc |
| 32 | 32 | .endm |
| 33 | 33 | |
| @@ -129,7 +129,7 @@ function ff_imdct_calc_neon, export=1 · 128 unmodified lines | ||
| 129 | 129 | lsl r4, r4, r3 |
| 130 | 130 | add r1, r1, r4 |
| 131 | 131 | |
| 132 | − bl ff_imdct_half_neon | |
| 132 | + bl X(ff_imdct_half_neon) | |
| 133 | 133 | |
| 134 | 134 | add r0, r5, r4, lsl #2 |
| 135 | 135 | add r1, r5, r4, lsl #1 |
| @@ -100,7 +100,7 @@ function ff_dct_unquantize_h263_intra_neon, export=1 · 99 unmodified lines | ||
| 100 | 100 | smulbb r4, r4, r6 |
| 101 | 101 | 2: lsl r0, r3, #1 |
| 102 | 102 | add r3, r12, #1 |
| 103 | − bl ff_dct_unquantize_h263_neon | |
| 103 | + bl X(ff_dct_unquantize_h263_neon) | |
| 104 | 104 | vmov.16 d0[0], r4 |
| 105 | 105 | vst1.16 {d0[0]}, [r5] |
| 106 | 106 | pop {r4-r6,pc} |
| @@ -26,6 +26,6 @@ function ff_prefetch_arm, export=1 · 25 unmodified lines | ||
| 26 | 26 | subs r2, r2, #1 |
| 27 | 27 | pld [r0] |
| 28 | 28 | add r0, r0, r1 |
| 29 | − bne ff_prefetch_arm | |
| 29 | + bne X(ff_prefetch_arm) | |
| 30 | 30 | bx lr |
| 31 | 31 | endfunc |
| @@ -359,14 +359,14 @@ endfunc · 358 unmodified lines | ||
| 359 | 359 | function ff_vp8_idct_dc_add4uv_armv6, export=1 |
| 360 | 360 | push {r4, lr} |
| 361 | 361 | |
| 362 | − bl ff_vp8_idct_dc_add_armv6 | |
| 362 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 363 | 363 | add r0, r0, #4 |
| 364 | − bl ff_vp8_idct_dc_add_armv6 | |
| 364 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 365 | 365 | add r0, r0, r2, lsl #2 |
| 366 | 366 | sub r0, r0, #4 |
| 367 | − bl ff_vp8_idct_dc_add_armv6 | |
| 367 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 368 | 368 | add r0, r0, #4 |
| 369 | − bl ff_vp8_idct_dc_add_armv6 | |
| 369 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 370 | 370 | |
| 371 | 371 | pop {r4, pc} |
| 372 | 372 | endfunc |
| @@ -375,13 +375,13 @@ endfunc · 2 unmodified lines | ||
| 375 | 375 | function ff_vp8_idct_dc_add4y_armv6, export=1 |
| 376 | 376 | push {r4, lr} |
| 377 | 377 | |
| 378 | − bl ff_vp8_idct_dc_add_armv6 | |
| 378 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 379 | 379 | add r0, r0, #4 |
| 380 | − bl ff_vp8_idct_dc_add_armv6 | |
| 380 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 381 | 381 | add r0, r0, #4 |
| 382 | − bl ff_vp8_idct_dc_add_armv6 | |
| 382 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 383 | 383 | add r0, r0, #4 |
| 384 | − bl ff_vp8_idct_dc_add_armv6 | |
| 384 | + bl X(ff_vp8_idct_dc_add_armv6) | |
| 385 | 385 | |
| 386 | 386 | pop {r4, pc} |
| 387 | 387 | endfunc |
| @@ -133,8 +133,8 @@ function ff_conv_fltp_to_s16_neon, export=1 · 132 unmodified lines | ||
| 133 | 133 | cmp r3, #2 |
| 134 | 134 | itt lt |
| 135 | 135 | ldrlt r1, [r1] |
| 136 | − blt ff_conv_flt_to_s16_neon | |
| 137 | − beq ff_conv_fltp_to_s16_2ch_neon | |
| 136 | + blt X(ff_conv_flt_to_s16_neon) | |
| 137 | + beq X(ff_conv_fltp_to_s16_2ch_neon) | |
| 138 | 138 | |
| 139 | 139 | push {r4-r8, lr} |
| 140 | 140 | cmp r3, #4 |