History

x86/cpu: add AV_CPU_FLAG_AVXSLOW flag

James Almer committed 11 years ago

Commit c312bfa1 parent 52fc3e35 files · +24 −4Browse files

Unified · Split

5 files
  1. doc/APIchanges +3 −0
  2. libavutil/cpu.c +5 −0
  3. libavutil/cpu.h +1 −0
  4. libavutil/version.h +1 −1
  5. libavutil/x86/cpu.c +14 −3
doc/APIchanges+3−0
@@ -15,6 +15,9 @@ libavutil: 2014-08-09 · 14 unmodified lines
15 15
16API changes, most recent first:16API changes, most recent first:
17 17
182015-05-27 - xxxxxxx - lavu 54.26.100 - cpu.h
19 Add AV_CPU_FLAG_AVXSLOW.
20
182015-05-26 - xxxxxxx - lavu 54.25.100 - rational.h212015-05-26 - xxxxxxx - lavu 54.25.100 - rational.h
19 Add av_q2intfloat().22 Add av_q2intfloat().
20 23
libavutil/cpu.c+5−0
@@ -59,6 +59,7 @@ void av_force_cpu_flags(int arg){ · 58 unmodified lines
59 AV_CPU_FLAG_SSE4 |59 AV_CPU_FLAG_SSE4 |
60 AV_CPU_FLAG_SSE42 |60 AV_CPU_FLAG_SSE42 |
61 AV_CPU_FLAG_AVX |61 AV_CPU_FLAG_AVX |
62 AV_CPU_FLAG_AVXSLOW |
62 AV_CPU_FLAG_XOP |63 AV_CPU_FLAG_XOP |
63 AV_CPU_FLAG_FMA3 |64 AV_CPU_FLAG_FMA3 |
64 AV_CPU_FLAG_FMA4 |65 AV_CPU_FLAG_FMA4 |
@@ -111,6 +112,7 @@ int av_parse_cpu_flags(const char *s) · 46 unmodified lines
111#define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)112#define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
112#define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)113#define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
113#define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)114#define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
115#define CPUFLAG_AVXSLOW (AV_CPU_FLAG_AVXSLOW | CPUFLAG_AVX)
114#define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)116#define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
115#define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)117#define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)
116#define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)118#define CPUFLAG_FMA4 (AV_CPU_FLAG_FMA4 | CPUFLAG_AVX)
@@ -133,6 +135,7 @@ int av_parse_cpu_flags(const char *s) · 16 unmodified lines
133 { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },135 { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4 }, .unit = "flags" },
134 { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },136 { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42 }, .unit = "flags" },
135 { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },137 { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX }, .unit = "flags" },
138 { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVXSLOW }, .unit = "flags" },
136 { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },139 { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP }, .unit = "flags" },
137 { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA3 }, .unit = "flags" },140 { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA3 }, .unit = "flags" },
138 { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },141 { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_FMA4 }, .unit = "flags" },
@@ -192,6 +195,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s) · 53 unmodified lines
192 { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },195 { "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4 }, .unit = "flags" },
193 { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },196 { "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42 }, .unit = "flags" },
194 { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },197 { "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX }, .unit = "flags" },
198 { "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW }, .unit = "flags" },
195 { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },199 { "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP }, .unit = "flags" },
196 { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },200 { "fma3" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA3 }, .unit = "flags" },
197 { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },201 { "fma4" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_FMA4 }, .unit = "flags" },
@@ -320,6 +324,7 @@ static const struct { · 122 unmodified lines
320 { AV_CPU_FLAG_SSE4, "sse4.1" },324 { AV_CPU_FLAG_SSE4, "sse4.1" },
321 { AV_CPU_FLAG_SSE42, "sse4.2" },325 { AV_CPU_FLAG_SSE42, "sse4.2" },
322 { AV_CPU_FLAG_AVX, "avx" },326 { AV_CPU_FLAG_AVX, "avx" },
327 { AV_CPU_FLAG_AVXSLOW, "avxslow" },
323 { AV_CPU_FLAG_XOP, "xop" },328 { AV_CPU_FLAG_XOP, "xop" },
324 { AV_CPU_FLAG_FMA3, "fma3" },329 { AV_CPU_FLAG_FMA3, "fma3" },
325 { AV_CPU_FLAG_FMA4, "fma4" },330 { AV_CPU_FLAG_FMA4, "fma4" },
libavutil/cpu.h+1−0
@@ -43,6 +43,7 @@ · 42 unmodified lines
43#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions43#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
44#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions44#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
45#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used45#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used
46#define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when using YMM registers (e.g. Bulldozer)
46#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions47#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
47#define AV_CPU_FLAG_FMA4 0x0800 ///< Bulldozer FMA4 functions48#define AV_CPU_FLAG_FMA4 0x0800 ///< Bulldozer FMA4 functions
48// #if LIBAVUTIL_VERSION_MAJOR <5249// #if LIBAVUTIL_VERSION_MAJOR <52
libavutil/version.h+1−1
@@ -56,7 +56,7 @@ · 55 unmodified lines
56 */56 */
57 57
58#define LIBAVUTIL_VERSION_MAJOR 5458#define LIBAVUTIL_VERSION_MAJOR 54
59#define LIBAVUTIL_VERSION_MINOR 2559#define LIBAVUTIL_VERSION_MINOR 26
60#define LIBAVUTIL_VERSION_MICRO 10060#define LIBAVUTIL_VERSION_MICRO 100
61 61
62#define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \62#define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \
libavutil/x86/cpu.c+14−3
@@ -167,6 +167,7 @@ int ff_get_cpu_flags_x86(void) · 166 unmodified lines
167 if (ext_caps & (1 << 22))167 if (ext_caps & (1 << 22))
168 rval |= AV_CPU_FLAG_MMXEXT;168 rval |= AV_CPU_FLAG_MMXEXT;
169 169
170 if (!strncmp(vendor.c, "AuthenticAMD", 12)) {
170 /* Allow for selectively disabling SSE2 functions on AMD processors171 /* Allow for selectively disabling SSE2 functions on AMD processors
171 with SSE2 support but not SSE4a. This includes Athlon64, some172 with SSE2 support but not SSE4a. This includes Athlon64, some
172 Opteron, and some Sempron processors. MMX, SSE, or 3DNow! are faster173 Opteron, and some Sempron processors. MMX, SSE, or 3DNow! are faster
@@ -174,9 +175,19 @@ int ff_get_cpu_flags_x86(void) · 1 unmodified line
174 AV_CPU_FLAG_SSE2 and AV_CPU_FLAG_SSE2SLOW are both set in this case175 AV_CPU_FLAG_SSE2 and AV_CPU_FLAG_SSE2SLOW are both set in this case
175 so that SSE2 is used unless explicitly disabled by checking176 so that SSE2 is used unless explicitly disabled by checking
176 AV_CPU_FLAG_SSE2SLOW. */177 AV_CPU_FLAG_SSE2SLOW. */
177 if (!strncmp(vendor.c, "AuthenticAMD", 12) &&178 if (rval & AV_CPU_FLAG_SSE2 && !(ecx & 0x00000040))
178 rval & AV_CPU_FLAG_SSE2 && !(ecx & 0x00000040)) {179 rval |= AV_CPU_FLAG_SSE2SLOW;
179 rval |= AV_CPU_FLAG_SSE2SLOW;180
181 /* Similar to the above but for AVX functions on AMD processors.
182 This is necessary only for functions using YMM registers on Bulldozer
183 based CPUs as they lack 256-bits execution units. SSE/AVX functions
184 using XMM registers are always faster on them.
185 AV_CPU_FLAG_AVX and AV_CPU_FLAG_AVXSLOW are both set so that AVX is
186 used unless explicitly disabled by checking AV_CPU_FLAG_AVXSLOW.
187 TODO: Confirm if Excavator is affected or not by this once it's
188 released, and update the check if necessary. Same for btver2. */
189 if (family == 0x15 && (rval & AV_CPU_FLAG_AVX))
190 rval |= AV_CPU_FLAG_AVXSLOW;
180 }191 }
181 192
182 /* XOP and FMA4 use the AVX instruction coding scheme, so they can't be193 /* XOP and FMA4 use the AVX instruction coding scheme, so they can't be

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t