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swscale: aarch64: Fix yuv2rgb with negative strides

Treat the 32 bit stride registers as signed. Alternatively, we could make the stride arguments ptrdiff_t instead of int, and changing all of the assembly to operate on these registers with their full 64 bit width, but that's a much larger and more intrusive change (and risks missing some operation, which would clamp the intermediates to 32 bit still). Fixes: https://trac.ffmpeg.org/ticket/9985

Martin Storsjö committed 4 years ago

Commit cb803a01 parent 2eb601e1 file · +4 −4Browse files

Unified · Split

libswscale/aarch64/yuv2rgb_neon.S+4−4
@@ -118,8 +118,8 @@ · 117 unmodified lines
118118 .endm
119119
120120 .macro increment_yuv422p
121− add x6, x6, w7, UXTW // srcU += incU
122− add x13, x13, w14, UXTW // srcV += incV
121+ add x6, x6, w7, SXTW // srcU += incU
122+ add x13, x13, w14, SXTW // srcV += incV
123123 .endm
124124
125125 .macro compute_rgba r1 g1 b1 a1 r2 g2 b2 a2
@@ -189,8 +189,8 @@ function ff_\ifmt\()_to_\ofmt\()_neon, export=1 · 63 unmodified lines
189189 st4 {v16.8B,v17.8B,v18.8B,v19.8B}, [x2], #32
190190 subs w8, w8, #16 // width -= 16
191191 b.gt 2b
192− add x2, x2, w3, UXTW // dst += padding
193− add x4, x4, w5, UXTW // srcY += paddingY
192+ add x2, x2, w3, SXTW // dst += padding
193+ add x4, x4, w5, SXTW // srcY += paddingY
194194 increment_\ifmt
195195 subs w1, w1, #1 // height -= 1
196196 b.gt 1b

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