This adds configure and runtime checks for AVX support on x86 CPUs.
Unified · Split
| @@ -222,6 +222,7 @@ Advanced options (experts only): · 221 unmodified lines | ||
| 222 | 222 | --disable-mmx2 disable MMX2 optimizations |
| 223 | 223 | --disable-sse disable SSE optimizations |
| 224 | 224 | --disable-ssse3 disable SSSE3 optimizations |
| 225 | + --disable-avx disable AVX optimizations | |
| 225 | 226 | --disable-armv5te disable armv5te optimizations |
| 226 | 227 | --disable-armv6 disable armv6 optimizations |
| 227 | 228 | --disable-armv6t2 disable armv6t2 optimizations |
| @@ -975,6 +976,7 @@ ARCH_EXT_LIST=' · 747 unmodified lines | ||
| 975 | 976 | armv6 |
| 976 | 977 | armv6t2 |
| 977 | 978 | armvfp |
| 979 | + avx | |
| 978 | 980 | iwmmxt |
| 979 | 981 | mmi |
| 980 | 982 | mmx |
| @@ -1183,6 +1185,7 @@ mmx_deps="x86" · 202 unmodified lines | ||
| 1183 | 1185 | mmx2_deps="mmx" |
| 1184 | 1186 | sse_deps="mmx" |
| 1185 | 1187 | ssse3_deps="sse" |
| 1188 | +avx_deps="ssse3" | |
| 1186 | 1189 | |
| 1187 | 1190 | aligned_stack_if_any="ppc x86" |
| 1188 | 1191 | fast_64bit_if_any="alpha ia64 mips64 parisc64 ppc64 sparc64 x86_64" |
| @@ -2677,6 +2680,7 @@ EOF · 1488 unmodified lines | ||
| 2677 | 2680 | |
| 2678 | 2681 | check_yasm "pextrd [eax], xmm0, 1" && enable yasm || |
| 2679 | 2682 | die "yasm not found, use --disable-yasm for a crippled build" |
| 2683 | + check_yasm "vpaddw xmm0, xmm0, xmm0" || disable avx | |
| 2680 | 2684 | fi |
| 2681 | 2685 | |
| 2682 | 2686 | case "$cpu" in |
| @@ -44,7 +44,7 @@ int main(void) · 43 unmodified lines | ||
| 44 | 44 | int cpu_flags = av_get_cpu_flags(); |
| 45 | 45 | |
| 46 | 46 | printf("cpu_flags = 0x%08X\n", cpu_flags); |
| 47 | − printf("cpu_flags = %s%s%s%s%s%s%s%s%s%s%s%s\n", | |
| 47 | + printf("cpu_flags = %s%s%s%s%s%s%s%s%s%s%s%s%s\n", | |
| 48 | 48 | #if ARCH_ARM |
| 49 | 49 | cpu_flags & AV_CPU_FLAG_IWMMXT ? "IWMMXT " : "", |
| 50 | 50 | #elif ARCH_PPC |
| @@ -60,6 +60,7 @@ int main(void) · 9 unmodified lines | ||
| 60 | 60 | cpu_flags & AV_CPU_FLAG_SSSE3 ? "SSSE3 " : "", |
| 61 | 61 | cpu_flags & AV_CPU_FLAG_SSE4 ? "SSE4.1 " : "", |
| 62 | 62 | cpu_flags & AV_CPU_FLAG_SSE42 ? "SSE4.2 " : "", |
| 63 | + cpu_flags & AV_CPU_FLAG_AVX ? "AVX " : "", | |
| 63 | 64 | cpu_flags & AV_CPU_FLAG_3DNOW ? "3DNow " : "", |
| 64 | 65 | cpu_flags & AV_CPU_FLAG_3DNOWEXT ? "3DNowExt " : ""); |
| 65 | 66 | #endif |
| @@ -36,6 +36,7 @@ · 35 unmodified lines | ||
| 36 | 36 | #define AV_CPU_FLAG_SSSE3 0x0080 ///< Conroe SSSE3 functions |
| 37 | 37 | #define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions |
| 38 | 38 | #define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions |
| 39 | +#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS support even if YMM registers aren't used | |
| 39 | 40 | #define AV_CPU_FLAG_IWMMXT 0x0100 ///< XScale IWMMXT |
| 40 | 41 | #define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard |
| 41 | 42 | |
| @@ -35,6 +35,9 @@ · 34 unmodified lines | ||
| 35 | 35 | "=c" (ecx), "=d" (edx)\ |
| 36 | 36 | : "0" (index)); |
| 37 | 37 | |
| 38 | +#define xgetbv(index,eax,edx) \ | |
| 39 | + __asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index)) | |
| 40 | + | |
| 38 | 41 | /* Function to test if multimedia instructions are supported... */ |
| 39 | 42 | int ff_get_cpu_flags_x86(void) |
| 40 | 43 | { |
| @@ -93,6 +96,15 @@ int ff_get_cpu_flags_x86(void) · 52 unmodified lines | ||
| 93 | 96 | rval |= AV_CPU_FLAG_SSE4; |
| 94 | 97 | if (ecx & 0x00100000 ) |
| 95 | 98 | rval |= AV_CPU_FLAG_SSE42; |
| 99 | +#if HAVE_AVX | |
| 100 | + /* Check OXSAVE and AVX bits */ | |
| 101 | + if ((ecx & 0x18000000) == 0x18000000) { | |
| 102 | + /* Check for OS support */ | |
| 103 | + xgetbv(0, eax, edx); | |
| 104 | + if ((eax & 0x6) == 0x6) | |
| 105 | + rval |= AV_CPU_FLAG_AVX; | |
| 106 | + } | |
| 107 | +#endif | |
| 96 | 108 | #endif |
| 97 | 109 | ; |
| 98 | 110 | } |