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avutil/cpu: add AVX512 Icelake flag

Wu Jianhua committed 4 years ago

Commit f629ea21 parent e6e3aae9 files · +67 −50Browse files

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9 files
  1. configure +9 −4
  2. doc/APIchanges +3 −0
  3. libavutil/cpu.c +1 −0
  4. libavutil/cpu.h +1 −0
  5. libavutil/version.h +1 −1
  6. libavutil/x86/cpu.c +6 −2
  7. libavutil/x86/cpu.h +1 −0
  8. libavutil/x86/x86inc.asm +27 −26
  9. tests/checkasm/checkasm.c +18 −17
configure+9−4
@@ -443,6 +443,7 @@ Optimization options (experts only): · 442 unmodified lines
443443 --disable-fma4 disable FMA4 optimizations
444444 --disable-avx2 disable AVX2 optimizations
445445 --disable-avx512 disable AVX-512 optimizations
446+ --disable-avx512icl disable AVX-512ICL optimizations
446447 --disable-aesni disable AESNI optimizations
447448 --disable-armv5te disable armv5te optimizations
448449 --disable-armv6 disable armv6 optimizations
@@ -2096,6 +2097,7 @@ ARCH_EXT_LIST_X86_SIMD=" · 1647 unmodified lines
20962097 avx
20972098 avx2
20982099 avx512
2100+ avx512icl
20992101 fma3
21002102 fma4
21012103 mmx
@@ -2665,6 +2667,7 @@ fma3_deps="avx" · 563 unmodified lines
26652667 fma4_deps="avx"
26662668 avx2_deps="avx"
26672669 avx512_deps="avx2"
2670+avx512icl_deps="avx512"
26682671
26692672 mmx_external_deps="x86asm"
26702673 mmx_inline_deps="inline_asm x86"
@@ -6126,10 +6129,11 @@ EOF · 3455 unmodified lines
61266129 elf*) enabled debug && append X86ASMFLAGS $x86asm_debug ;;
61276130 esac
61286131
6129− enabled avx512 && check_x86asm avx512_external "vmovdqa32 [eax]{k1}{z}, zmm0"
6130− enabled avx2 && check_x86asm avx2_external "vextracti128 xmm0, ymm0, 0"
6131− enabled xop && check_x86asm xop_external "vpmacsdd xmm0, xmm1, xmm2, xmm3"
6132− enabled fma4 && check_x86asm fma4_external "vfmaddps ymm0, ymm1, ymm2, ymm3"
6132+ enabled avx512 && check_x86asm avx512_external "vmovdqa32 [eax]{k1}{z}, zmm0"
6133+ enabled avx512icl && check_x86asm avx512icl_external "vpdpwssds zmm31{k1}{z}, zmm29, zmm28"
6134+ enabled avx2 && check_x86asm avx2_external "vextracti128 xmm0, ymm0, 0"
6135+ enabled xop && check_x86asm xop_external "vpmacsdd xmm0, xmm1, xmm2, xmm3"
6136+ enabled fma4 && check_x86asm fma4_external "vfmaddps ymm0, ymm1, ymm2, ymm3"
61336137 check_x86asm cpunop "CPU amdnop"
61346138 fi
61356139
@@ -7469,6 +7473,7 @@ if enabled x86; then · 1333 unmodified lines
74697473 echo "AVX enabled ${avx-no}"
74707474 echo "AVX2 enabled ${avx2-no}"
74717475 echo "AVX-512 enabled ${avx512-no}"
7476+ echo "AVX-512ICL enabled ${avx512icl-no}"
74727477 echo "XOP enabled ${xop-no}"
74737478 echo "FMA3 enabled ${fma3-no}"
74747479 echo "FMA4 enabled ${fma4-no}"
doc/APIchanges+3−0
@@ -14,6 +14,9 @@ libavutil: 2021-04-27 · 13 unmodified lines
1414
1515 API changes, most recent first:
1616
17+2022-03-10 - xxxxxxxxxx - lavu 57.23.100 - cpu.h
18+ Add AV_CPU_FLAG_AVX512ICL.
19+
1720 2022-02-07 - xxxxxxxxxx - lavu 57.21.100 - fifo.h
1821 Deprecate AVFifoBuffer and the API around it, namely av_fifo_alloc(),
1922 av_fifo_alloc_array(), av_fifo_free(), av_fifo_freep(), av_fifo_reset(),
libavutil/cpu.c+1−0
@@ -137,6 +137,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s) · 136 unmodified lines
137137 { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV }, .unit = "flags" },
138138 { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI }, .unit = "flags" },
139139 { "avx512" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512 }, .unit = "flags" },
140+ { "avx512icl", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX512ICL }, .unit = "flags" },
140141 { "slowgather", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SLOW_GATHER }, .unit = "flags" },
141142
142143 #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
libavutil/cpu.h+1−0
@@ -54,6 +54,7 @@ · 53 unmodified lines
5454 #define AV_CPU_FLAG_BMI1 0x20000 ///< Bit Manipulation Instruction Set 1
5555 #define AV_CPU_FLAG_BMI2 0x40000 ///< Bit Manipulation Instruction Set 2
5656 #define AV_CPU_FLAG_AVX512 0x100000 ///< AVX-512 functions: requires OS support even if YMM/ZMM registers aren't used
57+#define AV_CPU_FLAG_AVX512ICL 0x200000 ///< F/CD/BW/DQ/VL/VNNI/IFMA/VBMI/VBMI2/VPOPCNTDQ/BITALG/GFNI/VAES/VPCLMULQDQ
5758 #define AV_CPU_FLAG_SLOW_GATHER 0x2000000 ///< CPU has slow gathers.
5859
5960 #define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
libavutil/version.h+1−1
@@ -79,7 +79,7 @@ · 78 unmodified lines
7979 */
8080
8181 #define LIBAVUTIL_VERSION_MAJOR 57
82−#define LIBAVUTIL_VERSION_MINOR 22
82+#define LIBAVUTIL_VERSION_MINOR 23
8383 #define LIBAVUTIL_VERSION_MICRO 100
8484
8585 #define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \
libavutil/x86/cpu.c+6−2
@@ -150,9 +150,13 @@ int ff_get_cpu_flags_x86(void) · 149 unmodified lines
150150 rval |= AV_CPU_FLAG_AVX2;
151151 #if HAVE_AVX512 /* F, CD, BW, DQ, VL */
152152 if ((xcr0_lo & 0xe0) == 0xe0) { /* OPMASK/ZMM state */
153− if ((rval & AV_CPU_FLAG_AVX2) && (ebx & 0xd0030000) == 0xd0030000)
153+ if ((rval & AV_CPU_FLAG_AVX2) && (ebx & 0xd0030000) == 0xd0030000) {
154154 rval |= AV_CPU_FLAG_AVX512;
155−
155+#if HAVE_AVX512ICL
156+ if ((ebx & 0xd0200000) == 0xd0200000 && (ecx & 0x5f42) == 0x5f42)
157+ rval |= AV_CPU_FLAG_AVX512ICL;
158+#endif /* HAVE_AVX512ICL */
159+ }
156160 }
157161 #endif /* HAVE_AVX512 */
158162 #endif /* HAVE_AVX2 */
libavutil/x86/cpu.h+1−0
@@ -80,6 +80,7 @@ · 79 unmodified lines
8080 #define EXTERNAL_AVX2_SLOW(flags) CPUEXT_SUFFIX_SLOW2(flags, _EXTERNAL, AVX2, AVX)
8181 #define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI)
8282 #define EXTERNAL_AVX512(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX512)
83+#define EXTERNAL_AVX512ICL(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX512ICL)
8384
8485 #define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW)
8586 #define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOWEXT)
libavutil/x86/x86inc.asm+27−26
@@ -817,32 +817,33 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg, jge, jng, jnge, ja, jae, · 816 unmodified lines
817817
818818 ; cpuflags
819819
820−%assign cpuflags_mmx (1<<0)
821−%assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
822−%assign cpuflags_3dnow (1<<2) | cpuflags_mmx
823−%assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
824−%assign cpuflags_sse (1<<4) | cpuflags_mmx2
825−%assign cpuflags_sse2 (1<<5) | cpuflags_sse
826−%assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
827−%assign cpuflags_lzcnt (1<<7) | cpuflags_sse2
828−%assign cpuflags_sse3 (1<<8) | cpuflags_sse2
829−%assign cpuflags_ssse3 (1<<9) | cpuflags_sse3
830−%assign cpuflags_sse4 (1<<10)| cpuflags_ssse3
831−%assign cpuflags_sse42 (1<<11)| cpuflags_sse4
832−%assign cpuflags_aesni (1<<12)| cpuflags_sse42
833−%assign cpuflags_avx (1<<13)| cpuflags_sse42
834−%assign cpuflags_xop (1<<14)| cpuflags_avx
835−%assign cpuflags_fma4 (1<<15)| cpuflags_avx
836−%assign cpuflags_fma3 (1<<16)| cpuflags_avx
837−%assign cpuflags_bmi1 (1<<17)| cpuflags_avx|cpuflags_lzcnt
838−%assign cpuflags_bmi2 (1<<18)| cpuflags_bmi1
839−%assign cpuflags_avx2 (1<<19)| cpuflags_fma3|cpuflags_bmi2
840−%assign cpuflags_avx512 (1<<20)| cpuflags_avx2 ; F, CD, BW, DQ, VL
841−
842−%assign cpuflags_cache32 (1<<21)
843−%assign cpuflags_cache64 (1<<22)
844−%assign cpuflags_aligned (1<<23) ; not a cpu feature, but a function variant
845−%assign cpuflags_atom (1<<24)
820+%assign cpuflags_mmx (1<<0)
821+%assign cpuflags_mmx2 (1<<1) | cpuflags_mmx
822+%assign cpuflags_3dnow (1<<2) | cpuflags_mmx
823+%assign cpuflags_3dnowext (1<<3) | cpuflags_3dnow
824+%assign cpuflags_sse (1<<4) | cpuflags_mmx2
825+%assign cpuflags_sse2 (1<<5) | cpuflags_sse
826+%assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
827+%assign cpuflags_lzcnt (1<<7) | cpuflags_sse2
828+%assign cpuflags_sse3 (1<<8) | cpuflags_sse2
829+%assign cpuflags_ssse3 (1<<9) | cpuflags_sse3
830+%assign cpuflags_sse4 (1<<10)| cpuflags_ssse3
831+%assign cpuflags_sse42 (1<<11)| cpuflags_sse4
832+%assign cpuflags_aesni (1<<12)| cpuflags_sse42
833+%assign cpuflags_avx (1<<13)| cpuflags_sse42
834+%assign cpuflags_xop (1<<14)| cpuflags_avx
835+%assign cpuflags_fma4 (1<<15)| cpuflags_avx
836+%assign cpuflags_fma3 (1<<16)| cpuflags_avx
837+%assign cpuflags_bmi1 (1<<17)| cpuflags_avx|cpuflags_lzcnt
838+%assign cpuflags_bmi2 (1<<18)| cpuflags_bmi1
839+%assign cpuflags_avx2 (1<<19)| cpuflags_fma3|cpuflags_bmi2
840+%assign cpuflags_avx512 (1<<20)| cpuflags_avx2 ; F, CD, BW, DQ, VL
841+%assign cpuflags_avx512icl (1<<25)| cpuflags_avx512
842+
843+%assign cpuflags_cache32 (1<<21)
844+%assign cpuflags_cache64 (1<<22)
845+%assign cpuflags_aligned (1<<23) ; not a cpu feature, but a function variant
846+%assign cpuflags_atom (1<<24)
846847
847848 ; Returns a boolean value expressing whether or not the specified cpuflag is enabled.
848849 %define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) - 1) >> 31) & 1)
tests/checkasm/checkasm.c+18−17
@@ -220,23 +220,24 @@ static const struct { · 219 unmodified lines
220220 { "MMI", "mmi", AV_CPU_FLAG_MMI },
221221 { "MSA", "msa", AV_CPU_FLAG_MSA },
222222 #elif ARCH_X86
223− { "MMX", "mmx", AV_CPU_FLAG_MMX|AV_CPU_FLAG_CMOV },
224− { "MMXEXT", "mmxext", AV_CPU_FLAG_MMXEXT },
225− { "3DNOW", "3dnow", AV_CPU_FLAG_3DNOW },
226− { "3DNOWEXT", "3dnowext", AV_CPU_FLAG_3DNOWEXT },
227− { "SSE", "sse", AV_CPU_FLAG_SSE },
228− { "SSE2", "sse2", AV_CPU_FLAG_SSE2|AV_CPU_FLAG_SSE2SLOW },
229− { "SSE3", "sse3", AV_CPU_FLAG_SSE3|AV_CPU_FLAG_SSE3SLOW },
230− { "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
231− { "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
232− { "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
233− { "AES-NI", "aesni", AV_CPU_FLAG_AESNI },
234− { "AVX", "avx", AV_CPU_FLAG_AVX },
235− { "XOP", "xop", AV_CPU_FLAG_XOP },
236− { "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
237− { "FMA4", "fma4", AV_CPU_FLAG_FMA4 },
238− { "AVX2", "avx2", AV_CPU_FLAG_AVX2 },
239− { "AVX-512", "avx512", AV_CPU_FLAG_AVX512 },
223+ { "MMX", "mmx", AV_CPU_FLAG_MMX|AV_CPU_FLAG_CMOV },
224+ { "MMXEXT", "mmxext", AV_CPU_FLAG_MMXEXT },
225+ { "3DNOW", "3dnow", AV_CPU_FLAG_3DNOW },
226+ { "3DNOWEXT", "3dnowext", AV_CPU_FLAG_3DNOWEXT },
227+ { "SSE", "sse", AV_CPU_FLAG_SSE },
228+ { "SSE2", "sse2", AV_CPU_FLAG_SSE2|AV_CPU_FLAG_SSE2SLOW },
229+ { "SSE3", "sse3", AV_CPU_FLAG_SSE3|AV_CPU_FLAG_SSE3SLOW },
230+ { "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
231+ { "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
232+ { "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
233+ { "AES-NI", "aesni", AV_CPU_FLAG_AESNI },
234+ { "AVX", "avx", AV_CPU_FLAG_AVX },
235+ { "XOP", "xop", AV_CPU_FLAG_XOP },
236+ { "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
237+ { "FMA4", "fma4", AV_CPU_FLAG_FMA4 },
238+ { "AVX2", "avx2", AV_CPU_FLAG_AVX2 },
239+ { "AVX-512", "avx512", AV_CPU_FLAG_AVX512 },
240+ { "AVX-512ICL", "avx512icl", AV_CPU_FLAG_AVX512ICL },
240241 #elif ARCH_LOONGARCH
241242 { "LSX", "lsx", AV_CPU_FLAG_LSX },
242243 { "LASX", "lasx", AV_CPU_FLAG_LASX },

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