1.Add compile check to probe the native ability of toolchain to decide whether a feature can be enabled. 2.Add runtime check to probe cpu supported features. MSA will be prefered if MSA and MMI are both supported. 3.You can configure and build as following commands: ./configure --cpu=loongson3a && make -j4
Unified · Split
| @@ -147,6 +147,10 @@ $(BUILD_PFX)%_avx512.c.o: CFLAGS += -mavx512f -mavx512cd -mavx512bw -mavx512dq - · 146 unmodified lines | ||
| 147 | 147 | $(BUILD_PFX)%_vsx.c.d: CFLAGS += -maltivec -mvsx |
| 148 | 148 | $(BUILD_PFX)%_vsx.c.o: CFLAGS += -maltivec -mvsx |
| 149 | 149 | |
| 150 | +# MIPS | |
| 151 | +$(BUILD_PFX)%_msa.c.d: CFLAGS += -mmsa | |
| 152 | +$(BUILD_PFX)%_msa.c.o: CFLAGS += -mmsa | |
| 153 | + | |
| 150 | 154 | $(BUILD_PFX)%.c.d: %.c |
| 151 | 155 | $(if $(quiet),@echo " [DEP] $@") |
| 152 | 156 | $(qexec)mkdir -p $(dir $@) |
| @@ -1195,25 +1195,27 @@ EOF · 1194 unmodified lines | ||
| 1195 | 1195 | check_add_asflags -mips64r6 -mabi=64 -mhard-float -mfp64 |
| 1196 | 1196 | check_add_ldflags -mips64r6 -mabi=64 -mfp64 |
| 1197 | 1197 | ;; |
| 1198 | + loongson3*) | |
| 1199 | + check_cflags -march=loongson3a && soft_enable mmi \ | |
| 1200 | + || disable_feature mmi | |
| 1201 | + check_cflags -mmsa && soft_enable msa \ | |
| 1202 | + || disable_feature msa | |
| 1203 | + tgt_isa=loongson3a | |
| 1204 | + ;; | |
| 1198 | 1205 | esac |
| 1199 | 1206 | |
| 1207 | + if enabled mmi || enabled msa; then | |
| 1208 | + soft_enable runtime_cpu_detect | |
| 1209 | + fi | |
| 1210 | + | |
| 1200 | 1211 | if enabled msa; then |
| 1201 | 1212 | # TODO(libyuv:793) |
| 1202 | 1213 | # The new mips functions in libyuv do not build |
| 1203 | 1214 | # with the toolchains we currently use for testing. |
| 1204 | 1215 | soft_disable libyuv |
| 1205 | − | |
| 1206 | − add_cflags -mmsa | |
| 1207 | − add_asflags -mmsa | |
| 1208 | − add_ldflags -mmsa | |
| 1209 | 1216 | fi |
| 1210 | 1217 | fi |
| 1211 | 1218 | |
| 1212 | − if enabled mmi; then | |
| 1213 | − tgt_isa=loongson3a | |
| 1214 | − check_add_ldflags -march=loongson3a | |
| 1215 | − fi | |
| 1216 | − | |
| 1217 | 1219 | check_add_cflags -march=${tgt_isa} |
| 1218 | 1220 | check_add_asflags -march=${tgt_isa} |
| 1219 | 1221 | check_add_asflags -KPIC |
| @@ -315,14 +315,26 @@ EOF · 314 unmodified lines | ||
| 315 | 315 | |
| 316 | 316 | sub mips() { |
| 317 | 317 | determine_indirection("c", @ALL_ARCHS); |
| 318 | + | |
| 319 | + # Assign the helper variable for each enabled extension | |
| 320 | + foreach my $opt (@ALL_ARCHS) { | |
| 321 | + my $opt_uc = uc $opt; | |
| 322 | + eval "\$have_${opt}=\"flags & HAS_${opt_uc}\""; | |
| 323 | + } | |
| 324 | + | |
| 318 | 325 | common_top; |
| 319 | 326 | |
| 320 | 327 | print <<EOF; |
| 321 | 328 | #include "vpx_config.h" |
| 322 | 329 | |
| 323 | 330 | #ifdef RTCD_C |
| 331 | +#include "vpx_ports/mips.h" | |
| 324 | 332 | static void setup_rtcd_internal(void) |
| 325 | 333 | { |
| 334 | + int flags = mips_cpu_caps(); | |
| 335 | + | |
| 336 | + (void)flags; | |
| 337 | + | |
| 326 | 338 | EOF |
| 327 | 339 | |
| 328 | 340 | set_function_pointers("c", @ALL_ARCHS); |
| @@ -410,24 +422,35 @@ if ($opts{arch} eq 'x86') { · 81 unmodified lines | ||
| 410 | 422 | &require(@REQUIRES); |
| 411 | 423 | x86; |
| 412 | 424 | } elsif ($opts{arch} eq 'mips32' || $opts{arch} eq 'mips64') { |
| 425 | + my $have_dspr2 = 0; | |
| 426 | + my $have_msa = 0; | |
| 427 | + my $have_mmi = 0; | |
| 413 | 428 | @ALL_ARCHS = filter("$opts{arch}"); |
| 414 | 429 | open CONFIG_FILE, $opts{config} or |
| 415 | 430 | die "Error opening config file '$opts{config}': $!\n"; |
| 416 | 431 | while (<CONFIG_FILE>) { |
| 417 | 432 | if (/HAVE_DSPR2=yes/) { |
| 418 | − @ALL_ARCHS = filter("$opts{arch}", qw/dspr2/); | |
| 419 | − last; | |
| 433 | + $have_dspr2 = 1; | |
| 420 | 434 | } |
| 421 | 435 | if (/HAVE_MSA=yes/) { |
| 422 | − @ALL_ARCHS = filter("$opts{arch}", qw/msa/); | |
| 423 | − last; | |
| 436 | + $have_msa = 1; | |
| 424 | 437 | } |
| 425 | 438 | if (/HAVE_MMI=yes/) { |
| 426 | − @ALL_ARCHS = filter("$opts{arch}", qw/mmi/); | |
| 427 | − last; | |
| 439 | + $have_mmi = 1; | |
| 428 | 440 | } |
| 429 | 441 | } |
| 430 | 442 | close CONFIG_FILE; |
| 443 | + if ($have_dspr2 == 1) { | |
| 444 | + @ALL_ARCHS = filter("$opts{arch}", qw/dspr2/); | |
| 445 | + } elsif ($have_msa == 1 && $have_mmi == 1) { | |
| 446 | + @ALL_ARCHS = filter("$opts{arch}", qw/mmi msa/); | |
| 447 | + } elsif ($have_msa == 1) { | |
| 448 | + @ALL_ARCHS = filter("$opts{arch}", qw/msa/); | |
| 449 | + } elsif ($have_mmi == 1) { | |
| 450 | + @ALL_ARCHS = filter("$opts{arch}", qw/mmi/); | |
| 451 | + } else { | |
| 452 | + unoptimized; | |
| 453 | + } | |
| 431 | 454 | mips; |
| 432 | 455 | } elsif ($opts{arch} =~ /armv7\w?/) { |
| 433 | 456 | @ALL_ARCHS = filter(qw/neon_asm neon/); |
| @@ -16,6 +16,8 @@ · 15 unmodified lines | ||
| 16 | 16 | #include "vpx_ports/x86.h" |
| 17 | 17 | #elif VPX_ARCH_PPC |
| 18 | 18 | #include "vpx_ports/ppc.h" |
| 19 | +#elif VPX_ARCH_MIPS | |
| 20 | +#include "vpx_ports/mips.h" | |
| 19 | 21 | #endif |
| 20 | 22 | #include "vp8/common/onyxc_int.h" |
| 21 | 23 | #include "vp8/common/systemdependent.h" |
| @@ -96,6 +98,8 @@ void vp8_machine_specific_config(VP8_COMMON *ctx) { · 74 unmodified lines | ||
| 96 | 98 | ctx->cpu_caps = x86_simd_caps(); |
| 97 | 99 | #elif VPX_ARCH_PPC |
| 98 | 100 | ctx->cpu_caps = ppc_simd_caps(); |
| 101 | +#elif VPX_ARCH_MIPS | |
| 102 | + ctx->cpu_caps = mips_cpu_caps(); | |
| 99 | 103 | #else |
| 100 | 104 | // generic-gnu targets. |
| 101 | 105 | ctx->cpu_caps = 0; |
| @@ -0,0 +1,27 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (c) 2020 The WebM project authors. All Rights Reserved. | |
| 3 | + * | |
| 4 | + * Use of this source code is governed by a BSD-style license | |
| 5 | + * that can be found in the LICENSE file in the root of the source | |
| 6 | + * tree. An additional intellectual property rights grant can be found | |
| 7 | + * in the file PATENTS. All contributing project authors may | |
| 8 | + * be found in the AUTHORS file in the root of the source tree. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +#ifndef VPX_PORTS_MIPS_H_ | |
| 12 | +#define VPX_PORTS_MIPS_H_ | |
| 13 | + | |
| 14 | +#ifdef __cplusplus | |
| 15 | +extern "C" { | |
| 16 | +#endif | |
| 17 | + | |
| 18 | +#define HAS_MMI 0x01 | |
| 19 | +#define HAS_MSA 0x02 | |
| 20 | + | |
| 21 | +int mips_cpu_caps(void); | |
| 22 | + | |
| 23 | +#ifdef __cplusplus | |
| 24 | +} // extern "C" | |
| 25 | +#endif | |
| 26 | + | |
| 27 | +#endif // VPX_PORTS_MIPS_H_ | |
| @@ -0,0 +1,57 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright (c) 2020 The WebM project authors. All Rights Reserved. | |
| 3 | + * | |
| 4 | + * Use of this source code is governed by a BSD-style license | |
| 5 | + * that can be found in the LICENSE file in the root of the source | |
| 6 | + * tree. An additional intellectual property rights grant can be found | |
| 7 | + * in the file PATENTS. All contributing project authors may | |
| 8 | + * be found in the AUTHORS file in the root of the source tree. | |
| 9 | + */ | |
| 10 | +#include <stdio.h> | |
| 11 | +#include <string.h> | |
| 12 | +#include "./vpx_config.h" | |
| 13 | +#include "vpx_ports/mips.h" | |
| 14 | + | |
| 15 | +#if CONFIG_RUNTIME_CPU_DETECT | |
| 16 | +#if defined(__mips__) && defined(__linux__) | |
| 17 | +int mips_cpu_caps(void) { | |
| 18 | + char cpuinfo_line[512]; | |
| 19 | + int flag = 0x0; | |
| 20 | + FILE *f = fopen("/proc/cpuinfo", "r"); | |
| 21 | + if (!f) { | |
| 22 | + // Assume nothing if /proc/cpuinfo is unavailable. | |
| 23 | + // This will occur for Chrome sandbox for Pepper or Render process. | |
| 24 | + return 0; | |
| 25 | + } | |
| 26 | + while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) { | |
| 27 | + if (memcmp(cpuinfo_line, "cpu model", 9) == 0) { | |
| 28 | + // Workaround early kernel without mmi in ASEs line. | |
| 29 | + if (strstr(cpuinfo_line, "Loongson-3")) { | |
| 30 | + flag |= HAS_MMI; | |
| 31 | + } else if (strstr(cpuinfo_line, "Loongson-2K")) { | |
| 32 | + flag |= HAS_MMI | HAS_MSA; | |
| 33 | + } | |
| 34 | + } | |
| 35 | + if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) { | |
| 36 | + if (strstr(cpuinfo_line, "loongson-mmi") && | |
| 37 | + strstr(cpuinfo_line, "loongson-ext")) { | |
| 38 | + flag |= HAS_MMI; | |
| 39 | + } | |
| 40 | + if (strstr(cpuinfo_line, "msa")) { | |
| 41 | + flag |= HAS_MSA; | |
| 42 | + } | |
| 43 | + // ASEs is the last line, so we can break here. | |
| 44 | + break; | |
| 45 | + } | |
| 46 | + } | |
| 47 | + fclose(f); | |
| 48 | + return flag; | |
| 49 | +} | |
| 50 | +#else /* end __mips__ && __linux__ */ | |
| 51 | +#error \ | |
| 52 | + "--enable-runtime-cpu-detect selected, but no CPU detection method " \ | |
| 53 | +"available for your platform. Reconfigure with --disable-runtime-cpu-detect." | |
| 54 | +#endif | |
| 55 | +#else /* end CONFIG_RUNTIME_CPU_DETECT */ | |
| 56 | +int mips_cpu_caps(void) { return 0; } | |
| 57 | +#endif | |
| @@ -42,6 +42,9 @@ PORTS_SRCS-$(VPX_ARCH_ARM) += arm.h · 41 unmodified lines | ||
| 42 | 42 | PORTS_SRCS-$(VPX_ARCH_PPC) += ppc_cpudetect.c |
| 43 | 43 | PORTS_SRCS-$(VPX_ARCH_PPC) += ppc.h |
| 44 | 44 | |
| 45 | +PORTS_SRCS-$(VPX_ARCH_MIPS) += mips_cpudetect.c | |
| 46 | +PORTS_SRCS-$(VPX_ARCH_MIPS) += mips.h | |
| 47 | + | |
| 45 | 48 | ifeq ($(VPX_ARCH_MIPS), yes) |
| 46 | 49 | PORTS_SRCS-yes += asmdefs_mmi.h |
| 47 | 50 | endif |