| @@ -43,6 +43,12 @@ DEFINE_GUID(NVIDIA_PPE_INTERFACE_GUID, · 42 unmodified lines |
| 43 | 0xc3, 0xc2, 0x53, 0x75, 0xe6, 0xf7); | 43 | 0xc3, 0xc2, 0x53, 0x75, 0xe6, 0xf7); |
| 44 | #endif | 44 | #endif |
| 45 | | 45 | |
| | 46 | #ifndef NVIDIA_TRUE_HDR_INTERFACE_GUID |
| | 47 | DEFINE_GUID(NVIDIA_TRUE_HDR_INTERFACE_GUID, |
| | 48 | 0xfdd62bb4, 0x620b, 0x4fd7, 0x9a, 0xb3, |
| | 49 | 0x1e, 0x59, 0xd0, 0xd5, 0x44, 0xb3); |
| | 50 | #endif |
| | 51 | |
| 46 | #ifndef INTEL_VPE_INTERFACE_GUID | 52 | #ifndef INTEL_VPE_INTERFACE_GUID |
| 47 | DEFINE_GUID(INTEL_VPE_INTERFACE_GUID, | 53 | DEFINE_GUID(INTEL_VPE_INTERFACE_GUID, |
| 48 | 0xedd1d4b9, 0x8659, 0x4cbc, 0xa4, 0xd6, | 54 | 0xedd1d4b9, 0x8659, 0x4cbc, 0xa4, 0xd6, |
| @@ -72,6 +78,7 @@ struct opts { · 23 unmodified lines |
| 72 | int mode; | 78 | int mode; |
| 73 | int field_parity; | 79 | int field_parity; |
| 74 | int format; | 80 | int format; |
| | 81 | bool nvidia_true_hdr; |
| 75 | }; | 82 | }; |
| 76 | | 83 | |
| 77 | struct priv { | 84 | struct priv { |
| @@ -142,6 +149,31 @@ static void enable_nvidia_rtx_extension(struct mp_filter *vf) · 64 unmodified lines |
| 142 | } | 149 | } |
| 143 | } | 150 | } |
| 144 | | 151 | |
| | 152 | static void enable_nvidia_true_hdr(struct mp_filter *vf) |
| | 153 | { |
| | 154 | struct priv *p = vf->priv; |
| | 155 | |
| | 156 | struct nvidia_ext { |
| | 157 | unsigned int version; |
| | 158 | unsigned int method; |
| | 159 | unsigned int enable : 1; |
| | 160 | unsigned int reserved : 31; |
| | 161 | } ext = {4, 3, 1}; |
| | 162 | |
| | 163 | HRESULT hr = ID3D11VideoContext_VideoProcessorSetStreamExtension(p->video_ctx, |
| | 164 | p->video_proc, |
| | 165 | 0, |
| | 166 | &NVIDIA_TRUE_HDR_INTERFACE_GUID, |
| | 167 | sizeof(ext), |
| | 168 | &ext); |
| | 169 | |
| | 170 | if (FAILED(hr)) { |
| | 171 | MP_WARN(vf, "Failed to enable NVIDIA RTX Video HDR: %s\n", mp_HRESULT_to_str(hr)); |
| | 172 | } else { |
| | 173 | MP_VERBOSE(vf, "NVIDIA RTX Video HDR enabled\n"); |
| | 174 | } |
| | 175 | } |
| | 176 | |
| 145 | static void enable_intel_vsr_extension(struct mp_filter *vf) | 177 | static void enable_intel_vsr_extension(struct mp_filter *vf) |
| 146 | { | 178 | { |
| 147 | struct priv *p = vf->priv; | 179 | struct priv *p = vf->priv; |
| @@ -289,6 +321,9 @@ create: · 141 unmodified lines |
| 289 | break; | 321 | break; |
| 290 | } | 322 | } |
| 291 | | 323 | |
| | 324 | if (p->opts->nvidia_true_hdr) |
| | 325 | enable_nvidia_true_hdr(vf); |
| | 326 | |
| 292 | return 0; | 327 | return 0; |
| 293 | fail: | 328 | fail: |
| 294 | destroy_video_proc(vf); | 329 | destroy_video_proc(vf); |
| @@ -468,7 +503,8 @@ static void vf_d3d11vpp_process(struct mp_filter *vf) · 173 unmodified lines |
| 468 | | 503 | |
| 469 | p->require_filtering = p->params.hw_subfmt != p->out_params.hw_subfmt || | 504 | p->require_filtering = p->params.hw_subfmt != p->out_params.hw_subfmt || |
| 470 | p->params.w != p->out_params.w || | 505 | p->params.w != p->out_params.w || |
| 471 | p->params.h != p->out_params.h; | 506 | p->params.h != p->out_params.h || |
| | 507 | p->opts->nvidia_true_hdr; |
| 472 | } | 508 | } |
| 473 | | 509 | |
| 474 | if (!mp_refqueue_can_output(p->queue)) | 510 | if (!mp_refqueue_can_output(p->queue)) |
| @@ -617,6 +653,7 @@ static const m_option_t vf_opts_fields[] = { · 142 unmodified lines |
| 617 | {"tff", MP_FIELD_PARITY_TFF}, | 653 | {"tff", MP_FIELD_PARITY_TFF}, |
| 618 | {"bff", MP_FIELD_PARITY_BFF}, | 654 | {"bff", MP_FIELD_PARITY_BFF}, |
| 619 | {"auto", MP_FIELD_PARITY_AUTO})}, | 655 | {"auto", MP_FIELD_PARITY_AUTO})}, |
| | 656 | {"nvidia-true-hdr", OPT_BOOL(nvidia_true_hdr)}, |
| 620 | {0} | 657 | {0} |
| 621 | }; | 658 | }; |
| 622 | | 659 | |