1. Add dct_mmi.c in codec/decoder/core/mips 2. Add vaa_mmi.c in codec/processing/src/mips 3. Add optimization functions in codec/common/src/mc.cpp
Showing the changes to codec/common/src/mc.cpp (1 of 14 files). Show all
Unified · Split
| @@ -43,6 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | #include "cpu_core.h" |
| 44 | 44 | #include "ls_defines.h" |
| 45 | 45 | #include "macros.h" |
| 46 | +#include "asmdefs_mmi.h" | |
| 46 | 47 | |
| 47 | 48 | namespace { |
| 48 | 49 | |
| @@ -1659,6 +1660,2541 @@ void PixelAvg_AArch64_neon (uint8_t* pDst, int32_t iDstStride, const uint8_t* pS · 1610 unmodified lines | ||
| 1659 | 1660 | } |
| 1660 | 1661 | #endif |
| 1661 | 1662 | |
| 1663 | +#if defined(HAVE_MMI) | |
| 1664 | +#define MMI_LOAD_8P(f0, f2, f4, r0) \ | |
| 1665 | + "gsldlc1 "#f0", 0x7("#r0") \n\t" \ | |
| 1666 | + "gsldrc1 "#f0", 0x0("#r0") \n\t" \ | |
| 1667 | + "punpckhbh "#f2", "#f0", "#f4" \n\t" \ | |
| 1668 | + "punpcklbh "#f0", "#f0", "#f4" \n\t" | |
| 1669 | + | |
| 1670 | +#define FILTER_HV_W4(f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, \ | |
| 1671 | + f20, f22, f24, f26, f28, f30, r0, r1, r2) \ | |
| 1672 | + "paddh "#f0", "#f0", "#f20" \n\t" \ | |
| 1673 | + "paddh "#f2", "#f2", "#f22" \n\t" \ | |
| 1674 | + "mov.d "#f28", "#f8" \n\t" \ | |
| 1675 | + "mov.d "#f30", "#f10" \n\t" \ | |
| 1676 | + "mov.d "#f24", "#f4" \n\t" \ | |
| 1677 | + "mov.d "#f26", "#f6" \n\t" \ | |
| 1678 | + "dmfc1 "#r2", "#f8" \n\t" \ | |
| 1679 | + "dli "#r1", 0x0010001000100010 \n\t" \ | |
| 1680 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1681 | + "paddh "#f0", "#f0", "#f8" \n\t" \ | |
| 1682 | + "paddh "#f2", "#f2", "#f8" \n\t" \ | |
| 1683 | + "paddh "#f28", "#f28", "#f12" \n\t" \ | |
| 1684 | + "paddh "#f30", "#f30", "#f14" \n\t" \ | |
| 1685 | + "paddh "#f24", "#f24", "#f16" \n\t" \ | |
| 1686 | + "paddh "#f26", "#f26", "#f18" \n\t" \ | |
| 1687 | + "dli "#r1", 0x2 \n\t" \ | |
| 1688 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1689 | + "psllh "#f28", "#f28", "#f8" \n\t" \ | |
| 1690 | + "psllh "#f30", "#f30", "#f8" \n\t" \ | |
| 1691 | + "psubh "#f28", "#f28", "#f24" \n\t" \ | |
| 1692 | + "psubh "#f30", "#f30", "#f26" \n\t" \ | |
| 1693 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1694 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1695 | + "psllh "#f28", "#f28", "#f8" \n\t" \ | |
| 1696 | + "psllh "#f30", "#f30", "#f8" \n\t" \ | |
| 1697 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1698 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1699 | + "dli "#r1", 0x5 \n\t" \ | |
| 1700 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1701 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1702 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1703 | + "xor "#f28", "#f28", "#f28" \n\t" \ | |
| 1704 | + "packushb "#f0", "#f0", "#f2" \n\t" \ | |
| 1705 | + "gsswlc1 "#f0", 0x3("#r0") \n\t" \ | |
| 1706 | + "gsswrc1 "#f0", 0x0("#r0") \n\t" \ | |
| 1707 | + "dmtc1 "#r2", "#f8" \n\t" | |
| 1708 | + | |
| 1709 | +#define FILTER_HV_W8(f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, \ | |
| 1710 | + f20, f22, f24, f26, f28, f30, r0, r1, r2) \ | |
| 1711 | + "paddh "#f0", "#f0", "#f20" \n\t" \ | |
| 1712 | + "paddh "#f2", "#f2", "#f22" \n\t" \ | |
| 1713 | + "mov.d "#f28", "#f8" \n\t" \ | |
| 1714 | + "mov.d "#f30", "#f10" \n\t" \ | |
| 1715 | + "mov.d "#f24", "#f4" \n\t" \ | |
| 1716 | + "mov.d "#f26", "#f6" \n\t" \ | |
| 1717 | + "dmfc1 "#r2", "#f8" \n\t" \ | |
| 1718 | + "dli "#r1", 0x0010001000100010 \n\t" \ | |
| 1719 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1720 | + "paddh "#f0", "#f0", "#f8" \n\t" \ | |
| 1721 | + "paddh "#f2", "#f2", "#f8" \n\t" \ | |
| 1722 | + "paddh "#f28", "#f28", "#f12" \n\t" \ | |
| 1723 | + "paddh "#f30", "#f30", "#f14" \n\t" \ | |
| 1724 | + "paddh "#f24", "#f24", "#f16" \n\t" \ | |
| 1725 | + "paddh "#f26", "#f26", "#f18" \n\t" \ | |
| 1726 | + "dli "#r1", 0x2 \n\t" \ | |
| 1727 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1728 | + "psllh "#f28", "#f28", "#f8" \n\t" \ | |
| 1729 | + "psllh "#f30", "#f30", "#f8" \n\t" \ | |
| 1730 | + "psubh "#f28", "#f28", "#f24" \n\t" \ | |
| 1731 | + "psubh "#f30", "#f30", "#f26" \n\t" \ | |
| 1732 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1733 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1734 | + "psllh "#f28", "#f28", "#f8" \n\t" \ | |
| 1735 | + "psllh "#f30", "#f30", "#f8" \n\t" \ | |
| 1736 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1737 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1738 | + "dli "#r1", 0x5 \n\t" \ | |
| 1739 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1740 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1741 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1742 | + "xor "#f28", "#f28", "#f28" \n\t" \ | |
| 1743 | + "packushb "#f0", "#f0", "#f2" \n\t" \ | |
| 1744 | + "gssdlc1 "#f0", 0x7("#r0") \n\t" \ | |
| 1745 | + "gssdrc1 "#f0", 0x0("#r0") \n\t" \ | |
| 1746 | + "dmtc1 "#r2", "#f8" \n\t" | |
| 1747 | + | |
| 1748 | +#define FILTER_VER_ALIGN(f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, \ | |
| 1749 | + f20, f22, f24, f26, f28, f30, r0, r1, r2, r3, r4) \ | |
| 1750 | + "paddh "#f0", "#f0", "#f20" \n\t" \ | |
| 1751 | + "paddh "#f2", "#f2", "#f22" \n\t" \ | |
| 1752 | + "mov.d "#f24", "#f4" \n\t" \ | |
| 1753 | + "mov.d "#f26", "#f6" \n\t" \ | |
| 1754 | + "mov.d "#f28", "#f8" \n\t" \ | |
| 1755 | + "mov.d "#f30", "#f10" \n\t" \ | |
| 1756 | + "dli "#r2", 0x2 \n\t" \ | |
| 1757 | + "paddh "#f24", "#f24", "#f16" \n\t" \ | |
| 1758 | + "paddh "#f26", "#f26", "#f18" \n\t" \ | |
| 1759 | + "dmfc1 "#r3", "#f8" \n\t" \ | |
| 1760 | + "paddh "#f28", "#f28", "#f12" \n\t" \ | |
| 1761 | + "paddh "#f30", "#f30", "#f14" \n\t" \ | |
| 1762 | + "dmtc1 "#r2", "#f8" \n\t" \ | |
| 1763 | + "psubh "#f0", "#f0", "#f24" \n\t" \ | |
| 1764 | + "psubh "#f2", "#f2", "#f26" \n\t" \ | |
| 1765 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1766 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1767 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1768 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1769 | + "psubh "#f0", "#f0", "#f24" \n\t" \ | |
| 1770 | + "psubh "#f2", "#f2", "#f26" \n\t" \ | |
| 1771 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1772 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1773 | + "dmtc1 "#r4", "#f8" \n\t" \ | |
| 1774 | + "paddh "#f28", "#f28", "#f0" \n\t" \ | |
| 1775 | + "paddh "#f30", "#f30", "#f2" \n\t" \ | |
| 1776 | + "dli "#r2", 0x6 \n\t" \ | |
| 1777 | + "paddh "#f28", "#f28", "#f8" \n\t" \ | |
| 1778 | + "paddh "#f30", "#f30", "#f8" \n\t" \ | |
| 1779 | + "dmtc1 "#r2", "#f8" \n\t" \ | |
| 1780 | + "psrah "#f28", "#f28", "#f8" \n\t" \ | |
| 1781 | + "psrah "#f30", "#f30", "#f8" \n\t" \ | |
| 1782 | + "packushb "#f28", "#f28", "#f30" \n\t" \ | |
| 1783 | + "gssdxc1 "#f28", 0x0("#r0", "#r1") \n\t" \ | |
| 1784 | + "dmtc1 "#r3", "#f8" \n\t" | |
| 1785 | + | |
| 1786 | +#define FILTER_VER_UNALIGN(f0, f2, f4, f6, f8, f10, f12, f14, f16, f18, \ | |
| 1787 | + f20, f22, f24, f26, f28, f30, r0, r1, r2, r3) \ | |
| 1788 | + "paddh "#f0", "#f0", "#f20" \n\t" \ | |
| 1789 | + "paddh "#f2", "#f2", "#f22" \n\t" \ | |
| 1790 | + "mov.d "#f24", "#f4" \n\t" \ | |
| 1791 | + "mov.d "#f26", "#f6" \n\t" \ | |
| 1792 | + "mov.d "#f28", "#f8" \n\t" \ | |
| 1793 | + "mov.d "#f30", "#f10" \n\t" \ | |
| 1794 | + "dli "#r1", 0x2 \n\t" \ | |
| 1795 | + "paddh "#f24", "#f24", "#f16" \n\t" \ | |
| 1796 | + "paddh "#f26", "#f26", "#f18" \n\t" \ | |
| 1797 | + "dmfc1 "#r2", "#f8" \n\t" \ | |
| 1798 | + "paddh "#f28", "#f28", "#f12" \n\t" \ | |
| 1799 | + "paddh "#f30", "#f30", "#f14" \n\t" \ | |
| 1800 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1801 | + "psubh "#f0", "#f0", "#f24" \n\t" \ | |
| 1802 | + "psubh "#f2", "#f2", "#f26" \n\t" \ | |
| 1803 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1804 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1805 | + "paddh "#f0", "#f0", "#f28" \n\t" \ | |
| 1806 | + "paddh "#f2", "#f2", "#f30" \n\t" \ | |
| 1807 | + "psubh "#f0", "#f0", "#f24" \n\t" \ | |
| 1808 | + "psubh "#f2", "#f2", "#f26" \n\t" \ | |
| 1809 | + "psrah "#f0", "#f0", "#f8" \n\t" \ | |
| 1810 | + "psrah "#f2", "#f2", "#f8" \n\t" \ | |
| 1811 | + "dmtc1 "#r3", "#f8" \n\t" \ | |
| 1812 | + "paddh "#f28", "#f28", "#f0" \n\t" \ | |
| 1813 | + "paddh "#f30", "#f30", "#f2" \n\t" \ | |
| 1814 | + "dli "#r1", 0x6 \n\t" \ | |
| 1815 | + "paddh "#f28", "#f28", "#f8" \n\t" \ | |
| 1816 | + "paddh "#f30", "#f30", "#f8" \n\t" \ | |
| 1817 | + "dmtc1 "#r1", "#f8" \n\t" \ | |
| 1818 | + "psrah "#f28", "#f28", "#f8" \n\t" \ | |
| 1819 | + "psrah "#f30", "#f30", "#f8" \n\t" \ | |
| 1820 | + "packushb "#f28", "#f28", "#f30" \n\t" \ | |
| 1821 | + "gssdlc1 "#f28", 0x7("#r0") \n\t" \ | |
| 1822 | + "gssdrc1 "#f28", 0x0("#r0") \n\t" \ | |
| 1823 | + "dmtc1 "#r2", "#f8" \n\t" | |
| 1824 | + | |
| 1825 | +void McHorVer20Width5_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 1826 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 1827 | + BACKUP_REG; | |
| 1828 | + __asm__ volatile ( | |
| 1829 | + ".set arch=loongson3a \n\t" | |
| 1830 | + "xor $f28, $f28, $f28 \n\t" | |
| 1831 | + PTR_ADDIU "%[pSrc], %[pSrc], -0x2 \n\t" | |
| 1832 | + "dli $8, 0x2 \n\t" | |
| 1833 | + "dli $10, 0x0010001000100010 \n\t" | |
| 1834 | + "dli $11, 0x5 \n\t" | |
| 1835 | + "1: \n\t" | |
| 1836 | + "xor $f28, $f28, $f28 \n\t" | |
| 1837 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 1838 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 1839 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 1840 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 1841 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 1842 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 1843 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 1844 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 1845 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 1846 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 1847 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 1848 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 1849 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 1850 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 1851 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 1852 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 1853 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 1854 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 1855 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 1856 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 1857 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 1858 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 1859 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 1860 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 1861 | + | |
| 1862 | + "mov.d $f28, $f8 \n\t" | |
| 1863 | + "mov.d $f30, $f10 \n\t" | |
| 1864 | + "paddh $f28, $f28, $f12 \n\t" | |
| 1865 | + "paddh $f30, $f30, $f14 \n\t" | |
| 1866 | + "mov.d $f24, $f16 \n\t" | |
| 1867 | + "mov.d $f26, $f18 \n\t" | |
| 1868 | + "paddh $f24, $f24, $f20 \n\t" | |
| 1869 | + "paddh $f26, $f26, $f22 \n\t" | |
| 1870 | + "dmfc1 $9, $f12 \n\t" | |
| 1871 | + "dmtc1 $8, $f12 \n\t" | |
| 1872 | + "psllh $f24, $f24, $f12 \n\t" | |
| 1873 | + "psllh $f26, $f26, $f12 \n\t" | |
| 1874 | + "psubh $f24, $f24, $f28 \n\t" | |
| 1875 | + "psubh $f26, $f26, $f30 \n\t" | |
| 1876 | + "paddh $f0, $f0, $f4 \n\t" | |
| 1877 | + "paddh $f2, $f2, $f6 \n\t" | |
| 1878 | + "paddh $f0, $f0, $f24 \n\t" | |
| 1879 | + "paddh $f2, $f2, $f26 \n\t" | |
| 1880 | + "psllh $f24, $f24, $f12 \n\t" | |
| 1881 | + "psllh $f26, $f26, $f12 \n\t" | |
| 1882 | + "paddh $f0, $f0, $f24 \n\t" | |
| 1883 | + "paddh $f2, $f2, $f26 \n\t" | |
| 1884 | + | |
| 1885 | + "dmtc1 $10, $f12 \n\t" | |
| 1886 | + "paddh $f0, $f0, $f12 \n\t" | |
| 1887 | + "paddh $f2, $f2, $f12 \n\t" | |
| 1888 | + "dmtc1 $11, $f12 \n\t" | |
| 1889 | + "psrah $f0, $f0, $f12 \n\t" | |
| 1890 | + "psrah $f2, $f2, $f12 \n\t" | |
| 1891 | + "packushb $f0, $f0, $f2 \n\t" | |
| 1892 | + | |
| 1893 | + "gsswlc1 $f0, 0x3(%[pDst]) \n\t" | |
| 1894 | + "gsswrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 1895 | + | |
| 1896 | + "gsldlc1 $f0, 0xd(%[pSrc]) \n\t" | |
| 1897 | + "xor $f28, $f28, $f28 \n\t" | |
| 1898 | + "gsldrc1 $f0, 0x6(%[pSrc]) \n\t" | |
| 1899 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 1900 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 1901 | + "dmtc1 $9, $f12 \n\t" | |
| 1902 | + "dmtc1 $8, $f24 \n\t" | |
| 1903 | + | |
| 1904 | + "paddh $f16, $f16, $f4 \n\t" | |
| 1905 | + "paddh $f18, $f18, $f6 \n\t" | |
| 1906 | + "paddh $f20, $f20, $f12 \n\t" | |
| 1907 | + "paddh $f22, $f22, $f14 \n\t" | |
| 1908 | + "psllh $f20, $f20, $f24 \n\t" | |
| 1909 | + "psllh $f22, $f22, $f24 \n\t" | |
| 1910 | + "psubh $f20, $f20, $f16 \n\t" | |
| 1911 | + "psubh $f22, $f22, $f18 \n\t" | |
| 1912 | + "paddh $f8, $f8, $f0 \n\t" | |
| 1913 | + "paddh $f10, $f10, $f2 \n\t" | |
| 1914 | + "paddh $f8, $f8, $f20 \n\t" | |
| 1915 | + "paddh $f10, $f10, $f22 \n\t" | |
| 1916 | + "psllh $f20, $f20, $f24 \n\t" | |
| 1917 | + "psllh $f22, $f22, $f24 \n\t" | |
| 1918 | + "paddh $f8, $f8, $f20 \n\t" | |
| 1919 | + "paddh $f10, $f10, $f22 \n\t" | |
| 1920 | + | |
| 1921 | + "dmtc1 $10, $f24 \n\t" | |
| 1922 | + "paddh $f8, $f8, $f24 \n\t" | |
| 1923 | + "paddh $f10, $f10, $f24 \n\t" | |
| 1924 | + "dmtc1 $11, $f24 \n\t" | |
| 1925 | + "psrah $f8, $f8, $f24 \n\t" | |
| 1926 | + "psrah $f10, $f10, $f24 \n\t" | |
| 1927 | + "packushb $f8, $f8, $f10 \n\t" | |
| 1928 | + "gsswlc1 $f8, 0x4(%[pDst]) \n\t" | |
| 1929 | + "gsswrc1 $f8, 0x1(%[pDst]) \n\t" | |
| 1930 | + | |
| 1931 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 1932 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 1933 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 1934 | + "bnez %[iHeight], 1b \n\t" | |
| 1935 | + : [pSrc]"+&r"((unsigned char *)pSrc), [pDst]"+&r"((unsigned char *)pDst), | |
| 1936 | + [iWidth]"+&r"((int)iWidth), [iHeight]"+&r"((int)iHeight) | |
| 1937 | + : [iSrcStride]"r"((int)iSrcStride), [iDstStride]"r"((int)iDstStride) | |
| 1938 | + : "memory", "$8", "$9", "$10", "$11", "$f0", "$f2", "$f4", "$f6", "$f8", | |
| 1939 | + "$f10", "$f12", "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", | |
| 1940 | + "$f28", "$f30" | |
| 1941 | + ); | |
| 1942 | + RECOVER_REG; | |
| 1943 | +} | |
| 1944 | + | |
| 1945 | +void McHorVer20Width9Or17_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 1946 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 1947 | + BACKUP_REG; | |
| 1948 | + __asm__ volatile ( | |
| 1949 | + ".set arch=loongson3a \n\t" | |
| 1950 | + PTR_ADDIU "%[pSrc], %[pSrc], -0x2 \n\t" | |
| 1951 | + "xor $f28, $f28, $f28 \n\t" | |
| 1952 | + "dli $8, 0x2 \n\t" | |
| 1953 | + "dli $9, 0x9 \n\t" | |
| 1954 | + "dli $10, 0x0010001000100010 \n\t" | |
| 1955 | + "dli $11, 0x5 \n\t" | |
| 1956 | + "bne %[iWidth], $9, 2f \n\t" | |
| 1957 | + "1: \n\t" | |
| 1958 | + "xor $f28, $f28, $f28 \n\t" | |
| 1959 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 1960 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 1961 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 1962 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 1963 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 1964 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 1965 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 1966 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 1967 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 1968 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 1969 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 1970 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 1971 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 1972 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 1973 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 1974 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 1975 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 1976 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 1977 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 1978 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 1979 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 1980 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 1981 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 1982 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 1983 | + | |
| 1984 | + "mov.d $f28, $f8 \n\t" | |
| 1985 | + "mov.d $f30, $f10 \n\t" | |
| 1986 | + "paddh $f28, $f28, $f12 \n\t" | |
| 1987 | + "paddh $f30, $f30, $f14 \n\t" | |
| 1988 | + "mov.d $f24, $f16 \n\t" | |
| 1989 | + "mov.d $f26, $f18 \n\t" | |
| 1990 | + "paddh $f24, $f24, $f20 \n\t" | |
| 1991 | + "paddh $f26, $f26, $f22 \n\t" | |
| 1992 | + "dmfc1 $9, $f12 \n\t" | |
| 1993 | + "dmtc1 $8, $f12 \n\t" | |
| 1994 | + "psllh $f24, $f24, $f12 \n\t" | |
| 1995 | + "psllh $f26, $f26, $f12 \n\t" | |
| 1996 | + "psubh $f24, $f24, $f28 \n\t" | |
| 1997 | + "psubh $f26, $f26, $f30 \n\t" | |
| 1998 | + "paddh $f0, $f0, $f4 \n\t" | |
| 1999 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2000 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2001 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2002 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2003 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2004 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2005 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2006 | + | |
| 2007 | + "dmtc1 $10, $f12 \n\t" | |
| 2008 | + "paddh $f0, $f0, $f12 \n\t" | |
| 2009 | + "paddh $f2, $f2, $f12 \n\t" | |
| 2010 | + "dmtc1 $11, $f12 \n\t" | |
| 2011 | + "psrah $f0, $f0, $f12 \n\t" | |
| 2012 | + "psrah $f2, $f2, $f12 \n\t" | |
| 2013 | + "packushb $f0, $f0, $f2 \n\t" | |
| 2014 | + | |
| 2015 | + "gsswlc1 $f0, 0x3(%[pDst]) \n\t" | |
| 2016 | + "gsswrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 2017 | + | |
| 2018 | + "gsldlc1 $f0, 0xd(%[pSrc]) \n\t" | |
| 2019 | + "xor $f28, $f28, $f28 \n\t" | |
| 2020 | + "gsldrc1 $f0, 0x6(%[pSrc]) \n\t" | |
| 2021 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2022 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2023 | + "dmtc1 $9, $f12 \n\t" | |
| 2024 | + "dmtc1 $8, $f24 \n\t" | |
| 2025 | + | |
| 2026 | + "paddh $f16, $f16, $f4 \n\t" | |
| 2027 | + "paddh $f18, $f18, $f6 \n\t" | |
| 2028 | + "paddh $f20, $f20, $f12 \n\t" | |
| 2029 | + "paddh $f22, $f22, $f14 \n\t" | |
| 2030 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2031 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2032 | + "psubh $f20, $f20, $f16 \n\t" | |
| 2033 | + "psubh $f22, $f22, $f18 \n\t" | |
| 2034 | + "paddh $f8, $f8, $f0 \n\t" | |
| 2035 | + "paddh $f10, $f10, $f2 \n\t" | |
| 2036 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2037 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2038 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2039 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2040 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2041 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2042 | + | |
| 2043 | + "dmtc1 $10, $f24 \n\t" | |
| 2044 | + "paddh $f8, $f8, $f24 \n\t" | |
| 2045 | + "paddh $f10, $f10, $f24 \n\t" | |
| 2046 | + "dmtc1 $11, $f24 \n\t" | |
| 2047 | + "psrah $f8, $f8, $f24 \n\t" | |
| 2048 | + "psrah $f10, $f10, $f24 \n\t" | |
| 2049 | + "packushb $f8, $f8, $f10 \n\t" | |
| 2050 | + "gssdlc1 $f8, 0x8(%[pDst]) \n\t" | |
| 2051 | + "gssdrc1 $f8, 0x1(%[pDst]) \n\t" | |
| 2052 | + | |
| 2053 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2054 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2055 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2056 | + "bnez %[iHeight], 1b \n\t" | |
| 2057 | + "j 3f \n\t" | |
| 2058 | + | |
| 2059 | + "2: \n\t" | |
| 2060 | + "xor $f28, $f28, $f28 \n\t" | |
| 2061 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 2062 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 2063 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 2064 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 2065 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 2066 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 2067 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 2068 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 2069 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 2070 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 2071 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 2072 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 2073 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2074 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 2075 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 2076 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 2077 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 2078 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 2079 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2080 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 2081 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 2082 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 2083 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 2084 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 2085 | + | |
| 2086 | + "dmtc1 $8, $f30 \n\t" | |
| 2087 | + "paddh $f8, $f8, $f12 \n\t" | |
| 2088 | + "paddh $f10, $f10, $f14 \n\t" | |
| 2089 | + "paddh $f16, $f16, $f20 \n\t" | |
| 2090 | + "paddh $f18, $f18, $f22 \n\t" | |
| 2091 | + "psllh $f16, $f16, $f30 \n\t" | |
| 2092 | + "psllh $f18, $f18, $f30 \n\t" | |
| 2093 | + "psubh $f16, $f16, $f8 \n\t" | |
| 2094 | + "psubh $f18, $f18, $f10 \n\t" | |
| 2095 | + "paddh $f0, $f0, $f4 \n\t" | |
| 2096 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2097 | + "paddh $f0, $f0, $f16 \n\t" | |
| 2098 | + "paddh $f2, $f2, $f18 \n\t" | |
| 2099 | + "psllh $f16, $f16, $f30 \n\t" | |
| 2100 | + "psllh $f18, $f18, $f30 \n\t" | |
| 2101 | + "paddh $f0, $f0, $f16 \n\t" | |
| 2102 | + "paddh $f2, $f2, $f18 \n\t" | |
| 2103 | + | |
| 2104 | + "dmtc1 $10, $f30 \n\t" | |
| 2105 | + "paddh $f0, $f0, $f30 \n\t" | |
| 2106 | + "paddh $f2, $f2, $f30 \n\t" | |
| 2107 | + "dmtc1 $11, $f30 \n\t" | |
| 2108 | + "psrah $f0, $f0, $f30 \n\t" | |
| 2109 | + "psrah $f2, $f2, $f30 \n\t" | |
| 2110 | + "packushb $f0, $f0, $f2 \n\t" | |
| 2111 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 2112 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 2113 | + | |
| 2114 | + "gsldlc1 $f0, 15(%[pSrc]) \n\t" | |
| 2115 | + "gsldlc1 $f4, 0x14(%[pSrc]) \n\t" | |
| 2116 | + "gsldlc1 $f8, 0x10(%[pSrc]) \n\t" | |
| 2117 | + "gsldlc1 $f12, 0x13(%[pSrc]) \n\t" | |
| 2118 | + "gsldlc1 $f16, 0x11(%[pSrc]) \n\t" | |
| 2119 | + "gsldlc1 $f20, 0x12(%[pSrc]) \n\t" | |
| 2120 | + "gsldrc1 $f0, 8(%[pSrc]) \n\t" | |
| 2121 | + "gsldrc1 $f4, 0xd(%[pSrc]) \n\t" | |
| 2122 | + "gsldrc1 $f8, 0x9(%[pSrc]) \n\t" | |
| 2123 | + "gsldrc1 $f12, 0xc(%[pSrc]) \n\t" | |
| 2124 | + "gsldrc1 $f16, 0xa(%[pSrc]) \n\t" | |
| 2125 | + "gsldrc1 $f20, 0xb(%[pSrc]) \n\t" | |
| 2126 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2127 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 2128 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 2129 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 2130 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 2131 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 2132 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2133 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 2134 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 2135 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 2136 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 2137 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 2138 | + | |
| 2139 | + "mov.d $f28, $f8 \n\t" | |
| 2140 | + "mov.d $f30, $f10 \n\t" | |
| 2141 | + "paddh $f28, $f28, $f12 \n\t" | |
| 2142 | + "paddh $f30, $f30, $f14 \n\t" | |
| 2143 | + "mov.d $f24, $f16 \n\t" | |
| 2144 | + "mov.d $f26, $f18 \n\t" | |
| 2145 | + "paddh $f24, $f24, $f20 \n\t" | |
| 2146 | + "paddh $f26, $f26, $f22 \n\t" | |
| 2147 | + "dmfc1 $9, $f12 \n\t" | |
| 2148 | + "dmtc1 $8, $f12 \n\t" | |
| 2149 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2150 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2151 | + "psubh $f24, $f24, $f28 \n\t" | |
| 2152 | + "psubh $f26, $f26, $f30 \n\t" | |
| 2153 | + "paddh $f0, $f0, $f4 \n\t" | |
| 2154 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2155 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2156 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2157 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2158 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2159 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2160 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2161 | + | |
| 2162 | + "dmtc1 $10, $f30 \n\t" | |
| 2163 | + "paddh $f0, $f0, $f30 \n\t" | |
| 2164 | + "paddh $f2, $f2, $f30 \n\t" | |
| 2165 | + "dmtc1 $11, $f30 \n\t" | |
| 2166 | + "psrah $f0, $f0, $f30 \n\t" | |
| 2167 | + "psrah $f2, $f2, $f30 \n\t" | |
| 2168 | + "packushb $f0, $f0, $f2 \n\t" | |
| 2169 | + "gsswlc1 $f0, 0xb(%[pDst]) \n\t" | |
| 2170 | + "gsswrc1 $f0, 0x8(%[pDst]) \n\t" | |
| 2171 | + | |
| 2172 | + "dmtc1 $9, $f12 \n\t" | |
| 2173 | + "xor $f28, $f28, $f28 \n\t" | |
| 2174 | + "dli $9, 0x20 \n\t" | |
| 2175 | + "gsldlc1 $f0, 0x15(%[pSrc]) \n\t" | |
| 2176 | + "dmtc1 $9, $f30 \n\t" | |
| 2177 | + "gsldrc1 $f0, 0xE(%[pSrc]) \n\t" | |
| 2178 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2179 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2180 | + "dmtc1 $8, $f24 \n\t" | |
| 2181 | + | |
| 2182 | + "paddh $f16, $f16, $f4 \n\t" | |
| 2183 | + "paddh $f18, $f18, $f6 \n\t" | |
| 2184 | + "paddh $f20, $f20, $f12 \n\t" | |
| 2185 | + "paddh $f22, $f22, $f14 \n\t" | |
| 2186 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2187 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2188 | + "psubh $f20, $f20, $f16 \n\t" | |
| 2189 | + "psubh $f22, $f22, $f18 \n\t" | |
| 2190 | + "paddh $f8, $f8, $f0 \n\t" | |
| 2191 | + "paddh $f10, $f10, $f2 \n\t" | |
| 2192 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2193 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2194 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2195 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2196 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2197 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2198 | + | |
| 2199 | + "dmtc1 $10, $f24 \n\t" | |
| 2200 | + "paddh $f8, $f8, $f24 \n\t" | |
| 2201 | + "paddh $f10, $f10, $f24 \n\t" | |
| 2202 | + "dmtc1 $11, $f24 \n\t" | |
| 2203 | + "psrah $f8, $f8, $f24 \n\t" | |
| 2204 | + "psrah $f10, $f10, $f24 \n\t" | |
| 2205 | + "packushb $f8, $f8, $f10 \n\t" | |
| 2206 | + "gssdlc1 $f8, 0x10(%[pDst]) \n\t" | |
| 2207 | + "gssdrc1 $f8, 0x9(%[pDst]) \n\t" | |
| 2208 | + | |
| 2209 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2210 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2211 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2212 | + "bnez %[iHeight], 2b \n\t" | |
| 2213 | + "3: \n\t" | |
| 2214 | + : [pSrc]"+&r"((unsigned char *)pSrc), [pDst]"+&r"((unsigned char *)pDst), | |
| 2215 | + [iWidth]"+&r"((int)iWidth), [iHeight]"+&r"((int)iHeight) | |
| 2216 | + : [iSrcStride]"r"((int)iSrcStride), [iDstStride]"r"((int)iDstStride) | |
| 2217 | + : "memory", "$8", "$9", "$10", "$11", "$f0", "$f2", "$f4", "$f6", "$f8", | |
| 2218 | + "$f10", "$f12", "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", | |
| 2219 | + "$f28", "$f30" | |
| 2220 | + ); | |
| 2221 | + RECOVER_REG; | |
| 2222 | +} | |
| 2223 | + | |
| 2224 | +//horizontal filter to gain half sample, that is (2, 0) location in quarter sample | |
| 2225 | +static inline void McHorVer20Width5Or9Or17_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 2226 | + uint8_t* pDst, int32_t iDstStride, | |
| 2227 | + int32_t iWidth, int32_t iHeight) { | |
| 2228 | + if (iWidth == 17 || iWidth == 9) | |
| 2229 | + McHorVer20Width9Or17_mmi(pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight); | |
| 2230 | + else //if (iWidth == 5) | |
| 2231 | + McHorVer20Width5_mmi(pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight); | |
| 2232 | +} | |
| 2233 | + | |
| 2234 | +void McHorVer02Height5_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 2235 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 2236 | + BACKUP_REG; | |
| 2237 | + __asm__ volatile ( | |
| 2238 | + ".set arch=loongson3a \n\t" | |
| 2239 | + "move $12, %[pSrc] \n\t" | |
| 2240 | + "move $13, %[pDst] \n\t" | |
| 2241 | + "move $14, %[iHeight] \n\t" | |
| 2242 | + | |
| 2243 | + "dsrl %[iWidth], %[iWidth], 0x2 \n\t" | |
| 2244 | + PTR_ADDU "$10, %[iSrcStride], %[iSrcStride] \n\t" | |
| 2245 | + PTR_SUBU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2246 | + | |
| 2247 | + "1: \n\t" | |
| 2248 | + "xor $f28, $f28, $f28 \n\t" | |
| 2249 | + MMI_LOAD_8P($f0, $f2, $f28, %[pSrc]) | |
| 2250 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2251 | + MMI_LOAD_8P($f4, $f6, $f28, $8) | |
| 2252 | + | |
| 2253 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2254 | + MMI_LOAD_8P($f8, $f10, $f28, %[pSrc]) | |
| 2255 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2256 | + MMI_LOAD_8P($f12, $f14, $f28, $8) | |
| 2257 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2258 | + MMI_LOAD_8P($f16, $f18, $f28, %[pSrc]) | |
| 2259 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2260 | + MMI_LOAD_8P($f20, $f22, $f28, $8) | |
| 2261 | + FILTER_HV_W4($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2262 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9) | |
| 2263 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2264 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2265 | + MMI_LOAD_8P($f24, $f26, $f28, %[pSrc]) | |
| 2266 | + "mov.d $f0, $f4 \n\t" | |
| 2267 | + "mov.d $f2, $f6 \n\t" | |
| 2268 | + "mov.d $f4, $f8 \n\t" | |
| 2269 | + "mov.d $f6, $f10 \n\t" | |
| 2270 | + "mov.d $f8, $f12 \n\t" | |
| 2271 | + "mov.d $f10, $f14 \n\t" | |
| 2272 | + "mov.d $f12, $f16 \n\t" | |
| 2273 | + "mov.d $f14, $f18 \n\t" | |
| 2274 | + "mov.d $f16, $f20 \n\t" | |
| 2275 | + "mov.d $f18, $f22 \n\t" | |
| 2276 | + "mov.d $f20, $f24 \n\t" | |
| 2277 | + "mov.d $f22, $f26 \n\t" | |
| 2278 | + | |
| 2279 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2280 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2281 | + | |
| 2282 | + "2: \n\t" | |
| 2283 | + FILTER_HV_W4($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2284 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9) | |
| 2285 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2286 | + "beqz %[iHeight], 3f \n\t" | |
| 2287 | + | |
| 2288 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2289 | + MMI_LOAD_8P($f24, $f26, $f28, %[pSrc]) | |
| 2290 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2291 | + FILTER_HV_W4($f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, | |
| 2292 | + $f26, $f28, $f30, $f0, $f2, %[pDst], $8, $9) | |
| 2293 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2294 | + "beqz %[iHeight], 3f \n\t" | |
| 2295 | + | |
| 2296 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2297 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2298 | + MMI_LOAD_8P($f28, $f30, $f0, $8) | |
| 2299 | + FILTER_HV_W4($f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, | |
| 2300 | + $f30, $f0, $f2, $f4, $f6, %[pDst], $8, $9) | |
| 2301 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2302 | + "beqz %[iHeight], 3f \n\t" | |
| 2303 | + | |
| 2304 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2305 | + MMI_LOAD_8P($f0, $f2, $f4, %[pSrc]) | |
| 2306 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2307 | + FILTER_HV_W4($f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, | |
| 2308 | + $f2, $f4, $f6, $f8, $f10, %[pDst], $8, $9) | |
| 2309 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2310 | + "beqz %[iHeight], 3f \n\t" | |
| 2311 | + | |
| 2312 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2313 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2314 | + MMI_LOAD_8P($f4, $f6, $f8, $8) | |
| 2315 | + FILTER_HV_W4($f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, | |
| 2316 | + $f8, $f10, $f12, $f14, %[pDst], $8, $9) | |
| 2317 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2318 | + "beqz %[iHeight], 3f \n\t" | |
| 2319 | + | |
| 2320 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2321 | + MMI_LOAD_8P($f8, $f10, $f12, %[pSrc]) | |
| 2322 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2323 | + FILTER_HV_W4($f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, | |
| 2324 | + $f12, $f14, $f16, $f18, %[pDst], $8, $9) | |
| 2325 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2326 | + "beqz %[iHeight], 3f \n\t" | |
| 2327 | + | |
| 2328 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2329 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2330 | + MMI_LOAD_8P($f12, $f14, $f16, $8) | |
| 2331 | + FILTER_HV_W4($f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, | |
| 2332 | + $f16, $f18, $f20, $f22, %[pDst], $8, $9) | |
| 2333 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2334 | + "beqz %[iHeight], 3f \n\t" | |
| 2335 | + | |
| 2336 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2337 | + MMI_LOAD_8P($f16, $f18, $f20, %[pSrc]) | |
| 2338 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2339 | + FILTER_HV_W4($f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, | |
| 2340 | + $f20, $f22, $f24, $f26, %[pDst], $8, $9) | |
| 2341 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2342 | + "beqz %[iHeight], 3f \n\t" | |
| 2343 | + | |
| 2344 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2345 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2346 | + MMI_LOAD_8P($f20, $f22, $f24, $8) | |
| 2347 | + "j 2b \n\t" | |
| 2348 | + | |
| 2349 | + "3: \n\t" | |
| 2350 | + PTR_ADDIU "%[iWidth], %[iWidth], -0x1 \n\t" | |
| 2351 | + "beqz %[iWidth], 4f \n\t" | |
| 2352 | + "move %[pSrc], $12 \n\t" | |
| 2353 | + "move %[pDst], $13 \n\t" | |
| 2354 | + "move %[iHeight], $14 \n\t" | |
| 2355 | + PTR_SUBU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2356 | + PTR_ADDIU "%[pSrc], %[pSrc], 0x4 \n\t" | |
| 2357 | + PTR_ADDIU "%[pDst], %[pDst], 0x4 \n\t" | |
| 2358 | + "j 1b \n\t" | |
| 2359 | + "4: \n\t" | |
| 2360 | + : [pSrc]"+&r"((unsigned char *)pSrc), [pDst]"+&r"((unsigned char *)pDst), | |
| 2361 | + [iWidth]"+&r"(iWidth), [iHeight]"+&r"(iHeight) | |
| 2362 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 2363 | + : "memory", "$8", "$9", "$10", "$12", "$13", "$14", "$f0", "$f2", "$f4", | |
| 2364 | + "$f6", "$f8", "$f10", "$f12", "$f14", "$f16", "$f18", "$f20", "$f22", | |
| 2365 | + "$f24", "$f26", "$f28", "$f30" | |
| 2366 | + ); | |
| 2367 | + RECOVER_REG; | |
| 2368 | +} | |
| 2369 | + | |
| 2370 | +void McHorVer02Height9Or17_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 2371 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 2372 | + BACKUP_REG; | |
| 2373 | + __asm__ volatile ( | |
| 2374 | + ".set arch=loongson3a \n\t" | |
| 2375 | + "move $12, %[pSrc] \n\t" | |
| 2376 | + "move $13, %[pDst] \n\t" | |
| 2377 | + "move $14, %[iHeight] \n\t" | |
| 2378 | + | |
| 2379 | + "dsrl %[iWidth], %[iWidth], 0x3 \n\t" | |
| 2380 | + PTR_ADDU "$10, %[iSrcStride], %[iSrcStride] \n\t" | |
| 2381 | + PTR_SUBU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2382 | + | |
| 2383 | + "1: \n\t" | |
| 2384 | + "dli $8, 0x20 \n\t" | |
| 2385 | + "xor $f28, $f28, $f28 \n\t" | |
| 2386 | + "dmtc1 $8, $f30 \n\t" | |
| 2387 | + | |
| 2388 | + MMI_LOAD_8P($f0, $f2, $f28, %[pSrc]) | |
| 2389 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2390 | + MMI_LOAD_8P($f4, $f6, $f28, $8) | |
| 2391 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2392 | + MMI_LOAD_8P($f8, $f10, $f28, %[pSrc]) | |
| 2393 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2394 | + MMI_LOAD_8P($f12, $f14, $f28, $8) | |
| 2395 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2396 | + MMI_LOAD_8P($f16, $f18, $f28, %[pSrc]) | |
| 2397 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2398 | + MMI_LOAD_8P($f20, $f22, $f28, $8) | |
| 2399 | + FILTER_HV_W8($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2400 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9) | |
| 2401 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2402 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2403 | + MMI_LOAD_8P($f24, $f26, $f28, %[pSrc]) | |
| 2404 | + "mov.d $f0, $f4 \n\t" | |
| 2405 | + "mov.d $f2, $f6 \n\t" | |
| 2406 | + "mov.d $f4, $f8 \n\t" | |
| 2407 | + "mov.d $f6, $f10 \n\t" | |
| 2408 | + "mov.d $f8, $f12 \n\t" | |
| 2409 | + "mov.d $f10, $f14 \n\t" | |
| 2410 | + "mov.d $f12, $f16 \n\t" | |
| 2411 | + "mov.d $f14, $f18 \n\t" | |
| 2412 | + "mov.d $f16, $f20 \n\t" | |
| 2413 | + "mov.d $f18, $f22 \n\t" | |
| 2414 | + "mov.d $f20, $f24 \n\t" | |
| 2415 | + "mov.d $f22, $f26 \n\t" | |
| 2416 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2417 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2418 | + | |
| 2419 | + "2: \n\t" | |
| 2420 | + FILTER_HV_W8($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2421 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9) | |
| 2422 | + "dmtc1 $9, $f8 \n\t" | |
| 2423 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2424 | + "beqz %[iHeight], 3f \n\t" | |
| 2425 | + | |
| 2426 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2427 | + MMI_LOAD_8P($f24, $f26, $f28, %[pSrc]) | |
| 2428 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2429 | + FILTER_HV_W8($f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, | |
| 2430 | + $f26, $f28, $f30, $f0, $f2, %[pDst], $8, $9) | |
| 2431 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2432 | + "beqz %[iHeight], 3f \n\t" | |
| 2433 | + | |
| 2434 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2435 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2436 | + MMI_LOAD_8P($f28, $f30, $f0, $8) | |
| 2437 | + FILTER_HV_W8($f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, | |
| 2438 | + $f30, $f0, $f2, $f4, $f6, %[pDst], $8, $9) | |
| 2439 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2440 | + "beqz %[iHeight], 3f \n\t" | |
| 2441 | + | |
| 2442 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2443 | + MMI_LOAD_8P($f0, $f2, $f4, %[pSrc]) | |
| 2444 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2445 | + FILTER_HV_W8($f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, | |
| 2446 | + $f2, $f4, $f6, $f8, $f10, %[pDst], $8, $9) | |
| 2447 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2448 | + "beqz %[iHeight], 3f \n\t" | |
| 2449 | + | |
| 2450 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2451 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2452 | + MMI_LOAD_8P($f4, $f6, $f8, $8) | |
| 2453 | + FILTER_HV_W8($f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, | |
| 2454 | + $f6, $f8, $f10, $f12, $f14, %[pDst], $8, $9) | |
| 2455 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2456 | + "beqz %[iHeight], 3f \n\t" | |
| 2457 | + | |
| 2458 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2459 | + MMI_LOAD_8P($f8, $f10, $f12, %[pSrc]) | |
| 2460 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2461 | + FILTER_HV_W8($f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, | |
| 2462 | + $f10, $f12, $f14, $f16, $f18, %[pDst], $8, $9) | |
| 2463 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2464 | + "beqz %[iHeight], 3f \n\t" | |
| 2465 | + | |
| 2466 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2467 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2468 | + MMI_LOAD_8P($f12, $f14, $f16, $8) | |
| 2469 | + FILTER_HV_W8($f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, | |
| 2470 | + $f14, $f16, $f18, $f20, $f22, %[pDst], $8, $9) | |
| 2471 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2472 | + "beqz %[iHeight], 3f \n\t" | |
| 2473 | + | |
| 2474 | + PTR_ADDU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2475 | + MMI_LOAD_8P($f16, $f18, $f20, %[pSrc]) | |
| 2476 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2477 | + FILTER_HV_W8($f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, | |
| 2478 | + $f18, $f20, $f22, $f24, $f26, %[pDst], $8, $9) | |
| 2479 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2480 | + "beqz %[iHeight], 3f \n\t" | |
| 2481 | + | |
| 2482 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2483 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 2484 | + MMI_LOAD_8P($f20, $f22, $f24, $8) | |
| 2485 | + "j 2b \n\t" | |
| 2486 | + | |
| 2487 | + "3: \n\t" | |
| 2488 | + PTR_ADDIU "%[iWidth], %[iWidth], -0x1 \n\t" | |
| 2489 | + "beqz %[iWidth], 4f \n\t" | |
| 2490 | + | |
| 2491 | + "move %[pSrc], $12 \n\t" | |
| 2492 | + "move %[pDst], $13 \n\t" | |
| 2493 | + "move %[iHeight], $14 \n\t" | |
| 2494 | + PTR_SUBU "%[pSrc], %[pSrc], $10 \n\t" | |
| 2495 | + PTR_ADDIU "%[pSrc], %[pSrc], 0x8 \n\t" | |
| 2496 | + PTR_ADDIU "%[pDst], %[pDst], 0x8 \n\t" | |
| 2497 | + "j 1b \n\t" | |
| 2498 | + "4: \n\t" | |
| 2499 | + : [pSrc]"+&r"((unsigned char *)pSrc), [pDst]"+&r"((unsigned char *)pDst), | |
| 2500 | + [iWidth]"+&r"(iWidth), [iHeight]"+&r"(iHeight) | |
| 2501 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 2502 | + : "memory", "$8", "$9", "$10", "$12", "$13", "$14", "$f0", "$f2", "$f4", | |
| 2503 | + "$f6", "$f8", "$f10", "$f12", "$f14", "$f16", "$f18", "$f20", "$f22", | |
| 2504 | + "$f24", "$f26", "$f28", "$f30" | |
| 2505 | + ); | |
| 2506 | + RECOVER_REG; | |
| 2507 | +} | |
| 2508 | + | |
| 2509 | +//vertical filter to gain half sample, that is (0, 2) location in quarter sample | |
| 2510 | +static inline void McHorVer02Height5Or9Or17_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 2511 | + uint8_t* pDst, int32_t iDstStride, | |
| 2512 | + int32_t iWidth, int32_t iHeight) { | |
| 2513 | + if (iWidth == 16 || iWidth == 8) | |
| 2514 | + McHorVer02Height9Or17_mmi(pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight ); | |
| 2515 | + else | |
| 2516 | + McHorVer02Height5_mmi (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight); | |
| 2517 | +} | |
| 2518 | + | |
| 2519 | +static inline void McHorVer22HorFirst_mmi(const uint8_t *pSrc, int32_t iSrcStride, | |
| 2520 | + uint8_t * pTap, int32_t iTapStride, | |
| 2521 | + int32_t iWidth, int32_t iHeight) { | |
| 2522 | + BACKUP_REG; | |
| 2523 | + __asm__ volatile ( | |
| 2524 | + ".set arch=loongson3a \n\t" | |
| 2525 | + "dli $8, 0x9 \n\t" | |
| 2526 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2527 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2528 | + "bne %[iWidth], $8, 2f \n\t" | |
| 2529 | + | |
| 2530 | + "1: \n\t" | |
| 2531 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 2532 | + "xor $f28, $f28, $f28 \n\t" | |
| 2533 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 2534 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2535 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 2536 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2537 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 2538 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 2539 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 2540 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 2541 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 2542 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 2543 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 2544 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 2545 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 2546 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 2547 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 2548 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 2549 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 2550 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 2551 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 2552 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 2553 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 2554 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 2555 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 2556 | + | |
| 2557 | + "mov.d $f28, $f8 \n\t" | |
| 2558 | + "mov.d $f30, $f10 \n\t" | |
| 2559 | + "paddh $f28, $f28, $f12 \n\t" | |
| 2560 | + "paddh $f30, $f30, $f14 \n\t" | |
| 2561 | + "mov.d $f24, $f16 \n\t" | |
| 2562 | + "mov.d $f26, $f18 \n\t" | |
| 2563 | + "paddh $f24, $f24, $f20 \n\t" | |
| 2564 | + "paddh $f26, $f26, $f22 \n\t" | |
| 2565 | + "dli $8, 0x2 \n\t" | |
| 2566 | + "dmfc1 $9, $f12 \n\t" | |
| 2567 | + "dmtc1 $8, $f12 \n\t" | |
| 2568 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2569 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2570 | + "psubh $f24, $f24, $f28 \n\t" | |
| 2571 | + "psubh $f26, $f26, $f30 \n\t" | |
| 2572 | + "paddh $f0, $f0, $f4 \n\t" | |
| 2573 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2574 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2575 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2576 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2577 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2578 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2579 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2580 | + "gsswlc1 $f0, 0x3(%[pTap]) \n\t" | |
| 2581 | + "gsswrc1 $f0, 0x0(%[pTap]) \n\t" | |
| 2582 | + | |
| 2583 | + "gsldlc1 $f0, 0xd(%[pSrc]) \n\t" | |
| 2584 | + "xor $f28, $f28, $f28 \n\t" | |
| 2585 | + "gsldrc1 $f0, 0x6(%[pSrc]) \n\t" | |
| 2586 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2587 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2588 | + "dli $8, 0x2 \n\t" | |
| 2589 | + "dmtc1 $9, $f12 \n\t" | |
| 2590 | + "dmtc1 $8, $f24 \n\t" | |
| 2591 | + | |
| 2592 | + "paddh $f16, $f16, $f4 \n\t" | |
| 2593 | + "paddh $f18, $f18, $f6 \n\t" | |
| 2594 | + "paddh $f20, $f20, $f12 \n\t" | |
| 2595 | + "paddh $f22, $f22, $f14 \n\t" | |
| 2596 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2597 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2598 | + "psubh $f20, $f20, $f16 \n\t" | |
| 2599 | + "psubh $f22, $f22, $f18 \n\t" | |
| 2600 | + "paddh $f8, $f8, $f0 \n\t" | |
| 2601 | + "paddh $f10, $f10, $f2 \n\t" | |
| 2602 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2603 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2604 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2605 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2606 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2607 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2608 | + "gssdlc1 $f8, 0x9(%[pTap]) \n\t" | |
| 2609 | + "gssdlc1 $f10, 0x11(%[pTap]) \n\t" | |
| 2610 | + "gssdrc1 $f8, 0x2(%[pTap]) \n\t" | |
| 2611 | + "gssdrc1 $f10, 0xa(%[pTap]) \n\t" | |
| 2612 | + | |
| 2613 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2614 | + PTR_ADDU "%[pTap], %[pTap], %[iTapStride] \n\t" | |
| 2615 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2616 | + "bnez %[iHeight], 1b \n\t" | |
| 2617 | + "j 3f \n\t" | |
| 2618 | + | |
| 2619 | + "2: \n\t" | |
| 2620 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 2621 | + "xor $f28, $f28, $f28 \n\t" | |
| 2622 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 2623 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2624 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 2625 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2626 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 2627 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 2628 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 2629 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 2630 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 2631 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 2632 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 2633 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 2634 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 2635 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 2636 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 2637 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 2638 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 2639 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 2640 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 2641 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 2642 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 2643 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 2644 | + "dli $8, 0x2 \n\t" | |
| 2645 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 2646 | + | |
| 2647 | + "dmtc1 $8, $f30 \n\t" | |
| 2648 | + "paddh $f8, $f8, $f12 \n\t" | |
| 2649 | + "paddh $f10, $f10, $f14 \n\t" | |
| 2650 | + "paddh $f16, $f16, $f20 \n\t" | |
| 2651 | + "paddh $f18, $f18, $f22 \n\t" | |
| 2652 | + "psllh $f16, $f16, $f30 \n\t" | |
| 2653 | + "psllh $f18, $f18, $f30 \n\t" | |
| 2654 | + "psubh $f16, $f16, $f8 \n\t" | |
| 2655 | + "psubh $f18, $f18, $f10 \n\t" | |
| 2656 | + "paddh $f0, $f0, $f4 \n\t" | |
| 2657 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2658 | + "paddh $f0, $f0, $f16 \n\t" | |
| 2659 | + "paddh $f2, $f2, $f18 \n\t" | |
| 2660 | + "psllh $f16, $f16, $f30 \n\t" | |
| 2661 | + "psllh $f18, $f18, $f30 \n\t" | |
| 2662 | + "paddh $f0, $f0, $f16 \n\t" | |
| 2663 | + "paddh $f2, $f2, $f18 \n\t" | |
| 2664 | + "gssqc1 $f2, $f0, 0x0(%[pTap]) \n\t" | |
| 2665 | + | |
| 2666 | + "gsldlc1 $f0, 15(%[pSrc]) \n\t" | |
| 2667 | + "gsldrc1 $f0, 8(%[pSrc]) \n\t" | |
| 2668 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2669 | + "gsldlc1 $f4, 0x14(%[pSrc]) \n\t" | |
| 2670 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2671 | + "gsldrc1 $f4, 0xd(%[pSrc]) \n\t" | |
| 2672 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 2673 | + "gsldlc1 $f8, 0x10(%[pSrc]) \n\t" | |
| 2674 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 2675 | + "gsldrc1 $f8, 0x9(%[pSrc]) \n\t" | |
| 2676 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 2677 | + "gsldlc1 $f12, 0x13(%[pSrc]) \n\t" | |
| 2678 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 2679 | + "gsldrc1 $f12, 0xc(%[pSrc]) \n\t" | |
| 2680 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 2681 | + "gsldlc1 $f16, 0x11(%[pSrc]) \n\t" | |
| 2682 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 2683 | + "gsldrc1 $f16, 0xa(%[pSrc]) \n\t" | |
| 2684 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 2685 | + "gsldlc1 $f20, 0x12(%[pSrc]) \n\t" | |
| 2686 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 2687 | + "gsldrc1 $f20, 0xb(%[pSrc]) \n\t" | |
| 2688 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 2689 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 2690 | + | |
| 2691 | + "mov.d $f28, $f8 \n\t" | |
| 2692 | + "mov.d $f30, $f10 \n\t" | |
| 2693 | + "paddh $f28, $f28, $f12 \n\t" | |
| 2694 | + "paddh $f30, $f30, $f14 \n\t" | |
| 2695 | + "mov.d $f24, $f16 \n\t" | |
| 2696 | + "mov.d $f26, $f18 \n\t" | |
| 2697 | + "dli $8, 0x2 \n\t" | |
| 2698 | + "paddh $f24, $f24, $f20 \n\t" | |
| 2699 | + "paddh $f26, $f26, $f22 \n\t" | |
| 2700 | + "dmfc1 $9, $f12 \n\t" | |
| 2701 | + "dmtc1 $8, $f12 \n\t" | |
| 2702 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2703 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2704 | + "psubh $f24, $f24, $f28 \n\t" | |
| 2705 | + "psubh $f26, $f26, $f30 \n\t" | |
| 2706 | + "paddh $f0, $f0, $f4 \n\t" | |
| 2707 | + "paddh $f2, $f2, $f6 \n\t" | |
| 2708 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2709 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2710 | + "psllh $f24, $f24, $f12 \n\t" | |
| 2711 | + "psllh $f26, $f26, $f12 \n\t" | |
| 2712 | + "paddh $f0, $f0, $f24 \n\t" | |
| 2713 | + "paddh $f2, $f2, $f26 \n\t" | |
| 2714 | + "gsswlc1 $f0, 0x13(%[pTap]) \n\t" | |
| 2715 | + "gsswrc1 $f0, 0x10(%[pTap]) \n\t" | |
| 2716 | + | |
| 2717 | + "gsldlc1 $f0, 0x15(%[pSrc]) \n\t" | |
| 2718 | + "xor $f28, $f28, $f28 \n\t" | |
| 2719 | + "gsldrc1 $f0, 0xE(%[pSrc]) \n\t" | |
| 2720 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 2721 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 2722 | + "dli $8, 0x2 \n\t" | |
| 2723 | + "dmtc1 $9, $f12 \n\t" | |
| 2724 | + "dmtc1 $8, $f24 \n\t" | |
| 2725 | + | |
| 2726 | + "paddh $f16, $f16, $f4 \n\t" | |
| 2727 | + "paddh $f18, $f18, $f6 \n\t" | |
| 2728 | + "paddh $f20, $f20, $f12 \n\t" | |
| 2729 | + "paddh $f22, $f22, $f14 \n\t" | |
| 2730 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2731 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2732 | + "psubh $f20, $f20, $f16 \n\t" | |
| 2733 | + "psubh $f22, $f22, $f18 \n\t" | |
| 2734 | + "paddh $f8, $f8, $f0 \n\t" | |
| 2735 | + "paddh $f10, $f10, $f2 \n\t" | |
| 2736 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2737 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2738 | + "psllh $f20, $f20, $f24 \n\t" | |
| 2739 | + "psllh $f22, $f22, $f24 \n\t" | |
| 2740 | + "paddh $f8, $f8, $f20 \n\t" | |
| 2741 | + "paddh $f10, $f10, $f22 \n\t" | |
| 2742 | + "gssdlc1 $f8, 0x19(%[pTap]) \n\t" | |
| 2743 | + "gssdlc1 $f10, 0x21(%[pTap]) \n\t" | |
| 2744 | + "gssdrc1 $f8, 0x12(%[pTap]) \n\t" | |
| 2745 | + "gssdrc1 $f10, 0x1a(%[pTap]) \n\t" | |
| 2746 | + | |
| 2747 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 2748 | + PTR_ADDU "%[pTap], %[pTap], %[iTapStride] \n\t" | |
| 2749 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2750 | + "bnez %[iHeight], 2b \n\t" | |
| 2751 | + "3: \n\t" | |
| 2752 | + : [pSrc]"+&r"(pSrc), [pTap]"+&r"(pTap), [iWidth]"+&r"(iWidth), | |
| 2753 | + [iHeight]"+&r"(iHeight) | |
| 2754 | + : [iSrcStride]"r"(iSrcStride), [iTapStride]"r"(iTapStride) | |
| 2755 | + : "memory", "$8", "$9", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 2756 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 2757 | + ); | |
| 2758 | + RECOVER_REG; | |
| 2759 | +} | |
| 2760 | + | |
| 2761 | +static inline void McHorVer22Width8VerLastAlign_mmi(const uint8_t *pTap, | |
| 2762 | + int32_t iTapStride, uint8_t * pDst, int32_t iDstStride, | |
| 2763 | + int32_t iWidth, int32_t iHeight) { | |
| 2764 | + BACKUP_REG; | |
| 2765 | + __asm__ volatile ( | |
| 2766 | + ".set arch=loongson3a \n\t" | |
| 2767 | + "move $10, %[pTap] \n\t" | |
| 2768 | + "move $11, %[pDst] \n\t" | |
| 2769 | + "move $12, %[iHeight] \n\t" | |
| 2770 | + "dsrl %[iWidth], 0x3 \n\t" | |
| 2771 | + PTR_ADDU "$13, %[iTapStride], %[iTapStride] \n\t" | |
| 2772 | + PTR_ADDU "$14, %[iDstStride], %[iDstStride] \n\t" | |
| 2773 | + "dli $15, 0x0020002000200020 \n\t" | |
| 2774 | + | |
| 2775 | + "4: \n\t" | |
| 2776 | + "gslqc1 $f2, $f0, 0x0(%[pTap]) \n\t" | |
| 2777 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2778 | + "gslqc1 $f6, $f4, 0x0($8) \n\t" | |
| 2779 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2780 | + "gslqc1 $f10, $f8, 0x0(%[pTap]) \n\t" | |
| 2781 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2782 | + "gslqc1 $f14, $f12, 0x0($8) \n\t" | |
| 2783 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2784 | + "gslqc1 $f18, $f16, 0x0(%[pTap]) \n\t" | |
| 2785 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2786 | + "gslqc1 $f22, $f20, 0x0($8) \n\t" | |
| 2787 | + | |
| 2788 | + FILTER_VER_ALIGN($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2789 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $0, $8, $9, $15) | |
| 2790 | + | |
| 2791 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2792 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2793 | + "gslqc1 $f26, $f24, 0x0(%[pTap]) \n\t" | |
| 2794 | + "mov.d $f0, $f4 \n\t" | |
| 2795 | + "mov.d $f2, $f6 \n\t" | |
| 2796 | + "mov.d $f4, $f8 \n\t" | |
| 2797 | + "mov.d $f6, $f10 \n\t" | |
| 2798 | + "mov.d $f8, $f12 \n\t" | |
| 2799 | + "mov.d $f10, $f14 \n\t" | |
| 2800 | + "mov.d $f12, $f16 \n\t" | |
| 2801 | + "mov.d $f14, $f18 \n\t" | |
| 2802 | + "mov.d $f16, $f20 \n\t" | |
| 2803 | + "mov.d $f18, $f22 \n\t" | |
| 2804 | + "mov.d $f20, $f24 \n\t" | |
| 2805 | + "mov.d $f22, $f26 \n\t" | |
| 2806 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2807 | + PTR_SUBU "%[pTap], %[pTap], %[iTapStride] \n\t" | |
| 2808 | + | |
| 2809 | + "5: \n\t" | |
| 2810 | + FILTER_VER_ALIGN($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 2811 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $0, $8, $9, $15) | |
| 2812 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2813 | + "beqz %[iHeight], 6f \n\t" | |
| 2814 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2815 | + "gslqc1 $f26, $f24, 0x0(%[pTap]) \n\t" | |
| 2816 | + | |
| 2817 | + FILTER_VER_ALIGN($f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, | |
| 2818 | + $f26, $f28, $f30, $f0, $f2, %[pDst], %[iDstStride], $8, $9, $15) | |
| 2819 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2820 | + "beqz %[iHeight], 6f \n\t" | |
| 2821 | + PTR_ADDU "%[pDst], %[pDst], $14 \n\t" | |
| 2822 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2823 | + "gslqc1 $f30, $f28, 0x0($8) \n\t" | |
| 2824 | + | |
| 2825 | + FILTER_VER_ALIGN($f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, | |
| 2826 | + $f30, $f0, $f2, $f4, $f6, %[pDst], $0, $8, $9, $15) | |
| 2827 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2828 | + "beqz %[iHeight], 6f \n\t" | |
| 2829 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2830 | + "gslqc1 $f2, $f0, 0x0(%[pTap]) \n\t" | |
| 2831 | + | |
| 2832 | + FILTER_VER_ALIGN($f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, | |
| 2833 | + $f2, $f4, $f6, $f8, $f10, %[pDst], %[iDstStride], $8, $9, $15) | |
| 2834 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2835 | + "beqz %[iHeight], 6f \n\t" | |
| 2836 | + PTR_ADDU "%[pDst], %[pDst], $14 \n\t" | |
| 2837 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2838 | + "gslqc1 $f6, $f4, 0x0($8) \n\t" | |
| 2839 | + | |
| 2840 | + FILTER_VER_ALIGN($f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, | |
| 2841 | + $f6, $f8, $f10, $f12, $f14, %[pDst], $0, $8, $9, $15) | |
| 2842 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2843 | + "beqz %[iHeight], 6f \n\t" | |
| 2844 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2845 | + "gslqc1 $f10, $f8, 0x0(%[pTap]) \n\t" | |
| 2846 | + | |
| 2847 | + FILTER_VER_ALIGN($f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, | |
| 2848 | + $f10, $f12, $f14, $f16, $f18, %[pDst], %[iDstStride], $8, $9, $15) | |
| 2849 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2850 | + "beqz %[iHeight], 6f \n\t" | |
| 2851 | + PTR_ADDU "%[pDst], %[pDst], $14 \n\t" | |
| 2852 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2853 | + "gslqc1 $f14, $f12, 0x0($8) \n\t" | |
| 2854 | + | |
| 2855 | + FILTER_VER_ALIGN($f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, | |
| 2856 | + $f14, $f16, $f18, $f20, $f22, %[pDst], $0, $8, $9, $15) | |
| 2857 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2858 | + "beqz %[iHeight], 6f \n\t" | |
| 2859 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2860 | + "gslqc1 $f18, $f16, 0x0(%[pTap]) \n\t" | |
| 2861 | + | |
| 2862 | + FILTER_VER_ALIGN($f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, | |
| 2863 | + $f18, $f20, $f22, $f24, $f26, %[pDst], %[iDstStride], $8, $9, $15) | |
| 2864 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2865 | + "beqz %[iHeight], 6f \n\t" | |
| 2866 | + PTR_ADDU "%[pDst], %[pDst], $14 \n\t" | |
| 2867 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2868 | + "gslqc1 $f22, $f20, 0x0($8) \n\t" | |
| 2869 | + "j 5b \n\t" | |
| 2870 | + | |
| 2871 | + "6: \n\t" | |
| 2872 | + PTR_ADDIU "%[iWidth], %[iWidth], -0x1 \n\t" | |
| 2873 | + "beqz %[iWidth], 7f \n\t" | |
| 2874 | + "move %[pTap], $10 \n\t" | |
| 2875 | + "move %[pDst], $11 \n\t" | |
| 2876 | + "move %[iHeight], $12 \n\t" | |
| 2877 | + PTR_ADDIU "%[pTap], %[pTap], 0x10 \n\t" | |
| 2878 | + PTR_ADDIU "%[pDst], %[pDst], 0x8 \n\t" | |
| 2879 | + "j 4b \n\t" | |
| 2880 | + "7: \n\t" | |
| 2881 | + : [pTap]"+&r"((unsigned char *)pTap), [pDst]"+&r"((unsigned char *)pDst), | |
| 2882 | + [iWidth]"+&r"((int)iWidth), [iHeight]"+&r"((int)iHeight) | |
| 2883 | + : [iTapStride]"r"((int)iTapStride), [iDstStride]"r"((int)iDstStride) | |
| 2884 | + : "memory", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$f0", | |
| 2885 | + "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", "$f14", "$f16", "$f18", | |
| 2886 | + "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 2887 | + ); | |
| 2888 | + RECOVER_REG; | |
| 2889 | +} | |
| 2890 | + | |
| 2891 | +static inline void McHorVer22Width8VerLastUnAlign_mmi(const uint8_t *pTap, | |
| 2892 | + int32_t iTapStride, uint8_t * pDst, int32_t iDstStride, | |
| 2893 | + int32_t iWidth, int32_t iHeight) { | |
| 2894 | + BACKUP_REG; | |
| 2895 | + __asm__ volatile ( | |
| 2896 | + ".set arch=loongson3a \n\t" | |
| 2897 | + "move $10, %[pTap] \n\t" | |
| 2898 | + "move $11, %[pDst] \n\t" | |
| 2899 | + "move $12, %[iHeight] \n\t" | |
| 2900 | + "dsrl %[iWidth], 0x3 \n\t" | |
| 2901 | + PTR_ADDU "$13, %[iTapStride], %[iTapStride] \n\t" | |
| 2902 | + "dli $14, 0x0020002000200020 \n\t" | |
| 2903 | + | |
| 2904 | + "4: \n\t" | |
| 2905 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2906 | + "gsldlc1 $f0, 0x7(%[pTap]) \n\t" | |
| 2907 | + "gsldlc1 $f2, 0xF(%[pTap]) \n\t" | |
| 2908 | + "gsldlc1 $f4, 0x7($8) \n\t" | |
| 2909 | + "gsldlc1 $f6, 0xF($8) \n\t" | |
| 2910 | + "gsldrc1 $f0, 0x0(%[pTap]) \n\t" | |
| 2911 | + "gsldrc1 $f2, 0x8(%[pTap]) \n\t" | |
| 2912 | + "gsldrc1 $f4, 0x0($8) \n\t" | |
| 2913 | + "gsldrc1 $f6, 0x8($8) \n\t" | |
| 2914 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2915 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2916 | + "gsldlc1 $f8, 0x7(%[pTap]) \n\t" | |
| 2917 | + "gsldlc1 $f10, 0xF(%[pTap]) \n\t" | |
| 2918 | + "gsldlc1 $f12, 0x7($8) \n\t" | |
| 2919 | + "gsldlc1 $f14, 0xF($8) \n\t" | |
| 2920 | + "gsldrc1 $f8, 0x0(%[pTap]) \n\t" | |
| 2921 | + "gsldrc1 $f10, 0x8(%[pTap]) \n\t" | |
| 2922 | + "gsldrc1 $f12, 0x0($8) \n\t" | |
| 2923 | + "gsldrc1 $f14, 0x8($8) \n\t" | |
| 2924 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2925 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2926 | + "gsldlc1 $f16, 0x7(%[pTap]) \n\t" | |
| 2927 | + "gsldlc1 $f18, 0xF(%[pTap]) \n\t" | |
| 2928 | + "gsldlc1 $f20, 0x7($8) \n\t" | |
| 2929 | + "gsldlc1 $f22, 0xF($8) \n\t" | |
| 2930 | + "gsldrc1 $f16, 0x0(%[pTap]) \n\t" | |
| 2931 | + "gsldrc1 $f18, 0x8(%[pTap]) \n\t" | |
| 2932 | + "gsldrc1 $f20, 0x0($8) \n\t" | |
| 2933 | + "gsldrc1 $f22, 0x8($8) \n\t" | |
| 2934 | + | |
| 2935 | + FILTER_VER_UNALIGN($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, | |
| 2936 | + $f20, $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9, $14) | |
| 2937 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2938 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2939 | + "gsldlc1 $f24, 0x7(%[pTap]) \n\t" | |
| 2940 | + "gsldlc1 $f26, 0xF(%[pTap]) \n\t" | |
| 2941 | + "gsldrc1 $f24, 0x0(%[pTap]) \n\t" | |
| 2942 | + "gsldrc1 $f26, 0x8(%[pTap]) \n\t" | |
| 2943 | + "mov.d $f0, $f4 \n\t" | |
| 2944 | + "mov.d $f2, $f6 \n\t" | |
| 2945 | + "mov.d $f4, $f8 \n\t" | |
| 2946 | + "mov.d $f6, $f10 \n\t" | |
| 2947 | + "mov.d $f8, $f12 \n\t" | |
| 2948 | + "mov.d $f10, $f14 \n\t" | |
| 2949 | + "mov.d $f12, $f16 \n\t" | |
| 2950 | + "mov.d $f14, $f18 \n\t" | |
| 2951 | + "mov.d $f16, $f20 \n\t" | |
| 2952 | + "mov.d $f18, $f22 \n\t" | |
| 2953 | + "mov.d $f20, $f24 \n\t" | |
| 2954 | + "mov.d $f22, $f26 \n\t" | |
| 2955 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2956 | + PTR_SUBU "%[pTap], %[pTap], %[iTapStride] \n\t" | |
| 2957 | + | |
| 2958 | + "5: \n\t" | |
| 2959 | + FILTER_VER_UNALIGN($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, | |
| 2960 | + $f20, $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9, $14) | |
| 2961 | + | |
| 2962 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2963 | + "beqz %[iHeight], 6f \n\t" | |
| 2964 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2965 | + "gsldlc1 $f24, 0x7(%[pTap]) \n\t" | |
| 2966 | + "gsldlc1 $f26, 0xF(%[pTap]) \n\t" | |
| 2967 | + "gsldrc1 $f24, 0x0(%[pTap]) \n\t" | |
| 2968 | + "gsldrc1 $f26, 0x8(%[pTap]) \n\t" | |
| 2969 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2970 | + | |
| 2971 | + FILTER_VER_UNALIGN($f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, | |
| 2972 | + $f24, $f26, $f28, $f30, $f0, $f2, %[pDst], $8, $9, $14) | |
| 2973 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2974 | + "beqz %[iHeight], 6f \n\t" | |
| 2975 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2976 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2977 | + "gsldlc1 $f28, 0x7($8) \n\t" | |
| 2978 | + "gsldlc1 $f30, 0xF($8) \n\t" | |
| 2979 | + "gsldrc1 $f28, 0x0($8) \n\t" | |
| 2980 | + "gsldrc1 $f30, 0x8($8) \n\t" | |
| 2981 | + | |
| 2982 | + FILTER_VER_UNALIGN($f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, | |
| 2983 | + $f28, $f30, $f0, $f2, $f4, $f6, %[pDst], $8, $9, $14) | |
| 2984 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2985 | + "beqz %[iHeight], 6f \n\t" | |
| 2986 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 2987 | + "gsldlc1 $f0, 0x7(%[pTap]) \n\t" | |
| 2988 | + "gsldlc1 $f2, 0xF(%[pTap]) \n\t" | |
| 2989 | + "gsldrc1 $f0, 0x0(%[pTap]) \n\t" | |
| 2990 | + "gsldrc1 $f2, 0x8(%[pTap]) \n\t" | |
| 2991 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2992 | + | |
| 2993 | + FILTER_VER_UNALIGN($f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, | |
| 2994 | + $f30, $f0, $f2, $f4, $f6, $f8, $f10, %[pDst], $8, $9, $14) | |
| 2995 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 2996 | + "beqz %[iHeight], 6f \n\t" | |
| 2997 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 2998 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 2999 | + "gsldlc1 $f4, 0x7($8) \n\t" | |
| 3000 | + "gsldlc1 $f6, 0xF($8) \n\t" | |
| 3001 | + "gsldrc1 $f4, 0x0($8) \n\t" | |
| 3002 | + "gsldrc1 $f6, 0x8($8) \n\t" | |
| 3003 | + | |
| 3004 | + FILTER_VER_UNALIGN($f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, | |
| 3005 | + $f4, $f6, $f8, $f10, $f12, $f14, %[pDst], $8, $9, $14) | |
| 3006 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3007 | + "beqz %[iHeight], 6f \n\t" | |
| 3008 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 3009 | + "gsldlc1 $f8, 0x7(%[pTap]) \n\t" | |
| 3010 | + "gsldlc1 $f10, 0xF(%[pTap]) \n\t" | |
| 3011 | + "gsldrc1 $f8, 0x0(%[pTap]) \n\t" | |
| 3012 | + "gsldrc1 $f10, 0x8(%[pTap]) \n\t" | |
| 3013 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3014 | + | |
| 3015 | + FILTER_VER_UNALIGN($f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, | |
| 3016 | + $f8, $f10, $f12, $f14, $f16, $f18, %[pDst], $8, $9, $14) | |
| 3017 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3018 | + "beqz %[iHeight], 6f \n\t" | |
| 3019 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3020 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 3021 | + "gsldlc1 $f12, 0x7($8) \n\t" | |
| 3022 | + "gsldlc1 $f14, 0xF($8) \n\t" | |
| 3023 | + "gsldrc1 $f12, 0x0($8) \n\t" | |
| 3024 | + "gsldrc1 $f14, 0x8($8) \n\t" | |
| 3025 | + | |
| 3026 | + FILTER_VER_UNALIGN($f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, | |
| 3027 | + $f12, $f14, $f16, $f18, $f20, $f22, %[pDst], $8, $9, $14) | |
| 3028 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3029 | + "beqz %[iHeight], 6f \n\t" | |
| 3030 | + PTR_ADDU "%[pTap], %[pTap], $13 \n\t" | |
| 3031 | + "gsldlc1 $f16, 0x7(%[pTap]) \n\t" | |
| 3032 | + "gsldlc1 $f18, 0xF(%[pTap]) \n\t" | |
| 3033 | + "gsldrc1 $f16, 0x0(%[pTap]) \n\t" | |
| 3034 | + "gsldrc1 $f18, 0x8(%[pTap]) \n\t" | |
| 3035 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3036 | + | |
| 3037 | + FILTER_VER_UNALIGN($f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, | |
| 3038 | + $f16, $f18, $f20, $f22, $f24, $f26, %[pDst], $8, $9, $14) | |
| 3039 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3040 | + "beqz %[iHeight], 6f \n\t" | |
| 3041 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3042 | + PTR_ADDU "$8, %[pTap], %[iTapStride] \n\t" | |
| 3043 | + "gsldlc1 $f20, 0x7($8) \n\t" | |
| 3044 | + "gsldlc1 $f22, 0xF($8) \n\t" | |
| 3045 | + "gsldrc1 $f20, 0x0($8) \n\t" | |
| 3046 | + "gsldrc1 $f22, 0x8($8) \n\t" | |
| 3047 | + "j 5b \n\t" | |
| 3048 | + | |
| 3049 | + "6: \n\t" | |
| 3050 | + PTR_ADDIU "%[iWidth], %[iWidth], -0x1 \n\t" | |
| 3051 | + "beqz %[iWidth], 7f \n\t" | |
| 3052 | + "move %[pTap], $10 \n\t" | |
| 3053 | + "move %[pDst], $11 \n\t" | |
| 3054 | + "move %[iHeight], $12 \n\t" | |
| 3055 | + PTR_ADDIU "%[pTap], %[pTap], 0x10 \n\t" | |
| 3056 | + PTR_ADDIU "%[pDst], %[pDst], 0x8 \n\t" | |
| 3057 | + "j 4b \n\t" | |
| 3058 | + | |
| 3059 | + "7: \n\t" | |
| 3060 | + : [pTap]"+&r"((unsigned char *)pTap), [pDst]"+&r"((unsigned char *)pDst), | |
| 3061 | + [iWidth]"+&r"((int)iWidth), [iHeight]"+&r"((int)iHeight) | |
| 3062 | + : [iTapStride]"r"((int)iTapStride), [iDstStride]"r"((int)iDstStride) | |
| 3063 | + : "memory", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$f0", "$f2", | |
| 3064 | + "$f4", "$f6", "$f8", "$f10", "$f12", "$f14", "$f16", "$f18", "$f20", | |
| 3065 | + "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3066 | + ); | |
| 3067 | + RECOVER_REG; | |
| 3068 | +} | |
| 3069 | + | |
| 3070 | +//horizontal and vertical filter to gain half sample, that is (2, 2) location in quarter sample | |
| 3071 | +static inline void McHorVer22Width5Or9Or17Height5Or9Or17_mmi(const uint8_t* pSrc, | |
| 3072 | + int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride, | |
| 3073 | + int32_t iWidth, int32_t iHeight) { | |
| 3074 | + ENFORCE_STACK_ALIGN_2D (int16_t, pTap, 22, 24, 16) | |
| 3075 | + | |
| 3076 | + if (iWidth == 17 || iWidth == 9){ | |
| 3077 | + int32_t tmp1 = 2 * (iWidth - 8); | |
| 3078 | + McHorVer22HorFirst_mmi(pSrc - 2, iSrcStride, (uint8_t*)pTap, 48, iWidth, iHeight + 5); | |
| 3079 | + | |
| 3080 | + McHorVer22Width8VerLastAlign_mmi((uint8_t*)pTap, 48, pDst, iDstStride, iWidth - 1, iHeight); | |
| 3081 | + | |
| 3082 | + McHorVer22Width8VerLastUnAlign_mmi((uint8_t*)pTap + tmp1, 48, pDst + iWidth - 8, | |
| 3083 | + iDstStride, 8, iHeight); | |
| 3084 | + } else { | |
| 3085 | + int16_t iTmp[17 + 5]; | |
| 3086 | + int32_t i, j, k; | |
| 3087 | + | |
| 3088 | + for (i = 0; i < iHeight; i++) { | |
| 3089 | + for (j = 0; j < iWidth + 5; j++) { | |
| 3090 | + iTmp[j] = FilterInput8bitWithStride_c (pSrc - 2 + j, iSrcStride); | |
| 3091 | + } | |
| 3092 | + for (k = 0; k < iWidth; k++) { | |
| 3093 | + pDst[k] = WelsClip1 ((HorFilterInput16bit_c (&iTmp[k]) + 512) >> 10); | |
| 3094 | + } | |
| 3095 | + pSrc += iSrcStride; | |
| 3096 | + pDst += iDstStride; | |
| 3097 | + } | |
| 3098 | + } | |
| 3099 | +} | |
| 3100 | + | |
| 3101 | +void McCopyWidthEq4_mmi(const uint8_t *pSrc, int iSrcStride, | |
| 3102 | + uint8_t *pDst, int iDstStride, int iHeight) { | |
| 3103 | + __asm__ volatile ( | |
| 3104 | + ".set arch=loongson3a \n\t" | |
| 3105 | + "1: \n\t" | |
| 3106 | + "lwl $8, 0x3(%[pSrc]) \n\t" | |
| 3107 | + "lwr $8, 0x0(%[pSrc]) \n\t" | |
| 3108 | + "swl $8, 0x3(%[pDst]) \n\t" | |
| 3109 | + "swr $8, 0x0(%[pDst]) \n\t" | |
| 3110 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3111 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3112 | + PTR_ADDIU "%[iHeight], %[iHeight], -1 \n\t" | |
| 3113 | + "bnez %[iHeight], 1b \n\t" | |
| 3114 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3115 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3116 | + : "memory", "$8" | |
| 3117 | + ); | |
| 3118 | +} | |
| 3119 | + | |
| 3120 | +void McCopyWidthEq8_mmi(const uint8_t *pSrc, int iSrcStride, | |
| 3121 | + uint8_t *pDst, int iDstStride, int iHeight) { | |
| 3122 | + __asm__ volatile ( | |
| 3123 | + ".set arch=loongson3a \n\t" | |
| 3124 | + "1: \n\t" | |
| 3125 | + "ldl $8, 0x7(%[pSrc]) \n\t" | |
| 3126 | + "ldr $8, 0x0(%[pSrc]) \n\t" | |
| 3127 | + "sdl $8, 0x7(%[pDst]) \n\t" | |
| 3128 | + "sdr $8, 0x0(%[pDst]) \n\t" | |
| 3129 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3130 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3131 | + PTR_ADDIU "%[iHeight], %[iHeight], -1 \n\t" | |
| 3132 | + "bnez %[iHeight], 1b \n\t" | |
| 3133 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3134 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3135 | + : "memory", "$8" | |
| 3136 | + ); | |
| 3137 | +} | |
| 3138 | + | |
| 3139 | +void McCopyWidthEq16_mmi(const uint8_t *pSrc, int iSrcStride, | |
| 3140 | + uint8_t *pDst, int iDstStride, int iHeight) { | |
| 3141 | + __asm__ volatile ( | |
| 3142 | + ".set arch=loongson3a \n\t" | |
| 3143 | + "1: \n\t" | |
| 3144 | + "ldl $8, 0x7(%[pSrc]) \n\t" | |
| 3145 | + "ldl $9, 0xF(%[pSrc]) \n\t" | |
| 3146 | + "ldr $8, 0x0(%[pSrc]) \n\t" | |
| 3147 | + "ldr $9, 0x8(%[pSrc]) \n\t" | |
| 3148 | + "sdl $8, 0x7(%[pDst]) \n\t" | |
| 3149 | + "sdl $9, 0xF(%[pDst]) \n\t" | |
| 3150 | + "sdr $8, 0x0(%[pDst]) \n\t" | |
| 3151 | + "sdr $9, 0x8(%[pDst]) \n\t" | |
| 3152 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3153 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3154 | + PTR_ADDIU "%[iHeight], %[iHeight], -1 \n\t" | |
| 3155 | + "bnez %[iHeight], 1b \n\t" | |
| 3156 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3157 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3158 | + : "memory", "$8", "$9" | |
| 3159 | + ); | |
| 3160 | +} | |
| 3161 | + | |
| 3162 | +static inline void McCopy_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3163 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 3164 | + if (iWidth == 16) | |
| 3165 | + McCopyWidthEq16_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3166 | + else if (iWidth == 8) | |
| 3167 | + McCopyWidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3168 | + else if (iWidth == 4) | |
| 3169 | + McCopyWidthEq4_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3170 | + else | |
| 3171 | + McCopyWidthEq2_c (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3172 | +} | |
| 3173 | + | |
| 3174 | +void McChromaWidthEq4_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 3175 | + int32_t iDstStride, const uint8_t *pABCD, int32_t iHeight) { | |
| 3176 | + __asm__ volatile ( | |
| 3177 | + ".set arch=loongson3a \n\t" | |
| 3178 | + "gsldlc1 $f6, 0x7(%[pABCD]) \n\t" | |
| 3179 | + "gsldrc1 $f6, 0x0(%[pABCD]) \n\t" | |
| 3180 | + "xor $f14, $f14, $f14 \n\t" | |
| 3181 | + "punpcklbh $f6, $f6, $f6 \n\t" | |
| 3182 | + "mov.d $f8, $f6 \n\t" | |
| 3183 | + "punpcklhw $f6, $f6, $f6 \n\t" | |
| 3184 | + "punpckhhw $f8, $f8, $f8 \n\t" | |
| 3185 | + "mov.d $f10, $f6 \n\t" | |
| 3186 | + "punpcklbh $f6, $f6, $f14 \n\t" | |
| 3187 | + "punpckhbh $f10, $f10, $f14 \n\t" | |
| 3188 | + | |
| 3189 | + "mov.d $f12, $f8 \n\t" | |
| 3190 | + "punpcklbh $f8, $f8, $f14 \n\t" | |
| 3191 | + "punpckhbh $f12, $f12, $f14 \n\t" | |
| 3192 | + PTR_ADDU "%[pABCD], %[pSrc], %[iSrcStride] \n\t" | |
| 3193 | + "dli $8, 0x6 \n\t" | |
| 3194 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3195 | + "gsldlc1 $f2, 0x8(%[pSrc]) \n\t" | |
| 3196 | + "dmtc1 $8, $f16 \n\t" | |
| 3197 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3198 | + "gsldrc1 $f2, 0x1(%[pSrc]) \n\t" | |
| 3199 | + "dli $8, 0x0020002000200020 \n\t" | |
| 3200 | + "punpcklbh $f0, $f0, $f14 \n\t" | |
| 3201 | + "punpcklbh $f2, $f2, $f14 \n\t" | |
| 3202 | + | |
| 3203 | + "dmtc1 $8, $f18 \n\t" | |
| 3204 | + "1: \n\t" | |
| 3205 | + "pmullh $f0, $f0, $f6 \n\t" | |
| 3206 | + "pmullh $f2, $f2, $f10 \n\t" | |
| 3207 | + "paddh $f0, $f0, $f2 \n\t" | |
| 3208 | + | |
| 3209 | + "gsldlc1 $f2, 0x7(%[pABCD]) \n\t" | |
| 3210 | + "gsldrc1 $f2, 0x0(%[pABCD]) \n\t" | |
| 3211 | + "punpcklbh $f2, $f2, $f14 \n\t" | |
| 3212 | + "mov.d $f4, $f2 \n\t" | |
| 3213 | + "pmullh $f2, $f2, $f8 \n\t" | |
| 3214 | + "paddh $f0, $f0, $f2 \n\t" | |
| 3215 | + "gsldlc1 $f2, 0x8(%[pABCD]) \n\t" | |
| 3216 | + "gsldrc1 $f2, 0x1(%[pABCD]) \n\t" | |
| 3217 | + "punpcklbh $f2, $f2, $f14 \n\t" | |
| 3218 | + "mov.d $f14, $f2 \n\t" | |
| 3219 | + "pmullh $f2, $f2, $f12 \n\t" | |
| 3220 | + "paddh $f0, $f0, $f2 \n\t" | |
| 3221 | + "mov.d $f2, $f14 \n\t" | |
| 3222 | + "paddh $f0, $f0, $f18 \n\t" | |
| 3223 | + "psrlh $f0, $f0, $f16 \n\t" | |
| 3224 | + "xor $f14, $f14, $f14 \n\t" | |
| 3225 | + "packushb $f0, $f0, $f14 \n\t" | |
| 3226 | + "gsswlc1 $f0, 0x3(%[pDst]) \n\t" | |
| 3227 | + "gsswrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3228 | + "mov.d $f0, $f4 \n\t" | |
| 3229 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3230 | + PTR_ADDU "%[pABCD], %[pABCD], %[iSrcStride] \n\t" | |
| 3231 | + PTR_ADDIU "%[iHeight], %[iHeight], -1 \n\t" | |
| 3232 | + "bnez %[iHeight], 1b \n\t" | |
| 3233 | + : [pSrc]"+&r"((unsigned char *)pSrc), [pDst]"+&r"((unsigned char *)pDst), | |
| 3234 | + [pABCD]"+&r"((unsigned char *)pABCD), [iHeight]"+&r"((int)iHeight) | |
| 3235 | + : [iSrcStride]"r"((int)iSrcStride), [iDstStride]"r"((int)iDstStride) | |
| 3236 | + : "memory", "$8", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3237 | + "$f14", "$f16", "$f18" | |
| 3238 | + ); | |
| 3239 | +} | |
| 3240 | + | |
| 3241 | +void McChromaWidthEq8_mmi(const uint8_t *pSrc, int32_t iSrcStride, uint8_t *pDst, | |
| 3242 | + int32_t iDstStride, const uint8_t *pABCD, int32_t iHeight) { | |
| 3243 | + BACKUP_REG; | |
| 3244 | + __asm__ volatile ( | |
| 3245 | + ".set arch=loongson3a \n\t" | |
| 3246 | + "gsldlc1 $f12, 0x7(%[pABCD]) \n\t" | |
| 3247 | + "xor $f28, $f28, $f28 \n\t" | |
| 3248 | + "gsldrc1 $f12, 0x0(%[pABCD]) \n\t" | |
| 3249 | + "punpcklbh $f12, $f12, $f12 \n\t" | |
| 3250 | + "punpckhhw $f14, $f12, $f12 \n\t" | |
| 3251 | + "punpcklhw $f12, $f12, $f12 \n\t" | |
| 3252 | + | |
| 3253 | + "mov.d $f16, $f14 \n\t" | |
| 3254 | + "punpckhwd $f14, $f12, $f12 \n\t" | |
| 3255 | + "punpcklwd $f12, $f12, $f12 \n\t" | |
| 3256 | + "punpckhwd $f18, $f16, $f16 \n\t" | |
| 3257 | + "punpcklwd $f16, $f16, $f16 \n\t" | |
| 3258 | + "mov.d $f20, $f14 \n\t" | |
| 3259 | + "mov.d $f24, $f18 \n\t" | |
| 3260 | + | |
| 3261 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 3262 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 3263 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 3264 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 3265 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 3266 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 3267 | + "punpckhbh $f26, $f24, $f28 \n\t" | |
| 3268 | + "punpcklbh $f24, $f24, $f28 \n\t" | |
| 3269 | + | |
| 3270 | + PTR_ADDU "%[pABCD], %[pSrc], %[iSrcStride] \n\t" | |
| 3271 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3272 | + "gsldlc1 $f4, 0x8(%[pSrc]) \n\t" | |
| 3273 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3274 | + "gsldrc1 $f4, 0x1(%[pSrc]) \n\t" | |
| 3275 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 3276 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 3277 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3278 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3279 | + "1: \n\t" | |
| 3280 | + "dli $8, 0x20 \n\t" | |
| 3281 | + "dmtc1 $8, $f30 \n\t" | |
| 3282 | + | |
| 3283 | + "pmullh $f0, $f0, $f12 \n\t" | |
| 3284 | + "pmullh $f2, $f2, $f14 \n\t" | |
| 3285 | + "pmullh $f4, $f4, $f20 \n\t" | |
| 3286 | + "pmullh $f6, $f6, $f22 \n\t" | |
| 3287 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3288 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3289 | + | |
| 3290 | + "gsldlc1 $f4, 0x7(%[pABCD]) \n\t" | |
| 3291 | + "gsldrc1 $f4, 0x0(%[pABCD]) \n\t" | |
| 3292 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3293 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3294 | + "mov.d $f8, $f4 \n\t" | |
| 3295 | + "mov.d $f10, $f6 \n\t" | |
| 3296 | + "pmullh $f4, $f4, $f16 \n\t" | |
| 3297 | + "pmullh $f6, $f6, $f18 \n\t" | |
| 3298 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3299 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3300 | + | |
| 3301 | + "gsldlc1 $f4, 0x8(%[pABCD]) \n\t" | |
| 3302 | + "gsldrc1 $f4, 0x1(%[pABCD]) \n\t" | |
| 3303 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3304 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3305 | + "mov.d $f28, $f4 \n\t" | |
| 3306 | + "mov.d $f30, $f6 \n\t" | |
| 3307 | + "pmullh $f4, $f4, $f24 \n\t" | |
| 3308 | + "pmullh $f6, $f6, $f26 \n\t" | |
| 3309 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3310 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3311 | + "mov.d $f4, $f28 \n\t" | |
| 3312 | + "mov.d $f6, $f30 \n\t" | |
| 3313 | + | |
| 3314 | + "dli $8, 0x0020002000200020 \n\t" | |
| 3315 | + "dmfc1 $9, $f20 \n\t" | |
| 3316 | + "dmtc1 $8, $f20 \n\t" | |
| 3317 | + "dli $8, 0x6 \n\t" | |
| 3318 | + "paddh $f0, $f0, $f20 \n\t" | |
| 3319 | + "paddh $f2, $f2, $f20 \n\t" | |
| 3320 | + "dmtc1 $8, $f20 \n\t" | |
| 3321 | + "psrlh $f0, $f0, $f20 \n\t" | |
| 3322 | + "psrlh $f2, $f2, $f20 \n\t" | |
| 3323 | + | |
| 3324 | + "xor $f28, $f28, $f28 \n\t" | |
| 3325 | + "packushb $f0, $f0, $f2 \n\t" | |
| 3326 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3327 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3328 | + | |
| 3329 | + "mov.d $f0, $f8 \n\t" | |
| 3330 | + "mov.d $f2, $f10 \n\t" | |
| 3331 | + "dmtc1 $9, $f20 \n\t" | |
| 3332 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3333 | + PTR_ADDU "%[pABCD], %[pABCD], %[iSrcStride] \n\t" | |
| 3334 | + | |
| 3335 | + PTR_ADDIU "%[iHeight], %[iHeight], -1 \n\t" | |
| 3336 | + "bnez %[iHeight], 1b \n\t" | |
| 3337 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [pABCD]"+&r"(pABCD), | |
| 3338 | + [iHeight]"+&r"(iHeight) | |
| 3339 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3340 | + : "memory", "$8", "$9", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3341 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3342 | + ); | |
| 3343 | + RECOVER_REG; | |
| 3344 | +} | |
| 3345 | + | |
| 3346 | +void McChroma_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3347 | + int32_t iDstStride, int16_t iMvX, int16_t iMvY, | |
| 3348 | + int32_t iWidth, int32_t iHeight) { | |
| 3349 | + static const PMcChromaWidthExtFunc kpMcChromaWidthFuncs[2] = { | |
| 3350 | + McChromaWidthEq4_mmi, | |
| 3351 | + McChromaWidthEq8_mmi | |
| 3352 | + }; | |
| 3353 | + const int32_t kiD8x = iMvX & 0x07; | |
| 3354 | + const int32_t kiD8y = iMvY & 0x07; | |
| 3355 | + if (kiD8x == 0 && kiD8y == 0) { | |
| 3356 | + McCopy_mmi (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight); | |
| 3357 | + return; | |
| 3358 | + } | |
| 3359 | + if (iWidth != 2) { | |
| 3360 | + kpMcChromaWidthFuncs[iWidth >> 3] (pSrc, iSrcStride, pDst, iDstStride, | |
| 3361 | + g_kuiABCD[kiD8y][kiD8x], iHeight); | |
| 3362 | + } else | |
| 3363 | + McChromaWithFragMv_c (pSrc, iSrcStride, pDst, iDstStride, iMvX, iMvY, | |
| 3364 | + iWidth, iHeight); | |
| 3365 | +} | |
| 3366 | + | |
| 3367 | +void McHorVer20WidthEq8_mmi(const uint8_t *pSrc, int iSrcStride, uint8_t *pDst, | |
| 3368 | + int iDstStride, int iHeight) { | |
| 3369 | + BACKUP_REG; | |
| 3370 | + __asm__ volatile ( | |
| 3371 | + ".set arch=loongson3a \n\t" | |
| 3372 | + PTR_ADDIU "%[pSrc], %[pSrc], -0x2 \n\t" | |
| 3373 | + "xor $f28, $f28, $f28 \n\t" | |
| 3374 | + "dli $8, 0x0010001000100010 \n\t" | |
| 3375 | + "dmtc1 $8, $f24 \n\t" | |
| 3376 | + "dli $8, 0x2 \n\t" | |
| 3377 | + "dmtc1 $8, $f26 \n\t" | |
| 3378 | + "dli $8, 0x5 \n\t" | |
| 3379 | + "dmtc1 $8, $f30 \n\t" | |
| 3380 | + "1: \n\t" | |
| 3381 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3382 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 3383 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 3384 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 3385 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 3386 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 3387 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3388 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 3389 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 3390 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 3391 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 3392 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 3393 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 3394 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3395 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 3396 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 3397 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 3398 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 3399 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 3400 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3401 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 3402 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 3403 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 3404 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 3405 | + "paddh $f8, $f8, $f12 \n\t" | |
| 3406 | + "paddh $f10, $f10, $f14 \n\t" | |
| 3407 | + "paddh $f16, $f16, $f20 \n\t" | |
| 3408 | + "paddh $f18, $f18, $f22 \n\t" | |
| 3409 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3410 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3411 | + "psubh $f16, $f16, $f8 \n\t" | |
| 3412 | + "psubh $f18, $f18, $f10 \n\t" | |
| 3413 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3414 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3415 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3416 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3417 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3418 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3419 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3420 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3421 | + "paddh $f0, $f0, $f24 \n\t" | |
| 3422 | + "paddh $f2, $f2, $f24 \n\t" | |
| 3423 | + "psrah $f0, $f0, $f30 \n\t" | |
| 3424 | + "psrah $f2, $f2, $f30 \n\t" | |
| 3425 | + "packushb $f0, $f0, $f2 \n\t" | |
| 3426 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3427 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3428 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3429 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3430 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3431 | + "bnez %[iHeight], 1b \n\t" | |
| 3432 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3433 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3434 | + : "memory", "$8", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3435 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3436 | + ); | |
| 3437 | + RECOVER_REG; | |
| 3438 | +} | |
| 3439 | + | |
| 3440 | +void McHorVer20WidthEq16_mmi(const uint8_t *pSrc, int iSrcStride, uint8_t *pDst, | |
| 3441 | + int iDstStride, int iHeight) { | |
| 3442 | + BACKUP_REG; | |
| 3443 | + __asm__ volatile ( | |
| 3444 | + ".set arch=loongson3a \n\t" | |
| 3445 | + PTR_ADDIU "%[pSrc], %[pSrc], -0x2 \n\t" | |
| 3446 | + "dli $8, 0x0010001000100010 \n\t" | |
| 3447 | + "dmtc1 $8, $f24 \n\t" | |
| 3448 | + "dli $8, 0x2 \n\t" | |
| 3449 | + "dmtc1 $8, $f26 \n\t" | |
| 3450 | + "dli $8, 0x5 \n\t" | |
| 3451 | + "dmtc1 $8, $f30 \n\t" | |
| 3452 | + "1: \n\t" | |
| 3453 | + "xor $f28, $f28, $f28 \n\t" | |
| 3454 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3455 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 3456 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 3457 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 3458 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 3459 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 3460 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3461 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 3462 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 3463 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 3464 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 3465 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 3466 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 3467 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3468 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 3469 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 3470 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 3471 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 3472 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 3473 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3474 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 3475 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 3476 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 3477 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 3478 | + "paddh $f8, $f8, $f12 \n\t" | |
| 3479 | + "paddh $f10, $f10, $f14 \n\t" | |
| 3480 | + "paddh $f16, $f16, $f20 \n\t" | |
| 3481 | + "paddh $f18, $f18, $f22 \n\t" | |
| 3482 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3483 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3484 | + "psubh $f16, $f16, $f8 \n\t" | |
| 3485 | + "psubh $f18, $f18, $f10 \n\t" | |
| 3486 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3487 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3488 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3489 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3490 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3491 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3492 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3493 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3494 | + "paddh $f0, $f0, $f24 \n\t" | |
| 3495 | + "paddh $f2, $f2, $f24 \n\t" | |
| 3496 | + "psrah $f0, $f0, $f30 \n\t" | |
| 3497 | + "psrah $f2, $f2, $f30 \n\t" | |
| 3498 | + "packushb $f0, $f0, $f2 \n\t" | |
| 3499 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3500 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3501 | + "gsldlc1 $f0, 0xF(%[pSrc]) \n\t" | |
| 3502 | + "gsldlc1 $f4, 0x14(%[pSrc]) \n\t" | |
| 3503 | + "gsldlc1 $f8, 0x10(%[pSrc]) \n\t" | |
| 3504 | + "gsldlc1 $f12, 0x13(%[pSrc]) \n\t" | |
| 3505 | + "gsldlc1 $f16, 0x11(%[pSrc]) \n\t" | |
| 3506 | + "gsldlc1 $f20, 0x12(%[pSrc]) \n\t" | |
| 3507 | + "gsldrc1 $f0, 0x8(%[pSrc]) \n\t" | |
| 3508 | + "gsldrc1 $f4, 0xd(%[pSrc]) \n\t" | |
| 3509 | + "gsldrc1 $f8, 0x9(%[pSrc]) \n\t" | |
| 3510 | + "gsldrc1 $f12, 0xc(%[pSrc]) \n\t" | |
| 3511 | + "gsldrc1 $f16, 0xa(%[pSrc]) \n\t" | |
| 3512 | + "gsldrc1 $f20, 0xb(%[pSrc]) \n\t" | |
| 3513 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 3514 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3515 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 3516 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 3517 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 3518 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 3519 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 3520 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3521 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 3522 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 3523 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 3524 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 3525 | + "paddh $f8, $f8, $f12 \n\t" | |
| 3526 | + "paddh $f10, $f10, $f14 \n\t" | |
| 3527 | + "paddh $f16, $f16, $f20 \n\t" | |
| 3528 | + "paddh $f18, $f18, $f22 \n\t" | |
| 3529 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3530 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3531 | + "psubh $f16, $f16, $f8 \n\t" | |
| 3532 | + "psubh $f18, $f18, $f10 \n\t" | |
| 3533 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3534 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3535 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3536 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3537 | + "psllh $f16, $f16, $f26 \n\t" | |
| 3538 | + "psllh $f18, $f18, $f26 \n\t" | |
| 3539 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3540 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3541 | + "paddh $f0, $f0, $f24 \n\t" | |
| 3542 | + "paddh $f2, $f2, $f24 \n\t" | |
| 3543 | + "psrah $f0, $f0, $f30 \n\t" | |
| 3544 | + "psrah $f2, $f2, $f30 \n\t" | |
| 3545 | + "packushb $f0, $f0, $f2 \n\t" | |
| 3546 | + "gssdlc1 $f0, 0xF(%[pDst]) \n\t" | |
| 3547 | + "gssdrc1 $f0, 0x8(%[pDst]) \n\t" | |
| 3548 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3549 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3550 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3551 | + "bnez %[iHeight], 1b \n\t" | |
| 3552 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3553 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3554 | + : "memory", "$8", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3555 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3556 | + ); | |
| 3557 | + RECOVER_REG; | |
| 3558 | +} | |
| 3559 | + | |
| 3560 | +void McHorVer20WidthEq4_mmi(const uint8_t *pSrc, int iSrcStride, uint8_t *pDst, | |
| 3561 | + int iDstStride, int iHeight) { | |
| 3562 | + __asm__ volatile ( | |
| 3563 | + ".set arch=loongson3a \n\t" | |
| 3564 | + "1: \n\t" | |
| 3565 | + PTR_ADDIU "%[pSrc], %[pSrc], -0x2 \n\t" | |
| 3566 | + "xor $f14, $f14, $f14 \n\t" | |
| 3567 | + "dli $8, 0x0010001000100010 \n\t" | |
| 3568 | + "dmtc1 $8, $f12 \n\t" | |
| 3569 | + "1: \n\t" | |
| 3570 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3571 | + "gsldlc1 $f2, 0xc(%[pSrc]) \n\t" | |
| 3572 | + "gsldlc1 $f4, 0x8(%[pSrc]) \n\t" | |
| 3573 | + "gsldlc1 $f6, 0xb(%[pSrc]) \n\t" | |
| 3574 | + "gsldlc1 $f8, 0x9(%[pSrc]) \n\t" | |
| 3575 | + "gsldlc1 $f10, 0xa(%[pSrc]) \n\t" | |
| 3576 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3577 | + "gsldrc1 $f2, 0x5(%[pSrc]) \n\t" | |
| 3578 | + "gsldrc1 $f4, 0x1(%[pSrc]) \n\t" | |
| 3579 | + "gsldrc1 $f6, 0x4(%[pSrc]) \n\t" | |
| 3580 | + "gsldrc1 $f8, 0x2(%[pSrc]) \n\t" | |
| 3581 | + "gsldrc1 $f10, 0x3(%[pSrc]) \n\t" | |
| 3582 | + "dli $8, 0x2 \n\t" | |
| 3583 | + "punpcklbh $f0, $f0, $f14 \n\t" | |
| 3584 | + "punpcklbh $f2, $f2, $f14 \n\t" | |
| 3585 | + "punpcklbh $f4, $f4, $f14 \n\t" | |
| 3586 | + "punpcklbh $f6, $f6, $f14 \n\t" | |
| 3587 | + "punpcklbh $f8, $f8, $f14 \n\t" | |
| 3588 | + "punpcklbh $f10, $f10, $f14 \n\t" | |
| 3589 | + "dmtc1 $8, $f16 \n\t" | |
| 3590 | + "paddh $f4, $f4, $f6 \n\t" | |
| 3591 | + "paddh $f8, $f8, $f10 \n\t" | |
| 3592 | + "psllh $f8, $f8, $f16 \n\t" | |
| 3593 | + "psubh $f8, $f8, $f4 \n\t" | |
| 3594 | + "paddh $f0, $f0, $f2 \n\t" | |
| 3595 | + "paddh $f0, $f0, $f8 \n\t" | |
| 3596 | + "dli $8, 0x5 \n\t" | |
| 3597 | + "psllh $f8, $f8, $f16 \n\t" | |
| 3598 | + "paddh $f0, $f0, $f8 \n\t" | |
| 3599 | + "paddh $f0, $f0, $f12 \n\t" | |
| 3600 | + "dmtc1 $8, $f16 \n\t" | |
| 3601 | + "psrah $f0, $f0, $f16 \n\t" | |
| 3602 | + "packushb $f0, $f0, $f14 \n\t" | |
| 3603 | + "gsswlc1 $f0, 0x3(%[pDst]) \n\t" | |
| 3604 | + "gsswrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3605 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3606 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3607 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3608 | + "bnez %[iHeight], 1b \n\t" | |
| 3609 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3610 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3611 | + : "memory", "$8", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3612 | + "$f14", "$f16" | |
| 3613 | + ); | |
| 3614 | +} | |
| 3615 | + | |
| 3616 | +static inline void McHorVer20_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3617 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 3618 | + if (iWidth == 16) | |
| 3619 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3620 | + else if (iWidth == 8) | |
| 3621 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3622 | + else | |
| 3623 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3624 | +} | |
| 3625 | + | |
| 3626 | +void McHorVer02WidthEq8_mmi(const uint8_t *pSrc, int iSrcStride, uint8_t *pDst, | |
| 3627 | + int iDstStride, int iHeight) { | |
| 3628 | + BACKUP_REG; | |
| 3629 | + __asm__ volatile ( | |
| 3630 | + ".set arch=loongson3a \n\t" | |
| 3631 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3632 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3633 | + "xor $f28, $f28, $f28 \n\t" | |
| 3634 | + MMI_LOAD_8P($f0, $f2, $f28, %[pSrc]) | |
| 3635 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3636 | + MMI_LOAD_8P($f4, $f6, $f28, $8) | |
| 3637 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3638 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3639 | + MMI_LOAD_8P($f8, $f10, $f28, %[pSrc]) | |
| 3640 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3641 | + MMI_LOAD_8P($f12, $f14, $f28, $8) | |
| 3642 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3643 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3644 | + MMI_LOAD_8P($f16, $f18, $f28, %[pSrc]) | |
| 3645 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3646 | + MMI_LOAD_8P($f20, $f22, $f28, $8) | |
| 3647 | + | |
| 3648 | + "1: \n\t" | |
| 3649 | + FILTER_HV_W8($f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, | |
| 3650 | + $f22, $f24, $f26, $f28, $f30, %[pDst], $8, $9) | |
| 3651 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3652 | + "beqz %[iHeight], 2f \n\t" | |
| 3653 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3654 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3655 | + MMI_LOAD_8P($f24, $f26, $f28, %[pSrc]) | |
| 3656 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3657 | + FILTER_HV_W8($f4, $f6, $f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, | |
| 3658 | + $f26, $f28, $f30, $f0, $f2, %[pDst], $8, $9) | |
| 3659 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3660 | + "beqz %[iHeight], 2f \n\t" | |
| 3661 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3662 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3663 | + MMI_LOAD_8P($f28, $f30, $f0, $8) | |
| 3664 | + FILTER_HV_W8($f8, $f10, $f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, | |
| 3665 | + $f30, $f0, $f2, $f4, $f6, %[pDst], $8, $9) | |
| 3666 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3667 | + "beqz %[iHeight], 2f \n\t" | |
| 3668 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3669 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3670 | + MMI_LOAD_8P($f0, $f2, $f4, %[pSrc]) | |
| 3671 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3672 | + FILTER_HV_W8($f12, $f14, $f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, | |
| 3673 | + $f2, $f4, $f6, $f8, $f10, %[pDst], $8, $9) | |
| 3674 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3675 | + "beqz %[iHeight], 2f \n\t" | |
| 3676 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3677 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3678 | + MMI_LOAD_8P($f4, $f6, $f8, $8) | |
| 3679 | + FILTER_HV_W8($f16, $f18, $f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, | |
| 3680 | + $f6, $f8, $f10, $f12, $f14, %[pDst], $8, $9) | |
| 3681 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3682 | + "beqz %[iHeight], 2f \n\t" | |
| 3683 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3684 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3685 | + MMI_LOAD_8P($f8, $f10, $f12, %[pSrc]) | |
| 3686 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3687 | + FILTER_HV_W8($f20, $f22, $f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, | |
| 3688 | + $f10, $f12, $f14, $f16, $f18, %[pDst], $8, $9) | |
| 3689 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3690 | + "beqz %[iHeight], 2f \n\t" | |
| 3691 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3692 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3693 | + MMI_LOAD_8P($f12, $f14, $f16, $8) | |
| 3694 | + FILTER_HV_W8($f24, $f26, $f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, | |
| 3695 | + $f14, $f16, $f18, $f20, $f22, %[pDst], $8, $9) | |
| 3696 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3697 | + "beqz %[iHeight], 2f \n\t" | |
| 3698 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3699 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3700 | + MMI_LOAD_8P($f16, $f18, $f20, %[pSrc]) | |
| 3701 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3702 | + FILTER_HV_W8($f28, $f30, $f0, $f2, $f4, $f6, $f8, $f10, $f12, $f14, $f16, | |
| 3703 | + $f18, $f20, $f22, $f24, $f26, %[pDst], $8, $9) | |
| 3704 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3705 | + "beqz %[iHeight], 2f \n\t" | |
| 3706 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3707 | + PTR_ADDU "$8, %[pSrc], %[iSrcStride] \n\t" | |
| 3708 | + MMI_LOAD_8P($f20, $f22, $f24, $8) | |
| 3709 | + "j 1b \n\t" | |
| 3710 | + "2: \n\t" | |
| 3711 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3712 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3713 | + : "memory", "$8", "$9", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3714 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3715 | + ); | |
| 3716 | + RECOVER_REG; | |
| 3717 | +} | |
| 3718 | + | |
| 3719 | +static inline void McHorVer02WidthEq16_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 3720 | + uint8_t* pDst, int32_t iDstStride, int32_t iHeight) { | |
| 3721 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3722 | + McHorVer02WidthEq8_mmi (&pSrc[8], iSrcStride, &pDst[8], iDstStride, iHeight); | |
| 3723 | +} | |
| 3724 | + | |
| 3725 | +static inline void McHorVer02_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 3726 | + uint8_t* pDst, int32_t iDstStride, int32_t iWidth, | |
| 3727 | + int32_t iHeight) { | |
| 3728 | + if (iWidth == 16) | |
| 3729 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3730 | + else if (iWidth == 8) | |
| 3731 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3732 | + else | |
| 3733 | + McHorVer02_c (pSrc, iSrcStride, pDst, iDstStride, 4, iHeight); | |
| 3734 | +} | |
| 3735 | + | |
| 3736 | +void McHorVer22Width8HorFirst_mmi(const uint8_t *pSrc, int16_t iSrcStride, | |
| 3737 | + uint8_t *pDst, int32_t iDstStride, int32_t iHeight) { | |
| 3738 | + BACKUP_REG; | |
| 3739 | + __asm__ volatile ( | |
| 3740 | + ".set arch=loongson3a \n\t" | |
| 3741 | + "xor $f28, $f28, $f28 \n\t" | |
| 3742 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3743 | + PTR_SUBU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3744 | + "dli $8, 0x2 \n\t" | |
| 3745 | + "dmtc1 $8, $f30 \n\t" | |
| 3746 | + "1: \n\t" | |
| 3747 | + "xor $f28, $f28, $f28 \n\t" | |
| 3748 | + "gsldlc1 $f0, 0x7(%[pSrc]) \n\t" | |
| 3749 | + "gsldlc1 $f4, 0xc(%[pSrc]) \n\t" | |
| 3750 | + "gsldlc1 $f8, 0x8(%[pSrc]) \n\t" | |
| 3751 | + "gsldlc1 $f12, 0xb(%[pSrc]) \n\t" | |
| 3752 | + "gsldlc1 $f16, 0x9(%[pSrc]) \n\t" | |
| 3753 | + "gsldlc1 $f20, 0xa(%[pSrc]) \n\t" | |
| 3754 | + "gsldrc1 $f0, 0x0(%[pSrc]) \n\t" | |
| 3755 | + "gsldrc1 $f4, 0x5(%[pSrc]) \n\t" | |
| 3756 | + "gsldrc1 $f8, 0x1(%[pSrc]) \n\t" | |
| 3757 | + "gsldrc1 $f12, 0x4(%[pSrc]) \n\t" | |
| 3758 | + "gsldrc1 $f16, 0x2(%[pSrc]) \n\t" | |
| 3759 | + "gsldrc1 $f20, 0x3(%[pSrc]) \n\t" | |
| 3760 | + "punpckhbh $f2, $f0, $f28 \n\t" | |
| 3761 | + "punpckhbh $f6, $f4, $f28 \n\t" | |
| 3762 | + "punpckhbh $f10, $f8, $f28 \n\t" | |
| 3763 | + "punpckhbh $f14, $f12, $f28 \n\t" | |
| 3764 | + "punpckhbh $f18, $f16, $f28 \n\t" | |
| 3765 | + "punpckhbh $f22, $f20, $f28 \n\t" | |
| 3766 | + "punpcklbh $f0, $f0, $f28 \n\t" | |
| 3767 | + "punpcklbh $f4, $f4, $f28 \n\t" | |
| 3768 | + "punpcklbh $f8, $f8, $f28 \n\t" | |
| 3769 | + "punpcklbh $f12, $f12, $f28 \n\t" | |
| 3770 | + "punpcklbh $f16, $f16, $f28 \n\t" | |
| 3771 | + "punpcklbh $f20, $f20, $f28 \n\t" | |
| 3772 | + "paddh $f8, $f8, $f12 \n\t" | |
| 3773 | + "paddh $f10, $f10, $f14 \n\t" | |
| 3774 | + "paddh $f16, $f16, $f20 \n\t" | |
| 3775 | + "paddh $f18, $f18, $f22 \n\t" | |
| 3776 | + "psllh $f16, $f16, $f30 \n\t" | |
| 3777 | + "psllh $f18, $f18, $f30 \n\t" | |
| 3778 | + "psubh $f16, $f16, $f8 \n\t" | |
| 3779 | + "psubh $f18, $f18, $f10 \n\t" | |
| 3780 | + "paddh $f0, $f0, $f4 \n\t" | |
| 3781 | + "paddh $f2, $f2, $f6 \n\t" | |
| 3782 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3783 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3784 | + "psllh $f16, $f16, $f30 \n\t" | |
| 3785 | + "psllh $f18, $f18, $f30 \n\t" | |
| 3786 | + "paddh $f0, $f0, $f16 \n\t" | |
| 3787 | + "paddh $f2, $f2, $f18 \n\t" | |
| 3788 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3789 | + "gssdlc1 $f2, 0xF(%[pDst]) \n\t" | |
| 3790 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3791 | + "gssdrc1 $f2, 0x8(%[pDst]) \n\t" | |
| 3792 | + PTR_ADDU "%[pSrc], %[pSrc], %[iSrcStride] \n\t" | |
| 3793 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3794 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3795 | + "bnez %[iHeight], 1b \n\t" | |
| 3796 | + : [pSrc]"+&r"(pSrc), [pDst]"+&r"(pDst), [iHeight]"+&r"(iHeight) | |
| 3797 | + : [iSrcStride]"r"(iSrcStride), [iDstStride]"r"(iDstStride) | |
| 3798 | + : "memory", "$8", "$f0", "$f2", "$f4", "$f6", "$f8", "$f10", "$f12", | |
| 3799 | + "$f14", "$f16", "$f18", "$f20", "$f22", "$f24", "$f26", "$f28", "$f30" | |
| 3800 | + ); | |
| 3801 | + RECOVER_REG; | |
| 3802 | +} | |
| 3803 | + | |
| 3804 | +static inline void McHorVer22WidthEq8_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 3805 | + uint8_t* pDst, int32_t iDstStride, int32_t iHeight) { | |
| 3806 | + ENFORCE_STACK_ALIGN_2D (int16_t, iTap, 21, 8, 16) | |
| 3807 | + McHorVer22Width8HorFirst_mmi (pSrc - 2, iSrcStride, (uint8_t*)iTap, 16, iHeight + 5); | |
| 3808 | + McHorVer22Width8VerLastAlign_mmi ((uint8_t*)iTap, 16, pDst, iDstStride, 8, iHeight); | |
| 3809 | +} | |
| 3810 | + | |
| 3811 | +static inline void McHorVer22WidthEq16_mmi(const uint8_t* pSrc, int32_t iSrcStride, | |
| 3812 | + uint8_t* pDst, int32_t iDstStride, int32_t iHeight) { | |
| 3813 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3814 | + McHorVer22WidthEq8_mmi (&pSrc[8], iSrcStride, &pDst[8], iDstStride, iHeight); | |
| 3815 | +} | |
| 3816 | + | |
| 3817 | +static inline void McHorVer22_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3818 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 3819 | + if (iWidth == 16) | |
| 3820 | + McHorVer22WidthEq16_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3821 | + else if (iWidth == 8) | |
| 3822 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 3823 | + else | |
| 3824 | + McHorVer22_c (pSrc, iSrcStride, pDst, iDstStride, 4, iHeight); | |
| 3825 | +} | |
| 3826 | + | |
| 3827 | +void PixelAvgWidthEq4_mmi(uint8_t *pDst, int iDstStride, const uint8_t *pSrcA, | |
| 3828 | + int iSrcAStride, const uint8_t *pSrcB, int iSrcBStride, int iHeight ) { | |
| 3829 | + __asm__ volatile ( | |
| 3830 | + ".set arch=loongson3a \n\t" | |
| 3831 | + "1: \n\t" | |
| 3832 | + "gsldlc1 $f0, 0x7(%[pSrcB]) \n\t" | |
| 3833 | + "gsldlc1 $f2, 0x7(%[pSrcA]) \n\t" | |
| 3834 | + "gsldrc1 $f0, 0x0(%[pSrcB]) \n\t" | |
| 3835 | + "gsldrc1 $f2, 0x0(%[pSrcA]) \n\t" | |
| 3836 | + "pavgb $f0, $f0, $f2 \n\t" | |
| 3837 | + "gsswlc1 $f0, 0x3(%[pDst]) \n\t" | |
| 3838 | + "gsswrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3839 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x1 \n\t" | |
| 3840 | + PTR_ADDU "%[pDst], %[pDst], %[iDstStride] \n\t" | |
| 3841 | + PTR_ADDU "%[pSrcA], %[pSrcA], %[iSrcAStride] \n\t" | |
| 3842 | + PTR_ADDU "%[pSrcB], %[pSrcB], %[iSrcBStride] \n\t" | |
| 3843 | + "bnez %[iHeight], 1b \n\t" | |
| 3844 | + : [pDst]"+&r"((unsigned char *)pDst), [pSrcA]"+&r"((unsigned char *)pSrcA), | |
| 3845 | + [pSrcB]"+&r"((unsigned char *)pSrcB), [iHeight]"+&r"((int)iHeight) | |
| 3846 | + : [iDstStride]"r"((int)iDstStride), [iSrcAStride]"r"((int)iSrcAStride), | |
| 3847 | + [iSrcBStride]"r"((int)iSrcBStride) | |
| 3848 | + : "memory", "$8", "$9", "$10", "$f0", "$f2" | |
| 3849 | + ); | |
| 3850 | +} | |
| 3851 | + | |
| 3852 | +void PixelAvgWidthEq8_mmi(uint8_t *pDst, int iDstStride, const uint8_t *pSrcA, | |
| 3853 | + int iSrcAStride, const uint8_t *pSrcB, int iSrcBStride, int iHeight ) { | |
| 3854 | + __asm__ volatile ( | |
| 3855 | + ".set arch=loongson3a \n\t" | |
| 3856 | + "1: \n\t" | |
| 3857 | + "gsldlc1 $f0, 0x7(%[pSrcA]) \n\t" | |
| 3858 | + "gsldlc1 $f2, 0x7(%[pSrcB]) \n\t" | |
| 3859 | + "gsldrc1 $f0, 0x0(%[pSrcA]) \n\t" | |
| 3860 | + "gsldrc1 $f2, 0x0(%[pSrcB]) \n\t" | |
| 3861 | + "pavgb $f0, $f0, $f2 \n\t" | |
| 3862 | + PTR_ADDU "$8, %[pSrcA], %[iSrcAStride] \n\t" | |
| 3863 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3864 | + PTR_ADDU "$9, %[pSrcB], %[iSrcBStride] \n\t" | |
| 3865 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3866 | + "gsldlc1 $f0, 0x7($8) \n\t" | |
| 3867 | + "gsldlc1 $f2, 0x7($9) \n\t" | |
| 3868 | + "gsldrc1 $f0, 0x0($8) \n\t" | |
| 3869 | + "gsldrc1 $f2, 0x0($9) \n\t" | |
| 3870 | + "pavgb $f0, $f0, $f2 \n\t" | |
| 3871 | + PTR_ADDU "$10, %[pDst], %[iDstStride] \n\t" | |
| 3872 | + "gssdlc1 $f0, 0x7($10) \n\t" | |
| 3873 | + PTR_ADDU "%[pSrcA], $8, %[iSrcAStride] \n\t" | |
| 3874 | + "gssdrc1 $f0, 0x0($10) \n\t" | |
| 3875 | + PTR_ADDU "%[pSrcB], $9, %[iSrcBStride] \n\t" | |
| 3876 | + PTR_ADDU "%[pDst], $10, %[iDstStride] \n\t" | |
| 3877 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x2 \n\t" | |
| 3878 | + "bnez %[iHeight], 1b \n\t" | |
| 3879 | + : [pDst]"+&r"((unsigned char *)pDst), [pSrcA]"+&r"((unsigned char *)pSrcA), | |
| 3880 | + [pSrcB]"+&r"((unsigned char *)pSrcB), [iHeight]"+&r"((int)iHeight) | |
| 3881 | + : [iDstStride]"r"((int)iDstStride), [iSrcAStride]"r"((int)iSrcAStride), | |
| 3882 | + [iSrcBStride]"r"((int)iSrcBStride) | |
| 3883 | + : "memory", "$8", "$9", "$10", "$f0", "$f2" | |
| 3884 | + ); | |
| 3885 | +} | |
| 3886 | + | |
| 3887 | +void PixelAvgWidthEq16_mmi(uint8_t *pDst, int iDstStride, const uint8_t *pSrcA, | |
| 3888 | + int iSrcAStride, const uint8_t *pSrcB, int iSrcBStride, int iHeight ) { | |
| 3889 | + __asm__ volatile ( | |
| 3890 | + ".set arch=loongson3a \n\t" | |
| 3891 | + "1: \n\t" | |
| 3892 | + "gsldlc1 $f0, 0x7(%[pSrcA]) \n\t" | |
| 3893 | + "gsldlc1 $f2, 0xF(%[pSrcA]) \n\t" | |
| 3894 | + "gsldlc1 $f4, 0x7(%[pSrcB]) \n\t" | |
| 3895 | + "gsldlc1 $f6, 0xF(%[pSrcB]) \n\t" | |
| 3896 | + "gsldrc1 $f0, 0x0(%[pSrcA]) \n\t" | |
| 3897 | + "gsldrc1 $f2, 0x8(%[pSrcA]) \n\t" | |
| 3898 | + "gsldrc1 $f4, 0x0(%[pSrcB]) \n\t" | |
| 3899 | + "gsldrc1 $f6, 0x8(%[pSrcB]) \n\t" | |
| 3900 | + "pavgb $f0, $f0, $f4 \n\t" | |
| 3901 | + "pavgb $f2, $f2, $f6 \n\t" | |
| 3902 | + PTR_ADDU "$8, %[pSrcA], %[iSrcAStride] \n\t" | |
| 3903 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3904 | + "gssdlc1 $f2, 0xF(%[pDst]) \n\t" | |
| 3905 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3906 | + "gssdrc1 $f2, 0x8(%[pDst]) \n\t" | |
| 3907 | + PTR_ADDU "$9, %[pSrcB], %[iSrcBStride] \n\t" | |
| 3908 | + "gsldlc1 $f0, 0x7($8) \n\t" | |
| 3909 | + "gsldlc1 $f2, 0xF($8) \n\t" | |
| 3910 | + "gsldrc1 $f0, 0x0($8) \n\t" | |
| 3911 | + "gsldrc1 $f2, 0x8($8) \n\t" | |
| 3912 | + PTR_ADDU "$10, %[pDst], %[iDstStride] \n\t" | |
| 3913 | + "gsldlc1 $f4, 0x7($9) \n\t" | |
| 3914 | + "gsldlc1 $f6, 0xF($9) \n\t" | |
| 3915 | + "gsldrc1 $f4, 0x0($9) \n\t" | |
| 3916 | + "gsldrc1 $f6, 0x8($9) \n\t" | |
| 3917 | + "pavgb $f0, $f0, $f4 \n\t" | |
| 3918 | + "pavgb $f2, $f2, $f6 \n\t" | |
| 3919 | + "gssdlc1 $f0, 0x7($10) \n\t" | |
| 3920 | + "gssdlc1 $f2, 0xF($10) \n\t" | |
| 3921 | + "gssdrc1 $f0, 0x0($10) \n\t" | |
| 3922 | + "gssdrc1 $f2, 0x8($10) \n\t" | |
| 3923 | + | |
| 3924 | + PTR_ADDU "%[pSrcA], $8, %[iSrcAStride] \n\t" | |
| 3925 | + PTR_ADDU "%[pSrcB], $9, %[iSrcBStride] \n\t" | |
| 3926 | + PTR_ADDU "%[pDst], $10, %[iDstStride] \n\t" | |
| 3927 | + "gsldlc1 $f0, 0x7(%[pSrcA]) \n\t" | |
| 3928 | + "gsldlc1 $f2, 0xF(%[pSrcA]) \n\t" | |
| 3929 | + "gsldlc1 $f4, 0x7(%[pSrcB]) \n\t" | |
| 3930 | + "gsldlc1 $f6, 0xF(%[pSrcB]) \n\t" | |
| 3931 | + "gsldrc1 $f0, 0x0(%[pSrcA]) \n\t" | |
| 3932 | + "gsldrc1 $f2, 0x8(%[pSrcA]) \n\t" | |
| 3933 | + "gsldrc1 $f4, 0x0(%[pSrcB]) \n\t" | |
| 3934 | + "gsldrc1 $f6, 0x8(%[pSrcB]) \n\t" | |
| 3935 | + "pavgb $f0, $f0, $f4 \n\t" | |
| 3936 | + "pavgb $f2, $f2, $f6 \n\t" | |
| 3937 | + PTR_ADDU "$8, %[pSrcA], %[iSrcAStride] \n\t" | |
| 3938 | + PTR_ADDU "$9, %[pSrcB], %[iSrcBStride] \n\t" | |
| 3939 | + "gssdlc1 $f0, 0x7(%[pDst]) \n\t" | |
| 3940 | + "gssdlc1 $f2, 0xF(%[pDst]) \n\t" | |
| 3941 | + "gssdrc1 $f0, 0x0(%[pDst]) \n\t" | |
| 3942 | + "gssdrc1 $f2, 0x8(%[pDst]) \n\t" | |
| 3943 | + "gsldlc1 $f0, 0x7($8) \n\t" | |
| 3944 | + "gsldlc1 $f2, 0xF($8) \n\t" | |
| 3945 | + "gsldlc1 $f4, 0x7($9) \n\t" | |
| 3946 | + "gsldlc1 $f6, 0xF($9) \n\t" | |
| 3947 | + "gsldrc1 $f0, 0x0($8) \n\t" | |
| 3948 | + "gsldrc1 $f2, 0x8($8) \n\t" | |
| 3949 | + "gsldrc1 $f4, 0x0($9) \n\t" | |
| 3950 | + "gsldrc1 $f6, 0x8($9) \n\t" | |
| 3951 | + PTR_ADDU "$10, %[pDst], %[iDstStride] \n\t" | |
| 3952 | + "pavgb $f0, $f0, $f4 \n\t" | |
| 3953 | + "pavgb $f2, $f2, $f6 \n\t" | |
| 3954 | + "gssdlc1 $f0, 0x7($10) \n\t" | |
| 3955 | + "gssdlc1 $f2, 0xF($10) \n\t" | |
| 3956 | + "gssdrc1 $f0, 0x0($10) \n\t" | |
| 3957 | + "gssdrc1 $f2, 0x8($10) \n\t" | |
| 3958 | + PTR_ADDU "%[pSrcA], $8, %[iSrcAStride] \n\t" | |
| 3959 | + PTR_ADDU "%[pSrcB], $9, %[iSrcBStride] \n\t" | |
| 3960 | + PTR_ADDU "%[pDst], $10, %[iDstStride] \n\t" | |
| 3961 | + PTR_ADDIU "%[iHeight], %[iHeight], -0x4 \n\t" | |
| 3962 | + "bnez %[iHeight], 1b \n\t" | |
| 3963 | + : [pDst]"+&r"((unsigned char *)pDst), [pSrcA]"+&r"((unsigned char *)pSrcA), | |
| 3964 | + [pSrcB]"+&r"((unsigned char *)pSrcB), [iHeight]"+&r"((int)iHeight) | |
| 3965 | + : [iDstStride]"r"((int)iDstStride), [iSrcAStride]"r"((int)iSrcAStride), | |
| 3966 | + [iSrcBStride]"r"((int)iSrcBStride) | |
| 3967 | + : "memory", "$8", "$9", "$10", "$f0", "$f2", "$f4", "$f6" | |
| 3968 | + ); | |
| 3969 | +} | |
| 3970 | + | |
| 3971 | +static inline void McHorVer01_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3972 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 3973 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pTmp, 256, 16); | |
| 3974 | + if (iWidth == 16) { | |
| 3975 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3976 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3977 | + } else if (iWidth == 8) { | |
| 3978 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3979 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3980 | + } else { | |
| 3981 | + McHorVer02_c (pSrc, iSrcStride, pTmp, 16, 4, iHeight); | |
| 3982 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3983 | + } | |
| 3984 | +} | |
| 3985 | + | |
| 3986 | +static inline void McHorVer03_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 3987 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 3988 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pTmp, 256, 16); | |
| 3989 | + if (iWidth == 16) { | |
| 3990 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3991 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pSrc + iSrcStride, iSrcStride, pTmp, 16, iHeight); | |
| 3992 | + } else if (iWidth == 8) { | |
| 3993 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 3994 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pSrc + iSrcStride, iSrcStride, pTmp, 16, iHeight); | |
| 3995 | + } else { | |
| 3996 | + McHorVer02_c (pSrc, iSrcStride, pTmp, 16, 4, iHeight); | |
| 3997 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pSrc + iSrcStride, iSrcStride, pTmp, 16, iHeight); | |
| 3998 | + } | |
| 3999 | +} | |
| 4000 | + | |
| 4001 | +static inline void McHorVer10_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4002 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4003 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pTmp, 256, 16); | |
| 4004 | + if (iWidth == 16) { | |
| 4005 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4006 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4007 | + } else if (iWidth == 8) { | |
| 4008 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4009 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4010 | + } else { | |
| 4011 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4012 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pSrc, iSrcStride, pTmp, 16, iHeight); | |
| 4013 | + } | |
| 4014 | +} | |
| 4015 | + | |
| 4016 | +static inline void McHorVer11_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4017 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4018 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4019 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4020 | + if (iWidth == 16) { | |
| 4021 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4022 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4023 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4024 | + } else if (iWidth == 8) { | |
| 4025 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4026 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4027 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4028 | + } else { | |
| 4029 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4030 | + McHorVer02_c (pSrc, iSrcStride, pVerTmp, 16, 4, iHeight); | |
| 4031 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4032 | + } | |
| 4033 | +} | |
| 4034 | + | |
| 4035 | +static inline void McHorVer12_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4036 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4037 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4038 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pCtrTmp, 256, 16); | |
| 4039 | + if (iWidth == 16) { | |
| 4040 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4041 | + McHorVer22WidthEq16_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4042 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4043 | + } else if (iWidth == 8) { | |
| 4044 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4045 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4046 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4047 | + } else { | |
| 4048 | + McHorVer02_c (pSrc, iSrcStride, pVerTmp, 16, 4, iHeight); | |
| 4049 | + McHorVer22_c (pSrc, iSrcStride, pCtrTmp, 16, 4, iHeight); | |
| 4050 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4051 | + } | |
| 4052 | +} | |
| 4053 | +static inline void McHorVer13_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4054 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4055 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4056 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4057 | + if (iWidth == 16) { | |
| 4058 | + McHorVer20WidthEq16_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4059 | + McHorVer02WidthEq16_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4060 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4061 | + } else if (iWidth == 8) { | |
| 4062 | + McHorVer20WidthEq8_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4063 | + McHorVer02WidthEq8_mmi (pSrc, iSrcStride, pVerTmp, 16, iHeight); | |
| 4064 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4065 | + } else { | |
| 4066 | + McHorVer20WidthEq4_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4067 | + McHorVer02_c (pSrc, iSrcStride, pVerTmp, 16, 4 , iHeight); | |
| 4068 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4069 | + } | |
| 4070 | +} | |
| 4071 | +static inline void McHorVer21_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4072 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4073 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4074 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pCtrTmp, 256, 16); | |
| 4075 | + if (iWidth == 16) { | |
| 4076 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4077 | + McHorVer22WidthEq16_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4078 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4079 | + } else if (iWidth == 8) { | |
| 4080 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4081 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4082 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4083 | + } else { | |
| 4084 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4085 | + McHorVer22_c (pSrc, iSrcStride, pCtrTmp, 16, 4, iHeight); | |
| 4086 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4087 | + } | |
| 4088 | +} | |
| 4089 | + | |
| 4090 | +static inline void McHorVer23_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4091 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4092 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4093 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pCtrTmp, 256, 16); | |
| 4094 | + if (iWidth == 16) { | |
| 4095 | + McHorVer20WidthEq16_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4096 | + McHorVer22WidthEq16_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4097 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4098 | + } else if (iWidth == 8) { | |
| 4099 | + McHorVer20WidthEq8_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4100 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4101 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4102 | + } else { | |
| 4103 | + McHorVer20WidthEq4_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4104 | + McHorVer22_c (pSrc, iSrcStride, pCtrTmp, 16, 4, iHeight); | |
| 4105 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pCtrTmp, 16, iHeight); | |
| 4106 | + } | |
| 4107 | +} | |
| 4108 | +static inline void McHorVer30_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4109 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4110 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4111 | + if (iWidth == 16) { | |
| 4112 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4113 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pSrc + 1, iSrcStride, pHorTmp, 16, iHeight); | |
| 4114 | + } else if (iWidth == 8) { | |
| 4115 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4116 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pSrc + 1, iSrcStride, pHorTmp, 16, iHeight); | |
| 4117 | + } else { | |
| 4118 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4119 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pSrc + 1, iSrcStride, pHorTmp, 16, iHeight); | |
| 4120 | + } | |
| 4121 | +} | |
| 4122 | +static inline void McHorVer31_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4123 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4124 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4125 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4126 | + if (iWidth == 16) { | |
| 4127 | + McHorVer20WidthEq16_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4128 | + McHorVer02WidthEq16_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4129 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4130 | + } else if (iWidth == 8) { | |
| 4131 | + McHorVer20WidthEq8_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4132 | + McHorVer02WidthEq8_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4133 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4134 | + } else { | |
| 4135 | + McHorVer20WidthEq4_mmi (pSrc, iSrcStride, pHorTmp, 16, iHeight); | |
| 4136 | + McHorVer02_c (pSrc + 1, iSrcStride, pVerTmp, 16, 4, iHeight); | |
| 4137 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4138 | + } | |
| 4139 | +} | |
| 4140 | +static inline void McHorVer32_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4141 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4142 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4143 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pCtrTmp, 256, 16); | |
| 4144 | + if (iWidth == 16) { | |
| 4145 | + McHorVer02WidthEq16_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4146 | + McHorVer22WidthEq16_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4147 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4148 | + } else if (iWidth == 8) { | |
| 4149 | + McHorVer02WidthEq8_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4150 | + McHorVer22WidthEq8_mmi (pSrc, iSrcStride, pCtrTmp, 16, iHeight); | |
| 4151 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4152 | + } else { | |
| 4153 | + McHorVer02_c (pSrc + 1, iSrcStride, pVerTmp, 16, 4, iHeight); | |
| 4154 | + McHorVer22_c (pSrc, iSrcStride, pCtrTmp, 16, 4, iHeight); | |
| 4155 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pVerTmp, 16, pCtrTmp, 16, iHeight); | |
| 4156 | + } | |
| 4157 | +} | |
| 4158 | +static inline void McHorVer33_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, | |
| 4159 | + int32_t iDstStride, int32_t iWidth, int32_t iHeight) { | |
| 4160 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pHorTmp, 256, 16); | |
| 4161 | + ENFORCE_STACK_ALIGN_1D (uint8_t, pVerTmp, 256, 16); | |
| 4162 | + if (iWidth == 16) { | |
| 4163 | + McHorVer20WidthEq16_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4164 | + McHorVer02WidthEq16_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4165 | + PixelAvgWidthEq16_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4166 | + } else if (iWidth == 8) { | |
| 4167 | + McHorVer20WidthEq8_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4168 | + McHorVer02WidthEq8_mmi (pSrc + 1, iSrcStride, pVerTmp, 16, iHeight); | |
| 4169 | + PixelAvgWidthEq8_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4170 | + } else { | |
| 4171 | + McHorVer20WidthEq4_mmi (pSrc + iSrcStride, iSrcStride, pHorTmp, 16, iHeight); | |
| 4172 | + McHorVer02_c (pSrc + 1, iSrcStride, pVerTmp, 16, 4, iHeight); | |
| 4173 | + PixelAvgWidthEq4_mmi (pDst, iDstStride, pHorTmp, 16, pVerTmp, 16, iHeight); | |
| 4174 | + } | |
| 4175 | +} | |
| 4176 | + | |
| 4177 | +void McLuma_mmi(const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_t iDstStride, | |
| 4178 | + int16_t iMvX, int16_t iMvY, int32_t iWidth, int32_t iHeight) { | |
| 4179 | + static const PWelsMcWidthHeightFunc pWelsMcFunc[4][4] = { //[x][y] | |
| 4180 | + {McCopy_mmi, McHorVer01_mmi, McHorVer02_mmi, McHorVer03_mmi}, | |
| 4181 | + {McHorVer10_mmi, McHorVer11_mmi, McHorVer12_mmi, McHorVer13_mmi}, | |
| 4182 | + {McHorVer20_mmi, McHorVer21_mmi, McHorVer22_mmi, McHorVer23_mmi}, | |
| 4183 | + {McHorVer30_mmi, McHorVer31_mmi, McHorVer32_mmi, McHorVer33_mmi}, | |
| 4184 | + }; | |
| 4185 | + | |
| 4186 | + pWelsMcFunc[iMvX & 0x03][iMvY & 0x03] (pSrc, iSrcStride, pDst, iDstStride, iWidth, iHeight); | |
| 4187 | +} | |
| 4188 | + | |
| 4189 | +void PixelAvg_mmi(uint8_t* pDst, int32_t iDstStride, const uint8_t* pSrcA, int32_t iSrcAStride, | |
| 4190 | + const uint8_t* pSrcB, int32_t iSrcBStride, int32_t iWidth, int32_t iHeight) { | |
| 4191 | + static const PWelsSampleWidthAveragingFunc kpfFuncs[2] = { | |
| 4192 | + PixelAvgWidthEq8_mmi, | |
| 4193 | + PixelAvgWidthEq16_mmi | |
| 4194 | + }; | |
| 4195 | + kpfFuncs[iWidth >> 4] (pDst, iDstStride, pSrcA, iSrcAStride, pSrcB, iSrcBStride, iHeight); | |
| 4196 | +} | |
| 4197 | +#endif//HAVE_MMI | |
| 1662 | 4198 | } // anon ns. |
| 1663 | 4199 | |
| 1664 | 4200 | void WelsCommon::InitMcFunc (SMcFunc* pMcFuncs, uint32_t uiCpuFlag) { |
| @@ -1716,4 +4252,15 @@ void WelsCommon::InitMcFunc (SMcFunc* pMcFuncs, uint32_t uiCpuFlag) { · 51 unmodified lines | ||
| 1716 | 4252 | pMcFuncs->pfLumaHalfpelCen = McHorVer22Width5Or9Or17Height5Or9Or17_AArch64_neon;//iWidth+1/heigh+1 |
| 1717 | 4253 | } |
| 1718 | 4254 | #endif |
| 4255 | + | |
| 4256 | +#if defined(HAVE_MMI) | |
| 4257 | + if (uiCpuFlag & WELS_CPU_MMI) { | |
| 4258 | + pMcFuncs->pfLumaHalfpelHor = McHorVer20Width5Or9Or17_mmi; | |
| 4259 | + pMcFuncs->pfLumaHalfpelVer = McHorVer02Height5Or9Or17_mmi; | |
| 4260 | + pMcFuncs->pfLumaHalfpelCen = McHorVer22Width5Or9Or17Height5Or9Or17_mmi; | |
| 4261 | + pMcFuncs->pfSampleAveraging = PixelAvg_mmi; | |
| 4262 | + pMcFuncs->pMcChromaFunc = McChroma_mmi; | |
| 4263 | + pMcFuncs->pMcLumaFunc = McLuma_mmi; | |
| 4264 | + } | |
| 4265 | +#endif//HAVE_MMI | |
| 1719 | 4266 | } |