History

Add arm64 code for downsample.

zhiliang wang committed 12 years ago

Commit 5cb66bd1 parent f6385466 files · +292 −2Browse files

Showing the changes to codec/processing/src (4 of 6 files). Show all

Unified · Split

4 files
  1. codec/processing/src/arm64/down_sample_aarch64_neon.S +226 −0
  2. codec/processing/src/downsample/downsample.cpp +11 −0
  3. codec/processing/src/downsample/downsample.h +15 −0
  4. codec/processing/src/downsample/downsamplefuncs.cpp +11 −0
codec/processing/src/arm64/down_sample_aarch64_neon.S+226−0
@@ -0,0 +1,226 @@
1/*!
2 * \copy
3 * Copyright (c) 2013, Cisco Systems
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
26 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
28 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 *
31 */
32
33#ifdef HAVE_NEON_AARCH64
34.text
35#include "arm_arch64_common_macro.S"
36
37WELS_ASM_AARCH64_FUNC_BEGIN DyadicBilinearDownsampler_AArch64_neon
38
39 //Initialize the register
40 mov x6, x2
41 mov x8, x0
42 mov w9, #0
43 lsr w5, w5, #1
44
45 //Save the tailer for the unasigned size
46 smaddl x7, w1, w5, x0
47 ld1 {v4.16b}, [x7]
48
49 add x7, x2, w3, sxtw
50 //processing a colume data
51comp_ds_bilinear_loop0:
52
53 ld1 {v0.16b, v1.16b}, [x2], #32
54 ld1 {v2.16b, v3.16b}, [x7], #32
55 uaddlp v0.8h, v0.16b
56 uaddlp v1.8h, v1.16b
57 uaddlp v2.8h, v2.16b
58 uaddlp v3.8h, v3.16b
59 urshr v0.8h, v0.8h, #1
60 urshr v1.8h, v1.8h, #1
61 urshr v2.8h, v2.8h, #1
62 urshr v3.8h, v3.8h, #1
63 urhadd v0.8h, v0.8h, v2.8h
64 urhadd v1.8h, v1.8h, v3.8h
65 xtn v0.8b, v0.8h
66 xtn v1.8b, v1.8h
67 st1 {v0.8b, v1.8b}, [x0], #16
68 add w9, w9, #32
69
70 cmp w9, w4
71 b.cc comp_ds_bilinear_loop0
72
73 mov w9, #0
74 add x6, x6, w3, sxtw #1
75 mov x2, x6
76 add x7, x2, w3, sxtw
77 add x8, x8, w1, sxtw
78 mov x0, x8
79 sub w5, w5, #1
80
81 cbnz w5, comp_ds_bilinear_loop0
82
83 //restore the tailer for the unasigned size
84 st1 {v4.16b}, [x0]
85
86WELS_ASM_AARCH64_FUNC_END
87
88
89WELS_ASM_AARCH64_FUNC_BEGIN DyadicBilinearDownsamplerWidthx32_AArch64_neon
90 sub w9, w3, w4
91 sub w1, w1, w4, lsr #1
92 lsr w5, w5, #1
93
94 //processing a colume data
95comp_ds_bilinear_w_x32_loop0:
96
97 lsr w6, w4, #5
98 add x7, x2, w3, sxtw
99 //processing a line data
100comp_ds_bilinear_w_x32_loop1:
101
102 ld1 {v0.16b, v1.16b}, [x2], #32
103 ld1 {v2.16b, v3.16b}, [x7], #32
104 uaddlp v0.8h, v0.16b
105 uaddlp v1.8h, v1.16b
106 uaddlp v2.8h, v2.16b
107 uaddlp v3.8h, v3.16b
108 urshr v0.8h, v0.8h, #1
109 urshr v1.8h, v1.8h, #1
110 urshr v2.8h, v2.8h, #1
111 urshr v3.8h, v3.8h, #1
112 urhadd v0.8h, v0.8h, v2.8h
113 urhadd v1.8h, v1.8h, v3.8h
114 xtn v0.8b, v0.8h
115 xtn v1.8b, v1.8h
116 st1 {v0.8b, v1.8b}, [x0], #16
117
118 sub w6, w6, #1
119 cbnz w6, comp_ds_bilinear_w_x32_loop1
120
121 add x2, x7, w9, sxtw
122 add x0, x0, w1, sxtw
123 sub w5, w5, #1
124 cbnz w5, comp_ds_bilinear_w_x32_loop0
125WELS_ASM_AARCH64_FUNC_END
126
127WELS_ASM_AARCH64_FUNC_BEGIN GeneralBilinearAccurateDownsampler_AArch64_neon
128 mov w10, #32767
129 and w8, w6, w10
130 mov w11, #-1
131 mul w12, w11, w8
132
133 dup v2.4h, w8
134 dup v0.4h, w12
135 zip1 v0.4h, v0.4h, v2.4h // uinc -uinc uinc -uinc
136
137 and w9, w7, w10
138 mul w12, w11, w9
139
140 dup v2.4h, w9
141 dup v5.4h, w12
142 ins v5.s[1], v2.s[0] // vinc vinc -vinc -vinc
143
144 mov w11, #0x40000000
145 mov w12, #0x3FFF
146 add w11, w11, w12
147 dup v1.2s, w11 //init u 16384 16383 16384 16383
148
149 mov w8, #16384
150 dup v7.4h, w8
151 sub w11, w8, #1
152 dup v2.4h, w11
153 ins v7.s[0], v2.s[0] //init v 16384 16384 16383 16383
154
155 eor v26.16b, v26.16b, v26.16b
156 eor v27.16b, v27.16b, v27.16b
157 sub x1, x1, x2
158 sub x3, x3, #1
159
160_HEIGHT:
161 lsr w11, w8, #15
162 mul w11, w11, w5
163 add x15, x4, w11, sxtw
164 add x12, x15, w5, sxtw
165
166 mov x9, #16384
167 sub x10, x2, #1
168 orr v6.8b, v1.8b, v1.8b
169
170_WIDTH:
171 lsr x13, x9, #15
172 add x14, x15, x13
173 ld2 {v26.b, v27.b}[0], [x14] //q14: 0000000b0000000a;
174 add x14, x12, x13
175 ld2 {v26.b, v27.b}[4], [x14] //q14: 000d000b000c000a;
176 zip1 v28.2s, v26.2s, v27.2s
177 zip2 v29.2s, v26.2s, v27.2s
178
179 umull v20.4s, v6.4h, v7.4h
180 umull v21.2d, v28.2s, v20.2s
181 ins v20.d[0], v20.d[1]
182 umlal v21.2d, v29.2s, v20.2s
183
184 addp d21, v21.2d
185 urshr d21, d21, #30
186
187 st1 {v21.b}[0], [x0], #1
188 add x9, x9, x6
189 add v6.4h, v6.4h, v0.4h
190 shl v6.4h, v6.4h, #1
191 ushr v6.4h, v6.4h, #1
192 sub x10, x10, #1
193 cbnz x10, _WIDTH
194
195WIDTH_END:
196 lsr x9, x9, #15
197 add x14, x15, x9
198 ld1 {v21.b}[0], [x14]
199 st1 {v21.b}[0], [x0], #1
200 add w8, w8, w7
201 add x0, x0, x1
202 add v7.4h, v7.4h, v5.4h
203 shl v7.4h, v7.4h, #1
204 ushr v7.4h, v7.4h, #1
205 sub x3, x3, #1
206 cbnz x3, _HEIGHT
207
208LAST_ROW:
209 lsr w8, w8, #15
210 mul w8, w8, w5
211 add x4, x4, w8, sxtw
212 mov x9, #16384
213
214_LAST_ROW_WIDTH:
215 mov x11, x9
216 lsr x11, x11, #15
217 add x3, x4, x11
218 ld1 {v21.b}[0], [x3]
219 st1 {v21.b}[0], [x0], #1
220 add x9, x9, x6
221 sub x2, x2, #1
222 cbnz x2, _LAST_ROW_WIDTH
223
224WELS_ASM_AARCH64_FUNC_END
225
226#endif
codec/processing/src/downsample/downsample.cpp+11−0
@@ -85,6 +85,17 @@ void CDownsampling::InitDownsampleFuncs (SDownsampleFuncs& sDownsampleFunc, int · 84 unmodified lines
85 sDownsampleFunc.pfGeneralRatioLuma = GeneralBilinearAccurateDownsamplerWrap_neon;85 sDownsampleFunc.pfGeneralRatioLuma = GeneralBilinearAccurateDownsamplerWrap_neon;
86 }86 }
87#endif87#endif
88
89#if defined(HAVE_NEON_AARCH64)
90 if (iCpuFlag & WELS_CPU_NEON) {
91 sDownsampleFunc.pfHalfAverage[0] = DyadicBilinearDownsamplerWidthx32_AArch64_neon;
92 sDownsampleFunc.pfHalfAverage[1] = DyadicBilinearDownsampler_AArch64_neon;
93 sDownsampleFunc.pfHalfAverage[2] = DyadicBilinearDownsampler_AArch64_neon;
94 sDownsampleFunc.pfHalfAverage[3] = DyadicBilinearDownsampler_AArch64_neon;
95 sDownsampleFunc.pfGeneralRatioChroma = GeneralBilinearAccurateDownsamplerWrap_AArch64_neon;
96 sDownsampleFunc.pfGeneralRatioLuma = GeneralBilinearAccurateDownsamplerWrap_AArch64_neon;
97 }
98#endif
88}99}
89 100
90EResult CDownsampling::Process (int32_t iType, SPixMap* pSrcPixMap, SPixMap* pDstPixMap) {101EResult CDownsampling::Process (int32_t iType, SPixMap* pSrcPixMap, SPixMap* pDstPixMap) {
codec/processing/src/downsample/downsample.h+15−0
@@ -120,6 +120,21 @@ void GeneralBilinearAccurateDownsampler_neon (uint8_t* pDst, const int32_t kiDst · 119 unmodified lines
120WELSVP_EXTERN_C_END120WELSVP_EXTERN_C_END
121#endif121#endif
122 122
123#ifdef HAVE_NEON_AARCH64
124WELSVP_EXTERN_C_BEGIN
125// iSrcWidth no limitation
126HalveDownsampleFunc DyadicBilinearDownsampler_AArch64_neon;
127// iSrcWidth = x32 pixels
128HalveDownsampleFunc DyadicBilinearDownsamplerWidthx32_AArch64_neon;
129
130GeneralDownsampleFunc GeneralBilinearAccurateDownsamplerWrap_AArch64_neon;
131
132void GeneralBilinearAccurateDownsampler_AArch64_neon (uint8_t* pDst, const int32_t kiDstStride, const int32_t kiDstWidth, const int32_t kiDstHeight,
133 uint8_t* pSrc, const int32_t kiSrcStride, const uint32_t kuiScaleX, const uint32_t kuiScaleY);
134
135WELSVP_EXTERN_C_END
136#endif
137
123 138
124class CDownsampling : public IStrategy {139class CDownsampling : public IStrategy {
125 public:140 public:
codec/processing/src/downsample/downsamplefuncs.cpp+11−0
@@ -241,4 +241,15 @@ void GeneralBilinearAccurateDownsamplerWrap_neon (uint8_t* pDst, const int32_t k · 240 unmodified lines
241 uiScaley);241 uiScaley);
242}242}
243#endif243#endif
244
245#ifdef HAVE_NEON_AARCH64
246void GeneralBilinearAccurateDownsamplerWrap_AArch64_neon (uint8_t* pDst, const int32_t kiDstStride, const int32_t kiDstWidth, const int32_t kiDstHeight,
247 uint8_t* pSrc, const int32_t kiSrcStride, const int32_t kiSrcWidth, const int32_t kiSrcHeight) {
248 const int32_t kiScaleBit = 15;
249 const uint32_t kuiScale = (1 << kiScaleBit);
250 uint32_t uiScalex = WELS_ROUND ((float)kiSrcWidth / (float)kiDstWidth * kuiScale);
251 uint32_t uiScaley = WELS_ROUND ((float)kiSrcHeight / (float)kiDstHeight * kuiScale);
252 GeneralBilinearAccurateDownsampler_AArch64_neon (pDst, kiDstStride, kiDstWidth, kiDstHeight, pSrc, kiSrcStride, uiScalex, uiScaley);
253}
254#endif
244WELSVP_NAMESPACE_END255WELSVP_NAMESPACE_END

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t