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| 1 | /*! | ||
| 2 | * \copy | ||
| 3 | * Copyright (c) 2009-2013, Cisco Systems | ||
| 4 | * All rights reserved. | ||
| 5 | * | ||
| 6 | * Redistribution and use in source and binary forms, with or without | ||
| 7 | * modification, are permitted provided that the following conditions | ||
| 8 | * are met: | ||
| 9 | * | ||
| 10 | * * Redistributions of source code must retain the above copyright | ||
| 11 | * notice, this list of conditions and the following disclaimer. | ||
| 12 | * | ||
| 13 | * * Redistributions in binary form must reproduce the above copyright | ||
| 14 | * notice, this list of conditions and the following disclaimer in | ||
| 15 | * the documentation and/or other materials provided with the | ||
| 16 | * distribution. | ||
| 17 | * | ||
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
| 19 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
| 20 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | ||
| 21 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | ||
| 22 | * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 23 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
| 24 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||
| 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
| 27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | ||
| 28 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
| 29 | * POSSIBILITY OF SUCH DAMAGE. | ||
| 30 | * | ||
| 31 | * | ||
| 32 | * \file cpu.c | ||
| 33 | * | ||
| 34 | * \brief CPU compatibility detection | ||
| 35 | * | ||
| 36 | * \date 04/29/2009 Created | ||
| 37 | * | ||
| 38 | ************************************************************************************* | ||
| 39 | */ | ||
| 40 | |||
| 41 | #include <string.h> | ||
| 42 | |||
| 43 | #include "cpu.h" | ||
| 44 | #include "cpu_core.h" | ||
| 45 | |||
| 46 | |||
| 47 | namespace WelsSVCEnc { | ||
| 48 | #define CPU_Vender_AMD "AuthenticAMD" | ||
| 49 | #define CPU_Vender_INTEL "GenuineIntel" | ||
| 50 | #define CPU_Vender_CYRIX "CyrixInstead" | ||
| 51 | |||
| 52 | |||
| 53 | #if defined(X86_ASM) | ||
| 54 | |||
| 55 | uint32_t WelsCPUFeatureDetect( int32_t *pNumberOfLogicProcessors ) | ||
| 56 | { | ||
| 57 | uint32_t uiCPU = 0; | ||
| 58 | uint32_t uiFeatureA = 0, uiFeatureB = 0, uiFeatureC = 0, uiFeatureD = 0; | ||
| 59 | int32_t CacheLineSize = 0; | ||
| 60 | int8_t chVenderName[16] = { 0 }; | ||
| 61 | |||
| 62 | if( !WelsCPUIdVerify() ) | ||
| 63 | { | ||
| 64 | /* cpuid is not supported in cpu */ | ||
| 65 | return 0; | ||
| 66 | } | ||
| 67 | |||
| 68 | WelsCPUId( 0, &uiFeatureA, (uint32_t*)&chVenderName[0],(uint32_t*)&chVenderName[8],(uint32_t*)&chVenderName[4] ); | ||
| 69 | if( uiFeatureA == 0 ) | ||
| 70 | { | ||
| 71 | /* maximum input value for basic cpuid information */ | ||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | |||
| 75 | WelsCPUId( 1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD ); | ||
| 76 | if( (uiFeatureD & 0x00800000) == 0 ) | ||
| 77 | { | ||
| 78 | /* Basic MMX technology is not support in cpu, mean nothing for us so return here */ | ||
| 79 | return 0; | ||
| 80 | } | ||
| 81 | |||
| 82 | uiCPU = WELS_CPU_MMX; | ||
| 83 | if( uiFeatureD & 0x02000000 ) | ||
| 84 | { | ||
| 85 | /* SSE technology is identical to AMD MMX extensions */ | ||
| 86 | uiCPU |= WELS_CPU_MMXEXT|WELS_CPU_SSE; | ||
| 87 | } | ||
| 88 | if( uiFeatureD & 0x04000000 ) | ||
| 89 | { | ||
| 90 | /* SSE2 support here */ | ||
| 91 | uiCPU |= WELS_CPU_SSE2; | ||
| 92 | } | ||
| 93 | if ( uiFeatureD & 0x00000001 ) | ||
| 94 | { | ||
| 95 | /* x87 FPU on-chip checking */ | ||
| 96 | uiCPU |= WELS_CPU_FPU; | ||
| 97 | } | ||
| 98 | if ( uiFeatureD & 0x00008000 ) | ||
| 99 | { | ||
| 100 | /* CMOV instruction checking */ | ||
| 101 | uiCPU |= WELS_CPU_CMOV; | ||
| 102 | } | ||
| 103 | if ( !strcmp((const str_t*)chVenderName,CPU_Vender_INTEL) ) // confirmed_safe_unsafe_usage | ||
| 104 | { | ||
| 105 | if ( uiFeatureD & 0x10000000 ) | ||
| 106 | { | ||
| 107 | /* Multi-Threading checking: contains of multiple logic processors */ | ||
| 108 | uiCPU |= WELS_CPU_HTT; | ||
| 109 | } | ||
| 110 | } | ||
| 111 | |||
| 112 | if( uiFeatureC & 0x00000001 ){ | ||
| 113 | /* SSE3 support here */ | ||
| 114 | uiCPU |= WELS_CPU_SSE3; | ||
| 115 | } | ||
| 116 | if( uiFeatureC & 0x00000200 ){ | ||
| 117 | /* SSSE3 support here */ | ||
| 118 | uiCPU |= WELS_CPU_SSSE3; | ||
| 119 | } | ||
| 120 | if( uiFeatureC & 0x00080000 ){ | ||
| 121 | /* SSE4.1 support here, 45nm Penryn processor */ | ||
| 122 | uiCPU |= WELS_CPU_SSE41; | ||
| 123 | } | ||
| 124 | if( uiFeatureC & 0x00100000 ){ | ||
| 125 | /* SSE4.2 support here, next generation Nehalem processor */ | ||
| 126 | uiCPU |= WELS_CPU_SSE42; | ||
| 127 | } | ||
| 128 | if ( WelsCPUSupportAVX( uiFeatureA, uiFeatureC ) ) // | ||
| 129 | { | ||
| 130 | /* AVX supported */ | ||
| 131 | uiCPU |= WELS_CPU_AVX; | ||
| 132 | } | ||
| 133 | if ( WelsCPUSupportFMA( uiFeatureA, uiFeatureC ) ) // | ||
| 134 | { | ||
| 135 | /* AVX FMA supported */ | ||
| 136 | uiCPU |= WELS_CPU_FMA; | ||
| 137 | } | ||
| 138 | if ( uiFeatureC & 0x02000000 ) | ||
| 139 | { | ||
| 140 | /* AES checking */ | ||
| 141 | uiCPU |= WELS_CPU_AES; | ||
| 142 | } | ||
| 143 | if ( uiFeatureC & 0x00400000 ) | ||
| 144 | { | ||
| 145 | /* MOVBE checking */ | ||
| 146 | uiCPU |= WELS_CPU_MOVBE; | ||
| 147 | } | ||
| 148 | |||
| 149 | if ( pNumberOfLogicProcessors != NULL ) | ||
| 150 | { | ||
| 151 | // HTT enabled on chip | ||
| 152 | *pNumberOfLogicProcessors = (uiFeatureB & 0x00ff0000) >> 16; // feature bits: 23-16 on returned EBX | ||
| 153 | } | ||
| 154 | |||
| 155 | WelsCPUId( 0x80000000, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD ); | ||
| 156 | |||
| 157 | if( (!strcmp((const str_t*)chVenderName,CPU_Vender_AMD)) && (uiFeatureA>=0x80000001) ){ // confirmed_safe_unsafe_usage | ||
| 158 | WelsCPUId(0x80000001, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD ); | ||
| 159 | if( uiFeatureD&0x00400000 ){ | ||
| 160 | uiCPU |= WELS_CPU_MMXEXT; | ||
| 161 | } | ||
| 162 | if( uiFeatureD&0x80000000 ){ | ||
| 163 | uiCPU |= WELS_CPU_3DNOW; | ||
| 164 | } | ||
| 165 | } | ||
| 166 | |||
| 167 | if( !strcmp((const str_t*)chVenderName,CPU_Vender_INTEL) ){ // confirmed_safe_unsafe_usage | ||
| 168 | int32_t family, model; | ||
| 169 | |||
| 170 | WelsCPUId(1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 171 | family = ((uiFeatureA>>8)&0xf) + ((uiFeatureA>>20)&0xff); | ||
| 172 | model = ((uiFeatureA>>4)&0xf) + ((uiFeatureA>>12)&0xf0); | ||
| 173 | |||
| 174 | if( (family==6) && (model==9 || model==13 || model==14) ){ | ||
| 175 | uiCPU &= ~(WELS_CPU_SSE2|WELS_CPU_SSE3); | ||
| 176 | } | ||
| 177 | } | ||
| 178 | |||
| 179 | // get cache line size | ||
| 180 | if( (!strcmp((const str_t*)chVenderName,CPU_Vender_INTEL)) || !(strcmp((const str_t*)chVenderName,CPU_Vender_CYRIX)) ){ // confirmed_safe_unsafe_usage | ||
| 181 | WelsCPUId(1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 182 | |||
| 183 | CacheLineSize = (uiFeatureB&0xff00)>>5; // ((clflush_line_size >> 8) << 3), CLFLUSH_line_size * 8 = CacheLineSize_in_byte | ||
| 184 | |||
| 185 | if( CacheLineSize == 128 ){ | ||
| 186 | uiCPU |= WELS_CPU_CACHELINE_128; | ||
| 187 | } | ||
| 188 | else if( CacheLineSize == 64 ){ | ||
| 189 | uiCPU |= WELS_CPU_CACHELINE_64; | ||
| 190 | } | ||
| 191 | else if( CacheLineSize == 32 ){ | ||
| 192 | uiCPU |= WELS_CPU_CACHELINE_32; | ||
| 193 | } | ||
| 194 | else if( CacheLineSize == 16 ){ | ||
| 195 | uiCPU |= WELS_CPU_CACHELINE_16; | ||
| 196 | } | ||
| 197 | } | ||
| 198 | |||
| 199 | return uiCPU; | ||
| 200 | } | ||
| 201 | |||
| 202 | |||
| 203 | void WelsCPURestore( const uint32_t kuiCPU ) | ||
| 204 | { | ||
| 205 | if( kuiCPU & (WELS_CPU_MMX|WELS_CPU_MMXEXT|WELS_CPU_3DNOW|WELS_CPU_3DNOWEXT) ) | ||
| 206 | { | ||
| 207 | WelsEmms(); | ||
| 208 | } | ||
| 209 | } | ||
| 210 | |||
| 211 | #endif | ||
| 212 | |||
| 213 | } | ||