Remap registers to avoid clobbering the neon registers q4-q7

According to the calling convention, the registers q4-q7 should be preserved by functions. The caller (generated by the compiler) could be using those registers anywhere for any intermediate data. Functions that use 12 or less of the qX registers can avoid violating the calling convention by simply using other registers instead of the callee saved registers q4-q7. This change only remaps the registers used within functions - therefore this does not affect performance at all. E.g. in functions using registers q0-q7, we now use q0-q3 and q8-q11 instead.

Martin Storsjö committed 12 years ago

Commit 811c6471 parent ca457f59 files · +513 −513Browse files

Showing the changes to codec/processing/src (2 of 9 files). Show all

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2 files

codec/processing/src/arm/down_sample_neon.S +3 −3
codec/processing/src/arm/vaa_calc_neon.S +5 −5

codec/processing/src/arm/down_sample_neon.S+3−3

@@ -257,10 +257,10 @@ WELS_ASM_FUNC_BEGIN GeneralBilinearAccurateDownsampler_neon · 256 unmodified lines
257	257	vdup.s32 d1, r11; //init u 16384 16383 16384 16383
258	258
259	259	mov r11, #16384
260		− vdup.s16 d8, r11
	260	+ vdup.s16 d16, r11
261	261	sub r11, #1
262		− vdup.s16 d9, r11
263		− vext.8 d7, d9, d8, #4 //init v 16384 16384 16383 16383
	262	+ vdup.s16 d17, r11
	263	+ vext.8 d7, d17, d16, #4 //init v 16384 16384 16383 16383
264	264
265	265	veor q14, q14
266	266	sub r1, r2 // stride - width

codec/processing/src/arm/vaa_calc_neon.S+5−5

@@ -103,8 +103,8 @@ WELS_ASM_FUNC_BEGIN VAACalcSad_neon · 102 unmodified lines
103	103	ldr r4, [sp, #20] //load pic_stride
104	104	ldr r5, [sp, #28] //load psad8x8
105	105
106		− //Initial the Q4 register for save the "psadframe"
107		− vmov.s64 q4, #0
	106	+ //Initial the Q8 register for save the "psadframe"
	107	+ vmov.s64 q8, #0
108	108
109	109	//Get the jump distance to use on loop codes
110	110	lsl r8, r4, #4
@@ -140,7 +140,7 @@ vaa_calc_sad_loop1: · 29 unmodified lines
140	140
141	141	//Save to calculate "psadframe"
142	142	vadd.u32 q0, q1
143		− vadd.u32 q4, q0
	143	+ vadd.u32 q8, q0
144	144
145	145	bne vaa_calc_sad_loop1
146	146
@@ -152,8 +152,8 @@ vaa_calc_sad_loop1: · 5 unmodified lines
152	152	bne vaa_calc_sad_loop0
153	153
154	154	ldr r6, [sp, #24] //load psadframe
155		− vadd.u32 d8, d9
156		− vst1.32 {d8[0]}, [r6]
	155	+ vadd.u32 d16, d17
	156	+ vst1.32 {d16[0]}, [r6]
157	157
158	158	ldmia sp!, {r4-r8}
159	159

Remap registers to avoid clobbering the neon registers q4-q7

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