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| 1 | +/*! |
| 2 | + * \copy |
| 3 | + * Copyright (c) 2013, Cisco Systems |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * Redistribution and use in source and binary forms, with or without |
| 7 | + * modification, are permitted provided that the following conditions |
| 8 | + * are met: |
| 9 | + * |
| 10 | + * * Redistributions of source code must retain the above copyright |
| 11 | + * notice, this list of conditions and the following disclaimer. |
| 12 | + * |
| 13 | + * * Redistributions in binary form must reproduce the above copyright |
| 14 | + * notice, this list of conditions and the following disclaimer in |
| 15 | + * the documentation and/or other materials provided with the |
| 16 | + * distribution. |
| 17 | + * |
| 18 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
| 19 | + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
| 20 | + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
| 21 | + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
| 22 | + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 23 | + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
| 24 | + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 25 | + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 26 | + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 27 | + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| 28 | + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 29 | + * POSSIBILITY OF SUCH DAMAGE. |
| 30 | + * |
| 31 | + */ |
| 32 | + |
| 33 | +#ifdef HAVE_NEON_AARCH64 |
| 34 | +.text |
| 35 | +#include "arm_arch64_common_macro.S" |
| 36 | +WELS_ASM_AARCH64_FUNC_BEGIN SampleVariance16x16_AArch64_neon |
| 37 | + ld1 {v1.16b}, [x0], x1 //save the ref data (16bytes) |
| 38 | + ld1 {v0.16b}, [x2], x3 //save the src data (16bytes) |
| 39 | + uabd v2.16b, v0.16b, v1.16b |
| 40 | + umull v3.8h, v2.8b, v2.8b |
| 41 | + umull2 v4.8h, v2.16b, v2.16b |
| 42 | + uaddlp v4.4s, v4.8h |
| 43 | + uadalp v4.4s, v3.8h //sqr |
| 44 | + uaddlp v2.8h, v2.16b //sum |
| 45 | + |
| 46 | + uaddlp v1.8h, v0.16b //sum_cur |
| 47 | + |
| 48 | + umull v3.8h, v0.8b, v0.8b |
| 49 | + umull2 v5.8h, v0.16b, v0.16b |
| 50 | + uaddlp v3.4s, v3.8h |
| 51 | + uadalp v3.4s, v5.8h //sqr_cur |
| 52 | +.rept 15 |
| 53 | + ld1 {v5.16b}, [x0], x1 //save the ref data (16bytes) |
| 54 | + ld1 {v0.16b}, [x2], x3 //save the src data (16bytes) |
| 55 | + |
| 56 | + uabd v6.16b, v0.16b, v5.16b |
| 57 | + |
| 58 | + //v1 save sum_cur |
| 59 | + uadalp v1.8h, v0.16b |
| 60 | + |
| 61 | + //v4 save sqr |
| 62 | + umull v5.8h, v6.8b, v6.8b |
| 63 | + umull2 v7.8h, v6.16b, v6.16b |
| 64 | + uadalp v4.4s, v5.8h //sqr |
| 65 | + uadalp v4.4s, v7.8h //sqr |
| 66 | + |
| 67 | + //v2 save sum |
| 68 | + uadalp v2.8h, v6.16b |
| 69 | + |
| 70 | + //v3 save sqr_cur |
| 71 | + umull v5.8h, v0.8b, v0.8b |
| 72 | + umull2 v7.8h, v0.16b, v0.16b |
| 73 | + uadalp v3.4s, v5.8h //sqr_cur |
| 74 | + uadalp v3.4s, v7.8h //sqr_cur |
| 75 | +.endr |
| 76 | + uaddlv s2, v2.8h //sum |
| 77 | + uaddlv s1, v1.8h //sum_cur |
| 78 | + ins v2.s[1], v1.s[0] // sum, sum_cur |
| 79 | + shrn v2.4h, v2.4s, #8 // sum, sum_cur>>8 |
| 80 | + mul v2.4h, v2.4h, v2.4h//// sum*sum, sum_cur*sum_cur |
| 81 | + uaddlv d4, v4.4s //sqr |
| 82 | + uaddlv d3, v3.4s //sqr_cur |
| 83 | + ins v4.s[1], v3.s[0] // sqr, sqr_cur |
| 84 | + shrn v4.4h, v4.4s, #8 // sqr, sqr_cur>>8 |
| 85 | + sub v4.4h, v4.4h, v2.4h |
| 86 | + st1 {v4.s}[0], [x4] |
| 87 | +WELS_ASM_AARCH64_FUNC_END |
| 88 | +#endif |