Move asm routines to common. Delete obsolete decoder routines. Use wider routines where applicable. ~1.07x overall faster decode on a quick 720p30 4Mbps test on Haswell.
Showing the changes to test/decoder/DecUT_IdctResAddPred.cpp (1 of 12 files). Show all
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| @@ -4,6 +4,9 @@ · 3 unmodified lines | ||
| 4 | 4 | #include "deblocking.h" |
| 5 | 5 | #include "cpu.h" |
| 6 | 6 | using namespace WelsDec; |
| 7 | + | |
| 8 | +namespace { | |
| 9 | + | |
| 7 | 10 | void IdctResAddPred_ref (uint8_t* pPred, const int32_t kiStride, int16_t* pRs) { |
| 8 | 11 | int16_t iSrc[16]; |
| 9 | 12 | |
| @@ -49,14 +52,25 @@ void SetNonZeroCount_ref (int8_t* pNonZeroCount) { · 39 unmodified lines | ||
| 49 | 52 | } |
| 50 | 53 | } |
| 51 | 54 | |
| 55 | +#if defined(X86_ASM) | |
| 56 | +void IdctFourResAddPred_ref (uint8_t* pPred, int32_t iStride, int16_t* pRs) { | |
| 57 | + IdctResAddPred_ref (pPred + 0 * iStride + 0, iStride, pRs + 0 * 16); | |
| 58 | + IdctResAddPred_ref (pPred + 0 * iStride + 4, iStride, pRs + 1 * 16); | |
| 59 | + IdctResAddPred_ref (pPred + 4 * iStride + 0, iStride, pRs + 2 * 16); | |
| 60 | + IdctResAddPred_ref (pPred + 4 * iStride + 4, iStride, pRs + 3 * 16); | |
| 61 | +} | |
| 62 | +#endif | |
| 63 | + | |
| 64 | +} // anon ns | |
| 65 | + | |
| 52 | 66 | #define GENERATE_IDCTRESADDPRED(pred, flag) \ |
| 53 | 67 | TEST(DecoderDecodeMbAux, pred) {\ |
| 54 | 68 | const int32_t kiStride = 32;\ |
| 55 | 69 | const int iBits = 12;\ |
| 56 | 70 | const int iMask = (1 << iBits) - 1;\ |
| 57 | 71 | const int iOffset = 1 << (iBits - 1);\ |
| 58 | − int16_t iRS[16];\ | |
| 59 | − uint8_t uiPred[16*kiStride];\ | |
| 72 | + ENFORCE_STACK_ALIGN_1D (int16_t, iRS, 16, 16);\ | |
| 73 | + ENFORCE_STACK_ALIGN_1D (uint8_t, uiPred, 16 * kiStride, 16);\ | |
| 60 | 74 | int16_t iRefRS[16];\ |
| 61 | 75 | uint8_t uiRefPred[16*kiStride];\ |
| 62 | 76 | int32_t iRunTimes = 1000;\ |
| @@ -84,9 +98,49 @@ TEST(DecoderDecodeMbAux, pred) {\ · 21 unmodified lines | ||
| 84 | 98 | }\ |
| 85 | 99 | } |
| 86 | 100 | |
| 101 | +#define GENERATE_IDCTFOURRESADDPRED(pred, flag) \ | |
| 102 | +TEST(DecoderDecodeMbAux, pred) {\ | |
| 103 | + const int32_t kiStride = 32;\ | |
| 104 | + const int iBits = 12;\ | |
| 105 | + const int iMask = (1 << iBits) - 1;\ | |
| 106 | + const int iOffset = 1 << (iBits - 1);\ | |
| 107 | + ENFORCE_STACK_ALIGN_1D (int16_t, iRS, 4 * 16, 16);\ | |
| 108 | + ENFORCE_STACK_ALIGN_1D (uint8_t, uiPred, 4 * 16 * kiStride, 16);\ | |
| 109 | + int16_t iRefRS[4 * 16];\ | |
| 110 | + uint8_t uiRefPred[4 * 16 * kiStride];\ | |
| 111 | + int8_t iNzc[6] = { 0 };\ | |
| 112 | + int32_t iRunTimes = 1000;\ | |
| 113 | + uint32_t uiCPUFlags = WelsCPUFeatureDetect(0); \ | |
| 114 | + if ((uiCPUFlags & flag) == 0 && flag != 0) \ | |
| 115 | + return; \ | |
| 116 | + while (iRunTimes--) {\ | |
| 117 | + for (int i = 0; i < 4; i++)\ | |
| 118 | + for (int j = 0; j < 16; j++)\ | |
| 119 | + iNzc[i / 2 * 4 + i % 2] += !!(iRefRS[16 * i + j] = iRS[16 * i + j] = (rand() & iMask) - iOffset);\ | |
| 120 | + for (int i = 0; i < 8; i++)\ | |
| 121 | + for (int j = 0; j < 8; j++)\ | |
| 122 | + uiRefPred[i * kiStride + j] = uiPred[i * kiStride + j] = rand() & 255;\ | |
| 123 | + pred (uiPred, kiStride, iRS, iNzc);\ | |
| 124 | + IdctFourResAddPred_ref (uiRefPred, kiStride, iRefRS);\ | |
| 125 | + bool ok = true;\ | |
| 126 | + for (int i = 0; i < 8; i++)\ | |
| 127 | + for (int j = 0; j < 8; j++)\ | |
| 128 | + if (uiRefPred[i * kiStride + j] != uiPred[i * kiStride + j]) {\ | |
| 129 | + ok = false;\ | |
| 130 | + goto next;\ | |
| 131 | + }\ | |
| 132 | + next:\ | |
| 133 | + EXPECT_EQ(ok, true);\ | |
| 134 | + }\ | |
| 135 | +} | |
| 136 | + | |
| 87 | 137 | GENERATE_IDCTRESADDPRED (IdctResAddPred_c, 0) |
| 88 | 138 | #if defined(X86_ASM) |
| 89 | 139 | GENERATE_IDCTRESADDPRED (IdctResAddPred_mmx, WELS_CPU_MMXEXT) |
| 140 | +GENERATE_IDCTRESADDPRED (IdctResAddPred_sse2, WELS_CPU_SSE2) | |
| 141 | +GENERATE_IDCTRESADDPRED (IdctResAddPred_avx2, WELS_CPU_AVX2) | |
| 142 | +GENERATE_IDCTFOURRESADDPRED (IdctFourResAddPred_sse2, WELS_CPU_SSE2) | |
| 143 | +GENERATE_IDCTFOURRESADDPRED (IdctFourResAddPred_avx2, WELS_CPU_AVX2) | |
| 90 | 144 | #endif |
| 91 | 145 | |
| 92 | 146 | #if defined(HAVE_NEON) |