Keep track of relative pixel offsets and utilize pshufb to efficiently extract relevant pixels for horizontal scaling ratios <= 8. Because pshufb does not cross 128-bit lanes, the overhead of address calculations and loads is relatively greater as compared with an SSSE3 implementation. Fall back to a generic approach for ratios > 8. The implementation assumes that data beyond the end of each line, before the next line begins, can be dirtied; which AFAICT is safe with the current usage of these routines. Speedup is ~10.42x/~5.23x (32-bit/64-bit) for horizontal ratios <= 2, ~9.49x/~4.64x for ratios within (2, 4], ~6.43x/~3.18x for ratios within (4, 8], and ~5.42x/~2.50x for ratios > 8 when not memory-bound on Haswell as compared with the current SSE2 implementation.
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| @@ -347,6 +347,8 @@ GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearFastDownsamplerWrap_ssse3 · 346 unmodified lines | |||
| 347 | WELS_CPU_SSSE3) | 347 | WELS_CPU_SSSE3) |
| 348 | GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearAccurateDownsamplerWrap_sse41, | 348 | GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearAccurateDownsamplerWrap_sse41, |
| 349 | GeneralBilinearAccurateDownsampler_ref, 1, WELS_CPU_SSE41) | 349 | GeneralBilinearAccurateDownsampler_ref, 1, WELS_CPU_SSE41) |
| 350 | GENERATE_GeneralBilinearDownsampler_UT (GeneralBilinearFastDownsamplerWrap_avx2, GeneralBilinearFastDownsampler_ref, 1, | ||
| 351 | WELS_CPU_AVX2) | ||
| 350 | #endif | 352 | #endif |
| 351 | 353 | ||
| 352 | #if defined(HAVE_NEON) | 354 | #if defined(HAVE_NEON) |