Keep track of relative pixel offsets and utilize pshufb to efficiently extract relevant pixels for horizontal scaling ratios <= 8. Because pshufb does not cross 128-bit lanes, the overhead of address calculations and loads is relatively greater as compared with an SSSE3 implementation. Fall back to a generic approach for ratios > 8. The implementation assumes that data beyond the end of each line, before the next line begins, can be dirtied; which AFAICT is safe with the current usage of these routines. Speedup is ~10.42x/~5.23x (32-bit/64-bit) for horizontal ratios <= 2, ~9.49x/~4.64x for ratios within (2, 4], ~6.43x/~3.18x for ratios within (4, 8], and ~5.42x/~2.50x for ratios > 8 when not memory-bound on Haswell as compared with the current SSE2 implementation.
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| @@ -284,6 +284,7 @@ DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (sse2) · 283 unmodified lines | ||
| 284 | 284 | DEFINE_GENERAL_BILINEAR_ACCURATE_DOWNSAMPLER_WRAP (sse2) |
| 285 | 285 | DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (ssse3) |
| 286 | 286 | DEFINE_GENERAL_BILINEAR_ACCURATE_DOWNSAMPLER_WRAP (sse41) |
| 287 | +DEFINE_GENERAL_BILINEAR_FAST_DOWNSAMPLER_WRAP (avx2) | |
| 287 | 288 | #endif //X86_ASM |
| 288 | 289 | |
| 289 | 290 | #ifdef HAVE_NEON |