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| 1 | +/*! | |
| 2 | + * \copy | |
| 3 | + * Copyright (c) 2013, Cisco Systems | |
| 4 | + * All rights reserved. | |
| 5 | + * | |
| 6 | + * Redistribution and use in source and binary forms, with or without | |
| 7 | + * modification, are permitted provided that the following conditions | |
| 8 | + * are met: | |
| 9 | + * | |
| 10 | + * * Redistributions of source code must retain the above copyright | |
| 11 | + * notice, this list of conditions and the following disclaimer. | |
| 12 | + * | |
| 13 | + * * Redistributions in binary form must reproduce the above copyright | |
| 14 | + * notice, this list of conditions and the following disclaimer in | |
| 15 | + * the documentation and/or other materials provided with the | |
| 16 | + * distribution. | |
| 17 | + * | |
| 18 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
| 19 | + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
| 20 | + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | |
| 21 | + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | |
| 22 | + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | |
| 23 | + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
| 24 | + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
| 25 | + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | |
| 26 | + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 27 | + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | |
| 28 | + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 29 | + * POSSIBILITY OF SUCH DAMAGE. | |
| 30 | + * | |
| 31 | + */ | |
| 32 | + | |
| 33 | +#ifdef HAVE_NEON | |
| 34 | +.text | |
| 35 | +#include "arm_arch_common_macro.S" | |
| 36 | + | |
| 37 | +#ifdef APPLE_IOS | |
| 38 | +.macro SQR_ADD_16BYTES | |
| 39 | + vmull.u8 q3, $0, $0 | |
| 40 | + vmull.u8 q8, $1, $1 | |
| 41 | + vpadal.u16 $2, q3 | |
| 42 | + vpadal.u16 $2, q8 | |
| 43 | +.endm | |
| 44 | +#else | |
| 45 | +.macro SQR_ADD_16BYTES arg0, arg1, arg2 | |
| 46 | + vmull.u8 q3, \arg0, \arg0 | |
| 47 | + vmull.u8 q8, \arg1, \arg1 | |
| 48 | + vpadal.u16 \arg2, q3 | |
| 49 | + vpadal.u16 \arg2, q8 | |
| 50 | +.endm | |
| 51 | +#endif | |
| 52 | + | |
| 53 | + | |
| 54 | +WELS_ASM_FUNC_BEGIN pixel_var_16x16_neon | |
| 55 | + stmdb sp!, {r4} | |
| 56 | + | |
| 57 | + vld1.8 {q15}, [r0], r1 //save the ref data (16bytes) | |
| 58 | + vld1.8 {q14}, [r2], r3 //save the src data (16bytes) | |
| 59 | + | |
| 60 | + | |
| 61 | + vabd.u8 q13, q14, q15 | |
| 62 | + vmull.u8 q12, d27, d27 | |
| 63 | + vmull.u8 q11, d26, d26 | |
| 64 | + vaddl.u16 q12, d24, d25 | |
| 65 | + vpadal.u16 q12, q11 //sqr | |
| 66 | + | |
| 67 | + vaddl.u8 q13, d26, d27 //sum | |
| 68 | + | |
| 69 | + vaddl.u8 q10, d28, d29 //sum_cur | |
| 70 | + | |
| 71 | + vmull.u8 q9, d29, d29 | |
| 72 | + vmull.u8 q8, d28, d28 | |
| 73 | + vaddl.u16 q9, d18, d19 //sqr_cur | |
| 74 | + vpadal.u16 q9, q8 | |
| 75 | + | |
| 76 | + mov r4, #15 | |
| 77 | +pixel_var_16x16_loop0: | |
| 78 | + | |
| 79 | + vld1.8 {q0}, [r0], r1 //save the ref data (16bytes) | |
| 80 | + vld1.8 {q1}, [r2], r3 //save the src data (16bytes) | |
| 81 | + | |
| 82 | + vabd.u8 q2, q0, q1 | |
| 83 | + | |
| 84 | + //q10 save sum_cur | |
| 85 | + vpadal.u8 q10, q1 | |
| 86 | + | |
| 87 | + //q12 save sqr | |
| 88 | + SQR_ADD_16BYTES d4, d5, q12 | |
| 89 | + | |
| 90 | + //q13 save sum | |
| 91 | + vpadal.u8 q13, q2 | |
| 92 | + | |
| 93 | + subs r4, #1 | |
| 94 | + | |
| 95 | + //q9 save sqr_cur | |
| 96 | + SQR_ADD_16BYTES d2, d3, q9 | |
| 97 | + | |
| 98 | + bne pixel_var_16x16_loop0 | |
| 99 | + | |
| 100 | + vadd.u16 d0, d26, d27 //sum | |
| 101 | + vadd.u16 d1, d20, d21 //sum_cur | |
| 102 | + vpaddl.u16 q0, q0 | |
| 103 | + vadd.u32 d2, d24, d25 //sqr | |
| 104 | + vadd.u32 d3, d18, d19 //sqr_cur | |
| 105 | + vpadd.u32 d0, d0, d1 | |
| 106 | + vpadd.u32 d1, d2, d3 | |
| 107 | + | |
| 108 | + ldr r4, [sp, #4] | |
| 109 | + | |
| 110 | + vshr.u32 q0, q0, #8 | |
| 111 | + vmul.u32 d0, d0 | |
| 112 | + vsub.u32 d0, d1, d0 | |
| 113 | + vmovl.u32 q0, d0 | |
| 114 | + vst2.16 {d0[0], d1[0]}, [r4] | |
| 115 | + | |
| 116 | + ldmia sp!, {r4} | |
| 117 | + | |
| 118 | +WELS_ASM_FUNC_END | |
| 119 | + | |
| 120 | +#endif | |