Avoid potential performance regressions on CPUs that have lower throughput for 64-bit loads to xmm registers than to mm registers. The emms instruction needed with MMX is somewhat costly on recent Intel cores and causes a slight performance reduction on such cores as such (hence the motivation for the conversion to SSE).
Showing the changes to codec/common/src/mc.cpp (1 of 3 files). Show all
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| @@ -440,7 +440,7 @@ static inline void McCopy_sse2 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t · 439 unmodified lines | ||
| 440 | 440 | if (iWidth == 16) |
| 441 | 441 | McCopyWidthEq16_sse2 (pSrc, iSrcStride, pDst, iDstStride, iHeight); |
| 442 | 442 | else if (iWidth == 8) |
| 443 | − McCopyWidthEq8_sse2 (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 443 | + McCopyWidthEq8_mmx (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 444 | 444 | else if (iWidth == 4) |
| 445 | 445 | McCopyWidthEq4_c (pSrc, iSrcStride, pDst, iDstStride, iHeight); |
| 446 | 446 | else |
| @@ -729,7 +729,7 @@ void McCopy_sse3 (const uint8_t* pSrc, int32_t iSrcStride, uint8_t* pDst, int32_ · 282 unmodified lines | ||
| 729 | 729 | int32_t iWidth, int32_t iHeight) { |
| 730 | 730 | switch (iWidth) { |
| 731 | 731 | case 16: return McCopyWidthEq16_sse3 (pSrc, iSrcStride, pDst, iDstStride, iHeight); |
| 732 | − case 8: return McCopyWidthEq8_sse2 (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 732 | + case 8: return McCopyWidthEq8_mmx (pSrc, iSrcStride, pDst, iDstStride, iHeight); | |
| 733 | 733 | case 4: return McCopyWidthEq4_c (pSrc, iSrcStride, pDst, iDstStride, iHeight); |
| 734 | 734 | } |
| 735 | 735 | return McCopyWidthEq2_c (pSrc, iSrcStride, pDst, iDstStride, iHeight); |