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| @@ -342,20 +342,20 @@ WELS_ASM_FUNC_BEGIN DyadicBilinearOneThirdDownsampler_neon · 341 unmodified lines | ||
| 342 | 342 | stmdb sp!, {r4-r8, lr} |
| 343 | 343 | |
| 344 | 344 | //Get the width and height |
| 345 | − ldr r4, [sp, #24] //src_width | |
| 346 | − ldr r5, [sp, #28] //src_height | |
| 345 | + ldr r4, [sp, #24] //src_width | |
| 346 | + ldr r5, [sp, #28] //src_height | |
| 347 | 347 | |
| 348 | − //Initialize the register | |
| 349 | − mov r6, r2 | |
| 350 | − mov r8, r0 | |
| 351 | − mov lr, #0 | |
| 348 | + //Initialize the register | |
| 349 | + mov r6, r2 | |
| 350 | + mov r8, r0 | |
| 351 | + mov lr, #0 | |
| 352 | 352 | |
| 353 | − //Save the tailer for the un-aligned size | |
| 354 | − mla r7, r1, r5, r0 | |
| 355 | − vld1.32 {q15}, [r7] | |
| 353 | + //Save the tailer for the un-aligned size | |
| 354 | + mla r7, r1, r5, r0 | |
| 355 | + vld1.32 {q15}, [r7] | |
| 356 | 356 | |
| 357 | − add r7, r2, r3 | |
| 358 | − //processing a colume data | |
| 357 | + add r7, r2, r3 | |
| 358 | + //processing a colume data | |
| 359 | 359 | comp_ds_bilinear_onethird_loop0: |
| 360 | 360 | |
| 361 | 361 | vld3.8 {d0, d1, d2}, [r2]! |
| @@ -389,10 +389,10 @@ comp_ds_bilinear_onethird_loop0: · 27 unmodified lines | ||
| 389 | 389 | addcs r8, r1 |
| 390 | 390 | movcs r0, r8 |
| 391 | 391 | subscs r5, #1 |
| 392 | − bne comp_ds_bilinear_onethird_loop0 | |
| 392 | + bne comp_ds_bilinear_onethird_loop0 | |
| 393 | 393 | |
| 394 | − //restore the tailer for the un-aligned size | |
| 395 | − vst1.32 {q15}, [r0] | |
| 394 | + //restore the tailer for the un-aligned size | |
| 395 | + vst1.32 {q15}, [r0] | |
| 396 | 396 | |
| 397 | 397 | ldmia sp!, {r4-r8,lr} |
| 398 | 398 | WELS_ASM_FUNC_END |
| @@ -401,26 +401,26 @@ WELS_ASM_FUNC_BEGIN DyadicBilinearQuarterDownsampler_neon · 2 unmodified lines | ||
| 401 | 401 | stmdb sp!, {r4-r8, lr} |
| 402 | 402 | |
| 403 | 403 | //Get the width and height |
| 404 | − ldr r4, [sp, #24] //src_width | |
| 405 | − ldr r5, [sp, #28] //src_height | |
| 404 | + ldr r4, [sp, #24] //src_width | |
| 405 | + ldr r5, [sp, #28] //src_height | |
| 406 | 406 | |
| 407 | − //Initialize the register | |
| 408 | − mov r6, r2 | |
| 409 | − mov r8, r0 | |
| 410 | − mov lr, #0 | |
| 411 | − lsr r5, #2 | |
| 407 | + //Initialize the register | |
| 408 | + mov r6, r2 | |
| 409 | + mov r8, r0 | |
| 410 | + mov lr, #0 | |
| 411 | + lsr r5, #2 | |
| 412 | 412 | |
| 413 | − //Save the tailer for the un-aligned size | |
| 414 | − mla r7, r1, r5, r0 | |
| 415 | − vld1.32 {q15}, [r7] | |
| 413 | + //Save the tailer for the un-aligned size | |
| 414 | + mla r7, r1, r5, r0 | |
| 415 | + vld1.32 {q15}, [r7] | |
| 416 | 416 | |
| 417 | − add r7, r2, r3 | |
| 418 | − //processing a colume data | |
| 417 | + add r7, r2, r3 | |
| 418 | + //processing a colume data | |
| 419 | 419 | comp_ds_bilinear_quarter_loop0: |
| 420 | 420 | |
| 421 | − vld2.16 {q0, q1}, [r2]! | |
| 421 | + vld2.16 {q0, q1}, [r2]! | |
| 422 | 422 | vld2.16 {q2, q3}, [r2]! |
| 423 | − vld2.16 {q8, q9}, [r7]! | |
| 423 | + vld2.16 {q8, q9}, [r7]! | |
| 424 | 424 | vld2.16 {q10, q11}, [r7]! |
| 425 | 425 | |
| 426 | 426 | vpaddl.u8 q0, q0 |
| @@ -447,10 +447,10 @@ comp_ds_bilinear_quarter_loop0: · 20 unmodified lines | ||
| 447 | 447 | addcs r8, r1 |
| 448 | 448 | movcs r0, r8 |
| 449 | 449 | subscs r5, #1 |
| 450 | − bne comp_ds_bilinear_quarter_loop0 | |
| 450 | + bne comp_ds_bilinear_quarter_loop0 | |
| 451 | 451 | |
| 452 | − //restore the tailer for the un-aligned size | |
| 453 | − vst1.32 {q15}, [r0] | |
| 452 | + //restore the tailer for the un-aligned size | |
| 453 | + vst1.32 {q15}, [r0] | |
| 454 | 454 | |
| 455 | 455 | ldmia sp!, {r4-r8,lr} |
| 456 | 456 | WELS_ASM_FUNC_END |