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| 1 | /*! | ||
| 2 | * \copy | ||
| 3 | * Copyright (c) 2009-2013, Cisco Systems | ||
| 4 | * All rights reserved. | ||
| 5 | * | ||
| 6 | * Redistribution and use in source and binary forms, with or without | ||
| 7 | * modification, are permitted provided that the following conditions | ||
| 8 | * are met: | ||
| 9 | * | ||
| 10 | * * Redistributions of source code must retain the above copyright | ||
| 11 | * notice, this list of conditions and the following disclaimer. | ||
| 12 | * | ||
| 13 | * * Redistributions in binary form must reproduce the above copyright | ||
| 14 | * notice, this list of conditions and the following disclaimer in | ||
| 15 | * the documentation and/or other materials provided with the | ||
| 16 | * distribution. | ||
| 17 | * | ||
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
| 19 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
| 20 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS | ||
| 21 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE | ||
| 22 | * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
| 23 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | ||
| 24 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER | ||
| 26 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
| 27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN | ||
| 28 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
| 29 | * POSSIBILITY OF SUCH DAMAGE. | ||
| 30 | * | ||
| 31 | * | ||
| 32 | * \file cpu.cpp | ||
| 33 | * | ||
| 34 | * \brief CPU compatibility detection | ||
| 35 | * | ||
| 36 | * \date 04/29/2009 Created | ||
| 37 | * | ||
| 38 | ************************************************************************************* | ||
| 39 | */ | ||
| 40 | #include <string.h> | ||
| 41 | #include <stdio.h> | ||
| 42 | #ifdef ANDROID_NDK | ||
| 43 | #include <cpu-features.h> | ||
| 44 | #endif | ||
| 45 | #include "cpu.h" | ||
| 46 | #include "cpu_core.h" | ||
| 47 | |||
| 48 | |||
| 49 | |||
| 50 | #define CPU_Vendor_AMD "AuthenticAMD" | ||
| 51 | #define CPU_Vendor_INTEL "GenuineIntel" | ||
| 52 | #define CPU_Vendor_CYRIX "CyrixInstead" | ||
| 53 | |||
| 54 | #if defined(X86_ASM) | ||
| 55 | |||
| 56 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) { | ||
| 57 | uint32_t uiCPU = 0; | ||
| 58 | uint32_t uiFeatureA = 0, uiFeatureB = 0, uiFeatureC = 0, uiFeatureD = 0; | ||
| 59 | int32_t CacheLineSize = 0; | ||
| 60 | int8_t chVendorName[16] = { 0 }; | ||
| 61 | uint32_t uiMaxCpuidLevel = 0; | ||
| 62 | |||
| 63 | if (!WelsCPUIdVerify()) { | ||
| 64 | /* cpuid is not supported in cpu */ | ||
| 65 | return 0; | ||
| 66 | } | ||
| 67 | |||
| 68 | WelsCPUId (0, &uiFeatureA, (uint32_t*)&chVendorName[0], (uint32_t*)&chVendorName[8], (uint32_t*)&chVendorName[4]); | ||
| 69 | uiMaxCpuidLevel = uiFeatureA; | ||
| 70 | if (uiMaxCpuidLevel == 0) { | ||
| 71 | /* maximum input value for basic cpuid information */ | ||
| 72 | return 0; | ||
| 73 | } | ||
| 74 | |||
| 75 | WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 76 | if ((uiFeatureD & 0x00800000) == 0) { | ||
| 77 | /* Basic MMX technology is not support in cpu, mean nothing for us so return here */ | ||
| 78 | return 0; | ||
| 79 | } | ||
| 80 | |||
| 81 | uiCPU = WELS_CPU_MMX; | ||
| 82 | if (uiFeatureD & 0x02000000) { | ||
| 83 | /* SSE technology is identical to AMD MMX extensions */ | ||
| 84 | uiCPU |= WELS_CPU_MMXEXT | WELS_CPU_SSE; | ||
| 85 | } | ||
| 86 | if (uiFeatureD & 0x04000000) { | ||
| 87 | /* SSE2 support here */ | ||
| 88 | uiCPU |= WELS_CPU_SSE2; | ||
| 89 | } | ||
| 90 | if (uiFeatureD & 0x00000001) { | ||
| 91 | /* x87 FPU on-chip checking */ | ||
| 92 | uiCPU |= WELS_CPU_FPU; | ||
| 93 | } | ||
| 94 | if (uiFeatureD & 0x00008000) { | ||
| 95 | /* CMOV instruction checking */ | ||
| 96 | uiCPU |= WELS_CPU_CMOV; | ||
| 97 | } | ||
| 98 | if ((!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) || | ||
| 99 | (!strcmp((const char*)chVendorName, CPU_Vendor_AMD)) ) { // confirmed_safe_unsafe_usage | ||
| 100 | if (uiFeatureD & 0x10000000) { | ||
| 101 | /* Multi-Threading checking: contains of multiple logic processors */ | ||
| 102 | uiCPU |= WELS_CPU_HTT; | ||
| 103 | } | ||
| 104 | } | ||
| 105 | |||
| 106 | if (uiFeatureC & 0x00000001) { | ||
| 107 | /* SSE3 support here */ | ||
| 108 | uiCPU |= WELS_CPU_SSE3; | ||
| 109 | } | ||
| 110 | if (uiFeatureC & 0x00000200) { | ||
| 111 | /* SSSE3 support here */ | ||
| 112 | uiCPU |= WELS_CPU_SSSE3; | ||
| 113 | } | ||
| 114 | if (uiFeatureC & 0x00080000) { | ||
| 115 | /* SSE4.1 support here, 45nm Penryn processor */ | ||
| 116 | uiCPU |= WELS_CPU_SSE41; | ||
| 117 | } | ||
| 118 | if (uiFeatureC & 0x00100000) { | ||
| 119 | /* SSE4.2 support here, next generation Nehalem processor */ | ||
| 120 | uiCPU |= WELS_CPU_SSE42; | ||
| 121 | } | ||
| 122 | if (WelsCPUSupportAVX (uiFeatureA, uiFeatureC)) { | ||
| 123 | /* AVX supported */ | ||
| 124 | uiCPU |= WELS_CPU_AVX; | ||
| 125 | } | ||
| 126 | if (WelsCPUSupportFMA (uiFeatureA, uiFeatureC)) { | ||
| 127 | /* AVX FMA supported */ | ||
| 128 | uiCPU |= WELS_CPU_FMA; | ||
| 129 | } | ||
| 130 | if (uiFeatureC & 0x02000000) { | ||
| 131 | /* AES checking */ | ||
| 132 | uiCPU |= WELS_CPU_AES; | ||
| 133 | } | ||
| 134 | if (uiFeatureC & 0x00400000) { | ||
| 135 | /* MOVBE checking */ | ||
| 136 | uiCPU |= WELS_CPU_MOVBE; | ||
| 137 | } | ||
| 138 | |||
| 139 | if( pNumberOfLogicProcessors != NULL ){ | ||
| 140 | if( uiCPU & WELS_CPU_HTT){ | ||
| 141 | *pNumberOfLogicProcessors = (uiFeatureB & 0x00ff0000) >> 16; // feature bits: 23-16 on returned EBX | ||
| 142 | } else { | ||
| 143 | *pNumberOfLogicProcessors = 0; | ||
| 144 | } | ||
| 145 | if( !strcmp((const char*)chVendorName, CPU_Vendor_INTEL) ){ | ||
| 146 | if( uiMaxCpuidLevel >= 4 ){ | ||
| 147 | uiFeatureC = 0; | ||
| 148 | WelsCPUId(0x4, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 149 | if( uiFeatureA != 0 ){ | ||
| 150 | *pNumberOfLogicProcessors = ((uiFeatureA&0xfc000000)>>26) + 1; | ||
| 151 | } | ||
| 152 | } | ||
| 153 | } | ||
| 154 | } | ||
| 155 | |||
| 156 | WelsCPUId (0x80000000, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 157 | |||
| 158 | if ((!strcmp ((const char*)chVendorName, CPU_Vendor_AMD)) | ||
| 159 | && (uiFeatureA >= 0x80000001)) { // confirmed_safe_unsafe_usage | ||
| 160 | WelsCPUId (0x80000001, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 161 | if (uiFeatureD & 0x00400000) { | ||
| 162 | uiCPU |= WELS_CPU_MMXEXT; | ||
| 163 | } | ||
| 164 | if (uiFeatureD & 0x80000000) { | ||
| 165 | uiCPU |= WELS_CPU_3DNOW; | ||
| 166 | } | ||
| 167 | } | ||
| 168 | |||
| 169 | if (!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) { // confirmed_safe_unsafe_usage | ||
| 170 | int32_t family, model; | ||
| 171 | |||
| 172 | WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 173 | family = ((uiFeatureA >> 8) & 0xf) + ((uiFeatureA >> 20) & 0xff); | ||
| 174 | model = ((uiFeatureA >> 4) & 0xf) + ((uiFeatureA >> 12) & 0xf0); | ||
| 175 | |||
| 176 | if ((family == 6) && (model == 9 || model == 13 || model == 14)) { | ||
| 177 | uiCPU &= ~ (WELS_CPU_SSE2 | WELS_CPU_SSE3); | ||
| 178 | } | ||
| 179 | } | ||
| 180 | |||
| 181 | // get cache line size | ||
| 182 | if ((!strcmp ((const char*)chVendorName, CPU_Vendor_INTEL)) | ||
| 183 | || ! (strcmp ((const char*)chVendorName, CPU_Vendor_CYRIX))) { // confirmed_safe_unsafe_usage | ||
| 184 | WelsCPUId (1, &uiFeatureA, &uiFeatureB, &uiFeatureC, &uiFeatureD); | ||
| 185 | |||
| 186 | CacheLineSize = (uiFeatureB & 0xff00) >> | ||
| 187 | 5; // ((clflush_line_size >> 8) << 3), CLFLUSH_line_size * 8 = CacheLineSize_in_byte | ||
| 188 | |||
| 189 | if (CacheLineSize == 128) { | ||
| 190 | uiCPU |= WELS_CPU_CACHELINE_128; | ||
| 191 | } else if (CacheLineSize == 64) { | ||
| 192 | uiCPU |= WELS_CPU_CACHELINE_64; | ||
| 193 | } else if (CacheLineSize == 32) { | ||
| 194 | uiCPU |= WELS_CPU_CACHELINE_32; | ||
| 195 | } else if (CacheLineSize == 16) { | ||
| 196 | uiCPU |= WELS_CPU_CACHELINE_16; | ||
| 197 | } | ||
| 198 | } | ||
| 199 | |||
| 200 | return uiCPU; | ||
| 201 | } | ||
| 202 | |||
| 203 | |||
| 204 | void WelsCPURestore (const uint32_t kuiCPU) { | ||
| 205 | if (kuiCPU & (WELS_CPU_MMX | WELS_CPU_MMXEXT | WELS_CPU_3DNOW | WELS_CPU_3DNOWEXT)) { | ||
| 206 | WelsEmms(); | ||
| 207 | } | ||
| 208 | } | ||
| 209 | |||
| 210 | #elif defined(HAVE_NEON) //For supporting both android platform and iOS platform | ||
| 211 | #if defined(ANDROID_NDK) | ||
| 212 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) | ||
| 213 | { | ||
| 214 | uint32_t uiCPU = 0; | ||
| 215 | AndroidCpuFamily cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN; | ||
| 216 | uint64_t uiFeatures = 0; | ||
| 217 | cpuFamily = android_getCpuFamily(); | ||
| 218 | if (cpuFamily == ANDROID_CPU_FAMILY_ARM) { | ||
| 219 | uiFeatures = android_getCpuFeatures(); | ||
| 220 | if (uiFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7){ | ||
| 221 | uiCPU |= WELS_CPU_ARMv7; | ||
| 222 | } | ||
| 223 | if (uiFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3){ | ||
| 224 | uiCPU |= WELS_CPU_VFPv3; | ||
| 225 | } | ||
| 226 | if (uiFeatures & ANDROID_CPU_ARM_FEATURE_NEON){ | ||
| 227 | uiCPU |= WELS_CPU_NEON; | ||
| 228 | } | ||
| 229 | } | ||
| 230 | |||
| 231 | if( pNumberOfLogicProcessors != NULL ){ | ||
| 232 | *pNumberOfLogicProcessors = android_getCpuCount(); | ||
| 233 | } | ||
| 234 | |||
| 235 | return uiCPU; | ||
| 236 | } | ||
| 237 | |||
| 238 | #elif defined(__APPLE__) | ||
| 239 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) | ||
| 240 | { | ||
| 241 | uint32_t uiCPU = 0; | ||
| 242 | |||
| 243 | #if defined(__ARM_NEON__) | ||
| 244 | uiCPU |= WELS_CPU_ARMv7; | ||
| 245 | uiCPU |= WELS_CPU_VFPv3; | ||
| 246 | uiCPU |= WELS_CPU_NEON; | ||
| 247 | #endif | ||
| 248 | return uiCPU; | ||
| 249 | } | ||
| 250 | #elif defined(__linux__) | ||
| 251 | |||
| 252 | /* Generic arm/linux cpu feature detection */ | ||
| 253 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) { | ||
| 254 | FILE *f = fopen("/proc/cpuinfo", "r"); | ||
| 255 | |||
| 256 | if (!f) | ||
| 257 | return 0; | ||
| 258 | |||
| 259 | char buf[200]; | ||
| 260 | int flags = 0; | ||
| 261 | while (fgets(buf, sizeof(buf), f)) { | ||
| 262 | if (!strncmp(buf, "Features", strlen("Features"))) { | ||
| 263 | if (strstr(buf, " neon ")) | ||
| 264 | flags |= WELS_CPU_NEON; | ||
| 265 | if (strstr(buf, " vfpv3 ")) | ||
| 266 | flags |= WELS_CPU_VFPv3; | ||
| 267 | break; | ||
| 268 | } | ||
| 269 | } | ||
| 270 | fclose(f); | ||
| 271 | return flags; | ||
| 272 | } | ||
| 273 | |||
| 274 | #else /* HAVE_NEON enabled but no runtime detection */ | ||
| 275 | |||
| 276 | /* No runtime feature detection available, but built with HAVE_NEON - assume | ||
| 277 | * that NEON and all associated features are available. */ | ||
| 278 | |||
| 279 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) { | ||
| 280 | return WELS_CPU_ARMv7 | | ||
| 281 | WELS_CPU_VFPv3 | | ||
| 282 | WELS_CPU_NEON; | ||
| 283 | } | ||
| 284 | #endif | ||
| 285 | #else /* Neither X86_ASM nor HAVE_NEON */ | ||
| 286 | |||
| 287 | uint32_t WelsCPUFeatureDetect (int32_t* pNumberOfLogicProcessors) { | ||
| 288 | return 0; | ||
| 289 | } | ||
| 290 | |||
| 291 | #endif | ||
| 292 | |||
| 293 | |||